ehci.c revision 1.78 1 1.78 augustss /* $NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.61 mycroft * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.61 mycroft * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.1 augustss
39 1.1 augustss /*
40 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 1.1 augustss *
42 1.35 enami * The EHCI 1.0 spec can be found at
43 1.34 augustss * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
44 1.7 augustss * and the USB 2.0 spec at
45 1.43 ichiro * http://www.usb.org/developers/docs/usb_20.zip
46 1.1 augustss *
47 1.1 augustss */
48 1.4 lukem
49 1.52 jdolecek /*
50 1.52 jdolecek * TODO:
51 1.52 jdolecek * 1) hold off explorations by companion controllers until ehci has started.
52 1.52 jdolecek *
53 1.52 jdolecek * 2) The EHCI driver lacks support for interrupt isochronous transfers, so
54 1.52 jdolecek * devices using them don't work.
55 1.52 jdolecek * Interrupt transfers are not difficult, it's just not done.
56 1.52 jdolecek *
57 1.60 mycroft * 3) The meaty part to implement is the support for USB 2.0 hubs.
58 1.75 xtraeme * They are quite complicated since the need to be able to do
59 1.52 jdolecek * "transaction translation", i.e., converting to/from USB 2 and USB 1.
60 1.52 jdolecek * So the hub driver needs to handle and schedule these things, to
61 1.52 jdolecek * assign place in frame where different devices get to go. See chapter
62 1.52 jdolecek * on hubs in USB 2.0 for details.
63 1.52 jdolecek *
64 1.60 mycroft * 4) command failures are not recovered correctly
65 1.52 jdolecek */
66 1.52 jdolecek
67 1.4 lukem #include <sys/cdefs.h>
68 1.78 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $");
69 1.47 augustss
70 1.47 augustss #include "ohci.h"
71 1.47 augustss #include "uhci.h"
72 1.1 augustss
73 1.1 augustss #include <sys/param.h>
74 1.1 augustss #include <sys/systm.h>
75 1.1 augustss #include <sys/kernel.h>
76 1.1 augustss #include <sys/malloc.h>
77 1.1 augustss #include <sys/device.h>
78 1.1 augustss #include <sys/select.h>
79 1.1 augustss #include <sys/proc.h>
80 1.1 augustss #include <sys/queue.h>
81 1.1 augustss
82 1.1 augustss #include <machine/bus.h>
83 1.1 augustss #include <machine/endian.h>
84 1.1 augustss
85 1.1 augustss #include <dev/usb/usb.h>
86 1.1 augustss #include <dev/usb/usbdi.h>
87 1.1 augustss #include <dev/usb/usbdivar.h>
88 1.1 augustss #include <dev/usb/usb_mem.h>
89 1.1 augustss #include <dev/usb/usb_quirks.h>
90 1.1 augustss
91 1.1 augustss #include <dev/usb/ehcireg.h>
92 1.1 augustss #include <dev/usb/ehcivar.h>
93 1.1 augustss
94 1.1 augustss #ifdef EHCI_DEBUG
95 1.73 augustss #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0)
96 1.73 augustss #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0)
97 1.6 augustss int ehcidebug = 0;
98 1.15 augustss #ifndef __NetBSD__
99 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
100 1.15 augustss #endif
101 1.1 augustss #else
102 1.1 augustss #define DPRINTF(x)
103 1.1 augustss #define DPRINTFN(n,x)
104 1.1 augustss #endif
105 1.1 augustss
106 1.5 augustss struct ehci_pipe {
107 1.5 augustss struct usbd_pipe pipe;
108 1.55 mycroft int nexttoggle;
109 1.55 mycroft
110 1.10 augustss ehci_soft_qh_t *sqh;
111 1.10 augustss union {
112 1.10 augustss ehci_soft_qtd_t *qtd;
113 1.10 augustss /* ehci_soft_itd_t *itd; */
114 1.10 augustss } tail;
115 1.10 augustss union {
116 1.10 augustss /* Control pipe */
117 1.10 augustss struct {
118 1.10 augustss usb_dma_t reqdma;
119 1.10 augustss u_int length;
120 1.19 augustss /*ehci_soft_qtd_t *setup, *data, *stat;*/
121 1.10 augustss } ctl;
122 1.10 augustss /* Interrupt pipe */
123 1.78 augustss struct {
124 1.78 augustss u_int length;
125 1.78 augustss } intr;
126 1.10 augustss /* Bulk pipe */
127 1.10 augustss struct {
128 1.10 augustss u_int length;
129 1.10 augustss } bulk;
130 1.10 augustss /* Iso pipe */
131 1.15 augustss /* XXX */
132 1.10 augustss } u;
133 1.5 augustss };
134 1.5 augustss
135 1.5 augustss Static void ehci_shutdown(void *);
136 1.5 augustss Static void ehci_power(int, void *);
137 1.5 augustss
138 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
139 1.5 augustss Static void ehci_poll(struct usbd_bus *);
140 1.5 augustss Static void ehci_softintr(void *);
141 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
142 1.15 augustss Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
143 1.18 augustss Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
144 1.18 augustss Static void ehci_idone(struct ehci_xfer *);
145 1.15 augustss Static void ehci_timeout(void *);
146 1.15 augustss Static void ehci_timeout_task(void *);
147 1.5 augustss
148 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
149 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
150 1.5 augustss
151 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
152 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
153 1.5 augustss
154 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
155 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
156 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
157 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
158 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
159 1.5 augustss
160 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
161 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
162 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
163 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
164 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
165 1.5 augustss
166 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
167 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
168 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
169 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
170 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
171 1.5 augustss
172 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
173 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
174 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
175 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
176 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
177 1.5 augustss
178 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
179 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
180 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
181 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
182 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
183 1.5 augustss
184 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
185 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
186 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
187 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
188 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
189 1.5 augustss
190 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
191 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
192 1.5 augustss
193 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
194 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
195 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
196 1.6 augustss Static void ehci_pcd_enable(void *);
197 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
198 1.5 augustss
199 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
200 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
201 1.9 augustss
202 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
203 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
204 1.25 augustss Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
205 1.15 augustss ehci_softc_t *, int, int, usbd_xfer_handle,
206 1.15 augustss ehci_soft_qtd_t **, ehci_soft_qtd_t **);
207 1.25 augustss Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
208 1.18 augustss ehci_soft_qtd_t *);
209 1.15 augustss
210 1.15 augustss Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
211 1.9 augustss
212 1.78 augustss Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
213 1.78 augustss int ival);
214 1.78 augustss
215 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
216 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
217 1.10 augustss ehci_soft_qh_t *);
218 1.23 augustss Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
219 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
220 1.10 augustss
221 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
222 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
223 1.9 augustss
224 1.5 augustss #ifdef EHCI_DEBUG
225 1.18 augustss Static void ehci_dump_regs(ehci_softc_t *);
226 1.39 martin Static void ehci_dump(void);
227 1.6 augustss Static ehci_softc_t *theehci;
228 1.15 augustss Static void ehci_dump_link(ehci_link_t, int);
229 1.15 augustss Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
230 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
231 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
232 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
233 1.38 martin #ifdef DIAGNOSTIC
234 1.18 augustss Static void ehci_dump_exfer(struct ehci_xfer *);
235 1.5 augustss #endif
236 1.38 martin #endif
237 1.5 augustss
238 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
239 1.11 augustss
240 1.5 augustss #define EHCI_INTR_ENDPT 1
241 1.5 augustss
242 1.18 augustss #define ehci_add_intr_list(sc, ex) \
243 1.18 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
244 1.18 augustss #define ehci_del_intr_list(ex) \
245 1.44 augustss do { \
246 1.44 augustss LIST_REMOVE((ex), inext); \
247 1.44 augustss (ex)->inext.le_prev = NULL; \
248 1.44 augustss } while (0)
249 1.44 augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
250 1.18 augustss
251 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
252 1.5 augustss ehci_open,
253 1.5 augustss ehci_softintr,
254 1.5 augustss ehci_poll,
255 1.5 augustss ehci_allocm,
256 1.5 augustss ehci_freem,
257 1.5 augustss ehci_allocx,
258 1.5 augustss ehci_freex,
259 1.5 augustss };
260 1.5 augustss
261 1.33 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
262 1.5 augustss ehci_root_ctrl_transfer,
263 1.5 augustss ehci_root_ctrl_start,
264 1.5 augustss ehci_root_ctrl_abort,
265 1.5 augustss ehci_root_ctrl_close,
266 1.5 augustss ehci_noop,
267 1.5 augustss ehci_root_ctrl_done,
268 1.5 augustss };
269 1.5 augustss
270 1.33 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
271 1.5 augustss ehci_root_intr_transfer,
272 1.5 augustss ehci_root_intr_start,
273 1.5 augustss ehci_root_intr_abort,
274 1.5 augustss ehci_root_intr_close,
275 1.5 augustss ehci_noop,
276 1.5 augustss ehci_root_intr_done,
277 1.5 augustss };
278 1.5 augustss
279 1.33 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
280 1.5 augustss ehci_device_ctrl_transfer,
281 1.5 augustss ehci_device_ctrl_start,
282 1.5 augustss ehci_device_ctrl_abort,
283 1.5 augustss ehci_device_ctrl_close,
284 1.5 augustss ehci_noop,
285 1.5 augustss ehci_device_ctrl_done,
286 1.5 augustss };
287 1.5 augustss
288 1.33 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
289 1.5 augustss ehci_device_intr_transfer,
290 1.5 augustss ehci_device_intr_start,
291 1.5 augustss ehci_device_intr_abort,
292 1.5 augustss ehci_device_intr_close,
293 1.5 augustss ehci_device_clear_toggle,
294 1.5 augustss ehci_device_intr_done,
295 1.5 augustss };
296 1.5 augustss
297 1.33 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
298 1.5 augustss ehci_device_bulk_transfer,
299 1.5 augustss ehci_device_bulk_start,
300 1.5 augustss ehci_device_bulk_abort,
301 1.5 augustss ehci_device_bulk_close,
302 1.5 augustss ehci_device_clear_toggle,
303 1.5 augustss ehci_device_bulk_done,
304 1.5 augustss };
305 1.5 augustss
306 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
307 1.5 augustss ehci_device_isoc_transfer,
308 1.5 augustss ehci_device_isoc_start,
309 1.5 augustss ehci_device_isoc_abort,
310 1.5 augustss ehci_device_isoc_close,
311 1.5 augustss ehci_noop,
312 1.5 augustss ehci_device_isoc_done,
313 1.5 augustss };
314 1.5 augustss
315 1.1 augustss usbd_status
316 1.1 augustss ehci_init(ehci_softc_t *sc)
317 1.1 augustss {
318 1.3 augustss u_int32_t version, sparams, cparams, hcr;
319 1.3 augustss u_int i;
320 1.3 augustss usbd_status err;
321 1.11 augustss ehci_soft_qh_t *sqh;
322 1.3 augustss
323 1.3 augustss DPRINTF(("ehci_init: start\n"));
324 1.6 augustss #ifdef EHCI_DEBUG
325 1.6 augustss theehci = sc;
326 1.6 augustss #endif
327 1.3 augustss
328 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
329 1.3 augustss
330 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
331 1.41 thorpej aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
332 1.3 augustss version >> 8, version & 0xff);
333 1.3 augustss
334 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
335 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
336 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
337 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
338 1.41 thorpej aprint_error("%s: wrong number of companions (%d != %d)\n",
339 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
340 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
341 1.47 augustss #if NOHCI == 0 || NUHCI == 0
342 1.47 augustss aprint_error("%s: ohci or uhci probably not configured\n",
343 1.47 augustss USBDEVNAME(sc->sc_bus.bdev));
344 1.47 augustss #endif
345 1.3 augustss return (USBD_IOERROR);
346 1.3 augustss }
347 1.3 augustss if (sc->sc_ncomp > 0) {
348 1.41 thorpej aprint_normal("%s: companion controller%s, %d port%s each:",
349 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
350 1.3 augustss EHCI_HCS_N_PCC(sparams),
351 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
352 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
353 1.41 thorpej aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
354 1.41 thorpej aprint_normal("\n");
355 1.3 augustss }
356 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
357 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
358 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
359 1.36 augustss
360 1.36 augustss if (EHCI_HCC_64BIT(cparams)) {
361 1.36 augustss /* MUST clear segment register if 64 bit capable. */
362 1.36 augustss EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
363 1.36 augustss }
364 1.33 augustss
365 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
366 1.3 augustss
367 1.3 augustss /* Reset the controller */
368 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
369 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
370 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
371 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
372 1.3 augustss for (i = 0; i < 100; i++) {
373 1.34 augustss usb_delay_ms(&sc->sc_bus, 1);
374 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
375 1.3 augustss if (!hcr)
376 1.3 augustss break;
377 1.3 augustss }
378 1.3 augustss if (hcr) {
379 1.41 thorpej aprint_error("%s: reset timeout\n",
380 1.41 thorpej USBDEVNAME(sc->sc_bus.bdev));
381 1.3 augustss return (USBD_IOERROR);
382 1.3 augustss }
383 1.3 augustss
384 1.78 augustss /* XXX need proper intr scheduling */
385 1.78 augustss sc->sc_rand = 96;
386 1.78 augustss
387 1.3 augustss /* frame list size at default, read back what we got and use that */
388 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
389 1.78 augustss case 0: sc->sc_flsize = 1024; break;
390 1.78 augustss case 1: sc->sc_flsize = 512; break;
391 1.78 augustss case 2: sc->sc_flsize = 256; break;
392 1.3 augustss case 3: return (USBD_IOERROR);
393 1.3 augustss }
394 1.78 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
395 1.78 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
396 1.3 augustss if (err)
397 1.3 augustss return (err);
398 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
399 1.78 augustss sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
400 1.78 augustss EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
401 1.3 augustss
402 1.5 augustss /* Set up the bus struct. */
403 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
404 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
405 1.5 augustss
406 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
407 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
408 1.5 augustss
409 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
410 1.6 augustss
411 1.78 augustss /*
412 1.78 augustss * Allocate the interrupt dummy QHs. These are arranged to give poll
413 1.78 augustss * intervals that are powers of 2 times 1ms.
414 1.78 augustss */
415 1.78 augustss for (i = 0; i < EHCI_INTRQHS; i++) {
416 1.78 augustss sqh = ehci_alloc_sqh(sc);
417 1.78 augustss if (sqh == NULL) {
418 1.78 augustss err = USBD_NOMEM;
419 1.78 augustss goto bad1;
420 1.78 augustss }
421 1.78 augustss sc->sc_islots[i].sqh = sqh;
422 1.78 augustss }
423 1.78 augustss for (i = 0; i < EHCI_INTRQHS; i++) {
424 1.78 augustss sqh = sc->sc_islots[i].sqh;
425 1.78 augustss if (i == 0) {
426 1.78 augustss /* The last (1ms) QH terminates. */
427 1.78 augustss sqh->qh.qh_link = EHCI_NULL;
428 1.78 augustss sqh->next = NULL;
429 1.78 augustss } else {
430 1.78 augustss /* Otherwise the next QH has half the poll interval */
431 1.78 augustss sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
432 1.78 augustss sqh->qh.qh_link = htole32(sqh->next->physaddr |
433 1.78 augustss EHCI_LINK_QH);
434 1.78 augustss }
435 1.78 augustss sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
436 1.78 augustss sqh->qh.qh_link = EHCI_NULL;
437 1.78 augustss sqh->qh.qh_curqtd = EHCI_NULL;
438 1.78 augustss sqh->next = NULL;
439 1.78 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
440 1.78 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
441 1.78 augustss sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
442 1.78 augustss sqh->sqtd = NULL;
443 1.78 augustss }
444 1.78 augustss /* Point the frame list at the last level (128ms). */
445 1.78 augustss for (i = 0; i < sc->sc_flsize; i++) {
446 1.78 augustss sc->sc_flist[i] = htole32(EHCI_LINK_QH |
447 1.78 augustss sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
448 1.78 augustss i)].sqh->physaddr);
449 1.78 augustss }
450 1.78 augustss
451 1.11 augustss /* Allocate dummy QH that starts the async list. */
452 1.11 augustss sqh = ehci_alloc_sqh(sc);
453 1.11 augustss if (sqh == NULL) {
454 1.9 augustss err = USBD_NOMEM;
455 1.9 augustss goto bad1;
456 1.9 augustss }
457 1.11 augustss /* Fill the QH */
458 1.11 augustss sqh->qh.qh_endp =
459 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
460 1.11 augustss sqh->qh.qh_link =
461 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
462 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
463 1.11 augustss sqh->next = NULL;
464 1.11 augustss /* Fill the overlay qTD */
465 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
466 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
467 1.26 augustss sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
468 1.11 augustss sqh->sqtd = NULL;
469 1.9 augustss #ifdef EHCI_DEBUG
470 1.9 augustss if (ehcidebug) {
471 1.27 enami ehci_dump_sqh(sqh);
472 1.9 augustss }
473 1.9 augustss #endif
474 1.9 augustss
475 1.9 augustss /* Point to async list */
476 1.11 augustss sc->sc_async_head = sqh;
477 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
478 1.9 augustss
479 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
480 1.9 augustss
481 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
482 1.10 augustss
483 1.6 augustss /* Enable interrupts */
484 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
485 1.6 augustss
486 1.6 augustss /* Turn on controller */
487 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
488 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
489 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
490 1.10 augustss EHCI_CMD_ASE |
491 1.78 augustss EHCI_CMD_PSE |
492 1.6 augustss EHCI_CMD_RS);
493 1.6 augustss
494 1.6 augustss /* Take over port ownership */
495 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
496 1.6 augustss
497 1.8 augustss for (i = 0; i < 100; i++) {
498 1.34 augustss usb_delay_ms(&sc->sc_bus, 1);
499 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
500 1.8 augustss if (!hcr)
501 1.8 augustss break;
502 1.8 augustss }
503 1.8 augustss if (hcr) {
504 1.41 thorpej aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
505 1.8 augustss return (USBD_IOERROR);
506 1.8 augustss }
507 1.8 augustss
508 1.5 augustss return (USBD_NORMAL_COMPLETION);
509 1.9 augustss
510 1.9 augustss #if 0
511 1.11 augustss bad2:
512 1.15 augustss ehci_free_sqh(sc, sc->sc_async_head);
513 1.9 augustss #endif
514 1.9 augustss bad1:
515 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
516 1.9 augustss return (err);
517 1.1 augustss }
518 1.1 augustss
519 1.1 augustss int
520 1.1 augustss ehci_intr(void *v)
521 1.1 augustss {
522 1.6 augustss ehci_softc_t *sc = v;
523 1.6 augustss
524 1.17 augustss if (sc == NULL || sc->sc_dying)
525 1.15 augustss return (0);
526 1.15 augustss
527 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
528 1.6 augustss if (sc->sc_bus.use_polling) {
529 1.78 augustss u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
530 1.78 augustss
531 1.78 augustss if (intrs)
532 1.78 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
533 1.6 augustss #ifdef DIAGNOSTIC
534 1.65 mycroft DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
535 1.6 augustss #endif
536 1.6 augustss return (0);
537 1.6 augustss }
538 1.6 augustss
539 1.33 augustss return (ehci_intr1(sc));
540 1.6 augustss }
541 1.6 augustss
542 1.6 augustss Static int
543 1.6 augustss ehci_intr1(ehci_softc_t *sc)
544 1.6 augustss {
545 1.6 augustss u_int32_t intrs, eintrs;
546 1.6 augustss
547 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
548 1.6 augustss
549 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
550 1.6 augustss if (sc == NULL) {
551 1.6 augustss #ifdef DIAGNOSTIC
552 1.72 augustss printf("ehci_intr1: sc == NULL\n");
553 1.6 augustss #endif
554 1.6 augustss return (0);
555 1.6 augustss }
556 1.6 augustss
557 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
558 1.6 augustss if (!intrs)
559 1.6 augustss return (0);
560 1.6 augustss
561 1.6 augustss eintrs = intrs & sc->sc_eintrs;
562 1.72 augustss DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
563 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
564 1.6 augustss (u_int)eintrs));
565 1.6 augustss if (!eintrs)
566 1.6 augustss return (0);
567 1.6 augustss
568 1.68 mycroft EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
569 1.6 augustss sc->sc_bus.intr_context++;
570 1.6 augustss sc->sc_bus.no_intrs++;
571 1.10 augustss if (eintrs & EHCI_STS_IAA) {
572 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
573 1.11 augustss wakeup(&sc->sc_async_head);
574 1.20 augustss eintrs &= ~EHCI_STS_IAA;
575 1.10 augustss }
576 1.18 augustss if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
577 1.46 augustss DPRINTFN(5,("ehci_intr1: %s %s\n",
578 1.46 augustss eintrs & EHCI_STS_INT ? "INT" : "",
579 1.46 augustss eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
580 1.18 augustss usb_schedsoftintr(&sc->sc_bus);
581 1.21 augustss eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
582 1.6 augustss }
583 1.6 augustss if (eintrs & EHCI_STS_HSE) {
584 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
585 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
586 1.6 augustss /* XXX what else */
587 1.6 augustss }
588 1.6 augustss if (eintrs & EHCI_STS_PCD) {
589 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
590 1.33 augustss /*
591 1.6 augustss * Disable PCD interrupt for now, because it will be
592 1.6 augustss * on until the port has been reset.
593 1.6 augustss */
594 1.6 augustss ehci_pcd_able(sc, 0);
595 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
596 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
597 1.6 augustss eintrs &= ~EHCI_STS_PCD;
598 1.6 augustss }
599 1.6 augustss
600 1.6 augustss sc->sc_bus.intr_context--;
601 1.6 augustss
602 1.6 augustss if (eintrs != 0) {
603 1.6 augustss /* Block unprocessed interrupts. */
604 1.6 augustss sc->sc_eintrs &= ~eintrs;
605 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
606 1.6 augustss printf("%s: blocking intrs 0x%x\n",
607 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
608 1.6 augustss }
609 1.6 augustss
610 1.6 augustss return (1);
611 1.6 augustss }
612 1.6 augustss
613 1.6 augustss void
614 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
615 1.6 augustss {
616 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
617 1.6 augustss if (on)
618 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
619 1.6 augustss else
620 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
621 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
622 1.6 augustss }
623 1.6 augustss
624 1.6 augustss void
625 1.6 augustss ehci_pcd_enable(void *v_sc)
626 1.6 augustss {
627 1.6 augustss ehci_softc_t *sc = v_sc;
628 1.6 augustss
629 1.6 augustss ehci_pcd_able(sc, 1);
630 1.6 augustss }
631 1.6 augustss
632 1.6 augustss void
633 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
634 1.6 augustss {
635 1.6 augustss usbd_pipe_handle pipe;
636 1.6 augustss u_char *p;
637 1.6 augustss int i, m;
638 1.6 augustss
639 1.6 augustss if (xfer == NULL) {
640 1.6 augustss /* Just ignore the change. */
641 1.6 augustss return;
642 1.6 augustss }
643 1.6 augustss
644 1.6 augustss pipe = xfer->pipe;
645 1.6 augustss
646 1.30 augustss p = KERNADDR(&xfer->dmabuf, 0);
647 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
648 1.6 augustss memset(p, 0, xfer->length);
649 1.6 augustss for (i = 1; i <= m; i++) {
650 1.6 augustss /* Pick out CHANGE bits from the status reg. */
651 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
652 1.6 augustss p[i/8] |= 1 << (i%8);
653 1.6 augustss }
654 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
655 1.6 augustss xfer->actlen = xfer->length;
656 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
657 1.6 augustss
658 1.6 augustss usb_transfer_complete(xfer);
659 1.1 augustss }
660 1.1 augustss
661 1.5 augustss void
662 1.5 augustss ehci_softintr(void *v)
663 1.5 augustss {
664 1.18 augustss ehci_softc_t *sc = v;
665 1.53 chs struct ehci_xfer *ex, *nextex;
666 1.18 augustss
667 1.18 augustss DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
668 1.18 augustss sc->sc_bus.intr_context));
669 1.18 augustss
670 1.18 augustss sc->sc_bus.intr_context++;
671 1.18 augustss
672 1.18 augustss /*
673 1.18 augustss * The only explanation I can think of for why EHCI is as brain dead
674 1.18 augustss * as UHCI interrupt-wise is that Intel was involved in both.
675 1.18 augustss * An interrupt just tells us that something is done, we have no
676 1.18 augustss * clue what, so we need to scan through all active transfers. :-(
677 1.18 augustss */
678 1.53 chs for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
679 1.53 chs nextex = LIST_NEXT(ex, inext);
680 1.18 augustss ehci_check_intr(sc, ex);
681 1.53 chs }
682 1.18 augustss
683 1.77 augustss #ifdef USB_USE_SOFTINTR
684 1.29 augustss if (sc->sc_softwake) {
685 1.29 augustss sc->sc_softwake = 0;
686 1.29 augustss wakeup(&sc->sc_softwake);
687 1.29 augustss }
688 1.77 augustss #endif /* USB_USE_SOFTINTR */
689 1.29 augustss
690 1.18 augustss sc->sc_bus.intr_context--;
691 1.18 augustss }
692 1.18 augustss
693 1.18 augustss /* Check for an interrupt. */
694 1.18 augustss void
695 1.18 augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
696 1.18 augustss {
697 1.18 augustss ehci_soft_qtd_t *sqtd, *lsqtd;
698 1.18 augustss u_int32_t status;
699 1.18 augustss
700 1.22 augustss DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
701 1.18 augustss
702 1.18 augustss if (ex->sqtdstart == NULL) {
703 1.18 augustss printf("ehci_check_intr: sqtdstart=NULL\n");
704 1.18 augustss return;
705 1.18 augustss }
706 1.18 augustss lsqtd = ex->sqtdend;
707 1.18 augustss #ifdef DIAGNOSTIC
708 1.18 augustss if (lsqtd == NULL) {
709 1.18 augustss printf("ehci_check_intr: sqtd==0\n");
710 1.18 augustss return;
711 1.18 augustss }
712 1.18 augustss #endif
713 1.33 augustss /*
714 1.18 augustss * If the last TD is still active we need to check whether there
715 1.18 augustss * is a an error somewhere in the middle, or whether there was a
716 1.18 augustss * short packet (SPD and not ACTIVE).
717 1.18 augustss */
718 1.18 augustss if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
719 1.18 augustss DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
720 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
721 1.18 augustss status = le32toh(sqtd->qtd.qtd_status);
722 1.18 augustss /* If there's an active QTD the xfer isn't done. */
723 1.18 augustss if (status & EHCI_QTD_ACTIVE)
724 1.18 augustss break;
725 1.18 augustss /* Any kind of error makes the xfer done. */
726 1.18 augustss if (status & EHCI_QTD_HALTED)
727 1.18 augustss goto done;
728 1.18 augustss /* We want short packets, and it is short: it's done */
729 1.58 mycroft if (EHCI_QTD_GET_BYTES(status) != 0)
730 1.18 augustss goto done;
731 1.18 augustss }
732 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
733 1.18 augustss ex, ex->sqtdstart));
734 1.18 augustss return;
735 1.18 augustss }
736 1.18 augustss done:
737 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
738 1.18 augustss usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
739 1.18 augustss ehci_idone(ex);
740 1.18 augustss }
741 1.18 augustss
742 1.18 augustss void
743 1.18 augustss ehci_idone(struct ehci_xfer *ex)
744 1.18 augustss {
745 1.18 augustss usbd_xfer_handle xfer = &ex->xfer;
746 1.18 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
747 1.18 augustss ehci_soft_qtd_t *sqtd;
748 1.18 augustss u_int32_t status = 0, nstatus;
749 1.18 augustss int actlen;
750 1.18 augustss
751 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
752 1.18 augustss #ifdef DIAGNOSTIC
753 1.18 augustss {
754 1.18 augustss int s = splhigh();
755 1.18 augustss if (ex->isdone) {
756 1.18 augustss splx(s);
757 1.18 augustss #ifdef EHCI_DEBUG
758 1.18 augustss printf("ehci_idone: ex is done!\n ");
759 1.18 augustss ehci_dump_exfer(ex);
760 1.18 augustss #else
761 1.18 augustss printf("ehci_idone: ex=%p is done!\n", ex);
762 1.18 augustss #endif
763 1.18 augustss return;
764 1.18 augustss }
765 1.18 augustss ex->isdone = 1;
766 1.18 augustss splx(s);
767 1.18 augustss }
768 1.18 augustss #endif
769 1.18 augustss
770 1.18 augustss if (xfer->status == USBD_CANCELLED ||
771 1.18 augustss xfer->status == USBD_TIMEOUT) {
772 1.18 augustss DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
773 1.18 augustss return;
774 1.18 augustss }
775 1.18 augustss
776 1.18 augustss #ifdef EHCI_DEBUG
777 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
778 1.18 augustss if (ehcidebug > 10)
779 1.18 augustss ehci_dump_sqtds(ex->sqtdstart);
780 1.18 augustss #endif
781 1.18 augustss
782 1.18 augustss /* The transfer is done, compute actual length and status. */
783 1.18 augustss actlen = 0;
784 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
785 1.18 augustss nstatus = le32toh(sqtd->qtd.qtd_status);
786 1.18 augustss if (nstatus & EHCI_QTD_ACTIVE)
787 1.18 augustss break;
788 1.18 augustss
789 1.18 augustss status = nstatus;
790 1.48 mycroft /* halt is ok if descriptor is last, and complete */
791 1.49 enami if (sqtd->qtd.qtd_next == EHCI_NULL &&
792 1.49 enami EHCI_QTD_GET_BYTES(status) == 0)
793 1.48 mycroft status &= ~EHCI_QTD_HALTED;
794 1.18 augustss if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
795 1.18 augustss actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
796 1.18 augustss }
797 1.22 augustss
798 1.22 augustss /* If there are left over TDs we need to update the toggle. */
799 1.22 augustss if (sqtd != NULL) {
800 1.58 mycroft printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus);
801 1.58 mycroft #if 0
802 1.58 mycroft ehci_dump_sqh(epipe->sqh);
803 1.58 mycroft ehci_dump_sqtds(ex->sqtdstart);
804 1.58 mycroft #endif
805 1.58 mycroft epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
806 1.22 augustss }
807 1.18 augustss
808 1.18 augustss status &= EHCI_QTD_STATERRS;
809 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
810 1.22 augustss xfer->length, actlen, status));
811 1.18 augustss xfer->actlen = actlen;
812 1.18 augustss if (status != 0) {
813 1.18 augustss #ifdef EHCI_DEBUG
814 1.18 augustss char sbuf[128];
815 1.18 augustss
816 1.18 augustss bitmask_snprintf((u_int32_t)status,
817 1.63 mycroft "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
818 1.63 mycroft "\3MISSED", sbuf, sizeof(sbuf));
819 1.18 augustss
820 1.78 augustss DPRINTFN((status & EHCI_QTD_HALTED) ? 2 : 0,
821 1.18 augustss ("ehci_idone: error, addr=%d, endpt=0x%02x, "
822 1.18 augustss "status 0x%s\n",
823 1.18 augustss xfer->pipe->device->address,
824 1.18 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
825 1.18 augustss sbuf));
826 1.23 augustss if (ehcidebug > 2) {
827 1.23 augustss ehci_dump_sqh(epipe->sqh);
828 1.23 augustss ehci_dump_sqtds(ex->sqtdstart);
829 1.23 augustss }
830 1.18 augustss #endif
831 1.18 augustss if (status == EHCI_QTD_HALTED)
832 1.18 augustss xfer->status = USBD_STALLED;
833 1.18 augustss else
834 1.18 augustss xfer->status = USBD_IOERROR; /* more info XXX */
835 1.18 augustss } else {
836 1.18 augustss xfer->status = USBD_NORMAL_COMPLETION;
837 1.18 augustss }
838 1.18 augustss
839 1.18 augustss usb_transfer_complete(xfer);
840 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
841 1.5 augustss }
842 1.5 augustss
843 1.15 augustss /*
844 1.15 augustss * Wait here until controller claims to have an interrupt.
845 1.18 augustss * Then call ehci_intr and return. Use timeout to avoid waiting
846 1.15 augustss * too long.
847 1.15 augustss */
848 1.15 augustss void
849 1.15 augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
850 1.15 augustss {
851 1.15 augustss int timo = xfer->timeout;
852 1.15 augustss int usecs;
853 1.15 augustss u_int32_t intrs;
854 1.15 augustss
855 1.15 augustss xfer->status = USBD_IN_PROGRESS;
856 1.15 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
857 1.15 augustss usb_delay_ms(&sc->sc_bus, 1);
858 1.17 augustss if (sc->sc_dying)
859 1.17 augustss break;
860 1.15 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
861 1.15 augustss sc->sc_eintrs;
862 1.15 augustss DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
863 1.70 yamt #ifdef EHCI_DEBUG
864 1.15 augustss if (ehcidebug > 15)
865 1.18 augustss ehci_dump_regs(sc);
866 1.15 augustss #endif
867 1.15 augustss if (intrs) {
868 1.15 augustss ehci_intr1(sc);
869 1.15 augustss if (xfer->status != USBD_IN_PROGRESS)
870 1.15 augustss return;
871 1.15 augustss }
872 1.15 augustss }
873 1.15 augustss
874 1.15 augustss /* Timeout */
875 1.15 augustss DPRINTF(("ehci_waitintr: timeout\n"));
876 1.15 augustss xfer->status = USBD_TIMEOUT;
877 1.15 augustss usb_transfer_complete(xfer);
878 1.15 augustss /* XXX should free TD */
879 1.15 augustss }
880 1.15 augustss
881 1.5 augustss void
882 1.5 augustss ehci_poll(struct usbd_bus *bus)
883 1.5 augustss {
884 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
885 1.5 augustss #ifdef EHCI_DEBUG
886 1.5 augustss static int last;
887 1.5 augustss int new;
888 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
889 1.5 augustss if (new != last) {
890 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
891 1.5 augustss last = new;
892 1.5 augustss }
893 1.5 augustss #endif
894 1.5 augustss
895 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
896 1.5 augustss ehci_intr1(sc);
897 1.5 augustss }
898 1.5 augustss
899 1.1 augustss int
900 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
901 1.1 augustss {
902 1.1 augustss int rv = 0;
903 1.1 augustss
904 1.1 augustss if (sc->sc_child != NULL)
905 1.1 augustss rv = config_detach(sc->sc_child, flags);
906 1.33 augustss
907 1.1 augustss if (rv != 0)
908 1.1 augustss return (rv);
909 1.1 augustss
910 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
911 1.6 augustss
912 1.1 augustss if (sc->sc_powerhook != NULL)
913 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
914 1.1 augustss if (sc->sc_shutdownhook != NULL)
915 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
916 1.1 augustss
917 1.17 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
918 1.15 augustss
919 1.1 augustss /* XXX free other data structures XXX */
920 1.1 augustss
921 1.1 augustss return (rv);
922 1.1 augustss }
923 1.1 augustss
924 1.1 augustss
925 1.1 augustss int
926 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
927 1.1 augustss {
928 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
929 1.1 augustss int rv = 0;
930 1.1 augustss
931 1.1 augustss switch (act) {
932 1.1 augustss case DVACT_ACTIVATE:
933 1.1 augustss return (EOPNOTSUPP);
934 1.1 augustss
935 1.1 augustss case DVACT_DEACTIVATE:
936 1.1 augustss if (sc->sc_child != NULL)
937 1.1 augustss rv = config_deactivate(sc->sc_child);
938 1.5 augustss sc->sc_dying = 1;
939 1.1 augustss break;
940 1.1 augustss }
941 1.1 augustss return (rv);
942 1.1 augustss }
943 1.1 augustss
944 1.5 augustss /*
945 1.5 augustss * Handle suspend/resume.
946 1.5 augustss *
947 1.5 augustss * We need to switch to polling mode here, because this routine is
948 1.73 augustss * called from an interrupt context. This is all right since we
949 1.5 augustss * are almost suspended anyway.
950 1.5 augustss */
951 1.5 augustss void
952 1.5 augustss ehci_power(int why, void *v)
953 1.5 augustss {
954 1.5 augustss ehci_softc_t *sc = v;
955 1.74 augustss u_int32_t cmd, hcr;
956 1.74 augustss int s, i;
957 1.5 augustss
958 1.5 augustss #ifdef EHCI_DEBUG
959 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
960 1.74 augustss if (ehcidebug > 0)
961 1.74 augustss ehci_dump_regs(sc);
962 1.5 augustss #endif
963 1.5 augustss
964 1.5 augustss s = splhardusb();
965 1.5 augustss switch (why) {
966 1.5 augustss case PWR_SUSPEND:
967 1.5 augustss case PWR_STANDBY:
968 1.5 augustss sc->sc_bus.use_polling++;
969 1.74 augustss
970 1.74 augustss sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
971 1.74 augustss
972 1.74 augustss cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
973 1.74 augustss EOWRITE4(sc, EHCI_USBCMD, cmd);
974 1.74 augustss
975 1.74 augustss for (i = 0; i < 100; i++) {
976 1.74 augustss hcr = EOREAD4(sc, EHCI_USBSTS) &
977 1.74 augustss (EHCI_STS_ASS | EHCI_STS_PSS);
978 1.74 augustss if (hcr == 0)
979 1.74 augustss break;
980 1.74 augustss
981 1.74 augustss usb_delay_ms(&sc->sc_bus, 1);
982 1.74 augustss }
983 1.74 augustss if (hcr != 0) {
984 1.74 augustss printf("%s: reset timeout\n",
985 1.74 augustss USBDEVNAME(sc->sc_bus.bdev));
986 1.74 augustss }
987 1.74 augustss
988 1.74 augustss cmd &= ~EHCI_CMD_RS;
989 1.74 augustss EOWRITE4(sc, EHCI_USBCMD, cmd);
990 1.74 augustss
991 1.74 augustss for (i = 0; i < 100; i++) {
992 1.74 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
993 1.74 augustss if (hcr == EHCI_STS_HCH)
994 1.74 augustss break;
995 1.74 augustss
996 1.74 augustss usb_delay_ms(&sc->sc_bus, 1);
997 1.74 augustss }
998 1.74 augustss if (hcr != EHCI_STS_HCH) {
999 1.74 augustss printf("%s: config timeout\n",
1000 1.74 augustss USBDEVNAME(sc->sc_bus.bdev));
1001 1.5 augustss }
1002 1.74 augustss
1003 1.5 augustss sc->sc_bus.use_polling--;
1004 1.5 augustss break;
1005 1.74 augustss
1006 1.5 augustss case PWR_RESUME:
1007 1.5 augustss sc->sc_bus.use_polling++;
1008 1.74 augustss
1009 1.74 augustss /* restore things in case the bios sucks */
1010 1.74 augustss EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
1011 1.74 augustss EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1012 1.74 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR,
1013 1.74 augustss sc->sc_async_head->physaddr | EHCI_LINK_QH);
1014 1.74 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1015 1.74 augustss
1016 1.74 augustss EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1017 1.74 augustss
1018 1.74 augustss for (i = 0; i < 100; i++) {
1019 1.74 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1020 1.74 augustss if (hcr != EHCI_STS_HCH)
1021 1.74 augustss break;
1022 1.74 augustss
1023 1.74 augustss usb_delay_ms(&sc->sc_bus, 1);
1024 1.74 augustss }
1025 1.74 augustss if (hcr == EHCI_STS_HCH) {
1026 1.74 augustss printf("%s: config timeout\n",
1027 1.74 augustss USBDEVNAME(sc->sc_bus.bdev));
1028 1.74 augustss }
1029 1.74 augustss
1030 1.74 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1031 1.74 augustss
1032 1.5 augustss sc->sc_bus.use_polling--;
1033 1.5 augustss break;
1034 1.5 augustss case PWR_SOFTSUSPEND:
1035 1.5 augustss case PWR_SOFTSTANDBY:
1036 1.5 augustss case PWR_SOFTRESUME:
1037 1.5 augustss break;
1038 1.5 augustss }
1039 1.5 augustss splx(s);
1040 1.74 augustss
1041 1.74 augustss #ifdef EHCI_DEBUG
1042 1.74 augustss DPRINTF(("ehci_power: sc=%p\n", sc));
1043 1.74 augustss if (ehcidebug > 0)
1044 1.74 augustss ehci_dump_regs(sc);
1045 1.74 augustss #endif
1046 1.5 augustss }
1047 1.5 augustss
1048 1.5 augustss /*
1049 1.5 augustss * Shut down the controller when the system is going down.
1050 1.5 augustss */
1051 1.5 augustss void
1052 1.5 augustss ehci_shutdown(void *v)
1053 1.5 augustss {
1054 1.8 augustss ehci_softc_t *sc = v;
1055 1.5 augustss
1056 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
1057 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
1058 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1059 1.5 augustss }
1060 1.5 augustss
1061 1.5 augustss usbd_status
1062 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1063 1.5 augustss {
1064 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1065 1.25 augustss usbd_status err;
1066 1.5 augustss
1067 1.25 augustss err = usb_allocmem(&sc->sc_bus, size, 0, dma);
1068 1.25 augustss #ifdef EHCI_DEBUG
1069 1.25 augustss if (err)
1070 1.25 augustss printf("ehci_allocm: usb_allocmem()=%d\n", err);
1071 1.25 augustss #endif
1072 1.25 augustss return (err);
1073 1.5 augustss }
1074 1.5 augustss
1075 1.5 augustss void
1076 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1077 1.5 augustss {
1078 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1079 1.5 augustss
1080 1.5 augustss usb_freemem(&sc->sc_bus, dma);
1081 1.5 augustss }
1082 1.5 augustss
1083 1.5 augustss usbd_xfer_handle
1084 1.5 augustss ehci_allocx(struct usbd_bus *bus)
1085 1.5 augustss {
1086 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1087 1.5 augustss usbd_xfer_handle xfer;
1088 1.5 augustss
1089 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
1090 1.28 augustss if (xfer != NULL) {
1091 1.32 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1092 1.28 augustss #ifdef DIAGNOSTIC
1093 1.28 augustss if (xfer->busy_free != XFER_FREE) {
1094 1.72 augustss printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1095 1.28 augustss xfer->busy_free);
1096 1.28 augustss }
1097 1.28 augustss #endif
1098 1.28 augustss } else {
1099 1.15 augustss xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
1100 1.28 augustss }
1101 1.18 augustss if (xfer != NULL) {
1102 1.71 augustss memset(xfer, 0, sizeof(struct ehci_xfer));
1103 1.18 augustss #ifdef DIAGNOSTIC
1104 1.18 augustss EXFER(xfer)->isdone = 1;
1105 1.18 augustss xfer->busy_free = XFER_BUSY;
1106 1.18 augustss #endif
1107 1.18 augustss }
1108 1.5 augustss return (xfer);
1109 1.5 augustss }
1110 1.5 augustss
1111 1.5 augustss void
1112 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1113 1.5 augustss {
1114 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1115 1.5 augustss
1116 1.18 augustss #ifdef DIAGNOSTIC
1117 1.18 augustss if (xfer->busy_free != XFER_BUSY) {
1118 1.18 augustss printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1119 1.18 augustss xfer->busy_free);
1120 1.18 augustss return;
1121 1.18 augustss }
1122 1.18 augustss xfer->busy_free = XFER_FREE;
1123 1.18 augustss if (!EXFER(xfer)->isdone) {
1124 1.18 augustss printf("ehci_freex: !isdone\n");
1125 1.18 augustss return;
1126 1.18 augustss }
1127 1.18 augustss #endif
1128 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1129 1.5 augustss }
1130 1.5 augustss
1131 1.5 augustss Static void
1132 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
1133 1.5 augustss {
1134 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1135 1.15 augustss
1136 1.23 augustss DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1137 1.23 augustss epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1138 1.22 augustss #ifdef USB_DEBUG
1139 1.22 augustss if (ehcidebug)
1140 1.22 augustss usbd_dump_pipe(pipe);
1141 1.5 augustss #endif
1142 1.55 mycroft epipe->nexttoggle = 0;
1143 1.5 augustss }
1144 1.5 augustss
1145 1.5 augustss Static void
1146 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
1147 1.5 augustss {
1148 1.5 augustss }
1149 1.5 augustss
1150 1.5 augustss #ifdef EHCI_DEBUG
1151 1.5 augustss void
1152 1.18 augustss ehci_dump_regs(ehci_softc_t *sc)
1153 1.5 augustss {
1154 1.6 augustss int i;
1155 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1156 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
1157 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
1158 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
1159 1.29 augustss printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1160 1.15 augustss EOREAD4(sc, EHCI_FRINDEX),
1161 1.15 augustss EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1162 1.15 augustss EOREAD4(sc, EHCI_PERIODICLISTBASE),
1163 1.15 augustss EOREAD4(sc, EHCI_ASYNCLISTADDR));
1164 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
1165 1.33 augustss printf("port %d status=0x%08x\n", i,
1166 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
1167 1.39 martin }
1168 1.39 martin
1169 1.40 martin /*
1170 1.40 martin * Unused function - this is meant to be called from a kernel
1171 1.40 martin * debugger.
1172 1.40 martin */
1173 1.39 martin void
1174 1.39 martin ehci_dump()
1175 1.39 martin {
1176 1.39 martin ehci_dump_regs(theehci);
1177 1.6 augustss }
1178 1.6 augustss
1179 1.6 augustss void
1180 1.15 augustss ehci_dump_link(ehci_link_t link, int type)
1181 1.9 augustss {
1182 1.15 augustss link = le32toh(link);
1183 1.15 augustss printf("0x%08x", link);
1184 1.9 augustss if (link & EHCI_LINK_TERMINATE)
1185 1.15 augustss printf("<T>");
1186 1.15 augustss else {
1187 1.15 augustss printf("<");
1188 1.15 augustss if (type) {
1189 1.15 augustss switch (EHCI_LINK_TYPE(link)) {
1190 1.15 augustss case EHCI_LINK_ITD: printf("ITD"); break;
1191 1.15 augustss case EHCI_LINK_QH: printf("QH"); break;
1192 1.15 augustss case EHCI_LINK_SITD: printf("SITD"); break;
1193 1.15 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
1194 1.16 augustss }
1195 1.15 augustss }
1196 1.9 augustss printf(">");
1197 1.15 augustss }
1198 1.15 augustss }
1199 1.15 augustss
1200 1.15 augustss void
1201 1.15 augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1202 1.15 augustss {
1203 1.29 augustss int i;
1204 1.29 augustss u_int32_t stop;
1205 1.29 augustss
1206 1.29 augustss stop = 0;
1207 1.29 augustss for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1208 1.15 augustss ehci_dump_sqtd(sqtd);
1209 1.72 augustss stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1210 1.29 augustss }
1211 1.29 augustss if (sqtd)
1212 1.29 augustss printf("dump aborted, too many TDs\n");
1213 1.9 augustss }
1214 1.9 augustss
1215 1.9 augustss void
1216 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1217 1.9 augustss {
1218 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1219 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
1220 1.9 augustss }
1221 1.9 augustss
1222 1.9 augustss void
1223 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
1224 1.9 augustss {
1225 1.9 augustss u_int32_t s;
1226 1.15 augustss char sbuf[128];
1227 1.9 augustss
1228 1.15 augustss printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1229 1.15 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1230 1.9 augustss printf("\n");
1231 1.15 augustss s = le32toh(qtd->qtd_status);
1232 1.15 augustss bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1233 1.15 augustss "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1234 1.15 augustss "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1235 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1236 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1237 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1238 1.15 augustss printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1239 1.15 augustss EHCI_QTD_GET_PID(s), sbuf);
1240 1.9 augustss for (s = 0; s < 5; s++)
1241 1.15 augustss printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1242 1.9 augustss }
1243 1.9 augustss
1244 1.9 augustss void
1245 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
1246 1.9 augustss {
1247 1.9 augustss ehci_qh_t *qh = &sqh->qh;
1248 1.15 augustss u_int32_t endp, endphub;
1249 1.9 augustss
1250 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1251 1.15 augustss printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1252 1.15 augustss endp = le32toh(qh->qh_endp);
1253 1.15 augustss printf(" endp=0x%08x\n", endp);
1254 1.15 augustss printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1255 1.15 augustss EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1256 1.15 augustss EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1257 1.15 augustss EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1258 1.15 augustss printf(" mpl=0x%x ctl=%d nrl=%d\n",
1259 1.15 augustss EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1260 1.15 augustss EHCI_QH_GET_NRL(endp));
1261 1.15 augustss endphub = le32toh(qh->qh_endphub);
1262 1.15 augustss printf(" endphub=0x%08x\n", endphub);
1263 1.15 augustss printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1264 1.15 augustss EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1265 1.15 augustss EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1266 1.15 augustss EHCI_QH_GET_MULT(endphub));
1267 1.15 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1268 1.12 augustss printf("Overlay qTD:\n");
1269 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
1270 1.9 augustss }
1271 1.9 augustss
1272 1.38 martin #ifdef DIAGNOSTIC
1273 1.18 augustss Static void
1274 1.18 augustss ehci_dump_exfer(struct ehci_xfer *ex)
1275 1.18 augustss {
1276 1.18 augustss printf("ehci_dump_exfer: ex=%p\n", ex);
1277 1.18 augustss }
1278 1.38 martin #endif
1279 1.5 augustss #endif
1280 1.5 augustss
1281 1.5 augustss usbd_status
1282 1.5 augustss ehci_open(usbd_pipe_handle pipe)
1283 1.5 augustss {
1284 1.5 augustss usbd_device_handle dev = pipe->device;
1285 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1286 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1287 1.5 augustss u_int8_t addr = dev->address;
1288 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1289 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1290 1.10 augustss ehci_soft_qh_t *sqh;
1291 1.10 augustss usbd_status err;
1292 1.10 augustss int s;
1293 1.78 augustss int ival, speed, naks;
1294 1.5 augustss
1295 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1296 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1297 1.5 augustss
1298 1.17 augustss if (sc->sc_dying)
1299 1.17 augustss return (USBD_IOERROR);
1300 1.17 augustss
1301 1.55 mycroft epipe->nexttoggle = 0;
1302 1.55 mycroft
1303 1.5 augustss if (addr == sc->sc_addr) {
1304 1.5 augustss switch (ed->bEndpointAddress) {
1305 1.5 augustss case USB_CONTROL_ENDPOINT:
1306 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
1307 1.5 augustss break;
1308 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
1309 1.5 augustss pipe->methods = &ehci_root_intr_methods;
1310 1.5 augustss break;
1311 1.5 augustss default:
1312 1.5 augustss return (USBD_INVAL);
1313 1.5 augustss }
1314 1.10 augustss return (USBD_NORMAL_COMPLETION);
1315 1.10 augustss }
1316 1.10 augustss
1317 1.24 augustss /* XXX All this stuff is only valid for async. */
1318 1.11 augustss switch (dev->speed) {
1319 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1320 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1321 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1322 1.37 provos default: panic("ehci_open: bad device speed %d", dev->speed);
1323 1.11 augustss }
1324 1.10 augustss naks = 8; /* XXX */
1325 1.10 augustss sqh = ehci_alloc_sqh(sc);
1326 1.10 augustss if (sqh == NULL)
1327 1.10 augustss goto bad0;
1328 1.10 augustss /* qh_link filled when the QH is added */
1329 1.10 augustss sqh->qh.qh_endp = htole32(
1330 1.10 augustss EHCI_QH_SET_ADDR(addr) |
1331 1.56 mycroft EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1332 1.55 mycroft EHCI_QH_SET_EPS(speed) |
1333 1.55 mycroft EHCI_QH_DTC |
1334 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1335 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1336 1.10 augustss EHCI_QH_CTL : 0) |
1337 1.10 augustss EHCI_QH_SET_NRL(naks)
1338 1.10 augustss );
1339 1.10 augustss sqh->qh.qh_endphub = htole32(
1340 1.78 augustss EHCI_QH_SET_MULT(1) |
1341 1.11 augustss /* XXX TT stuff */
1342 1.78 augustss EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1343 1.10 augustss );
1344 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
1345 1.11 augustss /* Fill the overlay qTD */
1346 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1347 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1348 1.15 augustss sqh->qh.qh_qtd.qtd_status = htole32(0);
1349 1.10 augustss
1350 1.10 augustss epipe->sqh = sqh;
1351 1.5 augustss
1352 1.10 augustss switch (xfertype) {
1353 1.10 augustss case UE_CONTROL:
1354 1.33 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1355 1.10 augustss 0, &epipe->u.ctl.reqdma);
1356 1.25 augustss #ifdef EHCI_DEBUG
1357 1.25 augustss if (err)
1358 1.25 augustss printf("ehci_open: usb_allocmem()=%d\n", err);
1359 1.25 augustss #endif
1360 1.10 augustss if (err)
1361 1.11 augustss goto bad1;
1362 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
1363 1.10 augustss s = splusb();
1364 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1365 1.10 augustss splx(s);
1366 1.10 augustss break;
1367 1.10 augustss case UE_BULK:
1368 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
1369 1.10 augustss s = splusb();
1370 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1371 1.10 augustss splx(s);
1372 1.10 augustss break;
1373 1.24 augustss case UE_INTERRUPT:
1374 1.24 augustss pipe->methods = &ehci_device_intr_methods;
1375 1.78 augustss ival = pipe->interval;
1376 1.78 augustss if (ival == USBD_DEFAULT_INTERVAL)
1377 1.78 augustss ival = ed->bInterval;
1378 1.78 augustss return (ehci_device_setintr(sc, sqh, ival));
1379 1.24 augustss case UE_ISOCHRONOUS:
1380 1.24 augustss pipe->methods = &ehci_device_isoc_methods;
1381 1.24 augustss return (USBD_INVAL);
1382 1.10 augustss default:
1383 1.10 augustss return (USBD_INVAL);
1384 1.5 augustss }
1385 1.5 augustss return (USBD_NORMAL_COMPLETION);
1386 1.5 augustss
1387 1.11 augustss bad1:
1388 1.11 augustss ehci_free_sqh(sc, sqh);
1389 1.5 augustss bad0:
1390 1.5 augustss return (USBD_NOMEM);
1391 1.10 augustss }
1392 1.10 augustss
1393 1.10 augustss /*
1394 1.10 augustss * Add an ED to the schedule. Called at splusb().
1395 1.10 augustss */
1396 1.10 augustss void
1397 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1398 1.10 augustss {
1399 1.10 augustss SPLUSBCHECK;
1400 1.10 augustss
1401 1.10 augustss sqh->next = head->next;
1402 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
1403 1.10 augustss head->next = sqh;
1404 1.15 augustss head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1405 1.10 augustss
1406 1.10 augustss #ifdef EHCI_DEBUG
1407 1.22 augustss if (ehcidebug > 5) {
1408 1.10 augustss printf("ehci_add_qh:\n");
1409 1.10 augustss ehci_dump_sqh(sqh);
1410 1.10 augustss }
1411 1.5 augustss #endif
1412 1.5 augustss }
1413 1.5 augustss
1414 1.10 augustss /*
1415 1.10 augustss * Remove an ED from the schedule. Called at splusb().
1416 1.10 augustss */
1417 1.10 augustss void
1418 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1419 1.10 augustss {
1420 1.33 augustss ehci_soft_qh_t *p;
1421 1.10 augustss
1422 1.10 augustss SPLUSBCHECK;
1423 1.10 augustss /* XXX */
1424 1.42 augustss for (p = head; p != NULL && p->next != sqh; p = p->next)
1425 1.10 augustss ;
1426 1.10 augustss if (p == NULL)
1427 1.37 provos panic("ehci_rem_qh: ED not found");
1428 1.10 augustss p->next = sqh->next;
1429 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
1430 1.10 augustss
1431 1.11 augustss ehci_sync_hc(sc);
1432 1.11 augustss }
1433 1.11 augustss
1434 1.23 augustss void
1435 1.23 augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1436 1.23 augustss {
1437 1.23 augustss /* Halt while we are messing. */
1438 1.23 augustss sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1439 1.23 augustss sqh->qh.qh_curqtd = 0;
1440 1.23 augustss sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1441 1.23 augustss sqh->sqtd = sqtd;
1442 1.64 mycroft /* Clear halt */
1443 1.64 mycroft sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED);
1444 1.23 augustss }
1445 1.23 augustss
1446 1.11 augustss /*
1447 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
1448 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
1449 1.11 augustss * the interrupt.
1450 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
1451 1.11 augustss */
1452 1.11 augustss void
1453 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
1454 1.11 augustss {
1455 1.15 augustss int s, error;
1456 1.11 augustss
1457 1.12 augustss if (sc->sc_dying) {
1458 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
1459 1.12 augustss return;
1460 1.12 augustss }
1461 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
1462 1.76 augustss usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1463 1.10 augustss s = splhardusb();
1464 1.10 augustss /* ask for doorbell */
1465 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1466 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1467 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1468 1.15 augustss error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1469 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1470 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1471 1.10 augustss splx(s);
1472 1.76 augustss usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1473 1.15 augustss #ifdef DIAGNOSTIC
1474 1.15 augustss if (error)
1475 1.15 augustss printf("ehci_sync_hc: tsleep() = %d\n", error);
1476 1.15 augustss #endif
1477 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1478 1.10 augustss }
1479 1.10 augustss
1480 1.5 augustss /***********/
1481 1.5 augustss
1482 1.5 augustss /*
1483 1.5 augustss * Data structures and routines to emulate the root hub.
1484 1.5 augustss */
1485 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1486 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1487 1.5 augustss UDESC_DEVICE, /* type */
1488 1.5 augustss {0x00, 0x02}, /* USB version */
1489 1.5 augustss UDCLASS_HUB, /* class */
1490 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1491 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1492 1.5 augustss 64, /* max packet */
1493 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1494 1.5 augustss 1,2,0, /* string indicies */
1495 1.5 augustss 1 /* # of configurations */
1496 1.5 augustss };
1497 1.5 augustss
1498 1.11 augustss Static usb_device_qualifier_t ehci_odevd = {
1499 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1500 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1501 1.11 augustss {0x00, 0x02}, /* USB version */
1502 1.11 augustss UDCLASS_HUB, /* class */
1503 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1504 1.11 augustss UDPROTO_FSHUB, /* protocol */
1505 1.11 augustss 64, /* max packet */
1506 1.11 augustss 1, /* # of configurations */
1507 1.11 augustss 0
1508 1.11 augustss };
1509 1.11 augustss
1510 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1511 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1512 1.5 augustss UDESC_CONFIG,
1513 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1514 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1515 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1516 1.5 augustss 1,
1517 1.5 augustss 1,
1518 1.5 augustss 0,
1519 1.5 augustss UC_SELF_POWERED,
1520 1.5 augustss 0 /* max power */
1521 1.5 augustss };
1522 1.5 augustss
1523 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1524 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1525 1.5 augustss UDESC_INTERFACE,
1526 1.5 augustss 0,
1527 1.5 augustss 0,
1528 1.5 augustss 1,
1529 1.5 augustss UICLASS_HUB,
1530 1.5 augustss UISUBCLASS_HUB,
1531 1.11 augustss UIPROTO_HSHUBSTT,
1532 1.5 augustss 0
1533 1.5 augustss };
1534 1.5 augustss
1535 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1536 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1537 1.5 augustss UDESC_ENDPOINT,
1538 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1539 1.5 augustss UE_INTERRUPT,
1540 1.5 augustss {8, 0}, /* max packet */
1541 1.5 augustss 255
1542 1.5 augustss };
1543 1.5 augustss
1544 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1545 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1546 1.5 augustss UDESC_HUB,
1547 1.5 augustss 0,
1548 1.5 augustss {0,0},
1549 1.5 augustss 0,
1550 1.5 augustss 0,
1551 1.5 augustss {0},
1552 1.5 augustss };
1553 1.5 augustss
1554 1.5 augustss Static int
1555 1.71 augustss ehci_str(usb_string_descriptor_t *p, int l, char *s)
1556 1.5 augustss {
1557 1.5 augustss int i;
1558 1.5 augustss
1559 1.5 augustss if (l == 0)
1560 1.5 augustss return (0);
1561 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1562 1.5 augustss if (l == 1)
1563 1.5 augustss return (1);
1564 1.5 augustss p->bDescriptorType = UDESC_STRING;
1565 1.5 augustss l -= 2;
1566 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1567 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1568 1.5 augustss return (2*i+2);
1569 1.5 augustss }
1570 1.5 augustss
1571 1.5 augustss /*
1572 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1573 1.5 augustss */
1574 1.5 augustss Static usbd_status
1575 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1576 1.5 augustss {
1577 1.5 augustss usbd_status err;
1578 1.5 augustss
1579 1.5 augustss /* Insert last in queue. */
1580 1.5 augustss err = usb_insert_transfer(xfer);
1581 1.5 augustss if (err)
1582 1.5 augustss return (err);
1583 1.5 augustss
1584 1.5 augustss /* Pipe isn't running, start first */
1585 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1586 1.5 augustss }
1587 1.5 augustss
1588 1.5 augustss Static usbd_status
1589 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1590 1.5 augustss {
1591 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1592 1.5 augustss usb_device_request_t *req;
1593 1.5 augustss void *buf = NULL;
1594 1.5 augustss int port, i;
1595 1.5 augustss int s, len, value, index, l, totlen = 0;
1596 1.5 augustss usb_port_status_t ps;
1597 1.5 augustss usb_hub_descriptor_t hubd;
1598 1.5 augustss usbd_status err;
1599 1.5 augustss u_int32_t v;
1600 1.5 augustss
1601 1.5 augustss if (sc->sc_dying)
1602 1.5 augustss return (USBD_IOERROR);
1603 1.5 augustss
1604 1.5 augustss #ifdef DIAGNOSTIC
1605 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1606 1.5 augustss /* XXX panic */
1607 1.5 augustss return (USBD_INVAL);
1608 1.5 augustss #endif
1609 1.5 augustss req = &xfer->request;
1610 1.5 augustss
1611 1.72 augustss DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1612 1.5 augustss req->bmRequestType, req->bRequest));
1613 1.5 augustss
1614 1.5 augustss len = UGETW(req->wLength);
1615 1.5 augustss value = UGETW(req->wValue);
1616 1.5 augustss index = UGETW(req->wIndex);
1617 1.5 augustss
1618 1.5 augustss if (len != 0)
1619 1.30 augustss buf = KERNADDR(&xfer->dmabuf, 0);
1620 1.5 augustss
1621 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1622 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1623 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1624 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1625 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1626 1.33 augustss /*
1627 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1628 1.5 augustss * for the integrated root hub.
1629 1.5 augustss */
1630 1.5 augustss break;
1631 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1632 1.5 augustss if (len > 0) {
1633 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1634 1.5 augustss totlen = 1;
1635 1.5 augustss }
1636 1.5 augustss break;
1637 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1638 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1639 1.5 augustss switch(value >> 8) {
1640 1.5 augustss case UDESC_DEVICE:
1641 1.5 augustss if ((value & 0xff) != 0) {
1642 1.5 augustss err = USBD_IOERROR;
1643 1.5 augustss goto ret;
1644 1.5 augustss }
1645 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1646 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1647 1.5 augustss memcpy(buf, &ehci_devd, l);
1648 1.5 augustss break;
1649 1.33 augustss /*
1650 1.11 augustss * We can't really operate at another speed, but the spec says
1651 1.11 augustss * we need this descriptor.
1652 1.11 augustss */
1653 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1654 1.11 augustss if ((value & 0xff) != 0) {
1655 1.11 augustss err = USBD_IOERROR;
1656 1.11 augustss goto ret;
1657 1.11 augustss }
1658 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1659 1.11 augustss memcpy(buf, &ehci_odevd, l);
1660 1.11 augustss break;
1661 1.33 augustss /*
1662 1.11 augustss * We can't really operate at another speed, but the spec says
1663 1.11 augustss * we need this descriptor.
1664 1.11 augustss */
1665 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1666 1.5 augustss case UDESC_CONFIG:
1667 1.5 augustss if ((value & 0xff) != 0) {
1668 1.5 augustss err = USBD_IOERROR;
1669 1.5 augustss goto ret;
1670 1.5 augustss }
1671 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1672 1.5 augustss memcpy(buf, &ehci_confd, l);
1673 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1674 1.11 augustss value >> 8;
1675 1.5 augustss buf = (char *)buf + l;
1676 1.5 augustss len -= l;
1677 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1678 1.5 augustss totlen += l;
1679 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1680 1.5 augustss buf = (char *)buf + l;
1681 1.5 augustss len -= l;
1682 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1683 1.5 augustss totlen += l;
1684 1.5 augustss memcpy(buf, &ehci_endpd, l);
1685 1.5 augustss break;
1686 1.5 augustss case UDESC_STRING:
1687 1.5 augustss if (len == 0)
1688 1.5 augustss break;
1689 1.5 augustss *(u_int8_t *)buf = 0;
1690 1.5 augustss totlen = 1;
1691 1.5 augustss switch (value & 0xff) {
1692 1.5 augustss case 1: /* Vendor */
1693 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1694 1.5 augustss break;
1695 1.5 augustss case 2: /* Product */
1696 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1697 1.5 augustss break;
1698 1.5 augustss }
1699 1.5 augustss break;
1700 1.5 augustss default:
1701 1.5 augustss err = USBD_IOERROR;
1702 1.5 augustss goto ret;
1703 1.5 augustss }
1704 1.5 augustss break;
1705 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1706 1.5 augustss if (len > 0) {
1707 1.5 augustss *(u_int8_t *)buf = 0;
1708 1.5 augustss totlen = 1;
1709 1.5 augustss }
1710 1.5 augustss break;
1711 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1712 1.5 augustss if (len > 1) {
1713 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1714 1.5 augustss totlen = 2;
1715 1.5 augustss }
1716 1.5 augustss break;
1717 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1718 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1719 1.5 augustss if (len > 1) {
1720 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1721 1.5 augustss totlen = 2;
1722 1.5 augustss }
1723 1.5 augustss break;
1724 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1725 1.5 augustss if (value >= USB_MAX_DEVICES) {
1726 1.5 augustss err = USBD_IOERROR;
1727 1.5 augustss goto ret;
1728 1.5 augustss }
1729 1.5 augustss sc->sc_addr = value;
1730 1.5 augustss break;
1731 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1732 1.5 augustss if (value != 0 && value != 1) {
1733 1.5 augustss err = USBD_IOERROR;
1734 1.5 augustss goto ret;
1735 1.5 augustss }
1736 1.5 augustss sc->sc_conf = value;
1737 1.5 augustss break;
1738 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1739 1.5 augustss break;
1740 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1741 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1742 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1743 1.5 augustss err = USBD_IOERROR;
1744 1.5 augustss goto ret;
1745 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1746 1.5 augustss break;
1747 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1748 1.5 augustss break;
1749 1.5 augustss /* Hub requests */
1750 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1751 1.5 augustss break;
1752 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1753 1.72 augustss DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1754 1.5 augustss "port=%d feature=%d\n",
1755 1.5 augustss index, value));
1756 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1757 1.5 augustss err = USBD_IOERROR;
1758 1.5 augustss goto ret;
1759 1.5 augustss }
1760 1.5 augustss port = EHCI_PORTSC(index);
1761 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1762 1.5 augustss switch(value) {
1763 1.5 augustss case UHF_PORT_ENABLE:
1764 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1765 1.5 augustss break;
1766 1.5 augustss case UHF_PORT_SUSPEND:
1767 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1768 1.5 augustss break;
1769 1.5 augustss case UHF_PORT_POWER:
1770 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1771 1.5 augustss break;
1772 1.14 augustss case UHF_PORT_TEST:
1773 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1774 1.14 augustss "%d\n", index));
1775 1.14 augustss break;
1776 1.14 augustss case UHF_PORT_INDICATOR:
1777 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1778 1.14 augustss "%d\n", index));
1779 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1780 1.14 augustss break;
1781 1.5 augustss case UHF_C_PORT_CONNECTION:
1782 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1783 1.5 augustss break;
1784 1.5 augustss case UHF_C_PORT_ENABLE:
1785 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1786 1.5 augustss break;
1787 1.5 augustss case UHF_C_PORT_SUSPEND:
1788 1.5 augustss /* how? */
1789 1.5 augustss break;
1790 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1791 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1792 1.5 augustss break;
1793 1.5 augustss case UHF_C_PORT_RESET:
1794 1.6 augustss sc->sc_isreset = 0;
1795 1.5 augustss break;
1796 1.5 augustss default:
1797 1.5 augustss err = USBD_IOERROR;
1798 1.5 augustss goto ret;
1799 1.5 augustss }
1800 1.5 augustss #if 0
1801 1.5 augustss switch(value) {
1802 1.5 augustss case UHF_C_PORT_CONNECTION:
1803 1.5 augustss case UHF_C_PORT_ENABLE:
1804 1.5 augustss case UHF_C_PORT_SUSPEND:
1805 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1806 1.5 augustss case UHF_C_PORT_RESET:
1807 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1808 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1809 1.6 augustss ehci_pcd_able(sc, 1);
1810 1.5 augustss break;
1811 1.5 augustss default:
1812 1.5 augustss break;
1813 1.5 augustss }
1814 1.5 augustss #endif
1815 1.5 augustss break;
1816 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1817 1.51 toshii if ((value & 0xff) != 0) {
1818 1.5 augustss err = USBD_IOERROR;
1819 1.5 augustss goto ret;
1820 1.5 augustss }
1821 1.5 augustss hubd = ehci_hubd;
1822 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1823 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1824 1.5 augustss USETW(hubd.wHubCharacteristics,
1825 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1826 1.78 augustss EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1827 1.14 augustss ? UHD_PORT_IND : 0);
1828 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1829 1.33 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1830 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1831 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1832 1.5 augustss l = min(len, hubd.bDescLength);
1833 1.5 augustss totlen = l;
1834 1.5 augustss memcpy(buf, &hubd, l);
1835 1.5 augustss break;
1836 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1837 1.5 augustss if (len != 4) {
1838 1.5 augustss err = USBD_IOERROR;
1839 1.5 augustss goto ret;
1840 1.5 augustss }
1841 1.5 augustss memset(buf, 0, len); /* ? XXX */
1842 1.5 augustss totlen = len;
1843 1.5 augustss break;
1844 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1845 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1846 1.5 augustss index));
1847 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1848 1.5 augustss err = USBD_IOERROR;
1849 1.5 augustss goto ret;
1850 1.5 augustss }
1851 1.5 augustss if (len != 4) {
1852 1.5 augustss err = USBD_IOERROR;
1853 1.5 augustss goto ret;
1854 1.5 augustss }
1855 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1856 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
1857 1.5 augustss v));
1858 1.11 augustss i = UPS_HIGH_SPEED;
1859 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1860 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1861 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1862 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1863 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1864 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1865 1.5 augustss USETW(ps.wPortStatus, i);
1866 1.5 augustss i = 0;
1867 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1868 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1869 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1870 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1871 1.5 augustss USETW(ps.wPortChange, i);
1872 1.5 augustss l = min(len, sizeof ps);
1873 1.5 augustss memcpy(buf, &ps, l);
1874 1.5 augustss totlen = l;
1875 1.5 augustss break;
1876 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1877 1.5 augustss err = USBD_IOERROR;
1878 1.5 augustss goto ret;
1879 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1880 1.5 augustss break;
1881 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1882 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1883 1.5 augustss err = USBD_IOERROR;
1884 1.5 augustss goto ret;
1885 1.5 augustss }
1886 1.5 augustss port = EHCI_PORTSC(index);
1887 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1888 1.5 augustss switch(value) {
1889 1.5 augustss case UHF_PORT_ENABLE:
1890 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1891 1.5 augustss break;
1892 1.5 augustss case UHF_PORT_SUSPEND:
1893 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1894 1.5 augustss break;
1895 1.5 augustss case UHF_PORT_RESET:
1896 1.72 augustss DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1897 1.5 augustss index));
1898 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1899 1.6 augustss /* Low speed device, give up ownership. */
1900 1.6 augustss ehci_disown(sc, index, 1);
1901 1.6 augustss break;
1902 1.6 augustss }
1903 1.8 augustss /* Start reset sequence. */
1904 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1905 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1906 1.8 augustss /* Wait for reset to complete. */
1907 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1908 1.17 augustss if (sc->sc_dying) {
1909 1.17 augustss err = USBD_IOERROR;
1910 1.17 augustss goto ret;
1911 1.17 augustss }
1912 1.8 augustss /* Terminate reset sequence. */
1913 1.8 augustss EOWRITE4(sc, port, v);
1914 1.8 augustss /* Wait for HC to complete reset. */
1915 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1916 1.17 augustss if (sc->sc_dying) {
1917 1.17 augustss err = USBD_IOERROR;
1918 1.17 augustss goto ret;
1919 1.17 augustss }
1920 1.8 augustss v = EOREAD4(sc, port);
1921 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1922 1.8 augustss if (v & EHCI_PS_PR) {
1923 1.8 augustss printf("%s: port reset timeout\n",
1924 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1925 1.8 augustss return (USBD_TIMEOUT);
1926 1.5 augustss }
1927 1.8 augustss if (!(v & EHCI_PS_PE)) {
1928 1.6 augustss /* Not a high speed device, give up ownership.*/
1929 1.6 augustss ehci_disown(sc, index, 0);
1930 1.6 augustss break;
1931 1.6 augustss }
1932 1.6 augustss sc->sc_isreset = 1;
1933 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1934 1.6 augustss index, v));
1935 1.5 augustss break;
1936 1.5 augustss case UHF_PORT_POWER:
1937 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1938 1.5 augustss "%d\n", index));
1939 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1940 1.5 augustss break;
1941 1.11 augustss case UHF_PORT_TEST:
1942 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1943 1.11 augustss "%d\n", index));
1944 1.11 augustss break;
1945 1.11 augustss case UHF_PORT_INDICATOR:
1946 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1947 1.11 augustss "%d\n", index));
1948 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
1949 1.11 augustss break;
1950 1.5 augustss default:
1951 1.5 augustss err = USBD_IOERROR;
1952 1.5 augustss goto ret;
1953 1.5 augustss }
1954 1.5 augustss break;
1955 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1956 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1957 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1958 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1959 1.11 augustss break;
1960 1.5 augustss default:
1961 1.5 augustss err = USBD_IOERROR;
1962 1.5 augustss goto ret;
1963 1.5 augustss }
1964 1.5 augustss xfer->actlen = totlen;
1965 1.5 augustss err = USBD_NORMAL_COMPLETION;
1966 1.5 augustss ret:
1967 1.5 augustss xfer->status = err;
1968 1.5 augustss s = splusb();
1969 1.5 augustss usb_transfer_complete(xfer);
1970 1.5 augustss splx(s);
1971 1.5 augustss return (USBD_IN_PROGRESS);
1972 1.6 augustss }
1973 1.6 augustss
1974 1.6 augustss void
1975 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1976 1.6 augustss {
1977 1.24 augustss int port;
1978 1.6 augustss u_int32_t v;
1979 1.6 augustss
1980 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1981 1.6 augustss #ifdef DIAGNOSTIC
1982 1.6 augustss if (sc->sc_npcomp != 0) {
1983 1.24 augustss int i = (index-1) / sc->sc_npcomp;
1984 1.6 augustss if (i >= sc->sc_ncomp)
1985 1.6 augustss printf("%s: strange port\n",
1986 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1987 1.6 augustss else
1988 1.6 augustss printf("%s: handing over %s speed device on "
1989 1.6 augustss "port %d to %s\n",
1990 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1991 1.6 augustss lowspeed ? "low" : "full",
1992 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1993 1.6 augustss } else {
1994 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1995 1.6 augustss }
1996 1.6 augustss #endif
1997 1.6 augustss port = EHCI_PORTSC(index);
1998 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1999 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
2000 1.5 augustss }
2001 1.5 augustss
2002 1.5 augustss /* Abort a root control request. */
2003 1.5 augustss Static void
2004 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
2005 1.5 augustss {
2006 1.5 augustss /* Nothing to do, all transfers are synchronous. */
2007 1.5 augustss }
2008 1.5 augustss
2009 1.5 augustss /* Close the root pipe. */
2010 1.5 augustss Static void
2011 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
2012 1.5 augustss {
2013 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
2014 1.5 augustss /* Nothing to do. */
2015 1.5 augustss }
2016 1.5 augustss
2017 1.5 augustss void
2018 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
2019 1.5 augustss {
2020 1.78 augustss xfer->hcpriv = NULL;
2021 1.5 augustss }
2022 1.5 augustss
2023 1.5 augustss Static usbd_status
2024 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
2025 1.5 augustss {
2026 1.5 augustss usbd_status err;
2027 1.5 augustss
2028 1.5 augustss /* Insert last in queue. */
2029 1.5 augustss err = usb_insert_transfer(xfer);
2030 1.5 augustss if (err)
2031 1.5 augustss return (err);
2032 1.5 augustss
2033 1.5 augustss /* Pipe isn't running, start first */
2034 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2035 1.5 augustss }
2036 1.5 augustss
2037 1.5 augustss Static usbd_status
2038 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
2039 1.5 augustss {
2040 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
2041 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2042 1.5 augustss
2043 1.5 augustss if (sc->sc_dying)
2044 1.5 augustss return (USBD_IOERROR);
2045 1.5 augustss
2046 1.5 augustss sc->sc_intrxfer = xfer;
2047 1.5 augustss
2048 1.5 augustss return (USBD_IN_PROGRESS);
2049 1.5 augustss }
2050 1.5 augustss
2051 1.5 augustss /* Abort a root interrupt request. */
2052 1.5 augustss Static void
2053 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
2054 1.5 augustss {
2055 1.5 augustss int s;
2056 1.5 augustss
2057 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
2058 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
2059 1.5 augustss xfer->pipe->intrxfer = NULL;
2060 1.5 augustss }
2061 1.5 augustss xfer->status = USBD_CANCELLED;
2062 1.5 augustss s = splusb();
2063 1.5 augustss usb_transfer_complete(xfer);
2064 1.5 augustss splx(s);
2065 1.5 augustss }
2066 1.5 augustss
2067 1.5 augustss /* Close the root pipe. */
2068 1.5 augustss Static void
2069 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
2070 1.5 augustss {
2071 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2072 1.33 augustss
2073 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
2074 1.5 augustss
2075 1.5 augustss sc->sc_intrxfer = NULL;
2076 1.5 augustss }
2077 1.5 augustss
2078 1.5 augustss void
2079 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
2080 1.5 augustss {
2081 1.78 augustss xfer->hcpriv = NULL;
2082 1.9 augustss }
2083 1.9 augustss
2084 1.9 augustss /************************/
2085 1.9 augustss
2086 1.9 augustss ehci_soft_qh_t *
2087 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
2088 1.9 augustss {
2089 1.9 augustss ehci_soft_qh_t *sqh;
2090 1.9 augustss usbd_status err;
2091 1.9 augustss int i, offs;
2092 1.9 augustss usb_dma_t dma;
2093 1.9 augustss
2094 1.9 augustss if (sc->sc_freeqhs == NULL) {
2095 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2096 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2097 1.9 augustss EHCI_PAGE_SIZE, &dma);
2098 1.25 augustss #ifdef EHCI_DEBUG
2099 1.25 augustss if (err)
2100 1.25 augustss printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2101 1.25 augustss #endif
2102 1.9 augustss if (err)
2103 1.11 augustss return (NULL);
2104 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2105 1.9 augustss offs = i * EHCI_SQH_SIZE;
2106 1.30 augustss sqh = KERNADDR(&dma, offs);
2107 1.31 augustss sqh->physaddr = DMAADDR(&dma, offs);
2108 1.9 augustss sqh->next = sc->sc_freeqhs;
2109 1.9 augustss sc->sc_freeqhs = sqh;
2110 1.9 augustss }
2111 1.9 augustss }
2112 1.9 augustss sqh = sc->sc_freeqhs;
2113 1.9 augustss sc->sc_freeqhs = sqh->next;
2114 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2115 1.11 augustss sqh->next = NULL;
2116 1.9 augustss return (sqh);
2117 1.9 augustss }
2118 1.9 augustss
2119 1.9 augustss void
2120 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2121 1.9 augustss {
2122 1.9 augustss sqh->next = sc->sc_freeqhs;
2123 1.9 augustss sc->sc_freeqhs = sqh;
2124 1.9 augustss }
2125 1.9 augustss
2126 1.9 augustss ehci_soft_qtd_t *
2127 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
2128 1.9 augustss {
2129 1.9 augustss ehci_soft_qtd_t *sqtd;
2130 1.9 augustss usbd_status err;
2131 1.9 augustss int i, offs;
2132 1.9 augustss usb_dma_t dma;
2133 1.9 augustss int s;
2134 1.9 augustss
2135 1.9 augustss if (sc->sc_freeqtds == NULL) {
2136 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2137 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2138 1.9 augustss EHCI_PAGE_SIZE, &dma);
2139 1.25 augustss #ifdef EHCI_DEBUG
2140 1.25 augustss if (err)
2141 1.25 augustss printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2142 1.25 augustss #endif
2143 1.9 augustss if (err)
2144 1.9 augustss return (NULL);
2145 1.9 augustss s = splusb();
2146 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2147 1.9 augustss offs = i * EHCI_SQTD_SIZE;
2148 1.30 augustss sqtd = KERNADDR(&dma, offs);
2149 1.31 augustss sqtd->physaddr = DMAADDR(&dma, offs);
2150 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2151 1.9 augustss sc->sc_freeqtds = sqtd;
2152 1.9 augustss }
2153 1.9 augustss splx(s);
2154 1.9 augustss }
2155 1.9 augustss
2156 1.9 augustss s = splusb();
2157 1.9 augustss sqtd = sc->sc_freeqtds;
2158 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
2159 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2160 1.9 augustss sqtd->nextqtd = NULL;
2161 1.9 augustss sqtd->xfer = NULL;
2162 1.9 augustss splx(s);
2163 1.9 augustss
2164 1.9 augustss return (sqtd);
2165 1.9 augustss }
2166 1.9 augustss
2167 1.9 augustss void
2168 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2169 1.9 augustss {
2170 1.9 augustss int s;
2171 1.9 augustss
2172 1.9 augustss s = splusb();
2173 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2174 1.9 augustss sc->sc_freeqtds = sqtd;
2175 1.9 augustss splx(s);
2176 1.9 augustss }
2177 1.9 augustss
2178 1.15 augustss usbd_status
2179 1.25 augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2180 1.15 augustss int alen, int rd, usbd_xfer_handle xfer,
2181 1.15 augustss ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2182 1.15 augustss {
2183 1.15 augustss ehci_soft_qtd_t *next, *cur;
2184 1.22 augustss ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2185 1.15 augustss u_int32_t qtdstatus;
2186 1.55 mycroft int len, curlen, mps;
2187 1.55 mycroft int i, tog;
2188 1.15 augustss usb_dma_t *dma = &xfer->dmabuf;
2189 1.15 augustss
2190 1.25 augustss DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2191 1.15 augustss
2192 1.15 augustss len = alen;
2193 1.31 augustss dataphys = DMAADDR(dma, 0);
2194 1.22 augustss dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2195 1.55 mycroft #if 0
2196 1.55 mycroft printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status,
2197 1.55 mycroft epipe->nexttoggle);
2198 1.55 mycroft #endif
2199 1.67 mycroft qtdstatus = EHCI_QTD_ACTIVE |
2200 1.15 augustss EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2201 1.15 augustss EHCI_QTD_SET_CERR(3)
2202 1.15 augustss /* IOC set below */
2203 1.15 augustss /* BYTES set below */
2204 1.67 mycroft ;
2205 1.55 mycroft mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2206 1.55 mycroft tog = epipe->nexttoggle;
2207 1.64 mycroft qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
2208 1.15 augustss
2209 1.15 augustss cur = ehci_alloc_sqtd(sc);
2210 1.25 augustss *sp = cur;
2211 1.15 augustss if (cur == NULL)
2212 1.15 augustss goto nomem;
2213 1.15 augustss for (;;) {
2214 1.22 augustss dataphyspage = EHCI_PAGE(dataphys);
2215 1.26 augustss /* The EHCI hardware can handle at most 5 pages. */
2216 1.33 augustss if (dataphyslastpage - dataphyspage <
2217 1.26 augustss EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2218 1.15 augustss /* we can handle it in this QTD */
2219 1.15 augustss curlen = len;
2220 1.15 augustss } else {
2221 1.15 augustss /* must use multiple TDs, fill as much as possible. */
2222 1.33 augustss curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2223 1.22 augustss EHCI_PAGE_OFFSET(dataphys);
2224 1.25 augustss #ifdef DIAGNOSTIC
2225 1.25 augustss if (curlen > len) {
2226 1.26 augustss printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2227 1.26 augustss "len=0x%x offs=0x%x\n", curlen, len,
2228 1.26 augustss EHCI_PAGE_OFFSET(dataphys));
2229 1.26 augustss printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2230 1.26 augustss dataphyslastpage, dataphyspage,
2231 1.26 augustss dataphys);
2232 1.25 augustss curlen = len;
2233 1.25 augustss }
2234 1.25 augustss #endif
2235 1.15 augustss /* the length must be a multiple of the max size */
2236 1.55 mycroft curlen -= curlen % mps;
2237 1.25 augustss DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2238 1.25 augustss "curlen=%d\n", curlen));
2239 1.15 augustss #ifdef DIAGNOSTIC
2240 1.15 augustss if (curlen == 0)
2241 1.37 provos panic("ehci_alloc_std: curlen == 0");
2242 1.15 augustss #endif
2243 1.15 augustss }
2244 1.25 augustss DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2245 1.22 augustss "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2246 1.22 augustss dataphys, dataphyslastpage,
2247 1.15 augustss len, curlen));
2248 1.15 augustss len -= curlen;
2249 1.15 augustss
2250 1.15 augustss if (len != 0) {
2251 1.15 augustss next = ehci_alloc_sqtd(sc);
2252 1.15 augustss if (next == NULL)
2253 1.15 augustss goto nomem;
2254 1.66 mycroft nextphys = htole32(next->physaddr);
2255 1.15 augustss } else {
2256 1.15 augustss next = NULL;
2257 1.15 augustss nextphys = EHCI_NULL;
2258 1.15 augustss }
2259 1.15 augustss
2260 1.15 augustss for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2261 1.15 augustss ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2262 1.15 augustss if (i != 0) /* use offset only in first buffer */
2263 1.15 augustss a = EHCI_PAGE(a);
2264 1.15 augustss cur->qtd.qtd_buffer[i] = htole32(a);
2265 1.48 mycroft cur->qtd.qtd_buffer_hi[i] = 0;
2266 1.25 augustss #ifdef DIAGNOSTIC
2267 1.25 augustss if (i >= EHCI_QTD_NBUFFERS) {
2268 1.25 augustss printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2269 1.25 augustss goto nomem;
2270 1.25 augustss }
2271 1.25 augustss #endif
2272 1.15 augustss }
2273 1.15 augustss cur->nextqtd = next;
2274 1.66 mycroft cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2275 1.15 augustss cur->qtd.qtd_status =
2276 1.67 mycroft htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2277 1.15 augustss cur->xfer = xfer;
2278 1.18 augustss cur->len = curlen;
2279 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2280 1.29 augustss dataphys, dataphys + curlen));
2281 1.55 mycroft /* adjust the toggle based on the number of packets in this
2282 1.55 mycroft qtd */
2283 1.55 mycroft if (((curlen + mps - 1) / mps) & 1) {
2284 1.55 mycroft tog ^= 1;
2285 1.64 mycroft qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2286 1.55 mycroft }
2287 1.15 augustss if (len == 0)
2288 1.15 augustss break;
2289 1.25 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2290 1.15 augustss dataphys += curlen;
2291 1.15 augustss cur = next;
2292 1.15 augustss }
2293 1.15 augustss cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2294 1.15 augustss *ep = cur;
2295 1.55 mycroft epipe->nexttoggle = tog;
2296 1.15 augustss
2297 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2298 1.29 augustss *sp, *ep));
2299 1.29 augustss
2300 1.15 augustss return (USBD_NORMAL_COMPLETION);
2301 1.15 augustss
2302 1.15 augustss nomem:
2303 1.15 augustss /* XXX free chain */
2304 1.25 augustss DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2305 1.15 augustss return (USBD_NOMEM);
2306 1.15 augustss }
2307 1.15 augustss
2308 1.18 augustss Static void
2309 1.25 augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2310 1.18 augustss ehci_soft_qtd_t *sqtdend)
2311 1.18 augustss {
2312 1.18 augustss ehci_soft_qtd_t *p;
2313 1.25 augustss int i;
2314 1.18 augustss
2315 1.29 augustss DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2316 1.29 augustss sqtd, sqtdend));
2317 1.29 augustss
2318 1.25 augustss for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2319 1.18 augustss p = sqtd->nextqtd;
2320 1.18 augustss ehci_free_sqtd(sc, sqtd);
2321 1.18 augustss }
2322 1.18 augustss }
2323 1.18 augustss
2324 1.15 augustss /****************/
2325 1.15 augustss
2326 1.9 augustss /*
2327 1.10 augustss * Close a reqular pipe.
2328 1.10 augustss * Assumes that there are no pending transactions.
2329 1.10 augustss */
2330 1.10 augustss void
2331 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2332 1.10 augustss {
2333 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2334 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2335 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2336 1.10 augustss int s;
2337 1.10 augustss
2338 1.10 augustss s = splusb();
2339 1.10 augustss ehci_rem_qh(sc, sqh, head);
2340 1.10 augustss splx(s);
2341 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
2342 1.10 augustss }
2343 1.10 augustss
2344 1.33 augustss /*
2345 1.10 augustss * Abort a device request.
2346 1.10 augustss * If this routine is called at splusb() it guarantees that the request
2347 1.10 augustss * will be removed from the hardware scheduling and that the callback
2348 1.10 augustss * for it will be called with USBD_CANCELLED status.
2349 1.10 augustss * It's impossible to guarantee that the requested transfer will not
2350 1.10 augustss * have happened since the hardware runs concurrently.
2351 1.10 augustss * If the transaction has already happened we rely on the ordinary
2352 1.10 augustss * interrupt processing to process it.
2353 1.26 augustss * XXX This is most probably wrong.
2354 1.10 augustss */
2355 1.10 augustss void
2356 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2357 1.10 augustss {
2358 1.26 augustss #define exfer EXFER(xfer)
2359 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2360 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2361 1.26 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2362 1.26 augustss ehci_soft_qtd_t *sqtd;
2363 1.26 augustss ehci_physaddr_t cur;
2364 1.26 augustss u_int32_t qhstatus;
2365 1.11 augustss int s;
2366 1.26 augustss int hit;
2367 1.10 augustss
2368 1.24 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2369 1.10 augustss
2370 1.17 augustss if (sc->sc_dying) {
2371 1.17 augustss /* If we're dying, just do the software part. */
2372 1.17 augustss s = splusb();
2373 1.17 augustss xfer->status = status; /* make software ignore it */
2374 1.17 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2375 1.17 augustss usb_transfer_complete(xfer);
2376 1.17 augustss splx(s);
2377 1.17 augustss return;
2378 1.17 augustss }
2379 1.17 augustss
2380 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
2381 1.37 provos panic("ehci_abort_xfer: not in process context");
2382 1.10 augustss
2383 1.11 augustss /*
2384 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2385 1.11 augustss */
2386 1.11 augustss s = splusb();
2387 1.11 augustss xfer->status = status; /* make software ignore it */
2388 1.15 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2389 1.26 augustss qhstatus = sqh->qh.qh_qtd.qtd_status;
2390 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2391 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2392 1.26 augustss sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2393 1.26 augustss if (sqtd == exfer->sqtdend)
2394 1.26 augustss break;
2395 1.26 augustss }
2396 1.11 augustss splx(s);
2397 1.11 augustss
2398 1.33 augustss /*
2399 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
2400 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
2401 1.11 augustss * has run.
2402 1.11 augustss */
2403 1.26 augustss ehci_sync_hc(sc);
2404 1.29 augustss s = splusb();
2405 1.77 augustss #ifdef USB_USE_SOFTINTR
2406 1.29 augustss sc->sc_softwake = 1;
2407 1.77 augustss #endif /* USB_USE_SOFTINTR */
2408 1.29 augustss usb_schedsoftintr(&sc->sc_bus);
2409 1.77 augustss #ifdef USB_USE_SOFTINTR
2410 1.29 augustss tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2411 1.77 augustss #endif /* USB_USE_SOFTINTR */
2412 1.29 augustss splx(s);
2413 1.33 augustss
2414 1.33 augustss /*
2415 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2416 1.11 augustss * The complication here is that the hardware may have executed
2417 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
2418 1.11 augustss * the TDs of this xfer we check if the hardware points to
2419 1.11 augustss * any of them.
2420 1.11 augustss */
2421 1.11 augustss s = splusb(); /* XXX why? */
2422 1.26 augustss cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2423 1.26 augustss hit = 0;
2424 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2425 1.26 augustss hit |= cur == sqtd->physaddr;
2426 1.26 augustss if (sqtd == exfer->sqtdend)
2427 1.26 augustss break;
2428 1.26 augustss }
2429 1.26 augustss sqtd = sqtd->nextqtd;
2430 1.26 augustss /* Zap curqtd register if hardware pointed inside the xfer. */
2431 1.26 augustss if (hit && sqtd != NULL) {
2432 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2433 1.26 augustss sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2434 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus;
2435 1.26 augustss } else {
2436 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2437 1.26 augustss }
2438 1.11 augustss
2439 1.11 augustss /*
2440 1.26 augustss * Step 4: Execute callback.
2441 1.11 augustss */
2442 1.18 augustss #ifdef DIAGNOSTIC
2443 1.26 augustss exfer->isdone = 1;
2444 1.18 augustss #endif
2445 1.11 augustss usb_transfer_complete(xfer);
2446 1.11 augustss
2447 1.11 augustss splx(s);
2448 1.26 augustss #undef exfer
2449 1.10 augustss }
2450 1.10 augustss
2451 1.15 augustss void
2452 1.15 augustss ehci_timeout(void *addr)
2453 1.15 augustss {
2454 1.15 augustss struct ehci_xfer *exfer = addr;
2455 1.17 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2456 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2457 1.15 augustss
2458 1.15 augustss DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2459 1.22 augustss #ifdef USB_DEBUG
2460 1.26 augustss if (ehcidebug > 1)
2461 1.22 augustss usbd_dump_pipe(exfer->xfer.pipe);
2462 1.22 augustss #endif
2463 1.15 augustss
2464 1.17 augustss if (sc->sc_dying) {
2465 1.17 augustss ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2466 1.17 augustss return;
2467 1.17 augustss }
2468 1.17 augustss
2469 1.15 augustss /* Execute the abort in a process context. */
2470 1.15 augustss usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2471 1.15 augustss usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2472 1.15 augustss }
2473 1.15 augustss
2474 1.15 augustss void
2475 1.15 augustss ehci_timeout_task(void *addr)
2476 1.15 augustss {
2477 1.15 augustss usbd_xfer_handle xfer = addr;
2478 1.15 augustss int s;
2479 1.15 augustss
2480 1.15 augustss DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2481 1.15 augustss
2482 1.15 augustss s = splusb();
2483 1.15 augustss ehci_abort_xfer(xfer, USBD_TIMEOUT);
2484 1.15 augustss splx(s);
2485 1.15 augustss }
2486 1.15 augustss
2487 1.5 augustss /************************/
2488 1.5 augustss
2489 1.10 augustss Static usbd_status
2490 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2491 1.10 augustss {
2492 1.10 augustss usbd_status err;
2493 1.10 augustss
2494 1.10 augustss /* Insert last in queue. */
2495 1.10 augustss err = usb_insert_transfer(xfer);
2496 1.10 augustss if (err)
2497 1.10 augustss return (err);
2498 1.10 augustss
2499 1.10 augustss /* Pipe isn't running, start first */
2500 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2501 1.10 augustss }
2502 1.10 augustss
2503 1.12 augustss Static usbd_status
2504 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
2505 1.12 augustss {
2506 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2507 1.15 augustss usbd_status err;
2508 1.15 augustss
2509 1.15 augustss if (sc->sc_dying)
2510 1.15 augustss return (USBD_IOERROR);
2511 1.15 augustss
2512 1.15 augustss #ifdef DIAGNOSTIC
2513 1.15 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2514 1.15 augustss /* XXX panic */
2515 1.15 augustss printf("ehci_device_ctrl_transfer: not a request\n");
2516 1.15 augustss return (USBD_INVAL);
2517 1.15 augustss }
2518 1.15 augustss #endif
2519 1.15 augustss
2520 1.15 augustss err = ehci_device_request(xfer);
2521 1.15 augustss if (err)
2522 1.15 augustss return (err);
2523 1.15 augustss
2524 1.15 augustss if (sc->sc_bus.use_polling)
2525 1.15 augustss ehci_waitintr(sc, xfer);
2526 1.15 augustss return (USBD_IN_PROGRESS);
2527 1.12 augustss }
2528 1.10 augustss
2529 1.10 augustss void
2530 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
2531 1.10 augustss {
2532 1.18 augustss struct ehci_xfer *ex = EXFER(xfer);
2533 1.18 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2534 1.25 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2535 1.18 augustss
2536 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2537 1.10 augustss
2538 1.10 augustss #ifdef DIAGNOSTIC
2539 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2540 1.37 provos panic("ehci_ctrl_done: not a request");
2541 1.10 augustss }
2542 1.10 augustss #endif
2543 1.18 augustss
2544 1.44 augustss if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2545 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
2546 1.25 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2547 1.25 augustss }
2548 1.18 augustss
2549 1.25 augustss DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2550 1.10 augustss }
2551 1.10 augustss
2552 1.10 augustss /* Abort a device control request. */
2553 1.10 augustss Static void
2554 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2555 1.10 augustss {
2556 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2557 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2558 1.10 augustss }
2559 1.10 augustss
2560 1.10 augustss /* Close a device control pipe. */
2561 1.10 augustss Static void
2562 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
2563 1.10 augustss {
2564 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2565 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2566 1.10 augustss
2567 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2568 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2569 1.15 augustss }
2570 1.15 augustss
2571 1.15 augustss usbd_status
2572 1.15 augustss ehci_device_request(usbd_xfer_handle xfer)
2573 1.15 augustss {
2574 1.18 augustss #define exfer EXFER(xfer)
2575 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2576 1.15 augustss usb_device_request_t *req = &xfer->request;
2577 1.15 augustss usbd_device_handle dev = epipe->pipe.device;
2578 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2579 1.15 augustss int addr = dev->address;
2580 1.15 augustss ehci_soft_qtd_t *setup, *stat, *next;
2581 1.15 augustss ehci_soft_qh_t *sqh;
2582 1.15 augustss int isread;
2583 1.15 augustss int len;
2584 1.15 augustss usbd_status err;
2585 1.15 augustss int s;
2586 1.15 augustss
2587 1.15 augustss isread = req->bmRequestType & UT_READ;
2588 1.15 augustss len = UGETW(req->wLength);
2589 1.15 augustss
2590 1.72 augustss DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2591 1.15 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2592 1.15 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2593 1.33 augustss UGETW(req->wIndex), len, addr,
2594 1.15 augustss epipe->pipe.endpoint->edesc->bEndpointAddress));
2595 1.15 augustss
2596 1.15 augustss setup = ehci_alloc_sqtd(sc);
2597 1.15 augustss if (setup == NULL) {
2598 1.15 augustss err = USBD_NOMEM;
2599 1.15 augustss goto bad1;
2600 1.15 augustss }
2601 1.15 augustss stat = ehci_alloc_sqtd(sc);
2602 1.15 augustss if (stat == NULL) {
2603 1.15 augustss err = USBD_NOMEM;
2604 1.15 augustss goto bad2;
2605 1.15 augustss }
2606 1.15 augustss
2607 1.15 augustss sqh = epipe->sqh;
2608 1.15 augustss epipe->u.ctl.length = len;
2609 1.15 augustss
2610 1.62 mycroft /* Update device address and length since they may have changed
2611 1.62 mycroft during the setup of the control pipe in usbd_new_device(). */
2612 1.15 augustss /* XXX This only needs to be done once, but it's too early in open. */
2613 1.15 augustss /* XXXX Should not touch ED here! */
2614 1.33 augustss sqh->qh.qh_endp =
2615 1.55 mycroft (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2616 1.15 augustss htole32(
2617 1.15 augustss EHCI_QH_SET_ADDR(addr) |
2618 1.15 augustss EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2619 1.15 augustss );
2620 1.15 augustss
2621 1.15 augustss /* Set up data transaction */
2622 1.15 augustss if (len != 0) {
2623 1.15 augustss ehci_soft_qtd_t *end;
2624 1.15 augustss
2625 1.55 mycroft /* Start toggle at 1. */
2626 1.55 mycroft epipe->nexttoggle = 1;
2627 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2628 1.15 augustss &next, &end);
2629 1.15 augustss if (err)
2630 1.15 augustss goto bad3;
2631 1.15 augustss end->nextqtd = stat;
2632 1.33 augustss end->qtd.qtd_next =
2633 1.15 augustss end->qtd.qtd_altnext = htole32(stat->physaddr);
2634 1.15 augustss } else {
2635 1.15 augustss next = stat;
2636 1.15 augustss }
2637 1.15 augustss
2638 1.30 augustss memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2639 1.15 augustss
2640 1.55 mycroft /* Clear toggle */
2641 1.15 augustss setup->qtd.qtd_status = htole32(
2642 1.26 augustss EHCI_QTD_ACTIVE |
2643 1.15 augustss EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2644 1.15 augustss EHCI_QTD_SET_CERR(3) |
2645 1.64 mycroft EHCI_QTD_SET_TOGGLE(0) |
2646 1.15 augustss EHCI_QTD_SET_BYTES(sizeof *req)
2647 1.15 augustss );
2648 1.31 augustss setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2649 1.48 mycroft setup->qtd.qtd_buffer_hi[0] = 0;
2650 1.15 augustss setup->nextqtd = next;
2651 1.15 augustss setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2652 1.15 augustss setup->xfer = xfer;
2653 1.18 augustss setup->len = sizeof *req;
2654 1.15 augustss
2655 1.15 augustss stat->qtd.qtd_status = htole32(
2656 1.26 augustss EHCI_QTD_ACTIVE |
2657 1.15 augustss EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2658 1.15 augustss EHCI_QTD_SET_CERR(3) |
2659 1.64 mycroft EHCI_QTD_SET_TOGGLE(1) |
2660 1.15 augustss EHCI_QTD_IOC
2661 1.15 augustss );
2662 1.15 augustss stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2663 1.48 mycroft stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2664 1.15 augustss stat->nextqtd = NULL;
2665 1.15 augustss stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2666 1.15 augustss stat->xfer = xfer;
2667 1.18 augustss stat->len = 0;
2668 1.15 augustss
2669 1.15 augustss #ifdef EHCI_DEBUG
2670 1.23 augustss if (ehcidebug > 5) {
2671 1.15 augustss DPRINTF(("ehci_device_request:\n"));
2672 1.15 augustss ehci_dump_sqh(sqh);
2673 1.15 augustss ehci_dump_sqtds(setup);
2674 1.15 augustss }
2675 1.15 augustss #endif
2676 1.15 augustss
2677 1.18 augustss exfer->sqtdstart = setup;
2678 1.18 augustss exfer->sqtdend = stat;
2679 1.18 augustss #ifdef DIAGNOSTIC
2680 1.18 augustss if (!exfer->isdone) {
2681 1.18 augustss printf("ehci_device_request: not done, exfer=%p\n", exfer);
2682 1.18 augustss }
2683 1.18 augustss exfer->isdone = 0;
2684 1.18 augustss #endif
2685 1.18 augustss
2686 1.15 augustss /* Insert qTD in QH list. */
2687 1.15 augustss s = splusb();
2688 1.23 augustss ehci_set_qh_qtd(sqh, setup);
2689 1.15 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2690 1.45 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2691 1.15 augustss ehci_timeout, xfer);
2692 1.15 augustss }
2693 1.18 augustss ehci_add_intr_list(sc, exfer);
2694 1.18 augustss xfer->status = USBD_IN_PROGRESS;
2695 1.15 augustss splx(s);
2696 1.15 augustss
2697 1.17 augustss #ifdef EHCI_DEBUG
2698 1.15 augustss if (ehcidebug > 10) {
2699 1.15 augustss DPRINTF(("ehci_device_request: status=%x\n",
2700 1.15 augustss EOREAD4(sc, EHCI_USBSTS)));
2701 1.23 augustss delay(10000);
2702 1.18 augustss ehci_dump_regs(sc);
2703 1.15 augustss ehci_dump_sqh(sc->sc_async_head);
2704 1.15 augustss ehci_dump_sqh(sqh);
2705 1.15 augustss ehci_dump_sqtds(setup);
2706 1.15 augustss }
2707 1.15 augustss #endif
2708 1.15 augustss
2709 1.15 augustss return (USBD_NORMAL_COMPLETION);
2710 1.15 augustss
2711 1.15 augustss bad3:
2712 1.15 augustss ehci_free_sqtd(sc, stat);
2713 1.15 augustss bad2:
2714 1.15 augustss ehci_free_sqtd(sc, setup);
2715 1.15 augustss bad1:
2716 1.25 augustss DPRINTFN(-1,("ehci_device_request: no memory\n"));
2717 1.25 augustss xfer->status = err;
2718 1.25 augustss usb_transfer_complete(xfer);
2719 1.15 augustss return (err);
2720 1.18 augustss #undef exfer
2721 1.10 augustss }
2722 1.10 augustss
2723 1.10 augustss /************************/
2724 1.5 augustss
2725 1.19 augustss Static usbd_status
2726 1.19 augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2727 1.19 augustss {
2728 1.19 augustss usbd_status err;
2729 1.19 augustss
2730 1.19 augustss /* Insert last in queue. */
2731 1.19 augustss err = usb_insert_transfer(xfer);
2732 1.19 augustss if (err)
2733 1.19 augustss return (err);
2734 1.19 augustss
2735 1.19 augustss /* Pipe isn't running, start first */
2736 1.19 augustss return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2737 1.19 augustss }
2738 1.19 augustss
2739 1.19 augustss usbd_status
2740 1.19 augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
2741 1.19 augustss {
2742 1.19 augustss #define exfer EXFER(xfer)
2743 1.19 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2744 1.19 augustss usbd_device_handle dev = epipe->pipe.device;
2745 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2746 1.19 augustss ehci_soft_qtd_t *data, *dataend;
2747 1.19 augustss ehci_soft_qh_t *sqh;
2748 1.19 augustss usbd_status err;
2749 1.19 augustss int len, isread, endpt;
2750 1.19 augustss int s;
2751 1.19 augustss
2752 1.72 augustss DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2753 1.19 augustss xfer, xfer->length, xfer->flags));
2754 1.19 augustss
2755 1.19 augustss if (sc->sc_dying)
2756 1.19 augustss return (USBD_IOERROR);
2757 1.19 augustss
2758 1.19 augustss #ifdef DIAGNOSTIC
2759 1.19 augustss if (xfer->rqflags & URQ_REQUEST)
2760 1.72 augustss panic("ehci_device_bulk_start: a request");
2761 1.19 augustss #endif
2762 1.19 augustss
2763 1.19 augustss len = xfer->length;
2764 1.19 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2765 1.19 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2766 1.19 augustss sqh = epipe->sqh;
2767 1.19 augustss
2768 1.19 augustss epipe->u.bulk.length = len;
2769 1.19 augustss
2770 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2771 1.19 augustss &dataend);
2772 1.25 augustss if (err) {
2773 1.25 augustss DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2774 1.25 augustss xfer->status = err;
2775 1.25 augustss usb_transfer_complete(xfer);
2776 1.19 augustss return (err);
2777 1.25 augustss }
2778 1.19 augustss
2779 1.19 augustss #ifdef EHCI_DEBUG
2780 1.23 augustss if (ehcidebug > 5) {
2781 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2782 1.23 augustss ehci_dump_sqh(sqh);
2783 1.19 augustss ehci_dump_sqtds(data);
2784 1.19 augustss }
2785 1.19 augustss #endif
2786 1.19 augustss
2787 1.19 augustss /* Set up interrupt info. */
2788 1.19 augustss exfer->sqtdstart = data;
2789 1.19 augustss exfer->sqtdend = dataend;
2790 1.19 augustss #ifdef DIAGNOSTIC
2791 1.19 augustss if (!exfer->isdone) {
2792 1.72 augustss printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2793 1.19 augustss }
2794 1.19 augustss exfer->isdone = 0;
2795 1.19 augustss #endif
2796 1.19 augustss
2797 1.19 augustss s = splusb();
2798 1.23 augustss ehci_set_qh_qtd(sqh, data);
2799 1.19 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2800 1.45 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2801 1.19 augustss ehci_timeout, xfer);
2802 1.19 augustss }
2803 1.19 augustss ehci_add_intr_list(sc, exfer);
2804 1.19 augustss xfer->status = USBD_IN_PROGRESS;
2805 1.19 augustss splx(s);
2806 1.19 augustss
2807 1.19 augustss #ifdef EHCI_DEBUG
2808 1.19 augustss if (ehcidebug > 10) {
2809 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2810 1.23 augustss delay(10000);
2811 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2812 1.23 augustss ehci_dump_regs(sc);
2813 1.29 augustss #if 0
2814 1.29 augustss printf("async_head:\n");
2815 1.23 augustss ehci_dump_sqh(sc->sc_async_head);
2816 1.29 augustss #endif
2817 1.29 augustss printf("sqh:\n");
2818 1.23 augustss ehci_dump_sqh(sqh);
2819 1.19 augustss ehci_dump_sqtds(data);
2820 1.19 augustss }
2821 1.19 augustss #endif
2822 1.19 augustss
2823 1.19 augustss if (sc->sc_bus.use_polling)
2824 1.19 augustss ehci_waitintr(sc, xfer);
2825 1.19 augustss
2826 1.19 augustss return (USBD_IN_PROGRESS);
2827 1.19 augustss #undef exfer
2828 1.19 augustss }
2829 1.19 augustss
2830 1.19 augustss Static void
2831 1.19 augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
2832 1.19 augustss {
2833 1.19 augustss DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2834 1.19 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2835 1.19 augustss }
2836 1.19 augustss
2837 1.33 augustss /*
2838 1.19 augustss * Close a device bulk pipe.
2839 1.19 augustss */
2840 1.19 augustss Static void
2841 1.19 augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
2842 1.19 augustss {
2843 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2844 1.19 augustss
2845 1.19 augustss DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2846 1.19 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2847 1.19 augustss }
2848 1.19 augustss
2849 1.19 augustss void
2850 1.19 augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
2851 1.19 augustss {
2852 1.19 augustss struct ehci_xfer *ex = EXFER(xfer);
2853 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2854 1.19 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2855 1.19 augustss
2856 1.33 augustss DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2857 1.19 augustss xfer, xfer->actlen));
2858 1.19 augustss
2859 1.44 augustss if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2860 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
2861 1.44 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2862 1.25 augustss }
2863 1.19 augustss
2864 1.19 augustss DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2865 1.19 augustss }
2866 1.5 augustss
2867 1.10 augustss /************************/
2868 1.10 augustss
2869 1.78 augustss Static usbd_status
2870 1.78 augustss ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2871 1.78 augustss {
2872 1.78 augustss struct ehci_soft_islot *isp;
2873 1.78 augustss int islot, lev;
2874 1.78 augustss
2875 1.78 augustss /* Find a poll rate that is large enough. */
2876 1.78 augustss for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2877 1.78 augustss if (EHCI_ILEV_IVAL(lev) <= ival)
2878 1.78 augustss break;
2879 1.78 augustss
2880 1.78 augustss /* Pick an interrupt slot at the right level. */
2881 1.78 augustss /* XXX could do better than picking at random */
2882 1.78 augustss sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
2883 1.78 augustss islot = EHCI_IQHIDX(lev, sc->sc_rand);
2884 1.78 augustss
2885 1.78 augustss sqh->islot = islot;
2886 1.78 augustss isp = &sc->sc_islots[islot];
2887 1.78 augustss ehci_add_qh(sqh, isp->sqh);
2888 1.78 augustss
2889 1.78 augustss return (USBD_NORMAL_COMPLETION);
2890 1.78 augustss }
2891 1.78 augustss
2892 1.78 augustss Static usbd_status
2893 1.78 augustss ehci_device_intr_transfer(usbd_xfer_handle xfer)
2894 1.78 augustss {
2895 1.78 augustss usbd_status err;
2896 1.78 augustss
2897 1.78 augustss /* Insert last in queue. */
2898 1.78 augustss err = usb_insert_transfer(xfer);
2899 1.78 augustss if (err)
2900 1.78 augustss return (err);
2901 1.78 augustss
2902 1.78 augustss /*
2903 1.78 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2904 1.78 augustss * so start it first.
2905 1.78 augustss */
2906 1.78 augustss return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2907 1.78 augustss }
2908 1.78 augustss
2909 1.78 augustss Static usbd_status
2910 1.78 augustss ehci_device_intr_start(usbd_xfer_handle xfer)
2911 1.78 augustss {
2912 1.78 augustss #define exfer EXFER(xfer)
2913 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2914 1.78 augustss usbd_device_handle dev = xfer->pipe->device;
2915 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2916 1.78 augustss ehci_soft_qtd_t *data, *dataend;
2917 1.78 augustss ehci_soft_qh_t *sqh;
2918 1.78 augustss usbd_status err;
2919 1.78 augustss int len, isread, endpt;
2920 1.78 augustss int s;
2921 1.78 augustss
2922 1.78 augustss DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
2923 1.78 augustss xfer, xfer->length, xfer->flags));
2924 1.78 augustss
2925 1.78 augustss if (sc->sc_dying)
2926 1.78 augustss return (USBD_IOERROR);
2927 1.78 augustss
2928 1.78 augustss #ifdef DIAGNOSTIC
2929 1.78 augustss if (xfer->rqflags & URQ_REQUEST)
2930 1.78 augustss panic("ehci_device_intr_start: a request");
2931 1.78 augustss #endif
2932 1.78 augustss
2933 1.78 augustss len = xfer->length;
2934 1.78 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2935 1.78 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2936 1.78 augustss sqh = epipe->sqh;
2937 1.78 augustss
2938 1.78 augustss epipe->u.intr.length = len;
2939 1.78 augustss
2940 1.78 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2941 1.78 augustss &dataend);
2942 1.78 augustss if (err) {
2943 1.78 augustss DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
2944 1.78 augustss xfer->status = err;
2945 1.78 augustss usb_transfer_complete(xfer);
2946 1.78 augustss return (err);
2947 1.78 augustss }
2948 1.78 augustss
2949 1.78 augustss #ifdef EHCI_DEBUG
2950 1.78 augustss if (ehcidebug > 5) {
2951 1.78 augustss DPRINTF(("ehci_device_intr_start: data(1)\n"));
2952 1.78 augustss ehci_dump_sqh(sqh);
2953 1.78 augustss ehci_dump_sqtds(data);
2954 1.78 augustss }
2955 1.78 augustss #endif
2956 1.78 augustss
2957 1.78 augustss /* Set up interrupt info. */
2958 1.78 augustss exfer->sqtdstart = data;
2959 1.78 augustss exfer->sqtdend = dataend;
2960 1.78 augustss #ifdef DIAGNOSTIC
2961 1.78 augustss if (!exfer->isdone) {
2962 1.78 augustss printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
2963 1.78 augustss }
2964 1.78 augustss exfer->isdone = 0;
2965 1.78 augustss #endif
2966 1.78 augustss
2967 1.78 augustss s = splusb();
2968 1.78 augustss ehci_set_qh_qtd(sqh, data);
2969 1.78 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2970 1.78 augustss usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2971 1.78 augustss ehci_timeout, xfer);
2972 1.78 augustss }
2973 1.78 augustss ehci_add_intr_list(sc, exfer);
2974 1.78 augustss xfer->status = USBD_IN_PROGRESS;
2975 1.78 augustss splx(s);
2976 1.78 augustss
2977 1.78 augustss #ifdef EHCI_DEBUG
2978 1.78 augustss if (ehcidebug > 10) {
2979 1.78 augustss DPRINTF(("ehci_device_intr_start: data(2)\n"));
2980 1.78 augustss delay(10000);
2981 1.78 augustss DPRINTF(("ehci_device_intr_start: data(3)\n"));
2982 1.78 augustss ehci_dump_regs(sc);
2983 1.78 augustss printf("sqh:\n");
2984 1.78 augustss ehci_dump_sqh(sqh);
2985 1.78 augustss ehci_dump_sqtds(data);
2986 1.78 augustss }
2987 1.78 augustss #endif
2988 1.78 augustss
2989 1.78 augustss if (sc->sc_bus.use_polling)
2990 1.78 augustss ehci_waitintr(sc, xfer);
2991 1.78 augustss
2992 1.78 augustss return (USBD_IN_PROGRESS);
2993 1.78 augustss #undef exfer
2994 1.78 augustss }
2995 1.78 augustss
2996 1.78 augustss Static void
2997 1.78 augustss ehci_device_intr_abort(usbd_xfer_handle xfer)
2998 1.78 augustss {
2999 1.78 augustss DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3000 1.78 augustss if (xfer->pipe->intrxfer == xfer) {
3001 1.78 augustss DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
3002 1.78 augustss xfer->pipe->intrxfer = NULL;
3003 1.78 augustss }
3004 1.78 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
3005 1.78 augustss }
3006 1.78 augustss
3007 1.78 augustss Static void
3008 1.78 augustss ehci_device_intr_close(usbd_pipe_handle pipe)
3009 1.78 augustss {
3010 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3011 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3012 1.78 augustss struct ehci_soft_islot *isp;
3013 1.78 augustss
3014 1.78 augustss isp = &sc->sc_islots[epipe->sqh->islot];
3015 1.78 augustss ehci_close_pipe(pipe, isp->sqh);
3016 1.78 augustss }
3017 1.78 augustss
3018 1.78 augustss Static void
3019 1.78 augustss ehci_device_intr_done(usbd_xfer_handle xfer)
3020 1.78 augustss {
3021 1.78 augustss #define exfer EXFER(xfer)
3022 1.78 augustss struct ehci_xfer *ex = EXFER(xfer);
3023 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3024 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3025 1.78 augustss ehci_soft_qtd_t *data, *dataend;
3026 1.78 augustss ehci_soft_qh_t *sqh;
3027 1.78 augustss usbd_status err;
3028 1.78 augustss int len, isread, endpt, s;
3029 1.78 augustss
3030 1.78 augustss DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3031 1.78 augustss xfer, xfer->actlen));
3032 1.78 augustss
3033 1.78 augustss if (xfer->pipe->repeat) {
3034 1.78 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3035 1.78 augustss
3036 1.78 augustss len = epipe->u.intr.length;
3037 1.78 augustss xfer->length = len;
3038 1.78 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3039 1.78 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3040 1.78 augustss sqh = epipe->sqh;
3041 1.78 augustss
3042 1.78 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3043 1.78 augustss &data, &dataend);
3044 1.78 augustss if (err) {
3045 1.78 augustss DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3046 1.78 augustss xfer->status = err;
3047 1.78 augustss return;
3048 1.78 augustss }
3049 1.78 augustss
3050 1.78 augustss /* Set up interrupt info. */
3051 1.78 augustss exfer->sqtdstart = data;
3052 1.78 augustss exfer->sqtdend = dataend;
3053 1.78 augustss #ifdef DIAGNOSTIC
3054 1.78 augustss if (!exfer->isdone) {
3055 1.78 augustss printf("ehci_device_intr_done: not done, ex=%p\n",
3056 1.78 augustss exfer);
3057 1.78 augustss }
3058 1.78 augustss exfer->isdone = 0;
3059 1.78 augustss #endif
3060 1.78 augustss
3061 1.78 augustss s = splusb();
3062 1.78 augustss ehci_set_qh_qtd(sqh, data);
3063 1.78 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3064 1.78 augustss usb_callout(xfer->timeout_handle,
3065 1.78 augustss mstohz(xfer->timeout), ehci_timeout, xfer);
3066 1.78 augustss }
3067 1.78 augustss splx(s);
3068 1.78 augustss
3069 1.78 augustss xfer->status = USBD_IN_PROGRESS;
3070 1.78 augustss } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3071 1.78 augustss ehci_del_intr_list(ex); /* remove from active list */
3072 1.78 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3073 1.78 augustss }
3074 1.78 augustss #undef exfer
3075 1.78 augustss }
3076 1.10 augustss
3077 1.10 augustss /************************/
3078 1.5 augustss
3079 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
3080 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
3081 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
3082 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
3083 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
3084