ehci.c revision 1.9 1 1.9 augustss /* $NetBSD: ehci.c,v 1.9 2001/11/18 00:39:46 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.1 augustss
39 1.1 augustss /*
40 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 1.1 augustss *
42 1.5 augustss * The EHCI 0.96 spec can be found at
43 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 1.7 augustss * and the USB 2.0 spec at
45 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
46 1.1 augustss *
47 1.1 augustss */
48 1.4 lukem
49 1.4 lukem #include <sys/cdefs.h>
50 1.9 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.9 2001/11/18 00:39:46 augustss Exp $");
51 1.1 augustss
52 1.1 augustss #include <sys/param.h>
53 1.1 augustss #include <sys/systm.h>
54 1.1 augustss #include <sys/kernel.h>
55 1.1 augustss #include <sys/malloc.h>
56 1.1 augustss #include <sys/device.h>
57 1.1 augustss #include <sys/select.h>
58 1.1 augustss #include <sys/proc.h>
59 1.1 augustss #include <sys/queue.h>
60 1.1 augustss
61 1.1 augustss #include <machine/bus.h>
62 1.1 augustss #include <machine/endian.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.1 augustss #include <dev/usb/usb_mem.h>
68 1.1 augustss #include <dev/usb/usb_quirks.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ehcireg.h>
71 1.1 augustss #include <dev/usb/ehcivar.h>
72 1.1 augustss
73 1.1 augustss #ifdef EHCI_DEBUG
74 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
75 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 1.6 augustss int ehcidebug = 0;
77 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
78 1.1 augustss #else
79 1.1 augustss #define DPRINTF(x)
80 1.1 augustss #define DPRINTFN(n,x)
81 1.1 augustss #endif
82 1.1 augustss
83 1.5 augustss struct ehci_pipe {
84 1.5 augustss struct usbd_pipe pipe;
85 1.5 augustss };
86 1.5 augustss
87 1.5 augustss Static void ehci_shutdown(void *);
88 1.5 augustss Static void ehci_power(int, void *);
89 1.5 augustss
90 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
91 1.5 augustss Static void ehci_poll(struct usbd_bus *);
92 1.5 augustss Static void ehci_softintr(void *);
93 1.5 augustss
94 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
95 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
96 1.5 augustss
97 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
98 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
99 1.5 augustss
100 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
101 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
102 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
103 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
104 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
105 1.5 augustss
106 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
107 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
108 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
109 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
110 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
111 1.5 augustss
112 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
113 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
114 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
115 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
116 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
117 1.5 augustss
118 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
119 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
120 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
121 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
122 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
123 1.5 augustss
124 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
125 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
126 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
127 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
128 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
129 1.5 augustss
130 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
131 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
132 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
133 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
134 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
135 1.5 augustss
136 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
137 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
138 1.5 augustss
139 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
140 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
141 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
142 1.6 augustss Static void ehci_pcd_enable(void *);
143 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
144 1.5 augustss
145 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
146 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
147 1.9 augustss
148 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
149 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
150 1.9 augustss
151 1.9 augustss Static void ehci_hash_add_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
152 1.9 augustss Static void ehci_hash_rem_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
153 1.9 augustss Static ehci_soft_qtd_t *ehci_hash_find_qtd(ehci_softc_t *, ehci_physaddr_t);
154 1.9 augustss
155 1.5 augustss #ifdef EHCI_DEBUG
156 1.5 augustss Static void ehci_dumpregs(ehci_softc_t *);
157 1.6 augustss Static void ehci_dump(void);
158 1.6 augustss Static ehci_softc_t *theehci;
159 1.9 augustss Static void ehci_dump_link(ehci_link_t);
160 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
161 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
162 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
163 1.5 augustss #endif
164 1.5 augustss
165 1.5 augustss #define EHCI_INTR_ENDPT 1
166 1.5 augustss
167 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
168 1.5 augustss ehci_open,
169 1.5 augustss ehci_softintr,
170 1.5 augustss ehci_poll,
171 1.5 augustss ehci_allocm,
172 1.5 augustss ehci_freem,
173 1.5 augustss ehci_allocx,
174 1.5 augustss ehci_freex,
175 1.5 augustss };
176 1.5 augustss
177 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
178 1.5 augustss ehci_root_ctrl_transfer,
179 1.5 augustss ehci_root_ctrl_start,
180 1.5 augustss ehci_root_ctrl_abort,
181 1.5 augustss ehci_root_ctrl_close,
182 1.5 augustss ehci_noop,
183 1.5 augustss ehci_root_ctrl_done,
184 1.5 augustss };
185 1.5 augustss
186 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
187 1.5 augustss ehci_root_intr_transfer,
188 1.5 augustss ehci_root_intr_start,
189 1.5 augustss ehci_root_intr_abort,
190 1.5 augustss ehci_root_intr_close,
191 1.5 augustss ehci_noop,
192 1.5 augustss ehci_root_intr_done,
193 1.5 augustss };
194 1.5 augustss
195 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
196 1.5 augustss ehci_device_ctrl_transfer,
197 1.5 augustss ehci_device_ctrl_start,
198 1.5 augustss ehci_device_ctrl_abort,
199 1.5 augustss ehci_device_ctrl_close,
200 1.5 augustss ehci_noop,
201 1.5 augustss ehci_device_ctrl_done,
202 1.5 augustss };
203 1.5 augustss
204 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
205 1.5 augustss ehci_device_intr_transfer,
206 1.5 augustss ehci_device_intr_start,
207 1.5 augustss ehci_device_intr_abort,
208 1.5 augustss ehci_device_intr_close,
209 1.5 augustss ehci_device_clear_toggle,
210 1.5 augustss ehci_device_intr_done,
211 1.5 augustss };
212 1.5 augustss
213 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
214 1.5 augustss ehci_device_bulk_transfer,
215 1.5 augustss ehci_device_bulk_start,
216 1.5 augustss ehci_device_bulk_abort,
217 1.5 augustss ehci_device_bulk_close,
218 1.5 augustss ehci_device_clear_toggle,
219 1.5 augustss ehci_device_bulk_done,
220 1.5 augustss };
221 1.5 augustss
222 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
223 1.5 augustss ehci_device_isoc_transfer,
224 1.5 augustss ehci_device_isoc_start,
225 1.5 augustss ehci_device_isoc_abort,
226 1.5 augustss ehci_device_isoc_close,
227 1.5 augustss ehci_noop,
228 1.5 augustss ehci_device_isoc_done,
229 1.5 augustss };
230 1.5 augustss
231 1.1 augustss usbd_status
232 1.1 augustss ehci_init(ehci_softc_t *sc)
233 1.1 augustss {
234 1.3 augustss u_int32_t version, sparams, cparams, hcr;
235 1.3 augustss u_int i;
236 1.3 augustss usbd_status err;
237 1.3 augustss
238 1.3 augustss DPRINTF(("ehci_init: start\n"));
239 1.6 augustss #ifdef EHCI_DEBUG
240 1.6 augustss theehci = sc;
241 1.6 augustss #endif
242 1.3 augustss
243 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
244 1.3 augustss
245 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
246 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
247 1.3 augustss version >> 8, version & 0xff);
248 1.3 augustss
249 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
250 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
251 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
252 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
253 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
254 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
255 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
256 1.3 augustss return (USBD_IOERROR);
257 1.3 augustss }
258 1.3 augustss if (sc->sc_ncomp > 0) {
259 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
260 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
261 1.3 augustss EHCI_HCS_N_PCC(sparams),
262 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
263 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
264 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
265 1.3 augustss printf("\n");
266 1.3 augustss }
267 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
268 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
269 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
270 1.3 augustss
271 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
272 1.3 augustss
273 1.9 augustss for (i = 0; i < EHCI_HASH_SIZE; i++)
274 1.9 augustss LIST_INIT(&sc->sc_hash_qtds[i]);
275 1.9 augustss
276 1.3 augustss /* Reset the controller */
277 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
278 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
279 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
280 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
281 1.3 augustss for (i = 0; i < 100; i++) {
282 1.3 augustss delay(10);
283 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
284 1.3 augustss if (!hcr)
285 1.3 augustss break;
286 1.3 augustss }
287 1.3 augustss if (hcr) {
288 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
289 1.3 augustss return (USBD_IOERROR);
290 1.3 augustss }
291 1.3 augustss
292 1.3 augustss /* frame list size at default, read back what we got and use that */
293 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
294 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
295 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
296 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
297 1.3 augustss case 3: return (USBD_IOERROR);
298 1.3 augustss }
299 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
300 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
301 1.3 augustss if (err)
302 1.3 augustss return (err);
303 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
304 1.3 augustss
305 1.5 augustss /* Set up the bus struct. */
306 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
307 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
308 1.5 augustss
309 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
310 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
311 1.5 augustss
312 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
313 1.6 augustss
314 1.9 augustss /* Allocate dummy QH that starts the bulk list. */
315 1.9 augustss sc->sc_bulk_head = ehci_alloc_sqh(sc);
316 1.9 augustss if (sc->sc_bulk_head == NULL) {
317 1.9 augustss err = USBD_NOMEM;
318 1.9 augustss goto bad1;
319 1.9 augustss }
320 1.9 augustss memset(&sc->sc_bulk_head->qh, 0, sizeof(ehci_qtd_t));
321 1.9 augustss sc->sc_bulk_head->qh.qh_qtd.qtd_status =
322 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
323 1.9 augustss sc->sc_bulk_head->qh.qh_link =
324 1.9 augustss htole32(EHCI_LINK_TERMINATE); /* XXX no bw reclaimation */
325 1.9 augustss sc->sc_bulk_head->next = NULL;
326 1.9 augustss #ifdef EHCI_DEBUG
327 1.9 augustss if (ehcidebug) {
328 1.9 augustss ehci_dump_sqh(sc->sc_bulk_head);
329 1.9 augustss }
330 1.9 augustss #endif
331 1.9 augustss
332 1.9 augustss /* Allocate dummy QH that starts the control list. */
333 1.9 augustss sc->sc_ctrl_head = ehci_alloc_sqh(sc);
334 1.9 augustss if (sc->sc_ctrl_head == NULL) {
335 1.9 augustss err = USBD_NOMEM;
336 1.9 augustss goto bad2;
337 1.9 augustss }
338 1.9 augustss memset(&sc->sc_ctrl_head->qh, 0, sizeof(ehci_qtd_t));
339 1.9 augustss sc->sc_ctrl_head->qh.qh_qtd.qtd_status =
340 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
341 1.9 augustss sc->sc_ctrl_head->qh.qh_endp = htole32(EHCI_QH_HRECL);
342 1.9 augustss sc->sc_ctrl_head->qh.qh_link =
343 1.9 augustss htole32(sc->sc_bulk_head->physaddr | EHCI_LINK_QH);
344 1.9 augustss sc->sc_ctrl_head = sc->sc_bulk_head;
345 1.9 augustss #ifdef EHCI_DEBUG
346 1.9 augustss if (ehcidebug) {
347 1.9 augustss ehci_dump_sqh(sc->sc_ctrl_head);
348 1.9 augustss }
349 1.9 augustss #endif
350 1.9 augustss
351 1.9 augustss /* Point to async list */
352 1.9 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR,
353 1.9 augustss sc->sc_ctrl_head->physaddr | EHCI_LINK_QH);
354 1.9 augustss
355 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
356 1.9 augustss
357 1.6 augustss /* Enable interrupts */
358 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
359 1.6 augustss
360 1.6 augustss /* Turn on controller */
361 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
362 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
363 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
364 1.6 augustss /* EHCI_CMD_ASE | */
365 1.6 augustss /* EHCI_CMD_PSE | */
366 1.6 augustss EHCI_CMD_RS);
367 1.6 augustss
368 1.6 augustss /* Take over port ownership */
369 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
370 1.6 augustss
371 1.8 augustss for (i = 0; i < 100; i++) {
372 1.8 augustss delay(10);
373 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
374 1.8 augustss if (!hcr)
375 1.8 augustss break;
376 1.8 augustss }
377 1.8 augustss if (hcr) {
378 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
379 1.8 augustss return (USBD_IOERROR);
380 1.8 augustss }
381 1.8 augustss
382 1.5 augustss return (USBD_NORMAL_COMPLETION);
383 1.9 augustss
384 1.9 augustss #if 0
385 1.9 augustss bad3:
386 1.9 augustss ehci_free_sqh(sc, sc->sc_bulk_head);
387 1.9 augustss #endif
388 1.9 augustss bad2:
389 1.9 augustss ehci_free_sqh(sc, sc->sc_ctrl_head);
390 1.9 augustss bad1:
391 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
392 1.9 augustss return (err);
393 1.1 augustss }
394 1.1 augustss
395 1.6 augustss Static int ehci_intr1(ehci_softc_t *);
396 1.6 augustss
397 1.1 augustss int
398 1.1 augustss ehci_intr(void *v)
399 1.1 augustss {
400 1.6 augustss ehci_softc_t *sc = v;
401 1.6 augustss
402 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
403 1.6 augustss if (sc->sc_bus.use_polling) {
404 1.6 augustss #ifdef DIAGNOSTIC
405 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
406 1.6 augustss #endif
407 1.6 augustss return (0);
408 1.6 augustss }
409 1.6 augustss
410 1.6 augustss return (ehci_intr1(sc));
411 1.6 augustss }
412 1.6 augustss
413 1.6 augustss Static int
414 1.6 augustss ehci_intr1(ehci_softc_t *sc)
415 1.6 augustss {
416 1.6 augustss u_int32_t intrs, eintrs;
417 1.6 augustss
418 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
419 1.6 augustss
420 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
421 1.6 augustss if (sc == NULL) {
422 1.6 augustss #ifdef DIAGNOSTIC
423 1.6 augustss printf("ehci_intr: sc == NULL\n");
424 1.6 augustss #endif
425 1.6 augustss return (0);
426 1.6 augustss }
427 1.6 augustss
428 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
429 1.6 augustss
430 1.6 augustss if (!intrs)
431 1.6 augustss return (0);
432 1.6 augustss
433 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
434 1.6 augustss eintrs = intrs & sc->sc_eintrs;
435 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
436 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
437 1.6 augustss (u_int)eintrs));
438 1.6 augustss if (!eintrs)
439 1.6 augustss return (0);
440 1.6 augustss
441 1.6 augustss sc->sc_bus.intr_context++;
442 1.6 augustss sc->sc_bus.no_intrs++;
443 1.6 augustss if (eintrs & EHCI_STS_INT) {
444 1.6 augustss DPRINTF(("ehci_intr1: something is done\n"));
445 1.6 augustss eintrs &= ~EHCI_STS_INT;
446 1.6 augustss }
447 1.6 augustss if (eintrs & EHCI_STS_ERRINT) {
448 1.6 augustss DPRINTF(("ehci_intr1: some error\n"));
449 1.6 augustss eintrs &= ~EHCI_STS_HSE;
450 1.6 augustss }
451 1.6 augustss if (eintrs & EHCI_STS_HSE) {
452 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
453 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
454 1.6 augustss /* XXX what else */
455 1.6 augustss }
456 1.6 augustss if (eintrs & EHCI_STS_PCD) {
457 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
458 1.6 augustss /*
459 1.6 augustss * Disable PCD interrupt for now, because it will be
460 1.6 augustss * on until the port has been reset.
461 1.6 augustss */
462 1.6 augustss ehci_pcd_able(sc, 0);
463 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
464 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
465 1.6 augustss eintrs &= ~EHCI_STS_PCD;
466 1.6 augustss }
467 1.6 augustss
468 1.6 augustss sc->sc_bus.intr_context--;
469 1.6 augustss
470 1.6 augustss if (eintrs != 0) {
471 1.6 augustss /* Block unprocessed interrupts. */
472 1.6 augustss sc->sc_eintrs &= ~eintrs;
473 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
474 1.6 augustss printf("%s: blocking intrs 0x%x\n",
475 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
476 1.6 augustss }
477 1.6 augustss
478 1.6 augustss return (1);
479 1.6 augustss }
480 1.6 augustss
481 1.6 augustss void
482 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
483 1.6 augustss {
484 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
485 1.6 augustss if (on)
486 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
487 1.6 augustss else
488 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
489 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
490 1.6 augustss }
491 1.6 augustss
492 1.6 augustss void
493 1.6 augustss ehci_pcd_enable(void *v_sc)
494 1.6 augustss {
495 1.6 augustss ehci_softc_t *sc = v_sc;
496 1.6 augustss
497 1.6 augustss ehci_pcd_able(sc, 1);
498 1.6 augustss }
499 1.6 augustss
500 1.6 augustss void
501 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
502 1.6 augustss {
503 1.6 augustss usbd_pipe_handle pipe;
504 1.6 augustss struct ehci_pipe *opipe;
505 1.6 augustss u_char *p;
506 1.6 augustss int i, m;
507 1.6 augustss
508 1.6 augustss if (xfer == NULL) {
509 1.6 augustss /* Just ignore the change. */
510 1.6 augustss return;
511 1.6 augustss }
512 1.6 augustss
513 1.6 augustss pipe = xfer->pipe;
514 1.6 augustss opipe = (struct ehci_pipe *)pipe;
515 1.6 augustss
516 1.6 augustss p = KERNADDR(&xfer->dmabuf);
517 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
518 1.6 augustss memset(p, 0, xfer->length);
519 1.6 augustss for (i = 1; i <= m; i++) {
520 1.6 augustss /* Pick out CHANGE bits from the status reg. */
521 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
522 1.6 augustss p[i/8] |= 1 << (i%8);
523 1.6 augustss }
524 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
525 1.6 augustss xfer->actlen = xfer->length;
526 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
527 1.6 augustss
528 1.6 augustss usb_transfer_complete(xfer);
529 1.1 augustss }
530 1.1 augustss
531 1.5 augustss void
532 1.5 augustss ehci_softintr(void *v)
533 1.5 augustss {
534 1.5 augustss //ehci_softc_t *sc = v;
535 1.5 augustss }
536 1.5 augustss
537 1.5 augustss void
538 1.5 augustss ehci_poll(struct usbd_bus *bus)
539 1.5 augustss {
540 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
541 1.5 augustss #ifdef EHCI_DEBUG
542 1.5 augustss static int last;
543 1.5 augustss int new;
544 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
545 1.5 augustss if (new != last) {
546 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
547 1.5 augustss last = new;
548 1.5 augustss }
549 1.5 augustss #endif
550 1.5 augustss
551 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
552 1.5 augustss ehci_intr1(sc);
553 1.5 augustss }
554 1.5 augustss
555 1.1 augustss int
556 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
557 1.1 augustss {
558 1.1 augustss int rv = 0;
559 1.1 augustss
560 1.1 augustss if (sc->sc_child != NULL)
561 1.1 augustss rv = config_detach(sc->sc_child, flags);
562 1.1 augustss
563 1.1 augustss if (rv != 0)
564 1.1 augustss return (rv);
565 1.1 augustss
566 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
567 1.6 augustss
568 1.1 augustss if (sc->sc_powerhook != NULL)
569 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
570 1.1 augustss if (sc->sc_shutdownhook != NULL)
571 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
572 1.1 augustss
573 1.1 augustss /* XXX free other data structures XXX */
574 1.1 augustss
575 1.1 augustss return (rv);
576 1.1 augustss }
577 1.1 augustss
578 1.1 augustss
579 1.1 augustss int
580 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
581 1.1 augustss {
582 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
583 1.1 augustss int rv = 0;
584 1.1 augustss
585 1.1 augustss switch (act) {
586 1.1 augustss case DVACT_ACTIVATE:
587 1.1 augustss return (EOPNOTSUPP);
588 1.1 augustss break;
589 1.1 augustss
590 1.1 augustss case DVACT_DEACTIVATE:
591 1.1 augustss if (sc->sc_child != NULL)
592 1.1 augustss rv = config_deactivate(sc->sc_child);
593 1.5 augustss sc->sc_dying = 1;
594 1.1 augustss break;
595 1.1 augustss }
596 1.1 augustss return (rv);
597 1.1 augustss }
598 1.1 augustss
599 1.5 augustss /*
600 1.5 augustss * Handle suspend/resume.
601 1.5 augustss *
602 1.5 augustss * We need to switch to polling mode here, because this routine is
603 1.5 augustss * called from an intterupt context. This is all right since we
604 1.5 augustss * are almost suspended anyway.
605 1.5 augustss */
606 1.5 augustss void
607 1.5 augustss ehci_power(int why, void *v)
608 1.5 augustss {
609 1.5 augustss ehci_softc_t *sc = v;
610 1.5 augustss //u_int32_t ctl;
611 1.5 augustss int s;
612 1.5 augustss
613 1.5 augustss #ifdef EHCI_DEBUG
614 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
615 1.5 augustss ehci_dumpregs(sc);
616 1.5 augustss #endif
617 1.5 augustss
618 1.5 augustss s = splhardusb();
619 1.5 augustss switch (why) {
620 1.5 augustss case PWR_SUSPEND:
621 1.5 augustss case PWR_STANDBY:
622 1.5 augustss sc->sc_bus.use_polling++;
623 1.5 augustss #if 0
624 1.5 augustss OOO
625 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
626 1.5 augustss if (sc->sc_control == 0) {
627 1.5 augustss /*
628 1.5 augustss * Preserve register values, in case that APM BIOS
629 1.5 augustss * does not recover them.
630 1.5 augustss */
631 1.5 augustss sc->sc_control = ctl;
632 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
633 1.5 augustss }
634 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
635 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
636 1.5 augustss #endif
637 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
638 1.5 augustss sc->sc_bus.use_polling--;
639 1.5 augustss break;
640 1.5 augustss case PWR_RESUME:
641 1.5 augustss sc->sc_bus.use_polling++;
642 1.5 augustss #if 0
643 1.5 augustss OOO
644 1.5 augustss /* Some broken BIOSes do not recover these values */
645 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
646 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
647 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
648 1.5 augustss if (sc->sc_intre)
649 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
650 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
651 1.5 augustss if (sc->sc_control)
652 1.5 augustss ctl = sc->sc_control;
653 1.5 augustss else
654 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
655 1.5 augustss ctl |= EHCI_HCFS_RESUME;
656 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
657 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
658 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
659 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
660 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
661 1.5 augustss sc->sc_control = sc->sc_intre = 0;
662 1.5 augustss #endif
663 1.5 augustss sc->sc_bus.use_polling--;
664 1.5 augustss break;
665 1.5 augustss case PWR_SOFTSUSPEND:
666 1.5 augustss case PWR_SOFTSTANDBY:
667 1.5 augustss case PWR_SOFTRESUME:
668 1.5 augustss break;
669 1.5 augustss }
670 1.5 augustss splx(s);
671 1.5 augustss }
672 1.5 augustss
673 1.5 augustss /*
674 1.5 augustss * Shut down the controller when the system is going down.
675 1.5 augustss */
676 1.5 augustss void
677 1.5 augustss ehci_shutdown(void *v)
678 1.5 augustss {
679 1.8 augustss ehci_softc_t *sc = v;
680 1.5 augustss
681 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
682 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
683 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
684 1.5 augustss }
685 1.5 augustss
686 1.5 augustss usbd_status
687 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
688 1.5 augustss {
689 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
690 1.5 augustss
691 1.5 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
692 1.5 augustss }
693 1.5 augustss
694 1.5 augustss void
695 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
696 1.5 augustss {
697 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
698 1.5 augustss
699 1.5 augustss usb_freemem(&sc->sc_bus, dma);
700 1.5 augustss }
701 1.5 augustss
702 1.5 augustss usbd_xfer_handle
703 1.5 augustss ehci_allocx(struct usbd_bus *bus)
704 1.5 augustss {
705 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
706 1.5 augustss usbd_xfer_handle xfer;
707 1.5 augustss
708 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
709 1.5 augustss if (xfer != NULL)
710 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
711 1.5 augustss else
712 1.5 augustss xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
713 1.5 augustss if (xfer != NULL)
714 1.5 augustss memset(xfer, 0, sizeof *xfer);
715 1.5 augustss return (xfer);
716 1.5 augustss }
717 1.5 augustss
718 1.5 augustss void
719 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
720 1.5 augustss {
721 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
722 1.5 augustss
723 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
724 1.5 augustss }
725 1.5 augustss
726 1.5 augustss Static void
727 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
728 1.5 augustss {
729 1.5 augustss #if 0
730 1.5 augustss OOO
731 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
732 1.5 augustss
733 1.5 augustss epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
734 1.5 augustss #endif
735 1.5 augustss }
736 1.5 augustss
737 1.5 augustss Static void
738 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
739 1.5 augustss {
740 1.5 augustss }
741 1.5 augustss
742 1.5 augustss #ifdef EHCI_DEBUG
743 1.5 augustss void
744 1.5 augustss ehci_dumpregs(ehci_softc_t *sc)
745 1.5 augustss {
746 1.6 augustss int i;
747 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
748 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
749 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
750 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
751 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
752 1.6 augustss printf("port %d status=0x%08x\n", i,
753 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
754 1.6 augustss }
755 1.6 augustss
756 1.6 augustss void
757 1.6 augustss ehci_dump()
758 1.6 augustss {
759 1.6 augustss ehci_dumpregs(theehci);
760 1.5 augustss }
761 1.9 augustss
762 1.9 augustss void
763 1.9 augustss ehci_dump_link(ehci_link_t link)
764 1.9 augustss {
765 1.9 augustss printf("0x%08x<", link);
766 1.9 augustss switch (EHCI_LINK_TYPE(link)) {
767 1.9 augustss case EHCI_LINK_ITD: printf("ITD"); break;
768 1.9 augustss case EHCI_LINK_QH: printf("QH"); break;
769 1.9 augustss case EHCI_LINK_SITD: printf("SITD"); break;
770 1.9 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
771 1.9 augustss }
772 1.9 augustss if (link & EHCI_LINK_TERMINATE)
773 1.9 augustss printf(",T>");
774 1.9 augustss else
775 1.9 augustss printf(">");
776 1.9 augustss }
777 1.9 augustss
778 1.9 augustss void
779 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
780 1.9 augustss {
781 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
782 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
783 1.9 augustss }
784 1.9 augustss
785 1.9 augustss void
786 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
787 1.9 augustss {
788 1.9 augustss u_int32_t s;
789 1.9 augustss
790 1.9 augustss printf(" next="); ehci_dump_link(qtd->qtd_next);
791 1.9 augustss printf("altnext="); ehci_dump_link(qtd->qtd_altnext);
792 1.9 augustss printf("\n");
793 1.9 augustss s = qtd->qtd_status;
794 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
795 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
796 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
797 1.9 augustss printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s),
798 1.9 augustss EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s));
799 1.9 augustss for (s = 0; s < 5; s++)
800 1.9 augustss printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]);
801 1.9 augustss }
802 1.9 augustss
803 1.9 augustss void
804 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
805 1.9 augustss {
806 1.9 augustss ehci_qh_t *qh = &sqh->qh;
807 1.9 augustss
808 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
809 1.9 augustss printf(" link="); ehci_dump_link(qh->qh_link); printf("\n");
810 1.9 augustss printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub);
811 1.9 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n ");
812 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
813 1.9 augustss }
814 1.9 augustss
815 1.5 augustss #endif
816 1.5 augustss
817 1.5 augustss usbd_status
818 1.5 augustss ehci_open(usbd_pipe_handle pipe)
819 1.5 augustss {
820 1.5 augustss usbd_device_handle dev = pipe->device;
821 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
822 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
823 1.5 augustss u_int8_t addr = dev->address;
824 1.5 augustss #if 0
825 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
826 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
827 1.9 augustss ehci_soft_ed_t *sqh;
828 1.9 augustss ehci_soft_qtd_t *sqtd;
829 1.5 augustss ehci_soft_itd_t *sitd;
830 1.5 augustss ehci_physaddr_t tdphys;
831 1.5 augustss u_int32_t fmt;
832 1.5 augustss usbd_status err;
833 1.5 augustss int s;
834 1.5 augustss int ival;
835 1.5 augustss #endif
836 1.5 augustss
837 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
838 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
839 1.5 augustss
840 1.5 augustss if (addr == sc->sc_addr) {
841 1.5 augustss switch (ed->bEndpointAddress) {
842 1.5 augustss case USB_CONTROL_ENDPOINT:
843 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
844 1.5 augustss break;
845 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
846 1.5 augustss pipe->methods = &ehci_root_intr_methods;
847 1.5 augustss break;
848 1.5 augustss default:
849 1.5 augustss return (USBD_INVAL);
850 1.5 augustss }
851 1.5 augustss } else {
852 1.5 augustss #if 0
853 1.9 augustss sqtd = NULL;
854 1.9 augustss sqh = NULL;
855 1.5 augustss
856 1.9 augustss sqh = ehci_alloc_sqh(sc);
857 1.9 augustss if (sqh == NULL)
858 1.5 augustss goto bad0;
859 1.9 augustss epipe->sqh = sqh;
860 1.9 augustss if (xfertype == UE_ISOCHRONOUS || xfertype == UE_INTERRUPT) {
861 1.9 augustss return (USBD_IOERROR);
862 1.5 augustss } else {
863 1.9 augustss sqtd = ehci_alloc_sqtd(sc);
864 1.9 augustss if (sqtd == NULL) {
865 1.9 augustss ehci_free_sqtd(sc, sqtd);
866 1.5 augustss goto bad1;
867 1.5 augustss }
868 1.9 augustss epipe->tail.qtd = sqtd;
869 1.9 augustss tdphys = sqtd->physaddr;
870 1.5 augustss fmt = EHCI_ED_FORMAT_GEN | EHCI_ED_DIR_TD;
871 1.5 augustss }
872 1.9 augustss sqh->ed.ed_flags = htole32(
873 1.5 augustss EHCI_ED_SET_FA(addr) |
874 1.5 augustss EHCI_ED_SET_EN(ed->bEndpointAddress) |
875 1.5 augustss (dev->lowspeed ? EHCI_ED_SPEED : 0) | fmt |
876 1.5 augustss EHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
877 1.9 augustss sqh->ed.ed_headp = sqh->ed.ed_tailp = htole32(tdphys);
878 1.5 augustss
879 1.5 augustss switch (xfertype) {
880 1.5 augustss case UE_CONTROL:
881 1.5 augustss pipe->methods = &ehci_device_ctrl_methods;
882 1.5 augustss err = usb_allocmem(&sc->sc_bus,
883 1.5 augustss sizeof(usb_device_request_t),
884 1.5 augustss 0, &epipe->u.ctl.reqdma);
885 1.5 augustss if (err)
886 1.5 augustss goto bad;
887 1.5 augustss s = splusb();
888 1.9 augustss ehci_add_ed(sqh, sc->sc_ctrl_head);
889 1.5 augustss splx(s);
890 1.5 augustss break;
891 1.5 augustss case UE_INTERRUPT:
892 1.5 augustss pipe->methods = &ehci_device_intr_methods;
893 1.5 augustss ival = pipe->interval;
894 1.5 augustss if (ival == USBD_DEFAULT_INTERVAL)
895 1.5 augustss ival = ed->bInterval;
896 1.5 augustss return (ehci_device_setintr(sc, epipe, ival));
897 1.5 augustss case UE_ISOCHRONOUS:
898 1.5 augustss pipe->methods = &ehci_device_isoc_methods;
899 1.5 augustss return (ehci_setup_isoc(pipe));
900 1.5 augustss case UE_BULK:
901 1.5 augustss pipe->methods = &ehci_device_bulk_methods;
902 1.5 augustss s = splusb();
903 1.9 augustss ehci_add_ed(sqh, sc->sc_bulk_head);
904 1.5 augustss splx(s);
905 1.5 augustss break;
906 1.5 augustss }
907 1.5 augustss #else
908 1.5 augustss return (USBD_IOERROR);
909 1.5 augustss #endif
910 1.5 augustss }
911 1.5 augustss return (USBD_NORMAL_COMPLETION);
912 1.5 augustss
913 1.5 augustss #if 0
914 1.5 augustss bad:
915 1.9 augustss if (sqtd != NULL)
916 1.9 augustss ehci_free_sqtd(sc, sqtd);
917 1.5 augustss bad1:
918 1.9 augustss if (sqh != NULL)
919 1.9 augustss ehci_free_sqh(sc, sqh);
920 1.5 augustss bad0:
921 1.5 augustss return (USBD_NOMEM);
922 1.5 augustss #endif
923 1.5 augustss }
924 1.5 augustss
925 1.5 augustss /***********/
926 1.5 augustss
927 1.5 augustss /*
928 1.5 augustss * Data structures and routines to emulate the root hub.
929 1.5 augustss */
930 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
931 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
932 1.5 augustss UDESC_DEVICE, /* type */
933 1.5 augustss {0x00, 0x02}, /* USB version */
934 1.5 augustss UDCLASS_HUB, /* class */
935 1.5 augustss UDSUBCLASS_HUB, /* subclass */
936 1.5 augustss 0, /* protocol */
937 1.5 augustss 64, /* max packet */
938 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
939 1.5 augustss 1,2,0, /* string indicies */
940 1.5 augustss 1 /* # of configurations */
941 1.5 augustss };
942 1.5 augustss
943 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
944 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
945 1.5 augustss UDESC_CONFIG,
946 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
947 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
948 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
949 1.5 augustss 1,
950 1.5 augustss 1,
951 1.5 augustss 0,
952 1.5 augustss UC_SELF_POWERED,
953 1.5 augustss 0 /* max power */
954 1.5 augustss };
955 1.5 augustss
956 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
957 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
958 1.5 augustss UDESC_INTERFACE,
959 1.5 augustss 0,
960 1.5 augustss 0,
961 1.5 augustss 1,
962 1.5 augustss UICLASS_HUB,
963 1.5 augustss UISUBCLASS_HUB,
964 1.5 augustss 0,
965 1.5 augustss 0
966 1.5 augustss };
967 1.5 augustss
968 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
969 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
970 1.5 augustss UDESC_ENDPOINT,
971 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
972 1.5 augustss UE_INTERRUPT,
973 1.5 augustss {8, 0}, /* max packet */
974 1.5 augustss 255
975 1.5 augustss };
976 1.5 augustss
977 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
978 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
979 1.5 augustss UDESC_HUB,
980 1.5 augustss 0,
981 1.5 augustss {0,0},
982 1.5 augustss 0,
983 1.5 augustss 0,
984 1.5 augustss {0},
985 1.5 augustss };
986 1.5 augustss
987 1.5 augustss Static int
988 1.5 augustss ehci_str(p, l, s)
989 1.5 augustss usb_string_descriptor_t *p;
990 1.5 augustss int l;
991 1.5 augustss char *s;
992 1.5 augustss {
993 1.5 augustss int i;
994 1.5 augustss
995 1.5 augustss if (l == 0)
996 1.5 augustss return (0);
997 1.5 augustss p->bLength = 2 * strlen(s) + 2;
998 1.5 augustss if (l == 1)
999 1.5 augustss return (1);
1000 1.5 augustss p->bDescriptorType = UDESC_STRING;
1001 1.5 augustss l -= 2;
1002 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1003 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1004 1.5 augustss return (2*i+2);
1005 1.5 augustss }
1006 1.5 augustss
1007 1.5 augustss /*
1008 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1009 1.5 augustss */
1010 1.5 augustss Static usbd_status
1011 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1012 1.5 augustss {
1013 1.5 augustss usbd_status err;
1014 1.5 augustss
1015 1.5 augustss /* Insert last in queue. */
1016 1.5 augustss err = usb_insert_transfer(xfer);
1017 1.5 augustss if (err)
1018 1.5 augustss return (err);
1019 1.5 augustss
1020 1.5 augustss /* Pipe isn't running, start first */
1021 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1022 1.5 augustss }
1023 1.5 augustss
1024 1.5 augustss Static usbd_status
1025 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1026 1.5 augustss {
1027 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1028 1.5 augustss usb_device_request_t *req;
1029 1.5 augustss void *buf = NULL;
1030 1.5 augustss int port, i;
1031 1.5 augustss int s, len, value, index, l, totlen = 0;
1032 1.5 augustss usb_port_status_t ps;
1033 1.5 augustss usb_hub_descriptor_t hubd;
1034 1.5 augustss usbd_status err;
1035 1.5 augustss u_int32_t v;
1036 1.5 augustss
1037 1.5 augustss if (sc->sc_dying)
1038 1.5 augustss return (USBD_IOERROR);
1039 1.5 augustss
1040 1.5 augustss #ifdef DIAGNOSTIC
1041 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1042 1.5 augustss /* XXX panic */
1043 1.5 augustss return (USBD_INVAL);
1044 1.5 augustss #endif
1045 1.5 augustss req = &xfer->request;
1046 1.5 augustss
1047 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1048 1.5 augustss req->bmRequestType, req->bRequest));
1049 1.5 augustss
1050 1.5 augustss len = UGETW(req->wLength);
1051 1.5 augustss value = UGETW(req->wValue);
1052 1.5 augustss index = UGETW(req->wIndex);
1053 1.5 augustss
1054 1.5 augustss if (len != 0)
1055 1.5 augustss buf = KERNADDR(&xfer->dmabuf);
1056 1.5 augustss
1057 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1058 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1059 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1060 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1061 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1062 1.5 augustss /*
1063 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1064 1.5 augustss * for the integrated root hub.
1065 1.5 augustss */
1066 1.5 augustss break;
1067 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1068 1.5 augustss if (len > 0) {
1069 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1070 1.5 augustss totlen = 1;
1071 1.5 augustss }
1072 1.5 augustss break;
1073 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1074 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1075 1.5 augustss switch(value >> 8) {
1076 1.5 augustss case UDESC_DEVICE:
1077 1.5 augustss if ((value & 0xff) != 0) {
1078 1.5 augustss err = USBD_IOERROR;
1079 1.5 augustss goto ret;
1080 1.5 augustss }
1081 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1082 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1083 1.5 augustss memcpy(buf, &ehci_devd, l);
1084 1.5 augustss break;
1085 1.5 augustss case UDESC_CONFIG:
1086 1.5 augustss if ((value & 0xff) != 0) {
1087 1.5 augustss err = USBD_IOERROR;
1088 1.5 augustss goto ret;
1089 1.5 augustss }
1090 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1091 1.5 augustss memcpy(buf, &ehci_confd, l);
1092 1.5 augustss buf = (char *)buf + l;
1093 1.5 augustss len -= l;
1094 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1095 1.5 augustss totlen += l;
1096 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1097 1.5 augustss buf = (char *)buf + l;
1098 1.5 augustss len -= l;
1099 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1100 1.5 augustss totlen += l;
1101 1.5 augustss memcpy(buf, &ehci_endpd, l);
1102 1.5 augustss break;
1103 1.5 augustss case UDESC_STRING:
1104 1.5 augustss if (len == 0)
1105 1.5 augustss break;
1106 1.5 augustss *(u_int8_t *)buf = 0;
1107 1.5 augustss totlen = 1;
1108 1.5 augustss switch (value & 0xff) {
1109 1.5 augustss case 1: /* Vendor */
1110 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1111 1.5 augustss break;
1112 1.5 augustss case 2: /* Product */
1113 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1114 1.5 augustss break;
1115 1.5 augustss }
1116 1.5 augustss break;
1117 1.5 augustss default:
1118 1.5 augustss err = USBD_IOERROR;
1119 1.5 augustss goto ret;
1120 1.5 augustss }
1121 1.5 augustss break;
1122 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1123 1.5 augustss if (len > 0) {
1124 1.5 augustss *(u_int8_t *)buf = 0;
1125 1.5 augustss totlen = 1;
1126 1.5 augustss }
1127 1.5 augustss break;
1128 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1129 1.5 augustss if (len > 1) {
1130 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1131 1.5 augustss totlen = 2;
1132 1.5 augustss }
1133 1.5 augustss break;
1134 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1135 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1136 1.5 augustss if (len > 1) {
1137 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1138 1.5 augustss totlen = 2;
1139 1.5 augustss }
1140 1.5 augustss break;
1141 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1142 1.5 augustss if (value >= USB_MAX_DEVICES) {
1143 1.5 augustss err = USBD_IOERROR;
1144 1.5 augustss goto ret;
1145 1.5 augustss }
1146 1.5 augustss sc->sc_addr = value;
1147 1.5 augustss break;
1148 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1149 1.5 augustss if (value != 0 && value != 1) {
1150 1.5 augustss err = USBD_IOERROR;
1151 1.5 augustss goto ret;
1152 1.5 augustss }
1153 1.5 augustss sc->sc_conf = value;
1154 1.5 augustss break;
1155 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1156 1.5 augustss break;
1157 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1158 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1159 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1160 1.5 augustss err = USBD_IOERROR;
1161 1.5 augustss goto ret;
1162 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1163 1.5 augustss break;
1164 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1165 1.5 augustss break;
1166 1.5 augustss /* Hub requests */
1167 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1168 1.5 augustss break;
1169 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1170 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1171 1.5 augustss "port=%d feature=%d\n",
1172 1.5 augustss index, value));
1173 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1174 1.5 augustss err = USBD_IOERROR;
1175 1.5 augustss goto ret;
1176 1.5 augustss }
1177 1.5 augustss port = EHCI_PORTSC(index);
1178 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1179 1.5 augustss switch(value) {
1180 1.5 augustss case UHF_PORT_ENABLE:
1181 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1182 1.5 augustss break;
1183 1.5 augustss case UHF_PORT_SUSPEND:
1184 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1185 1.5 augustss break;
1186 1.5 augustss case UHF_PORT_POWER:
1187 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1188 1.5 augustss break;
1189 1.5 augustss case UHF_C_PORT_CONNECTION:
1190 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1191 1.5 augustss break;
1192 1.5 augustss case UHF_C_PORT_ENABLE:
1193 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1194 1.5 augustss break;
1195 1.5 augustss case UHF_C_PORT_SUSPEND:
1196 1.5 augustss /* how? */
1197 1.5 augustss break;
1198 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1199 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1200 1.5 augustss break;
1201 1.5 augustss case UHF_C_PORT_RESET:
1202 1.6 augustss sc->sc_isreset = 0;
1203 1.5 augustss break;
1204 1.5 augustss default:
1205 1.5 augustss err = USBD_IOERROR;
1206 1.5 augustss goto ret;
1207 1.5 augustss }
1208 1.5 augustss #if 0
1209 1.5 augustss switch(value) {
1210 1.5 augustss case UHF_C_PORT_CONNECTION:
1211 1.5 augustss case UHF_C_PORT_ENABLE:
1212 1.5 augustss case UHF_C_PORT_SUSPEND:
1213 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1214 1.5 augustss case UHF_C_PORT_RESET:
1215 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1216 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1217 1.6 augustss ehci_pcd_able(sc, 1);
1218 1.5 augustss break;
1219 1.5 augustss default:
1220 1.5 augustss break;
1221 1.5 augustss }
1222 1.5 augustss #endif
1223 1.5 augustss break;
1224 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1225 1.5 augustss if (value != 0) {
1226 1.5 augustss err = USBD_IOERROR;
1227 1.5 augustss goto ret;
1228 1.5 augustss }
1229 1.5 augustss hubd = ehci_hubd;
1230 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1231 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1232 1.5 augustss USETW(hubd.wHubCharacteristics,
1233 1.5 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH);
1234 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1235 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1236 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1237 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1238 1.5 augustss l = min(len, hubd.bDescLength);
1239 1.5 augustss totlen = l;
1240 1.5 augustss memcpy(buf, &hubd, l);
1241 1.5 augustss break;
1242 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1243 1.5 augustss if (len != 4) {
1244 1.5 augustss err = USBD_IOERROR;
1245 1.5 augustss goto ret;
1246 1.5 augustss }
1247 1.5 augustss memset(buf, 0, len); /* ? XXX */
1248 1.5 augustss totlen = len;
1249 1.5 augustss break;
1250 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1251 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1252 1.5 augustss index));
1253 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1254 1.5 augustss err = USBD_IOERROR;
1255 1.5 augustss goto ret;
1256 1.5 augustss }
1257 1.5 augustss if (len != 4) {
1258 1.5 augustss err = USBD_IOERROR;
1259 1.5 augustss goto ret;
1260 1.5 augustss }
1261 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1262 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1263 1.5 augustss v));
1264 1.5 augustss i = 0;
1265 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1266 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1267 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1268 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1269 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1270 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1271 1.5 augustss USETW(ps.wPortStatus, i);
1272 1.5 augustss i = 0;
1273 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1274 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1275 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1276 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1277 1.5 augustss USETW(ps.wPortChange, i);
1278 1.5 augustss l = min(len, sizeof ps);
1279 1.5 augustss memcpy(buf, &ps, l);
1280 1.5 augustss totlen = l;
1281 1.5 augustss break;
1282 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1283 1.5 augustss err = USBD_IOERROR;
1284 1.5 augustss goto ret;
1285 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1286 1.5 augustss break;
1287 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1288 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1289 1.5 augustss err = USBD_IOERROR;
1290 1.5 augustss goto ret;
1291 1.5 augustss }
1292 1.5 augustss port = EHCI_PORTSC(index);
1293 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1294 1.5 augustss switch(value) {
1295 1.5 augustss case UHF_PORT_ENABLE:
1296 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1297 1.5 augustss break;
1298 1.5 augustss case UHF_PORT_SUSPEND:
1299 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1300 1.5 augustss break;
1301 1.5 augustss case UHF_PORT_RESET:
1302 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1303 1.5 augustss index));
1304 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1305 1.6 augustss /* Low speed device, give up ownership. */
1306 1.6 augustss ehci_disown(sc, index, 1);
1307 1.6 augustss break;
1308 1.6 augustss }
1309 1.8 augustss /* Start reset sequence. */
1310 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1311 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1312 1.8 augustss /* Wait for reset to complete. */
1313 1.8 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2);
1314 1.8 augustss /* Terminate reset sequence. */
1315 1.8 augustss EOWRITE4(sc, port, v);
1316 1.8 augustss /* Wait for HC to complete reset. */
1317 1.8 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2);
1318 1.8 augustss v = EOREAD4(sc, port);
1319 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1320 1.8 augustss if (v & EHCI_PS_PR) {
1321 1.8 augustss printf("%s: port reset timeout\n",
1322 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1323 1.8 augustss return (USBD_TIMEOUT);
1324 1.5 augustss }
1325 1.8 augustss if (!(v & EHCI_PS_PE)) {
1326 1.6 augustss /* Not a high speed device, give up ownership.*/
1327 1.6 augustss ehci_disown(sc, index, 0);
1328 1.6 augustss break;
1329 1.6 augustss }
1330 1.6 augustss sc->sc_isreset = 1;
1331 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1332 1.6 augustss index, v));
1333 1.5 augustss break;
1334 1.5 augustss case UHF_PORT_POWER:
1335 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1336 1.5 augustss "%d\n", index));
1337 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1338 1.5 augustss break;
1339 1.5 augustss default:
1340 1.5 augustss err = USBD_IOERROR;
1341 1.5 augustss goto ret;
1342 1.5 augustss }
1343 1.5 augustss break;
1344 1.5 augustss default:
1345 1.5 augustss err = USBD_IOERROR;
1346 1.5 augustss goto ret;
1347 1.5 augustss }
1348 1.5 augustss xfer->actlen = totlen;
1349 1.5 augustss err = USBD_NORMAL_COMPLETION;
1350 1.5 augustss ret:
1351 1.5 augustss xfer->status = err;
1352 1.5 augustss s = splusb();
1353 1.5 augustss usb_transfer_complete(xfer);
1354 1.5 augustss splx(s);
1355 1.5 augustss return (USBD_IN_PROGRESS);
1356 1.6 augustss }
1357 1.6 augustss
1358 1.6 augustss void
1359 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1360 1.6 augustss {
1361 1.6 augustss int i, port;
1362 1.6 augustss u_int32_t v;
1363 1.6 augustss
1364 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1365 1.6 augustss #ifdef DIAGNOSTIC
1366 1.6 augustss if (sc->sc_npcomp != 0) {
1367 1.6 augustss i = (index-1) / sc->sc_npcomp;
1368 1.6 augustss if (i >= sc->sc_ncomp)
1369 1.6 augustss printf("%s: strange port\n",
1370 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1371 1.6 augustss else
1372 1.6 augustss printf("%s: handing over %s speed device on "
1373 1.6 augustss "port %d to %s\n",
1374 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1375 1.6 augustss lowspeed ? "low" : "full",
1376 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1377 1.6 augustss } else {
1378 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1379 1.6 augustss }
1380 1.6 augustss #endif
1381 1.6 augustss port = EHCI_PORTSC(index);
1382 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1383 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1384 1.5 augustss }
1385 1.5 augustss
1386 1.5 augustss /* Abort a root control request. */
1387 1.5 augustss Static void
1388 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1389 1.5 augustss {
1390 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1391 1.5 augustss }
1392 1.5 augustss
1393 1.5 augustss /* Close the root pipe. */
1394 1.5 augustss Static void
1395 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1396 1.5 augustss {
1397 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1398 1.5 augustss /* Nothing to do. */
1399 1.5 augustss }
1400 1.5 augustss
1401 1.5 augustss void
1402 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1403 1.5 augustss {
1404 1.5 augustss xfer->hcpriv = NULL;
1405 1.5 augustss }
1406 1.5 augustss
1407 1.5 augustss Static usbd_status
1408 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1409 1.5 augustss {
1410 1.5 augustss usbd_status err;
1411 1.5 augustss
1412 1.5 augustss /* Insert last in queue. */
1413 1.5 augustss err = usb_insert_transfer(xfer);
1414 1.5 augustss if (err)
1415 1.5 augustss return (err);
1416 1.5 augustss
1417 1.5 augustss /* Pipe isn't running, start first */
1418 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1419 1.5 augustss }
1420 1.5 augustss
1421 1.5 augustss Static usbd_status
1422 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1423 1.5 augustss {
1424 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1425 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1426 1.5 augustss
1427 1.5 augustss if (sc->sc_dying)
1428 1.5 augustss return (USBD_IOERROR);
1429 1.5 augustss
1430 1.5 augustss sc->sc_intrxfer = xfer;
1431 1.5 augustss
1432 1.5 augustss return (USBD_IN_PROGRESS);
1433 1.5 augustss }
1434 1.5 augustss
1435 1.5 augustss /* Abort a root interrupt request. */
1436 1.5 augustss Static void
1437 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1438 1.5 augustss {
1439 1.5 augustss int s;
1440 1.5 augustss
1441 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1442 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1443 1.5 augustss xfer->pipe->intrxfer = NULL;
1444 1.5 augustss }
1445 1.5 augustss xfer->status = USBD_CANCELLED;
1446 1.5 augustss s = splusb();
1447 1.5 augustss usb_transfer_complete(xfer);
1448 1.5 augustss splx(s);
1449 1.5 augustss }
1450 1.5 augustss
1451 1.5 augustss /* Close the root pipe. */
1452 1.5 augustss Static void
1453 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1454 1.5 augustss {
1455 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1456 1.5 augustss
1457 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1458 1.5 augustss
1459 1.5 augustss sc->sc_intrxfer = NULL;
1460 1.5 augustss }
1461 1.5 augustss
1462 1.5 augustss void
1463 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1464 1.5 augustss {
1465 1.5 augustss xfer->hcpriv = NULL;
1466 1.9 augustss }
1467 1.9 augustss
1468 1.9 augustss /************************/
1469 1.9 augustss
1470 1.9 augustss ehci_soft_qh_t *
1471 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1472 1.9 augustss {
1473 1.9 augustss ehci_soft_qh_t *sqh;
1474 1.9 augustss usbd_status err;
1475 1.9 augustss int i, offs;
1476 1.9 augustss usb_dma_t dma;
1477 1.9 augustss
1478 1.9 augustss if (sc->sc_freeqhs == NULL) {
1479 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1480 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1481 1.9 augustss EHCI_PAGE_SIZE, &dma);
1482 1.9 augustss if (err)
1483 1.9 augustss return (0);
1484 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1485 1.9 augustss offs = i * EHCI_SQH_SIZE;
1486 1.9 augustss sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1487 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1488 1.9 augustss sqh->next = sc->sc_freeqhs;
1489 1.9 augustss sc->sc_freeqhs = sqh;
1490 1.9 augustss }
1491 1.9 augustss }
1492 1.9 augustss sqh = sc->sc_freeqhs;
1493 1.9 augustss sc->sc_freeqhs = sqh->next;
1494 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1495 1.9 augustss sqh->next = 0;
1496 1.9 augustss return (sqh);
1497 1.9 augustss }
1498 1.9 augustss
1499 1.9 augustss void
1500 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1501 1.9 augustss {
1502 1.9 augustss sqh->next = sc->sc_freeqhs;
1503 1.9 augustss sc->sc_freeqhs = sqh;
1504 1.9 augustss }
1505 1.9 augustss
1506 1.9 augustss ehci_soft_qtd_t *
1507 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
1508 1.9 augustss {
1509 1.9 augustss ehci_soft_qtd_t *sqtd;
1510 1.9 augustss usbd_status err;
1511 1.9 augustss int i, offs;
1512 1.9 augustss usb_dma_t dma;
1513 1.9 augustss int s;
1514 1.9 augustss
1515 1.9 augustss if (sc->sc_freeqtds == NULL) {
1516 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1517 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1518 1.9 augustss EHCI_PAGE_SIZE, &dma);
1519 1.9 augustss if (err)
1520 1.9 augustss return (NULL);
1521 1.9 augustss s = splusb();
1522 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1523 1.9 augustss offs = i * EHCI_SQTD_SIZE;
1524 1.9 augustss sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1525 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
1526 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1527 1.9 augustss sc->sc_freeqtds = sqtd;
1528 1.9 augustss }
1529 1.9 augustss splx(s);
1530 1.9 augustss }
1531 1.9 augustss
1532 1.9 augustss s = splusb();
1533 1.9 augustss sqtd = sc->sc_freeqtds;
1534 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
1535 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1536 1.9 augustss sqtd->nextqtd = NULL;
1537 1.9 augustss sqtd->xfer = NULL;
1538 1.9 augustss ehci_hash_add_qtd(sc, sqtd);
1539 1.9 augustss splx(s);
1540 1.9 augustss
1541 1.9 augustss return (sqtd);
1542 1.9 augustss }
1543 1.9 augustss
1544 1.9 augustss void
1545 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1546 1.9 augustss {
1547 1.9 augustss int s;
1548 1.9 augustss
1549 1.9 augustss s = splusb();
1550 1.9 augustss ehci_hash_rem_qtd(sc, sqtd);
1551 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1552 1.9 augustss sc->sc_freeqtds = sqtd;
1553 1.9 augustss splx(s);
1554 1.9 augustss }
1555 1.9 augustss
1556 1.9 augustss /*
1557 1.9 augustss * When a transfer is completed the TD is added to the done queue by
1558 1.9 augustss * the host controller. This queue is the processed by software.
1559 1.9 augustss * Unfortunately the queue contains the physical address of the TD
1560 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1561 1.9 augustss * To make the translation possible (and fast) we use a hash table of
1562 1.9 augustss * TDs currently in the schedule. The physical address is used as the
1563 1.9 augustss * hash value.
1564 1.9 augustss */
1565 1.9 augustss
1566 1.9 augustss #define HASH(a) (((a) >> 4) % EHCI_HASH_SIZE)
1567 1.9 augustss /* Called at splusb() */
1568 1.9 augustss void
1569 1.9 augustss ehci_hash_add_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1570 1.9 augustss {
1571 1.9 augustss int h = HASH(sqtd->physaddr);
1572 1.9 augustss
1573 1.9 augustss SPLUSBCHECK;
1574 1.9 augustss
1575 1.9 augustss LIST_INSERT_HEAD(&sc->sc_hash_qtds[h], sqtd, hnext);
1576 1.9 augustss }
1577 1.9 augustss
1578 1.9 augustss /* Called at splusb() */
1579 1.9 augustss void
1580 1.9 augustss ehci_hash_rem_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1581 1.9 augustss {
1582 1.9 augustss SPLUSBCHECK;
1583 1.9 augustss
1584 1.9 augustss LIST_REMOVE(sqtd, hnext);
1585 1.9 augustss }
1586 1.9 augustss
1587 1.9 augustss ehci_soft_qtd_t *
1588 1.9 augustss ehci_hash_find_qtd(ehci_softc_t *sc, ehci_physaddr_t a)
1589 1.9 augustss {
1590 1.9 augustss int h = HASH(a);
1591 1.9 augustss ehci_soft_qtd_t *sqtd;
1592 1.9 augustss
1593 1.9 augustss for (sqtd = LIST_FIRST(&sc->sc_hash_qtds[h]);
1594 1.9 augustss sqtd != NULL;
1595 1.9 augustss sqtd = LIST_NEXT(sqtd, hnext))
1596 1.9 augustss if (sqtd->physaddr == a)
1597 1.9 augustss return (sqtd);
1598 1.9 augustss return (NULL);
1599 1.5 augustss }
1600 1.5 augustss
1601 1.5 augustss /************************/
1602 1.5 augustss
1603 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1604 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1605 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle xfer) { }
1606 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle pipe) { }
1607 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle xfer) { }
1608 1.5 augustss
1609 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1610 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1611 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
1612 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
1613 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
1614 1.5 augustss
1615 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1616 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1617 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
1618 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
1619 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
1620 1.5 augustss
1621 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1622 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1623 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
1624 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
1625 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
1626