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ehci.c revision 1.91.2.9
      1  1.91.2.8      tron /*	$NetBSD: ehci.c,v 1.91.2.9 2006/08/11 04:22:21 riz Exp $ */
      2       1.1  augustss 
      3       1.1  augustss /*
      4      1.61   mycroft  * Copyright (c) 2004 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8      1.61   mycroft  * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
      9       1.1  augustss  *
     10       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11       1.1  augustss  * modification, are permitted provided that the following conditions
     12       1.1  augustss  * are met:
     13       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19       1.1  augustss  *    must display the following acknowledgement:
     20       1.1  augustss  *        This product includes software developed by the NetBSD
     21       1.1  augustss  *        Foundation, Inc. and its contributors.
     22       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1  augustss  *    contributors may be used to endorse or promote products derived
     24       1.1  augustss  *    from this software without specific prior written permission.
     25       1.1  augustss  *
     26       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  augustss  */
     38       1.1  augustss 
     39       1.1  augustss /*
     40       1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     41       1.1  augustss  *
     42      1.35     enami  * The EHCI 1.0 spec can be found at
     43      1.34  augustss  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
     44       1.7  augustss  * and the USB 2.0 spec at
     45      1.43    ichiro  * http://www.usb.org/developers/docs/usb_20.zip
     46       1.1  augustss  *
     47       1.1  augustss  */
     48       1.4     lukem 
     49      1.52  jdolecek /*
     50      1.52  jdolecek  * TODO:
     51      1.52  jdolecek  * 1) hold off explorations by companion controllers until ehci has started.
     52      1.52  jdolecek  *
     53      1.52  jdolecek  * 2) The EHCI driver lacks support for interrupt isochronous transfers, so
     54      1.52  jdolecek  *    devices using them don't work.
     55      1.91     perry  *    Interrupt transfers are not difficult, it's just not done.
     56      1.52  jdolecek  *
     57      1.60   mycroft  * 3) The meaty part to implement is the support for USB 2.0 hubs.
     58      1.75   xtraeme  *    They are quite complicated since the need to be able to do
     59      1.52  jdolecek  *    "transaction translation", i.e., converting to/from USB 2 and USB 1.
     60      1.52  jdolecek  *    So the hub driver needs to handle and schedule these things, to
     61      1.52  jdolecek  *    assign place in frame where different devices get to go. See chapter
     62      1.91     perry  *    on hubs in USB 2.0 for details.
     63      1.52  jdolecek  *
     64      1.60   mycroft  * 4) command failures are not recovered correctly
     65      1.52  jdolecek */
     66      1.52  jdolecek 
     67       1.4     lukem #include <sys/cdefs.h>
     68  1.91.2.8      tron __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.91.2.9 2006/08/11 04:22:21 riz Exp $");
     69      1.47  augustss 
     70      1.47  augustss #include "ohci.h"
     71      1.47  augustss #include "uhci.h"
     72       1.1  augustss 
     73       1.1  augustss #include <sys/param.h>
     74       1.1  augustss #include <sys/systm.h>
     75       1.1  augustss #include <sys/kernel.h>
     76       1.1  augustss #include <sys/malloc.h>
     77       1.1  augustss #include <sys/device.h>
     78       1.1  augustss #include <sys/select.h>
     79       1.1  augustss #include <sys/proc.h>
     80       1.1  augustss #include <sys/queue.h>
     81       1.1  augustss 
     82       1.1  augustss #include <machine/bus.h>
     83       1.1  augustss #include <machine/endian.h>
     84       1.1  augustss 
     85       1.1  augustss #include <dev/usb/usb.h>
     86       1.1  augustss #include <dev/usb/usbdi.h>
     87       1.1  augustss #include <dev/usb/usbdivar.h>
     88       1.1  augustss #include <dev/usb/usb_mem.h>
     89       1.1  augustss #include <dev/usb/usb_quirks.h>
     90       1.1  augustss 
     91       1.1  augustss #include <dev/usb/ehcireg.h>
     92       1.1  augustss #include <dev/usb/ehcivar.h>
     93       1.1  augustss 
     94       1.1  augustss #ifdef EHCI_DEBUG
     95      1.73  augustss #define DPRINTF(x)	do { if (ehcidebug) printf x; } while(0)
     96      1.73  augustss #define DPRINTFN(n,x)	do { if (ehcidebug>(n)) printf x; } while (0)
     97       1.6  augustss int ehcidebug = 0;
     98      1.15  augustss #ifndef __NetBSD__
     99       1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    100      1.15  augustss #endif
    101       1.1  augustss #else
    102       1.1  augustss #define DPRINTF(x)
    103       1.1  augustss #define DPRINTFN(n,x)
    104       1.1  augustss #endif
    105       1.1  augustss 
    106       1.5  augustss struct ehci_pipe {
    107       1.5  augustss 	struct usbd_pipe pipe;
    108      1.55   mycroft 	int nexttoggle;
    109      1.55   mycroft 
    110      1.10  augustss 	ehci_soft_qh_t *sqh;
    111      1.10  augustss 	union {
    112      1.10  augustss 		ehci_soft_qtd_t *qtd;
    113      1.10  augustss 		/* ehci_soft_itd_t *itd; */
    114      1.10  augustss 	} tail;
    115      1.10  augustss 	union {
    116      1.10  augustss 		/* Control pipe */
    117      1.10  augustss 		struct {
    118      1.10  augustss 			usb_dma_t reqdma;
    119      1.10  augustss 			u_int length;
    120      1.19  augustss 			/*ehci_soft_qtd_t *setup, *data, *stat;*/
    121      1.10  augustss 		} ctl;
    122      1.10  augustss 		/* Interrupt pipe */
    123      1.78  augustss 		struct {
    124      1.78  augustss 			u_int length;
    125      1.78  augustss 		} intr;
    126      1.10  augustss 		/* Bulk pipe */
    127      1.10  augustss 		struct {
    128      1.10  augustss 			u_int length;
    129      1.10  augustss 		} bulk;
    130      1.10  augustss 		/* Iso pipe */
    131      1.15  augustss 		/* XXX */
    132      1.10  augustss 	} u;
    133       1.5  augustss };
    134       1.5  augustss 
    135       1.5  augustss Static void		ehci_shutdown(void *);
    136       1.5  augustss Static void		ehci_power(int, void *);
    137       1.5  augustss 
    138       1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    139       1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    140       1.5  augustss Static void		ehci_softintr(void *);
    141      1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    142      1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    143      1.18  augustss Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
    144      1.18  augustss Static void		ehci_idone(struct ehci_xfer *);
    145      1.15  augustss Static void		ehci_timeout(void *);
    146      1.15  augustss Static void		ehci_timeout_task(void *);
    147  1.91.2.8      tron Static void		ehci_intrlist_timeout(void *);
    148       1.5  augustss 
    149       1.5  augustss Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    150       1.5  augustss Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
    151       1.5  augustss 
    152       1.5  augustss Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
    153       1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    154       1.5  augustss 
    155       1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    156       1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    157       1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    158       1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    159       1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    160       1.5  augustss 
    161       1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    162       1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    163       1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    164       1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    165       1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    166       1.5  augustss 
    167       1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    168       1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    169       1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    170       1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    171       1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    172       1.5  augustss 
    173       1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    174       1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    175       1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    176       1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    177       1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    178       1.5  augustss 
    179       1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    180       1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    181       1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    182       1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    183       1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    184       1.5  augustss 
    185       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    186       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    187       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    188       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    189       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    190       1.5  augustss 
    191       1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    192       1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    193       1.5  augustss 
    194       1.5  augustss Static int		ehci_str(usb_string_descriptor_t *, int, char *);
    195       1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    196       1.6  augustss Static void		ehci_pcd_able(ehci_softc_t *, int);
    197       1.6  augustss Static void		ehci_pcd_enable(void *);
    198       1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    199       1.5  augustss 
    200       1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    201       1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    202       1.9  augustss 
    203       1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    204       1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    205      1.25  augustss Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
    206      1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    207      1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    208      1.25  augustss Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
    209      1.18  augustss 					    ehci_soft_qtd_t *);
    210      1.15  augustss 
    211      1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    212       1.9  augustss 
    213      1.78  augustss Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
    214      1.78  augustss 			    int ival);
    215      1.78  augustss 
    216      1.10  augustss Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
    217      1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    218      1.10  augustss 				    ehci_soft_qh_t *);
    219      1.23  augustss Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
    220      1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    221      1.10  augustss 
    222      1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    223      1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    224       1.9  augustss 
    225       1.5  augustss #ifdef EHCI_DEBUG
    226      1.18  augustss Static void		ehci_dump_regs(ehci_softc_t *);
    227      1.39    martin Static void		ehci_dump(void);
    228       1.6  augustss Static ehci_softc_t 	*theehci;
    229      1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    230      1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    231       1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    232       1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    233       1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    234      1.38    martin #ifdef DIAGNOSTIC
    235      1.18  augustss Static void		ehci_dump_exfer(struct ehci_xfer *);
    236       1.5  augustss #endif
    237      1.38    martin #endif
    238       1.5  augustss 
    239      1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    240      1.11  augustss 
    241       1.5  augustss #define EHCI_INTR_ENDPT 1
    242       1.5  augustss 
    243      1.18  augustss #define ehci_add_intr_list(sc, ex) \
    244      1.18  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
    245      1.18  augustss #define ehci_del_intr_list(ex) \
    246      1.44  augustss 	do { \
    247      1.44  augustss 		LIST_REMOVE((ex), inext); \
    248      1.44  augustss 		(ex)->inext.le_prev = NULL; \
    249      1.44  augustss 	} while (0)
    250      1.44  augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
    251      1.18  augustss 
    252       1.5  augustss Static struct usbd_bus_methods ehci_bus_methods = {
    253       1.5  augustss 	ehci_open,
    254       1.5  augustss 	ehci_softintr,
    255       1.5  augustss 	ehci_poll,
    256       1.5  augustss 	ehci_allocm,
    257       1.5  augustss 	ehci_freem,
    258       1.5  augustss 	ehci_allocx,
    259       1.5  augustss 	ehci_freex,
    260       1.5  augustss };
    261       1.5  augustss 
    262      1.33  augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
    263       1.5  augustss 	ehci_root_ctrl_transfer,
    264       1.5  augustss 	ehci_root_ctrl_start,
    265       1.5  augustss 	ehci_root_ctrl_abort,
    266       1.5  augustss 	ehci_root_ctrl_close,
    267       1.5  augustss 	ehci_noop,
    268       1.5  augustss 	ehci_root_ctrl_done,
    269       1.5  augustss };
    270       1.5  augustss 
    271      1.33  augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
    272       1.5  augustss 	ehci_root_intr_transfer,
    273       1.5  augustss 	ehci_root_intr_start,
    274       1.5  augustss 	ehci_root_intr_abort,
    275       1.5  augustss 	ehci_root_intr_close,
    276       1.5  augustss 	ehci_noop,
    277       1.5  augustss 	ehci_root_intr_done,
    278       1.5  augustss };
    279       1.5  augustss 
    280      1.33  augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
    281       1.5  augustss 	ehci_device_ctrl_transfer,
    282       1.5  augustss 	ehci_device_ctrl_start,
    283       1.5  augustss 	ehci_device_ctrl_abort,
    284       1.5  augustss 	ehci_device_ctrl_close,
    285       1.5  augustss 	ehci_noop,
    286       1.5  augustss 	ehci_device_ctrl_done,
    287       1.5  augustss };
    288       1.5  augustss 
    289      1.33  augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
    290       1.5  augustss 	ehci_device_intr_transfer,
    291       1.5  augustss 	ehci_device_intr_start,
    292       1.5  augustss 	ehci_device_intr_abort,
    293       1.5  augustss 	ehci_device_intr_close,
    294       1.5  augustss 	ehci_device_clear_toggle,
    295       1.5  augustss 	ehci_device_intr_done,
    296       1.5  augustss };
    297       1.5  augustss 
    298      1.33  augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
    299       1.5  augustss 	ehci_device_bulk_transfer,
    300       1.5  augustss 	ehci_device_bulk_start,
    301       1.5  augustss 	ehci_device_bulk_abort,
    302       1.5  augustss 	ehci_device_bulk_close,
    303       1.5  augustss 	ehci_device_clear_toggle,
    304       1.5  augustss 	ehci_device_bulk_done,
    305       1.5  augustss };
    306       1.5  augustss 
    307       1.5  augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
    308       1.5  augustss 	ehci_device_isoc_transfer,
    309       1.5  augustss 	ehci_device_isoc_start,
    310       1.5  augustss 	ehci_device_isoc_abort,
    311       1.5  augustss 	ehci_device_isoc_close,
    312       1.5  augustss 	ehci_noop,
    313       1.5  augustss 	ehci_device_isoc_done,
    314       1.5  augustss };
    315       1.5  augustss 
    316  1.91.2.3      tron static uint8_t revbits[EHCI_MAX_POLLRATE] = {
    317  1.91.2.4      tron 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
    318  1.91.2.4      tron 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
    319  1.91.2.4      tron 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
    320  1.91.2.4      tron 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
    321  1.91.2.4      tron 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
    322  1.91.2.4      tron 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
    323  1.91.2.4      tron 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
    324  1.91.2.4      tron 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
    325  1.91.2.3      tron };
    326  1.91.2.3      tron 
    327       1.1  augustss usbd_status
    328       1.1  augustss ehci_init(ehci_softc_t *sc)
    329       1.1  augustss {
    330       1.3  augustss 	u_int32_t version, sparams, cparams, hcr;
    331       1.3  augustss 	u_int i;
    332       1.3  augustss 	usbd_status err;
    333      1.11  augustss 	ehci_soft_qh_t *sqh;
    334      1.89  augustss 	u_int ncomp;
    335       1.3  augustss 
    336       1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    337       1.6  augustss #ifdef EHCI_DEBUG
    338       1.6  augustss 	theehci = sc;
    339       1.6  augustss #endif
    340       1.3  augustss 
    341       1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    342       1.3  augustss 
    343       1.3  augustss 	version = EREAD2(sc, EHCI_HCIVERSION);
    344      1.41   thorpej 	aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
    345       1.3  augustss 	       version >> 8, version & 0xff);
    346       1.3  augustss 
    347       1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    348       1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    349       1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    350      1.89  augustss 	ncomp = EHCI_HCS_N_CC(sparams);
    351      1.89  augustss 	if (ncomp != sc->sc_ncomp) {
    352      1.41   thorpej 		aprint_error("%s: wrong number of companions (%d != %d)\n",
    353       1.3  augustss 		       USBDEVNAME(sc->sc_bus.bdev),
    354      1.89  augustss 		       ncomp, sc->sc_ncomp);
    355      1.47  augustss #if NOHCI == 0 || NUHCI == 0
    356      1.47  augustss 		aprint_error("%s: ohci or uhci probably not configured\n",
    357      1.47  augustss 			     USBDEVNAME(sc->sc_bus.bdev));
    358      1.47  augustss #endif
    359      1.89  augustss 		if (ncomp < sc->sc_ncomp)
    360      1.89  augustss 			sc->sc_ncomp = ncomp;
    361       1.3  augustss 	}
    362       1.3  augustss 	if (sc->sc_ncomp > 0) {
    363      1.41   thorpej 		aprint_normal("%s: companion controller%s, %d port%s each:",
    364       1.3  augustss 		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
    365       1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    366       1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    367       1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    368      1.41   thorpej 			aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
    369      1.41   thorpej 		aprint_normal("\n");
    370       1.3  augustss 	}
    371       1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    372       1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    373       1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    374      1.36  augustss 
    375      1.36  augustss 	if (EHCI_HCC_64BIT(cparams)) {
    376      1.36  augustss 		/* MUST clear segment register if 64 bit capable. */
    377      1.36  augustss 		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
    378      1.36  augustss 	}
    379      1.33  augustss 
    380       1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    381       1.3  augustss 
    382      1.90      fvdl 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    383      1.90      fvdl 	    USB_MEM_RESERVE);
    384      1.90      fvdl 
    385       1.3  augustss 	/* Reset the controller */
    386       1.3  augustss 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    387       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    388       1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    389       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    390       1.3  augustss 	for (i = 0; i < 100; i++) {
    391      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    392       1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    393       1.3  augustss 		if (!hcr)
    394       1.3  augustss 			break;
    395       1.3  augustss 	}
    396       1.3  augustss 	if (hcr) {
    397      1.41   thorpej 		aprint_error("%s: reset timeout\n",
    398      1.41   thorpej 		    USBDEVNAME(sc->sc_bus.bdev));
    399       1.3  augustss 		return (USBD_IOERROR);
    400       1.3  augustss 	}
    401       1.3  augustss 
    402      1.78  augustss 	/* XXX need proper intr scheduling */
    403      1.78  augustss 	sc->sc_rand = 96;
    404      1.78  augustss 
    405       1.3  augustss 	/* frame list size at default, read back what we got and use that */
    406       1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    407      1.78  augustss 	case 0: sc->sc_flsize = 1024; break;
    408      1.78  augustss 	case 1: sc->sc_flsize = 512; break;
    409      1.78  augustss 	case 2: sc->sc_flsize = 256; break;
    410       1.3  augustss 	case 3: return (USBD_IOERROR);
    411       1.3  augustss 	}
    412      1.78  augustss 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
    413      1.78  augustss 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    414       1.3  augustss 	if (err)
    415       1.3  augustss 		return (err);
    416       1.3  augustss 	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
    417      1.78  augustss 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
    418      1.78  augustss 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
    419       1.3  augustss 
    420       1.5  augustss 	/* Set up the bus struct. */
    421       1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    422       1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    423       1.5  augustss 
    424       1.5  augustss 	sc->sc_powerhook = powerhook_establish(ehci_power, sc);
    425       1.5  augustss 	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
    426       1.5  augustss 
    427       1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    428       1.6  augustss 
    429      1.78  augustss 	/*
    430      1.78  augustss 	 * Allocate the interrupt dummy QHs. These are arranged to give poll
    431      1.78  augustss 	 * intervals that are powers of 2 times 1ms.
    432      1.78  augustss 	 */
    433      1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    434      1.78  augustss 		sqh = ehci_alloc_sqh(sc);
    435      1.78  augustss 		if (sqh == NULL) {
    436      1.78  augustss 			err = USBD_NOMEM;
    437      1.78  augustss 			goto bad1;
    438      1.78  augustss 		}
    439      1.78  augustss 		sc->sc_islots[i].sqh = sqh;
    440      1.78  augustss 	}
    441      1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    442      1.78  augustss 		sqh = sc->sc_islots[i].sqh;
    443      1.78  augustss 		if (i == 0) {
    444      1.78  augustss 			/* The last (1ms) QH terminates. */
    445      1.78  augustss 			sqh->qh.qh_link = EHCI_NULL;
    446      1.78  augustss 			sqh->next = NULL;
    447      1.78  augustss 		} else {
    448      1.78  augustss 			/* Otherwise the next QH has half the poll interval */
    449      1.78  augustss 			sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
    450      1.78  augustss 			sqh->qh.qh_link = htole32(sqh->next->physaddr |
    451      1.78  augustss 			    EHCI_LINK_QH);
    452      1.78  augustss 		}
    453      1.78  augustss 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
    454      1.78  augustss 		sqh->qh.qh_curqtd = EHCI_NULL;
    455      1.78  augustss 		sqh->next = NULL;
    456      1.78  augustss 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    457      1.78  augustss 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    458      1.78  augustss 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    459      1.78  augustss 		sqh->sqtd = NULL;
    460      1.78  augustss 	}
    461      1.78  augustss 	/* Point the frame list at the last level (128ms). */
    462      1.78  augustss 	for (i = 0; i < sc->sc_flsize; i++) {
    463  1.91.2.3      tron 		int j;
    464  1.91.2.3      tron 
    465  1.91.2.3      tron 		j = (i & ~(EHCI_MAX_POLLRATE-1)) |
    466  1.91.2.3      tron 		    revbits[i & (EHCI_MAX_POLLRATE-1)];
    467  1.91.2.3      tron 		sc->sc_flist[j] = htole32(EHCI_LINK_QH |
    468      1.78  augustss 		    sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
    469      1.78  augustss 		    i)].sqh->physaddr);
    470      1.78  augustss 	}
    471      1.78  augustss 
    472      1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    473      1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    474      1.11  augustss 	if (sqh == NULL) {
    475       1.9  augustss 		err = USBD_NOMEM;
    476       1.9  augustss 		goto bad1;
    477       1.9  augustss 	}
    478      1.11  augustss 	/* Fill the QH */
    479      1.11  augustss 	sqh->qh.qh_endp =
    480      1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    481      1.11  augustss 	sqh->qh.qh_link =
    482      1.11  augustss 	    htole32(sqh->physaddr | EHCI_LINK_QH);
    483      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    484      1.11  augustss 	sqh->next = NULL;
    485      1.11  augustss 	/* Fill the overlay qTD */
    486      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    487      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    488      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    489      1.11  augustss 	sqh->sqtd = NULL;
    490       1.9  augustss #ifdef EHCI_DEBUG
    491       1.9  augustss 	if (ehcidebug) {
    492      1.27     enami 		ehci_dump_sqh(sqh);
    493       1.9  augustss 	}
    494       1.9  augustss #endif
    495       1.9  augustss 
    496       1.9  augustss 	/* Point to async list */
    497      1.11  augustss 	sc->sc_async_head = sqh;
    498      1.11  augustss 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
    499       1.9  augustss 
    500       1.9  augustss 	usb_callout_init(sc->sc_tmo_pcd);
    501  1.91.2.8      tron 	usb_callout_init(sc->sc_tmo_intrlist);
    502       1.9  augustss 
    503      1.10  augustss 	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
    504      1.10  augustss 
    505       1.6  augustss 	/* Enable interrupts */
    506       1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    507       1.6  augustss 
    508       1.6  augustss 	/* Turn on controller */
    509       1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    510      1.88  augustss 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
    511       1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    512      1.10  augustss 		 EHCI_CMD_ASE |
    513      1.78  augustss 		 EHCI_CMD_PSE |
    514       1.6  augustss 		 EHCI_CMD_RS);
    515       1.6  augustss 
    516       1.6  augustss 	/* Take over port ownership */
    517       1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    518       1.6  augustss 
    519       1.8  augustss 	for (i = 0; i < 100; i++) {
    520      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    521       1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    522       1.8  augustss 		if (!hcr)
    523       1.8  augustss 			break;
    524       1.8  augustss 	}
    525       1.8  augustss 	if (hcr) {
    526      1.41   thorpej 		aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    527       1.8  augustss 		return (USBD_IOERROR);
    528       1.8  augustss 	}
    529       1.8  augustss 
    530       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    531       1.9  augustss 
    532       1.9  augustss #if 0
    533      1.11  augustss  bad2:
    534      1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    535       1.9  augustss #endif
    536       1.9  augustss  bad1:
    537       1.9  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
    538       1.9  augustss 	return (err);
    539       1.1  augustss }
    540       1.1  augustss 
    541       1.1  augustss int
    542       1.1  augustss ehci_intr(void *v)
    543       1.1  augustss {
    544       1.6  augustss 	ehci_softc_t *sc = v;
    545       1.6  augustss 
    546      1.17  augustss 	if (sc == NULL || sc->sc_dying)
    547      1.15  augustss 		return (0);
    548      1.15  augustss 
    549       1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    550       1.6  augustss 	if (sc->sc_bus.use_polling) {
    551      1.78  augustss 		u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    552      1.78  augustss 
    553      1.78  augustss 		if (intrs)
    554      1.78  augustss 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    555       1.6  augustss #ifdef DIAGNOSTIC
    556      1.65   mycroft 		DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
    557       1.6  augustss #endif
    558       1.6  augustss 		return (0);
    559       1.6  augustss 	}
    560       1.6  augustss 
    561      1.33  augustss 	return (ehci_intr1(sc));
    562       1.6  augustss }
    563       1.6  augustss 
    564       1.6  augustss Static int
    565       1.6  augustss ehci_intr1(ehci_softc_t *sc)
    566       1.6  augustss {
    567       1.6  augustss 	u_int32_t intrs, eintrs;
    568       1.6  augustss 
    569       1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    570       1.6  augustss 
    571       1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    572       1.6  augustss 	if (sc == NULL) {
    573       1.6  augustss #ifdef DIAGNOSTIC
    574      1.72  augustss 		printf("ehci_intr1: sc == NULL\n");
    575       1.6  augustss #endif
    576       1.6  augustss 		return (0);
    577       1.6  augustss 	}
    578       1.6  augustss 
    579       1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    580       1.6  augustss 	if (!intrs)
    581       1.6  augustss 		return (0);
    582       1.6  augustss 
    583       1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    584      1.72  augustss 	DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    585       1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    586       1.6  augustss 		     (u_int)eintrs));
    587       1.6  augustss 	if (!eintrs)
    588       1.6  augustss 		return (0);
    589       1.6  augustss 
    590      1.68   mycroft 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    591       1.6  augustss 	sc->sc_bus.intr_context++;
    592       1.6  augustss 	sc->sc_bus.no_intrs++;
    593      1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    594      1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    595      1.11  augustss 		wakeup(&sc->sc_async_head);
    596      1.20  augustss 		eintrs &= ~EHCI_STS_IAA;
    597      1.10  augustss 	}
    598      1.18  augustss 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
    599      1.46  augustss 		DPRINTFN(5,("ehci_intr1: %s %s\n",
    600      1.46  augustss 			    eintrs & EHCI_STS_INT ? "INT" : "",
    601      1.46  augustss 			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
    602      1.18  augustss 		usb_schedsoftintr(&sc->sc_bus);
    603      1.21  augustss 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
    604       1.6  augustss 	}
    605       1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    606       1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    607       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
    608       1.6  augustss 		/* XXX what else */
    609       1.6  augustss 	}
    610       1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    611       1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    612      1.33  augustss 		/*
    613       1.6  augustss 		 * Disable PCD interrupt for now, because it will be
    614       1.6  augustss 		 * on until the port has been reset.
    615       1.6  augustss 		 */
    616       1.6  augustss 		ehci_pcd_able(sc, 0);
    617       1.6  augustss 		/* Do not allow RHSC interrupts > 1 per second */
    618       1.6  augustss                 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
    619       1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    620       1.6  augustss 	}
    621       1.6  augustss 
    622       1.6  augustss 	sc->sc_bus.intr_context--;
    623       1.6  augustss 
    624       1.6  augustss 	if (eintrs != 0) {
    625       1.6  augustss 		/* Block unprocessed interrupts. */
    626       1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    627       1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    628       1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    629       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
    630       1.6  augustss 	}
    631       1.6  augustss 
    632       1.6  augustss 	return (1);
    633       1.6  augustss }
    634       1.6  augustss 
    635       1.6  augustss void
    636       1.6  augustss ehci_pcd_able(ehci_softc_t *sc, int on)
    637       1.6  augustss {
    638       1.6  augustss 	DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
    639       1.6  augustss 	if (on)
    640       1.6  augustss 		sc->sc_eintrs |= EHCI_STS_PCD;
    641       1.6  augustss 	else
    642       1.6  augustss 		sc->sc_eintrs &= ~EHCI_STS_PCD;
    643       1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    644       1.6  augustss }
    645       1.6  augustss 
    646       1.6  augustss void
    647       1.6  augustss ehci_pcd_enable(void *v_sc)
    648       1.6  augustss {
    649       1.6  augustss 	ehci_softc_t *sc = v_sc;
    650       1.6  augustss 
    651       1.6  augustss 	ehci_pcd_able(sc, 1);
    652       1.6  augustss }
    653       1.6  augustss 
    654       1.6  augustss void
    655       1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    656       1.6  augustss {
    657       1.6  augustss 	usbd_pipe_handle pipe;
    658       1.6  augustss 	u_char *p;
    659       1.6  augustss 	int i, m;
    660       1.6  augustss 
    661       1.6  augustss 	if (xfer == NULL) {
    662       1.6  augustss 		/* Just ignore the change. */
    663       1.6  augustss 		return;
    664       1.6  augustss 	}
    665       1.6  augustss 
    666       1.6  augustss 	pipe = xfer->pipe;
    667       1.6  augustss 
    668      1.30  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
    669       1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    670       1.6  augustss 	memset(p, 0, xfer->length);
    671       1.6  augustss 	for (i = 1; i <= m; i++) {
    672       1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    673       1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    674       1.6  augustss 			p[i/8] |= 1 << (i%8);
    675       1.6  augustss 	}
    676       1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    677       1.6  augustss 	xfer->actlen = xfer->length;
    678       1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    679       1.6  augustss 
    680       1.6  augustss 	usb_transfer_complete(xfer);
    681       1.1  augustss }
    682       1.1  augustss 
    683       1.5  augustss void
    684       1.5  augustss ehci_softintr(void *v)
    685       1.5  augustss {
    686      1.18  augustss 	ehci_softc_t *sc = v;
    687      1.53       chs 	struct ehci_xfer *ex, *nextex;
    688      1.18  augustss 
    689      1.18  augustss 	DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
    690      1.18  augustss 		     sc->sc_bus.intr_context));
    691      1.18  augustss 
    692      1.18  augustss 	sc->sc_bus.intr_context++;
    693      1.18  augustss 
    694      1.18  augustss 	/*
    695      1.18  augustss 	 * The only explanation I can think of for why EHCI is as brain dead
    696      1.18  augustss 	 * as UHCI interrupt-wise is that Intel was involved in both.
    697      1.18  augustss 	 * An interrupt just tells us that something is done, we have no
    698      1.18  augustss 	 * clue what, so we need to scan through all active transfers. :-(
    699      1.18  augustss 	 */
    700      1.53       chs 	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
    701      1.53       chs 		nextex = LIST_NEXT(ex, inext);
    702      1.18  augustss 		ehci_check_intr(sc, ex);
    703      1.53       chs 	}
    704      1.18  augustss 
    705  1.91.2.8      tron 	/* Schedule a callout to catch any dropped transactions. */
    706  1.91.2.8      tron 	if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
    707  1.91.2.8      tron 	    !LIST_EMPTY(&sc->sc_intrhead))
    708  1.91.2.8      tron 		usb_callout(sc->sc_tmo_intrlist, hz,
    709  1.91.2.8      tron 		    ehci_intrlist_timeout, sc);
    710  1.91.2.8      tron 
    711      1.77  augustss #ifdef USB_USE_SOFTINTR
    712      1.29  augustss 	if (sc->sc_softwake) {
    713      1.29  augustss 		sc->sc_softwake = 0;
    714      1.29  augustss 		wakeup(&sc->sc_softwake);
    715      1.29  augustss 	}
    716      1.77  augustss #endif /* USB_USE_SOFTINTR */
    717      1.29  augustss 
    718      1.18  augustss 	sc->sc_bus.intr_context--;
    719      1.18  augustss }
    720      1.18  augustss 
    721      1.18  augustss /* Check for an interrupt. */
    722      1.18  augustss void
    723      1.18  augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
    724      1.18  augustss {
    725      1.18  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    726      1.18  augustss 	u_int32_t status;
    727      1.18  augustss 
    728      1.22  augustss 	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
    729      1.18  augustss 
    730      1.18  augustss 	if (ex->sqtdstart == NULL) {
    731      1.18  augustss 		printf("ehci_check_intr: sqtdstart=NULL\n");
    732      1.18  augustss 		return;
    733      1.18  augustss 	}
    734      1.18  augustss 	lsqtd = ex->sqtdend;
    735      1.18  augustss #ifdef DIAGNOSTIC
    736      1.18  augustss 	if (lsqtd == NULL) {
    737      1.84  augustss 		printf("ehci_check_intr: lsqtd==0\n");
    738      1.18  augustss 		return;
    739      1.18  augustss 	}
    740      1.18  augustss #endif
    741      1.33  augustss 	/*
    742      1.18  augustss 	 * If the last TD is still active we need to check whether there
    743      1.18  augustss 	 * is a an error somewhere in the middle, or whether there was a
    744      1.18  augustss 	 * short packet (SPD and not ACTIVE).
    745      1.18  augustss 	 */
    746      1.18  augustss 	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
    747      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
    748      1.18  augustss 		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
    749      1.18  augustss 			status = le32toh(sqtd->qtd.qtd_status);
    750      1.18  augustss 			/* If there's an active QTD the xfer isn't done. */
    751      1.18  augustss 			if (status & EHCI_QTD_ACTIVE)
    752      1.18  augustss 				break;
    753      1.18  augustss 			/* Any kind of error makes the xfer done. */
    754      1.18  augustss 			if (status & EHCI_QTD_HALTED)
    755      1.18  augustss 				goto done;
    756      1.18  augustss 			/* We want short packets, and it is short: it's done */
    757      1.58   mycroft 			if (EHCI_QTD_GET_BYTES(status) != 0)
    758      1.18  augustss 				goto done;
    759      1.18  augustss 		}
    760      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
    761      1.18  augustss 			      ex, ex->sqtdstart));
    762      1.18  augustss 		return;
    763      1.18  augustss 	}
    764      1.18  augustss  done:
    765      1.18  augustss 	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
    766      1.18  augustss 	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
    767      1.18  augustss 	ehci_idone(ex);
    768      1.18  augustss }
    769      1.18  augustss 
    770      1.18  augustss void
    771      1.18  augustss ehci_idone(struct ehci_xfer *ex)
    772      1.18  augustss {
    773      1.18  augustss 	usbd_xfer_handle xfer = &ex->xfer;
    774      1.18  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
    775      1.82  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    776      1.82  augustss 	u_int32_t status = 0, nstatus = 0;
    777      1.18  augustss 	int actlen;
    778      1.82  augustss 	uint pkts_left;
    779      1.18  augustss 
    780      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
    781      1.18  augustss #ifdef DIAGNOSTIC
    782      1.18  augustss 	{
    783      1.18  augustss 		int s = splhigh();
    784      1.18  augustss 		if (ex->isdone) {
    785      1.18  augustss 			splx(s);
    786      1.18  augustss #ifdef EHCI_DEBUG
    787      1.18  augustss 			printf("ehci_idone: ex is done!\n   ");
    788      1.18  augustss 			ehci_dump_exfer(ex);
    789      1.18  augustss #else
    790      1.18  augustss 			printf("ehci_idone: ex=%p is done!\n", ex);
    791      1.18  augustss #endif
    792      1.18  augustss 			return;
    793      1.18  augustss 		}
    794      1.18  augustss 		ex->isdone = 1;
    795      1.18  augustss 		splx(s);
    796      1.18  augustss 	}
    797      1.18  augustss #endif
    798      1.18  augustss 
    799      1.18  augustss 	if (xfer->status == USBD_CANCELLED ||
    800      1.18  augustss 	    xfer->status == USBD_TIMEOUT) {
    801      1.18  augustss 		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
    802      1.18  augustss 		return;
    803      1.18  augustss 	}
    804      1.18  augustss 
    805      1.18  augustss #ifdef EHCI_DEBUG
    806      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
    807      1.18  augustss 	if (ehcidebug > 10)
    808      1.18  augustss 		ehci_dump_sqtds(ex->sqtdstart);
    809      1.18  augustss #endif
    810      1.18  augustss 
    811      1.18  augustss 	/* The transfer is done, compute actual length and status. */
    812      1.82  augustss 	lsqtd = ex->sqtdend;
    813      1.18  augustss 	actlen = 0;
    814      1.82  augustss 	for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
    815      1.18  augustss 		nstatus = le32toh(sqtd->qtd.qtd_status);
    816      1.18  augustss 		if (nstatus & EHCI_QTD_ACTIVE)
    817      1.18  augustss 			break;
    818      1.18  augustss 
    819      1.18  augustss 		status = nstatus;
    820      1.18  augustss 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
    821      1.18  augustss 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
    822      1.18  augustss 	}
    823      1.22  augustss 
    824      1.91     perry 	/*
    825      1.86  augustss 	 * If there are left over TDs we need to update the toggle.
    826      1.86  augustss 	 * The default pipe doesn't need it since control transfers
    827      1.86  augustss 	 * start the toggle at 0 every time.
    828      1.86  augustss 	 */
    829      1.91     perry 	if (sqtd != lsqtd->nextqtd &&
    830      1.82  augustss 	    xfer->pipe->device->default_pipe != xfer->pipe) {
    831      1.81  augustss 		printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus);
    832      1.58   mycroft #if 0
    833      1.58   mycroft 		ehci_dump_sqh(epipe->sqh);
    834      1.58   mycroft 		ehci_dump_sqtds(ex->sqtdstart);
    835      1.58   mycroft #endif
    836      1.58   mycroft 		epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
    837      1.22  augustss 	}
    838      1.18  augustss 
    839      1.91     perry 	/*
    840      1.82  augustss 	 * For a short transfer we need to update the toggle for the missing
    841      1.82  augustss 	 * packets within the qTD.
    842      1.82  augustss 	 */
    843      1.82  augustss 	pkts_left = EHCI_QTD_GET_BYTES(status) /
    844      1.82  augustss 	    UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize);
    845      1.82  augustss 	epipe->nexttoggle ^= pkts_left % 2;
    846      1.82  augustss 
    847      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
    848      1.22  augustss 			   xfer->length, actlen, status));
    849      1.18  augustss 	xfer->actlen = actlen;
    850  1.91.2.5      tron 	if (status & EHCI_QTD_HALTED) {
    851      1.18  augustss #ifdef EHCI_DEBUG
    852      1.18  augustss 		char sbuf[128];
    853      1.18  augustss 
    854      1.18  augustss 		bitmask_snprintf((u_int32_t)status,
    855      1.63   mycroft 				 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    856  1.91.2.5      tron 				 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf));
    857      1.18  augustss 
    858  1.91.2.5      tron 		DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, "
    859      1.18  augustss 			  "status 0x%s\n",
    860      1.18  augustss 			  xfer->pipe->device->address,
    861      1.18  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
    862      1.18  augustss 			  sbuf));
    863      1.23  augustss 		if (ehcidebug > 2) {
    864      1.23  augustss 			ehci_dump_sqh(epipe->sqh);
    865      1.23  augustss 			ehci_dump_sqtds(ex->sqtdstart);
    866      1.23  augustss 		}
    867      1.18  augustss #endif
    868  1.91.2.5      tron 		/* low&full speed has an extra error flag */
    869  1.91.2.5      tron 		if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
    870  1.91.2.5      tron 		    EHCI_QH_SPEED_HIGH)
    871  1.91.2.5      tron 			status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
    872  1.91.2.5      tron 		else
    873  1.91.2.5      tron 			status &= EHCI_QTD_STATERRS;
    874  1.91.2.5      tron 		if (status == 0) /* no other errors means a stall */
    875      1.18  augustss 			xfer->status = USBD_STALLED;
    876      1.18  augustss 		else
    877      1.18  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
    878  1.91.2.5      tron 		/* XXX need to reset TT on missed microframe */
    879  1.91.2.5      tron 		if (status & EHCI_QTD_MISSEDMICRO) {
    880  1.91.2.5      tron 			ehci_softc_t *sc = (ehci_softc_t *)
    881  1.91.2.5      tron 			    xfer->pipe->device->bus;
    882  1.91.2.5      tron 
    883  1.91.2.5      tron 			printf("%s: missed microframe, TT reset not "
    884  1.91.2.5      tron 			    "implemented, hub might be inoperational\n",
    885  1.91.2.5      tron 			    USBDEVNAME(sc->sc_bus.bdev));
    886  1.91.2.5      tron 		}
    887      1.18  augustss 	} else {
    888      1.18  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
    889      1.18  augustss 	}
    890      1.18  augustss 
    891      1.18  augustss 	usb_transfer_complete(xfer);
    892      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
    893       1.5  augustss }
    894       1.5  augustss 
    895      1.15  augustss /*
    896      1.15  augustss  * Wait here until controller claims to have an interrupt.
    897      1.18  augustss  * Then call ehci_intr and return.  Use timeout to avoid waiting
    898      1.15  augustss  * too long.
    899      1.15  augustss  */
    900      1.15  augustss void
    901      1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    902      1.15  augustss {
    903      1.15  augustss 	int timo = xfer->timeout;
    904      1.15  augustss 	int usecs;
    905      1.15  augustss 	u_int32_t intrs;
    906      1.15  augustss 
    907      1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    908      1.15  augustss 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    909      1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    910      1.17  augustss 		if (sc->sc_dying)
    911      1.17  augustss 			break;
    912      1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    913      1.15  augustss 			sc->sc_eintrs;
    914      1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    915      1.70      yamt #ifdef EHCI_DEBUG
    916      1.15  augustss 		if (ehcidebug > 15)
    917      1.18  augustss 			ehci_dump_regs(sc);
    918      1.15  augustss #endif
    919      1.15  augustss 		if (intrs) {
    920      1.15  augustss 			ehci_intr1(sc);
    921      1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    922      1.15  augustss 				return;
    923      1.15  augustss 		}
    924      1.15  augustss 	}
    925      1.15  augustss 
    926      1.15  augustss 	/* Timeout */
    927      1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    928      1.15  augustss 	xfer->status = USBD_TIMEOUT;
    929      1.15  augustss 	usb_transfer_complete(xfer);
    930      1.15  augustss 	/* XXX should free TD */
    931      1.15  augustss }
    932      1.15  augustss 
    933       1.5  augustss void
    934       1.5  augustss ehci_poll(struct usbd_bus *bus)
    935       1.5  augustss {
    936       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)bus;
    937       1.5  augustss #ifdef EHCI_DEBUG
    938       1.5  augustss 	static int last;
    939       1.5  augustss 	int new;
    940       1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    941       1.5  augustss 	if (new != last) {
    942       1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    943       1.5  augustss 		last = new;
    944       1.5  augustss 	}
    945       1.5  augustss #endif
    946       1.5  augustss 
    947       1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    948       1.5  augustss 		ehci_intr1(sc);
    949       1.5  augustss }
    950       1.5  augustss 
    951       1.1  augustss int
    952       1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    953       1.1  augustss {
    954       1.1  augustss 	int rv = 0;
    955       1.1  augustss 
    956       1.1  augustss 	if (sc->sc_child != NULL)
    957       1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    958      1.33  augustss 
    959       1.1  augustss 	if (rv != 0)
    960       1.1  augustss 		return (rv);
    961       1.1  augustss 
    962  1.91.2.8      tron 	usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
    963       1.6  augustss 	usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
    964       1.6  augustss 
    965       1.1  augustss 	if (sc->sc_powerhook != NULL)
    966       1.1  augustss 		powerhook_disestablish(sc->sc_powerhook);
    967       1.1  augustss 	if (sc->sc_shutdownhook != NULL)
    968       1.1  augustss 		shutdownhook_disestablish(sc->sc_shutdownhook);
    969       1.1  augustss 
    970      1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    971      1.15  augustss 
    972       1.1  augustss 	/* XXX free other data structures XXX */
    973       1.1  augustss 
    974       1.1  augustss 	return (rv);
    975       1.1  augustss }
    976       1.1  augustss 
    977       1.1  augustss 
    978       1.1  augustss int
    979       1.1  augustss ehci_activate(device_ptr_t self, enum devact act)
    980       1.1  augustss {
    981       1.1  augustss 	struct ehci_softc *sc = (struct ehci_softc *)self;
    982       1.1  augustss 	int rv = 0;
    983       1.1  augustss 
    984       1.1  augustss 	switch (act) {
    985       1.1  augustss 	case DVACT_ACTIVATE:
    986       1.1  augustss 		return (EOPNOTSUPP);
    987       1.1  augustss 
    988       1.1  augustss 	case DVACT_DEACTIVATE:
    989       1.1  augustss 		if (sc->sc_child != NULL)
    990       1.1  augustss 			rv = config_deactivate(sc->sc_child);
    991       1.5  augustss 		sc->sc_dying = 1;
    992       1.1  augustss 		break;
    993       1.1  augustss 	}
    994       1.1  augustss 	return (rv);
    995       1.1  augustss }
    996       1.1  augustss 
    997       1.5  augustss /*
    998       1.5  augustss  * Handle suspend/resume.
    999       1.5  augustss  *
   1000       1.5  augustss  * We need to switch to polling mode here, because this routine is
   1001      1.73  augustss  * called from an interrupt context.  This is all right since we
   1002       1.5  augustss  * are almost suspended anyway.
   1003       1.5  augustss  */
   1004       1.5  augustss void
   1005       1.5  augustss ehci_power(int why, void *v)
   1006       1.5  augustss {
   1007       1.5  augustss 	ehci_softc_t *sc = v;
   1008      1.74  augustss 	u_int32_t cmd, hcr;
   1009      1.74  augustss 	int s, i;
   1010       1.5  augustss 
   1011       1.5  augustss #ifdef EHCI_DEBUG
   1012       1.5  augustss 	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
   1013      1.74  augustss 	if (ehcidebug > 0)
   1014      1.74  augustss 		ehci_dump_regs(sc);
   1015       1.5  augustss #endif
   1016       1.5  augustss 
   1017       1.5  augustss 	s = splhardusb();
   1018       1.5  augustss 	switch (why) {
   1019       1.5  augustss 	case PWR_SUSPEND:
   1020       1.5  augustss 	case PWR_STANDBY:
   1021       1.5  augustss 		sc->sc_bus.use_polling++;
   1022      1.74  augustss 
   1023      1.74  augustss 		sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
   1024      1.74  augustss 
   1025      1.74  augustss 		cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
   1026      1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1027      1.74  augustss 
   1028      1.74  augustss 		for (i = 0; i < 100; i++) {
   1029      1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) &
   1030      1.74  augustss 			    (EHCI_STS_ASS | EHCI_STS_PSS);
   1031      1.74  augustss 			if (hcr == 0)
   1032      1.74  augustss 				break;
   1033      1.74  augustss 
   1034      1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1035      1.74  augustss 		}
   1036      1.74  augustss 		if (hcr != 0) {
   1037      1.74  augustss 			printf("%s: reset timeout\n",
   1038      1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1039      1.74  augustss 		}
   1040      1.74  augustss 
   1041      1.74  augustss 		cmd &= ~EHCI_CMD_RS;
   1042      1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1043      1.74  augustss 
   1044      1.74  augustss 		for (i = 0; i < 100; i++) {
   1045      1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1046      1.74  augustss 			if (hcr == EHCI_STS_HCH)
   1047      1.74  augustss 				break;
   1048      1.74  augustss 
   1049      1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1050      1.74  augustss 		}
   1051      1.74  augustss 		if (hcr != EHCI_STS_HCH) {
   1052      1.74  augustss 			printf("%s: config timeout\n",
   1053      1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1054       1.5  augustss 		}
   1055      1.74  augustss 
   1056       1.5  augustss 		sc->sc_bus.use_polling--;
   1057       1.5  augustss 		break;
   1058      1.74  augustss 
   1059       1.5  augustss 	case PWR_RESUME:
   1060       1.5  augustss 		sc->sc_bus.use_polling++;
   1061      1.74  augustss 
   1062      1.74  augustss 		/* restore things in case the bios sucks */
   1063      1.74  augustss 		EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
   1064      1.74  augustss 		EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
   1065      1.74  augustss 		EOWRITE4(sc, EHCI_ASYNCLISTADDR,
   1066      1.74  augustss 		    sc->sc_async_head->physaddr | EHCI_LINK_QH);
   1067      1.74  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1068      1.74  augustss 
   1069      1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1070      1.74  augustss 
   1071      1.74  augustss 		for (i = 0; i < 100; i++) {
   1072      1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1073      1.74  augustss 			if (hcr != EHCI_STS_HCH)
   1074      1.74  augustss 				break;
   1075      1.74  augustss 
   1076      1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1077      1.74  augustss 		}
   1078      1.74  augustss 		if (hcr == EHCI_STS_HCH) {
   1079      1.74  augustss 			printf("%s: config timeout\n",
   1080      1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1081      1.74  augustss 		}
   1082      1.74  augustss 
   1083      1.74  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1084      1.74  augustss 
   1085       1.5  augustss 		sc->sc_bus.use_polling--;
   1086       1.5  augustss 		break;
   1087       1.5  augustss 	case PWR_SOFTSUSPEND:
   1088       1.5  augustss 	case PWR_SOFTSTANDBY:
   1089       1.5  augustss 	case PWR_SOFTRESUME:
   1090       1.5  augustss 		break;
   1091       1.5  augustss 	}
   1092       1.5  augustss 	splx(s);
   1093      1.74  augustss 
   1094      1.74  augustss #ifdef EHCI_DEBUG
   1095      1.74  augustss 	DPRINTF(("ehci_power: sc=%p\n", sc));
   1096      1.74  augustss 	if (ehcidebug > 0)
   1097      1.74  augustss 		ehci_dump_regs(sc);
   1098      1.74  augustss #endif
   1099       1.5  augustss }
   1100       1.5  augustss 
   1101       1.5  augustss /*
   1102       1.5  augustss  * Shut down the controller when the system is going down.
   1103       1.5  augustss  */
   1104       1.5  augustss void
   1105       1.5  augustss ehci_shutdown(void *v)
   1106       1.5  augustss {
   1107       1.8  augustss 	ehci_softc_t *sc = v;
   1108       1.5  augustss 
   1109       1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
   1110       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
   1111       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1112       1.5  augustss }
   1113       1.5  augustss 
   1114       1.5  augustss usbd_status
   1115       1.5  augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
   1116       1.5  augustss {
   1117       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1118      1.25  augustss 	usbd_status err;
   1119       1.5  augustss 
   1120      1.25  augustss 	err = usb_allocmem(&sc->sc_bus, size, 0, dma);
   1121      1.90      fvdl 	if (err == USBD_NOMEM)
   1122      1.90      fvdl 		err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
   1123      1.25  augustss #ifdef EHCI_DEBUG
   1124      1.25  augustss 	if (err)
   1125      1.25  augustss 		printf("ehci_allocm: usb_allocmem()=%d\n", err);
   1126      1.25  augustss #endif
   1127      1.25  augustss 	return (err);
   1128       1.5  augustss }
   1129       1.5  augustss 
   1130       1.5  augustss void
   1131       1.5  augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
   1132       1.5  augustss {
   1133       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1134       1.5  augustss 
   1135      1.90      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
   1136      1.90      fvdl 		usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve,
   1137      1.90      fvdl 		    dma);
   1138      1.90      fvdl 		return;
   1139      1.90      fvdl 	}
   1140       1.5  augustss 	usb_freemem(&sc->sc_bus, dma);
   1141       1.5  augustss }
   1142       1.5  augustss 
   1143       1.5  augustss usbd_xfer_handle
   1144       1.5  augustss ehci_allocx(struct usbd_bus *bus)
   1145       1.5  augustss {
   1146       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1147       1.5  augustss 	usbd_xfer_handle xfer;
   1148       1.5  augustss 
   1149       1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
   1150      1.28  augustss 	if (xfer != NULL) {
   1151      1.32     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1152      1.28  augustss #ifdef DIAGNOSTIC
   1153      1.28  augustss 		if (xfer->busy_free != XFER_FREE) {
   1154      1.72  augustss 			printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
   1155      1.28  augustss 			       xfer->busy_free);
   1156      1.28  augustss 		}
   1157      1.28  augustss #endif
   1158      1.28  augustss 	} else {
   1159      1.15  augustss 		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
   1160      1.28  augustss 	}
   1161      1.18  augustss 	if (xfer != NULL) {
   1162      1.71  augustss 		memset(xfer, 0, sizeof(struct ehci_xfer));
   1163      1.18  augustss #ifdef DIAGNOSTIC
   1164      1.18  augustss 		EXFER(xfer)->isdone = 1;
   1165      1.18  augustss 		xfer->busy_free = XFER_BUSY;
   1166      1.18  augustss #endif
   1167      1.18  augustss 	}
   1168       1.5  augustss 	return (xfer);
   1169       1.5  augustss }
   1170       1.5  augustss 
   1171       1.5  augustss void
   1172       1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
   1173       1.5  augustss {
   1174       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1175       1.5  augustss 
   1176      1.18  augustss #ifdef DIAGNOSTIC
   1177      1.18  augustss 	if (xfer->busy_free != XFER_BUSY) {
   1178      1.18  augustss 		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
   1179      1.18  augustss 		       xfer->busy_free);
   1180      1.18  augustss 		return;
   1181      1.18  augustss 	}
   1182      1.18  augustss 	xfer->busy_free = XFER_FREE;
   1183      1.18  augustss 	if (!EXFER(xfer)->isdone) {
   1184      1.18  augustss 		printf("ehci_freex: !isdone\n");
   1185      1.18  augustss 		return;
   1186      1.18  augustss 	}
   1187      1.18  augustss #endif
   1188       1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
   1189       1.5  augustss }
   1190       1.5  augustss 
   1191       1.5  augustss Static void
   1192       1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
   1193       1.5  augustss {
   1194      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1195      1.15  augustss 
   1196      1.23  augustss 	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
   1197      1.23  augustss 		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
   1198      1.22  augustss #ifdef USB_DEBUG
   1199      1.22  augustss 	if (ehcidebug)
   1200      1.22  augustss 		usbd_dump_pipe(pipe);
   1201       1.5  augustss #endif
   1202      1.55   mycroft 	epipe->nexttoggle = 0;
   1203       1.5  augustss }
   1204       1.5  augustss 
   1205       1.5  augustss Static void
   1206       1.5  augustss ehci_noop(usbd_pipe_handle pipe)
   1207       1.5  augustss {
   1208       1.5  augustss }
   1209       1.5  augustss 
   1210       1.5  augustss #ifdef EHCI_DEBUG
   1211       1.5  augustss void
   1212      1.18  augustss ehci_dump_regs(ehci_softc_t *sc)
   1213       1.5  augustss {
   1214       1.6  augustss 	int i;
   1215       1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
   1216       1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
   1217       1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
   1218       1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
   1219      1.29  augustss 	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
   1220      1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
   1221      1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
   1222      1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
   1223      1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
   1224       1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
   1225      1.33  augustss 		printf("port %d status=0x%08x\n", i,
   1226       1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
   1227      1.39    martin }
   1228      1.39    martin 
   1229      1.40    martin /*
   1230      1.40    martin  * Unused function - this is meant to be called from a kernel
   1231      1.40    martin  * debugger.
   1232      1.40    martin  */
   1233      1.39    martin void
   1234      1.39    martin ehci_dump()
   1235      1.39    martin {
   1236      1.39    martin 	ehci_dump_regs(theehci);
   1237       1.6  augustss }
   1238       1.6  augustss 
   1239       1.6  augustss void
   1240      1.15  augustss ehci_dump_link(ehci_link_t link, int type)
   1241       1.9  augustss {
   1242      1.15  augustss 	link = le32toh(link);
   1243      1.15  augustss 	printf("0x%08x", link);
   1244       1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
   1245      1.15  augustss 		printf("<T>");
   1246      1.15  augustss 	else {
   1247      1.15  augustss 		printf("<");
   1248      1.15  augustss 		if (type) {
   1249      1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
   1250      1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
   1251      1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
   1252      1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
   1253      1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
   1254      1.16  augustss 			}
   1255      1.15  augustss 		}
   1256       1.9  augustss 		printf(">");
   1257      1.15  augustss 	}
   1258      1.15  augustss }
   1259      1.15  augustss 
   1260      1.15  augustss void
   1261      1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
   1262      1.15  augustss {
   1263      1.29  augustss 	int i;
   1264      1.29  augustss 	u_int32_t stop;
   1265      1.29  augustss 
   1266      1.29  augustss 	stop = 0;
   1267      1.29  augustss 	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
   1268      1.15  augustss 		ehci_dump_sqtd(sqtd);
   1269      1.72  augustss 		stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
   1270      1.29  augustss 	}
   1271      1.29  augustss 	if (sqtd)
   1272      1.29  augustss 		printf("dump aborted, too many TDs\n");
   1273       1.9  augustss }
   1274       1.9  augustss 
   1275       1.9  augustss void
   1276       1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
   1277       1.9  augustss {
   1278       1.9  augustss 	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
   1279       1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
   1280       1.9  augustss }
   1281       1.9  augustss 
   1282       1.9  augustss void
   1283       1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
   1284       1.9  augustss {
   1285       1.9  augustss 	u_int32_t s;
   1286      1.15  augustss 	char sbuf[128];
   1287       1.9  augustss 
   1288      1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
   1289      1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
   1290       1.9  augustss 	printf("\n");
   1291      1.15  augustss 	s = le32toh(qtd->qtd_status);
   1292      1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
   1293      1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
   1294      1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
   1295       1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
   1296       1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
   1297       1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
   1298      1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
   1299      1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
   1300       1.9  augustss 	for (s = 0; s < 5; s++)
   1301      1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
   1302       1.9  augustss }
   1303       1.9  augustss 
   1304       1.9  augustss void
   1305       1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
   1306       1.9  augustss {
   1307       1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
   1308      1.15  augustss 	u_int32_t endp, endphub;
   1309       1.9  augustss 
   1310       1.9  augustss 	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
   1311      1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
   1312      1.15  augustss 	endp = le32toh(qh->qh_endp);
   1313      1.15  augustss 	printf("  endp=0x%08x\n", endp);
   1314      1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
   1315      1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
   1316      1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
   1317      1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
   1318      1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
   1319      1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
   1320      1.15  augustss 	       EHCI_QH_GET_NRL(endp));
   1321      1.15  augustss 	endphub = le32toh(qh->qh_endphub);
   1322      1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
   1323      1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
   1324      1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
   1325      1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
   1326      1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
   1327      1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
   1328      1.12  augustss 	printf("Overlay qTD:\n");
   1329       1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
   1330       1.9  augustss }
   1331       1.9  augustss 
   1332      1.38    martin #ifdef DIAGNOSTIC
   1333      1.18  augustss Static void
   1334      1.18  augustss ehci_dump_exfer(struct ehci_xfer *ex)
   1335      1.18  augustss {
   1336      1.18  augustss 	printf("ehci_dump_exfer: ex=%p\n", ex);
   1337      1.18  augustss }
   1338      1.38    martin #endif
   1339       1.5  augustss #endif
   1340       1.5  augustss 
   1341       1.5  augustss usbd_status
   1342       1.5  augustss ehci_open(usbd_pipe_handle pipe)
   1343       1.5  augustss {
   1344       1.5  augustss 	usbd_device_handle dev = pipe->device;
   1345       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   1346       1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1347       1.5  augustss 	u_int8_t addr = dev->address;
   1348       1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   1349       1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1350      1.10  augustss 	ehci_soft_qh_t *sqh;
   1351      1.10  augustss 	usbd_status err;
   1352      1.10  augustss 	int s;
   1353      1.78  augustss 	int ival, speed, naks;
   1354      1.80  augustss 	int hshubaddr, hshubport;
   1355       1.5  augustss 
   1356       1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1357       1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1358       1.5  augustss 
   1359      1.80  augustss 	if (dev->myhsport) {
   1360      1.80  augustss 		hshubaddr = dev->myhsport->parent->address;
   1361      1.80  augustss 		hshubport = dev->myhsport->portno;
   1362      1.80  augustss 	} else {
   1363      1.80  augustss 		hshubaddr = 0;
   1364      1.80  augustss 		hshubport = 0;
   1365      1.80  augustss 	}
   1366      1.80  augustss 
   1367      1.17  augustss 	if (sc->sc_dying)
   1368      1.17  augustss 		return (USBD_IOERROR);
   1369      1.17  augustss 
   1370      1.55   mycroft 	epipe->nexttoggle = 0;
   1371      1.55   mycroft 
   1372       1.5  augustss 	if (addr == sc->sc_addr) {
   1373       1.5  augustss 		switch (ed->bEndpointAddress) {
   1374       1.5  augustss 		case USB_CONTROL_ENDPOINT:
   1375       1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
   1376       1.5  augustss 			break;
   1377       1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
   1378       1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
   1379       1.5  augustss 			break;
   1380       1.5  augustss 		default:
   1381       1.5  augustss 			return (USBD_INVAL);
   1382       1.5  augustss 		}
   1383      1.10  augustss 		return (USBD_NORMAL_COMPLETION);
   1384      1.10  augustss 	}
   1385      1.10  augustss 
   1386      1.24  augustss 	/* XXX All this stuff is only valid for async. */
   1387      1.11  augustss 	switch (dev->speed) {
   1388      1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
   1389      1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
   1390      1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
   1391      1.37    provos 	default: panic("ehci_open: bad device speed %d", dev->speed);
   1392      1.11  augustss 	}
   1393      1.80  augustss 	if (speed != EHCI_QH_SPEED_HIGH) {
   1394      1.80  augustss 		printf("%s: *** WARNING: opening low/full speed device, this "
   1395  1.91.2.2      tron 		       "may not work yet.\n",
   1396      1.80  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1397      1.80  augustss 		DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
   1398      1.80  augustss 			    hshubaddr, hshubport));
   1399  1.91.2.2      tron #if 0
   1400      1.81  augustss 		if (xfertype != UE_CONTROL)
   1401      1.81  augustss 			return USBD_INVAL;
   1402  1.91.2.2      tron #endif
   1403      1.80  augustss 	}
   1404      1.80  augustss 
   1405      1.10  augustss 	naks = 8;		/* XXX */
   1406      1.10  augustss 	sqh = ehci_alloc_sqh(sc);
   1407      1.10  augustss 	if (sqh == NULL)
   1408      1.10  augustss 		goto bad0;
   1409      1.10  augustss 	/* qh_link filled when the QH is added */
   1410      1.10  augustss 	sqh->qh.qh_endp = htole32(
   1411      1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
   1412      1.56   mycroft 		EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
   1413      1.55   mycroft 		EHCI_QH_SET_EPS(speed) |
   1414      1.55   mycroft 		EHCI_QH_DTC |
   1415      1.10  augustss 		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
   1416      1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
   1417      1.10  augustss 		 EHCI_QH_CTL : 0) |
   1418      1.10  augustss 		EHCI_QH_SET_NRL(naks)
   1419      1.10  augustss 		);
   1420      1.10  augustss 	sqh->qh.qh_endphub = htole32(
   1421      1.78  augustss 		EHCI_QH_SET_MULT(1) |
   1422      1.80  augustss 		EHCI_QH_SET_HUBA(hshubaddr) |
   1423      1.80  augustss 		EHCI_QH_SET_PORT(hshubport) |
   1424  1.91.2.2      tron 		EHCI_QH_SET_CMASK(0x08) | /* XXX */
   1425  1.91.2.2      tron 		EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0)
   1426      1.10  augustss 		);
   1427      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
   1428      1.11  augustss 	/* Fill the overlay qTD */
   1429      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
   1430      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1431      1.15  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(0);
   1432      1.10  augustss 
   1433      1.10  augustss 	epipe->sqh = sqh;
   1434       1.5  augustss 
   1435      1.10  augustss 	switch (xfertype) {
   1436      1.10  augustss 	case UE_CONTROL:
   1437      1.33  augustss 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
   1438      1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1439      1.25  augustss #ifdef EHCI_DEBUG
   1440      1.25  augustss 		if (err)
   1441      1.25  augustss 			printf("ehci_open: usb_allocmem()=%d\n", err);
   1442      1.25  augustss #endif
   1443      1.10  augustss 		if (err)
   1444      1.11  augustss 			goto bad1;
   1445      1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1446      1.10  augustss 		s = splusb();
   1447      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1448      1.10  augustss 		splx(s);
   1449      1.10  augustss 		break;
   1450      1.10  augustss 	case UE_BULK:
   1451      1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1452      1.10  augustss 		s = splusb();
   1453      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1454      1.10  augustss 		splx(s);
   1455      1.10  augustss 		break;
   1456      1.24  augustss 	case UE_INTERRUPT:
   1457      1.24  augustss 		pipe->methods = &ehci_device_intr_methods;
   1458      1.78  augustss 		ival = pipe->interval;
   1459      1.78  augustss 		if (ival == USBD_DEFAULT_INTERVAL)
   1460      1.78  augustss 			ival = ed->bInterval;
   1461      1.78  augustss 		return (ehci_device_setintr(sc, sqh, ival));
   1462      1.24  augustss 	case UE_ISOCHRONOUS:
   1463      1.24  augustss 		pipe->methods = &ehci_device_isoc_methods;
   1464      1.24  augustss 		return (USBD_INVAL);
   1465      1.10  augustss 	default:
   1466      1.10  augustss 		return (USBD_INVAL);
   1467       1.5  augustss 	}
   1468       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1469       1.5  augustss 
   1470      1.11  augustss  bad1:
   1471      1.11  augustss 	ehci_free_sqh(sc, sqh);
   1472       1.5  augustss  bad0:
   1473       1.5  augustss 	return (USBD_NOMEM);
   1474      1.10  augustss }
   1475      1.10  augustss 
   1476      1.10  augustss /*
   1477      1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1478      1.10  augustss  */
   1479      1.10  augustss void
   1480      1.10  augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1481      1.10  augustss {
   1482      1.10  augustss 	SPLUSBCHECK;
   1483      1.10  augustss 
   1484      1.10  augustss 	sqh->next = head->next;
   1485      1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1486      1.10  augustss 	head->next = sqh;
   1487      1.15  augustss 	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
   1488      1.10  augustss 
   1489      1.10  augustss #ifdef EHCI_DEBUG
   1490      1.22  augustss 	if (ehcidebug > 5) {
   1491      1.10  augustss 		printf("ehci_add_qh:\n");
   1492      1.10  augustss 		ehci_dump_sqh(sqh);
   1493      1.10  augustss 	}
   1494       1.5  augustss #endif
   1495       1.5  augustss }
   1496       1.5  augustss 
   1497      1.10  augustss /*
   1498      1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1499      1.10  augustss  */
   1500      1.10  augustss void
   1501      1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1502      1.10  augustss {
   1503      1.33  augustss 	ehci_soft_qh_t *p;
   1504      1.10  augustss 
   1505      1.10  augustss 	SPLUSBCHECK;
   1506      1.10  augustss 	/* XXX */
   1507      1.42  augustss 	for (p = head; p != NULL && p->next != sqh; p = p->next)
   1508      1.10  augustss 		;
   1509      1.10  augustss 	if (p == NULL)
   1510      1.37    provos 		panic("ehci_rem_qh: ED not found");
   1511      1.10  augustss 	p->next = sqh->next;
   1512      1.10  augustss 	p->qh.qh_link = sqh->qh.qh_link;
   1513      1.10  augustss 
   1514      1.11  augustss 	ehci_sync_hc(sc);
   1515      1.11  augustss }
   1516      1.11  augustss 
   1517      1.23  augustss void
   1518      1.23  augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
   1519      1.23  augustss {
   1520      1.85  augustss 	int i;
   1521      1.87  augustss 	u_int32_t status;
   1522      1.85  augustss 
   1523      1.87  augustss 	/* Save toggle bit and ping status. */
   1524      1.87  augustss 	status = sqh->qh.qh_qtd.qtd_status &
   1525      1.87  augustss 	    htole32(EHCI_QTD_TOGGLE_MASK |
   1526      1.87  augustss 		    EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
   1527      1.85  augustss 	/* Set HALTED to make hw leave it alone. */
   1528      1.85  augustss 	sqh->qh.qh_qtd.qtd_status =
   1529      1.85  augustss 	    htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
   1530      1.23  augustss 	sqh->qh.qh_curqtd = 0;
   1531      1.23  augustss 	sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
   1532      1.85  augustss 	sqh->qh.qh_qtd.qtd_altnext = 0;
   1533      1.85  augustss 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
   1534      1.85  augustss 		sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   1535      1.23  augustss 	sqh->sqtd = sqtd;
   1536      1.87  augustss 	/* Set !HALTED && !ACTIVE to start execution, preserve some fields */
   1537      1.87  augustss 	sqh->qh.qh_qtd.qtd_status = status;
   1538      1.23  augustss }
   1539      1.23  augustss 
   1540      1.11  augustss /*
   1541      1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1542      1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1543      1.11  augustss  * the interrupt.
   1544      1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1545      1.11  augustss  */
   1546      1.11  augustss void
   1547      1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1548      1.11  augustss {
   1549      1.15  augustss 	int s, error;
   1550      1.11  augustss 
   1551      1.12  augustss 	if (sc->sc_dying) {
   1552      1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1553      1.12  augustss 		return;
   1554      1.12  augustss 	}
   1555      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1556      1.76  augustss 	usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
   1557      1.10  augustss 	s = splhardusb();
   1558      1.10  augustss 	/* ask for doorbell */
   1559      1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1560      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1561      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1562      1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1563      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1564      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1565      1.10  augustss 	splx(s);
   1566      1.76  augustss 	usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
   1567      1.15  augustss #ifdef DIAGNOSTIC
   1568      1.15  augustss 	if (error)
   1569      1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1570      1.15  augustss #endif
   1571      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1572      1.10  augustss }
   1573      1.10  augustss 
   1574       1.5  augustss /***********/
   1575       1.5  augustss 
   1576       1.5  augustss /*
   1577       1.5  augustss  * Data structures and routines to emulate the root hub.
   1578       1.5  augustss  */
   1579       1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1580       1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1581       1.5  augustss 	UDESC_DEVICE,		/* type */
   1582       1.5  augustss 	{0x00, 0x02},		/* USB version */
   1583       1.5  augustss 	UDCLASS_HUB,		/* class */
   1584       1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1585      1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1586       1.5  augustss 	64,			/* max packet */
   1587       1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1588       1.5  augustss 	1,2,0,			/* string indicies */
   1589       1.5  augustss 	1			/* # of configurations */
   1590       1.5  augustss };
   1591       1.5  augustss 
   1592      1.11  augustss Static usb_device_qualifier_t ehci_odevd = {
   1593      1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1594      1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1595      1.11  augustss 	{0x00, 0x02},		/* USB version */
   1596      1.11  augustss 	UDCLASS_HUB,		/* class */
   1597      1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1598      1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1599      1.11  augustss 	64,			/* max packet */
   1600      1.11  augustss 	1,			/* # of configurations */
   1601      1.11  augustss 	0
   1602      1.11  augustss };
   1603      1.11  augustss 
   1604       1.5  augustss Static usb_config_descriptor_t ehci_confd = {
   1605       1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1606       1.5  augustss 	UDESC_CONFIG,
   1607       1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1608       1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1609       1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1610       1.5  augustss 	1,
   1611       1.5  augustss 	1,
   1612       1.5  augustss 	0,
   1613       1.5  augustss 	UC_SELF_POWERED,
   1614       1.5  augustss 	0			/* max power */
   1615       1.5  augustss };
   1616       1.5  augustss 
   1617       1.5  augustss Static usb_interface_descriptor_t ehci_ifcd = {
   1618       1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1619       1.5  augustss 	UDESC_INTERFACE,
   1620       1.5  augustss 	0,
   1621       1.5  augustss 	0,
   1622       1.5  augustss 	1,
   1623       1.5  augustss 	UICLASS_HUB,
   1624       1.5  augustss 	UISUBCLASS_HUB,
   1625      1.11  augustss 	UIPROTO_HSHUBSTT,
   1626       1.5  augustss 	0
   1627       1.5  augustss };
   1628       1.5  augustss 
   1629       1.5  augustss Static usb_endpoint_descriptor_t ehci_endpd = {
   1630       1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1631       1.5  augustss 	UDESC_ENDPOINT,
   1632       1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1633       1.5  augustss 	UE_INTERRUPT,
   1634       1.5  augustss 	{8, 0},			/* max packet */
   1635       1.5  augustss 	255
   1636       1.5  augustss };
   1637       1.5  augustss 
   1638       1.5  augustss Static usb_hub_descriptor_t ehci_hubd = {
   1639       1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1640       1.5  augustss 	UDESC_HUB,
   1641       1.5  augustss 	0,
   1642       1.5  augustss 	{0,0},
   1643       1.5  augustss 	0,
   1644       1.5  augustss 	0,
   1645       1.5  augustss 	{0},
   1646       1.5  augustss };
   1647       1.5  augustss 
   1648       1.5  augustss Static int
   1649      1.71  augustss ehci_str(usb_string_descriptor_t *p, int l, char *s)
   1650       1.5  augustss {
   1651       1.5  augustss 	int i;
   1652       1.5  augustss 
   1653       1.5  augustss 	if (l == 0)
   1654       1.5  augustss 		return (0);
   1655       1.5  augustss 	p->bLength = 2 * strlen(s) + 2;
   1656       1.5  augustss 	if (l == 1)
   1657       1.5  augustss 		return (1);
   1658       1.5  augustss 	p->bDescriptorType = UDESC_STRING;
   1659       1.5  augustss 	l -= 2;
   1660       1.5  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1661       1.5  augustss 		USETW2(p->bString[i], 0, s[i]);
   1662       1.5  augustss 	return (2*i+2);
   1663       1.5  augustss }
   1664       1.5  augustss 
   1665       1.5  augustss /*
   1666       1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1667       1.5  augustss  */
   1668       1.5  augustss Static usbd_status
   1669       1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1670       1.5  augustss {
   1671       1.5  augustss 	usbd_status err;
   1672       1.5  augustss 
   1673       1.5  augustss 	/* Insert last in queue. */
   1674       1.5  augustss 	err = usb_insert_transfer(xfer);
   1675       1.5  augustss 	if (err)
   1676       1.5  augustss 		return (err);
   1677       1.5  augustss 
   1678       1.5  augustss 	/* Pipe isn't running, start first */
   1679       1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1680       1.5  augustss }
   1681       1.5  augustss 
   1682       1.5  augustss Static usbd_status
   1683       1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1684       1.5  augustss {
   1685       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   1686       1.5  augustss 	usb_device_request_t *req;
   1687       1.5  augustss 	void *buf = NULL;
   1688       1.5  augustss 	int port, i;
   1689       1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1690       1.5  augustss 	usb_port_status_t ps;
   1691       1.5  augustss 	usb_hub_descriptor_t hubd;
   1692       1.5  augustss 	usbd_status err;
   1693       1.5  augustss 	u_int32_t v;
   1694       1.5  augustss 
   1695       1.5  augustss 	if (sc->sc_dying)
   1696       1.5  augustss 		return (USBD_IOERROR);
   1697       1.5  augustss 
   1698       1.5  augustss #ifdef DIAGNOSTIC
   1699       1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1700       1.5  augustss 		/* XXX panic */
   1701       1.5  augustss 		return (USBD_INVAL);
   1702       1.5  augustss #endif
   1703       1.5  augustss 	req = &xfer->request;
   1704       1.5  augustss 
   1705      1.72  augustss 	DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
   1706       1.5  augustss 		    req->bmRequestType, req->bRequest));
   1707       1.5  augustss 
   1708       1.5  augustss 	len = UGETW(req->wLength);
   1709       1.5  augustss 	value = UGETW(req->wValue);
   1710       1.5  augustss 	index = UGETW(req->wIndex);
   1711       1.5  augustss 
   1712       1.5  augustss 	if (len != 0)
   1713      1.30  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   1714       1.5  augustss 
   1715       1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1716       1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1717       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1718       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1719       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1720      1.33  augustss 		/*
   1721       1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1722       1.5  augustss 		 * for the integrated root hub.
   1723       1.5  augustss 		 */
   1724       1.5  augustss 		break;
   1725       1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1726       1.5  augustss 		if (len > 0) {
   1727       1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1728       1.5  augustss 			totlen = 1;
   1729       1.5  augustss 		}
   1730       1.5  augustss 		break;
   1731       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1732      1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
   1733       1.5  augustss 		switch(value >> 8) {
   1734       1.5  augustss 		case UDESC_DEVICE:
   1735       1.5  augustss 			if ((value & 0xff) != 0) {
   1736       1.5  augustss 				err = USBD_IOERROR;
   1737       1.5  augustss 				goto ret;
   1738       1.5  augustss 			}
   1739       1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1740       1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   1741       1.5  augustss 			memcpy(buf, &ehci_devd, l);
   1742       1.5  augustss 			break;
   1743      1.33  augustss 		/*
   1744      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1745      1.11  augustss 		 * we need this descriptor.
   1746      1.11  augustss 		 */
   1747      1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   1748      1.11  augustss 			if ((value & 0xff) != 0) {
   1749      1.11  augustss 				err = USBD_IOERROR;
   1750      1.11  augustss 				goto ret;
   1751      1.11  augustss 			}
   1752      1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1753      1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   1754      1.11  augustss 			break;
   1755      1.33  augustss 		/*
   1756      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1757      1.11  augustss 		 * we need this descriptor.
   1758      1.11  augustss 		 */
   1759      1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   1760       1.5  augustss 		case UDESC_CONFIG:
   1761       1.5  augustss 			if ((value & 0xff) != 0) {
   1762       1.5  augustss 				err = USBD_IOERROR;
   1763       1.5  augustss 				goto ret;
   1764       1.5  augustss 			}
   1765       1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1766       1.5  augustss 			memcpy(buf, &ehci_confd, l);
   1767      1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   1768      1.11  augustss 				value >> 8;
   1769       1.5  augustss 			buf = (char *)buf + l;
   1770       1.5  augustss 			len -= l;
   1771       1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1772       1.5  augustss 			totlen += l;
   1773       1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   1774       1.5  augustss 			buf = (char *)buf + l;
   1775       1.5  augustss 			len -= l;
   1776       1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1777       1.5  augustss 			totlen += l;
   1778       1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   1779       1.5  augustss 			break;
   1780       1.5  augustss 		case UDESC_STRING:
   1781       1.5  augustss 			if (len == 0)
   1782       1.5  augustss 				break;
   1783       1.5  augustss 			*(u_int8_t *)buf = 0;
   1784       1.5  augustss 			totlen = 1;
   1785       1.5  augustss 			switch (value & 0xff) {
   1786      1.88  augustss 			case 0: /* Language table */
   1787      1.88  augustss 				totlen = ehci_str(buf, len, "\001");
   1788      1.88  augustss 				break;
   1789       1.5  augustss 			case 1: /* Vendor */
   1790       1.5  augustss 				totlen = ehci_str(buf, len, sc->sc_vendor);
   1791       1.5  augustss 				break;
   1792       1.5  augustss 			case 2: /* Product */
   1793       1.5  augustss 				totlen = ehci_str(buf, len, "EHCI root hub");
   1794       1.5  augustss 				break;
   1795       1.5  augustss 			}
   1796       1.5  augustss 			break;
   1797       1.5  augustss 		default:
   1798       1.5  augustss 			err = USBD_IOERROR;
   1799       1.5  augustss 			goto ret;
   1800       1.5  augustss 		}
   1801       1.5  augustss 		break;
   1802       1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1803       1.5  augustss 		if (len > 0) {
   1804       1.5  augustss 			*(u_int8_t *)buf = 0;
   1805       1.5  augustss 			totlen = 1;
   1806       1.5  augustss 		}
   1807       1.5  augustss 		break;
   1808       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1809       1.5  augustss 		if (len > 1) {
   1810       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1811       1.5  augustss 			totlen = 2;
   1812       1.5  augustss 		}
   1813       1.5  augustss 		break;
   1814       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1815       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1816       1.5  augustss 		if (len > 1) {
   1817       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1818       1.5  augustss 			totlen = 2;
   1819       1.5  augustss 		}
   1820       1.5  augustss 		break;
   1821       1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1822       1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   1823       1.5  augustss 			err = USBD_IOERROR;
   1824       1.5  augustss 			goto ret;
   1825       1.5  augustss 		}
   1826       1.5  augustss 		sc->sc_addr = value;
   1827       1.5  augustss 		break;
   1828       1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1829       1.5  augustss 		if (value != 0 && value != 1) {
   1830       1.5  augustss 			err = USBD_IOERROR;
   1831       1.5  augustss 			goto ret;
   1832       1.5  augustss 		}
   1833       1.5  augustss 		sc->sc_conf = value;
   1834       1.5  augustss 		break;
   1835       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1836       1.5  augustss 		break;
   1837       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1838       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1839       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1840       1.5  augustss 		err = USBD_IOERROR;
   1841       1.5  augustss 		goto ret;
   1842       1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1843       1.5  augustss 		break;
   1844       1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1845       1.5  augustss 		break;
   1846       1.5  augustss 	/* Hub requests */
   1847       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1848       1.5  augustss 		break;
   1849       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1850      1.72  augustss 		DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
   1851       1.5  augustss 			     "port=%d feature=%d\n",
   1852       1.5  augustss 			     index, value));
   1853       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1854       1.5  augustss 			err = USBD_IOERROR;
   1855       1.5  augustss 			goto ret;
   1856       1.5  augustss 		}
   1857       1.5  augustss 		port = EHCI_PORTSC(index);
   1858       1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1859       1.5  augustss 		switch(value) {
   1860       1.5  augustss 		case UHF_PORT_ENABLE:
   1861       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   1862       1.5  augustss 			break;
   1863       1.5  augustss 		case UHF_PORT_SUSPEND:
   1864       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   1865       1.5  augustss 			break;
   1866       1.5  augustss 		case UHF_PORT_POWER:
   1867       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   1868       1.5  augustss 			break;
   1869      1.14  augustss 		case UHF_PORT_TEST:
   1870      1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
   1871      1.14  augustss 				    "%d\n", index));
   1872      1.14  augustss 			break;
   1873      1.14  augustss 		case UHF_PORT_INDICATOR:
   1874      1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
   1875      1.14  augustss 				    "%d\n", index));
   1876      1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   1877      1.14  augustss 			break;
   1878       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1879       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   1880       1.5  augustss 			break;
   1881       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1882       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   1883       1.5  augustss 			break;
   1884       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1885       1.5  augustss 			/* how? */
   1886       1.5  augustss 			break;
   1887       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1888       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   1889       1.5  augustss 			break;
   1890       1.5  augustss 		case UHF_C_PORT_RESET:
   1891       1.6  augustss 			sc->sc_isreset = 0;
   1892       1.5  augustss 			break;
   1893       1.5  augustss 		default:
   1894       1.5  augustss 			err = USBD_IOERROR;
   1895       1.5  augustss 			goto ret;
   1896       1.5  augustss 		}
   1897       1.5  augustss #if 0
   1898       1.5  augustss 		switch(value) {
   1899       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1900       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1901       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1902       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1903       1.5  augustss 		case UHF_C_PORT_RESET:
   1904       1.5  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   1905       1.5  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   1906       1.6  augustss 				ehci_pcd_able(sc, 1);
   1907       1.5  augustss 			break;
   1908       1.5  augustss 		default:
   1909       1.5  augustss 			break;
   1910       1.5  augustss 		}
   1911       1.5  augustss #endif
   1912       1.5  augustss 		break;
   1913       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1914      1.51    toshii 		if ((value & 0xff) != 0) {
   1915       1.5  augustss 			err = USBD_IOERROR;
   1916       1.5  augustss 			goto ret;
   1917       1.5  augustss 		}
   1918       1.5  augustss 		hubd = ehci_hubd;
   1919       1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   1920       1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   1921       1.5  augustss 		USETW(hubd.wHubCharacteristics,
   1922      1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   1923      1.78  augustss 		    EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   1924      1.14  augustss 		        ? UHD_PORT_IND : 0);
   1925       1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   1926      1.33  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1927       1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   1928       1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1929       1.5  augustss 		l = min(len, hubd.bDescLength);
   1930       1.5  augustss 		totlen = l;
   1931       1.5  augustss 		memcpy(buf, &hubd, l);
   1932       1.5  augustss 		break;
   1933       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1934       1.5  augustss 		if (len != 4) {
   1935       1.5  augustss 			err = USBD_IOERROR;
   1936       1.5  augustss 			goto ret;
   1937       1.5  augustss 		}
   1938       1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   1939       1.5  augustss 		totlen = len;
   1940       1.5  augustss 		break;
   1941       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1942      1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
   1943       1.5  augustss 			    index));
   1944       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1945       1.5  augustss 			err = USBD_IOERROR;
   1946       1.5  augustss 			goto ret;
   1947       1.5  augustss 		}
   1948       1.5  augustss 		if (len != 4) {
   1949       1.5  augustss 			err = USBD_IOERROR;
   1950       1.5  augustss 			goto ret;
   1951       1.5  augustss 		}
   1952       1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   1953      1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
   1954       1.5  augustss 			    v));
   1955      1.11  augustss 		i = UPS_HIGH_SPEED;
   1956       1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   1957       1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   1958       1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   1959       1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   1960       1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   1961       1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   1962       1.5  augustss 		USETW(ps.wPortStatus, i);
   1963       1.5  augustss 		i = 0;
   1964       1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   1965       1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   1966       1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   1967       1.6  augustss 		if (sc->sc_isreset)	i |= UPS_C_PORT_RESET;
   1968       1.5  augustss 		USETW(ps.wPortChange, i);
   1969       1.5  augustss 		l = min(len, sizeof ps);
   1970       1.5  augustss 		memcpy(buf, &ps, l);
   1971       1.5  augustss 		totlen = l;
   1972       1.5  augustss 		break;
   1973       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1974       1.5  augustss 		err = USBD_IOERROR;
   1975       1.5  augustss 		goto ret;
   1976       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1977       1.5  augustss 		break;
   1978       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1979       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1980       1.5  augustss 			err = USBD_IOERROR;
   1981       1.5  augustss 			goto ret;
   1982       1.5  augustss 		}
   1983       1.5  augustss 		port = EHCI_PORTSC(index);
   1984       1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1985       1.5  augustss 		switch(value) {
   1986       1.5  augustss 		case UHF_PORT_ENABLE:
   1987       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   1988       1.5  augustss 			break;
   1989       1.5  augustss 		case UHF_PORT_SUSPEND:
   1990       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   1991       1.5  augustss 			break;
   1992       1.5  augustss 		case UHF_PORT_RESET:
   1993      1.72  augustss 			DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
   1994       1.5  augustss 				    index));
   1995       1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   1996       1.6  augustss 				/* Low speed device, give up ownership. */
   1997       1.6  augustss 				ehci_disown(sc, index, 1);
   1998       1.6  augustss 				break;
   1999       1.6  augustss 			}
   2000       1.8  augustss 			/* Start reset sequence. */
   2001       1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   2002       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   2003       1.8  augustss 			/* Wait for reset to complete. */
   2004      1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   2005      1.17  augustss 			if (sc->sc_dying) {
   2006      1.17  augustss 				err = USBD_IOERROR;
   2007      1.17  augustss 				goto ret;
   2008      1.17  augustss 			}
   2009       1.8  augustss 			/* Terminate reset sequence. */
   2010       1.8  augustss 			EOWRITE4(sc, port, v);
   2011       1.8  augustss 			/* Wait for HC to complete reset. */
   2012      1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   2013      1.17  augustss 			if (sc->sc_dying) {
   2014      1.17  augustss 				err = USBD_IOERROR;
   2015      1.17  augustss 				goto ret;
   2016      1.17  augustss 			}
   2017       1.8  augustss 			v = EOREAD4(sc, port);
   2018       1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   2019       1.8  augustss 			if (v & EHCI_PS_PR) {
   2020       1.8  augustss 				printf("%s: port reset timeout\n",
   2021       1.8  augustss 				       USBDEVNAME(sc->sc_bus.bdev));
   2022       1.8  augustss 				return (USBD_TIMEOUT);
   2023       1.5  augustss 			}
   2024       1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   2025       1.6  augustss 				/* Not a high speed device, give up ownership.*/
   2026       1.6  augustss 				ehci_disown(sc, index, 0);
   2027       1.6  augustss 				break;
   2028       1.6  augustss 			}
   2029       1.6  augustss 			sc->sc_isreset = 1;
   2030       1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   2031       1.6  augustss 				 index, v));
   2032       1.5  augustss 			break;
   2033       1.5  augustss 		case UHF_PORT_POWER:
   2034      1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port power "
   2035       1.5  augustss 				    "%d\n", index));
   2036       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PP);
   2037       1.5  augustss 			break;
   2038      1.11  augustss 		case UHF_PORT_TEST:
   2039      1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port test "
   2040      1.11  augustss 				    "%d\n", index));
   2041      1.11  augustss 			break;
   2042      1.11  augustss 		case UHF_PORT_INDICATOR:
   2043      1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
   2044      1.11  augustss 				    "%d\n", index));
   2045      1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   2046      1.11  augustss 			break;
   2047       1.5  augustss 		default:
   2048       1.5  augustss 			err = USBD_IOERROR;
   2049       1.5  augustss 			goto ret;
   2050       1.5  augustss 		}
   2051       1.5  augustss 		break;
   2052      1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   2053      1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   2054      1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   2055      1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   2056      1.11  augustss 		break;
   2057       1.5  augustss 	default:
   2058       1.5  augustss 		err = USBD_IOERROR;
   2059       1.5  augustss 		goto ret;
   2060       1.5  augustss 	}
   2061       1.5  augustss 	xfer->actlen = totlen;
   2062       1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   2063       1.5  augustss  ret:
   2064       1.5  augustss 	xfer->status = err;
   2065       1.5  augustss 	s = splusb();
   2066       1.5  augustss 	usb_transfer_complete(xfer);
   2067       1.5  augustss 	splx(s);
   2068       1.5  augustss 	return (USBD_IN_PROGRESS);
   2069       1.6  augustss }
   2070       1.6  augustss 
   2071       1.6  augustss void
   2072       1.6  augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   2073       1.6  augustss {
   2074      1.24  augustss 	int port;
   2075       1.6  augustss 	u_int32_t v;
   2076       1.6  augustss 
   2077       1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   2078       1.6  augustss #ifdef DIAGNOSTIC
   2079       1.6  augustss 	if (sc->sc_npcomp != 0) {
   2080      1.24  augustss 		int i = (index-1) / sc->sc_npcomp;
   2081       1.6  augustss 		if (i >= sc->sc_ncomp)
   2082       1.6  augustss 			printf("%s: strange port\n",
   2083       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev));
   2084       1.6  augustss 		else
   2085       1.6  augustss 			printf("%s: handing over %s speed device on "
   2086       1.6  augustss 			       "port %d to %s\n",
   2087       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev),
   2088       1.6  augustss 			       lowspeed ? "low" : "full",
   2089       1.6  augustss 			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
   2090       1.6  augustss 	} else {
   2091       1.6  augustss 		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
   2092       1.6  augustss 	}
   2093       1.6  augustss #endif
   2094       1.6  augustss 	port = EHCI_PORTSC(index);
   2095       1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   2096       1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   2097       1.5  augustss }
   2098       1.5  augustss 
   2099       1.5  augustss /* Abort a root control request. */
   2100       1.5  augustss Static void
   2101       1.5  augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   2102       1.5  augustss {
   2103       1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   2104       1.5  augustss }
   2105       1.5  augustss 
   2106       1.5  augustss /* Close the root pipe. */
   2107       1.5  augustss Static void
   2108       1.5  augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
   2109       1.5  augustss {
   2110       1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   2111       1.5  augustss 	/* Nothing to do. */
   2112       1.5  augustss }
   2113       1.5  augustss 
   2114       1.5  augustss void
   2115       1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   2116       1.5  augustss {
   2117      1.78  augustss 	xfer->hcpriv = NULL;
   2118       1.5  augustss }
   2119       1.5  augustss 
   2120       1.5  augustss Static usbd_status
   2121       1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   2122       1.5  augustss {
   2123       1.5  augustss 	usbd_status err;
   2124       1.5  augustss 
   2125       1.5  augustss 	/* Insert last in queue. */
   2126       1.5  augustss 	err = usb_insert_transfer(xfer);
   2127       1.5  augustss 	if (err)
   2128       1.5  augustss 		return (err);
   2129       1.5  augustss 
   2130       1.5  augustss 	/* Pipe isn't running, start first */
   2131       1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2132       1.5  augustss }
   2133       1.5  augustss 
   2134       1.5  augustss Static usbd_status
   2135       1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   2136       1.5  augustss {
   2137       1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   2138       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2139       1.5  augustss 
   2140       1.5  augustss 	if (sc->sc_dying)
   2141       1.5  augustss 		return (USBD_IOERROR);
   2142       1.5  augustss 
   2143       1.5  augustss 	sc->sc_intrxfer = xfer;
   2144       1.5  augustss 
   2145       1.5  augustss 	return (USBD_IN_PROGRESS);
   2146       1.5  augustss }
   2147       1.5  augustss 
   2148       1.5  augustss /* Abort a root interrupt request. */
   2149       1.5  augustss Static void
   2150       1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   2151       1.5  augustss {
   2152       1.5  augustss 	int s;
   2153       1.5  augustss 
   2154       1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2155       1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   2156       1.5  augustss 		xfer->pipe->intrxfer = NULL;
   2157       1.5  augustss 	}
   2158       1.5  augustss 	xfer->status = USBD_CANCELLED;
   2159       1.5  augustss 	s = splusb();
   2160       1.5  augustss 	usb_transfer_complete(xfer);
   2161       1.5  augustss 	splx(s);
   2162       1.5  augustss }
   2163       1.5  augustss 
   2164       1.5  augustss /* Close the root pipe. */
   2165       1.5  augustss Static void
   2166       1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   2167       1.5  augustss {
   2168       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2169      1.33  augustss 
   2170       1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   2171       1.5  augustss 
   2172       1.5  augustss 	sc->sc_intrxfer = NULL;
   2173       1.5  augustss }
   2174       1.5  augustss 
   2175       1.5  augustss void
   2176       1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   2177       1.5  augustss {
   2178      1.78  augustss 	xfer->hcpriv = NULL;
   2179       1.9  augustss }
   2180       1.9  augustss 
   2181       1.9  augustss /************************/
   2182       1.9  augustss 
   2183       1.9  augustss ehci_soft_qh_t *
   2184       1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   2185       1.9  augustss {
   2186       1.9  augustss 	ehci_soft_qh_t *sqh;
   2187       1.9  augustss 	usbd_status err;
   2188       1.9  augustss 	int i, offs;
   2189       1.9  augustss 	usb_dma_t dma;
   2190       1.9  augustss 
   2191       1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   2192       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   2193       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
   2194       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2195      1.25  augustss #ifdef EHCI_DEBUG
   2196      1.25  augustss 		if (err)
   2197      1.25  augustss 			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
   2198      1.25  augustss #endif
   2199       1.9  augustss 		if (err)
   2200      1.11  augustss 			return (NULL);
   2201       1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   2202       1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   2203      1.30  augustss 			sqh = KERNADDR(&dma, offs);
   2204      1.31  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   2205       1.9  augustss 			sqh->next = sc->sc_freeqhs;
   2206       1.9  augustss 			sc->sc_freeqhs = sqh;
   2207       1.9  augustss 		}
   2208       1.9  augustss 	}
   2209       1.9  augustss 	sqh = sc->sc_freeqhs;
   2210       1.9  augustss 	sc->sc_freeqhs = sqh->next;
   2211       1.9  augustss 	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
   2212      1.11  augustss 	sqh->next = NULL;
   2213       1.9  augustss 	return (sqh);
   2214       1.9  augustss }
   2215       1.9  augustss 
   2216       1.9  augustss void
   2217       1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   2218       1.9  augustss {
   2219       1.9  augustss 	sqh->next = sc->sc_freeqhs;
   2220       1.9  augustss 	sc->sc_freeqhs = sqh;
   2221       1.9  augustss }
   2222       1.9  augustss 
   2223       1.9  augustss ehci_soft_qtd_t *
   2224       1.9  augustss ehci_alloc_sqtd(ehci_softc_t *sc)
   2225       1.9  augustss {
   2226       1.9  augustss 	ehci_soft_qtd_t *sqtd;
   2227       1.9  augustss 	usbd_status err;
   2228       1.9  augustss 	int i, offs;
   2229       1.9  augustss 	usb_dma_t dma;
   2230       1.9  augustss 	int s;
   2231       1.9  augustss 
   2232       1.9  augustss 	if (sc->sc_freeqtds == NULL) {
   2233       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
   2234       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
   2235       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2236      1.25  augustss #ifdef EHCI_DEBUG
   2237      1.25  augustss 		if (err)
   2238      1.25  augustss 			printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
   2239      1.25  augustss #endif
   2240       1.9  augustss 		if (err)
   2241       1.9  augustss 			return (NULL);
   2242       1.9  augustss 		s = splusb();
   2243       1.9  augustss 		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   2244       1.9  augustss 			offs = i * EHCI_SQTD_SIZE;
   2245      1.30  augustss 			sqtd = KERNADDR(&dma, offs);
   2246      1.31  augustss 			sqtd->physaddr = DMAADDR(&dma, offs);
   2247       1.9  augustss 			sqtd->nextqtd = sc->sc_freeqtds;
   2248       1.9  augustss 			sc->sc_freeqtds = sqtd;
   2249       1.9  augustss 		}
   2250       1.9  augustss 		splx(s);
   2251       1.9  augustss 	}
   2252       1.9  augustss 
   2253       1.9  augustss 	s = splusb();
   2254       1.9  augustss 	sqtd = sc->sc_freeqtds;
   2255       1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   2256       1.9  augustss 	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
   2257       1.9  augustss 	sqtd->nextqtd = NULL;
   2258       1.9  augustss 	sqtd->xfer = NULL;
   2259       1.9  augustss 	splx(s);
   2260       1.9  augustss 
   2261       1.9  augustss 	return (sqtd);
   2262       1.9  augustss }
   2263       1.9  augustss 
   2264       1.9  augustss void
   2265       1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2266       1.9  augustss {
   2267       1.9  augustss 	int s;
   2268       1.9  augustss 
   2269       1.9  augustss 	s = splusb();
   2270       1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   2271       1.9  augustss 	sc->sc_freeqtds = sqtd;
   2272       1.9  augustss 	splx(s);
   2273       1.9  augustss }
   2274       1.9  augustss 
   2275      1.15  augustss usbd_status
   2276      1.25  augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   2277      1.15  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
   2278      1.15  augustss 		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   2279      1.15  augustss {
   2280      1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   2281      1.22  augustss 	ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
   2282      1.15  augustss 	u_int32_t qtdstatus;
   2283      1.55   mycroft 	int len, curlen, mps;
   2284      1.55   mycroft 	int i, tog;
   2285      1.15  augustss 	usb_dma_t *dma = &xfer->dmabuf;
   2286  1.91.2.6      tron 	u_int16_t flags = xfer->flags;
   2287      1.15  augustss 
   2288      1.25  augustss 	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
   2289      1.15  augustss 
   2290      1.15  augustss 	len = alen;
   2291      1.31  augustss 	dataphys = DMAADDR(dma, 0);
   2292      1.22  augustss 	dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
   2293      1.67   mycroft 	qtdstatus = EHCI_QTD_ACTIVE |
   2294      1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   2295      1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   2296      1.15  augustss 	    /* IOC set below */
   2297      1.15  augustss 	    /* BYTES set below */
   2298      1.67   mycroft 	    ;
   2299      1.55   mycroft 	mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
   2300      1.55   mycroft 	tog = epipe->nexttoggle;
   2301      1.64   mycroft 	qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
   2302      1.15  augustss 
   2303      1.15  augustss 	cur = ehci_alloc_sqtd(sc);
   2304      1.25  augustss 	*sp = cur;
   2305      1.15  augustss 	if (cur == NULL)
   2306      1.15  augustss 		goto nomem;
   2307      1.15  augustss 	for (;;) {
   2308      1.22  augustss 		dataphyspage = EHCI_PAGE(dataphys);
   2309      1.26  augustss 		/* The EHCI hardware can handle at most 5 pages. */
   2310      1.33  augustss 		if (dataphyslastpage - dataphyspage <
   2311      1.26  augustss 		    EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
   2312      1.15  augustss 			/* we can handle it in this QTD */
   2313      1.15  augustss 			curlen = len;
   2314      1.15  augustss 		} else {
   2315      1.15  augustss 			/* must use multiple TDs, fill as much as possible. */
   2316      1.33  augustss 			curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
   2317      1.22  augustss 				 EHCI_PAGE_OFFSET(dataphys);
   2318      1.25  augustss #ifdef DIAGNOSTIC
   2319      1.25  augustss 			if (curlen > len) {
   2320      1.26  augustss 				printf("ehci_alloc_sqtd_chain: curlen=0x%x "
   2321      1.26  augustss 				       "len=0x%x offs=0x%x\n", curlen, len,
   2322      1.26  augustss 				       EHCI_PAGE_OFFSET(dataphys));
   2323      1.26  augustss 				printf("lastpage=0x%x page=0x%x phys=0x%x\n",
   2324      1.26  augustss 				       dataphyslastpage, dataphyspage,
   2325      1.26  augustss 				       dataphys);
   2326      1.25  augustss 				curlen = len;
   2327      1.25  augustss 			}
   2328      1.25  augustss #endif
   2329      1.15  augustss 			/* the length must be a multiple of the max size */
   2330      1.55   mycroft 			curlen -= curlen % mps;
   2331      1.25  augustss 			DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
   2332      1.25  augustss 				    "curlen=%d\n", curlen));
   2333      1.15  augustss #ifdef DIAGNOSTIC
   2334      1.15  augustss 			if (curlen == 0)
   2335  1.91.2.7      tron 				panic("ehci_alloc_sqtd_chain: curlen == 0");
   2336      1.15  augustss #endif
   2337      1.15  augustss 		}
   2338      1.25  augustss 		DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
   2339      1.22  augustss 			    "dataphyslastpage=0x%08x len=%d curlen=%d\n",
   2340      1.22  augustss 			    dataphys, dataphyslastpage,
   2341      1.15  augustss 			    len, curlen));
   2342      1.15  augustss 		len -= curlen;
   2343      1.15  augustss 
   2344  1.91.2.6      tron 		/*
   2345  1.91.2.6      tron 		 * Allocate another transfer if there's more data left,
   2346  1.91.2.6      tron 		 * or if force last short transfer flag is set and we're
   2347  1.91.2.6      tron 		 * allocating a multiple of the max packet size.
   2348  1.91.2.6      tron 		 */
   2349  1.91.2.6      tron 		if (len != 0 ||
   2350  1.91.2.6      tron 		    ((curlen % mps) == 0 && !rd && curlen != 0 &&
   2351  1.91.2.6      tron 		     (flags & USBD_FORCE_SHORT_XFER))) {
   2352      1.15  augustss 			next = ehci_alloc_sqtd(sc);
   2353      1.15  augustss 			if (next == NULL)
   2354      1.15  augustss 				goto nomem;
   2355      1.66   mycroft 			nextphys = htole32(next->physaddr);
   2356      1.15  augustss 		} else {
   2357      1.15  augustss 			next = NULL;
   2358      1.15  augustss 			nextphys = EHCI_NULL;
   2359      1.15  augustss 		}
   2360      1.15  augustss 
   2361  1.91.2.7      tron 		for (i = 0; i * EHCI_PAGE_SIZE <
   2362  1.91.2.7      tron 		            curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
   2363      1.15  augustss 			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
   2364      1.15  augustss 			if (i != 0) /* use offset only in first buffer */
   2365      1.15  augustss 				a = EHCI_PAGE(a);
   2366      1.15  augustss 			cur->qtd.qtd_buffer[i] = htole32(a);
   2367      1.48   mycroft 			cur->qtd.qtd_buffer_hi[i] = 0;
   2368      1.25  augustss #ifdef DIAGNOSTIC
   2369      1.25  augustss 			if (i >= EHCI_QTD_NBUFFERS) {
   2370      1.25  augustss 				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
   2371      1.25  augustss 				goto nomem;
   2372      1.25  augustss 			}
   2373      1.25  augustss #endif
   2374      1.15  augustss 		}
   2375      1.15  augustss 		cur->nextqtd = next;
   2376      1.66   mycroft 		cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
   2377      1.15  augustss 		cur->qtd.qtd_status =
   2378      1.67   mycroft 		    htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
   2379      1.15  augustss 		cur->xfer = xfer;
   2380      1.18  augustss 		cur->len = curlen;
   2381      1.29  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
   2382      1.29  augustss 			    dataphys, dataphys + curlen));
   2383      1.55   mycroft 		/* adjust the toggle based on the number of packets in this
   2384      1.55   mycroft 		   qtd */
   2385      1.55   mycroft 		if (((curlen + mps - 1) / mps) & 1) {
   2386      1.55   mycroft 			tog ^= 1;
   2387      1.64   mycroft 			qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
   2388      1.55   mycroft 		}
   2389  1.91.2.6      tron 		if (next == NULL)
   2390      1.15  augustss 			break;
   2391      1.25  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
   2392      1.15  augustss 		dataphys += curlen;
   2393      1.15  augustss 		cur = next;
   2394      1.15  augustss 	}
   2395      1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   2396      1.15  augustss 	*ep = cur;
   2397      1.55   mycroft 	epipe->nexttoggle = tog;
   2398      1.15  augustss 
   2399      1.29  augustss 	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
   2400      1.29  augustss 		     *sp, *ep));
   2401      1.29  augustss 
   2402      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2403      1.15  augustss 
   2404      1.15  augustss  nomem:
   2405      1.15  augustss 	/* XXX free chain */
   2406      1.25  augustss 	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
   2407      1.15  augustss 	return (USBD_NOMEM);
   2408      1.15  augustss }
   2409      1.15  augustss 
   2410      1.18  augustss Static void
   2411      1.25  augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
   2412      1.18  augustss 		    ehci_soft_qtd_t *sqtdend)
   2413      1.18  augustss {
   2414      1.18  augustss 	ehci_soft_qtd_t *p;
   2415      1.25  augustss 	int i;
   2416      1.18  augustss 
   2417      1.29  augustss 	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
   2418      1.29  augustss 		     sqtd, sqtdend));
   2419      1.29  augustss 
   2420      1.25  augustss 	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
   2421      1.18  augustss 		p = sqtd->nextqtd;
   2422      1.18  augustss 		ehci_free_sqtd(sc, sqtd);
   2423      1.18  augustss 	}
   2424      1.18  augustss }
   2425      1.18  augustss 
   2426      1.15  augustss /****************/
   2427      1.15  augustss 
   2428       1.9  augustss /*
   2429      1.10  augustss  * Close a reqular pipe.
   2430      1.10  augustss  * Assumes that there are no pending transactions.
   2431      1.10  augustss  */
   2432      1.10  augustss void
   2433      1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   2434      1.10  augustss {
   2435      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   2436      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2437      1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2438      1.10  augustss 	int s;
   2439      1.10  augustss 
   2440      1.10  augustss 	s = splusb();
   2441      1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   2442      1.10  augustss 	splx(s);
   2443      1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   2444      1.10  augustss }
   2445      1.10  augustss 
   2446      1.33  augustss /*
   2447      1.10  augustss  * Abort a device request.
   2448      1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   2449      1.10  augustss  * will be removed from the hardware scheduling and that the callback
   2450      1.10  augustss  * for it will be called with USBD_CANCELLED status.
   2451      1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   2452      1.10  augustss  * have happened since the hardware runs concurrently.
   2453      1.10  augustss  * If the transaction has already happened we rely on the ordinary
   2454      1.10  augustss  * interrupt processing to process it.
   2455      1.26  augustss  * XXX This is most probably wrong.
   2456      1.10  augustss  */
   2457      1.10  augustss void
   2458      1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2459      1.10  augustss {
   2460      1.26  augustss #define exfer EXFER(xfer)
   2461      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2462      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2463      1.26  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2464      1.26  augustss 	ehci_soft_qtd_t *sqtd;
   2465      1.26  augustss 	ehci_physaddr_t cur;
   2466      1.26  augustss 	u_int32_t qhstatus;
   2467      1.11  augustss 	int s;
   2468      1.26  augustss 	int hit;
   2469  1.91.2.9       riz 	int wake;
   2470      1.10  augustss 
   2471      1.24  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
   2472      1.10  augustss 
   2473      1.17  augustss 	if (sc->sc_dying) {
   2474      1.17  augustss 		/* If we're dying, just do the software part. */
   2475      1.17  augustss 		s = splusb();
   2476      1.17  augustss 		xfer->status = status;	/* make software ignore it */
   2477      1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2478      1.17  augustss 		usb_transfer_complete(xfer);
   2479      1.17  augustss 		splx(s);
   2480      1.17  augustss 		return;
   2481      1.17  augustss 	}
   2482      1.17  augustss 
   2483      1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2484      1.37    provos 		panic("ehci_abort_xfer: not in process context");
   2485      1.10  augustss 
   2486      1.11  augustss 	/*
   2487  1.91.2.9       riz 	 * If an abort is already in progress then just wait for it to
   2488  1.91.2.9       riz 	 * complete and return.
   2489  1.91.2.9       riz 	 */
   2490  1.91.2.9       riz 	if (xfer->hcflags & UXFER_ABORTING) {
   2491  1.91.2.9       riz 		DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
   2492  1.91.2.9       riz #ifdef DIAGNOSTIC
   2493  1.91.2.9       riz 		if (status == USBD_TIMEOUT)
   2494  1.91.2.9       riz 			printf("ehci_abort_xfer: TIMEOUT while aborting\n");
   2495  1.91.2.9       riz #endif
   2496  1.91.2.9       riz 		/* Override the status which might be USBD_TIMEOUT. */
   2497  1.91.2.9       riz 		xfer->status = status;
   2498  1.91.2.9       riz 		DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
   2499  1.91.2.9       riz 		xfer->hcflags |= UXFER_ABORTWAIT;
   2500  1.91.2.9       riz 		while (xfer->hcflags & UXFER_ABORTING)
   2501  1.91.2.9       riz 			tsleep(&xfer->hcflags, PZERO, "ehciaw", 0);
   2502  1.91.2.9       riz 		return;
   2503  1.91.2.9       riz 	}
   2504  1.91.2.9       riz 	xfer->hcflags |= UXFER_ABORTING;
   2505  1.91.2.9       riz 
   2506  1.91.2.9       riz 	/*
   2507      1.11  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2508      1.11  augustss 	 */
   2509      1.11  augustss 	s = splusb();
   2510      1.11  augustss 	xfer->status = status;	/* make software ignore it */
   2511      1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2512      1.26  augustss 	qhstatus = sqh->qh.qh_qtd.qtd_status;
   2513      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
   2514      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2515      1.26  augustss 		sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
   2516      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2517      1.26  augustss 			break;
   2518      1.26  augustss 	}
   2519      1.11  augustss 	splx(s);
   2520      1.11  augustss 
   2521      1.33  augustss 	/*
   2522      1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2523      1.11  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2524      1.11  augustss 	 * has run.
   2525      1.11  augustss 	 */
   2526      1.26  augustss 	ehci_sync_hc(sc);
   2527      1.29  augustss 	s = splusb();
   2528      1.77  augustss #ifdef USB_USE_SOFTINTR
   2529      1.29  augustss 	sc->sc_softwake = 1;
   2530      1.77  augustss #endif /* USB_USE_SOFTINTR */
   2531      1.29  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2532      1.77  augustss #ifdef USB_USE_SOFTINTR
   2533      1.29  augustss 	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
   2534      1.77  augustss #endif /* USB_USE_SOFTINTR */
   2535      1.29  augustss 	splx(s);
   2536      1.33  augustss 
   2537      1.33  augustss 	/*
   2538      1.11  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2539      1.11  augustss 	 * The complication here is that the hardware may have executed
   2540      1.11  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2541      1.11  augustss 	 * the TDs of this xfer we check if the hardware points to
   2542      1.11  augustss 	 * any of them.
   2543      1.11  augustss 	 */
   2544      1.11  augustss 	s = splusb();		/* XXX why? */
   2545      1.26  augustss 	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
   2546      1.26  augustss 	hit = 0;
   2547      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2548      1.26  augustss 		hit |= cur == sqtd->physaddr;
   2549      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2550      1.26  augustss 			break;
   2551      1.26  augustss 	}
   2552      1.26  augustss 	sqtd = sqtd->nextqtd;
   2553      1.26  augustss 	/* Zap curqtd register if hardware pointed inside the xfer. */
   2554      1.26  augustss 	if (hit && sqtd != NULL) {
   2555      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
   2556      1.26  augustss 		sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
   2557      1.26  augustss 		sqh->qh.qh_qtd.qtd_status = qhstatus;
   2558      1.26  augustss 	} else {
   2559      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
   2560      1.26  augustss 	}
   2561      1.11  augustss 
   2562      1.11  augustss 	/*
   2563      1.26  augustss 	 * Step 4: Execute callback.
   2564      1.11  augustss 	 */
   2565      1.18  augustss #ifdef DIAGNOSTIC
   2566      1.26  augustss 	exfer->isdone = 1;
   2567      1.18  augustss #endif
   2568  1.91.2.9       riz 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2569  1.91.2.9       riz 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2570      1.11  augustss 	usb_transfer_complete(xfer);
   2571  1.91.2.9       riz 	if (wake)
   2572  1.91.2.9       riz 		wakeup(&xfer->hcflags);
   2573      1.11  augustss 
   2574      1.11  augustss 	splx(s);
   2575      1.26  augustss #undef exfer
   2576      1.10  augustss }
   2577      1.10  augustss 
   2578      1.15  augustss void
   2579      1.15  augustss ehci_timeout(void *addr)
   2580      1.15  augustss {
   2581      1.15  augustss 	struct ehci_xfer *exfer = addr;
   2582      1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   2583      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2584      1.15  augustss 
   2585      1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   2586      1.22  augustss #ifdef USB_DEBUG
   2587      1.26  augustss 	if (ehcidebug > 1)
   2588      1.22  augustss 		usbd_dump_pipe(exfer->xfer.pipe);
   2589      1.22  augustss #endif
   2590      1.15  augustss 
   2591      1.17  augustss 	if (sc->sc_dying) {
   2592      1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   2593      1.17  augustss 		return;
   2594      1.17  augustss 	}
   2595      1.17  augustss 
   2596      1.15  augustss 	/* Execute the abort in a process context. */
   2597      1.15  augustss 	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
   2598      1.15  augustss 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
   2599      1.15  augustss }
   2600      1.15  augustss 
   2601      1.15  augustss void
   2602      1.15  augustss ehci_timeout_task(void *addr)
   2603      1.15  augustss {
   2604      1.15  augustss 	usbd_xfer_handle xfer = addr;
   2605      1.15  augustss 	int s;
   2606      1.15  augustss 
   2607      1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   2608      1.15  augustss 
   2609      1.15  augustss 	s = splusb();
   2610      1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   2611      1.15  augustss 	splx(s);
   2612      1.15  augustss }
   2613      1.15  augustss 
   2614       1.5  augustss /************************/
   2615       1.5  augustss 
   2616      1.10  augustss Static usbd_status
   2617      1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2618      1.10  augustss {
   2619      1.10  augustss 	usbd_status err;
   2620      1.10  augustss 
   2621      1.10  augustss 	/* Insert last in queue. */
   2622      1.10  augustss 	err = usb_insert_transfer(xfer);
   2623      1.10  augustss 	if (err)
   2624      1.10  augustss 		return (err);
   2625      1.10  augustss 
   2626      1.10  augustss 	/* Pipe isn't running, start first */
   2627      1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2628      1.10  augustss }
   2629      1.10  augustss 
   2630      1.12  augustss Static usbd_status
   2631      1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   2632      1.12  augustss {
   2633      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2634      1.15  augustss 	usbd_status err;
   2635      1.15  augustss 
   2636      1.15  augustss 	if (sc->sc_dying)
   2637      1.15  augustss 		return (USBD_IOERROR);
   2638      1.15  augustss 
   2639      1.15  augustss #ifdef DIAGNOSTIC
   2640      1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2641      1.15  augustss 		/* XXX panic */
   2642      1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   2643      1.15  augustss 		return (USBD_INVAL);
   2644      1.15  augustss 	}
   2645      1.15  augustss #endif
   2646      1.15  augustss 
   2647      1.15  augustss 	err = ehci_device_request(xfer);
   2648      1.15  augustss 	if (err)
   2649      1.15  augustss 		return (err);
   2650      1.15  augustss 
   2651      1.15  augustss 	if (sc->sc_bus.use_polling)
   2652      1.15  augustss 		ehci_waitintr(sc, xfer);
   2653      1.15  augustss 	return (USBD_IN_PROGRESS);
   2654      1.12  augustss }
   2655      1.10  augustss 
   2656      1.10  augustss void
   2657      1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   2658      1.10  augustss {
   2659      1.18  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2660      1.18  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2661      1.25  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2662      1.18  augustss 
   2663      1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   2664      1.10  augustss 
   2665      1.10  augustss #ifdef DIAGNOSTIC
   2666      1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2667      1.37    provos 		panic("ehci_ctrl_done: not a request");
   2668      1.10  augustss 	}
   2669      1.10  augustss #endif
   2670      1.18  augustss 
   2671      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2672      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2673      1.25  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2674      1.25  augustss 	}
   2675      1.18  augustss 
   2676      1.25  augustss 	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
   2677      1.10  augustss }
   2678      1.10  augustss 
   2679      1.10  augustss /* Abort a device control request. */
   2680      1.10  augustss Static void
   2681      1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   2682      1.10  augustss {
   2683      1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   2684      1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2685      1.10  augustss }
   2686      1.10  augustss 
   2687      1.10  augustss /* Close a device control pipe. */
   2688      1.10  augustss Static void
   2689      1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   2690      1.10  augustss {
   2691      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2692      1.10  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
   2693      1.10  augustss 
   2694      1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   2695      1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2696      1.15  augustss }
   2697      1.15  augustss 
   2698      1.15  augustss usbd_status
   2699      1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   2700      1.15  augustss {
   2701      1.18  augustss #define exfer EXFER(xfer)
   2702      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2703      1.15  augustss 	usb_device_request_t *req = &xfer->request;
   2704      1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2705      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2706      1.15  augustss 	int addr = dev->address;
   2707      1.15  augustss 	ehci_soft_qtd_t *setup, *stat, *next;
   2708      1.15  augustss 	ehci_soft_qh_t *sqh;
   2709      1.15  augustss 	int isread;
   2710      1.15  augustss 	int len;
   2711      1.15  augustss 	usbd_status err;
   2712      1.15  augustss 	int s;
   2713      1.15  augustss 
   2714      1.15  augustss 	isread = req->bmRequestType & UT_READ;
   2715      1.15  augustss 	len = UGETW(req->wLength);
   2716      1.15  augustss 
   2717      1.72  augustss 	DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
   2718      1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2719      1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2720      1.33  augustss 		    UGETW(req->wIndex), len, addr,
   2721      1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   2722      1.15  augustss 
   2723      1.15  augustss 	setup = ehci_alloc_sqtd(sc);
   2724      1.15  augustss 	if (setup == NULL) {
   2725      1.15  augustss 		err = USBD_NOMEM;
   2726      1.15  augustss 		goto bad1;
   2727      1.15  augustss 	}
   2728      1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   2729      1.15  augustss 	if (stat == NULL) {
   2730      1.15  augustss 		err = USBD_NOMEM;
   2731      1.15  augustss 		goto bad2;
   2732      1.15  augustss 	}
   2733      1.15  augustss 
   2734      1.15  augustss 	sqh = epipe->sqh;
   2735      1.15  augustss 	epipe->u.ctl.length = len;
   2736      1.15  augustss 
   2737      1.62   mycroft 	/* Update device address and length since they may have changed
   2738      1.62   mycroft 	   during the setup of the control pipe in usbd_new_device(). */
   2739      1.15  augustss 	/* XXX This only needs to be done once, but it's too early in open. */
   2740      1.15  augustss 	/* XXXX Should not touch ED here! */
   2741      1.33  augustss 	sqh->qh.qh_endp =
   2742      1.55   mycroft 	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
   2743      1.15  augustss 	    htole32(
   2744      1.15  augustss 	     EHCI_QH_SET_ADDR(addr) |
   2745      1.15  augustss 	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
   2746      1.15  augustss 	    );
   2747      1.15  augustss 
   2748      1.15  augustss 	/* Set up data transaction */
   2749      1.15  augustss 	if (len != 0) {
   2750      1.15  augustss 		ehci_soft_qtd_t *end;
   2751      1.15  augustss 
   2752      1.55   mycroft 		/* Start toggle at 1. */
   2753      1.55   mycroft 		epipe->nexttoggle = 1;
   2754      1.25  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   2755      1.15  augustss 			  &next, &end);
   2756      1.15  augustss 		if (err)
   2757      1.15  augustss 			goto bad3;
   2758      1.83  augustss 		end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
   2759      1.15  augustss 		end->nextqtd = stat;
   2760      1.33  augustss 		end->qtd.qtd_next =
   2761      1.15  augustss 		end->qtd.qtd_altnext = htole32(stat->physaddr);
   2762      1.15  augustss 	} else {
   2763      1.15  augustss 		next = stat;
   2764      1.15  augustss 	}
   2765      1.15  augustss 
   2766      1.30  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
   2767      1.15  augustss 
   2768      1.55   mycroft 	/* Clear toggle */
   2769      1.15  augustss 	setup->qtd.qtd_status = htole32(
   2770      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2771      1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   2772      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2773      1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(0) |
   2774      1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   2775      1.15  augustss 	    );
   2776      1.31  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
   2777      1.48   mycroft 	setup->qtd.qtd_buffer_hi[0] = 0;
   2778      1.15  augustss 	setup->nextqtd = next;
   2779      1.15  augustss 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
   2780      1.15  augustss 	setup->xfer = xfer;
   2781      1.18  augustss 	setup->len = sizeof *req;
   2782      1.15  augustss 
   2783      1.15  augustss 	stat->qtd.qtd_status = htole32(
   2784      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2785      1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   2786      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2787      1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(1) |
   2788      1.15  augustss 	    EHCI_QTD_IOC
   2789      1.15  augustss 	    );
   2790      1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   2791      1.48   mycroft 	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
   2792      1.15  augustss 	stat->nextqtd = NULL;
   2793      1.15  augustss 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
   2794      1.15  augustss 	stat->xfer = xfer;
   2795      1.18  augustss 	stat->len = 0;
   2796      1.15  augustss 
   2797      1.15  augustss #ifdef EHCI_DEBUG
   2798      1.23  augustss 	if (ehcidebug > 5) {
   2799      1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   2800      1.15  augustss 		ehci_dump_sqh(sqh);
   2801      1.15  augustss 		ehci_dump_sqtds(setup);
   2802      1.15  augustss 	}
   2803      1.15  augustss #endif
   2804      1.15  augustss 
   2805      1.18  augustss 	exfer->sqtdstart = setup;
   2806      1.18  augustss 	exfer->sqtdend = stat;
   2807      1.18  augustss #ifdef DIAGNOSTIC
   2808      1.18  augustss 	if (!exfer->isdone) {
   2809      1.18  augustss 		printf("ehci_device_request: not done, exfer=%p\n", exfer);
   2810      1.18  augustss 	}
   2811      1.18  augustss 	exfer->isdone = 0;
   2812      1.18  augustss #endif
   2813      1.18  augustss 
   2814      1.15  augustss 	/* Insert qTD in QH list. */
   2815      1.15  augustss 	s = splusb();
   2816      1.23  augustss 	ehci_set_qh_qtd(sqh, setup);
   2817      1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2818      1.45   tsutsui                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2819      1.15  augustss 			    ehci_timeout, xfer);
   2820      1.15  augustss 	}
   2821      1.18  augustss 	ehci_add_intr_list(sc, exfer);
   2822      1.18  augustss 	xfer->status = USBD_IN_PROGRESS;
   2823      1.15  augustss 	splx(s);
   2824      1.15  augustss 
   2825      1.17  augustss #ifdef EHCI_DEBUG
   2826      1.15  augustss 	if (ehcidebug > 10) {
   2827      1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   2828      1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   2829      1.23  augustss 		delay(10000);
   2830      1.18  augustss 		ehci_dump_regs(sc);
   2831      1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2832      1.15  augustss 		ehci_dump_sqh(sqh);
   2833      1.15  augustss 		ehci_dump_sqtds(setup);
   2834      1.15  augustss 	}
   2835      1.15  augustss #endif
   2836      1.15  augustss 
   2837      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2838      1.15  augustss 
   2839      1.15  augustss  bad3:
   2840      1.15  augustss 	ehci_free_sqtd(sc, stat);
   2841      1.15  augustss  bad2:
   2842      1.15  augustss 	ehci_free_sqtd(sc, setup);
   2843      1.15  augustss  bad1:
   2844      1.25  augustss 	DPRINTFN(-1,("ehci_device_request: no memory\n"));
   2845      1.25  augustss 	xfer->status = err;
   2846      1.25  augustss 	usb_transfer_complete(xfer);
   2847      1.15  augustss 	return (err);
   2848      1.18  augustss #undef exfer
   2849      1.10  augustss }
   2850      1.10  augustss 
   2851  1.91.2.8      tron /*
   2852  1.91.2.8      tron  * Some EHCI chips from VIA seem to trigger interrupts before writing back the
   2853  1.91.2.8      tron  * qTD status, or miss signalling occasionally under heavy load.  If the host
   2854  1.91.2.8      tron  * machine is too fast, we we can miss transaction completion - when we scan
   2855  1.91.2.8      tron  * the active list the transaction still seems to be active.  This generally
   2856  1.91.2.8      tron  * exhibits itself as a umass stall that never recovers.
   2857  1.91.2.8      tron  *
   2858  1.91.2.8      tron  * We work around this behaviour by setting up this callback after any softintr
   2859  1.91.2.8      tron  * that completes with transactions still pending, giving us another chance to
   2860  1.91.2.8      tron  * check for completion after the writeback has taken place.
   2861  1.91.2.8      tron  */
   2862  1.91.2.8      tron void
   2863  1.91.2.8      tron ehci_intrlist_timeout(void *arg)
   2864  1.91.2.8      tron {
   2865  1.91.2.8      tron 	ehci_softc_t *sc = arg;
   2866  1.91.2.8      tron 	int s = splusb();
   2867  1.91.2.8      tron 
   2868  1.91.2.8      tron 	DPRINTF(("ehci_intrlist_timeout\n"));
   2869  1.91.2.8      tron 	usb_schedsoftintr(&sc->sc_bus);
   2870  1.91.2.8      tron 
   2871  1.91.2.8      tron 	splx(s);
   2872  1.91.2.8      tron }
   2873  1.91.2.8      tron 
   2874      1.10  augustss /************************/
   2875       1.5  augustss 
   2876      1.19  augustss Static usbd_status
   2877      1.19  augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
   2878      1.19  augustss {
   2879      1.19  augustss 	usbd_status err;
   2880      1.19  augustss 
   2881      1.19  augustss 	/* Insert last in queue. */
   2882      1.19  augustss 	err = usb_insert_transfer(xfer);
   2883      1.19  augustss 	if (err)
   2884      1.19  augustss 		return (err);
   2885      1.19  augustss 
   2886      1.19  augustss 	/* Pipe isn't running, start first */
   2887      1.19  augustss 	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2888      1.19  augustss }
   2889      1.19  augustss 
   2890      1.19  augustss usbd_status
   2891      1.19  augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
   2892      1.19  augustss {
   2893      1.19  augustss #define exfer EXFER(xfer)
   2894      1.19  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2895      1.19  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2896      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2897      1.19  augustss 	ehci_soft_qtd_t *data, *dataend;
   2898      1.19  augustss 	ehci_soft_qh_t *sqh;
   2899      1.19  augustss 	usbd_status err;
   2900      1.19  augustss 	int len, isread, endpt;
   2901      1.19  augustss 	int s;
   2902      1.19  augustss 
   2903      1.72  augustss 	DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
   2904      1.19  augustss 		     xfer, xfer->length, xfer->flags));
   2905      1.19  augustss 
   2906      1.19  augustss 	if (sc->sc_dying)
   2907      1.19  augustss 		return (USBD_IOERROR);
   2908      1.19  augustss 
   2909      1.19  augustss #ifdef DIAGNOSTIC
   2910      1.19  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2911      1.72  augustss 		panic("ehci_device_bulk_start: a request");
   2912      1.19  augustss #endif
   2913      1.19  augustss 
   2914      1.19  augustss 	len = xfer->length;
   2915      1.19  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   2916      1.19  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2917      1.19  augustss 	sqh = epipe->sqh;
   2918      1.19  augustss 
   2919      1.19  augustss 	epipe->u.bulk.length = len;
   2920      1.19  augustss 
   2921      1.25  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   2922      1.19  augustss 				   &dataend);
   2923      1.25  augustss 	if (err) {
   2924      1.25  augustss 		DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
   2925      1.25  augustss 		xfer->status = err;
   2926      1.25  augustss 		usb_transfer_complete(xfer);
   2927      1.19  augustss 		return (err);
   2928      1.25  augustss 	}
   2929      1.19  augustss 
   2930      1.19  augustss #ifdef EHCI_DEBUG
   2931      1.23  augustss 	if (ehcidebug > 5) {
   2932      1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(1)\n"));
   2933      1.23  augustss 		ehci_dump_sqh(sqh);
   2934      1.19  augustss 		ehci_dump_sqtds(data);
   2935      1.19  augustss 	}
   2936      1.19  augustss #endif
   2937      1.19  augustss 
   2938      1.19  augustss 	/* Set up interrupt info. */
   2939      1.19  augustss 	exfer->sqtdstart = data;
   2940      1.19  augustss 	exfer->sqtdend = dataend;
   2941      1.19  augustss #ifdef DIAGNOSTIC
   2942      1.19  augustss 	if (!exfer->isdone) {
   2943      1.72  augustss 		printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
   2944      1.19  augustss 	}
   2945      1.19  augustss 	exfer->isdone = 0;
   2946      1.19  augustss #endif
   2947      1.19  augustss 
   2948      1.19  augustss 	s = splusb();
   2949      1.23  augustss 	ehci_set_qh_qtd(sqh, data);
   2950      1.19  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2951      1.45   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2952      1.19  augustss 			    ehci_timeout, xfer);
   2953      1.19  augustss 	}
   2954      1.19  augustss 	ehci_add_intr_list(sc, exfer);
   2955      1.19  augustss 	xfer->status = USBD_IN_PROGRESS;
   2956      1.19  augustss 	splx(s);
   2957      1.19  augustss 
   2958      1.19  augustss #ifdef EHCI_DEBUG
   2959      1.19  augustss 	if (ehcidebug > 10) {
   2960      1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(2)\n"));
   2961      1.23  augustss 		delay(10000);
   2962      1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(3)\n"));
   2963      1.23  augustss 		ehci_dump_regs(sc);
   2964      1.29  augustss #if 0
   2965      1.29  augustss 		printf("async_head:\n");
   2966      1.23  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2967      1.29  augustss #endif
   2968      1.29  augustss 		printf("sqh:\n");
   2969      1.23  augustss 		ehci_dump_sqh(sqh);
   2970      1.19  augustss 		ehci_dump_sqtds(data);
   2971      1.19  augustss 	}
   2972      1.19  augustss #endif
   2973      1.19  augustss 
   2974      1.19  augustss 	if (sc->sc_bus.use_polling)
   2975      1.19  augustss 		ehci_waitintr(sc, xfer);
   2976      1.19  augustss 
   2977      1.19  augustss 	return (USBD_IN_PROGRESS);
   2978      1.19  augustss #undef exfer
   2979      1.19  augustss }
   2980      1.19  augustss 
   2981      1.19  augustss Static void
   2982      1.19  augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
   2983      1.19  augustss {
   2984      1.19  augustss 	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
   2985      1.19  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2986      1.19  augustss }
   2987      1.19  augustss 
   2988      1.33  augustss /*
   2989      1.19  augustss  * Close a device bulk pipe.
   2990      1.19  augustss  */
   2991      1.19  augustss Static void
   2992      1.19  augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
   2993      1.19  augustss {
   2994      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2995      1.19  augustss 
   2996      1.19  augustss 	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
   2997      1.19  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2998      1.19  augustss }
   2999      1.19  augustss 
   3000      1.19  augustss void
   3001      1.19  augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
   3002      1.19  augustss {
   3003      1.19  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3004      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3005      1.19  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   3006      1.19  augustss 
   3007      1.33  augustss 	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
   3008      1.19  augustss 		     xfer, xfer->actlen));
   3009      1.19  augustss 
   3010      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3011      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   3012      1.44  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3013      1.25  augustss 	}
   3014      1.19  augustss 
   3015      1.19  augustss 	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
   3016      1.19  augustss }
   3017       1.5  augustss 
   3018      1.10  augustss /************************/
   3019      1.10  augustss 
   3020      1.78  augustss Static usbd_status
   3021      1.78  augustss ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
   3022      1.78  augustss {
   3023      1.78  augustss 	struct ehci_soft_islot *isp;
   3024      1.78  augustss 	int islot, lev;
   3025      1.78  augustss 
   3026      1.78  augustss 	/* Find a poll rate that is large enough. */
   3027      1.78  augustss 	for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
   3028      1.78  augustss 		if (EHCI_ILEV_IVAL(lev) <= ival)
   3029      1.78  augustss 			break;
   3030      1.78  augustss 
   3031      1.78  augustss 	/* Pick an interrupt slot at the right level. */
   3032      1.78  augustss 	/* XXX could do better than picking at random */
   3033      1.78  augustss 	sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
   3034      1.78  augustss 	islot = EHCI_IQHIDX(lev, sc->sc_rand);
   3035      1.78  augustss 
   3036      1.78  augustss 	sqh->islot = islot;
   3037      1.78  augustss 	isp = &sc->sc_islots[islot];
   3038      1.78  augustss 	ehci_add_qh(sqh, isp->sqh);
   3039      1.78  augustss 
   3040      1.78  augustss 	return (USBD_NORMAL_COMPLETION);
   3041      1.78  augustss }
   3042      1.78  augustss 
   3043      1.78  augustss Static usbd_status
   3044      1.78  augustss ehci_device_intr_transfer(usbd_xfer_handle xfer)
   3045      1.78  augustss {
   3046      1.78  augustss 	usbd_status err;
   3047      1.78  augustss 
   3048      1.78  augustss 	/* Insert last in queue. */
   3049      1.78  augustss 	err = usb_insert_transfer(xfer);
   3050      1.78  augustss 	if (err)
   3051      1.78  augustss 		return (err);
   3052      1.78  augustss 
   3053      1.78  augustss 	/*
   3054      1.78  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3055      1.78  augustss 	 * so start it first.
   3056      1.78  augustss 	 */
   3057      1.78  augustss 	return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3058      1.78  augustss }
   3059      1.78  augustss 
   3060      1.78  augustss Static usbd_status
   3061      1.78  augustss ehci_device_intr_start(usbd_xfer_handle xfer)
   3062      1.78  augustss {
   3063      1.78  augustss #define exfer EXFER(xfer)
   3064      1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3065      1.78  augustss 	usbd_device_handle dev = xfer->pipe->device;
   3066      1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   3067      1.78  augustss 	ehci_soft_qtd_t *data, *dataend;
   3068      1.78  augustss 	ehci_soft_qh_t *sqh;
   3069      1.78  augustss 	usbd_status err;
   3070      1.78  augustss 	int len, isread, endpt;
   3071      1.78  augustss 	int s;
   3072      1.78  augustss 
   3073      1.78  augustss 	DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
   3074      1.78  augustss 	    xfer, xfer->length, xfer->flags));
   3075      1.78  augustss 
   3076      1.78  augustss 	if (sc->sc_dying)
   3077      1.78  augustss 		return (USBD_IOERROR);
   3078      1.78  augustss 
   3079      1.78  augustss #ifdef DIAGNOSTIC
   3080      1.78  augustss 	if (xfer->rqflags & URQ_REQUEST)
   3081      1.78  augustss 		panic("ehci_device_intr_start: a request");
   3082      1.78  augustss #endif
   3083      1.78  augustss 
   3084      1.78  augustss 	len = xfer->length;
   3085      1.78  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3086      1.78  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3087      1.78  augustss 	sqh = epipe->sqh;
   3088      1.78  augustss 
   3089      1.78  augustss 	epipe->u.intr.length = len;
   3090      1.78  augustss 
   3091      1.78  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   3092      1.78  augustss 	    &dataend);
   3093      1.78  augustss 	if (err) {
   3094      1.78  augustss 		DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
   3095      1.78  augustss 		xfer->status = err;
   3096      1.78  augustss 		usb_transfer_complete(xfer);
   3097      1.78  augustss 		return (err);
   3098      1.78  augustss 	}
   3099      1.78  augustss 
   3100      1.78  augustss #ifdef EHCI_DEBUG
   3101      1.78  augustss 	if (ehcidebug > 5) {
   3102      1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(1)\n"));
   3103      1.78  augustss 		ehci_dump_sqh(sqh);
   3104      1.78  augustss 		ehci_dump_sqtds(data);
   3105      1.78  augustss 	}
   3106      1.78  augustss #endif
   3107      1.78  augustss 
   3108      1.78  augustss 	/* Set up interrupt info. */
   3109      1.78  augustss 	exfer->sqtdstart = data;
   3110      1.78  augustss 	exfer->sqtdend = dataend;
   3111      1.78  augustss #ifdef DIAGNOSTIC
   3112      1.78  augustss 	if (!exfer->isdone) {
   3113      1.78  augustss 		printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
   3114      1.78  augustss 	}
   3115      1.78  augustss 	exfer->isdone = 0;
   3116      1.78  augustss #endif
   3117      1.78  augustss 
   3118      1.78  augustss 	s = splusb();
   3119      1.78  augustss 	ehci_set_qh_qtd(sqh, data);
   3120      1.78  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3121      1.78  augustss 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   3122      1.78  augustss 		    ehci_timeout, xfer);
   3123      1.78  augustss 	}
   3124      1.78  augustss 	ehci_add_intr_list(sc, exfer);
   3125      1.78  augustss 	xfer->status = USBD_IN_PROGRESS;
   3126      1.78  augustss 	splx(s);
   3127      1.78  augustss 
   3128      1.78  augustss #ifdef EHCI_DEBUG
   3129      1.78  augustss 	if (ehcidebug > 10) {
   3130      1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(2)\n"));
   3131      1.78  augustss 		delay(10000);
   3132      1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(3)\n"));
   3133      1.78  augustss 		ehci_dump_regs(sc);
   3134      1.78  augustss 		printf("sqh:\n");
   3135      1.78  augustss 		ehci_dump_sqh(sqh);
   3136      1.78  augustss 		ehci_dump_sqtds(data);
   3137      1.78  augustss 	}
   3138      1.78  augustss #endif
   3139      1.78  augustss 
   3140      1.78  augustss 	if (sc->sc_bus.use_polling)
   3141      1.78  augustss 		ehci_waitintr(sc, xfer);
   3142      1.78  augustss 
   3143      1.78  augustss 	return (USBD_IN_PROGRESS);
   3144      1.78  augustss #undef exfer
   3145      1.78  augustss }
   3146      1.78  augustss 
   3147      1.78  augustss Static void
   3148      1.78  augustss ehci_device_intr_abort(usbd_xfer_handle xfer)
   3149      1.78  augustss {
   3150      1.78  augustss 	DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
   3151      1.78  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3152      1.78  augustss 		DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
   3153      1.78  augustss 		xfer->pipe->intrxfer = NULL;
   3154      1.78  augustss 	}
   3155      1.78  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3156      1.78  augustss }
   3157      1.78  augustss 
   3158      1.78  augustss Static void
   3159      1.78  augustss ehci_device_intr_close(usbd_pipe_handle pipe)
   3160      1.78  augustss {
   3161      1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3162      1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3163      1.78  augustss 	struct ehci_soft_islot *isp;
   3164      1.78  augustss 
   3165      1.78  augustss 	isp = &sc->sc_islots[epipe->sqh->islot];
   3166      1.78  augustss 	ehci_close_pipe(pipe, isp->sqh);
   3167      1.78  augustss }
   3168      1.78  augustss 
   3169      1.78  augustss Static void
   3170      1.78  augustss ehci_device_intr_done(usbd_xfer_handle xfer)
   3171      1.78  augustss {
   3172      1.78  augustss #define exfer EXFER(xfer)
   3173      1.78  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3174      1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3175      1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3176      1.78  augustss 	ehci_soft_qtd_t *data, *dataend;
   3177      1.78  augustss 	ehci_soft_qh_t *sqh;
   3178      1.78  augustss 	usbd_status err;
   3179      1.78  augustss 	int len, isread, endpt, s;
   3180      1.78  augustss 
   3181      1.78  augustss 	DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
   3182      1.78  augustss 	    xfer, xfer->actlen));
   3183      1.78  augustss 
   3184      1.78  augustss 	if (xfer->pipe->repeat) {
   3185      1.78  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3186      1.78  augustss 
   3187      1.78  augustss 		len = epipe->u.intr.length;
   3188      1.78  augustss 		xfer->length = len;
   3189      1.78  augustss 		endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3190      1.78  augustss 		isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3191      1.78  augustss 		sqh = epipe->sqh;
   3192      1.78  augustss 
   3193      1.78  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3194      1.78  augustss 		    &data, &dataend);
   3195      1.78  augustss 		if (err) {
   3196      1.78  augustss 			DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
   3197      1.78  augustss 			xfer->status = err;
   3198      1.78  augustss 			return;
   3199      1.78  augustss 		}
   3200      1.78  augustss 
   3201      1.78  augustss 		/* Set up interrupt info. */
   3202      1.78  augustss 		exfer->sqtdstart = data;
   3203      1.78  augustss 		exfer->sqtdend = dataend;
   3204      1.78  augustss #ifdef DIAGNOSTIC
   3205      1.78  augustss 		if (!exfer->isdone) {
   3206      1.78  augustss 			printf("ehci_device_intr_done: not done, ex=%p\n",
   3207      1.78  augustss 			    exfer);
   3208      1.78  augustss 		}
   3209      1.78  augustss 		exfer->isdone = 0;
   3210      1.78  augustss #endif
   3211      1.78  augustss 
   3212      1.78  augustss 		s = splusb();
   3213      1.78  augustss 		ehci_set_qh_qtd(sqh, data);
   3214      1.78  augustss 		if (xfer->timeout && !sc->sc_bus.use_polling) {
   3215      1.78  augustss 			usb_callout(xfer->timeout_handle,
   3216      1.78  augustss 			    mstohz(xfer->timeout), ehci_timeout, xfer);
   3217      1.78  augustss 		}
   3218      1.78  augustss 		splx(s);
   3219      1.78  augustss 
   3220      1.78  augustss 		xfer->status = USBD_IN_PROGRESS;
   3221      1.78  augustss 	} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3222      1.78  augustss 		ehci_del_intr_list(ex); /* remove from active list */
   3223      1.78  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3224      1.78  augustss 	}
   3225      1.78  augustss #undef exfer
   3226      1.78  augustss }
   3227      1.10  augustss 
   3228      1.10  augustss /************************/
   3229       1.5  augustss 
   3230       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3231       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3232       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
   3233       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle pipe) { }
   3234       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle xfer) { }
   3235