ehci.c revision 1.10
1 /* $NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 0.96 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/data/usb_20.zip 46 * 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $"); 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/kernel.h> 55 #include <sys/malloc.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #include <sys/proc.h> 59 #include <sys/queue.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ehcireg.h> 71 #include <dev/usb/ehcivar.h> 72 73 #ifdef EHCI_DEBUG 74 #define DPRINTF(x) if (ehcidebug) printf x 75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 76 int ehcidebug = 0; 77 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 78 #else 79 #define DPRINTF(x) 80 #define DPRINTFN(n,x) 81 #endif 82 83 struct ehci_pipe { 84 struct usbd_pipe pipe; 85 ehci_soft_qh_t *sqh; 86 union { 87 ehci_soft_qtd_t *qtd; 88 /* ehci_soft_itd_t *itd; */ 89 } tail; 90 union { 91 /* Control pipe */ 92 struct { 93 usb_dma_t reqdma; 94 u_int length; 95 ehci_soft_qtd_t *setup, *data, *stat; 96 } ctl; 97 /* Interrupt pipe */ 98 /* Bulk pipe */ 99 struct { 100 u_int length; 101 int isread; 102 } bulk; 103 /* Iso pipe */ 104 } u; 105 }; 106 107 Static void ehci_shutdown(void *); 108 Static void ehci_power(int, void *); 109 110 Static usbd_status ehci_open(usbd_pipe_handle); 111 Static void ehci_poll(struct usbd_bus *); 112 Static void ehci_softintr(void *); 113 114 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 115 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 116 117 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 118 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 119 120 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 121 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 122 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 123 Static void ehci_root_ctrl_close(usbd_pipe_handle); 124 Static void ehci_root_ctrl_done(usbd_xfer_handle); 125 126 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 127 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 128 Static void ehci_root_intr_abort(usbd_xfer_handle); 129 Static void ehci_root_intr_close(usbd_pipe_handle); 130 Static void ehci_root_intr_done(usbd_xfer_handle); 131 132 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 133 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 134 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 135 Static void ehci_device_ctrl_close(usbd_pipe_handle); 136 Static void ehci_device_ctrl_done(usbd_xfer_handle); 137 138 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 139 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 140 Static void ehci_device_bulk_abort(usbd_xfer_handle); 141 Static void ehci_device_bulk_close(usbd_pipe_handle); 142 Static void ehci_device_bulk_done(usbd_xfer_handle); 143 144 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 145 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 146 Static void ehci_device_intr_abort(usbd_xfer_handle); 147 Static void ehci_device_intr_close(usbd_pipe_handle); 148 Static void ehci_device_intr_done(usbd_xfer_handle); 149 150 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 152 Static void ehci_device_isoc_abort(usbd_xfer_handle); 153 Static void ehci_device_isoc_close(usbd_pipe_handle); 154 Static void ehci_device_isoc_done(usbd_xfer_handle); 155 156 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 157 Static void ehci_noop(usbd_pipe_handle pipe); 158 159 Static int ehci_str(usb_string_descriptor_t *, int, char *); 160 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 161 Static void ehci_pcd_able(ehci_softc_t *, int); 162 Static void ehci_pcd_enable(void *); 163 Static void ehci_disown(ehci_softc_t *, int, int); 164 165 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 166 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 167 168 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 169 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 170 171 Static void ehci_hash_add_qtd(ehci_softc_t *, ehci_soft_qtd_t *); 172 Static void ehci_hash_rem_qtd(ehci_softc_t *, ehci_soft_qtd_t *); 173 Static ehci_soft_qtd_t *ehci_hash_find_qtd(ehci_softc_t *, ehci_physaddr_t); 174 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 175 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 176 ehci_soft_qh_t *); 177 178 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 179 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 180 181 #ifdef EHCI_DEBUG 182 Static void ehci_dumpregs(ehci_softc_t *); 183 Static void ehci_dump(void); 184 Static ehci_softc_t *theehci; 185 Static void ehci_dump_link(ehci_link_t); 186 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 187 Static void ehci_dump_qtd(ehci_qtd_t *); 188 Static void ehci_dump_sqh(ehci_soft_qh_t *); 189 #endif 190 191 #define EHCI_INTR_ENDPT 1 192 193 Static struct usbd_bus_methods ehci_bus_methods = { 194 ehci_open, 195 ehci_softintr, 196 ehci_poll, 197 ehci_allocm, 198 ehci_freem, 199 ehci_allocx, 200 ehci_freex, 201 }; 202 203 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 204 ehci_root_ctrl_transfer, 205 ehci_root_ctrl_start, 206 ehci_root_ctrl_abort, 207 ehci_root_ctrl_close, 208 ehci_noop, 209 ehci_root_ctrl_done, 210 }; 211 212 Static struct usbd_pipe_methods ehci_root_intr_methods = { 213 ehci_root_intr_transfer, 214 ehci_root_intr_start, 215 ehci_root_intr_abort, 216 ehci_root_intr_close, 217 ehci_noop, 218 ehci_root_intr_done, 219 }; 220 221 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 222 ehci_device_ctrl_transfer, 223 ehci_device_ctrl_start, 224 ehci_device_ctrl_abort, 225 ehci_device_ctrl_close, 226 ehci_noop, 227 ehci_device_ctrl_done, 228 }; 229 230 Static struct usbd_pipe_methods ehci_device_intr_methods = { 231 ehci_device_intr_transfer, 232 ehci_device_intr_start, 233 ehci_device_intr_abort, 234 ehci_device_intr_close, 235 ehci_device_clear_toggle, 236 ehci_device_intr_done, 237 }; 238 239 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 240 ehci_device_bulk_transfer, 241 ehci_device_bulk_start, 242 ehci_device_bulk_abort, 243 ehci_device_bulk_close, 244 ehci_device_clear_toggle, 245 ehci_device_bulk_done, 246 }; 247 248 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 249 ehci_device_isoc_transfer, 250 ehci_device_isoc_start, 251 ehci_device_isoc_abort, 252 ehci_device_isoc_close, 253 ehci_noop, 254 ehci_device_isoc_done, 255 }; 256 257 usbd_status 258 ehci_init(ehci_softc_t *sc) 259 { 260 u_int32_t version, sparams, cparams, hcr; 261 u_int i; 262 usbd_status err; 263 264 DPRINTF(("ehci_init: start\n")); 265 #ifdef EHCI_DEBUG 266 theehci = sc; 267 #endif 268 269 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 270 271 version = EREAD2(sc, EHCI_HCIVERSION); 272 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 273 version >> 8, version & 0xff); 274 275 sparams = EREAD4(sc, EHCI_HCSPARAMS); 276 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 277 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 278 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 279 printf("%s: wrong number of companions (%d != %d)\n", 280 USBDEVNAME(sc->sc_bus.bdev), 281 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 282 return (USBD_IOERROR); 283 } 284 if (sc->sc_ncomp > 0) { 285 printf("%s: companion controller%s, %d port%s each:", 286 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 287 EHCI_HCS_N_PCC(sparams), 288 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 289 for (i = 0; i < sc->sc_ncomp; i++) 290 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 291 printf("\n"); 292 } 293 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 294 cparams = EREAD4(sc, EHCI_HCCPARAMS); 295 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 296 297 sc->sc_bus.usbrev = USBREV_2_0; 298 299 for (i = 0; i < EHCI_HASH_SIZE; i++) 300 LIST_INIT(&sc->sc_hash_qtds[i]); 301 302 /* Reset the controller */ 303 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 304 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 305 usb_delay_ms(&sc->sc_bus, 1); 306 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 307 for (i = 0; i < 100; i++) { 308 delay(10); 309 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 310 if (!hcr) 311 break; 312 } 313 if (hcr) { 314 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 315 return (USBD_IOERROR); 316 } 317 318 /* frame list size at default, read back what we got and use that */ 319 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 320 case 0: sc->sc_flsize = 1024*4; break; 321 case 1: sc->sc_flsize = 512*4; break; 322 case 2: sc->sc_flsize = 256*4; break; 323 case 3: return (USBD_IOERROR); 324 } 325 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 326 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 327 if (err) 328 return (err); 329 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 330 331 /* Set up the bus struct. */ 332 sc->sc_bus.methods = &ehci_bus_methods; 333 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 334 335 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 336 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 337 338 sc->sc_eintrs = EHCI_NORMAL_INTRS; 339 340 /* Allocate dummy QH that starts the bulk list. */ 341 sc->sc_bulk_head = ehci_alloc_sqh(sc); 342 if (sc->sc_bulk_head == NULL) { 343 err = USBD_NOMEM; 344 goto bad1; 345 } 346 memset(&sc->sc_bulk_head->qh, 0, sizeof(ehci_qtd_t)); 347 sc->sc_bulk_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE); 348 sc->sc_bulk_head->qh.qh_qtd.qtd_status = 349 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 350 sc->sc_bulk_head->qh.qh_link = 351 htole32(EHCI_LINK_TERMINATE); /* XXX no bw reclaimation */ 352 sc->sc_bulk_head->next = NULL; 353 #ifdef EHCI_DEBUG 354 if (ehcidebug) { 355 ehci_dump_sqh(sc->sc_bulk_head); 356 } 357 #endif 358 359 /* Allocate dummy QH that starts the control list. */ 360 sc->sc_ctrl_head = ehci_alloc_sqh(sc); 361 if (sc->sc_ctrl_head == NULL) { 362 err = USBD_NOMEM; 363 goto bad2; 364 } 365 memset(&sc->sc_ctrl_head->qh, 0, sizeof(ehci_qtd_t)); 366 sc->sc_ctrl_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE); 367 sc->sc_ctrl_head->qh.qh_qtd.qtd_status = 368 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 369 sc->sc_ctrl_head->qh.qh_endp = htole32(EHCI_QH_HRECL); 370 sc->sc_ctrl_head->qh.qh_link = 371 htole32(sc->sc_bulk_head->physaddr | EHCI_LINK_QH); 372 sc->sc_ctrl_head = sc->sc_bulk_head; 373 #ifdef EHCI_DEBUG 374 if (ehcidebug) { 375 ehci_dump_sqh(sc->sc_ctrl_head); 376 } 377 #endif 378 379 /* Point to async list */ 380 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 381 sc->sc_ctrl_head->physaddr | EHCI_LINK_QH); 382 383 usb_callout_init(sc->sc_tmo_pcd); 384 385 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 386 387 /* Enable interrupts */ 388 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 389 390 /* Turn on controller */ 391 EOWRITE4(sc, EHCI_USBCMD, 392 EHCI_CMD_ITC_8 | /* 8 microframes */ 393 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 394 EHCI_CMD_ASE | 395 /* EHCI_CMD_PSE | */ 396 EHCI_CMD_RS); 397 398 /* Take over port ownership */ 399 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 400 401 for (i = 0; i < 100; i++) { 402 delay(10); 403 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 404 if (!hcr) 405 break; 406 } 407 if (hcr) { 408 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 409 return (USBD_IOERROR); 410 } 411 412 return (USBD_NORMAL_COMPLETION); 413 414 #if 0 415 bad3: 416 ehci_free_sqh(sc, sc->sc_bulk_head); 417 #endif 418 bad2: 419 ehci_free_sqh(sc, sc->sc_ctrl_head); 420 bad1: 421 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 422 return (err); 423 } 424 425 Static int ehci_intr1(ehci_softc_t *); 426 427 int 428 ehci_intr(void *v) 429 { 430 ehci_softc_t *sc = v; 431 432 /* If we get an interrupt while polling, then just ignore it. */ 433 if (sc->sc_bus.use_polling) { 434 #ifdef DIAGNOSTIC 435 printf("ehci_intr: ignored interrupt while polling\n"); 436 #endif 437 return (0); 438 } 439 440 return (ehci_intr1(sc)); 441 } 442 443 Static int 444 ehci_intr1(ehci_softc_t *sc) 445 { 446 u_int32_t intrs, eintrs; 447 448 DPRINTFN(20,("ehci_intr1: enter\n")); 449 450 /* In case the interrupt occurs before initialization has completed. */ 451 if (sc == NULL) { 452 #ifdef DIAGNOSTIC 453 printf("ehci_intr: sc == NULL\n"); 454 #endif 455 return (0); 456 } 457 458 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 459 460 if (!intrs) 461 return (0); 462 463 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 464 eintrs = intrs & sc->sc_eintrs; 465 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 466 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 467 (u_int)eintrs)); 468 if (!eintrs) 469 return (0); 470 471 sc->sc_bus.intr_context++; 472 sc->sc_bus.no_intrs++; 473 if (eintrs & EHCI_STS_IAA) { 474 DPRINTF(("ehci_intr1: door bell\n")); 475 wakeup(&sc->sc_bulk_head); 476 eintrs &= ~EHCI_STS_INT; 477 } 478 if (eintrs & EHCI_STS_INT) { 479 DPRINTF(("ehci_intr1: something is done\n")); 480 eintrs &= ~EHCI_STS_INT; 481 } 482 if (eintrs & EHCI_STS_ERRINT) { 483 DPRINTF(("ehci_intr1: some error\n")); 484 eintrs &= ~EHCI_STS_HSE; 485 } 486 if (eintrs & EHCI_STS_HSE) { 487 printf("%s: unrecoverable error, controller halted\n", 488 USBDEVNAME(sc->sc_bus.bdev)); 489 /* XXX what else */ 490 } 491 if (eintrs & EHCI_STS_PCD) { 492 ehci_pcd(sc, sc->sc_intrxfer); 493 /* 494 * Disable PCD interrupt for now, because it will be 495 * on until the port has been reset. 496 */ 497 ehci_pcd_able(sc, 0); 498 /* Do not allow RHSC interrupts > 1 per second */ 499 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 500 eintrs &= ~EHCI_STS_PCD; 501 } 502 503 sc->sc_bus.intr_context--; 504 505 if (eintrs != 0) { 506 /* Block unprocessed interrupts. */ 507 sc->sc_eintrs &= ~eintrs; 508 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 509 printf("%s: blocking intrs 0x%x\n", 510 USBDEVNAME(sc->sc_bus.bdev), eintrs); 511 } 512 513 return (1); 514 } 515 516 void 517 ehci_pcd_able(ehci_softc_t *sc, int on) 518 { 519 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 520 if (on) 521 sc->sc_eintrs |= EHCI_STS_PCD; 522 else 523 sc->sc_eintrs &= ~EHCI_STS_PCD; 524 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 525 } 526 527 void 528 ehci_pcd_enable(void *v_sc) 529 { 530 ehci_softc_t *sc = v_sc; 531 532 ehci_pcd_able(sc, 1); 533 } 534 535 void 536 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 537 { 538 usbd_pipe_handle pipe; 539 struct ehci_pipe *opipe; 540 u_char *p; 541 int i, m; 542 543 if (xfer == NULL) { 544 /* Just ignore the change. */ 545 return; 546 } 547 548 pipe = xfer->pipe; 549 opipe = (struct ehci_pipe *)pipe; 550 551 p = KERNADDR(&xfer->dmabuf); 552 m = min(sc->sc_noport, xfer->length * 8 - 1); 553 memset(p, 0, xfer->length); 554 for (i = 1; i <= m; i++) { 555 /* Pick out CHANGE bits from the status reg. */ 556 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 557 p[i/8] |= 1 << (i%8); 558 } 559 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 560 xfer->actlen = xfer->length; 561 xfer->status = USBD_NORMAL_COMPLETION; 562 563 usb_transfer_complete(xfer); 564 } 565 566 void 567 ehci_softintr(void *v) 568 { 569 //ehci_softc_t *sc = v; 570 } 571 572 void 573 ehci_poll(struct usbd_bus *bus) 574 { 575 ehci_softc_t *sc = (ehci_softc_t *)bus; 576 #ifdef EHCI_DEBUG 577 static int last; 578 int new; 579 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 580 if (new != last) { 581 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 582 last = new; 583 } 584 #endif 585 586 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 587 ehci_intr1(sc); 588 } 589 590 int 591 ehci_detach(struct ehci_softc *sc, int flags) 592 { 593 int rv = 0; 594 595 if (sc->sc_child != NULL) 596 rv = config_detach(sc->sc_child, flags); 597 598 if (rv != 0) 599 return (rv); 600 601 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 602 603 if (sc->sc_powerhook != NULL) 604 powerhook_disestablish(sc->sc_powerhook); 605 if (sc->sc_shutdownhook != NULL) 606 shutdownhook_disestablish(sc->sc_shutdownhook); 607 608 /* XXX free other data structures XXX */ 609 610 return (rv); 611 } 612 613 614 int 615 ehci_activate(device_ptr_t self, enum devact act) 616 { 617 struct ehci_softc *sc = (struct ehci_softc *)self; 618 int rv = 0; 619 620 switch (act) { 621 case DVACT_ACTIVATE: 622 return (EOPNOTSUPP); 623 break; 624 625 case DVACT_DEACTIVATE: 626 if (sc->sc_child != NULL) 627 rv = config_deactivate(sc->sc_child); 628 sc->sc_dying = 1; 629 break; 630 } 631 return (rv); 632 } 633 634 /* 635 * Handle suspend/resume. 636 * 637 * We need to switch to polling mode here, because this routine is 638 * called from an intterupt context. This is all right since we 639 * are almost suspended anyway. 640 */ 641 void 642 ehci_power(int why, void *v) 643 { 644 ehci_softc_t *sc = v; 645 //u_int32_t ctl; 646 int s; 647 648 #ifdef EHCI_DEBUG 649 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 650 ehci_dumpregs(sc); 651 #endif 652 653 s = splhardusb(); 654 switch (why) { 655 case PWR_SUSPEND: 656 case PWR_STANDBY: 657 sc->sc_bus.use_polling++; 658 #if 0 659 OOO 660 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 661 if (sc->sc_control == 0) { 662 /* 663 * Preserve register values, in case that APM BIOS 664 * does not recover them. 665 */ 666 sc->sc_control = ctl; 667 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 668 } 669 ctl |= EHCI_HCFS_SUSPEND; 670 OWRITE4(sc, EHCI_CONTROL, ctl); 671 #endif 672 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 673 sc->sc_bus.use_polling--; 674 break; 675 case PWR_RESUME: 676 sc->sc_bus.use_polling++; 677 #if 0 678 OOO 679 /* Some broken BIOSes do not recover these values */ 680 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 681 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 682 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 683 if (sc->sc_intre) 684 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 685 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 686 if (sc->sc_control) 687 ctl = sc->sc_control; 688 else 689 ctl = OREAD4(sc, EHCI_CONTROL); 690 ctl |= EHCI_HCFS_RESUME; 691 OWRITE4(sc, EHCI_CONTROL, ctl); 692 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 693 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 694 OWRITE4(sc, EHCI_CONTROL, ctl); 695 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 696 sc->sc_control = sc->sc_intre = 0; 697 #endif 698 sc->sc_bus.use_polling--; 699 break; 700 case PWR_SOFTSUSPEND: 701 case PWR_SOFTSTANDBY: 702 case PWR_SOFTRESUME: 703 break; 704 } 705 splx(s); 706 } 707 708 /* 709 * Shut down the controller when the system is going down. 710 */ 711 void 712 ehci_shutdown(void *v) 713 { 714 ehci_softc_t *sc = v; 715 716 DPRINTF(("ehci_shutdown: stopping the HC\n")); 717 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 718 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 719 } 720 721 usbd_status 722 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 723 { 724 struct ehci_softc *sc = (struct ehci_softc *)bus; 725 726 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 727 } 728 729 void 730 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 731 { 732 struct ehci_softc *sc = (struct ehci_softc *)bus; 733 734 usb_freemem(&sc->sc_bus, dma); 735 } 736 737 usbd_xfer_handle 738 ehci_allocx(struct usbd_bus *bus) 739 { 740 struct ehci_softc *sc = (struct ehci_softc *)bus; 741 usbd_xfer_handle xfer; 742 743 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 744 if (xfer != NULL) 745 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 746 else 747 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 748 if (xfer != NULL) 749 memset(xfer, 0, sizeof *xfer); 750 return (xfer); 751 } 752 753 void 754 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 755 { 756 struct ehci_softc *sc = (struct ehci_softc *)bus; 757 758 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 759 } 760 761 Static void 762 ehci_device_clear_toggle(usbd_pipe_handle pipe) 763 { 764 #if 0 765 OOO 766 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 767 768 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 769 #endif 770 } 771 772 Static void 773 ehci_noop(usbd_pipe_handle pipe) 774 { 775 } 776 777 #ifdef EHCI_DEBUG 778 void 779 ehci_dumpregs(ehci_softc_t *sc) 780 { 781 int i; 782 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 783 EOREAD4(sc, EHCI_USBCMD), 784 EOREAD4(sc, EHCI_USBSTS), 785 EOREAD4(sc, EHCI_USBINTR)); 786 for (i = 1; i <= sc->sc_noport; i++) 787 printf("port %d status=0x%08x\n", i, 788 EOREAD4(sc, EHCI_PORTSC(i))); 789 } 790 791 void 792 ehci_dump() 793 { 794 ehci_dumpregs(theehci); 795 } 796 797 void 798 ehci_dump_link(ehci_link_t link) 799 { 800 printf("0x%08x<", link); 801 switch (EHCI_LINK_TYPE(link)) { 802 case EHCI_LINK_ITD: printf("ITD"); break; 803 case EHCI_LINK_QH: printf("QH"); break; 804 case EHCI_LINK_SITD: printf("SITD"); break; 805 case EHCI_LINK_FSTN: printf("FSTN"); break; 806 } 807 if (link & EHCI_LINK_TERMINATE) 808 printf(",T>"); 809 else 810 printf(">"); 811 } 812 813 void 814 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 815 { 816 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 817 ehci_dump_qtd(&sqtd->qtd); 818 } 819 820 void 821 ehci_dump_qtd(ehci_qtd_t *qtd) 822 { 823 u_int32_t s; 824 825 printf(" next="); ehci_dump_link(qtd->qtd_next); 826 printf("altnext="); ehci_dump_link(qtd->qtd_altnext); 827 printf("\n"); 828 s = qtd->qtd_status; 829 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 830 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 831 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 832 printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s), 833 EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s)); 834 for (s = 0; s < 5; s++) 835 printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]); 836 } 837 838 void 839 ehci_dump_sqh(ehci_soft_qh_t *sqh) 840 { 841 ehci_qh_t *qh = &sqh->qh; 842 843 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 844 printf(" link="); ehci_dump_link(qh->qh_link); printf("\n"); 845 printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub); 846 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n "); 847 ehci_dump_qtd(&qh->qh_qtd); 848 } 849 850 #endif 851 852 usbd_status 853 ehci_open(usbd_pipe_handle pipe) 854 { 855 usbd_device_handle dev = pipe->device; 856 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 857 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 858 u_int8_t addr = dev->address; 859 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 860 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 861 ehci_soft_qh_t *sqh; 862 ehci_soft_qtd_t *sqtd; 863 usbd_status err; 864 #if 0 865 ehci_soft_itd_t *sitd; 866 ehci_physaddr_t tdphys; 867 u_int32_t fmt; 868 int ival; 869 #endif 870 int s; 871 int speed, naks; 872 873 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 874 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 875 876 if (addr == sc->sc_addr) { 877 switch (ed->bEndpointAddress) { 878 case USB_CONTROL_ENDPOINT: 879 pipe->methods = &ehci_root_ctrl_methods; 880 break; 881 case UE_DIR_IN | EHCI_INTR_ENDPT: 882 pipe->methods = &ehci_root_intr_methods; 883 break; 884 default: 885 return (USBD_INVAL); 886 } 887 return (USBD_NORMAL_COMPLETION); 888 } 889 890 speed = EHCI_QH_SPEED_HIGH; /* XXX */ 891 naks = 8; /* XXX */ 892 sqh = ehci_alloc_sqh(sc); 893 if (sqh == NULL) 894 goto bad0; 895 /* qh_link filled when the QH is added */ 896 sqh->qh.qh_endp = htole32( 897 EHCI_QH_SET_ADDR(addr) | 898 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 899 EHCI_QH_SET_EPS(speed) | /* XXX */ 900 /* XXX EHCI_QH_DTC ? */ 901 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 902 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 903 EHCI_QH_CTL : 0) | 904 EHCI_QH_SET_NRL(naks) 905 ); 906 sqh->qh.qh_endphub = htole32( 907 EHCI_QH_SET_MULT(1) 908 ); 909 sqh->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE); 910 911 epipe->sqh = sqh; 912 #if 0 913 if (xfertype == UE_CONTROL || xfertype == UE_BULK) { 914 sqtd = ehci_alloc_sqtd(sc); 915 if (sqtd == NULL) { 916 ehci_free_sqtd(sc, sqtd); 917 goto bad1; 918 } 919 epipe->tail.qtd = sqtd; 920 tdphys = sqtd->physaddr; 921 } else 922 sqtd = NULL; 923 #endif 924 925 switch (xfertype) { 926 case UE_CONTROL: 927 pipe->methods = &ehci_device_ctrl_methods; 928 err = usb_allocmem(&sc->sc_bus, 929 sizeof(usb_device_request_t), 930 0, &epipe->u.ctl.reqdma); 931 if (err) 932 goto bad; 933 s = splusb(); 934 ehci_add_qh(sqh, sc->sc_ctrl_head); 935 splx(s); 936 break; 937 case UE_BULK: 938 pipe->methods = &ehci_device_bulk_methods; 939 s = splusb(); 940 ehci_add_qh(sqh, sc->sc_bulk_head); 941 splx(s); 942 break; 943 default: 944 return (USBD_INVAL); 945 } 946 return (USBD_NORMAL_COMPLETION); 947 948 bad: 949 if (sqtd != NULL) 950 ehci_free_sqtd(sc, sqtd); 951 /*bad1:*/ 952 if (sqh != NULL) 953 ehci_free_sqh(sc, sqh); 954 bad0: 955 return (USBD_NOMEM); 956 } 957 958 /* 959 * Add an ED to the schedule. Called at splusb(). 960 */ 961 void 962 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 963 { 964 SPLUSBCHECK; 965 966 sqh->next = head->next; 967 sqh->qh.qh_link = head->qh.qh_link; 968 head->next = sqh; 969 head->qh.qh_link = htole32(sqh->physaddr); 970 971 #ifdef EHCI_DEBUG 972 if (ehcidebug > 0) { 973 printf("ehci_add_qh:\n"); 974 ehci_dump_sqh(sqh); 975 } 976 #endif 977 } 978 979 /* 980 * Remove an ED from the schedule. Called at splusb(). 981 */ 982 void 983 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 984 { 985 ehci_soft_qh_t *p; 986 int s; 987 988 SPLUSBCHECK; 989 /* XXX */ 990 for (p = head; p == NULL && p->next != sqh; p = p->next) 991 ; 992 if (p == NULL) 993 panic("ehci_rem_qh: ED not found\n"); 994 p->next = sqh->next; 995 p->qh.qh_link = sqh->qh.qh_link; 996 997 /* 998 * Now we must ensure that the HC has released all references to the 999 * QH. We do this by asking for a Async Advance Doorbell interrupt 1000 * and then we wait for the interrupt. 1001 * To make this easier we first obtain exclusive use ofthe doorbell. 1002 */ 1003 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1004 s = splhardusb(); 1005 /* ask for doorbell */ 1006 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1007 tsleep(&sc->sc_bulk_head, PZERO, "ehcidi", 0); /* wait for doorbell */ 1008 splx(s); 1009 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1010 } 1011 1012 /***********/ 1013 1014 /* 1015 * Data structures and routines to emulate the root hub. 1016 */ 1017 Static usb_device_descriptor_t ehci_devd = { 1018 USB_DEVICE_DESCRIPTOR_SIZE, 1019 UDESC_DEVICE, /* type */ 1020 {0x00, 0x02}, /* USB version */ 1021 UDCLASS_HUB, /* class */ 1022 UDSUBCLASS_HUB, /* subclass */ 1023 0, /* protocol */ 1024 64, /* max packet */ 1025 {0},{0},{0x00,0x01}, /* device id */ 1026 1,2,0, /* string indicies */ 1027 1 /* # of configurations */ 1028 }; 1029 1030 Static usb_config_descriptor_t ehci_confd = { 1031 USB_CONFIG_DESCRIPTOR_SIZE, 1032 UDESC_CONFIG, 1033 {USB_CONFIG_DESCRIPTOR_SIZE + 1034 USB_INTERFACE_DESCRIPTOR_SIZE + 1035 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1036 1, 1037 1, 1038 0, 1039 UC_SELF_POWERED, 1040 0 /* max power */ 1041 }; 1042 1043 Static usb_interface_descriptor_t ehci_ifcd = { 1044 USB_INTERFACE_DESCRIPTOR_SIZE, 1045 UDESC_INTERFACE, 1046 0, 1047 0, 1048 1, 1049 UICLASS_HUB, 1050 UISUBCLASS_HUB, 1051 0, 1052 0 1053 }; 1054 1055 Static usb_endpoint_descriptor_t ehci_endpd = { 1056 USB_ENDPOINT_DESCRIPTOR_SIZE, 1057 UDESC_ENDPOINT, 1058 UE_DIR_IN | EHCI_INTR_ENDPT, 1059 UE_INTERRUPT, 1060 {8, 0}, /* max packet */ 1061 255 1062 }; 1063 1064 Static usb_hub_descriptor_t ehci_hubd = { 1065 USB_HUB_DESCRIPTOR_SIZE, 1066 UDESC_HUB, 1067 0, 1068 {0,0}, 1069 0, 1070 0, 1071 {0}, 1072 }; 1073 1074 Static int 1075 ehci_str(p, l, s) 1076 usb_string_descriptor_t *p; 1077 int l; 1078 char *s; 1079 { 1080 int i; 1081 1082 if (l == 0) 1083 return (0); 1084 p->bLength = 2 * strlen(s) + 2; 1085 if (l == 1) 1086 return (1); 1087 p->bDescriptorType = UDESC_STRING; 1088 l -= 2; 1089 for (i = 0; s[i] && l > 1; i++, l -= 2) 1090 USETW2(p->bString[i], 0, s[i]); 1091 return (2*i+2); 1092 } 1093 1094 /* 1095 * Simulate a hardware hub by handling all the necessary requests. 1096 */ 1097 Static usbd_status 1098 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1099 { 1100 usbd_status err; 1101 1102 /* Insert last in queue. */ 1103 err = usb_insert_transfer(xfer); 1104 if (err) 1105 return (err); 1106 1107 /* Pipe isn't running, start first */ 1108 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1109 } 1110 1111 Static usbd_status 1112 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1113 { 1114 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1115 usb_device_request_t *req; 1116 void *buf = NULL; 1117 int port, i; 1118 int s, len, value, index, l, totlen = 0; 1119 usb_port_status_t ps; 1120 usb_hub_descriptor_t hubd; 1121 usbd_status err; 1122 u_int32_t v; 1123 1124 if (sc->sc_dying) 1125 return (USBD_IOERROR); 1126 1127 #ifdef DIAGNOSTIC 1128 if (!(xfer->rqflags & URQ_REQUEST)) 1129 /* XXX panic */ 1130 return (USBD_INVAL); 1131 #endif 1132 req = &xfer->request; 1133 1134 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1135 req->bmRequestType, req->bRequest)); 1136 1137 len = UGETW(req->wLength); 1138 value = UGETW(req->wValue); 1139 index = UGETW(req->wIndex); 1140 1141 if (len != 0) 1142 buf = KERNADDR(&xfer->dmabuf); 1143 1144 #define C(x,y) ((x) | ((y) << 8)) 1145 switch(C(req->bRequest, req->bmRequestType)) { 1146 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1147 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1148 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1149 /* 1150 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1151 * for the integrated root hub. 1152 */ 1153 break; 1154 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1155 if (len > 0) { 1156 *(u_int8_t *)buf = sc->sc_conf; 1157 totlen = 1; 1158 } 1159 break; 1160 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1161 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1162 switch(value >> 8) { 1163 case UDESC_DEVICE: 1164 if ((value & 0xff) != 0) { 1165 err = USBD_IOERROR; 1166 goto ret; 1167 } 1168 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1169 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1170 memcpy(buf, &ehci_devd, l); 1171 break; 1172 case UDESC_CONFIG: 1173 if ((value & 0xff) != 0) { 1174 err = USBD_IOERROR; 1175 goto ret; 1176 } 1177 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1178 memcpy(buf, &ehci_confd, l); 1179 buf = (char *)buf + l; 1180 len -= l; 1181 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1182 totlen += l; 1183 memcpy(buf, &ehci_ifcd, l); 1184 buf = (char *)buf + l; 1185 len -= l; 1186 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1187 totlen += l; 1188 memcpy(buf, &ehci_endpd, l); 1189 break; 1190 case UDESC_STRING: 1191 if (len == 0) 1192 break; 1193 *(u_int8_t *)buf = 0; 1194 totlen = 1; 1195 switch (value & 0xff) { 1196 case 1: /* Vendor */ 1197 totlen = ehci_str(buf, len, sc->sc_vendor); 1198 break; 1199 case 2: /* Product */ 1200 totlen = ehci_str(buf, len, "EHCI root hub"); 1201 break; 1202 } 1203 break; 1204 default: 1205 err = USBD_IOERROR; 1206 goto ret; 1207 } 1208 break; 1209 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1210 if (len > 0) { 1211 *(u_int8_t *)buf = 0; 1212 totlen = 1; 1213 } 1214 break; 1215 case C(UR_GET_STATUS, UT_READ_DEVICE): 1216 if (len > 1) { 1217 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1218 totlen = 2; 1219 } 1220 break; 1221 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1222 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1223 if (len > 1) { 1224 USETW(((usb_status_t *)buf)->wStatus, 0); 1225 totlen = 2; 1226 } 1227 break; 1228 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1229 if (value >= USB_MAX_DEVICES) { 1230 err = USBD_IOERROR; 1231 goto ret; 1232 } 1233 sc->sc_addr = value; 1234 break; 1235 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1236 if (value != 0 && value != 1) { 1237 err = USBD_IOERROR; 1238 goto ret; 1239 } 1240 sc->sc_conf = value; 1241 break; 1242 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1243 break; 1244 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1245 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1246 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1247 err = USBD_IOERROR; 1248 goto ret; 1249 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1250 break; 1251 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1252 break; 1253 /* Hub requests */ 1254 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1255 break; 1256 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1257 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1258 "port=%d feature=%d\n", 1259 index, value)); 1260 if (index < 1 || index > sc->sc_noport) { 1261 err = USBD_IOERROR; 1262 goto ret; 1263 } 1264 port = EHCI_PORTSC(index); 1265 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1266 switch(value) { 1267 case UHF_PORT_ENABLE: 1268 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1269 break; 1270 case UHF_PORT_SUSPEND: 1271 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1272 break; 1273 case UHF_PORT_POWER: 1274 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1275 break; 1276 case UHF_C_PORT_CONNECTION: 1277 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1278 break; 1279 case UHF_C_PORT_ENABLE: 1280 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1281 break; 1282 case UHF_C_PORT_SUSPEND: 1283 /* how? */ 1284 break; 1285 case UHF_C_PORT_OVER_CURRENT: 1286 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1287 break; 1288 case UHF_C_PORT_RESET: 1289 sc->sc_isreset = 0; 1290 break; 1291 default: 1292 err = USBD_IOERROR; 1293 goto ret; 1294 } 1295 #if 0 1296 switch(value) { 1297 case UHF_C_PORT_CONNECTION: 1298 case UHF_C_PORT_ENABLE: 1299 case UHF_C_PORT_SUSPEND: 1300 case UHF_C_PORT_OVER_CURRENT: 1301 case UHF_C_PORT_RESET: 1302 /* Enable RHSC interrupt if condition is cleared. */ 1303 if ((OREAD4(sc, port) >> 16) == 0) 1304 ehci_pcd_able(sc, 1); 1305 break; 1306 default: 1307 break; 1308 } 1309 #endif 1310 break; 1311 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1312 if (value != 0) { 1313 err = USBD_IOERROR; 1314 goto ret; 1315 } 1316 hubd = ehci_hubd; 1317 hubd.bNbrPorts = sc->sc_noport; 1318 v = EOREAD4(sc, EHCI_HCSPARAMS); 1319 USETW(hubd.wHubCharacteristics, 1320 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH); 1321 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1322 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1323 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1324 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1325 l = min(len, hubd.bDescLength); 1326 totlen = l; 1327 memcpy(buf, &hubd, l); 1328 break; 1329 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1330 if (len != 4) { 1331 err = USBD_IOERROR; 1332 goto ret; 1333 } 1334 memset(buf, 0, len); /* ? XXX */ 1335 totlen = len; 1336 break; 1337 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1338 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1339 index)); 1340 if (index < 1 || index > sc->sc_noport) { 1341 err = USBD_IOERROR; 1342 goto ret; 1343 } 1344 if (len != 4) { 1345 err = USBD_IOERROR; 1346 goto ret; 1347 } 1348 v = EOREAD4(sc, EHCI_PORTSC(index)); 1349 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1350 v)); 1351 i = 0; 1352 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1353 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1354 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1355 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1356 if (v & EHCI_PS_PR) i |= UPS_RESET; 1357 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1358 USETW(ps.wPortStatus, i); 1359 i = 0; 1360 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1361 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1362 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1363 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1364 USETW(ps.wPortChange, i); 1365 l = min(len, sizeof ps); 1366 memcpy(buf, &ps, l); 1367 totlen = l; 1368 break; 1369 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1370 err = USBD_IOERROR; 1371 goto ret; 1372 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1373 break; 1374 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1375 if (index < 1 || index > sc->sc_noport) { 1376 err = USBD_IOERROR; 1377 goto ret; 1378 } 1379 port = EHCI_PORTSC(index); 1380 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1381 switch(value) { 1382 case UHF_PORT_ENABLE: 1383 EOWRITE4(sc, port, v | EHCI_PS_PE); 1384 break; 1385 case UHF_PORT_SUSPEND: 1386 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1387 break; 1388 case UHF_PORT_RESET: 1389 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1390 index)); 1391 if (EHCI_PS_IS_LOWSPEED(v)) { 1392 /* Low speed device, give up ownership. */ 1393 ehci_disown(sc, index, 1); 1394 break; 1395 } 1396 /* Start reset sequence. */ 1397 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1398 EOWRITE4(sc, port, v | EHCI_PS_PR); 1399 /* Wait for reset to complete. */ 1400 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2); 1401 /* Terminate reset sequence. */ 1402 EOWRITE4(sc, port, v); 1403 /* Wait for HC to complete reset. */ 1404 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2); 1405 v = EOREAD4(sc, port); 1406 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1407 if (v & EHCI_PS_PR) { 1408 printf("%s: port reset timeout\n", 1409 USBDEVNAME(sc->sc_bus.bdev)); 1410 return (USBD_TIMEOUT); 1411 } 1412 if (!(v & EHCI_PS_PE)) { 1413 /* Not a high speed device, give up ownership.*/ 1414 ehci_disown(sc, index, 0); 1415 break; 1416 } 1417 sc->sc_isreset = 1; 1418 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1419 index, v)); 1420 break; 1421 case UHF_PORT_POWER: 1422 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1423 "%d\n", index)); 1424 EOWRITE4(sc, port, v | EHCI_PS_PP); 1425 break; 1426 default: 1427 err = USBD_IOERROR; 1428 goto ret; 1429 } 1430 break; 1431 default: 1432 err = USBD_IOERROR; 1433 goto ret; 1434 } 1435 xfer->actlen = totlen; 1436 err = USBD_NORMAL_COMPLETION; 1437 ret: 1438 xfer->status = err; 1439 s = splusb(); 1440 usb_transfer_complete(xfer); 1441 splx(s); 1442 return (USBD_IN_PROGRESS); 1443 } 1444 1445 void 1446 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1447 { 1448 int i, port; 1449 u_int32_t v; 1450 1451 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1452 #ifdef DIAGNOSTIC 1453 if (sc->sc_npcomp != 0) { 1454 i = (index-1) / sc->sc_npcomp; 1455 if (i >= sc->sc_ncomp) 1456 printf("%s: strange port\n", 1457 USBDEVNAME(sc->sc_bus.bdev)); 1458 else 1459 printf("%s: handing over %s speed device on " 1460 "port %d to %s\n", 1461 USBDEVNAME(sc->sc_bus.bdev), 1462 lowspeed ? "low" : "full", 1463 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1464 } else { 1465 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1466 } 1467 #endif 1468 port = EHCI_PORTSC(index); 1469 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1470 EOWRITE4(sc, port, v | EHCI_PS_PO); 1471 } 1472 1473 /* Abort a root control request. */ 1474 Static void 1475 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1476 { 1477 /* Nothing to do, all transfers are synchronous. */ 1478 } 1479 1480 /* Close the root pipe. */ 1481 Static void 1482 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1483 { 1484 DPRINTF(("ehci_root_ctrl_close\n")); 1485 /* Nothing to do. */ 1486 } 1487 1488 void 1489 ehci_root_intr_done(usbd_xfer_handle xfer) 1490 { 1491 xfer->hcpriv = NULL; 1492 } 1493 1494 Static usbd_status 1495 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1496 { 1497 usbd_status err; 1498 1499 /* Insert last in queue. */ 1500 err = usb_insert_transfer(xfer); 1501 if (err) 1502 return (err); 1503 1504 /* Pipe isn't running, start first */ 1505 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1506 } 1507 1508 Static usbd_status 1509 ehci_root_intr_start(usbd_xfer_handle xfer) 1510 { 1511 usbd_pipe_handle pipe = xfer->pipe; 1512 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1513 1514 if (sc->sc_dying) 1515 return (USBD_IOERROR); 1516 1517 sc->sc_intrxfer = xfer; 1518 1519 return (USBD_IN_PROGRESS); 1520 } 1521 1522 /* Abort a root interrupt request. */ 1523 Static void 1524 ehci_root_intr_abort(usbd_xfer_handle xfer) 1525 { 1526 int s; 1527 1528 if (xfer->pipe->intrxfer == xfer) { 1529 DPRINTF(("ehci_root_intr_abort: remove\n")); 1530 xfer->pipe->intrxfer = NULL; 1531 } 1532 xfer->status = USBD_CANCELLED; 1533 s = splusb(); 1534 usb_transfer_complete(xfer); 1535 splx(s); 1536 } 1537 1538 /* Close the root pipe. */ 1539 Static void 1540 ehci_root_intr_close(usbd_pipe_handle pipe) 1541 { 1542 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1543 1544 DPRINTF(("ehci_root_intr_close\n")); 1545 1546 sc->sc_intrxfer = NULL; 1547 } 1548 1549 void 1550 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1551 { 1552 xfer->hcpriv = NULL; 1553 } 1554 1555 /************************/ 1556 1557 ehci_soft_qh_t * 1558 ehci_alloc_sqh(ehci_softc_t *sc) 1559 { 1560 ehci_soft_qh_t *sqh; 1561 usbd_status err; 1562 int i, offs; 1563 usb_dma_t dma; 1564 1565 if (sc->sc_freeqhs == NULL) { 1566 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1567 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1568 EHCI_PAGE_SIZE, &dma); 1569 if (err) 1570 return (0); 1571 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1572 offs = i * EHCI_SQH_SIZE; 1573 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) +offs); 1574 sqh->physaddr = DMAADDR(&dma) + offs; 1575 sqh->next = sc->sc_freeqhs; 1576 sc->sc_freeqhs = sqh; 1577 } 1578 } 1579 sqh = sc->sc_freeqhs; 1580 sc->sc_freeqhs = sqh->next; 1581 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1582 sqh->next = 0; 1583 return (sqh); 1584 } 1585 1586 void 1587 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1588 { 1589 sqh->next = sc->sc_freeqhs; 1590 sc->sc_freeqhs = sqh; 1591 } 1592 1593 ehci_soft_qtd_t * 1594 ehci_alloc_sqtd(ehci_softc_t *sc) 1595 { 1596 ehci_soft_qtd_t *sqtd; 1597 usbd_status err; 1598 int i, offs; 1599 usb_dma_t dma; 1600 int s; 1601 1602 if (sc->sc_freeqtds == NULL) { 1603 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1604 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1605 EHCI_PAGE_SIZE, &dma); 1606 if (err) 1607 return (NULL); 1608 s = splusb(); 1609 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1610 offs = i * EHCI_SQTD_SIZE; 1611 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1612 sqtd->physaddr = DMAADDR(&dma) + offs; 1613 sqtd->nextqtd = sc->sc_freeqtds; 1614 sc->sc_freeqtds = sqtd; 1615 } 1616 splx(s); 1617 } 1618 1619 s = splusb(); 1620 sqtd = sc->sc_freeqtds; 1621 sc->sc_freeqtds = sqtd->nextqtd; 1622 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1623 sqtd->nextqtd = NULL; 1624 sqtd->xfer = NULL; 1625 ehci_hash_add_qtd(sc, sqtd); 1626 splx(s); 1627 1628 return (sqtd); 1629 } 1630 1631 void 1632 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1633 { 1634 int s; 1635 1636 s = splusb(); 1637 ehci_hash_rem_qtd(sc, sqtd); 1638 sqtd->nextqtd = sc->sc_freeqtds; 1639 sc->sc_freeqtds = sqtd; 1640 splx(s); 1641 } 1642 1643 /* 1644 * When a transfer is completed the TD is added to the done queue by 1645 * the host controller. This queue is the processed by software. 1646 * Unfortunately the queue contains the physical address of the TD 1647 * and we have no simple way to translate this back to a kernel address. 1648 * To make the translation possible (and fast) we use a hash table of 1649 * TDs currently in the schedule. The physical address is used as the 1650 * hash value. 1651 */ 1652 1653 #define HASH(a) (((a) >> 4) % EHCI_HASH_SIZE) 1654 /* Called at splusb() */ 1655 void 1656 ehci_hash_add_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1657 { 1658 int h = HASH(sqtd->physaddr); 1659 1660 SPLUSBCHECK; 1661 1662 LIST_INSERT_HEAD(&sc->sc_hash_qtds[h], sqtd, hnext); 1663 } 1664 1665 /* Called at splusb() */ 1666 void 1667 ehci_hash_rem_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1668 { 1669 SPLUSBCHECK; 1670 1671 LIST_REMOVE(sqtd, hnext); 1672 } 1673 1674 ehci_soft_qtd_t * 1675 ehci_hash_find_qtd(ehci_softc_t *sc, ehci_physaddr_t a) 1676 { 1677 int h = HASH(a); 1678 ehci_soft_qtd_t *sqtd; 1679 1680 for (sqtd = LIST_FIRST(&sc->sc_hash_qtds[h]); 1681 sqtd != NULL; 1682 sqtd = LIST_NEXT(sqtd, hnext)) 1683 if (sqtd->physaddr == a) 1684 return (sqtd); 1685 return (NULL); 1686 } 1687 1688 /* 1689 * Close a reqular pipe. 1690 * Assumes that there are no pending transactions. 1691 */ 1692 void 1693 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 1694 { 1695 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1696 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1697 ehci_soft_qh_t *sqh = epipe->sqh; 1698 int s; 1699 1700 s = splusb(); 1701 ehci_rem_qh(sc, sqh, head); 1702 splx(s); 1703 ehci_free_sqh(sc, epipe->sqh); 1704 } 1705 1706 /* 1707 * Abort a device request. 1708 * If this routine is called at splusb() it guarantees that the request 1709 * will be removed from the hardware scheduling and that the callback 1710 * for it will be called with USBD_CANCELLED status. 1711 * It's impossible to guarantee that the requested transfer will not 1712 * have happened since the hardware runs concurrently. 1713 * If the transaction has already happened we rely on the ordinary 1714 * interrupt processing to process it. 1715 */ 1716 void 1717 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1718 { 1719 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 1720 ehci_soft_qh_t *sqh = epipe->sqh; 1721 #if 0 1722 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 1723 ehci_soft_td_t *p, *n; 1724 ehci_physaddr_t headp; 1725 int s, hit; 1726 #endif 1727 1728 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 1729 1730 if (xfer->device->bus->intr_context || !curproc) 1731 panic("ehci_abort_xfer: not in process context\n"); 1732 1733 } 1734 1735 /************************/ 1736 1737 Static usbd_status 1738 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 1739 { 1740 usbd_status err; 1741 1742 /* Insert last in queue. */ 1743 err = usb_insert_transfer(xfer); 1744 if (err) 1745 return (err); 1746 1747 /* Pipe isn't running, start first */ 1748 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1749 } 1750 1751 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1752 1753 void 1754 ehci_device_ctrl_done(usbd_xfer_handle xfer) 1755 { 1756 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 1757 1758 #ifdef DIAGNOSTIC 1759 if (!(xfer->rqflags & URQ_REQUEST)) { 1760 panic("ehci_ctrl_done: not a request\n"); 1761 } 1762 #endif 1763 xfer->hcpriv = NULL; 1764 } 1765 1766 /* Abort a device control request. */ 1767 Static void 1768 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 1769 { 1770 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 1771 ehci_abort_xfer(xfer, USBD_CANCELLED); 1772 } 1773 1774 /* Close a device control pipe. */ 1775 Static void 1776 ehci_device_ctrl_close(usbd_pipe_handle pipe) 1777 { 1778 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1779 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 1780 1781 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 1782 ehci_close_pipe(pipe, sc->sc_ctrl_head); 1783 /*ehci_free_std(sc, epipe->tail.td);*/ 1784 } 1785 1786 /************************/ 1787 1788 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1789 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1790 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 1791 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 1792 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 1793 1794 /************************/ 1795 1796 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1797 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1798 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 1799 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 1800 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 1801 1802 /************************/ 1803 1804 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1805 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1806 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 1807 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 1808 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 1809
Indexes created Mon Sep 22 13:09:51 GMT 2025