ehci.c revision 1.102
1 /* $NetBSD: ehci.c,v 1.102 2005/05/05 20:40:20 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.102 2005/05/05 20:40:20 augustss Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 117 } ctl; 118 /* Interrupt pipe */ 119 struct { 120 u_int length; 121 } intr; 122 /* Bulk pipe */ 123 struct { 124 u_int length; 125 } bulk; 126 /* Iso pipe */ 127 /* XXX */ 128 } u; 129 }; 130 131 Static void ehci_shutdown(void *); 132 Static void ehci_power(int, void *); 133 134 Static usbd_status ehci_open(usbd_pipe_handle); 135 Static void ehci_poll(struct usbd_bus *); 136 Static void ehci_softintr(void *); 137 Static int ehci_intr1(ehci_softc_t *); 138 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 139 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 140 Static void ehci_idone(struct ehci_xfer *); 141 Static void ehci_timeout(void *); 142 Static void ehci_timeout_task(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 Static void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t version, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 version = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 version >> 8, version & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 370 if (EHCI_HCC_64BIT(cparams)) { 371 /* MUST clear segment register if 64 bit capable. */ 372 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 373 } 374 375 sc->sc_bus.usbrev = USBREV_2_0; 376 377 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 378 USB_MEM_RESERVE); 379 380 /* Reset the controller */ 381 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 382 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 383 usb_delay_ms(&sc->sc_bus, 1); 384 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 385 for (i = 0; i < 100; i++) { 386 usb_delay_ms(&sc->sc_bus, 1); 387 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 388 if (!hcr) 389 break; 390 } 391 if (hcr) { 392 aprint_error("%s: reset timeout\n", 393 USBDEVNAME(sc->sc_bus.bdev)); 394 return (USBD_IOERROR); 395 } 396 397 /* XXX need proper intr scheduling */ 398 sc->sc_rand = 96; 399 400 /* frame list size at default, read back what we got and use that */ 401 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 402 case 0: sc->sc_flsize = 1024; break; 403 case 1: sc->sc_flsize = 512; break; 404 case 2: sc->sc_flsize = 256; break; 405 case 3: return (USBD_IOERROR); 406 } 407 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 408 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 409 if (err) 410 return (err); 411 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 412 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 413 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 414 415 /* Set up the bus struct. */ 416 sc->sc_bus.methods = &ehci_bus_methods; 417 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 418 419 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 420 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 421 422 sc->sc_eintrs = EHCI_NORMAL_INTRS; 423 424 /* 425 * Allocate the interrupt dummy QHs. These are arranged to give poll 426 * intervals that are powers of 2 times 1ms. 427 */ 428 for (i = 0; i < EHCI_INTRQHS; i++) { 429 sqh = ehci_alloc_sqh(sc); 430 if (sqh == NULL) { 431 err = USBD_NOMEM; 432 goto bad1; 433 } 434 sc->sc_islots[i].sqh = sqh; 435 } 436 for (i = 0; i < EHCI_INTRQHS; i++) { 437 sqh = sc->sc_islots[i].sqh; 438 if (i == 0) { 439 /* The last (1ms) QH terminates. */ 440 sqh->qh.qh_link = EHCI_NULL; 441 sqh->next = NULL; 442 } else { 443 /* Otherwise the next QH has half the poll interval */ 444 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 445 sqh->qh.qh_link = htole32(sqh->next->physaddr | 446 EHCI_LINK_QH); 447 } 448 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 449 sqh->qh.qh_curqtd = EHCI_NULL; 450 sqh->next = NULL; 451 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 452 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 453 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 454 sqh->sqtd = NULL; 455 } 456 /* Point the frame list at the last level (128ms). */ 457 for (i = 0; i < sc->sc_flsize; i++) { 458 int j; 459 460 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 461 revbits[i & (EHCI_MAX_POLLRATE-1)]; 462 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 463 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 464 i)].sqh->physaddr); 465 } 466 467 /* Allocate dummy QH that starts the async list. */ 468 sqh = ehci_alloc_sqh(sc); 469 if (sqh == NULL) { 470 err = USBD_NOMEM; 471 goto bad1; 472 } 473 /* Fill the QH */ 474 sqh->qh.qh_endp = 475 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 476 sqh->qh.qh_link = 477 htole32(sqh->physaddr | EHCI_LINK_QH); 478 sqh->qh.qh_curqtd = EHCI_NULL; 479 sqh->next = NULL; 480 /* Fill the overlay qTD */ 481 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 482 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 483 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 484 sqh->sqtd = NULL; 485 #ifdef EHCI_DEBUG 486 if (ehcidebug) { 487 ehci_dump_sqh(sqh); 488 } 489 #endif 490 491 /* Point to async list */ 492 sc->sc_async_head = sqh; 493 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 494 495 usb_callout_init(sc->sc_tmo_pcd); 496 497 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 498 499 /* Enable interrupts */ 500 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 501 502 /* Turn on controller */ 503 EOWRITE4(sc, EHCI_USBCMD, 504 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 505 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 506 EHCI_CMD_ASE | 507 EHCI_CMD_PSE | 508 EHCI_CMD_RS); 509 510 /* Take over port ownership */ 511 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 512 513 for (i = 0; i < 100; i++) { 514 usb_delay_ms(&sc->sc_bus, 1); 515 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 516 if (!hcr) 517 break; 518 } 519 if (hcr) { 520 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 521 return (USBD_IOERROR); 522 } 523 524 return (USBD_NORMAL_COMPLETION); 525 526 #if 0 527 bad2: 528 ehci_free_sqh(sc, sc->sc_async_head); 529 #endif 530 bad1: 531 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 532 return (err); 533 } 534 535 int 536 ehci_intr(void *v) 537 { 538 ehci_softc_t *sc = v; 539 540 if (sc == NULL || sc->sc_dying) 541 return (0); 542 543 /* If we get an interrupt while polling, then just ignore it. */ 544 if (sc->sc_bus.use_polling) { 545 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 546 547 if (intrs) 548 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 549 #ifdef DIAGNOSTIC 550 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 551 #endif 552 return (0); 553 } 554 555 return (ehci_intr1(sc)); 556 } 557 558 Static int 559 ehci_intr1(ehci_softc_t *sc) 560 { 561 u_int32_t intrs, eintrs; 562 563 DPRINTFN(20,("ehci_intr1: enter\n")); 564 565 /* In case the interrupt occurs before initialization has completed. */ 566 if (sc == NULL) { 567 #ifdef DIAGNOSTIC 568 printf("ehci_intr1: sc == NULL\n"); 569 #endif 570 return (0); 571 } 572 573 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 574 if (!intrs) 575 return (0); 576 577 eintrs = intrs & sc->sc_eintrs; 578 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 579 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 580 (u_int)eintrs)); 581 if (!eintrs) 582 return (0); 583 584 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 585 sc->sc_bus.intr_context++; 586 sc->sc_bus.no_intrs++; 587 if (eintrs & EHCI_STS_IAA) { 588 DPRINTF(("ehci_intr1: door bell\n")); 589 wakeup(&sc->sc_async_head); 590 eintrs &= ~EHCI_STS_IAA; 591 } 592 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 593 DPRINTFN(5,("ehci_intr1: %s %s\n", 594 eintrs & EHCI_STS_INT ? "INT" : "", 595 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 596 usb_schedsoftintr(&sc->sc_bus); 597 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 598 } 599 if (eintrs & EHCI_STS_HSE) { 600 printf("%s: unrecoverable error, controller halted\n", 601 USBDEVNAME(sc->sc_bus.bdev)); 602 /* XXX what else */ 603 } 604 if (eintrs & EHCI_STS_PCD) { 605 ehci_pcd(sc, sc->sc_intrxfer); 606 /* 607 * Disable PCD interrupt for now, because it will be 608 * on until the port has been reset. 609 */ 610 ehci_pcd_able(sc, 0); 611 /* Do not allow RHSC interrupts > 1 per second */ 612 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 613 eintrs &= ~EHCI_STS_PCD; 614 } 615 616 sc->sc_bus.intr_context--; 617 618 if (eintrs != 0) { 619 /* Block unprocessed interrupts. */ 620 sc->sc_eintrs &= ~eintrs; 621 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 622 printf("%s: blocking intrs 0x%x\n", 623 USBDEVNAME(sc->sc_bus.bdev), eintrs); 624 } 625 626 return (1); 627 } 628 629 void 630 ehci_pcd_able(ehci_softc_t *sc, int on) 631 { 632 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 633 if (on) 634 sc->sc_eintrs |= EHCI_STS_PCD; 635 else 636 sc->sc_eintrs &= ~EHCI_STS_PCD; 637 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 638 } 639 640 void 641 ehci_pcd_enable(void *v_sc) 642 { 643 ehci_softc_t *sc = v_sc; 644 645 ehci_pcd_able(sc, 1); 646 } 647 648 void 649 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 650 { 651 usbd_pipe_handle pipe; 652 u_char *p; 653 int i, m; 654 655 if (xfer == NULL) { 656 /* Just ignore the change. */ 657 return; 658 } 659 660 pipe = xfer->pipe; 661 662 p = KERNADDR(&xfer->dmabuf, 0); 663 m = min(sc->sc_noport, xfer->length * 8 - 1); 664 memset(p, 0, xfer->length); 665 for (i = 1; i <= m; i++) { 666 /* Pick out CHANGE bits from the status reg. */ 667 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 668 p[i/8] |= 1 << (i%8); 669 } 670 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 671 xfer->actlen = xfer->length; 672 xfer->status = USBD_NORMAL_COMPLETION; 673 674 usb_transfer_complete(xfer); 675 } 676 677 void 678 ehci_softintr(void *v) 679 { 680 ehci_softc_t *sc = v; 681 struct ehci_xfer *ex, *nextex; 682 683 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 684 sc->sc_bus.intr_context)); 685 686 sc->sc_bus.intr_context++; 687 688 /* 689 * The only explanation I can think of for why EHCI is as brain dead 690 * as UHCI interrupt-wise is that Intel was involved in both. 691 * An interrupt just tells us that something is done, we have no 692 * clue what, so we need to scan through all active transfers. :-( 693 */ 694 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 695 nextex = LIST_NEXT(ex, inext); 696 ehci_check_intr(sc, ex); 697 } 698 699 #ifdef USB_USE_SOFTINTR 700 if (sc->sc_softwake) { 701 sc->sc_softwake = 0; 702 wakeup(&sc->sc_softwake); 703 } 704 #endif /* USB_USE_SOFTINTR */ 705 706 sc->sc_bus.intr_context--; 707 } 708 709 /* Check for an interrupt. */ 710 void 711 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 712 { 713 ehci_soft_qtd_t *sqtd, *lsqtd; 714 u_int32_t status; 715 716 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 717 718 if (ex->sqtdstart == NULL) { 719 printf("ehci_check_intr: sqtdstart=NULL\n"); 720 return; 721 } 722 lsqtd = ex->sqtdend; 723 #ifdef DIAGNOSTIC 724 if (lsqtd == NULL) { 725 printf("ehci_check_intr: lsqtd==0\n"); 726 return; 727 } 728 #endif 729 /* 730 * If the last TD is still active we need to check whether there 731 * is a an error somewhere in the middle, or whether there was a 732 * short packet (SPD and not ACTIVE). 733 */ 734 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 735 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 736 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 737 status = le32toh(sqtd->qtd.qtd_status); 738 /* If there's an active QTD the xfer isn't done. */ 739 if (status & EHCI_QTD_ACTIVE) 740 break; 741 /* Any kind of error makes the xfer done. */ 742 if (status & EHCI_QTD_HALTED) 743 goto done; 744 /* We want short packets, and it is short: it's done */ 745 if (EHCI_QTD_GET_BYTES(status) != 0) 746 goto done; 747 } 748 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 749 ex, ex->sqtdstart)); 750 return; 751 } 752 done: 753 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 754 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 755 ehci_idone(ex); 756 } 757 758 void 759 ehci_idone(struct ehci_xfer *ex) 760 { 761 usbd_xfer_handle xfer = &ex->xfer; 762 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 763 ehci_soft_qtd_t *sqtd, *lsqtd; 764 u_int32_t status = 0, nstatus = 0; 765 int actlen; 766 uint pkts_left; 767 768 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 769 #ifdef DIAGNOSTIC 770 { 771 int s = splhigh(); 772 if (ex->isdone) { 773 splx(s); 774 #ifdef EHCI_DEBUG 775 printf("ehci_idone: ex is done!\n "); 776 ehci_dump_exfer(ex); 777 #else 778 printf("ehci_idone: ex=%p is done!\n", ex); 779 #endif 780 return; 781 } 782 ex->isdone = 1; 783 splx(s); 784 } 785 #endif 786 787 if (xfer->status == USBD_CANCELLED || 788 xfer->status == USBD_TIMEOUT) { 789 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 790 return; 791 } 792 793 #ifdef EHCI_DEBUG 794 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 795 if (ehcidebug > 10) 796 ehci_dump_sqtds(ex->sqtdstart); 797 #endif 798 799 /* The transfer is done, compute actual length and status. */ 800 lsqtd = ex->sqtdend; 801 actlen = 0; 802 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 803 nstatus = le32toh(sqtd->qtd.qtd_status); 804 if (nstatus & EHCI_QTD_ACTIVE) 805 break; 806 807 status = nstatus; 808 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 809 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 810 } 811 812 /* 813 * If there are left over TDs we need to update the toggle. 814 * The default pipe doesn't need it since control transfers 815 * start the toggle at 0 every time. 816 */ 817 if (sqtd != lsqtd->nextqtd && 818 xfer->pipe->device->default_pipe != xfer->pipe) { 819 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 820 #if 0 821 ehci_dump_sqh(epipe->sqh); 822 ehci_dump_sqtds(ex->sqtdstart); 823 #endif 824 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 825 } 826 827 /* 828 * For a short transfer we need to update the toggle for the missing 829 * packets within the qTD. 830 */ 831 pkts_left = EHCI_QTD_GET_BYTES(status) / 832 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 833 epipe->nexttoggle ^= pkts_left % 2; 834 835 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 836 xfer->length, actlen, status)); 837 xfer->actlen = actlen; 838 if (status & EHCI_QTD_HALTED) { 839 #ifdef EHCI_DEBUG 840 char sbuf[128]; 841 842 bitmask_snprintf((u_int32_t)status, 843 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 844 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 845 846 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 847 "status 0x%s\n", 848 xfer->pipe->device->address, 849 xfer->pipe->endpoint->edesc->bEndpointAddress, 850 sbuf)); 851 if (ehcidebug > 2) { 852 ehci_dump_sqh(epipe->sqh); 853 ehci_dump_sqtds(ex->sqtdstart); 854 } 855 #endif 856 /* low&full speed has an extra error flag */ 857 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 858 EHCI_QH_SPEED_HIGH) 859 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 860 else 861 status &= EHCI_QTD_STATERRS; 862 if (status == 0) /* no other errors means a stall */ 863 xfer->status = USBD_STALLED; 864 else 865 xfer->status = USBD_IOERROR; /* more info XXX */ 866 /* XXX need to reset TT on missed microframe */ 867 if (status & EHCI_QTD_MISSEDMICRO) { 868 ehci_softc_t *sc = (ehci_softc_t *) 869 xfer->pipe->device->bus; 870 871 printf("%s: missed microframe, TT reset not " 872 "implemented, hub might be inoperational\n", 873 USBDEVNAME(sc->sc_bus.bdev)); 874 } 875 } else { 876 xfer->status = USBD_NORMAL_COMPLETION; 877 } 878 879 usb_transfer_complete(xfer); 880 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 881 } 882 883 /* 884 * Wait here until controller claims to have an interrupt. 885 * Then call ehci_intr and return. Use timeout to avoid waiting 886 * too long. 887 */ 888 void 889 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 890 { 891 int timo; 892 u_int32_t intrs; 893 894 xfer->status = USBD_IN_PROGRESS; 895 for (timo = xfer->timeout; timo >= 0; timo--) { 896 usb_delay_ms(&sc->sc_bus, 1); 897 if (sc->sc_dying) 898 break; 899 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 900 sc->sc_eintrs; 901 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 902 #ifdef EHCI_DEBUG 903 if (ehcidebug > 15) 904 ehci_dump_regs(sc); 905 #endif 906 if (intrs) { 907 ehci_intr1(sc); 908 if (xfer->status != USBD_IN_PROGRESS) 909 return; 910 } 911 } 912 913 /* Timeout */ 914 DPRINTF(("ehci_waitintr: timeout\n")); 915 xfer->status = USBD_TIMEOUT; 916 usb_transfer_complete(xfer); 917 /* XXX should free TD */ 918 } 919 920 void 921 ehci_poll(struct usbd_bus *bus) 922 { 923 ehci_softc_t *sc = (ehci_softc_t *)bus; 924 #ifdef EHCI_DEBUG 925 static int last; 926 int new; 927 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 928 if (new != last) { 929 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 930 last = new; 931 } 932 #endif 933 934 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 935 ehci_intr1(sc); 936 } 937 938 int 939 ehci_detach(struct ehci_softc *sc, int flags) 940 { 941 int rv = 0; 942 943 if (sc->sc_child != NULL) 944 rv = config_detach(sc->sc_child, flags); 945 946 if (rv != 0) 947 return (rv); 948 949 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 950 951 if (sc->sc_powerhook != NULL) 952 powerhook_disestablish(sc->sc_powerhook); 953 if (sc->sc_shutdownhook != NULL) 954 shutdownhook_disestablish(sc->sc_shutdownhook); 955 956 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 957 958 /* XXX free other data structures XXX */ 959 960 return (rv); 961 } 962 963 964 int 965 ehci_activate(device_ptr_t self, enum devact act) 966 { 967 struct ehci_softc *sc = (struct ehci_softc *)self; 968 int rv = 0; 969 970 switch (act) { 971 case DVACT_ACTIVATE: 972 return (EOPNOTSUPP); 973 974 case DVACT_DEACTIVATE: 975 if (sc->sc_child != NULL) 976 rv = config_deactivate(sc->sc_child); 977 sc->sc_dying = 1; 978 break; 979 } 980 return (rv); 981 } 982 983 /* 984 * Handle suspend/resume. 985 * 986 * We need to switch to polling mode here, because this routine is 987 * called from an interrupt context. This is all right since we 988 * are almost suspended anyway. 989 */ 990 void 991 ehci_power(int why, void *v) 992 { 993 ehci_softc_t *sc = v; 994 u_int32_t cmd, hcr; 995 int s, i; 996 997 #ifdef EHCI_DEBUG 998 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 999 if (ehcidebug > 0) 1000 ehci_dump_regs(sc); 1001 #endif 1002 1003 s = splhardusb(); 1004 switch (why) { 1005 case PWR_SUSPEND: 1006 case PWR_STANDBY: 1007 sc->sc_bus.use_polling++; 1008 1009 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1010 1011 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1012 EOWRITE4(sc, EHCI_USBCMD, cmd); 1013 1014 for (i = 0; i < 100; i++) { 1015 hcr = EOREAD4(sc, EHCI_USBSTS) & 1016 (EHCI_STS_ASS | EHCI_STS_PSS); 1017 if (hcr == 0) 1018 break; 1019 1020 usb_delay_ms(&sc->sc_bus, 1); 1021 } 1022 if (hcr != 0) { 1023 printf("%s: reset timeout\n", 1024 USBDEVNAME(sc->sc_bus.bdev)); 1025 } 1026 1027 cmd &= ~EHCI_CMD_RS; 1028 EOWRITE4(sc, EHCI_USBCMD, cmd); 1029 1030 for (i = 0; i < 100; i++) { 1031 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1032 if (hcr == EHCI_STS_HCH) 1033 break; 1034 1035 usb_delay_ms(&sc->sc_bus, 1); 1036 } 1037 if (hcr != EHCI_STS_HCH) { 1038 printf("%s: config timeout\n", 1039 USBDEVNAME(sc->sc_bus.bdev)); 1040 } 1041 1042 sc->sc_bus.use_polling--; 1043 break; 1044 1045 case PWR_RESUME: 1046 sc->sc_bus.use_polling++; 1047 1048 /* restore things in case the bios sucks */ 1049 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1050 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1051 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1052 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1053 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1054 1055 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1056 1057 for (i = 0; i < 100; i++) { 1058 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1059 if (hcr != EHCI_STS_HCH) 1060 break; 1061 1062 usb_delay_ms(&sc->sc_bus, 1); 1063 } 1064 if (hcr == EHCI_STS_HCH) { 1065 printf("%s: config timeout\n", 1066 USBDEVNAME(sc->sc_bus.bdev)); 1067 } 1068 1069 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1070 1071 sc->sc_bus.use_polling--; 1072 break; 1073 case PWR_SOFTSUSPEND: 1074 case PWR_SOFTSTANDBY: 1075 case PWR_SOFTRESUME: 1076 break; 1077 } 1078 splx(s); 1079 1080 #ifdef EHCI_DEBUG 1081 DPRINTF(("ehci_power: sc=%p\n", sc)); 1082 if (ehcidebug > 0) 1083 ehci_dump_regs(sc); 1084 #endif 1085 } 1086 1087 /* 1088 * Shut down the controller when the system is going down. 1089 */ 1090 void 1091 ehci_shutdown(void *v) 1092 { 1093 ehci_softc_t *sc = v; 1094 1095 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1096 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1097 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1098 } 1099 1100 usbd_status 1101 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1102 { 1103 struct ehci_softc *sc = (struct ehci_softc *)bus; 1104 usbd_status err; 1105 1106 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1107 if (err == USBD_NOMEM) 1108 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1109 #ifdef EHCI_DEBUG 1110 if (err) 1111 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1112 #endif 1113 return (err); 1114 } 1115 1116 void 1117 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1118 { 1119 struct ehci_softc *sc = (struct ehci_softc *)bus; 1120 1121 if (dma->block->flags & USB_DMA_RESERVE) { 1122 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1123 dma); 1124 return; 1125 } 1126 usb_freemem(&sc->sc_bus, dma); 1127 } 1128 1129 usbd_xfer_handle 1130 ehci_allocx(struct usbd_bus *bus) 1131 { 1132 struct ehci_softc *sc = (struct ehci_softc *)bus; 1133 usbd_xfer_handle xfer; 1134 1135 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1136 if (xfer != NULL) { 1137 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1138 #ifdef DIAGNOSTIC 1139 if (xfer->busy_free != XFER_FREE) { 1140 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1141 xfer->busy_free); 1142 } 1143 #endif 1144 } else { 1145 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1146 } 1147 if (xfer != NULL) { 1148 memset(xfer, 0, sizeof(struct ehci_xfer)); 1149 #ifdef DIAGNOSTIC 1150 EXFER(xfer)->isdone = 1; 1151 xfer->busy_free = XFER_BUSY; 1152 #endif 1153 } 1154 return (xfer); 1155 } 1156 1157 void 1158 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1159 { 1160 struct ehci_softc *sc = (struct ehci_softc *)bus; 1161 1162 #ifdef DIAGNOSTIC 1163 if (xfer->busy_free != XFER_BUSY) { 1164 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1165 xfer->busy_free); 1166 return; 1167 } 1168 xfer->busy_free = XFER_FREE; 1169 if (!EXFER(xfer)->isdone) { 1170 printf("ehci_freex: !isdone\n"); 1171 return; 1172 } 1173 #endif 1174 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1175 } 1176 1177 Static void 1178 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1179 { 1180 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1181 1182 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1183 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1184 #ifdef USB_DEBUG 1185 if (ehcidebug) 1186 usbd_dump_pipe(pipe); 1187 #endif 1188 epipe->nexttoggle = 0; 1189 } 1190 1191 Static void 1192 ehci_noop(usbd_pipe_handle pipe) 1193 { 1194 } 1195 1196 #ifdef EHCI_DEBUG 1197 void 1198 ehci_dump_regs(ehci_softc_t *sc) 1199 { 1200 int i; 1201 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1202 EOREAD4(sc, EHCI_USBCMD), 1203 EOREAD4(sc, EHCI_USBSTS), 1204 EOREAD4(sc, EHCI_USBINTR)); 1205 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1206 EOREAD4(sc, EHCI_FRINDEX), 1207 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1208 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1209 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1210 for (i = 1; i <= sc->sc_noport; i++) 1211 printf("port %d status=0x%08x\n", i, 1212 EOREAD4(sc, EHCI_PORTSC(i))); 1213 } 1214 1215 /* 1216 * Unused function - this is meant to be called from a kernel 1217 * debugger. 1218 */ 1219 void 1220 ehci_dump() 1221 { 1222 ehci_dump_regs(theehci); 1223 } 1224 1225 void 1226 ehci_dump_link(ehci_link_t link, int type) 1227 { 1228 link = le32toh(link); 1229 printf("0x%08x", link); 1230 if (link & EHCI_LINK_TERMINATE) 1231 printf("<T>"); 1232 else { 1233 printf("<"); 1234 if (type) { 1235 switch (EHCI_LINK_TYPE(link)) { 1236 case EHCI_LINK_ITD: printf("ITD"); break; 1237 case EHCI_LINK_QH: printf("QH"); break; 1238 case EHCI_LINK_SITD: printf("SITD"); break; 1239 case EHCI_LINK_FSTN: printf("FSTN"); break; 1240 } 1241 } 1242 printf(">"); 1243 } 1244 } 1245 1246 void 1247 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1248 { 1249 int i; 1250 u_int32_t stop; 1251 1252 stop = 0; 1253 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1254 ehci_dump_sqtd(sqtd); 1255 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1256 } 1257 if (sqtd) 1258 printf("dump aborted, too many TDs\n"); 1259 } 1260 1261 void 1262 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1263 { 1264 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1265 ehci_dump_qtd(&sqtd->qtd); 1266 } 1267 1268 void 1269 ehci_dump_qtd(ehci_qtd_t *qtd) 1270 { 1271 u_int32_t s; 1272 char sbuf[128]; 1273 1274 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1275 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1276 printf("\n"); 1277 s = le32toh(qtd->qtd_status); 1278 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1279 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1280 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1281 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1282 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1283 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1284 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1285 EHCI_QTD_GET_PID(s), sbuf); 1286 for (s = 0; s < 5; s++) 1287 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1288 } 1289 1290 void 1291 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1292 { 1293 ehci_qh_t *qh = &sqh->qh; 1294 u_int32_t endp, endphub; 1295 1296 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1297 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1298 endp = le32toh(qh->qh_endp); 1299 printf(" endp=0x%08x\n", endp); 1300 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1301 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1302 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1303 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1304 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1305 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1306 EHCI_QH_GET_NRL(endp)); 1307 endphub = le32toh(qh->qh_endphub); 1308 printf(" endphub=0x%08x\n", endphub); 1309 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1310 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1311 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1312 EHCI_QH_GET_MULT(endphub)); 1313 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1314 printf("Overlay qTD:\n"); 1315 ehci_dump_qtd(&qh->qh_qtd); 1316 } 1317 1318 #ifdef DIAGNOSTIC 1319 Static void 1320 ehci_dump_exfer(struct ehci_xfer *ex) 1321 { 1322 printf("ehci_dump_exfer: ex=%p\n", ex); 1323 } 1324 #endif 1325 #endif 1326 1327 usbd_status 1328 ehci_open(usbd_pipe_handle pipe) 1329 { 1330 usbd_device_handle dev = pipe->device; 1331 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1332 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1333 u_int8_t addr = dev->address; 1334 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1335 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1336 ehci_soft_qh_t *sqh; 1337 usbd_status err; 1338 int s; 1339 int ival, speed, naks; 1340 int hshubaddr, hshubport; 1341 1342 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1343 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1344 1345 if (dev->myhsport) { 1346 hshubaddr = dev->myhsport->parent->address; 1347 hshubport = dev->myhsport->portno; 1348 } else { 1349 hshubaddr = 0; 1350 hshubport = 0; 1351 } 1352 1353 if (sc->sc_dying) 1354 return (USBD_IOERROR); 1355 1356 epipe->nexttoggle = 0; 1357 1358 if (addr == sc->sc_addr) { 1359 switch (ed->bEndpointAddress) { 1360 case USB_CONTROL_ENDPOINT: 1361 pipe->methods = &ehci_root_ctrl_methods; 1362 break; 1363 case UE_DIR_IN | EHCI_INTR_ENDPT: 1364 pipe->methods = &ehci_root_intr_methods; 1365 break; 1366 default: 1367 return (USBD_INVAL); 1368 } 1369 return (USBD_NORMAL_COMPLETION); 1370 } 1371 1372 /* XXX All this stuff is only valid for async. */ 1373 switch (dev->speed) { 1374 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1375 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1376 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1377 default: panic("ehci_open: bad device speed %d", dev->speed); 1378 } 1379 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1380 printf("%s: *** WARNING: opening low/full speed isoc device, " 1381 "this does not work yet.\n", 1382 USBDEVNAME(sc->sc_bus.bdev)); 1383 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1384 hshubaddr, hshubport)); 1385 return USBD_INVAL; 1386 } 1387 1388 naks = 8; /* XXX */ 1389 sqh = ehci_alloc_sqh(sc); 1390 if (sqh == NULL) 1391 goto bad0; 1392 /* qh_link filled when the QH is added */ 1393 sqh->qh.qh_endp = htole32( 1394 EHCI_QH_SET_ADDR(addr) | 1395 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1396 EHCI_QH_SET_EPS(speed) | 1397 EHCI_QH_DTC | 1398 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1399 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1400 EHCI_QH_CTL : 0) | 1401 EHCI_QH_SET_NRL(naks) 1402 ); 1403 sqh->qh.qh_endphub = htole32( 1404 EHCI_QH_SET_MULT(1) | 1405 EHCI_QH_SET_HUBA(hshubaddr) | 1406 EHCI_QH_SET_PORT(hshubport) | 1407 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1408 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1409 ); 1410 sqh->qh.qh_curqtd = EHCI_NULL; 1411 /* Fill the overlay qTD */ 1412 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1413 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1414 sqh->qh.qh_qtd.qtd_status = htole32(0); 1415 1416 epipe->sqh = sqh; 1417 1418 switch (xfertype) { 1419 case UE_CONTROL: 1420 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1421 0, &epipe->u.ctl.reqdma); 1422 #ifdef EHCI_DEBUG 1423 if (err) 1424 printf("ehci_open: usb_allocmem()=%d\n", err); 1425 #endif 1426 if (err) 1427 goto bad1; 1428 pipe->methods = &ehci_device_ctrl_methods; 1429 s = splusb(); 1430 ehci_add_qh(sqh, sc->sc_async_head); 1431 splx(s); 1432 break; 1433 case UE_BULK: 1434 pipe->methods = &ehci_device_bulk_methods; 1435 s = splusb(); 1436 ehci_add_qh(sqh, sc->sc_async_head); 1437 splx(s); 1438 break; 1439 case UE_INTERRUPT: 1440 pipe->methods = &ehci_device_intr_methods; 1441 ival = pipe->interval; 1442 if (ival == USBD_DEFAULT_INTERVAL) 1443 ival = ed->bInterval; 1444 return (ehci_device_setintr(sc, sqh, ival)); 1445 case UE_ISOCHRONOUS: 1446 pipe->methods = &ehci_device_isoc_methods; 1447 return (USBD_INVAL); 1448 default: 1449 return (USBD_INVAL); 1450 } 1451 return (USBD_NORMAL_COMPLETION); 1452 1453 bad1: 1454 ehci_free_sqh(sc, sqh); 1455 bad0: 1456 return (USBD_NOMEM); 1457 } 1458 1459 /* 1460 * Add an ED to the schedule. Called at splusb(). 1461 */ 1462 void 1463 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1464 { 1465 SPLUSBCHECK; 1466 1467 sqh->next = head->next; 1468 sqh->qh.qh_link = head->qh.qh_link; 1469 head->next = sqh; 1470 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1471 1472 #ifdef EHCI_DEBUG 1473 if (ehcidebug > 5) { 1474 printf("ehci_add_qh:\n"); 1475 ehci_dump_sqh(sqh); 1476 } 1477 #endif 1478 } 1479 1480 /* 1481 * Remove an ED from the schedule. Called at splusb(). 1482 */ 1483 void 1484 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1485 { 1486 ehci_soft_qh_t *p; 1487 1488 SPLUSBCHECK; 1489 /* XXX */ 1490 for (p = head; p != NULL && p->next != sqh; p = p->next) 1491 ; 1492 if (p == NULL) 1493 panic("ehci_rem_qh: ED not found"); 1494 p->next = sqh->next; 1495 p->qh.qh_link = sqh->qh.qh_link; 1496 1497 ehci_sync_hc(sc); 1498 } 1499 1500 void 1501 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1502 { 1503 int i; 1504 u_int32_t status; 1505 1506 /* Save toggle bit and ping status. */ 1507 status = sqh->qh.qh_qtd.qtd_status & 1508 htole32(EHCI_QTD_TOGGLE_MASK | 1509 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1510 /* Set HALTED to make hw leave it alone. */ 1511 sqh->qh.qh_qtd.qtd_status = 1512 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1513 sqh->qh.qh_curqtd = 0; 1514 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1515 sqh->qh.qh_qtd.qtd_altnext = 0; 1516 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1517 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1518 sqh->sqtd = sqtd; 1519 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1520 sqh->qh.qh_qtd.qtd_status = status; 1521 } 1522 1523 /* 1524 * Ensure that the HC has released all references to the QH. We do this 1525 * by asking for a Async Advance Doorbell interrupt and then we wait for 1526 * the interrupt. 1527 * To make this easier we first obtain exclusive use of the doorbell. 1528 */ 1529 void 1530 ehci_sync_hc(ehci_softc_t *sc) 1531 { 1532 int s, error; 1533 1534 if (sc->sc_dying) { 1535 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1536 return; 1537 } 1538 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1539 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1540 s = splhardusb(); 1541 /* ask for doorbell */ 1542 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1543 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1544 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1545 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1546 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1547 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1548 splx(s); 1549 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1550 #ifdef DIAGNOSTIC 1551 if (error) 1552 printf("ehci_sync_hc: tsleep() = %d\n", error); 1553 #endif 1554 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1555 } 1556 1557 /***********/ 1558 1559 /* 1560 * Data structures and routines to emulate the root hub. 1561 */ 1562 Static usb_device_descriptor_t ehci_devd = { 1563 USB_DEVICE_DESCRIPTOR_SIZE, 1564 UDESC_DEVICE, /* type */ 1565 {0x00, 0x02}, /* USB version */ 1566 UDCLASS_HUB, /* class */ 1567 UDSUBCLASS_HUB, /* subclass */ 1568 UDPROTO_HSHUBSTT, /* protocol */ 1569 64, /* max packet */ 1570 {0},{0},{0x00,0x01}, /* device id */ 1571 1,2,0, /* string indicies */ 1572 1 /* # of configurations */ 1573 }; 1574 1575 Static usb_device_qualifier_t ehci_odevd = { 1576 USB_DEVICE_DESCRIPTOR_SIZE, 1577 UDESC_DEVICE_QUALIFIER, /* type */ 1578 {0x00, 0x02}, /* USB version */ 1579 UDCLASS_HUB, /* class */ 1580 UDSUBCLASS_HUB, /* subclass */ 1581 UDPROTO_FSHUB, /* protocol */ 1582 64, /* max packet */ 1583 1, /* # of configurations */ 1584 0 1585 }; 1586 1587 Static usb_config_descriptor_t ehci_confd = { 1588 USB_CONFIG_DESCRIPTOR_SIZE, 1589 UDESC_CONFIG, 1590 {USB_CONFIG_DESCRIPTOR_SIZE + 1591 USB_INTERFACE_DESCRIPTOR_SIZE + 1592 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1593 1, 1594 1, 1595 0, 1596 UC_SELF_POWERED, 1597 0 /* max power */ 1598 }; 1599 1600 Static usb_interface_descriptor_t ehci_ifcd = { 1601 USB_INTERFACE_DESCRIPTOR_SIZE, 1602 UDESC_INTERFACE, 1603 0, 1604 0, 1605 1, 1606 UICLASS_HUB, 1607 UISUBCLASS_HUB, 1608 UIPROTO_HSHUBSTT, 1609 0 1610 }; 1611 1612 Static usb_endpoint_descriptor_t ehci_endpd = { 1613 USB_ENDPOINT_DESCRIPTOR_SIZE, 1614 UDESC_ENDPOINT, 1615 UE_DIR_IN | EHCI_INTR_ENDPT, 1616 UE_INTERRUPT, 1617 {8, 0}, /* max packet */ 1618 255 1619 }; 1620 1621 Static usb_hub_descriptor_t ehci_hubd = { 1622 USB_HUB_DESCRIPTOR_SIZE, 1623 UDESC_HUB, 1624 0, 1625 {0,0}, 1626 0, 1627 0, 1628 {0}, 1629 }; 1630 1631 Static int 1632 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1633 { 1634 int i; 1635 1636 if (l == 0) 1637 return (0); 1638 p->bLength = 2 * strlen(s) + 2; 1639 if (l == 1) 1640 return (1); 1641 p->bDescriptorType = UDESC_STRING; 1642 l -= 2; 1643 for (i = 0; s[i] && l > 1; i++, l -= 2) 1644 USETW2(p->bString[i], 0, s[i]); 1645 return (2*i+2); 1646 } 1647 1648 /* 1649 * Simulate a hardware hub by handling all the necessary requests. 1650 */ 1651 Static usbd_status 1652 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1653 { 1654 usbd_status err; 1655 1656 /* Insert last in queue. */ 1657 err = usb_insert_transfer(xfer); 1658 if (err) 1659 return (err); 1660 1661 /* Pipe isn't running, start first */ 1662 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1663 } 1664 1665 Static usbd_status 1666 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1667 { 1668 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1669 usb_device_request_t *req; 1670 void *buf = NULL; 1671 int port, i; 1672 int s, len, value, index, l, totlen = 0; 1673 usb_port_status_t ps; 1674 usb_hub_descriptor_t hubd; 1675 usbd_status err; 1676 u_int32_t v; 1677 1678 if (sc->sc_dying) 1679 return (USBD_IOERROR); 1680 1681 #ifdef DIAGNOSTIC 1682 if (!(xfer->rqflags & URQ_REQUEST)) 1683 /* XXX panic */ 1684 return (USBD_INVAL); 1685 #endif 1686 req = &xfer->request; 1687 1688 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1689 req->bmRequestType, req->bRequest)); 1690 1691 len = UGETW(req->wLength); 1692 value = UGETW(req->wValue); 1693 index = UGETW(req->wIndex); 1694 1695 if (len != 0) 1696 buf = KERNADDR(&xfer->dmabuf, 0); 1697 1698 #define C(x,y) ((x) | ((y) << 8)) 1699 switch(C(req->bRequest, req->bmRequestType)) { 1700 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1702 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1703 /* 1704 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1705 * for the integrated root hub. 1706 */ 1707 break; 1708 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1709 if (len > 0) { 1710 *(u_int8_t *)buf = sc->sc_conf; 1711 totlen = 1; 1712 } 1713 break; 1714 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1715 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1716 switch(value >> 8) { 1717 case UDESC_DEVICE: 1718 if ((value & 0xff) != 0) { 1719 err = USBD_IOERROR; 1720 goto ret; 1721 } 1722 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1723 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1724 memcpy(buf, &ehci_devd, l); 1725 break; 1726 /* 1727 * We can't really operate at another speed, but the spec says 1728 * we need this descriptor. 1729 */ 1730 case UDESC_DEVICE_QUALIFIER: 1731 if ((value & 0xff) != 0) { 1732 err = USBD_IOERROR; 1733 goto ret; 1734 } 1735 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1736 memcpy(buf, &ehci_odevd, l); 1737 break; 1738 /* 1739 * We can't really operate at another speed, but the spec says 1740 * we need this descriptor. 1741 */ 1742 case UDESC_OTHER_SPEED_CONFIGURATION: 1743 case UDESC_CONFIG: 1744 if ((value & 0xff) != 0) { 1745 err = USBD_IOERROR; 1746 goto ret; 1747 } 1748 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1749 memcpy(buf, &ehci_confd, l); 1750 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1751 value >> 8; 1752 buf = (char *)buf + l; 1753 len -= l; 1754 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1755 totlen += l; 1756 memcpy(buf, &ehci_ifcd, l); 1757 buf = (char *)buf + l; 1758 len -= l; 1759 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1760 totlen += l; 1761 memcpy(buf, &ehci_endpd, l); 1762 break; 1763 case UDESC_STRING: 1764 if (len == 0) 1765 break; 1766 *(u_int8_t *)buf = 0; 1767 totlen = 1; 1768 switch (value & 0xff) { 1769 case 0: /* Language table */ 1770 totlen = ehci_str(buf, len, "\001"); 1771 break; 1772 case 1: /* Vendor */ 1773 totlen = ehci_str(buf, len, sc->sc_vendor); 1774 break; 1775 case 2: /* Product */ 1776 totlen = ehci_str(buf, len, "EHCI root hub"); 1777 break; 1778 } 1779 break; 1780 default: 1781 err = USBD_IOERROR; 1782 goto ret; 1783 } 1784 break; 1785 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1786 if (len > 0) { 1787 *(u_int8_t *)buf = 0; 1788 totlen = 1; 1789 } 1790 break; 1791 case C(UR_GET_STATUS, UT_READ_DEVICE): 1792 if (len > 1) { 1793 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1794 totlen = 2; 1795 } 1796 break; 1797 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1798 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1799 if (len > 1) { 1800 USETW(((usb_status_t *)buf)->wStatus, 0); 1801 totlen = 2; 1802 } 1803 break; 1804 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1805 if (value >= USB_MAX_DEVICES) { 1806 err = USBD_IOERROR; 1807 goto ret; 1808 } 1809 sc->sc_addr = value; 1810 break; 1811 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1812 if (value != 0 && value != 1) { 1813 err = USBD_IOERROR; 1814 goto ret; 1815 } 1816 sc->sc_conf = value; 1817 break; 1818 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1819 break; 1820 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1821 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1822 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1823 err = USBD_IOERROR; 1824 goto ret; 1825 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1826 break; 1827 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1828 break; 1829 /* Hub requests */ 1830 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1831 break; 1832 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1833 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1834 "port=%d feature=%d\n", 1835 index, value)); 1836 if (index < 1 || index > sc->sc_noport) { 1837 err = USBD_IOERROR; 1838 goto ret; 1839 } 1840 port = EHCI_PORTSC(index); 1841 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1842 switch(value) { 1843 case UHF_PORT_ENABLE: 1844 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1845 break; 1846 case UHF_PORT_SUSPEND: 1847 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1848 break; 1849 case UHF_PORT_POWER: 1850 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1851 break; 1852 case UHF_PORT_TEST: 1853 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1854 "%d\n", index)); 1855 break; 1856 case UHF_PORT_INDICATOR: 1857 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1858 "%d\n", index)); 1859 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1860 break; 1861 case UHF_C_PORT_CONNECTION: 1862 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1863 break; 1864 case UHF_C_PORT_ENABLE: 1865 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1866 break; 1867 case UHF_C_PORT_SUSPEND: 1868 /* how? */ 1869 break; 1870 case UHF_C_PORT_OVER_CURRENT: 1871 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1872 break; 1873 case UHF_C_PORT_RESET: 1874 sc->sc_isreset = 0; 1875 break; 1876 default: 1877 err = USBD_IOERROR; 1878 goto ret; 1879 } 1880 #if 0 1881 switch(value) { 1882 case UHF_C_PORT_CONNECTION: 1883 case UHF_C_PORT_ENABLE: 1884 case UHF_C_PORT_SUSPEND: 1885 case UHF_C_PORT_OVER_CURRENT: 1886 case UHF_C_PORT_RESET: 1887 /* Enable RHSC interrupt if condition is cleared. */ 1888 if ((OREAD4(sc, port) >> 16) == 0) 1889 ehci_pcd_able(sc, 1); 1890 break; 1891 default: 1892 break; 1893 } 1894 #endif 1895 break; 1896 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1897 if ((value & 0xff) != 0) { 1898 err = USBD_IOERROR; 1899 goto ret; 1900 } 1901 hubd = ehci_hubd; 1902 hubd.bNbrPorts = sc->sc_noport; 1903 v = EOREAD4(sc, EHCI_HCSPARAMS); 1904 USETW(hubd.wHubCharacteristics, 1905 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1906 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1907 ? UHD_PORT_IND : 0); 1908 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1909 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1910 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1911 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1912 l = min(len, hubd.bDescLength); 1913 totlen = l; 1914 memcpy(buf, &hubd, l); 1915 break; 1916 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1917 if (len != 4) { 1918 err = USBD_IOERROR; 1919 goto ret; 1920 } 1921 memset(buf, 0, len); /* ? XXX */ 1922 totlen = len; 1923 break; 1924 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1925 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1926 index)); 1927 if (index < 1 || index > sc->sc_noport) { 1928 err = USBD_IOERROR; 1929 goto ret; 1930 } 1931 if (len != 4) { 1932 err = USBD_IOERROR; 1933 goto ret; 1934 } 1935 v = EOREAD4(sc, EHCI_PORTSC(index)); 1936 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1937 v)); 1938 i = UPS_HIGH_SPEED; 1939 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1940 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1941 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1942 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1943 if (v & EHCI_PS_PR) i |= UPS_RESET; 1944 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1945 USETW(ps.wPortStatus, i); 1946 i = 0; 1947 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1948 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1949 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1950 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1951 USETW(ps.wPortChange, i); 1952 l = min(len, sizeof ps); 1953 memcpy(buf, &ps, l); 1954 totlen = l; 1955 break; 1956 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1957 err = USBD_IOERROR; 1958 goto ret; 1959 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1960 break; 1961 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1962 if (index < 1 || index > sc->sc_noport) { 1963 err = USBD_IOERROR; 1964 goto ret; 1965 } 1966 port = EHCI_PORTSC(index); 1967 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1968 switch(value) { 1969 case UHF_PORT_ENABLE: 1970 EOWRITE4(sc, port, v | EHCI_PS_PE); 1971 break; 1972 case UHF_PORT_SUSPEND: 1973 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1974 break; 1975 case UHF_PORT_RESET: 1976 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1977 index)); 1978 if (EHCI_PS_IS_LOWSPEED(v)) { 1979 /* Low speed device, give up ownership. */ 1980 ehci_disown(sc, index, 1); 1981 break; 1982 } 1983 /* Start reset sequence. */ 1984 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1985 EOWRITE4(sc, port, v | EHCI_PS_PR); 1986 /* Wait for reset to complete. */ 1987 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1988 if (sc->sc_dying) { 1989 err = USBD_IOERROR; 1990 goto ret; 1991 } 1992 /* Terminate reset sequence. */ 1993 EOWRITE4(sc, port, v); 1994 /* Wait for HC to complete reset. */ 1995 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1996 if (sc->sc_dying) { 1997 err = USBD_IOERROR; 1998 goto ret; 1999 } 2000 v = EOREAD4(sc, port); 2001 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2002 if (v & EHCI_PS_PR) { 2003 printf("%s: port reset timeout\n", 2004 USBDEVNAME(sc->sc_bus.bdev)); 2005 return (USBD_TIMEOUT); 2006 } 2007 if (!(v & EHCI_PS_PE)) { 2008 /* Not a high speed device, give up ownership.*/ 2009 ehci_disown(sc, index, 0); 2010 break; 2011 } 2012 sc->sc_isreset = 1; 2013 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2014 index, v)); 2015 break; 2016 case UHF_PORT_POWER: 2017 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2018 "%d\n", index)); 2019 EOWRITE4(sc, port, v | EHCI_PS_PP); 2020 break; 2021 case UHF_PORT_TEST: 2022 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2023 "%d\n", index)); 2024 break; 2025 case UHF_PORT_INDICATOR: 2026 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2027 "%d\n", index)); 2028 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2029 break; 2030 default: 2031 err = USBD_IOERROR; 2032 goto ret; 2033 } 2034 break; 2035 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2036 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2037 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2038 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2039 break; 2040 default: 2041 err = USBD_IOERROR; 2042 goto ret; 2043 } 2044 xfer->actlen = totlen; 2045 err = USBD_NORMAL_COMPLETION; 2046 ret: 2047 xfer->status = err; 2048 s = splusb(); 2049 usb_transfer_complete(xfer); 2050 splx(s); 2051 return (USBD_IN_PROGRESS); 2052 } 2053 2054 void 2055 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2056 { 2057 int port; 2058 u_int32_t v; 2059 2060 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2061 #ifdef DIAGNOSTIC 2062 if (sc->sc_npcomp != 0) { 2063 int i = (index-1) / sc->sc_npcomp; 2064 if (i >= sc->sc_ncomp) 2065 printf("%s: strange port\n", 2066 USBDEVNAME(sc->sc_bus.bdev)); 2067 else 2068 printf("%s: handing over %s speed device on " 2069 "port %d to %s\n", 2070 USBDEVNAME(sc->sc_bus.bdev), 2071 lowspeed ? "low" : "full", 2072 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2073 } else { 2074 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2075 } 2076 #endif 2077 port = EHCI_PORTSC(index); 2078 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2079 EOWRITE4(sc, port, v | EHCI_PS_PO); 2080 } 2081 2082 /* Abort a root control request. */ 2083 Static void 2084 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2085 { 2086 /* Nothing to do, all transfers are synchronous. */ 2087 } 2088 2089 /* Close the root pipe. */ 2090 Static void 2091 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2092 { 2093 DPRINTF(("ehci_root_ctrl_close\n")); 2094 /* Nothing to do. */ 2095 } 2096 2097 void 2098 ehci_root_intr_done(usbd_xfer_handle xfer) 2099 { 2100 xfer->hcpriv = NULL; 2101 } 2102 2103 Static usbd_status 2104 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2105 { 2106 usbd_status err; 2107 2108 /* Insert last in queue. */ 2109 err = usb_insert_transfer(xfer); 2110 if (err) 2111 return (err); 2112 2113 /* Pipe isn't running, start first */ 2114 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2115 } 2116 2117 Static usbd_status 2118 ehci_root_intr_start(usbd_xfer_handle xfer) 2119 { 2120 usbd_pipe_handle pipe = xfer->pipe; 2121 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2122 2123 if (sc->sc_dying) 2124 return (USBD_IOERROR); 2125 2126 sc->sc_intrxfer = xfer; 2127 2128 return (USBD_IN_PROGRESS); 2129 } 2130 2131 /* Abort a root interrupt request. */ 2132 Static void 2133 ehci_root_intr_abort(usbd_xfer_handle xfer) 2134 { 2135 int s; 2136 2137 if (xfer->pipe->intrxfer == xfer) { 2138 DPRINTF(("ehci_root_intr_abort: remove\n")); 2139 xfer->pipe->intrxfer = NULL; 2140 } 2141 xfer->status = USBD_CANCELLED; 2142 s = splusb(); 2143 usb_transfer_complete(xfer); 2144 splx(s); 2145 } 2146 2147 /* Close the root pipe. */ 2148 Static void 2149 ehci_root_intr_close(usbd_pipe_handle pipe) 2150 { 2151 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2152 2153 DPRINTF(("ehci_root_intr_close\n")); 2154 2155 sc->sc_intrxfer = NULL; 2156 } 2157 2158 void 2159 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2160 { 2161 xfer->hcpriv = NULL; 2162 } 2163 2164 /************************/ 2165 2166 ehci_soft_qh_t * 2167 ehci_alloc_sqh(ehci_softc_t *sc) 2168 { 2169 ehci_soft_qh_t *sqh; 2170 usbd_status err; 2171 int i, offs; 2172 usb_dma_t dma; 2173 2174 if (sc->sc_freeqhs == NULL) { 2175 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2176 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2177 EHCI_PAGE_SIZE, &dma); 2178 #ifdef EHCI_DEBUG 2179 if (err) 2180 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2181 #endif 2182 if (err) 2183 return (NULL); 2184 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2185 offs = i * EHCI_SQH_SIZE; 2186 sqh = KERNADDR(&dma, offs); 2187 sqh->physaddr = DMAADDR(&dma, offs); 2188 sqh->next = sc->sc_freeqhs; 2189 sc->sc_freeqhs = sqh; 2190 } 2191 } 2192 sqh = sc->sc_freeqhs; 2193 sc->sc_freeqhs = sqh->next; 2194 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2195 sqh->next = NULL; 2196 return (sqh); 2197 } 2198 2199 void 2200 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2201 { 2202 sqh->next = sc->sc_freeqhs; 2203 sc->sc_freeqhs = sqh; 2204 } 2205 2206 ehci_soft_qtd_t * 2207 ehci_alloc_sqtd(ehci_softc_t *sc) 2208 { 2209 ehci_soft_qtd_t *sqtd; 2210 usbd_status err; 2211 int i, offs; 2212 usb_dma_t dma; 2213 int s; 2214 2215 if (sc->sc_freeqtds == NULL) { 2216 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2217 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2218 EHCI_PAGE_SIZE, &dma); 2219 #ifdef EHCI_DEBUG 2220 if (err) 2221 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2222 #endif 2223 if (err) 2224 return (NULL); 2225 s = splusb(); 2226 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2227 offs = i * EHCI_SQTD_SIZE; 2228 sqtd = KERNADDR(&dma, offs); 2229 sqtd->physaddr = DMAADDR(&dma, offs); 2230 sqtd->nextqtd = sc->sc_freeqtds; 2231 sc->sc_freeqtds = sqtd; 2232 } 2233 splx(s); 2234 } 2235 2236 s = splusb(); 2237 sqtd = sc->sc_freeqtds; 2238 sc->sc_freeqtds = sqtd->nextqtd; 2239 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2240 sqtd->nextqtd = NULL; 2241 sqtd->xfer = NULL; 2242 splx(s); 2243 2244 return (sqtd); 2245 } 2246 2247 void 2248 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2249 { 2250 int s; 2251 2252 s = splusb(); 2253 sqtd->nextqtd = sc->sc_freeqtds; 2254 sc->sc_freeqtds = sqtd; 2255 splx(s); 2256 } 2257 2258 usbd_status 2259 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2260 int alen, int rd, usbd_xfer_handle xfer, 2261 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2262 { 2263 ehci_soft_qtd_t *next, *cur; 2264 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2265 u_int32_t qtdstatus; 2266 int len, curlen, mps; 2267 int i, tog; 2268 usb_dma_t *dma = &xfer->dmabuf; 2269 u_int16_t flags = xfer->flags; 2270 2271 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2272 2273 len = alen; 2274 dataphys = DMAADDR(dma, 0); 2275 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2276 #if 0 2277 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2278 epipe->nexttoggle); 2279 #endif 2280 qtdstatus = EHCI_QTD_ACTIVE | 2281 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2282 EHCI_QTD_SET_CERR(3) 2283 /* IOC set below */ 2284 /* BYTES set below */ 2285 ; 2286 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2287 tog = epipe->nexttoggle; 2288 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2289 2290 cur = ehci_alloc_sqtd(sc); 2291 *sp = cur; 2292 if (cur == NULL) 2293 goto nomem; 2294 for (;;) { 2295 dataphyspage = EHCI_PAGE(dataphys); 2296 /* The EHCI hardware can handle at most 5 pages. */ 2297 if (dataphyslastpage - dataphyspage < 2298 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2299 /* we can handle it in this QTD */ 2300 curlen = len; 2301 } else { 2302 /* must use multiple TDs, fill as much as possible. */ 2303 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2304 EHCI_PAGE_OFFSET(dataphys); 2305 #ifdef DIAGNOSTIC 2306 if (curlen > len) { 2307 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2308 "len=0x%x offs=0x%x\n", curlen, len, 2309 EHCI_PAGE_OFFSET(dataphys)); 2310 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2311 dataphyslastpage, dataphyspage, 2312 dataphys); 2313 curlen = len; 2314 } 2315 #endif 2316 /* the length must be a multiple of the max size */ 2317 curlen -= curlen % mps; 2318 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2319 "curlen=%d\n", curlen)); 2320 #ifdef DIAGNOSTIC 2321 if (curlen == 0) 2322 panic("ehci_alloc_std: curlen == 0"); 2323 #endif 2324 } 2325 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2326 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2327 dataphys, dataphyslastpage, 2328 len, curlen)); 2329 len -= curlen; 2330 2331 /* 2332 * Allocate another transfer if there's more data left, 2333 * or if force last short transfer flag is set and we're 2334 * allocating a multiple of the max packet size. 2335 */ 2336 if (len != 0 || 2337 ((curlen % mps) == 0 && !rd && curlen != 0 && 2338 (flags & USBD_FORCE_SHORT_XFER))) { 2339 next = ehci_alloc_sqtd(sc); 2340 if (next == NULL) 2341 goto nomem; 2342 nextphys = htole32(next->physaddr); 2343 } else { 2344 next = NULL; 2345 nextphys = EHCI_NULL; 2346 } 2347 2348 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2349 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2350 if (i != 0) /* use offset only in first buffer */ 2351 a = EHCI_PAGE(a); 2352 cur->qtd.qtd_buffer[i] = htole32(a); 2353 cur->qtd.qtd_buffer_hi[i] = 0; 2354 #ifdef DIAGNOSTIC 2355 if (i >= EHCI_QTD_NBUFFERS) { 2356 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2357 goto nomem; 2358 } 2359 #endif 2360 } 2361 cur->nextqtd = next; 2362 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2363 cur->qtd.qtd_status = 2364 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2365 cur->xfer = xfer; 2366 cur->len = curlen; 2367 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2368 dataphys, dataphys + curlen)); 2369 /* adjust the toggle based on the number of packets in this 2370 qtd */ 2371 if (((curlen + mps - 1) / mps) & 1) { 2372 tog ^= 1; 2373 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2374 } 2375 if (next == NULL) 2376 break; 2377 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2378 dataphys += curlen; 2379 cur = next; 2380 } 2381 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2382 *ep = cur; 2383 epipe->nexttoggle = tog; 2384 2385 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2386 *sp, *ep)); 2387 2388 return (USBD_NORMAL_COMPLETION); 2389 2390 nomem: 2391 /* XXX free chain */ 2392 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2393 return (USBD_NOMEM); 2394 } 2395 2396 Static void 2397 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2398 ehci_soft_qtd_t *sqtdend) 2399 { 2400 ehci_soft_qtd_t *p; 2401 int i; 2402 2403 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2404 sqtd, sqtdend)); 2405 2406 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2407 p = sqtd->nextqtd; 2408 ehci_free_sqtd(sc, sqtd); 2409 } 2410 } 2411 2412 /****************/ 2413 2414 /* 2415 * Close a reqular pipe. 2416 * Assumes that there are no pending transactions. 2417 */ 2418 void 2419 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2420 { 2421 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2422 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2423 ehci_soft_qh_t *sqh = epipe->sqh; 2424 int s; 2425 2426 s = splusb(); 2427 ehci_rem_qh(sc, sqh, head); 2428 splx(s); 2429 ehci_free_sqh(sc, epipe->sqh); 2430 } 2431 2432 /* 2433 * Abort a device request. 2434 * If this routine is called at splusb() it guarantees that the request 2435 * will be removed from the hardware scheduling and that the callback 2436 * for it will be called with USBD_CANCELLED status. 2437 * It's impossible to guarantee that the requested transfer will not 2438 * have happened since the hardware runs concurrently. 2439 * If the transaction has already happened we rely on the ordinary 2440 * interrupt processing to process it. 2441 * XXX This is most probably wrong. 2442 */ 2443 void 2444 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2445 { 2446 #define exfer EXFER(xfer) 2447 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2448 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2449 ehci_soft_qh_t *sqh = epipe->sqh; 2450 ehci_soft_qtd_t *sqtd; 2451 ehci_physaddr_t cur; 2452 u_int32_t qhstatus; 2453 int s; 2454 int hit; 2455 int wake; 2456 2457 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2458 2459 if (sc->sc_dying) { 2460 /* If we're dying, just do the software part. */ 2461 s = splusb(); 2462 xfer->status = status; /* make software ignore it */ 2463 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2464 usb_transfer_complete(xfer); 2465 splx(s); 2466 return; 2467 } 2468 2469 if (xfer->device->bus->intr_context || !curproc) 2470 panic("ehci_abort_xfer: not in process context"); 2471 2472 /* 2473 * If an abort is already in progress then just wait for it to 2474 * complete and return. 2475 */ 2476 if (xfer->hcflags & UXFER_ABORTING) { 2477 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2478 #ifdef DIAGNOSTIC 2479 if (status == USBD_TIMEOUT) 2480 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2481 #endif 2482 /* Override the status which might be USBD_TIMEOUT. */ 2483 xfer->status = status; 2484 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2485 xfer->hcflags |= UXFER_ABORTWAIT; 2486 while (xfer->hcflags & UXFER_ABORTING) 2487 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2488 return; 2489 } 2490 xfer->hcflags |= UXFER_ABORTING; 2491 2492 /* 2493 * Step 1: Make interrupt routine and hardware ignore xfer. 2494 */ 2495 s = splusb(); 2496 xfer->status = status; /* make software ignore it */ 2497 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2498 qhstatus = sqh->qh.qh_qtd.qtd_status; 2499 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2500 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2501 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2502 if (sqtd == exfer->sqtdend) 2503 break; 2504 } 2505 splx(s); 2506 2507 /* 2508 * Step 2: Wait until we know hardware has finished any possible 2509 * use of the xfer. Also make sure the soft interrupt routine 2510 * has run. 2511 */ 2512 ehci_sync_hc(sc); 2513 s = splusb(); 2514 #ifdef USB_USE_SOFTINTR 2515 sc->sc_softwake = 1; 2516 #endif /* USB_USE_SOFTINTR */ 2517 usb_schedsoftintr(&sc->sc_bus); 2518 #ifdef USB_USE_SOFTINTR 2519 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2520 #endif /* USB_USE_SOFTINTR */ 2521 splx(s); 2522 2523 /* 2524 * Step 3: Remove any vestiges of the xfer from the hardware. 2525 * The complication here is that the hardware may have executed 2526 * beyond the xfer we're trying to abort. So as we're scanning 2527 * the TDs of this xfer we check if the hardware points to 2528 * any of them. 2529 */ 2530 s = splusb(); /* XXX why? */ 2531 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2532 hit = 0; 2533 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2534 hit |= cur == sqtd->physaddr; 2535 if (sqtd == exfer->sqtdend) 2536 break; 2537 } 2538 sqtd = sqtd->nextqtd; 2539 /* Zap curqtd register if hardware pointed inside the xfer. */ 2540 if (hit && sqtd != NULL) { 2541 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2542 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2543 sqh->qh.qh_qtd.qtd_status = qhstatus; 2544 } else { 2545 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2546 } 2547 2548 /* 2549 * Step 4: Execute callback. 2550 */ 2551 #ifdef DIAGNOSTIC 2552 exfer->isdone = 1; 2553 #endif 2554 wake = xfer->hcflags & UXFER_ABORTWAIT; 2555 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2556 usb_transfer_complete(xfer); 2557 if (wake) 2558 wakeup(&xfer->hcflags); 2559 2560 splx(s); 2561 #undef exfer 2562 } 2563 2564 void 2565 ehci_timeout(void *addr) 2566 { 2567 struct ehci_xfer *exfer = addr; 2568 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2569 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2570 2571 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2572 #ifdef USB_DEBUG 2573 if (ehcidebug > 1) 2574 usbd_dump_pipe(exfer->xfer.pipe); 2575 #endif 2576 2577 if (sc->sc_dying) { 2578 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2579 return; 2580 } 2581 2582 /* Execute the abort in a process context. */ 2583 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2584 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2585 } 2586 2587 void 2588 ehci_timeout_task(void *addr) 2589 { 2590 usbd_xfer_handle xfer = addr; 2591 int s; 2592 2593 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2594 2595 s = splusb(); 2596 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2597 splx(s); 2598 } 2599 2600 /************************/ 2601 2602 Static usbd_status 2603 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2604 { 2605 usbd_status err; 2606 2607 /* Insert last in queue. */ 2608 err = usb_insert_transfer(xfer); 2609 if (err) 2610 return (err); 2611 2612 /* Pipe isn't running, start first */ 2613 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2614 } 2615 2616 Static usbd_status 2617 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2618 { 2619 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2620 usbd_status err; 2621 2622 if (sc->sc_dying) 2623 return (USBD_IOERROR); 2624 2625 #ifdef DIAGNOSTIC 2626 if (!(xfer->rqflags & URQ_REQUEST)) { 2627 /* XXX panic */ 2628 printf("ehci_device_ctrl_transfer: not a request\n"); 2629 return (USBD_INVAL); 2630 } 2631 #endif 2632 2633 err = ehci_device_request(xfer); 2634 if (err) 2635 return (err); 2636 2637 if (sc->sc_bus.use_polling) 2638 ehci_waitintr(sc, xfer); 2639 return (USBD_IN_PROGRESS); 2640 } 2641 2642 void 2643 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2644 { 2645 struct ehci_xfer *ex = EXFER(xfer); 2646 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2647 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2648 2649 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2650 2651 #ifdef DIAGNOSTIC 2652 if (!(xfer->rqflags & URQ_REQUEST)) { 2653 panic("ehci_ctrl_done: not a request"); 2654 } 2655 #endif 2656 2657 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2658 ehci_del_intr_list(ex); /* remove from active list */ 2659 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2660 } 2661 2662 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2663 } 2664 2665 /* Abort a device control request. */ 2666 Static void 2667 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2668 { 2669 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2670 ehci_abort_xfer(xfer, USBD_CANCELLED); 2671 } 2672 2673 /* Close a device control pipe. */ 2674 Static void 2675 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2676 { 2677 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2678 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2679 2680 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2681 ehci_close_pipe(pipe, sc->sc_async_head); 2682 } 2683 2684 usbd_status 2685 ehci_device_request(usbd_xfer_handle xfer) 2686 { 2687 #define exfer EXFER(xfer) 2688 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2689 usb_device_request_t *req = &xfer->request; 2690 usbd_device_handle dev = epipe->pipe.device; 2691 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2692 int addr = dev->address; 2693 ehci_soft_qtd_t *setup, *stat, *next; 2694 ehci_soft_qh_t *sqh; 2695 int isread; 2696 int len; 2697 usbd_status err; 2698 int s; 2699 2700 isread = req->bmRequestType & UT_READ; 2701 len = UGETW(req->wLength); 2702 2703 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2704 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2705 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2706 UGETW(req->wIndex), len, addr, 2707 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2708 2709 setup = ehci_alloc_sqtd(sc); 2710 if (setup == NULL) { 2711 err = USBD_NOMEM; 2712 goto bad1; 2713 } 2714 stat = ehci_alloc_sqtd(sc); 2715 if (stat == NULL) { 2716 err = USBD_NOMEM; 2717 goto bad2; 2718 } 2719 2720 sqh = epipe->sqh; 2721 epipe->u.ctl.length = len; 2722 2723 /* Update device address and length since they may have changed 2724 during the setup of the control pipe in usbd_new_device(). */ 2725 /* XXX This only needs to be done once, but it's too early in open. */ 2726 /* XXXX Should not touch ED here! */ 2727 sqh->qh.qh_endp = 2728 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2729 htole32( 2730 EHCI_QH_SET_ADDR(addr) | 2731 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2732 ); 2733 2734 /* Set up data transaction */ 2735 if (len != 0) { 2736 ehci_soft_qtd_t *end; 2737 2738 /* Start toggle at 1. */ 2739 epipe->nexttoggle = 1; 2740 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2741 &next, &end); 2742 if (err) 2743 goto bad3; 2744 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2745 end->nextqtd = stat; 2746 end->qtd.qtd_next = 2747 end->qtd.qtd_altnext = htole32(stat->physaddr); 2748 } else { 2749 next = stat; 2750 } 2751 2752 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2753 2754 /* Clear toggle */ 2755 setup->qtd.qtd_status = htole32( 2756 EHCI_QTD_ACTIVE | 2757 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2758 EHCI_QTD_SET_CERR(3) | 2759 EHCI_QTD_SET_TOGGLE(0) | 2760 EHCI_QTD_SET_BYTES(sizeof *req) 2761 ); 2762 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2763 setup->qtd.qtd_buffer_hi[0] = 0; 2764 setup->nextqtd = next; 2765 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2766 setup->xfer = xfer; 2767 setup->len = sizeof *req; 2768 2769 stat->qtd.qtd_status = htole32( 2770 EHCI_QTD_ACTIVE | 2771 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2772 EHCI_QTD_SET_CERR(3) | 2773 EHCI_QTD_SET_TOGGLE(1) | 2774 EHCI_QTD_IOC 2775 ); 2776 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2777 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2778 stat->nextqtd = NULL; 2779 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2780 stat->xfer = xfer; 2781 stat->len = 0; 2782 2783 #ifdef EHCI_DEBUG 2784 if (ehcidebug > 5) { 2785 DPRINTF(("ehci_device_request:\n")); 2786 ehci_dump_sqh(sqh); 2787 ehci_dump_sqtds(setup); 2788 } 2789 #endif 2790 2791 exfer->sqtdstart = setup; 2792 exfer->sqtdend = stat; 2793 #ifdef DIAGNOSTIC 2794 if (!exfer->isdone) { 2795 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2796 } 2797 exfer->isdone = 0; 2798 #endif 2799 2800 /* Insert qTD in QH list. */ 2801 s = splusb(); 2802 ehci_set_qh_qtd(sqh, setup); 2803 if (xfer->timeout && !sc->sc_bus.use_polling) { 2804 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2805 ehci_timeout, xfer); 2806 } 2807 ehci_add_intr_list(sc, exfer); 2808 xfer->status = USBD_IN_PROGRESS; 2809 splx(s); 2810 2811 #ifdef EHCI_DEBUG 2812 if (ehcidebug > 10) { 2813 DPRINTF(("ehci_device_request: status=%x\n", 2814 EOREAD4(sc, EHCI_USBSTS))); 2815 delay(10000); 2816 ehci_dump_regs(sc); 2817 ehci_dump_sqh(sc->sc_async_head); 2818 ehci_dump_sqh(sqh); 2819 ehci_dump_sqtds(setup); 2820 } 2821 #endif 2822 2823 return (USBD_NORMAL_COMPLETION); 2824 2825 bad3: 2826 ehci_free_sqtd(sc, stat); 2827 bad2: 2828 ehci_free_sqtd(sc, setup); 2829 bad1: 2830 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2831 xfer->status = err; 2832 usb_transfer_complete(xfer); 2833 return (err); 2834 #undef exfer 2835 } 2836 2837 /************************/ 2838 2839 Static usbd_status 2840 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2841 { 2842 usbd_status err; 2843 2844 /* Insert last in queue. */ 2845 err = usb_insert_transfer(xfer); 2846 if (err) 2847 return (err); 2848 2849 /* Pipe isn't running, start first */ 2850 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2851 } 2852 2853 usbd_status 2854 ehci_device_bulk_start(usbd_xfer_handle xfer) 2855 { 2856 #define exfer EXFER(xfer) 2857 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2858 usbd_device_handle dev = epipe->pipe.device; 2859 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2860 ehci_soft_qtd_t *data, *dataend; 2861 ehci_soft_qh_t *sqh; 2862 usbd_status err; 2863 int len, isread, endpt; 2864 int s; 2865 2866 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2867 xfer, xfer->length, xfer->flags)); 2868 2869 if (sc->sc_dying) 2870 return (USBD_IOERROR); 2871 2872 #ifdef DIAGNOSTIC 2873 if (xfer->rqflags & URQ_REQUEST) 2874 panic("ehci_device_bulk_start: a request"); 2875 #endif 2876 2877 len = xfer->length; 2878 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2879 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2880 sqh = epipe->sqh; 2881 2882 epipe->u.bulk.length = len; 2883 2884 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2885 &dataend); 2886 if (err) { 2887 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2888 xfer->status = err; 2889 usb_transfer_complete(xfer); 2890 return (err); 2891 } 2892 2893 #ifdef EHCI_DEBUG 2894 if (ehcidebug > 5) { 2895 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2896 ehci_dump_sqh(sqh); 2897 ehci_dump_sqtds(data); 2898 } 2899 #endif 2900 2901 /* Set up interrupt info. */ 2902 exfer->sqtdstart = data; 2903 exfer->sqtdend = dataend; 2904 #ifdef DIAGNOSTIC 2905 if (!exfer->isdone) { 2906 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2907 } 2908 exfer->isdone = 0; 2909 #endif 2910 2911 s = splusb(); 2912 ehci_set_qh_qtd(sqh, data); 2913 if (xfer->timeout && !sc->sc_bus.use_polling) { 2914 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2915 ehci_timeout, xfer); 2916 } 2917 ehci_add_intr_list(sc, exfer); 2918 xfer->status = USBD_IN_PROGRESS; 2919 splx(s); 2920 2921 #ifdef EHCI_DEBUG 2922 if (ehcidebug > 10) { 2923 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2924 delay(10000); 2925 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2926 ehci_dump_regs(sc); 2927 #if 0 2928 printf("async_head:\n"); 2929 ehci_dump_sqh(sc->sc_async_head); 2930 #endif 2931 printf("sqh:\n"); 2932 ehci_dump_sqh(sqh); 2933 ehci_dump_sqtds(data); 2934 } 2935 #endif 2936 2937 if (sc->sc_bus.use_polling) 2938 ehci_waitintr(sc, xfer); 2939 2940 return (USBD_IN_PROGRESS); 2941 #undef exfer 2942 } 2943 2944 Static void 2945 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2946 { 2947 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2948 ehci_abort_xfer(xfer, USBD_CANCELLED); 2949 } 2950 2951 /* 2952 * Close a device bulk pipe. 2953 */ 2954 Static void 2955 ehci_device_bulk_close(usbd_pipe_handle pipe) 2956 { 2957 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2958 2959 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2960 ehci_close_pipe(pipe, sc->sc_async_head); 2961 } 2962 2963 void 2964 ehci_device_bulk_done(usbd_xfer_handle xfer) 2965 { 2966 struct ehci_xfer *ex = EXFER(xfer); 2967 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2968 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2969 2970 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2971 xfer, xfer->actlen)); 2972 2973 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2974 ehci_del_intr_list(ex); /* remove from active list */ 2975 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2976 } 2977 2978 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2979 } 2980 2981 /************************/ 2982 2983 Static usbd_status 2984 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2985 { 2986 struct ehci_soft_islot *isp; 2987 int islot, lev; 2988 2989 /* Find a poll rate that is large enough. */ 2990 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2991 if (EHCI_ILEV_IVAL(lev) <= ival) 2992 break; 2993 2994 /* Pick an interrupt slot at the right level. */ 2995 /* XXX could do better than picking at random */ 2996 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2997 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2998 2999 sqh->islot = islot; 3000 isp = &sc->sc_islots[islot]; 3001 ehci_add_qh(sqh, isp->sqh); 3002 3003 return (USBD_NORMAL_COMPLETION); 3004 } 3005 3006 Static usbd_status 3007 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3008 { 3009 usbd_status err; 3010 3011 /* Insert last in queue. */ 3012 err = usb_insert_transfer(xfer); 3013 if (err) 3014 return (err); 3015 3016 /* 3017 * Pipe isn't running (otherwise err would be USBD_INPROG), 3018 * so start it first. 3019 */ 3020 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3021 } 3022 3023 Static usbd_status 3024 ehci_device_intr_start(usbd_xfer_handle xfer) 3025 { 3026 #define exfer EXFER(xfer) 3027 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3028 usbd_device_handle dev = xfer->pipe->device; 3029 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3030 ehci_soft_qtd_t *data, *dataend; 3031 ehci_soft_qh_t *sqh; 3032 usbd_status err; 3033 int len, isread, endpt; 3034 int s; 3035 3036 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3037 xfer, xfer->length, xfer->flags)); 3038 3039 if (sc->sc_dying) 3040 return (USBD_IOERROR); 3041 3042 #ifdef DIAGNOSTIC 3043 if (xfer->rqflags & URQ_REQUEST) 3044 panic("ehci_device_intr_start: a request"); 3045 #endif 3046 3047 len = xfer->length; 3048 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3049 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3050 sqh = epipe->sqh; 3051 3052 epipe->u.intr.length = len; 3053 3054 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3055 &dataend); 3056 if (err) { 3057 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3058 xfer->status = err; 3059 usb_transfer_complete(xfer); 3060 return (err); 3061 } 3062 3063 #ifdef EHCI_DEBUG 3064 if (ehcidebug > 5) { 3065 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3066 ehci_dump_sqh(sqh); 3067 ehci_dump_sqtds(data); 3068 } 3069 #endif 3070 3071 /* Set up interrupt info. */ 3072 exfer->sqtdstart = data; 3073 exfer->sqtdend = dataend; 3074 #ifdef DIAGNOSTIC 3075 if (!exfer->isdone) { 3076 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3077 } 3078 exfer->isdone = 0; 3079 #endif 3080 3081 s = splusb(); 3082 ehci_set_qh_qtd(sqh, data); 3083 if (xfer->timeout && !sc->sc_bus.use_polling) { 3084 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3085 ehci_timeout, xfer); 3086 } 3087 ehci_add_intr_list(sc, exfer); 3088 xfer->status = USBD_IN_PROGRESS; 3089 splx(s); 3090 3091 #ifdef EHCI_DEBUG 3092 if (ehcidebug > 10) { 3093 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3094 delay(10000); 3095 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3096 ehci_dump_regs(sc); 3097 printf("sqh:\n"); 3098 ehci_dump_sqh(sqh); 3099 ehci_dump_sqtds(data); 3100 } 3101 #endif 3102 3103 if (sc->sc_bus.use_polling) 3104 ehci_waitintr(sc, xfer); 3105 3106 return (USBD_IN_PROGRESS); 3107 #undef exfer 3108 } 3109 3110 Static void 3111 ehci_device_intr_abort(usbd_xfer_handle xfer) 3112 { 3113 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3114 if (xfer->pipe->intrxfer == xfer) { 3115 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3116 xfer->pipe->intrxfer = NULL; 3117 } 3118 ehci_abort_xfer(xfer, USBD_CANCELLED); 3119 } 3120 3121 Static void 3122 ehci_device_intr_close(usbd_pipe_handle pipe) 3123 { 3124 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3125 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3126 struct ehci_soft_islot *isp; 3127 3128 isp = &sc->sc_islots[epipe->sqh->islot]; 3129 ehci_close_pipe(pipe, isp->sqh); 3130 } 3131 3132 Static void 3133 ehci_device_intr_done(usbd_xfer_handle xfer) 3134 { 3135 #define exfer EXFER(xfer) 3136 struct ehci_xfer *ex = EXFER(xfer); 3137 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3138 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3139 ehci_soft_qtd_t *data, *dataend; 3140 ehci_soft_qh_t *sqh; 3141 usbd_status err; 3142 int len, isread, endpt, s; 3143 3144 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3145 xfer, xfer->actlen)); 3146 3147 if (xfer->pipe->repeat) { 3148 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3149 3150 len = epipe->u.intr.length; 3151 xfer->length = len; 3152 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3153 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3154 sqh = epipe->sqh; 3155 3156 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3157 &data, &dataend); 3158 if (err) { 3159 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3160 xfer->status = err; 3161 return; 3162 } 3163 3164 /* Set up interrupt info. */ 3165 exfer->sqtdstart = data; 3166 exfer->sqtdend = dataend; 3167 #ifdef DIAGNOSTIC 3168 if (!exfer->isdone) { 3169 printf("ehci_device_intr_done: not done, ex=%p\n", 3170 exfer); 3171 } 3172 exfer->isdone = 0; 3173 #endif 3174 3175 s = splusb(); 3176 ehci_set_qh_qtd(sqh, data); 3177 if (xfer->timeout && !sc->sc_bus.use_polling) { 3178 usb_callout(xfer->timeout_handle, 3179 mstohz(xfer->timeout), ehci_timeout, xfer); 3180 } 3181 splx(s); 3182 3183 xfer->status = USBD_IN_PROGRESS; 3184 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3185 ehci_del_intr_list(ex); /* remove from active list */ 3186 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3187 } 3188 #undef exfer 3189 } 3190 3191 /************************/ 3192 3193 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3194 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3195 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3196 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3197 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3198
Indexes created Tue Sep 23 22:09:46 GMT 2025