ehci.c revision 1.105
1 /* $NetBSD: ehci.c,v 1.105 2005/07/18 11:08:00 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.105 2005/07/18 11:08:00 augustss Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 117 } ctl; 118 /* Interrupt pipe */ 119 struct { 120 u_int length; 121 } intr; 122 /* Bulk pipe */ 123 struct { 124 u_int length; 125 } bulk; 126 /* Iso pipe */ 127 /* XXX */ 128 } u; 129 }; 130 131 Static void ehci_shutdown(void *); 132 Static void ehci_power(int, void *); 133 134 Static usbd_status ehci_open(usbd_pipe_handle); 135 Static void ehci_poll(struct usbd_bus *); 136 Static void ehci_softintr(void *); 137 Static int ehci_intr1(ehci_softc_t *); 138 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 139 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 140 Static void ehci_idone(struct ehci_xfer *); 141 Static void ehci_timeout(void *); 142 Static void ehci_timeout_task(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 Static void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t vers, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 vers = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 vers >> 8, vers & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 370 if (EHCI_HCC_64BIT(cparams)) { 371 /* MUST clear segment register if 64 bit capable. */ 372 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 373 } 374 375 sc->sc_bus.usbrev = USBREV_2_0; 376 377 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 378 USB_MEM_RESERVE); 379 380 /* Reset the controller */ 381 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 382 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 383 usb_delay_ms(&sc->sc_bus, 1); 384 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 385 for (i = 0; i < 100; i++) { 386 usb_delay_ms(&sc->sc_bus, 1); 387 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 388 if (!hcr) 389 break; 390 } 391 if (hcr) { 392 aprint_error("%s: reset timeout\n", 393 USBDEVNAME(sc->sc_bus.bdev)); 394 return (USBD_IOERROR); 395 } 396 397 /* XXX need proper intr scheduling */ 398 sc->sc_rand = 96; 399 400 /* frame list size at default, read back what we got and use that */ 401 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 402 case 0: sc->sc_flsize = 1024; break; 403 case 1: sc->sc_flsize = 512; break; 404 case 2: sc->sc_flsize = 256; break; 405 case 3: return (USBD_IOERROR); 406 } 407 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 408 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 409 if (err) 410 return (err); 411 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 412 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 413 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 414 415 /* Set up the bus struct. */ 416 sc->sc_bus.methods = &ehci_bus_methods; 417 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 418 419 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 420 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 421 422 sc->sc_eintrs = EHCI_NORMAL_INTRS; 423 424 /* 425 * Allocate the interrupt dummy QHs. These are arranged to give poll 426 * intervals that are powers of 2 times 1ms. 427 */ 428 for (i = 0; i < EHCI_INTRQHS; i++) { 429 sqh = ehci_alloc_sqh(sc); 430 if (sqh == NULL) { 431 err = USBD_NOMEM; 432 goto bad1; 433 } 434 sc->sc_islots[i].sqh = sqh; 435 } 436 for (i = 0; i < EHCI_INTRQHS; i++) { 437 sqh = sc->sc_islots[i].sqh; 438 if (i == 0) { 439 /* The last (1ms) QH terminates. */ 440 sqh->qh.qh_link = EHCI_NULL; 441 sqh->next = NULL; 442 } else { 443 /* Otherwise the next QH has half the poll interval */ 444 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 445 sqh->qh.qh_link = htole32(sqh->next->physaddr | 446 EHCI_LINK_QH); 447 } 448 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 449 sqh->qh.qh_curqtd = EHCI_NULL; 450 sqh->next = NULL; 451 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 452 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 453 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 454 sqh->sqtd = NULL; 455 } 456 /* Point the frame list at the last level (128ms). */ 457 for (i = 0; i < sc->sc_flsize; i++) { 458 int j; 459 460 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 461 revbits[i & (EHCI_MAX_POLLRATE-1)]; 462 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 463 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 464 i)].sqh->physaddr); 465 } 466 467 /* Allocate dummy QH that starts the async list. */ 468 sqh = ehci_alloc_sqh(sc); 469 if (sqh == NULL) { 470 err = USBD_NOMEM; 471 goto bad1; 472 } 473 /* Fill the QH */ 474 sqh->qh.qh_endp = 475 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 476 sqh->qh.qh_link = 477 htole32(sqh->physaddr | EHCI_LINK_QH); 478 sqh->qh.qh_curqtd = EHCI_NULL; 479 sqh->next = NULL; 480 /* Fill the overlay qTD */ 481 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 482 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 483 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 484 sqh->sqtd = NULL; 485 #ifdef EHCI_DEBUG 486 if (ehcidebug) { 487 ehci_dump_sqh(sqh); 488 } 489 #endif 490 491 /* Point to async list */ 492 sc->sc_async_head = sqh; 493 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 494 495 usb_callout_init(sc->sc_tmo_pcd); 496 497 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 498 499 /* Turn on controller */ 500 EOWRITE4(sc, EHCI_USBCMD, 501 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 502 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 503 EHCI_CMD_ASE | 504 EHCI_CMD_PSE | 505 EHCI_CMD_RS); 506 507 /* Take over port ownership */ 508 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 509 510 for (i = 0; i < 100; i++) { 511 usb_delay_ms(&sc->sc_bus, 1); 512 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 513 if (!hcr) 514 break; 515 } 516 if (hcr) { 517 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 518 return (USBD_IOERROR); 519 } 520 521 /* Enable interrupts */ 522 DPRINTFN(1,("ehci_init: enabling\n")); 523 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 524 525 return (USBD_NORMAL_COMPLETION); 526 527 #if 0 528 bad2: 529 ehci_free_sqh(sc, sc->sc_async_head); 530 #endif 531 bad1: 532 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 533 return (err); 534 } 535 536 int 537 ehci_intr(void *v) 538 { 539 ehci_softc_t *sc = v; 540 541 if (sc == NULL || sc->sc_dying) 542 return (0); 543 544 /* If we get an interrupt while polling, then just ignore it. */ 545 if (sc->sc_bus.use_polling) { 546 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 547 548 if (intrs) 549 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 550 #ifdef DIAGNOSTIC 551 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 552 #endif 553 return (0); 554 } 555 556 return (ehci_intr1(sc)); 557 } 558 559 Static int 560 ehci_intr1(ehci_softc_t *sc) 561 { 562 u_int32_t intrs, eintrs; 563 564 DPRINTFN(20,("ehci_intr1: enter\n")); 565 566 /* In case the interrupt occurs before initialization has completed. */ 567 if (sc == NULL) { 568 #ifdef DIAGNOSTIC 569 printf("ehci_intr1: sc == NULL\n"); 570 #endif 571 return (0); 572 } 573 574 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 575 if (!intrs) 576 return (0); 577 578 eintrs = intrs & sc->sc_eintrs; 579 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 580 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 581 (u_int)eintrs)); 582 if (!eintrs) 583 return (0); 584 585 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 586 sc->sc_bus.intr_context++; 587 sc->sc_bus.no_intrs++; 588 if (eintrs & EHCI_STS_IAA) { 589 DPRINTF(("ehci_intr1: door bell\n")); 590 wakeup(&sc->sc_async_head); 591 eintrs &= ~EHCI_STS_IAA; 592 } 593 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 594 DPRINTFN(5,("ehci_intr1: %s %s\n", 595 eintrs & EHCI_STS_INT ? "INT" : "", 596 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 597 usb_schedsoftintr(&sc->sc_bus); 598 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 599 } 600 if (eintrs & EHCI_STS_HSE) { 601 printf("%s: unrecoverable error, controller halted\n", 602 USBDEVNAME(sc->sc_bus.bdev)); 603 /* XXX what else */ 604 } 605 if (eintrs & EHCI_STS_PCD) { 606 ehci_pcd(sc, sc->sc_intrxfer); 607 /* 608 * Disable PCD interrupt for now, because it will be 609 * on until the port has been reset. 610 */ 611 ehci_pcd_able(sc, 0); 612 /* Do not allow RHSC interrupts > 1 per second */ 613 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 614 eintrs &= ~EHCI_STS_PCD; 615 } 616 617 sc->sc_bus.intr_context--; 618 619 if (eintrs != 0) { 620 /* Block unprocessed interrupts. */ 621 sc->sc_eintrs &= ~eintrs; 622 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 623 printf("%s: blocking intrs 0x%x\n", 624 USBDEVNAME(sc->sc_bus.bdev), eintrs); 625 } 626 627 return (1); 628 } 629 630 void 631 ehci_pcd_able(ehci_softc_t *sc, int on) 632 { 633 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 634 if (on) 635 sc->sc_eintrs |= EHCI_STS_PCD; 636 else 637 sc->sc_eintrs &= ~EHCI_STS_PCD; 638 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 639 } 640 641 void 642 ehci_pcd_enable(void *v_sc) 643 { 644 ehci_softc_t *sc = v_sc; 645 646 ehci_pcd_able(sc, 1); 647 } 648 649 void 650 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 651 { 652 usbd_pipe_handle pipe; 653 u_char *p; 654 int i, m; 655 656 if (xfer == NULL) { 657 /* Just ignore the change. */ 658 return; 659 } 660 661 pipe = xfer->pipe; 662 663 p = KERNADDR(&xfer->dmabuf, 0); 664 m = min(sc->sc_noport, xfer->length * 8 - 1); 665 memset(p, 0, xfer->length); 666 for (i = 1; i <= m; i++) { 667 /* Pick out CHANGE bits from the status reg. */ 668 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 669 p[i/8] |= 1 << (i%8); 670 } 671 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 672 xfer->actlen = xfer->length; 673 xfer->status = USBD_NORMAL_COMPLETION; 674 675 usb_transfer_complete(xfer); 676 } 677 678 void 679 ehci_softintr(void *v) 680 { 681 ehci_softc_t *sc = v; 682 struct ehci_xfer *ex, *nextex; 683 684 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 685 sc->sc_bus.intr_context)); 686 687 sc->sc_bus.intr_context++; 688 689 /* 690 * The only explanation I can think of for why EHCI is as brain dead 691 * as UHCI interrupt-wise is that Intel was involved in both. 692 * An interrupt just tells us that something is done, we have no 693 * clue what, so we need to scan through all active transfers. :-( 694 */ 695 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 696 nextex = LIST_NEXT(ex, inext); 697 ehci_check_intr(sc, ex); 698 } 699 700 #ifdef USB_USE_SOFTINTR 701 if (sc->sc_softwake) { 702 sc->sc_softwake = 0; 703 wakeup(&sc->sc_softwake); 704 } 705 #endif /* USB_USE_SOFTINTR */ 706 707 sc->sc_bus.intr_context--; 708 } 709 710 /* Check for an interrupt. */ 711 void 712 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 713 { 714 ehci_soft_qtd_t *sqtd, *lsqtd; 715 u_int32_t status; 716 717 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 718 719 if (ex->sqtdstart == NULL) { 720 printf("ehci_check_intr: sqtdstart=NULL\n"); 721 return; 722 } 723 lsqtd = ex->sqtdend; 724 #ifdef DIAGNOSTIC 725 if (lsqtd == NULL) { 726 printf("ehci_check_intr: lsqtd==0\n"); 727 return; 728 } 729 #endif 730 /* 731 * If the last TD is still active we need to check whether there 732 * is a an error somewhere in the middle, or whether there was a 733 * short packet (SPD and not ACTIVE). 734 */ 735 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 736 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 737 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 738 status = le32toh(sqtd->qtd.qtd_status); 739 /* If there's an active QTD the xfer isn't done. */ 740 if (status & EHCI_QTD_ACTIVE) 741 break; 742 /* Any kind of error makes the xfer done. */ 743 if (status & EHCI_QTD_HALTED) 744 goto done; 745 /* We want short packets, and it is short: it's done */ 746 if (EHCI_QTD_GET_BYTES(status) != 0) 747 goto done; 748 } 749 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 750 ex, ex->sqtdstart)); 751 return; 752 } 753 done: 754 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 755 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 756 ehci_idone(ex); 757 } 758 759 void 760 ehci_idone(struct ehci_xfer *ex) 761 { 762 usbd_xfer_handle xfer = &ex->xfer; 763 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 764 ehci_soft_qtd_t *sqtd, *lsqtd; 765 u_int32_t status = 0, nstatus = 0; 766 int actlen; 767 uint pkts_left; 768 769 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 770 #ifdef DIAGNOSTIC 771 { 772 int s = splhigh(); 773 if (ex->isdone) { 774 splx(s); 775 #ifdef EHCI_DEBUG 776 printf("ehci_idone: ex is done!\n "); 777 ehci_dump_exfer(ex); 778 #else 779 printf("ehci_idone: ex=%p is done!\n", ex); 780 #endif 781 return; 782 } 783 ex->isdone = 1; 784 splx(s); 785 } 786 #endif 787 788 if (xfer->status == USBD_CANCELLED || 789 xfer->status == USBD_TIMEOUT) { 790 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 791 return; 792 } 793 794 #ifdef EHCI_DEBUG 795 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 796 if (ehcidebug > 10) 797 ehci_dump_sqtds(ex->sqtdstart); 798 #endif 799 800 /* The transfer is done, compute actual length and status. */ 801 lsqtd = ex->sqtdend; 802 actlen = 0; 803 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 804 nstatus = le32toh(sqtd->qtd.qtd_status); 805 if (nstatus & EHCI_QTD_ACTIVE) 806 break; 807 808 status = nstatus; 809 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 810 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 811 } 812 813 /* 814 * If there are left over TDs we need to update the toggle. 815 * The default pipe doesn't need it since control transfers 816 * start the toggle at 0 every time. 817 */ 818 if (sqtd != lsqtd->nextqtd && 819 xfer->pipe->device->default_pipe != xfer->pipe) { 820 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 821 #if 0 822 ehci_dump_sqh(epipe->sqh); 823 ehci_dump_sqtds(ex->sqtdstart); 824 #endif 825 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 826 } 827 828 /* 829 * For a short transfer we need to update the toggle for the missing 830 * packets within the qTD. 831 */ 832 pkts_left = EHCI_QTD_GET_BYTES(status) / 833 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 834 epipe->nexttoggle ^= pkts_left % 2; 835 836 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 837 xfer->length, actlen, status)); 838 xfer->actlen = actlen; 839 if (status & EHCI_QTD_HALTED) { 840 #ifdef EHCI_DEBUG 841 char sbuf[128]; 842 843 bitmask_snprintf((u_int32_t)status, 844 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 845 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 846 847 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 848 "status 0x%s\n", 849 xfer->pipe->device->address, 850 xfer->pipe->endpoint->edesc->bEndpointAddress, 851 sbuf)); 852 if (ehcidebug > 2) { 853 ehci_dump_sqh(epipe->sqh); 854 ehci_dump_sqtds(ex->sqtdstart); 855 } 856 #endif 857 /* low&full speed has an extra error flag */ 858 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 859 EHCI_QH_SPEED_HIGH) 860 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 861 else 862 status &= EHCI_QTD_STATERRS; 863 if (status == 0) /* no other errors means a stall */ 864 xfer->status = USBD_STALLED; 865 else 866 xfer->status = USBD_IOERROR; /* more info XXX */ 867 /* XXX need to reset TT on missed microframe */ 868 if (status & EHCI_QTD_MISSEDMICRO) { 869 ehci_softc_t *sc = (ehci_softc_t *) 870 xfer->pipe->device->bus; 871 872 printf("%s: missed microframe, TT reset not " 873 "implemented, hub might be inoperational\n", 874 USBDEVNAME(sc->sc_bus.bdev)); 875 } 876 } else { 877 xfer->status = USBD_NORMAL_COMPLETION; 878 } 879 880 usb_transfer_complete(xfer); 881 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 882 } 883 884 /* 885 * Wait here until controller claims to have an interrupt. 886 * Then call ehci_intr and return. Use timeout to avoid waiting 887 * too long. 888 */ 889 void 890 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 891 { 892 int timo; 893 u_int32_t intrs; 894 895 xfer->status = USBD_IN_PROGRESS; 896 for (timo = xfer->timeout; timo >= 0; timo--) { 897 usb_delay_ms(&sc->sc_bus, 1); 898 if (sc->sc_dying) 899 break; 900 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 901 sc->sc_eintrs; 902 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 903 #ifdef EHCI_DEBUG 904 if (ehcidebug > 15) 905 ehci_dump_regs(sc); 906 #endif 907 if (intrs) { 908 ehci_intr1(sc); 909 if (xfer->status != USBD_IN_PROGRESS) 910 return; 911 } 912 } 913 914 /* Timeout */ 915 DPRINTF(("ehci_waitintr: timeout\n")); 916 xfer->status = USBD_TIMEOUT; 917 usb_transfer_complete(xfer); 918 /* XXX should free TD */ 919 } 920 921 void 922 ehci_poll(struct usbd_bus *bus) 923 { 924 ehci_softc_t *sc = (ehci_softc_t *)bus; 925 #ifdef EHCI_DEBUG 926 static int last; 927 int new; 928 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 929 if (new != last) { 930 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 931 last = new; 932 } 933 #endif 934 935 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 936 ehci_intr1(sc); 937 } 938 939 int 940 ehci_detach(struct ehci_softc *sc, int flags) 941 { 942 int rv = 0; 943 944 if (sc->sc_child != NULL) 945 rv = config_detach(sc->sc_child, flags); 946 947 if (rv != 0) 948 return (rv); 949 950 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 951 952 if (sc->sc_powerhook != NULL) 953 powerhook_disestablish(sc->sc_powerhook); 954 if (sc->sc_shutdownhook != NULL) 955 shutdownhook_disestablish(sc->sc_shutdownhook); 956 957 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 958 959 /* XXX free other data structures XXX */ 960 961 return (rv); 962 } 963 964 965 int 966 ehci_activate(device_ptr_t self, enum devact act) 967 { 968 struct ehci_softc *sc = (struct ehci_softc *)self; 969 int rv = 0; 970 971 switch (act) { 972 case DVACT_ACTIVATE: 973 return (EOPNOTSUPP); 974 975 case DVACT_DEACTIVATE: 976 if (sc->sc_child != NULL) 977 rv = config_deactivate(sc->sc_child); 978 sc->sc_dying = 1; 979 break; 980 } 981 return (rv); 982 } 983 984 /* 985 * Handle suspend/resume. 986 * 987 * We need to switch to polling mode here, because this routine is 988 * called from an interrupt context. This is all right since we 989 * are almost suspended anyway. 990 */ 991 void 992 ehci_power(int why, void *v) 993 { 994 ehci_softc_t *sc = v; 995 u_int32_t cmd, hcr; 996 int s, i; 997 998 #ifdef EHCI_DEBUG 999 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1000 if (ehcidebug > 0) 1001 ehci_dump_regs(sc); 1002 #endif 1003 1004 s = splhardusb(); 1005 switch (why) { 1006 case PWR_SUSPEND: 1007 case PWR_STANDBY: 1008 sc->sc_bus.use_polling++; 1009 1010 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1011 1012 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1013 EOWRITE4(sc, EHCI_USBCMD, cmd); 1014 1015 for (i = 0; i < 100; i++) { 1016 hcr = EOREAD4(sc, EHCI_USBSTS) & 1017 (EHCI_STS_ASS | EHCI_STS_PSS); 1018 if (hcr == 0) 1019 break; 1020 1021 usb_delay_ms(&sc->sc_bus, 1); 1022 } 1023 if (hcr != 0) { 1024 printf("%s: reset timeout\n", 1025 USBDEVNAME(sc->sc_bus.bdev)); 1026 } 1027 1028 cmd &= ~EHCI_CMD_RS; 1029 EOWRITE4(sc, EHCI_USBCMD, cmd); 1030 1031 for (i = 0; i < 100; i++) { 1032 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1033 if (hcr == EHCI_STS_HCH) 1034 break; 1035 1036 usb_delay_ms(&sc->sc_bus, 1); 1037 } 1038 if (hcr != EHCI_STS_HCH) { 1039 printf("%s: config timeout\n", 1040 USBDEVNAME(sc->sc_bus.bdev)); 1041 } 1042 1043 sc->sc_bus.use_polling--; 1044 break; 1045 1046 case PWR_RESUME: 1047 sc->sc_bus.use_polling++; 1048 1049 /* restore things in case the bios sucks */ 1050 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1051 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1052 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1053 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1054 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1055 1056 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1057 1058 for (i = 0; i < 100; i++) { 1059 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1060 if (hcr != EHCI_STS_HCH) 1061 break; 1062 1063 usb_delay_ms(&sc->sc_bus, 1); 1064 } 1065 if (hcr == EHCI_STS_HCH) { 1066 printf("%s: config timeout\n", 1067 USBDEVNAME(sc->sc_bus.bdev)); 1068 } 1069 1070 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1071 1072 sc->sc_bus.use_polling--; 1073 break; 1074 case PWR_SOFTSUSPEND: 1075 case PWR_SOFTSTANDBY: 1076 case PWR_SOFTRESUME: 1077 break; 1078 } 1079 splx(s); 1080 1081 #ifdef EHCI_DEBUG 1082 DPRINTF(("ehci_power: sc=%p\n", sc)); 1083 if (ehcidebug > 0) 1084 ehci_dump_regs(sc); 1085 #endif 1086 } 1087 1088 /* 1089 * Shut down the controller when the system is going down. 1090 */ 1091 void 1092 ehci_shutdown(void *v) 1093 { 1094 ehci_softc_t *sc = v; 1095 1096 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1097 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1098 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1099 } 1100 1101 usbd_status 1102 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1103 { 1104 struct ehci_softc *sc = (struct ehci_softc *)bus; 1105 usbd_status err; 1106 1107 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1108 if (err == USBD_NOMEM) 1109 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1110 #ifdef EHCI_DEBUG 1111 if (err) 1112 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1113 #endif 1114 return (err); 1115 } 1116 1117 void 1118 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1119 { 1120 struct ehci_softc *sc = (struct ehci_softc *)bus; 1121 1122 if (dma->block->flags & USB_DMA_RESERVE) { 1123 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1124 dma); 1125 return; 1126 } 1127 usb_freemem(&sc->sc_bus, dma); 1128 } 1129 1130 usbd_xfer_handle 1131 ehci_allocx(struct usbd_bus *bus) 1132 { 1133 struct ehci_softc *sc = (struct ehci_softc *)bus; 1134 usbd_xfer_handle xfer; 1135 1136 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1137 if (xfer != NULL) { 1138 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1139 #ifdef DIAGNOSTIC 1140 if (xfer->busy_free != XFER_FREE) { 1141 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1142 xfer->busy_free); 1143 } 1144 #endif 1145 } else { 1146 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1147 } 1148 if (xfer != NULL) { 1149 memset(xfer, 0, sizeof(struct ehci_xfer)); 1150 #ifdef DIAGNOSTIC 1151 EXFER(xfer)->isdone = 1; 1152 xfer->busy_free = XFER_BUSY; 1153 #endif 1154 } 1155 return (xfer); 1156 } 1157 1158 void 1159 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1160 { 1161 struct ehci_softc *sc = (struct ehci_softc *)bus; 1162 1163 #ifdef DIAGNOSTIC 1164 if (xfer->busy_free != XFER_BUSY) { 1165 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1166 xfer->busy_free); 1167 return; 1168 } 1169 xfer->busy_free = XFER_FREE; 1170 if (!EXFER(xfer)->isdone) { 1171 printf("ehci_freex: !isdone\n"); 1172 return; 1173 } 1174 #endif 1175 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1176 } 1177 1178 Static void 1179 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1180 { 1181 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1182 1183 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1184 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1185 #ifdef USB_DEBUG 1186 if (ehcidebug) 1187 usbd_dump_pipe(pipe); 1188 #endif 1189 epipe->nexttoggle = 0; 1190 } 1191 1192 Static void 1193 ehci_noop(usbd_pipe_handle pipe) 1194 { 1195 } 1196 1197 #ifdef EHCI_DEBUG 1198 void 1199 ehci_dump_regs(ehci_softc_t *sc) 1200 { 1201 int i; 1202 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1203 EOREAD4(sc, EHCI_USBCMD), 1204 EOREAD4(sc, EHCI_USBSTS), 1205 EOREAD4(sc, EHCI_USBINTR)); 1206 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1207 EOREAD4(sc, EHCI_FRINDEX), 1208 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1209 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1210 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1211 for (i = 1; i <= sc->sc_noport; i++) 1212 printf("port %d status=0x%08x\n", i, 1213 EOREAD4(sc, EHCI_PORTSC(i))); 1214 } 1215 1216 /* 1217 * Unused function - this is meant to be called from a kernel 1218 * debugger. 1219 */ 1220 void 1221 ehci_dump() 1222 { 1223 ehci_dump_regs(theehci); 1224 } 1225 1226 void 1227 ehci_dump_link(ehci_link_t link, int type) 1228 { 1229 link = le32toh(link); 1230 printf("0x%08x", link); 1231 if (link & EHCI_LINK_TERMINATE) 1232 printf("<T>"); 1233 else { 1234 printf("<"); 1235 if (type) { 1236 switch (EHCI_LINK_TYPE(link)) { 1237 case EHCI_LINK_ITD: printf("ITD"); break; 1238 case EHCI_LINK_QH: printf("QH"); break; 1239 case EHCI_LINK_SITD: printf("SITD"); break; 1240 case EHCI_LINK_FSTN: printf("FSTN"); break; 1241 } 1242 } 1243 printf(">"); 1244 } 1245 } 1246 1247 void 1248 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1249 { 1250 int i; 1251 u_int32_t stop; 1252 1253 stop = 0; 1254 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1255 ehci_dump_sqtd(sqtd); 1256 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1257 } 1258 if (sqtd) 1259 printf("dump aborted, too many TDs\n"); 1260 } 1261 1262 void 1263 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1264 { 1265 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1266 ehci_dump_qtd(&sqtd->qtd); 1267 } 1268 1269 void 1270 ehci_dump_qtd(ehci_qtd_t *qtd) 1271 { 1272 u_int32_t s; 1273 char sbuf[128]; 1274 1275 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1276 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1277 printf("\n"); 1278 s = le32toh(qtd->qtd_status); 1279 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1280 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1281 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1282 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1283 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1284 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1285 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1286 EHCI_QTD_GET_PID(s), sbuf); 1287 for (s = 0; s < 5; s++) 1288 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1289 } 1290 1291 void 1292 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1293 { 1294 ehci_qh_t *qh = &sqh->qh; 1295 u_int32_t endp, endphub; 1296 1297 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1298 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1299 endp = le32toh(qh->qh_endp); 1300 printf(" endp=0x%08x\n", endp); 1301 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1302 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1303 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1304 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1305 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1306 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1307 EHCI_QH_GET_NRL(endp)); 1308 endphub = le32toh(qh->qh_endphub); 1309 printf(" endphub=0x%08x\n", endphub); 1310 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1311 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1312 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1313 EHCI_QH_GET_MULT(endphub)); 1314 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1315 printf("Overlay qTD:\n"); 1316 ehci_dump_qtd(&qh->qh_qtd); 1317 } 1318 1319 #ifdef DIAGNOSTIC 1320 Static void 1321 ehci_dump_exfer(struct ehci_xfer *ex) 1322 { 1323 printf("ehci_dump_exfer: ex=%p\n", ex); 1324 } 1325 #endif 1326 #endif 1327 1328 usbd_status 1329 ehci_open(usbd_pipe_handle pipe) 1330 { 1331 usbd_device_handle dev = pipe->device; 1332 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1333 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1334 u_int8_t addr = dev->address; 1335 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1336 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1337 ehci_soft_qh_t *sqh; 1338 usbd_status err; 1339 int s; 1340 int ival, speed, naks; 1341 int hshubaddr, hshubport; 1342 1343 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1344 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1345 1346 if (dev->myhsport) { 1347 hshubaddr = dev->myhsport->parent->address; 1348 hshubport = dev->myhsport->portno; 1349 } else { 1350 hshubaddr = 0; 1351 hshubport = 0; 1352 } 1353 1354 if (sc->sc_dying) 1355 return (USBD_IOERROR); 1356 1357 epipe->nexttoggle = 0; 1358 1359 if (addr == sc->sc_addr) { 1360 switch (ed->bEndpointAddress) { 1361 case USB_CONTROL_ENDPOINT: 1362 pipe->methods = &ehci_root_ctrl_methods; 1363 break; 1364 case UE_DIR_IN | EHCI_INTR_ENDPT: 1365 pipe->methods = &ehci_root_intr_methods; 1366 break; 1367 default: 1368 return (USBD_INVAL); 1369 } 1370 return (USBD_NORMAL_COMPLETION); 1371 } 1372 1373 /* XXX All this stuff is only valid for async. */ 1374 switch (dev->speed) { 1375 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1376 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1377 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1378 default: panic("ehci_open: bad device speed %d", dev->speed); 1379 } 1380 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1381 printf("%s: *** WARNING: opening low/full speed isoc device, " 1382 "this does not work yet.\n", 1383 USBDEVNAME(sc->sc_bus.bdev)); 1384 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1385 hshubaddr, hshubport)); 1386 return USBD_INVAL; 1387 } 1388 1389 naks = 8; /* XXX */ 1390 sqh = ehci_alloc_sqh(sc); 1391 if (sqh == NULL) 1392 goto bad0; 1393 /* qh_link filled when the QH is added */ 1394 sqh->qh.qh_endp = htole32( 1395 EHCI_QH_SET_ADDR(addr) | 1396 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1397 EHCI_QH_SET_EPS(speed) | 1398 EHCI_QH_DTC | 1399 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1400 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1401 EHCI_QH_CTL : 0) | 1402 EHCI_QH_SET_NRL(naks) 1403 ); 1404 sqh->qh.qh_endphub = htole32( 1405 EHCI_QH_SET_MULT(1) | 1406 EHCI_QH_SET_HUBA(hshubaddr) | 1407 EHCI_QH_SET_PORT(hshubport) | 1408 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1409 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1410 ); 1411 sqh->qh.qh_curqtd = EHCI_NULL; 1412 /* Fill the overlay qTD */ 1413 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1414 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1415 sqh->qh.qh_qtd.qtd_status = htole32(0); 1416 1417 epipe->sqh = sqh; 1418 1419 switch (xfertype) { 1420 case UE_CONTROL: 1421 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1422 0, &epipe->u.ctl.reqdma); 1423 #ifdef EHCI_DEBUG 1424 if (err) 1425 printf("ehci_open: usb_allocmem()=%d\n", err); 1426 #endif 1427 if (err) 1428 goto bad1; 1429 pipe->methods = &ehci_device_ctrl_methods; 1430 s = splusb(); 1431 ehci_add_qh(sqh, sc->sc_async_head); 1432 splx(s); 1433 break; 1434 case UE_BULK: 1435 pipe->methods = &ehci_device_bulk_methods; 1436 s = splusb(); 1437 ehci_add_qh(sqh, sc->sc_async_head); 1438 splx(s); 1439 break; 1440 case UE_INTERRUPT: 1441 pipe->methods = &ehci_device_intr_methods; 1442 ival = pipe->interval; 1443 if (ival == USBD_DEFAULT_INTERVAL) 1444 ival = ed->bInterval; 1445 return (ehci_device_setintr(sc, sqh, ival)); 1446 case UE_ISOCHRONOUS: 1447 pipe->methods = &ehci_device_isoc_methods; 1448 return (USBD_INVAL); 1449 default: 1450 return (USBD_INVAL); 1451 } 1452 return (USBD_NORMAL_COMPLETION); 1453 1454 bad1: 1455 ehci_free_sqh(sc, sqh); 1456 bad0: 1457 return (USBD_NOMEM); 1458 } 1459 1460 /* 1461 * Add an ED to the schedule. Called at splusb(). 1462 */ 1463 void 1464 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1465 { 1466 SPLUSBCHECK; 1467 1468 sqh->next = head->next; 1469 sqh->qh.qh_link = head->qh.qh_link; 1470 head->next = sqh; 1471 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1472 1473 #ifdef EHCI_DEBUG 1474 if (ehcidebug > 5) { 1475 printf("ehci_add_qh:\n"); 1476 ehci_dump_sqh(sqh); 1477 } 1478 #endif 1479 } 1480 1481 /* 1482 * Remove an ED from the schedule. Called at splusb(). 1483 */ 1484 void 1485 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1486 { 1487 ehci_soft_qh_t *p; 1488 1489 SPLUSBCHECK; 1490 /* XXX */ 1491 for (p = head; p != NULL && p->next != sqh; p = p->next) 1492 ; 1493 if (p == NULL) 1494 panic("ehci_rem_qh: ED not found"); 1495 p->next = sqh->next; 1496 p->qh.qh_link = sqh->qh.qh_link; 1497 1498 ehci_sync_hc(sc); 1499 } 1500 1501 void 1502 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1503 { 1504 int i; 1505 u_int32_t status; 1506 1507 /* Save toggle bit and ping status. */ 1508 status = sqh->qh.qh_qtd.qtd_status & 1509 htole32(EHCI_QTD_TOGGLE_MASK | 1510 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1511 /* Set HALTED to make hw leave it alone. */ 1512 sqh->qh.qh_qtd.qtd_status = 1513 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1514 sqh->qh.qh_curqtd = 0; 1515 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1516 sqh->qh.qh_qtd.qtd_altnext = 0; 1517 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1518 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1519 sqh->sqtd = sqtd; 1520 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1521 sqh->qh.qh_qtd.qtd_status = status; 1522 } 1523 1524 /* 1525 * Ensure that the HC has released all references to the QH. We do this 1526 * by asking for a Async Advance Doorbell interrupt and then we wait for 1527 * the interrupt. 1528 * To make this easier we first obtain exclusive use of the doorbell. 1529 */ 1530 void 1531 ehci_sync_hc(ehci_softc_t *sc) 1532 { 1533 int s, error; 1534 1535 if (sc->sc_dying) { 1536 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1537 return; 1538 } 1539 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1540 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1541 s = splhardusb(); 1542 /* ask for doorbell */ 1543 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1544 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1545 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1546 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1547 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1548 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1549 splx(s); 1550 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1551 #ifdef DIAGNOSTIC 1552 if (error) 1553 printf("ehci_sync_hc: tsleep() = %d\n", error); 1554 #endif 1555 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1556 } 1557 1558 /***********/ 1559 1560 /* 1561 * Data structures and routines to emulate the root hub. 1562 */ 1563 Static usb_device_descriptor_t ehci_devd = { 1564 USB_DEVICE_DESCRIPTOR_SIZE, 1565 UDESC_DEVICE, /* type */ 1566 {0x00, 0x02}, /* USB version */ 1567 UDCLASS_HUB, /* class */ 1568 UDSUBCLASS_HUB, /* subclass */ 1569 UDPROTO_HSHUBSTT, /* protocol */ 1570 64, /* max packet */ 1571 {0},{0},{0x00,0x01}, /* device id */ 1572 1,2,0, /* string indicies */ 1573 1 /* # of configurations */ 1574 }; 1575 1576 Static usb_device_qualifier_t ehci_odevd = { 1577 USB_DEVICE_DESCRIPTOR_SIZE, 1578 UDESC_DEVICE_QUALIFIER, /* type */ 1579 {0x00, 0x02}, /* USB version */ 1580 UDCLASS_HUB, /* class */ 1581 UDSUBCLASS_HUB, /* subclass */ 1582 UDPROTO_FSHUB, /* protocol */ 1583 64, /* max packet */ 1584 1, /* # of configurations */ 1585 0 1586 }; 1587 1588 Static usb_config_descriptor_t ehci_confd = { 1589 USB_CONFIG_DESCRIPTOR_SIZE, 1590 UDESC_CONFIG, 1591 {USB_CONFIG_DESCRIPTOR_SIZE + 1592 USB_INTERFACE_DESCRIPTOR_SIZE + 1593 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1594 1, 1595 1, 1596 0, 1597 UC_SELF_POWERED, 1598 0 /* max power */ 1599 }; 1600 1601 Static usb_interface_descriptor_t ehci_ifcd = { 1602 USB_INTERFACE_DESCRIPTOR_SIZE, 1603 UDESC_INTERFACE, 1604 0, 1605 0, 1606 1, 1607 UICLASS_HUB, 1608 UISUBCLASS_HUB, 1609 UIPROTO_HSHUBSTT, 1610 0 1611 }; 1612 1613 Static usb_endpoint_descriptor_t ehci_endpd = { 1614 USB_ENDPOINT_DESCRIPTOR_SIZE, 1615 UDESC_ENDPOINT, 1616 UE_DIR_IN | EHCI_INTR_ENDPT, 1617 UE_INTERRUPT, 1618 {8, 0}, /* max packet */ 1619 255 1620 }; 1621 1622 Static usb_hub_descriptor_t ehci_hubd = { 1623 USB_HUB_DESCRIPTOR_SIZE, 1624 UDESC_HUB, 1625 0, 1626 {0,0}, 1627 0, 1628 0, 1629 {0}, 1630 }; 1631 1632 Static int 1633 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1634 { 1635 int i; 1636 1637 if (l == 0) 1638 return (0); 1639 p->bLength = 2 * strlen(s) + 2; 1640 if (l == 1) 1641 return (1); 1642 p->bDescriptorType = UDESC_STRING; 1643 l -= 2; 1644 for (i = 0; s[i] && l > 1; i++, l -= 2) 1645 USETW2(p->bString[i], 0, s[i]); 1646 return (2*i+2); 1647 } 1648 1649 /* 1650 * Simulate a hardware hub by handling all the necessary requests. 1651 */ 1652 Static usbd_status 1653 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1654 { 1655 usbd_status err; 1656 1657 /* Insert last in queue. */ 1658 err = usb_insert_transfer(xfer); 1659 if (err) 1660 return (err); 1661 1662 /* Pipe isn't running, start first */ 1663 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1664 } 1665 1666 Static usbd_status 1667 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1668 { 1669 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1670 usb_device_request_t *req; 1671 void *buf = NULL; 1672 int port, i; 1673 int s, len, value, index, l, totlen = 0; 1674 usb_port_status_t ps; 1675 usb_hub_descriptor_t hubd; 1676 usbd_status err; 1677 u_int32_t v; 1678 1679 if (sc->sc_dying) 1680 return (USBD_IOERROR); 1681 1682 #ifdef DIAGNOSTIC 1683 if (!(xfer->rqflags & URQ_REQUEST)) 1684 /* XXX panic */ 1685 return (USBD_INVAL); 1686 #endif 1687 req = &xfer->request; 1688 1689 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1690 req->bmRequestType, req->bRequest)); 1691 1692 len = UGETW(req->wLength); 1693 value = UGETW(req->wValue); 1694 index = UGETW(req->wIndex); 1695 1696 if (len != 0) 1697 buf = KERNADDR(&xfer->dmabuf, 0); 1698 1699 #define C(x,y) ((x) | ((y) << 8)) 1700 switch(C(req->bRequest, req->bmRequestType)) { 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1702 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1703 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1704 /* 1705 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1706 * for the integrated root hub. 1707 */ 1708 break; 1709 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1710 if (len > 0) { 1711 *(u_int8_t *)buf = sc->sc_conf; 1712 totlen = 1; 1713 } 1714 break; 1715 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1716 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1717 switch(value >> 8) { 1718 case UDESC_DEVICE: 1719 if ((value & 0xff) != 0) { 1720 err = USBD_IOERROR; 1721 goto ret; 1722 } 1723 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1724 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1725 memcpy(buf, &ehci_devd, l); 1726 break; 1727 /* 1728 * We can't really operate at another speed, but the spec says 1729 * we need this descriptor. 1730 */ 1731 case UDESC_DEVICE_QUALIFIER: 1732 if ((value & 0xff) != 0) { 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1737 memcpy(buf, &ehci_odevd, l); 1738 break; 1739 /* 1740 * We can't really operate at another speed, but the spec says 1741 * we need this descriptor. 1742 */ 1743 case UDESC_OTHER_SPEED_CONFIGURATION: 1744 case UDESC_CONFIG: 1745 if ((value & 0xff) != 0) { 1746 err = USBD_IOERROR; 1747 goto ret; 1748 } 1749 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1750 memcpy(buf, &ehci_confd, l); 1751 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1752 value >> 8; 1753 buf = (char *)buf + l; 1754 len -= l; 1755 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1756 totlen += l; 1757 memcpy(buf, &ehci_ifcd, l); 1758 buf = (char *)buf + l; 1759 len -= l; 1760 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1761 totlen += l; 1762 memcpy(buf, &ehci_endpd, l); 1763 break; 1764 case UDESC_STRING: 1765 if (len == 0) 1766 break; 1767 *(u_int8_t *)buf = 0; 1768 totlen = 1; 1769 switch (value & 0xff) { 1770 case 0: /* Language table */ 1771 totlen = ehci_str(buf, len, "\001"); 1772 break; 1773 case 1: /* Vendor */ 1774 totlen = ehci_str(buf, len, sc->sc_vendor); 1775 break; 1776 case 2: /* Product */ 1777 totlen = ehci_str(buf, len, "EHCI root hub"); 1778 break; 1779 } 1780 break; 1781 default: 1782 err = USBD_IOERROR; 1783 goto ret; 1784 } 1785 break; 1786 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1787 if (len > 0) { 1788 *(u_int8_t *)buf = 0; 1789 totlen = 1; 1790 } 1791 break; 1792 case C(UR_GET_STATUS, UT_READ_DEVICE): 1793 if (len > 1) { 1794 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1795 totlen = 2; 1796 } 1797 break; 1798 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1799 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1800 if (len > 1) { 1801 USETW(((usb_status_t *)buf)->wStatus, 0); 1802 totlen = 2; 1803 } 1804 break; 1805 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1806 if (value >= USB_MAX_DEVICES) { 1807 err = USBD_IOERROR; 1808 goto ret; 1809 } 1810 sc->sc_addr = value; 1811 break; 1812 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1813 if (value != 0 && value != 1) { 1814 err = USBD_IOERROR; 1815 goto ret; 1816 } 1817 sc->sc_conf = value; 1818 break; 1819 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1820 break; 1821 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1822 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1823 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1824 err = USBD_IOERROR; 1825 goto ret; 1826 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1827 break; 1828 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1829 break; 1830 /* Hub requests */ 1831 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1832 break; 1833 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1834 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1835 "port=%d feature=%d\n", 1836 index, value)); 1837 if (index < 1 || index > sc->sc_noport) { 1838 err = USBD_IOERROR; 1839 goto ret; 1840 } 1841 port = EHCI_PORTSC(index); 1842 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1843 switch(value) { 1844 case UHF_PORT_ENABLE: 1845 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1846 break; 1847 case UHF_PORT_SUSPEND: 1848 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1849 break; 1850 case UHF_PORT_POWER: 1851 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1852 break; 1853 case UHF_PORT_TEST: 1854 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1855 "%d\n", index)); 1856 break; 1857 case UHF_PORT_INDICATOR: 1858 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1859 "%d\n", index)); 1860 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1861 break; 1862 case UHF_C_PORT_CONNECTION: 1863 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1864 break; 1865 case UHF_C_PORT_ENABLE: 1866 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1867 break; 1868 case UHF_C_PORT_SUSPEND: 1869 /* how? */ 1870 break; 1871 case UHF_C_PORT_OVER_CURRENT: 1872 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1873 break; 1874 case UHF_C_PORT_RESET: 1875 sc->sc_isreset = 0; 1876 break; 1877 default: 1878 err = USBD_IOERROR; 1879 goto ret; 1880 } 1881 #if 0 1882 switch(value) { 1883 case UHF_C_PORT_CONNECTION: 1884 case UHF_C_PORT_ENABLE: 1885 case UHF_C_PORT_SUSPEND: 1886 case UHF_C_PORT_OVER_CURRENT: 1887 case UHF_C_PORT_RESET: 1888 /* Enable RHSC interrupt if condition is cleared. */ 1889 if ((OREAD4(sc, port) >> 16) == 0) 1890 ehci_pcd_able(sc, 1); 1891 break; 1892 default: 1893 break; 1894 } 1895 #endif 1896 break; 1897 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1898 if ((value & 0xff) != 0) { 1899 err = USBD_IOERROR; 1900 goto ret; 1901 } 1902 hubd = ehci_hubd; 1903 hubd.bNbrPorts = sc->sc_noport; 1904 v = EOREAD4(sc, EHCI_HCSPARAMS); 1905 USETW(hubd.wHubCharacteristics, 1906 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1907 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1908 ? UHD_PORT_IND : 0); 1909 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1910 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1911 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1912 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1913 l = min(len, hubd.bDescLength); 1914 totlen = l; 1915 memcpy(buf, &hubd, l); 1916 break; 1917 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1918 if (len != 4) { 1919 err = USBD_IOERROR; 1920 goto ret; 1921 } 1922 memset(buf, 0, len); /* ? XXX */ 1923 totlen = len; 1924 break; 1925 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1926 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1927 index)); 1928 if (index < 1 || index > sc->sc_noport) { 1929 err = USBD_IOERROR; 1930 goto ret; 1931 } 1932 if (len != 4) { 1933 err = USBD_IOERROR; 1934 goto ret; 1935 } 1936 v = EOREAD4(sc, EHCI_PORTSC(index)); 1937 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1938 v)); 1939 i = UPS_HIGH_SPEED; 1940 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1941 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1942 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1943 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1944 if (v & EHCI_PS_PR) i |= UPS_RESET; 1945 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1946 USETW(ps.wPortStatus, i); 1947 i = 0; 1948 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1949 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1950 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1951 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1952 USETW(ps.wPortChange, i); 1953 l = min(len, sizeof ps); 1954 memcpy(buf, &ps, l); 1955 totlen = l; 1956 break; 1957 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1958 err = USBD_IOERROR; 1959 goto ret; 1960 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1961 break; 1962 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1963 if (index < 1 || index > sc->sc_noport) { 1964 err = USBD_IOERROR; 1965 goto ret; 1966 } 1967 port = EHCI_PORTSC(index); 1968 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1969 switch(value) { 1970 case UHF_PORT_ENABLE: 1971 EOWRITE4(sc, port, v | EHCI_PS_PE); 1972 break; 1973 case UHF_PORT_SUSPEND: 1974 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1975 break; 1976 case UHF_PORT_RESET: 1977 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1978 index)); 1979 if (EHCI_PS_IS_LOWSPEED(v)) { 1980 /* Low speed device, give up ownership. */ 1981 ehci_disown(sc, index, 1); 1982 break; 1983 } 1984 /* Start reset sequence. */ 1985 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1986 EOWRITE4(sc, port, v | EHCI_PS_PR); 1987 /* Wait for reset to complete. */ 1988 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1989 if (sc->sc_dying) { 1990 err = USBD_IOERROR; 1991 goto ret; 1992 } 1993 /* Terminate reset sequence. */ 1994 EOWRITE4(sc, port, v); 1995 /* Wait for HC to complete reset. */ 1996 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1997 if (sc->sc_dying) { 1998 err = USBD_IOERROR; 1999 goto ret; 2000 } 2001 v = EOREAD4(sc, port); 2002 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2003 if (v & EHCI_PS_PR) { 2004 printf("%s: port reset timeout\n", 2005 USBDEVNAME(sc->sc_bus.bdev)); 2006 return (USBD_TIMEOUT); 2007 } 2008 if (!(v & EHCI_PS_PE)) { 2009 /* Not a high speed device, give up ownership.*/ 2010 ehci_disown(sc, index, 0); 2011 break; 2012 } 2013 sc->sc_isreset = 1; 2014 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2015 index, v)); 2016 break; 2017 case UHF_PORT_POWER: 2018 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2019 "%d\n", index)); 2020 EOWRITE4(sc, port, v | EHCI_PS_PP); 2021 break; 2022 case UHF_PORT_TEST: 2023 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2024 "%d\n", index)); 2025 break; 2026 case UHF_PORT_INDICATOR: 2027 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2028 "%d\n", index)); 2029 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2030 break; 2031 default: 2032 err = USBD_IOERROR; 2033 goto ret; 2034 } 2035 break; 2036 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2037 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2038 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2039 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2040 break; 2041 default: 2042 err = USBD_IOERROR; 2043 goto ret; 2044 } 2045 xfer->actlen = totlen; 2046 err = USBD_NORMAL_COMPLETION; 2047 ret: 2048 xfer->status = err; 2049 s = splusb(); 2050 usb_transfer_complete(xfer); 2051 splx(s); 2052 return (USBD_IN_PROGRESS); 2053 } 2054 2055 void 2056 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2057 { 2058 int port; 2059 u_int32_t v; 2060 2061 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2062 #ifdef DIAGNOSTIC 2063 if (sc->sc_npcomp != 0) { 2064 int i = (index-1) / sc->sc_npcomp; 2065 if (i >= sc->sc_ncomp) 2066 printf("%s: strange port\n", 2067 USBDEVNAME(sc->sc_bus.bdev)); 2068 else 2069 printf("%s: handing over %s speed device on " 2070 "port %d to %s\n", 2071 USBDEVNAME(sc->sc_bus.bdev), 2072 lowspeed ? "low" : "full", 2073 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2074 } else { 2075 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2076 } 2077 #endif 2078 port = EHCI_PORTSC(index); 2079 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2080 EOWRITE4(sc, port, v | EHCI_PS_PO); 2081 } 2082 2083 /* Abort a root control request. */ 2084 Static void 2085 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2086 { 2087 /* Nothing to do, all transfers are synchronous. */ 2088 } 2089 2090 /* Close the root pipe. */ 2091 Static void 2092 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2093 { 2094 DPRINTF(("ehci_root_ctrl_close\n")); 2095 /* Nothing to do. */ 2096 } 2097 2098 void 2099 ehci_root_intr_done(usbd_xfer_handle xfer) 2100 { 2101 xfer->hcpriv = NULL; 2102 } 2103 2104 Static usbd_status 2105 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2106 { 2107 usbd_status err; 2108 2109 /* Insert last in queue. */ 2110 err = usb_insert_transfer(xfer); 2111 if (err) 2112 return (err); 2113 2114 /* Pipe isn't running, start first */ 2115 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2116 } 2117 2118 Static usbd_status 2119 ehci_root_intr_start(usbd_xfer_handle xfer) 2120 { 2121 usbd_pipe_handle pipe = xfer->pipe; 2122 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2123 2124 if (sc->sc_dying) 2125 return (USBD_IOERROR); 2126 2127 sc->sc_intrxfer = xfer; 2128 2129 return (USBD_IN_PROGRESS); 2130 } 2131 2132 /* Abort a root interrupt request. */ 2133 Static void 2134 ehci_root_intr_abort(usbd_xfer_handle xfer) 2135 { 2136 int s; 2137 2138 if (xfer->pipe->intrxfer == xfer) { 2139 DPRINTF(("ehci_root_intr_abort: remove\n")); 2140 xfer->pipe->intrxfer = NULL; 2141 } 2142 xfer->status = USBD_CANCELLED; 2143 s = splusb(); 2144 usb_transfer_complete(xfer); 2145 splx(s); 2146 } 2147 2148 /* Close the root pipe. */ 2149 Static void 2150 ehci_root_intr_close(usbd_pipe_handle pipe) 2151 { 2152 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2153 2154 DPRINTF(("ehci_root_intr_close\n")); 2155 2156 sc->sc_intrxfer = NULL; 2157 } 2158 2159 void 2160 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2161 { 2162 xfer->hcpriv = NULL; 2163 } 2164 2165 /************************/ 2166 2167 ehci_soft_qh_t * 2168 ehci_alloc_sqh(ehci_softc_t *sc) 2169 { 2170 ehci_soft_qh_t *sqh; 2171 usbd_status err; 2172 int i, offs; 2173 usb_dma_t dma; 2174 2175 if (sc->sc_freeqhs == NULL) { 2176 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2177 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2178 EHCI_PAGE_SIZE, &dma); 2179 #ifdef EHCI_DEBUG 2180 if (err) 2181 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2182 #endif 2183 if (err) 2184 return (NULL); 2185 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2186 offs = i * EHCI_SQH_SIZE; 2187 sqh = KERNADDR(&dma, offs); 2188 sqh->physaddr = DMAADDR(&dma, offs); 2189 sqh->next = sc->sc_freeqhs; 2190 sc->sc_freeqhs = sqh; 2191 } 2192 } 2193 sqh = sc->sc_freeqhs; 2194 sc->sc_freeqhs = sqh->next; 2195 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2196 sqh->next = NULL; 2197 return (sqh); 2198 } 2199 2200 void 2201 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2202 { 2203 sqh->next = sc->sc_freeqhs; 2204 sc->sc_freeqhs = sqh; 2205 } 2206 2207 ehci_soft_qtd_t * 2208 ehci_alloc_sqtd(ehci_softc_t *sc) 2209 { 2210 ehci_soft_qtd_t *sqtd; 2211 usbd_status err; 2212 int i, offs; 2213 usb_dma_t dma; 2214 int s; 2215 2216 if (sc->sc_freeqtds == NULL) { 2217 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2218 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2219 EHCI_PAGE_SIZE, &dma); 2220 #ifdef EHCI_DEBUG 2221 if (err) 2222 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2223 #endif 2224 if (err) 2225 return (NULL); 2226 s = splusb(); 2227 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2228 offs = i * EHCI_SQTD_SIZE; 2229 sqtd = KERNADDR(&dma, offs); 2230 sqtd->physaddr = DMAADDR(&dma, offs); 2231 sqtd->nextqtd = sc->sc_freeqtds; 2232 sc->sc_freeqtds = sqtd; 2233 } 2234 splx(s); 2235 } 2236 2237 s = splusb(); 2238 sqtd = sc->sc_freeqtds; 2239 sc->sc_freeqtds = sqtd->nextqtd; 2240 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2241 sqtd->nextqtd = NULL; 2242 sqtd->xfer = NULL; 2243 splx(s); 2244 2245 return (sqtd); 2246 } 2247 2248 void 2249 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2250 { 2251 int s; 2252 2253 s = splusb(); 2254 sqtd->nextqtd = sc->sc_freeqtds; 2255 sc->sc_freeqtds = sqtd; 2256 splx(s); 2257 } 2258 2259 usbd_status 2260 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2261 int alen, int rd, usbd_xfer_handle xfer, 2262 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2263 { 2264 ehci_soft_qtd_t *next, *cur; 2265 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2266 u_int32_t qtdstatus; 2267 int len, curlen, mps; 2268 int i, tog; 2269 usb_dma_t *dma = &xfer->dmabuf; 2270 u_int16_t flags = xfer->flags; 2271 2272 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2273 2274 len = alen; 2275 dataphys = DMAADDR(dma, 0); 2276 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2277 qtdstatus = EHCI_QTD_ACTIVE | 2278 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2279 EHCI_QTD_SET_CERR(3) 2280 /* IOC set below */ 2281 /* BYTES set below */ 2282 ; 2283 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2284 tog = epipe->nexttoggle; 2285 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2286 2287 cur = ehci_alloc_sqtd(sc); 2288 *sp = cur; 2289 if (cur == NULL) 2290 goto nomem; 2291 for (;;) { 2292 dataphyspage = EHCI_PAGE(dataphys); 2293 /* The EHCI hardware can handle at most 5 pages. */ 2294 if (dataphyslastpage - dataphyspage < 2295 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2296 /* we can handle it in this QTD */ 2297 curlen = len; 2298 } else { 2299 /* must use multiple TDs, fill as much as possible. */ 2300 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2301 EHCI_PAGE_OFFSET(dataphys); 2302 #ifdef DIAGNOSTIC 2303 if (curlen > len) { 2304 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2305 "len=0x%x offs=0x%x\n", curlen, len, 2306 EHCI_PAGE_OFFSET(dataphys)); 2307 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2308 dataphyslastpage, dataphyspage, 2309 dataphys); 2310 curlen = len; 2311 } 2312 #endif 2313 /* the length must be a multiple of the max size */ 2314 curlen -= curlen % mps; 2315 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2316 "curlen=%d\n", curlen)); 2317 #ifdef DIAGNOSTIC 2318 if (curlen == 0) 2319 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2320 #endif 2321 } 2322 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2323 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2324 dataphys, dataphyslastpage, 2325 len, curlen)); 2326 len -= curlen; 2327 2328 /* 2329 * Allocate another transfer if there's more data left, 2330 * or if force last short transfer flag is set and we're 2331 * allocating a multiple of the max packet size. 2332 */ 2333 if (len != 0 || 2334 ((curlen % mps) == 0 && !rd && curlen != 0 && 2335 (flags & USBD_FORCE_SHORT_XFER))) { 2336 next = ehci_alloc_sqtd(sc); 2337 if (next == NULL) 2338 goto nomem; 2339 nextphys = htole32(next->physaddr); 2340 } else { 2341 next = NULL; 2342 nextphys = EHCI_NULL; 2343 } 2344 2345 for (i = 0; i * EHCI_PAGE_SIZE < 2346 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2347 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2348 if (i != 0) /* use offset only in first buffer */ 2349 a = EHCI_PAGE(a); 2350 cur->qtd.qtd_buffer[i] = htole32(a); 2351 cur->qtd.qtd_buffer_hi[i] = 0; 2352 #ifdef DIAGNOSTIC 2353 if (i >= EHCI_QTD_NBUFFERS) { 2354 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2355 goto nomem; 2356 } 2357 #endif 2358 } 2359 cur->nextqtd = next; 2360 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2361 cur->qtd.qtd_status = 2362 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2363 cur->xfer = xfer; 2364 cur->len = curlen; 2365 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2366 dataphys, dataphys + curlen)); 2367 /* adjust the toggle based on the number of packets in this 2368 qtd */ 2369 if (((curlen + mps - 1) / mps) & 1) { 2370 tog ^= 1; 2371 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2372 } 2373 if (next == NULL) 2374 break; 2375 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2376 dataphys += curlen; 2377 cur = next; 2378 } 2379 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2380 *ep = cur; 2381 epipe->nexttoggle = tog; 2382 2383 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2384 *sp, *ep)); 2385 2386 return (USBD_NORMAL_COMPLETION); 2387 2388 nomem: 2389 /* XXX free chain */ 2390 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2391 return (USBD_NOMEM); 2392 } 2393 2394 Static void 2395 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2396 ehci_soft_qtd_t *sqtdend) 2397 { 2398 ehci_soft_qtd_t *p; 2399 int i; 2400 2401 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2402 sqtd, sqtdend)); 2403 2404 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2405 p = sqtd->nextqtd; 2406 ehci_free_sqtd(sc, sqtd); 2407 } 2408 } 2409 2410 /****************/ 2411 2412 /* 2413 * Close a reqular pipe. 2414 * Assumes that there are no pending transactions. 2415 */ 2416 void 2417 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2418 { 2419 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2420 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2421 ehci_soft_qh_t *sqh = epipe->sqh; 2422 int s; 2423 2424 s = splusb(); 2425 ehci_rem_qh(sc, sqh, head); 2426 splx(s); 2427 ehci_free_sqh(sc, epipe->sqh); 2428 } 2429 2430 /* 2431 * Abort a device request. 2432 * If this routine is called at splusb() it guarantees that the request 2433 * will be removed from the hardware scheduling and that the callback 2434 * for it will be called with USBD_CANCELLED status. 2435 * It's impossible to guarantee that the requested transfer will not 2436 * have happened since the hardware runs concurrently. 2437 * If the transaction has already happened we rely on the ordinary 2438 * interrupt processing to process it. 2439 * XXX This is most probably wrong. 2440 */ 2441 void 2442 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2443 { 2444 #define exfer EXFER(xfer) 2445 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2446 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2447 ehci_soft_qh_t *sqh = epipe->sqh; 2448 ehci_soft_qtd_t *sqtd; 2449 ehci_physaddr_t cur; 2450 u_int32_t qhstatus; 2451 int s; 2452 int hit; 2453 int wake; 2454 2455 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2456 2457 if (sc->sc_dying) { 2458 /* If we're dying, just do the software part. */ 2459 s = splusb(); 2460 xfer->status = status; /* make software ignore it */ 2461 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2462 usb_transfer_complete(xfer); 2463 splx(s); 2464 return; 2465 } 2466 2467 if (xfer->device->bus->intr_context || !curproc) 2468 panic("ehci_abort_xfer: not in process context"); 2469 2470 /* 2471 * If an abort is already in progress then just wait for it to 2472 * complete and return. 2473 */ 2474 if (xfer->hcflags & UXFER_ABORTING) { 2475 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2476 #ifdef DIAGNOSTIC 2477 if (status == USBD_TIMEOUT) 2478 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2479 #endif 2480 /* Override the status which might be USBD_TIMEOUT. */ 2481 xfer->status = status; 2482 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2483 xfer->hcflags |= UXFER_ABORTWAIT; 2484 while (xfer->hcflags & UXFER_ABORTING) 2485 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2486 return; 2487 } 2488 xfer->hcflags |= UXFER_ABORTING; 2489 2490 /* 2491 * Step 1: Make interrupt routine and hardware ignore xfer. 2492 */ 2493 s = splusb(); 2494 xfer->status = status; /* make software ignore it */ 2495 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2496 qhstatus = sqh->qh.qh_qtd.qtd_status; 2497 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2498 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2499 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2500 if (sqtd == exfer->sqtdend) 2501 break; 2502 } 2503 splx(s); 2504 2505 /* 2506 * Step 2: Wait until we know hardware has finished any possible 2507 * use of the xfer. Also make sure the soft interrupt routine 2508 * has run. 2509 */ 2510 ehci_sync_hc(sc); 2511 s = splusb(); 2512 #ifdef USB_USE_SOFTINTR 2513 sc->sc_softwake = 1; 2514 #endif /* USB_USE_SOFTINTR */ 2515 usb_schedsoftintr(&sc->sc_bus); 2516 #ifdef USB_USE_SOFTINTR 2517 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2518 #endif /* USB_USE_SOFTINTR */ 2519 splx(s); 2520 2521 /* 2522 * Step 3: Remove any vestiges of the xfer from the hardware. 2523 * The complication here is that the hardware may have executed 2524 * beyond the xfer we're trying to abort. So as we're scanning 2525 * the TDs of this xfer we check if the hardware points to 2526 * any of them. 2527 */ 2528 s = splusb(); /* XXX why? */ 2529 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2530 hit = 0; 2531 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2532 hit |= cur == sqtd->physaddr; 2533 if (sqtd == exfer->sqtdend) 2534 break; 2535 } 2536 sqtd = sqtd->nextqtd; 2537 /* Zap curqtd register if hardware pointed inside the xfer. */ 2538 if (hit && sqtd != NULL) { 2539 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2540 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2541 sqh->qh.qh_qtd.qtd_status = qhstatus; 2542 } else { 2543 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2544 } 2545 2546 /* 2547 * Step 4: Execute callback. 2548 */ 2549 #ifdef DIAGNOSTIC 2550 exfer->isdone = 1; 2551 #endif 2552 wake = xfer->hcflags & UXFER_ABORTWAIT; 2553 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2554 usb_transfer_complete(xfer); 2555 if (wake) 2556 wakeup(&xfer->hcflags); 2557 2558 splx(s); 2559 #undef exfer 2560 } 2561 2562 void 2563 ehci_timeout(void *addr) 2564 { 2565 struct ehci_xfer *exfer = addr; 2566 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2567 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2568 2569 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2570 #ifdef USB_DEBUG 2571 if (ehcidebug > 1) 2572 usbd_dump_pipe(exfer->xfer.pipe); 2573 #endif 2574 2575 if (sc->sc_dying) { 2576 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2577 return; 2578 } 2579 2580 /* Execute the abort in a process context. */ 2581 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2582 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2583 } 2584 2585 void 2586 ehci_timeout_task(void *addr) 2587 { 2588 usbd_xfer_handle xfer = addr; 2589 int s; 2590 2591 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2592 2593 s = splusb(); 2594 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2595 splx(s); 2596 } 2597 2598 /************************/ 2599 2600 Static usbd_status 2601 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2602 { 2603 usbd_status err; 2604 2605 /* Insert last in queue. */ 2606 err = usb_insert_transfer(xfer); 2607 if (err) 2608 return (err); 2609 2610 /* Pipe isn't running, start first */ 2611 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2612 } 2613 2614 Static usbd_status 2615 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2616 { 2617 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2618 usbd_status err; 2619 2620 if (sc->sc_dying) 2621 return (USBD_IOERROR); 2622 2623 #ifdef DIAGNOSTIC 2624 if (!(xfer->rqflags & URQ_REQUEST)) { 2625 /* XXX panic */ 2626 printf("ehci_device_ctrl_transfer: not a request\n"); 2627 return (USBD_INVAL); 2628 } 2629 #endif 2630 2631 err = ehci_device_request(xfer); 2632 if (err) 2633 return (err); 2634 2635 if (sc->sc_bus.use_polling) 2636 ehci_waitintr(sc, xfer); 2637 return (USBD_IN_PROGRESS); 2638 } 2639 2640 void 2641 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2642 { 2643 struct ehci_xfer *ex = EXFER(xfer); 2644 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2645 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2646 2647 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2648 2649 #ifdef DIAGNOSTIC 2650 if (!(xfer->rqflags & URQ_REQUEST)) { 2651 panic("ehci_ctrl_done: not a request"); 2652 } 2653 #endif 2654 2655 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2656 ehci_del_intr_list(ex); /* remove from active list */ 2657 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2658 } 2659 2660 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2661 } 2662 2663 /* Abort a device control request. */ 2664 Static void 2665 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2666 { 2667 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2668 ehci_abort_xfer(xfer, USBD_CANCELLED); 2669 } 2670 2671 /* Close a device control pipe. */ 2672 Static void 2673 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2674 { 2675 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2676 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2677 2678 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2679 ehci_close_pipe(pipe, sc->sc_async_head); 2680 } 2681 2682 usbd_status 2683 ehci_device_request(usbd_xfer_handle xfer) 2684 { 2685 #define exfer EXFER(xfer) 2686 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2687 usb_device_request_t *req = &xfer->request; 2688 usbd_device_handle dev = epipe->pipe.device; 2689 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2690 int addr = dev->address; 2691 ehci_soft_qtd_t *setup, *stat, *next; 2692 ehci_soft_qh_t *sqh; 2693 int isread; 2694 int len; 2695 usbd_status err; 2696 int s; 2697 2698 isread = req->bmRequestType & UT_READ; 2699 len = UGETW(req->wLength); 2700 2701 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2702 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2703 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2704 UGETW(req->wIndex), len, addr, 2705 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2706 2707 setup = ehci_alloc_sqtd(sc); 2708 if (setup == NULL) { 2709 err = USBD_NOMEM; 2710 goto bad1; 2711 } 2712 stat = ehci_alloc_sqtd(sc); 2713 if (stat == NULL) { 2714 err = USBD_NOMEM; 2715 goto bad2; 2716 } 2717 2718 sqh = epipe->sqh; 2719 epipe->u.ctl.length = len; 2720 2721 /* Update device address and length since they may have changed 2722 during the setup of the control pipe in usbd_new_device(). */ 2723 /* XXX This only needs to be done once, but it's too early in open. */ 2724 /* XXXX Should not touch ED here! */ 2725 sqh->qh.qh_endp = 2726 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2727 htole32( 2728 EHCI_QH_SET_ADDR(addr) | 2729 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2730 ); 2731 2732 /* Set up data transaction */ 2733 if (len != 0) { 2734 ehci_soft_qtd_t *end; 2735 2736 /* Start toggle at 1. */ 2737 epipe->nexttoggle = 1; 2738 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2739 &next, &end); 2740 if (err) 2741 goto bad3; 2742 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2743 end->nextqtd = stat; 2744 end->qtd.qtd_next = 2745 end->qtd.qtd_altnext = htole32(stat->physaddr); 2746 } else { 2747 next = stat; 2748 } 2749 2750 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2751 2752 /* Clear toggle */ 2753 setup->qtd.qtd_status = htole32( 2754 EHCI_QTD_ACTIVE | 2755 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2756 EHCI_QTD_SET_CERR(3) | 2757 EHCI_QTD_SET_TOGGLE(0) | 2758 EHCI_QTD_SET_BYTES(sizeof *req) 2759 ); 2760 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2761 setup->qtd.qtd_buffer_hi[0] = 0; 2762 setup->nextqtd = next; 2763 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2764 setup->xfer = xfer; 2765 setup->len = sizeof *req; 2766 2767 stat->qtd.qtd_status = htole32( 2768 EHCI_QTD_ACTIVE | 2769 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2770 EHCI_QTD_SET_CERR(3) | 2771 EHCI_QTD_SET_TOGGLE(1) | 2772 EHCI_QTD_IOC 2773 ); 2774 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2775 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2776 stat->nextqtd = NULL; 2777 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2778 stat->xfer = xfer; 2779 stat->len = 0; 2780 2781 #ifdef EHCI_DEBUG 2782 if (ehcidebug > 5) { 2783 DPRINTF(("ehci_device_request:\n")); 2784 ehci_dump_sqh(sqh); 2785 ehci_dump_sqtds(setup); 2786 } 2787 #endif 2788 2789 exfer->sqtdstart = setup; 2790 exfer->sqtdend = stat; 2791 #ifdef DIAGNOSTIC 2792 if (!exfer->isdone) { 2793 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2794 } 2795 exfer->isdone = 0; 2796 #endif 2797 2798 /* Insert qTD in QH list. */ 2799 s = splusb(); 2800 ehci_set_qh_qtd(sqh, setup); 2801 if (xfer->timeout && !sc->sc_bus.use_polling) { 2802 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2803 ehci_timeout, xfer); 2804 } 2805 ehci_add_intr_list(sc, exfer); 2806 xfer->status = USBD_IN_PROGRESS; 2807 splx(s); 2808 2809 #ifdef EHCI_DEBUG 2810 if (ehcidebug > 10) { 2811 DPRINTF(("ehci_device_request: status=%x\n", 2812 EOREAD4(sc, EHCI_USBSTS))); 2813 delay(10000); 2814 ehci_dump_regs(sc); 2815 ehci_dump_sqh(sc->sc_async_head); 2816 ehci_dump_sqh(sqh); 2817 ehci_dump_sqtds(setup); 2818 } 2819 #endif 2820 2821 return (USBD_NORMAL_COMPLETION); 2822 2823 bad3: 2824 ehci_free_sqtd(sc, stat); 2825 bad2: 2826 ehci_free_sqtd(sc, setup); 2827 bad1: 2828 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2829 xfer->status = err; 2830 usb_transfer_complete(xfer); 2831 return (err); 2832 #undef exfer 2833 } 2834 2835 /************************/ 2836 2837 Static usbd_status 2838 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2839 { 2840 usbd_status err; 2841 2842 /* Insert last in queue. */ 2843 err = usb_insert_transfer(xfer); 2844 if (err) 2845 return (err); 2846 2847 /* Pipe isn't running, start first */ 2848 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2849 } 2850 2851 usbd_status 2852 ehci_device_bulk_start(usbd_xfer_handle xfer) 2853 { 2854 #define exfer EXFER(xfer) 2855 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2856 usbd_device_handle dev = epipe->pipe.device; 2857 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2858 ehci_soft_qtd_t *data, *dataend; 2859 ehci_soft_qh_t *sqh; 2860 usbd_status err; 2861 int len, isread, endpt; 2862 int s; 2863 2864 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2865 xfer, xfer->length, xfer->flags)); 2866 2867 if (sc->sc_dying) 2868 return (USBD_IOERROR); 2869 2870 #ifdef DIAGNOSTIC 2871 if (xfer->rqflags & URQ_REQUEST) 2872 panic("ehci_device_bulk_start: a request"); 2873 #endif 2874 2875 len = xfer->length; 2876 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2877 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2878 sqh = epipe->sqh; 2879 2880 epipe->u.bulk.length = len; 2881 2882 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2883 &dataend); 2884 if (err) { 2885 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2886 xfer->status = err; 2887 usb_transfer_complete(xfer); 2888 return (err); 2889 } 2890 2891 #ifdef EHCI_DEBUG 2892 if (ehcidebug > 5) { 2893 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2894 ehci_dump_sqh(sqh); 2895 ehci_dump_sqtds(data); 2896 } 2897 #endif 2898 2899 /* Set up interrupt info. */ 2900 exfer->sqtdstart = data; 2901 exfer->sqtdend = dataend; 2902 #ifdef DIAGNOSTIC 2903 if (!exfer->isdone) { 2904 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2905 } 2906 exfer->isdone = 0; 2907 #endif 2908 2909 s = splusb(); 2910 ehci_set_qh_qtd(sqh, data); 2911 if (xfer->timeout && !sc->sc_bus.use_polling) { 2912 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2913 ehci_timeout, xfer); 2914 } 2915 ehci_add_intr_list(sc, exfer); 2916 xfer->status = USBD_IN_PROGRESS; 2917 splx(s); 2918 2919 #ifdef EHCI_DEBUG 2920 if (ehcidebug > 10) { 2921 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2922 delay(10000); 2923 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2924 ehci_dump_regs(sc); 2925 #if 0 2926 printf("async_head:\n"); 2927 ehci_dump_sqh(sc->sc_async_head); 2928 #endif 2929 printf("sqh:\n"); 2930 ehci_dump_sqh(sqh); 2931 ehci_dump_sqtds(data); 2932 } 2933 #endif 2934 2935 if (sc->sc_bus.use_polling) 2936 ehci_waitintr(sc, xfer); 2937 2938 return (USBD_IN_PROGRESS); 2939 #undef exfer 2940 } 2941 2942 Static void 2943 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2944 { 2945 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2946 ehci_abort_xfer(xfer, USBD_CANCELLED); 2947 } 2948 2949 /* 2950 * Close a device bulk pipe. 2951 */ 2952 Static void 2953 ehci_device_bulk_close(usbd_pipe_handle pipe) 2954 { 2955 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2956 2957 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2958 ehci_close_pipe(pipe, sc->sc_async_head); 2959 } 2960 2961 void 2962 ehci_device_bulk_done(usbd_xfer_handle xfer) 2963 { 2964 struct ehci_xfer *ex = EXFER(xfer); 2965 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2966 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2967 2968 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2969 xfer, xfer->actlen)); 2970 2971 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2972 ehci_del_intr_list(ex); /* remove from active list */ 2973 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2974 } 2975 2976 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2977 } 2978 2979 /************************/ 2980 2981 Static usbd_status 2982 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2983 { 2984 struct ehci_soft_islot *isp; 2985 int islot, lev; 2986 2987 /* Find a poll rate that is large enough. */ 2988 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2989 if (EHCI_ILEV_IVAL(lev) <= ival) 2990 break; 2991 2992 /* Pick an interrupt slot at the right level. */ 2993 /* XXX could do better than picking at random */ 2994 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2995 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2996 2997 sqh->islot = islot; 2998 isp = &sc->sc_islots[islot]; 2999 ehci_add_qh(sqh, isp->sqh); 3000 3001 return (USBD_NORMAL_COMPLETION); 3002 } 3003 3004 Static usbd_status 3005 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3006 { 3007 usbd_status err; 3008 3009 /* Insert last in queue. */ 3010 err = usb_insert_transfer(xfer); 3011 if (err) 3012 return (err); 3013 3014 /* 3015 * Pipe isn't running (otherwise err would be USBD_INPROG), 3016 * so start it first. 3017 */ 3018 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3019 } 3020 3021 Static usbd_status 3022 ehci_device_intr_start(usbd_xfer_handle xfer) 3023 { 3024 #define exfer EXFER(xfer) 3025 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3026 usbd_device_handle dev = xfer->pipe->device; 3027 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3028 ehci_soft_qtd_t *data, *dataend; 3029 ehci_soft_qh_t *sqh; 3030 usbd_status err; 3031 int len, isread, endpt; 3032 int s; 3033 3034 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3035 xfer, xfer->length, xfer->flags)); 3036 3037 if (sc->sc_dying) 3038 return (USBD_IOERROR); 3039 3040 #ifdef DIAGNOSTIC 3041 if (xfer->rqflags & URQ_REQUEST) 3042 panic("ehci_device_intr_start: a request"); 3043 #endif 3044 3045 len = xfer->length; 3046 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3047 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3048 sqh = epipe->sqh; 3049 3050 epipe->u.intr.length = len; 3051 3052 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3053 &dataend); 3054 if (err) { 3055 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3056 xfer->status = err; 3057 usb_transfer_complete(xfer); 3058 return (err); 3059 } 3060 3061 #ifdef EHCI_DEBUG 3062 if (ehcidebug > 5) { 3063 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3064 ehci_dump_sqh(sqh); 3065 ehci_dump_sqtds(data); 3066 } 3067 #endif 3068 3069 /* Set up interrupt info. */ 3070 exfer->sqtdstart = data; 3071 exfer->sqtdend = dataend; 3072 #ifdef DIAGNOSTIC 3073 if (!exfer->isdone) { 3074 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3075 } 3076 exfer->isdone = 0; 3077 #endif 3078 3079 s = splusb(); 3080 ehci_set_qh_qtd(sqh, data); 3081 if (xfer->timeout && !sc->sc_bus.use_polling) { 3082 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3083 ehci_timeout, xfer); 3084 } 3085 ehci_add_intr_list(sc, exfer); 3086 xfer->status = USBD_IN_PROGRESS; 3087 splx(s); 3088 3089 #ifdef EHCI_DEBUG 3090 if (ehcidebug > 10) { 3091 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3092 delay(10000); 3093 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3094 ehci_dump_regs(sc); 3095 printf("sqh:\n"); 3096 ehci_dump_sqh(sqh); 3097 ehci_dump_sqtds(data); 3098 } 3099 #endif 3100 3101 if (sc->sc_bus.use_polling) 3102 ehci_waitintr(sc, xfer); 3103 3104 return (USBD_IN_PROGRESS); 3105 #undef exfer 3106 } 3107 3108 Static void 3109 ehci_device_intr_abort(usbd_xfer_handle xfer) 3110 { 3111 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3112 if (xfer->pipe->intrxfer == xfer) { 3113 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3114 xfer->pipe->intrxfer = NULL; 3115 } 3116 ehci_abort_xfer(xfer, USBD_CANCELLED); 3117 } 3118 3119 Static void 3120 ehci_device_intr_close(usbd_pipe_handle pipe) 3121 { 3122 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3123 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3124 struct ehci_soft_islot *isp; 3125 3126 isp = &sc->sc_islots[epipe->sqh->islot]; 3127 ehci_close_pipe(pipe, isp->sqh); 3128 } 3129 3130 Static void 3131 ehci_device_intr_done(usbd_xfer_handle xfer) 3132 { 3133 #define exfer EXFER(xfer) 3134 struct ehci_xfer *ex = EXFER(xfer); 3135 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3136 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3137 ehci_soft_qtd_t *data, *dataend; 3138 ehci_soft_qh_t *sqh; 3139 usbd_status err; 3140 int len, isread, endpt, s; 3141 3142 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3143 xfer, xfer->actlen)); 3144 3145 if (xfer->pipe->repeat) { 3146 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3147 3148 len = epipe->u.intr.length; 3149 xfer->length = len; 3150 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3151 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3152 sqh = epipe->sqh; 3153 3154 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3155 &data, &dataend); 3156 if (err) { 3157 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3158 xfer->status = err; 3159 return; 3160 } 3161 3162 /* Set up interrupt info. */ 3163 exfer->sqtdstart = data; 3164 exfer->sqtdend = dataend; 3165 #ifdef DIAGNOSTIC 3166 if (!exfer->isdone) { 3167 printf("ehci_device_intr_done: not done, ex=%p\n", 3168 exfer); 3169 } 3170 exfer->isdone = 0; 3171 #endif 3172 3173 s = splusb(); 3174 ehci_set_qh_qtd(sqh, data); 3175 if (xfer->timeout && !sc->sc_bus.use_polling) { 3176 usb_callout(xfer->timeout_handle, 3177 mstohz(xfer->timeout), ehci_timeout, xfer); 3178 } 3179 splx(s); 3180 3181 xfer->status = USBD_IN_PROGRESS; 3182 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3183 ehci_del_intr_list(ex); /* remove from active list */ 3184 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3185 } 3186 #undef exfer 3187 } 3188 3189 /************************/ 3190 3191 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3192 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3193 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3194 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3195 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3196
Indexes created Thu Sep 25 06:09:39 GMT 2025