ehci.c revision 1.11
1 /* TODO 2 Add intrinfo. 3 USB 2 reset is 50 ms? 4 Frame lengths of control and bulk are 64, 512? 5 Indicator light bit. 6 Check 7.1.7.3 7 */ 8 /* $NetBSD: ehci.c,v 1.11 2001/11/20 13:49:07 augustss Exp $ */ 9 10 /* 11 * Copyright (c) 2001 The NetBSD Foundation, Inc. 12 * All rights reserved. 13 * 14 * This code is derived from software contributed to The NetBSD Foundation 15 * by Lennart Augustsson (lennart (at) augustsson.net). 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. All advertising materials mentioning features or use of this software 26 * must display the following acknowledgement: 27 * This product includes software developed by the NetBSD 28 * Foundation, Inc. and its contributors. 29 * 4. Neither the name of The NetBSD Foundation nor the names of its 30 * contributors may be used to endorse or promote products derived 31 * from this software without specific prior written permission. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 34 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 35 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 36 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 37 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 38 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 39 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 40 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 41 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 43 * POSSIBILITY OF SUCH DAMAGE. 44 */ 45 46 /* 47 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 48 * 49 * The EHCI 0.96 spec can be found at 50 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 51 * and the USB 2.0 spec at 52 * http://www.usb.org/developers/data/usb_20.zip 53 * 54 */ 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.11 2001/11/20 13:49:07 augustss Exp $"); 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kernel.h> 62 #include <sys/malloc.h> 63 #include <sys/device.h> 64 #include <sys/select.h> 65 #include <sys/proc.h> 66 #include <sys/queue.h> 67 68 #include <machine/bus.h> 69 #include <machine/endian.h> 70 71 #include <dev/usb/usb.h> 72 #include <dev/usb/usbdi.h> 73 #include <dev/usb/usbdivar.h> 74 #include <dev/usb/usb_mem.h> 75 #include <dev/usb/usb_quirks.h> 76 77 #include <dev/usb/ehcireg.h> 78 #include <dev/usb/ehcivar.h> 79 80 #ifdef EHCI_DEBUG 81 #define DPRINTF(x) if (ehcidebug) printf x 82 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 83 int ehcidebug = 0; 84 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 struct ehci_pipe { 91 struct usbd_pipe pipe; 92 ehci_soft_qh_t *sqh; 93 union { 94 ehci_soft_qtd_t *qtd; 95 /* ehci_soft_itd_t *itd; */ 96 } tail; 97 union { 98 /* Control pipe */ 99 struct { 100 usb_dma_t reqdma; 101 u_int length; 102 ehci_soft_qtd_t *setup, *data, *stat; 103 } ctl; 104 /* Interrupt pipe */ 105 /* Bulk pipe */ 106 struct { 107 u_int length; 108 int isread; 109 } bulk; 110 /* Iso pipe */ 111 } u; 112 }; 113 114 Static void ehci_shutdown(void *); 115 Static void ehci_power(int, void *); 116 117 Static usbd_status ehci_open(usbd_pipe_handle); 118 Static void ehci_poll(struct usbd_bus *); 119 Static void ehci_softintr(void *); 120 Static int ehci_intr1(ehci_softc_t *); 121 122 123 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 124 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 125 126 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 127 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 128 129 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 130 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 131 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 132 Static void ehci_root_ctrl_close(usbd_pipe_handle); 133 Static void ehci_root_ctrl_done(usbd_xfer_handle); 134 135 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 136 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 137 Static void ehci_root_intr_abort(usbd_xfer_handle); 138 Static void ehci_root_intr_close(usbd_pipe_handle); 139 Static void ehci_root_intr_done(usbd_xfer_handle); 140 141 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 142 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 143 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 144 Static void ehci_device_ctrl_close(usbd_pipe_handle); 145 Static void ehci_device_ctrl_done(usbd_xfer_handle); 146 147 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 148 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 149 Static void ehci_device_bulk_abort(usbd_xfer_handle); 150 Static void ehci_device_bulk_close(usbd_pipe_handle); 151 Static void ehci_device_bulk_done(usbd_xfer_handle); 152 153 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 154 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 155 Static void ehci_device_intr_abort(usbd_xfer_handle); 156 Static void ehci_device_intr_close(usbd_pipe_handle); 157 Static void ehci_device_intr_done(usbd_xfer_handle); 158 159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 161 Static void ehci_device_isoc_abort(usbd_xfer_handle); 162 Static void ehci_device_isoc_close(usbd_pipe_handle); 163 Static void ehci_device_isoc_done(usbd_xfer_handle); 164 165 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 166 Static void ehci_noop(usbd_pipe_handle pipe); 167 168 Static int ehci_str(usb_string_descriptor_t *, int, char *); 169 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 170 Static void ehci_pcd_able(ehci_softc_t *, int); 171 Static void ehci_pcd_enable(void *); 172 Static void ehci_disown(ehci_softc_t *, int, int); 173 174 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 175 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 176 177 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 178 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 179 180 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 181 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 182 ehci_soft_qh_t *); 183 Static void ehci_sync_hc(ehci_softc_t *); 184 185 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 186 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 187 188 #ifdef EHCI_DEBUG 189 Static void ehci_dumpregs(ehci_softc_t *); 190 Static void ehci_dump(void); 191 Static ehci_softc_t *theehci; 192 Static void ehci_dump_link(ehci_link_t); 193 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 194 Static void ehci_dump_qtd(ehci_qtd_t *); 195 Static void ehci_dump_sqh(ehci_soft_qh_t *); 196 #endif 197 198 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 199 200 #define EHCI_INTR_ENDPT 1 201 202 Static struct usbd_bus_methods ehci_bus_methods = { 203 ehci_open, 204 ehci_softintr, 205 ehci_poll, 206 ehci_allocm, 207 ehci_freem, 208 ehci_allocx, 209 ehci_freex, 210 }; 211 212 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 213 ehci_root_ctrl_transfer, 214 ehci_root_ctrl_start, 215 ehci_root_ctrl_abort, 216 ehci_root_ctrl_close, 217 ehci_noop, 218 ehci_root_ctrl_done, 219 }; 220 221 Static struct usbd_pipe_methods ehci_root_intr_methods = { 222 ehci_root_intr_transfer, 223 ehci_root_intr_start, 224 ehci_root_intr_abort, 225 ehci_root_intr_close, 226 ehci_noop, 227 ehci_root_intr_done, 228 }; 229 230 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 231 ehci_device_ctrl_transfer, 232 ehci_device_ctrl_start, 233 ehci_device_ctrl_abort, 234 ehci_device_ctrl_close, 235 ehci_noop, 236 ehci_device_ctrl_done, 237 }; 238 239 Static struct usbd_pipe_methods ehci_device_intr_methods = { 240 ehci_device_intr_transfer, 241 ehci_device_intr_start, 242 ehci_device_intr_abort, 243 ehci_device_intr_close, 244 ehci_device_clear_toggle, 245 ehci_device_intr_done, 246 }; 247 248 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 249 ehci_device_bulk_transfer, 250 ehci_device_bulk_start, 251 ehci_device_bulk_abort, 252 ehci_device_bulk_close, 253 ehci_device_clear_toggle, 254 ehci_device_bulk_done, 255 }; 256 257 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 258 ehci_device_isoc_transfer, 259 ehci_device_isoc_start, 260 ehci_device_isoc_abort, 261 ehci_device_isoc_close, 262 ehci_noop, 263 ehci_device_isoc_done, 264 }; 265 266 usbd_status 267 ehci_init(ehci_softc_t *sc) 268 { 269 u_int32_t version, sparams, cparams, hcr; 270 u_int i; 271 usbd_status err; 272 ehci_soft_qh_t *sqh; 273 274 DPRINTF(("ehci_init: start\n")); 275 #ifdef EHCI_DEBUG 276 theehci = sc; 277 #endif 278 279 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 280 281 version = EREAD2(sc, EHCI_HCIVERSION); 282 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 283 version >> 8, version & 0xff); 284 285 sparams = EREAD4(sc, EHCI_HCSPARAMS); 286 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 287 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 288 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 289 printf("%s: wrong number of companions (%d != %d)\n", 290 USBDEVNAME(sc->sc_bus.bdev), 291 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 292 return (USBD_IOERROR); 293 } 294 if (sc->sc_ncomp > 0) { 295 printf("%s: companion controller%s, %d port%s each:", 296 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 297 EHCI_HCS_N_PCC(sparams), 298 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 299 for (i = 0; i < sc->sc_ncomp; i++) 300 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 301 printf("\n"); 302 } 303 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 304 cparams = EREAD4(sc, EHCI_HCCPARAMS); 305 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 306 307 sc->sc_bus.usbrev = USBREV_2_0; 308 309 /* Reset the controller */ 310 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 311 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 312 usb_delay_ms(&sc->sc_bus, 1); 313 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 314 for (i = 0; i < 100; i++) { 315 delay(10); 316 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 317 if (!hcr) 318 break; 319 } 320 if (hcr) { 321 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 322 return (USBD_IOERROR); 323 } 324 325 /* frame list size at default, read back what we got and use that */ 326 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 327 case 0: sc->sc_flsize = 1024*4; break; 328 case 1: sc->sc_flsize = 512*4; break; 329 case 2: sc->sc_flsize = 256*4; break; 330 case 3: return (USBD_IOERROR); 331 } 332 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 333 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 334 if (err) 335 return (err); 336 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 337 338 /* Set up the bus struct. */ 339 sc->sc_bus.methods = &ehci_bus_methods; 340 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 341 342 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 343 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 344 345 sc->sc_eintrs = EHCI_NORMAL_INTRS; 346 347 /* Allocate dummy QH that starts the async list. */ 348 sqh = ehci_alloc_sqh(sc); 349 if (sqh == NULL) { 350 err = USBD_NOMEM; 351 goto bad1; 352 } 353 /* Fill the QH */ 354 sqh->qh.qh_endp = 355 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 356 sqh->qh.qh_link = 357 htole32(sqh->physaddr | EHCI_LINK_QH); 358 sqh->qh.qh_curqtd = EHCI_NULL; 359 sqh->next = NULL; 360 /* Fill the overlay qTD */ 361 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 362 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 363 sqh->qh.qh_qtd.qtd_status = 364 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 365 sqh->sqtd = NULL; 366 #ifdef EHCI_DEBUG 367 if (ehcidebug) { 368 ehci_dump_sqh(sc->sc_async_head); 369 } 370 #endif 371 372 /* Point to async list */ 373 sc->sc_async_head = sqh; 374 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 375 376 usb_callout_init(sc->sc_tmo_pcd); 377 378 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 379 380 /* Enable interrupts */ 381 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 382 383 /* Turn on controller */ 384 EOWRITE4(sc, EHCI_USBCMD, 385 EHCI_CMD_ITC_8 | /* 8 microframes */ 386 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 387 EHCI_CMD_ASE | 388 /* EHCI_CMD_PSE | */ 389 EHCI_CMD_RS); 390 391 /* Take over port ownership */ 392 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 393 394 for (i = 0; i < 100; i++) { 395 delay(10); 396 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 397 if (!hcr) 398 break; 399 } 400 if (hcr) { 401 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 402 return (USBD_IOERROR); 403 } 404 405 return (USBD_NORMAL_COMPLETION); 406 407 #if 0 408 bad3: 409 ehci_free_sqh(sc, sc->sc_ctrl_head); 410 bad2: 411 ehci_free_sqtd(sc, sc->sc_bulk_head->sqtd); 412 #endif 413 bad1: 414 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 415 return (err); 416 } 417 418 int 419 ehci_intr(void *v) 420 { 421 ehci_softc_t *sc = v; 422 423 /* If we get an interrupt while polling, then just ignore it. */ 424 if (sc->sc_bus.use_polling) { 425 #ifdef DIAGNOSTIC 426 printf("ehci_intr: ignored interrupt while polling\n"); 427 #endif 428 return (0); 429 } 430 431 return (ehci_intr1(sc)); 432 } 433 434 Static int 435 ehci_intr1(ehci_softc_t *sc) 436 { 437 u_int32_t intrs, eintrs; 438 439 DPRINTFN(20,("ehci_intr1: enter\n")); 440 441 /* In case the interrupt occurs before initialization has completed. */ 442 if (sc == NULL) { 443 #ifdef DIAGNOSTIC 444 printf("ehci_intr: sc == NULL\n"); 445 #endif 446 return (0); 447 } 448 449 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 450 451 if (!intrs) 452 return (0); 453 454 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 455 eintrs = intrs & sc->sc_eintrs; 456 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 457 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 458 (u_int)eintrs)); 459 if (!eintrs) 460 return (0); 461 462 sc->sc_bus.intr_context++; 463 sc->sc_bus.no_intrs++; 464 if (eintrs & EHCI_STS_IAA) { 465 DPRINTF(("ehci_intr1: door bell\n")); 466 wakeup(&sc->sc_async_head); 467 eintrs &= ~EHCI_STS_INT; 468 } 469 if (eintrs & EHCI_STS_INT) { 470 DPRINTF(("ehci_intr1: something is done\n")); 471 eintrs &= ~EHCI_STS_INT; 472 } 473 if (eintrs & EHCI_STS_ERRINT) { 474 DPRINTF(("ehci_intr1: some error\n")); 475 eintrs &= ~EHCI_STS_HSE; 476 } 477 if (eintrs & EHCI_STS_HSE) { 478 printf("%s: unrecoverable error, controller halted\n", 479 USBDEVNAME(sc->sc_bus.bdev)); 480 /* XXX what else */ 481 } 482 if (eintrs & EHCI_STS_PCD) { 483 ehci_pcd(sc, sc->sc_intrxfer); 484 /* 485 * Disable PCD interrupt for now, because it will be 486 * on until the port has been reset. 487 */ 488 ehci_pcd_able(sc, 0); 489 /* Do not allow RHSC interrupts > 1 per second */ 490 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 491 eintrs &= ~EHCI_STS_PCD; 492 } 493 494 sc->sc_bus.intr_context--; 495 496 if (eintrs != 0) { 497 /* Block unprocessed interrupts. */ 498 sc->sc_eintrs &= ~eintrs; 499 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 500 printf("%s: blocking intrs 0x%x\n", 501 USBDEVNAME(sc->sc_bus.bdev), eintrs); 502 } 503 504 return (1); 505 } 506 507 void 508 ehci_pcd_able(ehci_softc_t *sc, int on) 509 { 510 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 511 if (on) 512 sc->sc_eintrs |= EHCI_STS_PCD; 513 else 514 sc->sc_eintrs &= ~EHCI_STS_PCD; 515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 516 } 517 518 void 519 ehci_pcd_enable(void *v_sc) 520 { 521 ehci_softc_t *sc = v_sc; 522 523 ehci_pcd_able(sc, 1); 524 } 525 526 void 527 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 528 { 529 usbd_pipe_handle pipe; 530 struct ehci_pipe *opipe; 531 u_char *p; 532 int i, m; 533 534 if (xfer == NULL) { 535 /* Just ignore the change. */ 536 return; 537 } 538 539 pipe = xfer->pipe; 540 opipe = (struct ehci_pipe *)pipe; 541 542 p = KERNADDR(&xfer->dmabuf); 543 m = min(sc->sc_noport, xfer->length * 8 - 1); 544 memset(p, 0, xfer->length); 545 for (i = 1; i <= m; i++) { 546 /* Pick out CHANGE bits from the status reg. */ 547 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 548 p[i/8] |= 1 << (i%8); 549 } 550 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 551 xfer->actlen = xfer->length; 552 xfer->status = USBD_NORMAL_COMPLETION; 553 554 usb_transfer_complete(xfer); 555 } 556 557 void 558 ehci_softintr(void *v) 559 { 560 //ehci_softc_t *sc = v; 561 } 562 563 void 564 ehci_poll(struct usbd_bus *bus) 565 { 566 ehci_softc_t *sc = (ehci_softc_t *)bus; 567 #ifdef EHCI_DEBUG 568 static int last; 569 int new; 570 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 571 if (new != last) { 572 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 573 last = new; 574 } 575 #endif 576 577 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 578 ehci_intr1(sc); 579 } 580 581 int 582 ehci_detach(struct ehci_softc *sc, int flags) 583 { 584 int rv = 0; 585 586 if (sc->sc_child != NULL) 587 rv = config_detach(sc->sc_child, flags); 588 589 if (rv != 0) 590 return (rv); 591 592 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 593 594 if (sc->sc_powerhook != NULL) 595 powerhook_disestablish(sc->sc_powerhook); 596 if (sc->sc_shutdownhook != NULL) 597 shutdownhook_disestablish(sc->sc_shutdownhook); 598 599 /* XXX free other data structures XXX */ 600 601 return (rv); 602 } 603 604 605 int 606 ehci_activate(device_ptr_t self, enum devact act) 607 { 608 struct ehci_softc *sc = (struct ehci_softc *)self; 609 int rv = 0; 610 611 switch (act) { 612 case DVACT_ACTIVATE: 613 return (EOPNOTSUPP); 614 break; 615 616 case DVACT_DEACTIVATE: 617 if (sc->sc_child != NULL) 618 rv = config_deactivate(sc->sc_child); 619 sc->sc_dying = 1; 620 break; 621 } 622 return (rv); 623 } 624 625 /* 626 * Handle suspend/resume. 627 * 628 * We need to switch to polling mode here, because this routine is 629 * called from an intterupt context. This is all right since we 630 * are almost suspended anyway. 631 */ 632 void 633 ehci_power(int why, void *v) 634 { 635 ehci_softc_t *sc = v; 636 //u_int32_t ctl; 637 int s; 638 639 #ifdef EHCI_DEBUG 640 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 641 ehci_dumpregs(sc); 642 #endif 643 644 s = splhardusb(); 645 switch (why) { 646 case PWR_SUSPEND: 647 case PWR_STANDBY: 648 sc->sc_bus.use_polling++; 649 #if 0 650 OOO 651 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 652 if (sc->sc_control == 0) { 653 /* 654 * Preserve register values, in case that APM BIOS 655 * does not recover them. 656 */ 657 sc->sc_control = ctl; 658 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 659 } 660 ctl |= EHCI_HCFS_SUSPEND; 661 OWRITE4(sc, EHCI_CONTROL, ctl); 662 #endif 663 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 664 sc->sc_bus.use_polling--; 665 break; 666 case PWR_RESUME: 667 sc->sc_bus.use_polling++; 668 #if 0 669 OOO 670 /* Some broken BIOSes do not recover these values */ 671 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 672 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 673 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 674 if (sc->sc_intre) 675 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 676 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 677 if (sc->sc_control) 678 ctl = sc->sc_control; 679 else 680 ctl = OREAD4(sc, EHCI_CONTROL); 681 ctl |= EHCI_HCFS_RESUME; 682 OWRITE4(sc, EHCI_CONTROL, ctl); 683 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 684 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 685 OWRITE4(sc, EHCI_CONTROL, ctl); 686 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 687 sc->sc_control = sc->sc_intre = 0; 688 #endif 689 sc->sc_bus.use_polling--; 690 break; 691 case PWR_SOFTSUSPEND: 692 case PWR_SOFTSTANDBY: 693 case PWR_SOFTRESUME: 694 break; 695 } 696 splx(s); 697 } 698 699 /* 700 * Shut down the controller when the system is going down. 701 */ 702 void 703 ehci_shutdown(void *v) 704 { 705 ehci_softc_t *sc = v; 706 707 DPRINTF(("ehci_shutdown: stopping the HC\n")); 708 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 709 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 710 } 711 712 usbd_status 713 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 714 { 715 struct ehci_softc *sc = (struct ehci_softc *)bus; 716 717 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 718 } 719 720 void 721 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 722 { 723 struct ehci_softc *sc = (struct ehci_softc *)bus; 724 725 usb_freemem(&sc->sc_bus, dma); 726 } 727 728 usbd_xfer_handle 729 ehci_allocx(struct usbd_bus *bus) 730 { 731 struct ehci_softc *sc = (struct ehci_softc *)bus; 732 usbd_xfer_handle xfer; 733 734 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 735 if (xfer != NULL) 736 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 737 else 738 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 739 if (xfer != NULL) 740 memset(xfer, 0, sizeof *xfer); 741 return (xfer); 742 } 743 744 void 745 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 746 { 747 struct ehci_softc *sc = (struct ehci_softc *)bus; 748 749 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 750 } 751 752 Static void 753 ehci_device_clear_toggle(usbd_pipe_handle pipe) 754 { 755 #if 0 756 OOO 757 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 758 759 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 760 #endif 761 } 762 763 Static void 764 ehci_noop(usbd_pipe_handle pipe) 765 { 766 } 767 768 #ifdef EHCI_DEBUG 769 void 770 ehci_dumpregs(ehci_softc_t *sc) 771 { 772 int i; 773 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 774 EOREAD4(sc, EHCI_USBCMD), 775 EOREAD4(sc, EHCI_USBSTS), 776 EOREAD4(sc, EHCI_USBINTR)); 777 for (i = 1; i <= sc->sc_noport; i++) 778 printf("port %d status=0x%08x\n", i, 779 EOREAD4(sc, EHCI_PORTSC(i))); 780 } 781 782 void 783 ehci_dump() 784 { 785 ehci_dumpregs(theehci); 786 } 787 788 void 789 ehci_dump_link(ehci_link_t link) 790 { 791 printf("0x%08x<", link); 792 switch (EHCI_LINK_TYPE(link)) { 793 case EHCI_LINK_ITD: printf("ITD"); break; 794 case EHCI_LINK_QH: printf("QH"); break; 795 case EHCI_LINK_SITD: printf("SITD"); break; 796 case EHCI_LINK_FSTN: printf("FSTN"); break; 797 } 798 if (link & EHCI_LINK_TERMINATE) 799 printf(",T>"); 800 else 801 printf(">"); 802 } 803 804 void 805 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 806 { 807 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 808 ehci_dump_qtd(&sqtd->qtd); 809 } 810 811 void 812 ehci_dump_qtd(ehci_qtd_t *qtd) 813 { 814 u_int32_t s; 815 816 printf(" next="); ehci_dump_link(qtd->qtd_next); 817 printf("altnext="); ehci_dump_link(qtd->qtd_altnext); 818 printf("\n"); 819 s = qtd->qtd_status; 820 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 821 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 822 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 823 printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s), 824 EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s)); 825 for (s = 0; s < 5; s++) 826 printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]); 827 } 828 829 void 830 ehci_dump_sqh(ehci_soft_qh_t *sqh) 831 { 832 ehci_qh_t *qh = &sqh->qh; 833 834 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 835 printf(" link="); ehci_dump_link(qh->qh_link); printf("\n"); 836 printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub); 837 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n "); 838 ehci_dump_qtd(&qh->qh_qtd); 839 } 840 841 #endif 842 843 usbd_status 844 ehci_open(usbd_pipe_handle pipe) 845 { 846 usbd_device_handle dev = pipe->device; 847 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 848 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 849 u_int8_t addr = dev->address; 850 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 851 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 852 ehci_soft_qh_t *sqh; 853 usbd_status err; 854 #if 0 855 ehci_soft_itd_t *sitd; 856 ehci_physaddr_t tdphys; 857 u_int32_t fmt; 858 int ival; 859 #endif 860 int s; 861 int speed, naks; 862 863 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 864 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 865 866 if (addr == sc->sc_addr) { 867 switch (ed->bEndpointAddress) { 868 case USB_CONTROL_ENDPOINT: 869 pipe->methods = &ehci_root_ctrl_methods; 870 break; 871 case UE_DIR_IN | EHCI_INTR_ENDPT: 872 pipe->methods = &ehci_root_intr_methods; 873 break; 874 default: 875 return (USBD_INVAL); 876 } 877 return (USBD_NORMAL_COMPLETION); 878 } 879 880 switch (dev->speed) { 881 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 882 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 883 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 884 default: panic("ehci_open: bad device speed %d\n", dev->speed); 885 } 886 naks = 8; /* XXX */ 887 sqh = ehci_alloc_sqh(sc); 888 if (sqh == NULL) 889 goto bad0; 890 /* qh_link filled when the QH is added */ 891 sqh->qh.qh_endp = htole32( 892 EHCI_QH_SET_ADDR(addr) | 893 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 894 EHCI_QH_SET_EPS(speed) | /* XXX */ 895 /* XXX EHCI_QH_DTC ? */ 896 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 897 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 898 EHCI_QH_CTL : 0) | 899 EHCI_QH_SET_NRL(naks) 900 ); 901 sqh->qh.qh_endphub = htole32( 902 EHCI_QH_SET_MULT(1) 903 /* XXX TT stuff */ 904 /* XXX interrupt mask */ 905 ); 906 sqh->qh.qh_curqtd = EHCI_NULL; 907 /* Fill the overlay qTD */ 908 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 909 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 910 sqh->qh.qh_qtd.qtd_status = 911 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 912 913 epipe->sqh = sqh; 914 915 switch (xfertype) { 916 case UE_CONTROL: 917 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 918 0, &epipe->u.ctl.reqdma); 919 if (err) 920 goto bad1; 921 pipe->methods = &ehci_device_ctrl_methods; 922 s = splusb(); 923 ehci_add_qh(sqh, sc->sc_async_head); 924 splx(s); 925 break; 926 case UE_BULK: 927 pipe->methods = &ehci_device_bulk_methods; 928 s = splusb(); 929 ehci_add_qh(sqh, sc->sc_async_head); 930 splx(s); 931 break; 932 default: 933 return (USBD_INVAL); 934 } 935 return (USBD_NORMAL_COMPLETION); 936 937 bad1: 938 ehci_free_sqh(sc, sqh); 939 bad0: 940 return (USBD_NOMEM); 941 } 942 943 /* 944 * Add an ED to the schedule. Called at splusb(). 945 */ 946 void 947 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 948 { 949 SPLUSBCHECK; 950 951 sqh->next = head->next; 952 sqh->qh.qh_link = head->qh.qh_link; 953 head->next = sqh; 954 head->qh.qh_link = htole32(sqh->physaddr); 955 956 #ifdef EHCI_DEBUG 957 if (ehcidebug > 0) { 958 printf("ehci_add_qh:\n"); 959 ehci_dump_sqh(sqh); 960 } 961 #endif 962 } 963 964 /* 965 * Remove an ED from the schedule. Called at splusb(). 966 */ 967 void 968 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 969 { 970 ehci_soft_qh_t *p; 971 972 SPLUSBCHECK; 973 /* XXX */ 974 for (p = head; p == NULL && p->next != sqh; p = p->next) 975 ; 976 if (p == NULL) 977 panic("ehci_rem_qh: ED not found\n"); 978 p->next = sqh->next; 979 p->qh.qh_link = sqh->qh.qh_link; 980 981 ehci_sync_hc(sc); 982 } 983 984 /* 985 * Ensure that the HC has released all references to the QH. We do this 986 * by asking for a Async Advance Doorbell interrupt and then we wait for 987 * the interrupt. 988 * To make this easier we first obtain exclusive use of the doorbell. 989 */ 990 void 991 ehci_sync_hc(ehci_softc_t *sc) 992 { 993 int s; 994 995 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 996 s = splhardusb(); 997 /* ask for doorbell */ 998 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 999 tsleep(&sc->sc_async_head, PZERO, "ehcidi", 0); /* wait for doorbell */ 1000 splx(s); 1001 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1002 } 1003 1004 /***********/ 1005 1006 /* 1007 * Data structures and routines to emulate the root hub. 1008 */ 1009 Static usb_device_descriptor_t ehci_devd = { 1010 USB_DEVICE_DESCRIPTOR_SIZE, 1011 UDESC_DEVICE, /* type */ 1012 {0x00, 0x02}, /* USB version */ 1013 UDCLASS_HUB, /* class */ 1014 UDSUBCLASS_HUB, /* subclass */ 1015 UDPROTO_HSHUBSTT, /* protocol */ 1016 64, /* max packet */ 1017 {0},{0},{0x00,0x01}, /* device id */ 1018 1,2,0, /* string indicies */ 1019 1 /* # of configurations */ 1020 }; 1021 1022 Static usb_device_qualifier_t ehci_odevd = { 1023 USB_DEVICE_DESCRIPTOR_SIZE, 1024 UDESC_DEVICE_QUALIFIER, /* type */ 1025 {0x00, 0x02}, /* USB version */ 1026 UDCLASS_HUB, /* class */ 1027 UDSUBCLASS_HUB, /* subclass */ 1028 UDPROTO_FSHUB, /* protocol */ 1029 64, /* max packet */ 1030 1, /* # of configurations */ 1031 0 1032 }; 1033 1034 Static usb_config_descriptor_t ehci_confd = { 1035 USB_CONFIG_DESCRIPTOR_SIZE, 1036 UDESC_CONFIG, 1037 {USB_CONFIG_DESCRIPTOR_SIZE + 1038 USB_INTERFACE_DESCRIPTOR_SIZE + 1039 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1040 1, 1041 1, 1042 0, 1043 UC_SELF_POWERED, 1044 0 /* max power */ 1045 }; 1046 1047 Static usb_interface_descriptor_t ehci_ifcd = { 1048 USB_INTERFACE_DESCRIPTOR_SIZE, 1049 UDESC_INTERFACE, 1050 0, 1051 0, 1052 1, 1053 UICLASS_HUB, 1054 UISUBCLASS_HUB, 1055 UIPROTO_HSHUBSTT, 1056 0 1057 }; 1058 1059 Static usb_endpoint_descriptor_t ehci_endpd = { 1060 USB_ENDPOINT_DESCRIPTOR_SIZE, 1061 UDESC_ENDPOINT, 1062 UE_DIR_IN | EHCI_INTR_ENDPT, 1063 UE_INTERRUPT, 1064 {8, 0}, /* max packet */ 1065 255 1066 }; 1067 1068 Static usb_hub_descriptor_t ehci_hubd = { 1069 USB_HUB_DESCRIPTOR_SIZE, 1070 UDESC_HUB, 1071 0, 1072 {0,0}, 1073 0, 1074 0, 1075 {0}, 1076 }; 1077 1078 Static int 1079 ehci_str(p, l, s) 1080 usb_string_descriptor_t *p; 1081 int l; 1082 char *s; 1083 { 1084 int i; 1085 1086 if (l == 0) 1087 return (0); 1088 p->bLength = 2 * strlen(s) + 2; 1089 if (l == 1) 1090 return (1); 1091 p->bDescriptorType = UDESC_STRING; 1092 l -= 2; 1093 for (i = 0; s[i] && l > 1; i++, l -= 2) 1094 USETW2(p->bString[i], 0, s[i]); 1095 return (2*i+2); 1096 } 1097 1098 /* 1099 * Simulate a hardware hub by handling all the necessary requests. 1100 */ 1101 Static usbd_status 1102 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1103 { 1104 usbd_status err; 1105 1106 /* Insert last in queue. */ 1107 err = usb_insert_transfer(xfer); 1108 if (err) 1109 return (err); 1110 1111 /* Pipe isn't running, start first */ 1112 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1113 } 1114 1115 Static usbd_status 1116 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1117 { 1118 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1119 usb_device_request_t *req; 1120 void *buf = NULL; 1121 int port, i; 1122 int s, len, value, index, l, totlen = 0; 1123 usb_port_status_t ps; 1124 usb_hub_descriptor_t hubd; 1125 usbd_status err; 1126 u_int32_t v; 1127 1128 if (sc->sc_dying) 1129 return (USBD_IOERROR); 1130 1131 #ifdef DIAGNOSTIC 1132 if (!(xfer->rqflags & URQ_REQUEST)) 1133 /* XXX panic */ 1134 return (USBD_INVAL); 1135 #endif 1136 req = &xfer->request; 1137 1138 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1139 req->bmRequestType, req->bRequest)); 1140 1141 len = UGETW(req->wLength); 1142 value = UGETW(req->wValue); 1143 index = UGETW(req->wIndex); 1144 1145 if (len != 0) 1146 buf = KERNADDR(&xfer->dmabuf); 1147 1148 #define C(x,y) ((x) | ((y) << 8)) 1149 switch(C(req->bRequest, req->bmRequestType)) { 1150 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1151 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1152 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1153 /* 1154 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1155 * for the integrated root hub. 1156 */ 1157 break; 1158 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1159 if (len > 0) { 1160 *(u_int8_t *)buf = sc->sc_conf; 1161 totlen = 1; 1162 } 1163 break; 1164 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1165 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1166 switch(value >> 8) { 1167 case UDESC_DEVICE: 1168 if ((value & 0xff) != 0) { 1169 err = USBD_IOERROR; 1170 goto ret; 1171 } 1172 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1173 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1174 memcpy(buf, &ehci_devd, l); 1175 break; 1176 /* 1177 * We can't really operate at another speed, but the spec says 1178 * we need this descriptor. 1179 */ 1180 case UDESC_DEVICE_QUALIFIER: 1181 if ((value & 0xff) != 0) { 1182 err = USBD_IOERROR; 1183 goto ret; 1184 } 1185 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1186 memcpy(buf, &ehci_odevd, l); 1187 break; 1188 /* 1189 * We can't really operate at another speed, but the spec says 1190 * we need this descriptor. 1191 */ 1192 case UDESC_OTHER_SPEED_CONFIGURATION: 1193 case UDESC_CONFIG: 1194 if ((value & 0xff) != 0) { 1195 err = USBD_IOERROR; 1196 goto ret; 1197 } 1198 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1199 memcpy(buf, &ehci_confd, l); 1200 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1201 value >> 8; 1202 buf = (char *)buf + l; 1203 len -= l; 1204 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1205 totlen += l; 1206 memcpy(buf, &ehci_ifcd, l); 1207 buf = (char *)buf + l; 1208 len -= l; 1209 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1210 totlen += l; 1211 memcpy(buf, &ehci_endpd, l); 1212 break; 1213 case UDESC_STRING: 1214 if (len == 0) 1215 break; 1216 *(u_int8_t *)buf = 0; 1217 totlen = 1; 1218 switch (value & 0xff) { 1219 case 1: /* Vendor */ 1220 totlen = ehci_str(buf, len, sc->sc_vendor); 1221 break; 1222 case 2: /* Product */ 1223 totlen = ehci_str(buf, len, "EHCI root hub"); 1224 break; 1225 } 1226 break; 1227 default: 1228 err = USBD_IOERROR; 1229 goto ret; 1230 } 1231 break; 1232 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1233 if (len > 0) { 1234 *(u_int8_t *)buf = 0; 1235 totlen = 1; 1236 } 1237 break; 1238 case C(UR_GET_STATUS, UT_READ_DEVICE): 1239 if (len > 1) { 1240 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1241 totlen = 2; 1242 } 1243 break; 1244 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1245 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1246 if (len > 1) { 1247 USETW(((usb_status_t *)buf)->wStatus, 0); 1248 totlen = 2; 1249 } 1250 break; 1251 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1252 if (value >= USB_MAX_DEVICES) { 1253 err = USBD_IOERROR; 1254 goto ret; 1255 } 1256 sc->sc_addr = value; 1257 break; 1258 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1259 if (value != 0 && value != 1) { 1260 err = USBD_IOERROR; 1261 goto ret; 1262 } 1263 sc->sc_conf = value; 1264 break; 1265 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1266 break; 1267 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1268 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1269 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1270 err = USBD_IOERROR; 1271 goto ret; 1272 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1273 break; 1274 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1275 break; 1276 /* Hub requests */ 1277 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1278 break; 1279 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1280 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1281 "port=%d feature=%d\n", 1282 index, value)); 1283 if (index < 1 || index > sc->sc_noport) { 1284 err = USBD_IOERROR; 1285 goto ret; 1286 } 1287 port = EHCI_PORTSC(index); 1288 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1289 switch(value) { 1290 case UHF_PORT_ENABLE: 1291 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1292 break; 1293 case UHF_PORT_SUSPEND: 1294 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1295 break; 1296 case UHF_PORT_POWER: 1297 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1298 break; 1299 case UHF_C_PORT_CONNECTION: 1300 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1301 break; 1302 case UHF_C_PORT_ENABLE: 1303 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1304 break; 1305 case UHF_C_PORT_SUSPEND: 1306 /* how? */ 1307 break; 1308 case UHF_C_PORT_OVER_CURRENT: 1309 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1310 break; 1311 case UHF_C_PORT_RESET: 1312 sc->sc_isreset = 0; 1313 break; 1314 default: 1315 err = USBD_IOERROR; 1316 goto ret; 1317 } 1318 #if 0 1319 switch(value) { 1320 case UHF_C_PORT_CONNECTION: 1321 case UHF_C_PORT_ENABLE: 1322 case UHF_C_PORT_SUSPEND: 1323 case UHF_C_PORT_OVER_CURRENT: 1324 case UHF_C_PORT_RESET: 1325 /* Enable RHSC interrupt if condition is cleared. */ 1326 if ((OREAD4(sc, port) >> 16) == 0) 1327 ehci_pcd_able(sc, 1); 1328 break; 1329 default: 1330 break; 1331 } 1332 #endif 1333 break; 1334 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1335 if (value != 0) { 1336 err = USBD_IOERROR; 1337 goto ret; 1338 } 1339 hubd = ehci_hubd; 1340 hubd.bNbrPorts = sc->sc_noport; 1341 v = EOREAD4(sc, EHCI_HCSPARAMS); 1342 USETW(hubd.wHubCharacteristics, 1343 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH); 1344 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1345 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1346 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1347 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1348 l = min(len, hubd.bDescLength); 1349 totlen = l; 1350 memcpy(buf, &hubd, l); 1351 break; 1352 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1353 if (len != 4) { 1354 err = USBD_IOERROR; 1355 goto ret; 1356 } 1357 memset(buf, 0, len); /* ? XXX */ 1358 totlen = len; 1359 break; 1360 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1361 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1362 index)); 1363 if (index < 1 || index > sc->sc_noport) { 1364 err = USBD_IOERROR; 1365 goto ret; 1366 } 1367 if (len != 4) { 1368 err = USBD_IOERROR; 1369 goto ret; 1370 } 1371 v = EOREAD4(sc, EHCI_PORTSC(index)); 1372 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1373 v)); 1374 i = UPS_HIGH_SPEED; 1375 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1376 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1377 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1378 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1379 if (v & EHCI_PS_PR) i |= UPS_RESET; 1380 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1381 USETW(ps.wPortStatus, i); 1382 i = 0; 1383 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1384 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1385 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1386 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1387 USETW(ps.wPortChange, i); 1388 l = min(len, sizeof ps); 1389 memcpy(buf, &ps, l); 1390 totlen = l; 1391 break; 1392 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1393 err = USBD_IOERROR; 1394 goto ret; 1395 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1396 break; 1397 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1398 if (index < 1 || index > sc->sc_noport) { 1399 err = USBD_IOERROR; 1400 goto ret; 1401 } 1402 port = EHCI_PORTSC(index); 1403 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1404 switch(value) { 1405 case UHF_PORT_ENABLE: 1406 EOWRITE4(sc, port, v | EHCI_PS_PE); 1407 break; 1408 case UHF_PORT_SUSPEND: 1409 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1410 break; 1411 case UHF_PORT_RESET: 1412 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1413 index)); 1414 if (EHCI_PS_IS_LOWSPEED(v)) { 1415 /* Low speed device, give up ownership. */ 1416 ehci_disown(sc, index, 1); 1417 break; 1418 } 1419 /* Start reset sequence. */ 1420 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1421 EOWRITE4(sc, port, v | EHCI_PS_PR); 1422 /* Wait for reset to complete. */ 1423 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2); 1424 /* Terminate reset sequence. */ 1425 EOWRITE4(sc, port, v); 1426 /* Wait for HC to complete reset. */ 1427 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2); 1428 v = EOREAD4(sc, port); 1429 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1430 if (v & EHCI_PS_PR) { 1431 printf("%s: port reset timeout\n", 1432 USBDEVNAME(sc->sc_bus.bdev)); 1433 return (USBD_TIMEOUT); 1434 } 1435 if (!(v & EHCI_PS_PE)) { 1436 /* Not a high speed device, give up ownership.*/ 1437 ehci_disown(sc, index, 0); 1438 break; 1439 } 1440 sc->sc_isreset = 1; 1441 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1442 index, v)); 1443 break; 1444 case UHF_PORT_POWER: 1445 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1446 "%d\n", index)); 1447 EOWRITE4(sc, port, v | EHCI_PS_PP); 1448 break; 1449 case UHF_PORT_TEST: 1450 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1451 "%d\n", index)); 1452 break; 1453 case UHF_PORT_INDICATOR: 1454 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1455 "%d\n", index)); 1456 /* XXX */ 1457 break; 1458 default: 1459 err = USBD_IOERROR; 1460 goto ret; 1461 } 1462 break; 1463 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1464 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1465 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1466 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1467 break; 1468 default: 1469 err = USBD_IOERROR; 1470 goto ret; 1471 } 1472 xfer->actlen = totlen; 1473 err = USBD_NORMAL_COMPLETION; 1474 ret: 1475 xfer->status = err; 1476 s = splusb(); 1477 usb_transfer_complete(xfer); 1478 splx(s); 1479 return (USBD_IN_PROGRESS); 1480 } 1481 1482 void 1483 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1484 { 1485 int i, port; 1486 u_int32_t v; 1487 1488 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1489 #ifdef DIAGNOSTIC 1490 if (sc->sc_npcomp != 0) { 1491 i = (index-1) / sc->sc_npcomp; 1492 if (i >= sc->sc_ncomp) 1493 printf("%s: strange port\n", 1494 USBDEVNAME(sc->sc_bus.bdev)); 1495 else 1496 printf("%s: handing over %s speed device on " 1497 "port %d to %s\n", 1498 USBDEVNAME(sc->sc_bus.bdev), 1499 lowspeed ? "low" : "full", 1500 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1501 } else { 1502 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1503 } 1504 #endif 1505 port = EHCI_PORTSC(index); 1506 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1507 EOWRITE4(sc, port, v | EHCI_PS_PO); 1508 } 1509 1510 /* Abort a root control request. */ 1511 Static void 1512 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1513 { 1514 /* Nothing to do, all transfers are synchronous. */ 1515 } 1516 1517 /* Close the root pipe. */ 1518 Static void 1519 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1520 { 1521 DPRINTF(("ehci_root_ctrl_close\n")); 1522 /* Nothing to do. */ 1523 } 1524 1525 void 1526 ehci_root_intr_done(usbd_xfer_handle xfer) 1527 { 1528 xfer->hcpriv = NULL; 1529 } 1530 1531 Static usbd_status 1532 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1533 { 1534 usbd_status err; 1535 1536 /* Insert last in queue. */ 1537 err = usb_insert_transfer(xfer); 1538 if (err) 1539 return (err); 1540 1541 /* Pipe isn't running, start first */ 1542 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1543 } 1544 1545 Static usbd_status 1546 ehci_root_intr_start(usbd_xfer_handle xfer) 1547 { 1548 usbd_pipe_handle pipe = xfer->pipe; 1549 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1550 1551 if (sc->sc_dying) 1552 return (USBD_IOERROR); 1553 1554 sc->sc_intrxfer = xfer; 1555 1556 return (USBD_IN_PROGRESS); 1557 } 1558 1559 /* Abort a root interrupt request. */ 1560 Static void 1561 ehci_root_intr_abort(usbd_xfer_handle xfer) 1562 { 1563 int s; 1564 1565 if (xfer->pipe->intrxfer == xfer) { 1566 DPRINTF(("ehci_root_intr_abort: remove\n")); 1567 xfer->pipe->intrxfer = NULL; 1568 } 1569 xfer->status = USBD_CANCELLED; 1570 s = splusb(); 1571 usb_transfer_complete(xfer); 1572 splx(s); 1573 } 1574 1575 /* Close the root pipe. */ 1576 Static void 1577 ehci_root_intr_close(usbd_pipe_handle pipe) 1578 { 1579 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1580 1581 DPRINTF(("ehci_root_intr_close\n")); 1582 1583 sc->sc_intrxfer = NULL; 1584 } 1585 1586 void 1587 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1588 { 1589 xfer->hcpriv = NULL; 1590 } 1591 1592 /************************/ 1593 1594 ehci_soft_qh_t * 1595 ehci_alloc_sqh(ehci_softc_t *sc) 1596 { 1597 ehci_soft_qh_t *sqh; 1598 usbd_status err; 1599 int i, offs; 1600 usb_dma_t dma; 1601 1602 if (sc->sc_freeqhs == NULL) { 1603 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1604 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1605 EHCI_PAGE_SIZE, &dma); 1606 if (err) 1607 return (NULL); 1608 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1609 offs = i * EHCI_SQH_SIZE; 1610 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1611 sqh->physaddr = DMAADDR(&dma) + offs; 1612 sqh->next = sc->sc_freeqhs; 1613 sc->sc_freeqhs = sqh; 1614 } 1615 } 1616 sqh = sc->sc_freeqhs; 1617 sc->sc_freeqhs = sqh->next; 1618 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1619 sqh->next = NULL; 1620 return (sqh); 1621 } 1622 1623 void 1624 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1625 { 1626 sqh->next = sc->sc_freeqhs; 1627 sc->sc_freeqhs = sqh; 1628 } 1629 1630 ehci_soft_qtd_t * 1631 ehci_alloc_sqtd(ehci_softc_t *sc) 1632 { 1633 ehci_soft_qtd_t *sqtd; 1634 usbd_status err; 1635 int i, offs; 1636 usb_dma_t dma; 1637 int s; 1638 1639 if (sc->sc_freeqtds == NULL) { 1640 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1641 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1642 EHCI_PAGE_SIZE, &dma); 1643 if (err) 1644 return (NULL); 1645 s = splusb(); 1646 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1647 offs = i * EHCI_SQTD_SIZE; 1648 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1649 sqtd->physaddr = DMAADDR(&dma) + offs; 1650 sqtd->nextqtd = sc->sc_freeqtds; 1651 sc->sc_freeqtds = sqtd; 1652 } 1653 splx(s); 1654 } 1655 1656 s = splusb(); 1657 sqtd = sc->sc_freeqtds; 1658 sc->sc_freeqtds = sqtd->nextqtd; 1659 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1660 sqtd->nextqtd = NULL; 1661 sqtd->xfer = NULL; 1662 splx(s); 1663 1664 return (sqtd); 1665 } 1666 1667 void 1668 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1669 { 1670 int s; 1671 1672 s = splusb(); 1673 sqtd->nextqtd = sc->sc_freeqtds; 1674 sc->sc_freeqtds = sqtd; 1675 splx(s); 1676 } 1677 1678 /* 1679 * Close a reqular pipe. 1680 * Assumes that there are no pending transactions. 1681 */ 1682 void 1683 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 1684 { 1685 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1686 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1687 ehci_soft_qh_t *sqh = epipe->sqh; 1688 int s; 1689 1690 s = splusb(); 1691 ehci_rem_qh(sc, sqh, head); 1692 splx(s); 1693 ehci_free_sqh(sc, epipe->sqh); 1694 } 1695 1696 /* 1697 * Abort a device request. 1698 * If this routine is called at splusb() it guarantees that the request 1699 * will be removed from the hardware scheduling and that the callback 1700 * for it will be called with USBD_CANCELLED status. 1701 * It's impossible to guarantee that the requested transfer will not 1702 * have happened since the hardware runs concurrently. 1703 * If the transaction has already happened we rely on the ordinary 1704 * interrupt processing to process it. 1705 */ 1706 void 1707 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1708 { 1709 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 1710 ehci_soft_qh_t *sqh = epipe->sqh; 1711 #if 0 1712 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 1713 ehci_soft_td_t *p, *n; 1714 ehci_physaddr_t headp; 1715 int hit; 1716 #endif 1717 int s; 1718 1719 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 1720 1721 if (xfer->device->bus->intr_context || !curproc) 1722 panic("ehci_abort_xfer: not in process context\n"); 1723 1724 /* 1725 * Step 1: Make interrupt routine and hardware ignore xfer. 1726 */ 1727 s = splusb(); 1728 xfer->status = status; /* make software ignore it */ 1729 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1730 splx(s); 1731 /* XXX */ 1732 1733 /* 1734 * Step 2: Wait until we know hardware has finished any possible 1735 * use of the xfer. Also make sure the soft interrupt routine 1736 * has run. 1737 */ 1738 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 1739 /* XXX should have some communication with softintr() to know 1740 when it's done */ 1741 usb_delay_ms(epipe->pipe.device->bus, 250); 1742 1743 /* 1744 * Step 3: Remove any vestiges of the xfer from the hardware. 1745 * The complication here is that the hardware may have executed 1746 * beyond the xfer we're trying to abort. So as we're scanning 1747 * the TDs of this xfer we check if the hardware points to 1748 * any of them. 1749 */ 1750 s = splusb(); /* XXX why? */ 1751 /* XXX */ 1752 1753 /* 1754 * Step 4: Turn on hardware again. 1755 */ 1756 /* XXX */ 1757 1758 /* 1759 * Step 5: Execute callback. 1760 */ 1761 usb_transfer_complete(xfer); 1762 1763 splx(s); 1764 } 1765 1766 /************************/ 1767 1768 Static usbd_status 1769 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 1770 { 1771 usbd_status err; 1772 1773 /* Insert last in queue. */ 1774 err = usb_insert_transfer(xfer); 1775 if (err) 1776 return (err); 1777 1778 /* Pipe isn't running, start first */ 1779 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1780 } 1781 1782 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1783 1784 void 1785 ehci_device_ctrl_done(usbd_xfer_handle xfer) 1786 { 1787 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 1788 1789 #ifdef DIAGNOSTIC 1790 if (!(xfer->rqflags & URQ_REQUEST)) { 1791 panic("ehci_ctrl_done: not a request\n"); 1792 } 1793 #endif 1794 xfer->hcpriv = NULL; 1795 } 1796 1797 /* Abort a device control request. */ 1798 Static void 1799 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 1800 { 1801 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 1802 ehci_abort_xfer(xfer, USBD_CANCELLED); 1803 } 1804 1805 /* Close a device control pipe. */ 1806 Static void 1807 ehci_device_ctrl_close(usbd_pipe_handle pipe) 1808 { 1809 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1810 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 1811 1812 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 1813 ehci_close_pipe(pipe, sc->sc_async_head); 1814 /*ehci_free_std(sc, epipe->tail.td);*/ 1815 } 1816 1817 /************************/ 1818 1819 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1820 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1821 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 1822 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 1823 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 1824 1825 /************************/ 1826 1827 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1828 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1829 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 1830 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 1831 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 1832 1833 /************************/ 1834 1835 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1836 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1837 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 1838 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 1839 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 1840
Indexes created Mon Sep 22 05:09:51 GMT 2025