ehci.c revision 1.111
1 /* $NetBSD: ehci.c,v 1.111 2006/08/30 00:49:56 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.111 2006/08/30 00:49:56 christos Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 Static void ehci_power(int, void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t vers, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 vers = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 vers >> 8, vers & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 370 371 if (EHCI_HCC_64BIT(cparams)) { 372 /* MUST clear segment register if 64 bit capable. */ 373 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 374 } 375 376 sc->sc_bus.usbrev = USBREV_2_0; 377 378 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 379 USB_MEM_RESERVE); 380 381 /* Reset the controller */ 382 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 383 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 384 usb_delay_ms(&sc->sc_bus, 1); 385 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 386 for (i = 0; i < 100; i++) { 387 usb_delay_ms(&sc->sc_bus, 1); 388 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 389 if (!hcr) 390 break; 391 } 392 if (hcr) { 393 aprint_error("%s: reset timeout\n", 394 USBDEVNAME(sc->sc_bus.bdev)); 395 return (USBD_IOERROR); 396 } 397 398 /* XXX need proper intr scheduling */ 399 sc->sc_rand = 96; 400 401 /* frame list size at default, read back what we got and use that */ 402 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 403 case 0: sc->sc_flsize = 1024; break; 404 case 1: sc->sc_flsize = 512; break; 405 case 2: sc->sc_flsize = 256; break; 406 case 3: return (USBD_IOERROR); 407 } 408 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 409 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 410 if (err) 411 return (err); 412 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 413 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 414 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 415 416 /* Set up the bus struct. */ 417 sc->sc_bus.methods = &ehci_bus_methods; 418 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 419 420 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 421 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 422 423 sc->sc_eintrs = EHCI_NORMAL_INTRS; 424 425 /* 426 * Allocate the interrupt dummy QHs. These are arranged to give poll 427 * intervals that are powers of 2 times 1ms. 428 */ 429 for (i = 0; i < EHCI_INTRQHS; i++) { 430 sqh = ehci_alloc_sqh(sc); 431 if (sqh == NULL) { 432 err = USBD_NOMEM; 433 goto bad1; 434 } 435 sc->sc_islots[i].sqh = sqh; 436 } 437 for (i = 0; i < EHCI_INTRQHS; i++) { 438 sqh = sc->sc_islots[i].sqh; 439 if (i == 0) { 440 /* The last (1ms) QH terminates. */ 441 sqh->qh.qh_link = EHCI_NULL; 442 sqh->next = NULL; 443 } else { 444 /* Otherwise the next QH has half the poll interval */ 445 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 446 sqh->qh.qh_link = htole32(sqh->next->physaddr | 447 EHCI_LINK_QH); 448 } 449 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 450 sqh->qh.qh_curqtd = EHCI_NULL; 451 sqh->next = NULL; 452 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 453 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 454 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 455 sqh->sqtd = NULL; 456 } 457 /* Point the frame list at the last level (128ms). */ 458 for (i = 0; i < sc->sc_flsize; i++) { 459 int j; 460 461 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 462 revbits[i & (EHCI_MAX_POLLRATE-1)]; 463 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 464 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 465 i)].sqh->physaddr); 466 } 467 468 /* Allocate dummy QH that starts the async list. */ 469 sqh = ehci_alloc_sqh(sc); 470 if (sqh == NULL) { 471 err = USBD_NOMEM; 472 goto bad1; 473 } 474 /* Fill the QH */ 475 sqh->qh.qh_endp = 476 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 477 sqh->qh.qh_link = 478 htole32(sqh->physaddr | EHCI_LINK_QH); 479 sqh->qh.qh_curqtd = EHCI_NULL; 480 sqh->next = NULL; 481 /* Fill the overlay qTD */ 482 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 483 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 484 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 485 sqh->sqtd = NULL; 486 #ifdef EHCI_DEBUG 487 if (ehcidebug) { 488 ehci_dump_sqh(sqh); 489 } 490 #endif 491 492 /* Point to async list */ 493 sc->sc_async_head = sqh; 494 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 495 496 usb_callout_init(sc->sc_tmo_pcd); 497 usb_callout_init(sc->sc_tmo_intrlist); 498 499 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 500 501 /* Turn on controller */ 502 EOWRITE4(sc, EHCI_USBCMD, 503 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 504 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 505 EHCI_CMD_ASE | 506 EHCI_CMD_PSE | 507 EHCI_CMD_RS); 508 509 /* Take over port ownership */ 510 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 511 512 for (i = 0; i < 100; i++) { 513 usb_delay_ms(&sc->sc_bus, 1); 514 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 515 if (!hcr) 516 break; 517 } 518 if (hcr) { 519 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 520 return (USBD_IOERROR); 521 } 522 523 /* Enable interrupts */ 524 DPRINTFN(1,("ehci_init: enabling\n")); 525 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 526 527 return (USBD_NORMAL_COMPLETION); 528 529 #if 0 530 bad2: 531 ehci_free_sqh(sc, sc->sc_async_head); 532 #endif 533 bad1: 534 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 535 return (err); 536 } 537 538 int 539 ehci_intr(void *v) 540 { 541 ehci_softc_t *sc = v; 542 543 if (sc == NULL || sc->sc_dying) 544 return (0); 545 546 /* If we get an interrupt while polling, then just ignore it. */ 547 if (sc->sc_bus.use_polling) { 548 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 549 550 if (intrs) 551 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 552 #ifdef DIAGNOSTIC 553 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 554 #endif 555 return (0); 556 } 557 558 return (ehci_intr1(sc)); 559 } 560 561 Static int 562 ehci_intr1(ehci_softc_t *sc) 563 { 564 u_int32_t intrs, eintrs; 565 566 DPRINTFN(20,("ehci_intr1: enter\n")); 567 568 /* In case the interrupt occurs before initialization has completed. */ 569 if (sc == NULL) { 570 #ifdef DIAGNOSTIC 571 printf("ehci_intr1: sc == NULL\n"); 572 #endif 573 return (0); 574 } 575 576 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 577 if (!intrs) 578 return (0); 579 580 eintrs = intrs & sc->sc_eintrs; 581 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 582 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 583 (u_int)eintrs)); 584 if (!eintrs) 585 return (0); 586 587 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 588 sc->sc_bus.intr_context++; 589 sc->sc_bus.no_intrs++; 590 if (eintrs & EHCI_STS_IAA) { 591 DPRINTF(("ehci_intr1: door bell\n")); 592 wakeup(&sc->sc_async_head); 593 eintrs &= ~EHCI_STS_IAA; 594 } 595 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 596 DPRINTFN(5,("ehci_intr1: %s %s\n", 597 eintrs & EHCI_STS_INT ? "INT" : "", 598 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 599 usb_schedsoftintr(&sc->sc_bus); 600 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 601 } 602 if (eintrs & EHCI_STS_HSE) { 603 printf("%s: unrecoverable error, controller halted\n", 604 USBDEVNAME(sc->sc_bus.bdev)); 605 /* XXX what else */ 606 } 607 if (eintrs & EHCI_STS_PCD) { 608 ehci_pcd(sc, sc->sc_intrxfer); 609 /* 610 * Disable PCD interrupt for now, because it will be 611 * on until the port has been reset. 612 */ 613 ehci_pcd_able(sc, 0); 614 /* Do not allow RHSC interrupts > 1 per second */ 615 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 616 eintrs &= ~EHCI_STS_PCD; 617 } 618 619 sc->sc_bus.intr_context--; 620 621 if (eintrs != 0) { 622 /* Block unprocessed interrupts. */ 623 sc->sc_eintrs &= ~eintrs; 624 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 625 printf("%s: blocking intrs 0x%x\n", 626 USBDEVNAME(sc->sc_bus.bdev), eintrs); 627 } 628 629 return (1); 630 } 631 632 void 633 ehci_pcd_able(ehci_softc_t *sc, int on) 634 { 635 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 636 if (on) 637 sc->sc_eintrs |= EHCI_STS_PCD; 638 else 639 sc->sc_eintrs &= ~EHCI_STS_PCD; 640 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 641 } 642 643 void 644 ehci_pcd_enable(void *v_sc) 645 { 646 ehci_softc_t *sc = v_sc; 647 648 ehci_pcd_able(sc, 1); 649 } 650 651 void 652 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 653 { 654 usbd_pipe_handle pipe; 655 u_char *p; 656 int i, m; 657 658 if (xfer == NULL) { 659 /* Just ignore the change. */ 660 return; 661 } 662 663 pipe = xfer->pipe; 664 665 p = KERNADDR(&xfer->dmabuf, 0); 666 m = min(sc->sc_noport, xfer->length * 8 - 1); 667 memset(p, 0, xfer->length); 668 for (i = 1; i <= m; i++) { 669 /* Pick out CHANGE bits from the status reg. */ 670 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 671 p[i/8] |= 1 << (i%8); 672 } 673 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 674 xfer->actlen = xfer->length; 675 xfer->status = USBD_NORMAL_COMPLETION; 676 677 usb_transfer_complete(xfer); 678 } 679 680 void 681 ehci_softintr(void *v) 682 { 683 ehci_softc_t *sc = v; 684 struct ehci_xfer *ex, *nextex; 685 686 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 687 sc->sc_bus.intr_context)); 688 689 sc->sc_bus.intr_context++; 690 691 /* 692 * The only explanation I can think of for why EHCI is as brain dead 693 * as UHCI interrupt-wise is that Intel was involved in both. 694 * An interrupt just tells us that something is done, we have no 695 * clue what, so we need to scan through all active transfers. :-( 696 */ 697 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 698 nextex = LIST_NEXT(ex, inext); 699 ehci_check_intr(sc, ex); 700 } 701 702 /* Schedule a callout to catch any dropped transactions. */ 703 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 704 !LIST_EMPTY(&sc->sc_intrhead)) 705 usb_callout(sc->sc_tmo_intrlist, hz, 706 ehci_intrlist_timeout, sc); 707 708 #ifdef USB_USE_SOFTINTR 709 if (sc->sc_softwake) { 710 sc->sc_softwake = 0; 711 wakeup(&sc->sc_softwake); 712 } 713 #endif /* USB_USE_SOFTINTR */ 714 715 sc->sc_bus.intr_context--; 716 } 717 718 /* Check for an interrupt. */ 719 void 720 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 721 { 722 ehci_soft_qtd_t *sqtd, *lsqtd; 723 u_int32_t status; 724 725 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 726 727 if (ex->sqtdstart == NULL) { 728 printf("ehci_check_intr: sqtdstart=NULL\n"); 729 return; 730 } 731 lsqtd = ex->sqtdend; 732 #ifdef DIAGNOSTIC 733 if (lsqtd == NULL) { 734 printf("ehci_check_intr: lsqtd==0\n"); 735 return; 736 } 737 #endif 738 /* 739 * If the last TD is still active we need to check whether there 740 * is a an error somewhere in the middle, or whether there was a 741 * short packet (SPD and not ACTIVE). 742 */ 743 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 744 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 745 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 746 status = le32toh(sqtd->qtd.qtd_status); 747 /* If there's an active QTD the xfer isn't done. */ 748 if (status & EHCI_QTD_ACTIVE) 749 break; 750 /* Any kind of error makes the xfer done. */ 751 if (status & EHCI_QTD_HALTED) 752 goto done; 753 /* We want short packets, and it is short: it's done */ 754 if (EHCI_QTD_GET_BYTES(status) != 0) 755 goto done; 756 } 757 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 758 ex, ex->sqtdstart)); 759 return; 760 } 761 done: 762 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 763 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 764 ehci_idone(ex); 765 } 766 767 void 768 ehci_idone(struct ehci_xfer *ex) 769 { 770 usbd_xfer_handle xfer = &ex->xfer; 771 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 772 ehci_soft_qtd_t *sqtd, *lsqtd; 773 u_int32_t status = 0, nstatus = 0; 774 int actlen; 775 uint pkts_left; 776 777 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 778 #ifdef DIAGNOSTIC 779 { 780 int s = splhigh(); 781 if (ex->isdone) { 782 splx(s); 783 #ifdef EHCI_DEBUG 784 printf("ehci_idone: ex is done!\n "); 785 ehci_dump_exfer(ex); 786 #else 787 printf("ehci_idone: ex=%p is done!\n", ex); 788 #endif 789 return; 790 } 791 ex->isdone = 1; 792 splx(s); 793 } 794 #endif 795 796 if (xfer->status == USBD_CANCELLED || 797 xfer->status == USBD_TIMEOUT) { 798 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 799 return; 800 } 801 802 #ifdef EHCI_DEBUG 803 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 804 if (ehcidebug > 10) 805 ehci_dump_sqtds(ex->sqtdstart); 806 #endif 807 808 /* The transfer is done, compute actual length and status. */ 809 lsqtd = ex->sqtdend; 810 actlen = 0; 811 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 812 nstatus = le32toh(sqtd->qtd.qtd_status); 813 if (nstatus & EHCI_QTD_ACTIVE) 814 break; 815 816 status = nstatus; 817 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 818 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 819 } 820 821 /* 822 * If there are left over TDs we need to update the toggle. 823 * The default pipe doesn't need it since control transfers 824 * start the toggle at 0 every time. 825 */ 826 if (sqtd != lsqtd->nextqtd && 827 xfer->pipe->device->default_pipe != xfer->pipe) { 828 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 829 #if 0 830 ehci_dump_sqh(epipe->sqh); 831 ehci_dump_sqtds(ex->sqtdstart); 832 #endif 833 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 834 } 835 836 /* 837 * For a short transfer we need to update the toggle for the missing 838 * packets within the qTD. 839 */ 840 pkts_left = EHCI_QTD_GET_BYTES(status) / 841 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 842 epipe->nexttoggle ^= pkts_left % 2; 843 844 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 845 xfer->length, actlen, status)); 846 xfer->actlen = actlen; 847 if (status & EHCI_QTD_HALTED) { 848 #ifdef EHCI_DEBUG 849 char sbuf[128]; 850 851 bitmask_snprintf((u_int32_t)status, 852 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 853 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 854 855 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 856 "status 0x%s\n", 857 xfer->pipe->device->address, 858 xfer->pipe->endpoint->edesc->bEndpointAddress, 859 sbuf)); 860 if (ehcidebug > 2) { 861 ehci_dump_sqh(epipe->sqh); 862 ehci_dump_sqtds(ex->sqtdstart); 863 } 864 #endif 865 /* low&full speed has an extra error flag */ 866 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 867 EHCI_QH_SPEED_HIGH) 868 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 869 else 870 status &= EHCI_QTD_STATERRS; 871 if (status == 0) /* no other errors means a stall */ 872 xfer->status = USBD_STALLED; 873 else 874 xfer->status = USBD_IOERROR; /* more info XXX */ 875 /* XXX need to reset TT on missed microframe */ 876 if (status & EHCI_QTD_MISSEDMICRO) { 877 ehci_softc_t *sc = (ehci_softc_t *) 878 xfer->pipe->device->bus; 879 880 printf("%s: missed microframe, TT reset not " 881 "implemented, hub might be inoperational\n", 882 USBDEVNAME(sc->sc_bus.bdev)); 883 } 884 } else { 885 xfer->status = USBD_NORMAL_COMPLETION; 886 } 887 888 usb_transfer_complete(xfer); 889 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 890 } 891 892 /* 893 * Wait here until controller claims to have an interrupt. 894 * Then call ehci_intr and return. Use timeout to avoid waiting 895 * too long. 896 */ 897 void 898 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 899 { 900 int timo; 901 u_int32_t intrs; 902 903 xfer->status = USBD_IN_PROGRESS; 904 for (timo = xfer->timeout; timo >= 0; timo--) { 905 usb_delay_ms(&sc->sc_bus, 1); 906 if (sc->sc_dying) 907 break; 908 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 909 sc->sc_eintrs; 910 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 911 #ifdef EHCI_DEBUG 912 if (ehcidebug > 15) 913 ehci_dump_regs(sc); 914 #endif 915 if (intrs) { 916 ehci_intr1(sc); 917 if (xfer->status != USBD_IN_PROGRESS) 918 return; 919 } 920 } 921 922 /* Timeout */ 923 DPRINTF(("ehci_waitintr: timeout\n")); 924 xfer->status = USBD_TIMEOUT; 925 usb_transfer_complete(xfer); 926 /* XXX should free TD */ 927 } 928 929 void 930 ehci_poll(struct usbd_bus *bus) 931 { 932 ehci_softc_t *sc = (ehci_softc_t *)bus; 933 #ifdef EHCI_DEBUG 934 static int last; 935 int new; 936 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 937 if (new != last) { 938 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 939 last = new; 940 } 941 #endif 942 943 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 944 ehci_intr1(sc); 945 } 946 947 int 948 ehci_detach(struct ehci_softc *sc, int flags) 949 { 950 int rv = 0; 951 952 if (sc->sc_child != NULL) 953 rv = config_detach(sc->sc_child, flags); 954 955 if (rv != 0) 956 return (rv); 957 958 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 959 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 960 961 if (sc->sc_powerhook != NULL) 962 powerhook_disestablish(sc->sc_powerhook); 963 if (sc->sc_shutdownhook != NULL) 964 shutdownhook_disestablish(sc->sc_shutdownhook); 965 966 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 967 968 /* XXX free other data structures XXX */ 969 970 return (rv); 971 } 972 973 974 int 975 ehci_activate(device_ptr_t self, enum devact act) 976 { 977 struct ehci_softc *sc = (struct ehci_softc *)self; 978 int rv = 0; 979 980 switch (act) { 981 case DVACT_ACTIVATE: 982 return (EOPNOTSUPP); 983 984 case DVACT_DEACTIVATE: 985 if (sc->sc_child != NULL) 986 rv = config_deactivate(sc->sc_child); 987 sc->sc_dying = 1; 988 break; 989 } 990 return (rv); 991 } 992 993 /* 994 * Handle suspend/resume. 995 * 996 * We need to switch to polling mode here, because this routine is 997 * called from an interrupt context. This is all right since we 998 * are almost suspended anyway. 999 */ 1000 void 1001 ehci_power(int why, void *v) 1002 { 1003 ehci_softc_t *sc = v; 1004 u_int32_t cmd, hcr; 1005 int s, i; 1006 1007 #ifdef EHCI_DEBUG 1008 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1009 if (ehcidebug > 0) 1010 ehci_dump_regs(sc); 1011 #endif 1012 1013 s = splhardusb(); 1014 switch (why) { 1015 case PWR_SUSPEND: 1016 case PWR_STANDBY: 1017 sc->sc_bus.use_polling++; 1018 1019 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1020 1021 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1022 EOWRITE4(sc, EHCI_USBCMD, cmd); 1023 1024 for (i = 0; i < 100; i++) { 1025 hcr = EOREAD4(sc, EHCI_USBSTS) & 1026 (EHCI_STS_ASS | EHCI_STS_PSS); 1027 if (hcr == 0) 1028 break; 1029 1030 usb_delay_ms(&sc->sc_bus, 1); 1031 } 1032 if (hcr != 0) { 1033 printf("%s: reset timeout\n", 1034 USBDEVNAME(sc->sc_bus.bdev)); 1035 } 1036 1037 cmd &= ~EHCI_CMD_RS; 1038 EOWRITE4(sc, EHCI_USBCMD, cmd); 1039 1040 for (i = 0; i < 100; i++) { 1041 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1042 if (hcr == EHCI_STS_HCH) 1043 break; 1044 1045 usb_delay_ms(&sc->sc_bus, 1); 1046 } 1047 if (hcr != EHCI_STS_HCH) { 1048 printf("%s: config timeout\n", 1049 USBDEVNAME(sc->sc_bus.bdev)); 1050 } 1051 1052 sc->sc_bus.use_polling--; 1053 break; 1054 1055 case PWR_RESUME: 1056 sc->sc_bus.use_polling++; 1057 1058 /* restore things in case the bios sucks */ 1059 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1060 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1061 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1062 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1063 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1064 1065 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1066 1067 for (i = 0; i < 100; i++) { 1068 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1069 if (hcr != EHCI_STS_HCH) 1070 break; 1071 1072 usb_delay_ms(&sc->sc_bus, 1); 1073 } 1074 if (hcr == EHCI_STS_HCH) { 1075 printf("%s: config timeout\n", 1076 USBDEVNAME(sc->sc_bus.bdev)); 1077 } 1078 1079 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1080 1081 sc->sc_bus.use_polling--; 1082 break; 1083 case PWR_SOFTSUSPEND: 1084 case PWR_SOFTSTANDBY: 1085 case PWR_SOFTRESUME: 1086 break; 1087 } 1088 splx(s); 1089 1090 #ifdef EHCI_DEBUG 1091 DPRINTF(("ehci_power: sc=%p\n", sc)); 1092 if (ehcidebug > 0) 1093 ehci_dump_regs(sc); 1094 #endif 1095 } 1096 1097 /* 1098 * Shut down the controller when the system is going down. 1099 */ 1100 void 1101 ehci_shutdown(void *v) 1102 { 1103 ehci_softc_t *sc = v; 1104 1105 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1106 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1107 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1108 } 1109 1110 usbd_status 1111 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1112 { 1113 struct ehci_softc *sc = (struct ehci_softc *)bus; 1114 usbd_status err; 1115 1116 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1117 if (err == USBD_NOMEM) 1118 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1119 #ifdef EHCI_DEBUG 1120 if (err) 1121 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1122 #endif 1123 return (err); 1124 } 1125 1126 void 1127 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1128 { 1129 struct ehci_softc *sc = (struct ehci_softc *)bus; 1130 1131 if (dma->block->flags & USB_DMA_RESERVE) { 1132 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1133 dma); 1134 return; 1135 } 1136 usb_freemem(&sc->sc_bus, dma); 1137 } 1138 1139 usbd_xfer_handle 1140 ehci_allocx(struct usbd_bus *bus) 1141 { 1142 struct ehci_softc *sc = (struct ehci_softc *)bus; 1143 usbd_xfer_handle xfer; 1144 1145 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1146 if (xfer != NULL) { 1147 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1148 #ifdef DIAGNOSTIC 1149 if (xfer->busy_free != XFER_FREE) { 1150 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1151 xfer->busy_free); 1152 } 1153 #endif 1154 } else { 1155 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1156 } 1157 if (xfer != NULL) { 1158 memset(xfer, 0, sizeof(struct ehci_xfer)); 1159 #ifdef DIAGNOSTIC 1160 EXFER(xfer)->isdone = 1; 1161 xfer->busy_free = XFER_BUSY; 1162 #endif 1163 } 1164 return (xfer); 1165 } 1166 1167 void 1168 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1169 { 1170 struct ehci_softc *sc = (struct ehci_softc *)bus; 1171 1172 #ifdef DIAGNOSTIC 1173 if (xfer->busy_free != XFER_BUSY) { 1174 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1175 xfer->busy_free); 1176 return; 1177 } 1178 xfer->busy_free = XFER_FREE; 1179 if (!EXFER(xfer)->isdone) { 1180 printf("ehci_freex: !isdone\n"); 1181 return; 1182 } 1183 #endif 1184 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1185 } 1186 1187 Static void 1188 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1189 { 1190 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1191 1192 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1193 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1194 #ifdef USB_DEBUG 1195 if (ehcidebug) 1196 usbd_dump_pipe(pipe); 1197 #endif 1198 epipe->nexttoggle = 0; 1199 } 1200 1201 Static void 1202 ehci_noop(usbd_pipe_handle pipe) 1203 { 1204 } 1205 1206 #ifdef EHCI_DEBUG 1207 void 1208 ehci_dump_regs(ehci_softc_t *sc) 1209 { 1210 int i; 1211 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1212 EOREAD4(sc, EHCI_USBCMD), 1213 EOREAD4(sc, EHCI_USBSTS), 1214 EOREAD4(sc, EHCI_USBINTR)); 1215 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1216 EOREAD4(sc, EHCI_FRINDEX), 1217 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1218 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1219 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1220 for (i = 1; i <= sc->sc_noport; i++) 1221 printf("port %d status=0x%08x\n", i, 1222 EOREAD4(sc, EHCI_PORTSC(i))); 1223 } 1224 1225 /* 1226 * Unused function - this is meant to be called from a kernel 1227 * debugger. 1228 */ 1229 void 1230 ehci_dump() 1231 { 1232 ehci_dump_regs(theehci); 1233 } 1234 1235 void 1236 ehci_dump_link(ehci_link_t link, int type) 1237 { 1238 link = le32toh(link); 1239 printf("0x%08x", link); 1240 if (link & EHCI_LINK_TERMINATE) 1241 printf("<T>"); 1242 else { 1243 printf("<"); 1244 if (type) { 1245 switch (EHCI_LINK_TYPE(link)) { 1246 case EHCI_LINK_ITD: printf("ITD"); break; 1247 case EHCI_LINK_QH: printf("QH"); break; 1248 case EHCI_LINK_SITD: printf("SITD"); break; 1249 case EHCI_LINK_FSTN: printf("FSTN"); break; 1250 } 1251 } 1252 printf(">"); 1253 } 1254 } 1255 1256 void 1257 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1258 { 1259 int i; 1260 u_int32_t stop; 1261 1262 stop = 0; 1263 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1264 ehci_dump_sqtd(sqtd); 1265 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1266 } 1267 if (sqtd) 1268 printf("dump aborted, too many TDs\n"); 1269 } 1270 1271 void 1272 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1273 { 1274 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1275 ehci_dump_qtd(&sqtd->qtd); 1276 } 1277 1278 void 1279 ehci_dump_qtd(ehci_qtd_t *qtd) 1280 { 1281 u_int32_t s; 1282 char sbuf[128]; 1283 1284 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1285 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1286 printf("\n"); 1287 s = le32toh(qtd->qtd_status); 1288 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1289 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1290 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1291 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1292 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1293 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1294 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1295 EHCI_QTD_GET_PID(s), sbuf); 1296 for (s = 0; s < 5; s++) 1297 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1298 } 1299 1300 void 1301 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1302 { 1303 ehci_qh_t *qh = &sqh->qh; 1304 u_int32_t endp, endphub; 1305 1306 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1307 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1308 endp = le32toh(qh->qh_endp); 1309 printf(" endp=0x%08x\n", endp); 1310 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1311 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1312 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1313 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1314 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1315 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1316 EHCI_QH_GET_NRL(endp)); 1317 endphub = le32toh(qh->qh_endphub); 1318 printf(" endphub=0x%08x\n", endphub); 1319 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1320 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1321 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1322 EHCI_QH_GET_MULT(endphub)); 1323 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1324 printf("Overlay qTD:\n"); 1325 ehci_dump_qtd(&qh->qh_qtd); 1326 } 1327 1328 #ifdef DIAGNOSTIC 1329 Static void 1330 ehci_dump_exfer(struct ehci_xfer *ex) 1331 { 1332 printf("ehci_dump_exfer: ex=%p\n", ex); 1333 } 1334 #endif 1335 #endif 1336 1337 usbd_status 1338 ehci_open(usbd_pipe_handle pipe) 1339 { 1340 usbd_device_handle dev = pipe->device; 1341 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1342 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1343 u_int8_t addr = dev->address; 1344 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1345 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1346 ehci_soft_qh_t *sqh; 1347 usbd_status err; 1348 int s; 1349 int ival, speed, naks; 1350 int hshubaddr, hshubport; 1351 1352 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1353 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1354 1355 if (dev->myhsport) { 1356 hshubaddr = dev->myhsport->parent->address; 1357 hshubport = dev->myhsport->portno; 1358 } else { 1359 hshubaddr = 0; 1360 hshubport = 0; 1361 } 1362 1363 if (sc->sc_dying) 1364 return (USBD_IOERROR); 1365 1366 epipe->nexttoggle = 0; 1367 1368 if (addr == sc->sc_addr) { 1369 switch (ed->bEndpointAddress) { 1370 case USB_CONTROL_ENDPOINT: 1371 pipe->methods = &ehci_root_ctrl_methods; 1372 break; 1373 case UE_DIR_IN | EHCI_INTR_ENDPT: 1374 pipe->methods = &ehci_root_intr_methods; 1375 break; 1376 default: 1377 return (USBD_INVAL); 1378 } 1379 return (USBD_NORMAL_COMPLETION); 1380 } 1381 1382 /* XXX All this stuff is only valid for async. */ 1383 switch (dev->speed) { 1384 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1385 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1386 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1387 default: panic("ehci_open: bad device speed %d", dev->speed); 1388 } 1389 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1390 printf("%s: *** WARNING: opening low/full speed isoc device, " 1391 "this does not work yet.\n", 1392 USBDEVNAME(sc->sc_bus.bdev)); 1393 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1394 hshubaddr, hshubport)); 1395 return USBD_INVAL; 1396 } 1397 1398 naks = 8; /* XXX */ 1399 sqh = ehci_alloc_sqh(sc); 1400 if (sqh == NULL) 1401 goto bad0; 1402 /* qh_link filled when the QH is added */ 1403 sqh->qh.qh_endp = htole32( 1404 EHCI_QH_SET_ADDR(addr) | 1405 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1406 EHCI_QH_SET_EPS(speed) | 1407 EHCI_QH_DTC | 1408 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1409 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1410 EHCI_QH_CTL : 0) | 1411 EHCI_QH_SET_NRL(naks) 1412 ); 1413 sqh->qh.qh_endphub = htole32( 1414 EHCI_QH_SET_MULT(1) | 1415 EHCI_QH_SET_HUBA(hshubaddr) | 1416 EHCI_QH_SET_PORT(hshubport) | 1417 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1418 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1419 ); 1420 sqh->qh.qh_curqtd = EHCI_NULL; 1421 /* Fill the overlay qTD */ 1422 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1423 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1424 sqh->qh.qh_qtd.qtd_status = htole32(0); 1425 1426 epipe->sqh = sqh; 1427 1428 switch (xfertype) { 1429 case UE_CONTROL: 1430 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1431 0, &epipe->u.ctl.reqdma); 1432 #ifdef EHCI_DEBUG 1433 if (err) 1434 printf("ehci_open: usb_allocmem()=%d\n", err); 1435 #endif 1436 if (err) 1437 goto bad1; 1438 pipe->methods = &ehci_device_ctrl_methods; 1439 s = splusb(); 1440 ehci_add_qh(sqh, sc->sc_async_head); 1441 splx(s); 1442 break; 1443 case UE_BULK: 1444 pipe->methods = &ehci_device_bulk_methods; 1445 s = splusb(); 1446 ehci_add_qh(sqh, sc->sc_async_head); 1447 splx(s); 1448 break; 1449 case UE_INTERRUPT: 1450 pipe->methods = &ehci_device_intr_methods; 1451 ival = pipe->interval; 1452 if (ival == USBD_DEFAULT_INTERVAL) 1453 ival = ed->bInterval; 1454 return (ehci_device_setintr(sc, sqh, ival)); 1455 case UE_ISOCHRONOUS: 1456 pipe->methods = &ehci_device_isoc_methods; 1457 return (USBD_INVAL); 1458 default: 1459 return (USBD_INVAL); 1460 } 1461 return (USBD_NORMAL_COMPLETION); 1462 1463 bad1: 1464 ehci_free_sqh(sc, sqh); 1465 bad0: 1466 return (USBD_NOMEM); 1467 } 1468 1469 /* 1470 * Add an ED to the schedule. Called at splusb(). 1471 */ 1472 void 1473 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1474 { 1475 SPLUSBCHECK; 1476 1477 sqh->next = head->next; 1478 sqh->qh.qh_link = head->qh.qh_link; 1479 head->next = sqh; 1480 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1481 1482 #ifdef EHCI_DEBUG 1483 if (ehcidebug > 5) { 1484 printf("ehci_add_qh:\n"); 1485 ehci_dump_sqh(sqh); 1486 } 1487 #endif 1488 } 1489 1490 /* 1491 * Remove an ED from the schedule. Called at splusb(). 1492 */ 1493 void 1494 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1495 { 1496 ehci_soft_qh_t *p; 1497 1498 SPLUSBCHECK; 1499 /* XXX */ 1500 for (p = head; p != NULL && p->next != sqh; p = p->next) 1501 ; 1502 if (p == NULL) 1503 panic("ehci_rem_qh: ED not found"); 1504 p->next = sqh->next; 1505 p->qh.qh_link = sqh->qh.qh_link; 1506 1507 ehci_sync_hc(sc); 1508 } 1509 1510 void 1511 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1512 { 1513 int i; 1514 u_int32_t status; 1515 1516 /* Save toggle bit and ping status. */ 1517 status = sqh->qh.qh_qtd.qtd_status & 1518 htole32(EHCI_QTD_TOGGLE_MASK | 1519 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1520 /* Set HALTED to make hw leave it alone. */ 1521 sqh->qh.qh_qtd.qtd_status = 1522 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1523 sqh->qh.qh_curqtd = 0; 1524 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1525 sqh->qh.qh_qtd.qtd_altnext = 0; 1526 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1527 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1528 sqh->sqtd = sqtd; 1529 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1530 sqh->qh.qh_qtd.qtd_status = status; 1531 } 1532 1533 /* 1534 * Ensure that the HC has released all references to the QH. We do this 1535 * by asking for a Async Advance Doorbell interrupt and then we wait for 1536 * the interrupt. 1537 * To make this easier we first obtain exclusive use of the doorbell. 1538 */ 1539 void 1540 ehci_sync_hc(ehci_softc_t *sc) 1541 { 1542 int s, error; 1543 1544 if (sc->sc_dying) { 1545 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1546 return; 1547 } 1548 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1549 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1550 s = splhardusb(); 1551 /* ask for doorbell */ 1552 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1553 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1554 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1555 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1556 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1557 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1558 splx(s); 1559 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1560 #ifdef DIAGNOSTIC 1561 if (error) 1562 printf("ehci_sync_hc: tsleep() = %d\n", error); 1563 #endif 1564 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1565 } 1566 1567 /***********/ 1568 1569 /* 1570 * Data structures and routines to emulate the root hub. 1571 */ 1572 Static usb_device_descriptor_t ehci_devd = { 1573 USB_DEVICE_DESCRIPTOR_SIZE, 1574 UDESC_DEVICE, /* type */ 1575 {0x00, 0x02}, /* USB version */ 1576 UDCLASS_HUB, /* class */ 1577 UDSUBCLASS_HUB, /* subclass */ 1578 UDPROTO_HSHUBSTT, /* protocol */ 1579 64, /* max packet */ 1580 {0},{0},{0x00,0x01}, /* device id */ 1581 1,2,0, /* string indicies */ 1582 1 /* # of configurations */ 1583 }; 1584 1585 Static usb_device_qualifier_t ehci_odevd = { 1586 USB_DEVICE_DESCRIPTOR_SIZE, 1587 UDESC_DEVICE_QUALIFIER, /* type */ 1588 {0x00, 0x02}, /* USB version */ 1589 UDCLASS_HUB, /* class */ 1590 UDSUBCLASS_HUB, /* subclass */ 1591 UDPROTO_FSHUB, /* protocol */ 1592 64, /* max packet */ 1593 1, /* # of configurations */ 1594 0 1595 }; 1596 1597 Static usb_config_descriptor_t ehci_confd = { 1598 USB_CONFIG_DESCRIPTOR_SIZE, 1599 UDESC_CONFIG, 1600 {USB_CONFIG_DESCRIPTOR_SIZE + 1601 USB_INTERFACE_DESCRIPTOR_SIZE + 1602 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1603 1, 1604 1, 1605 0, 1606 UC_SELF_POWERED, 1607 0 /* max power */ 1608 }; 1609 1610 Static usb_interface_descriptor_t ehci_ifcd = { 1611 USB_INTERFACE_DESCRIPTOR_SIZE, 1612 UDESC_INTERFACE, 1613 0, 1614 0, 1615 1, 1616 UICLASS_HUB, 1617 UISUBCLASS_HUB, 1618 UIPROTO_HSHUBSTT, 1619 0 1620 }; 1621 1622 Static usb_endpoint_descriptor_t ehci_endpd = { 1623 USB_ENDPOINT_DESCRIPTOR_SIZE, 1624 UDESC_ENDPOINT, 1625 UE_DIR_IN | EHCI_INTR_ENDPT, 1626 UE_INTERRUPT, 1627 {8, 0}, /* max packet */ 1628 255 1629 }; 1630 1631 Static usb_hub_descriptor_t ehci_hubd = { 1632 USB_HUB_DESCRIPTOR_SIZE, 1633 UDESC_HUB, 1634 0, 1635 {0,0}, 1636 0, 1637 0, 1638 {""}, 1639 {""}, 1640 }; 1641 1642 Static int 1643 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1644 { 1645 int i; 1646 1647 if (l == 0) 1648 return (0); 1649 p->bLength = 2 * strlen(s) + 2; 1650 if (l == 1) 1651 return (1); 1652 p->bDescriptorType = UDESC_STRING; 1653 l -= 2; 1654 for (i = 0; s[i] && l > 1; i++, l -= 2) 1655 USETW2(p->bString[i], 0, s[i]); 1656 return (2*i+2); 1657 } 1658 1659 /* 1660 * Simulate a hardware hub by handling all the necessary requests. 1661 */ 1662 Static usbd_status 1663 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1664 { 1665 usbd_status err; 1666 1667 /* Insert last in queue. */ 1668 err = usb_insert_transfer(xfer); 1669 if (err) 1670 return (err); 1671 1672 /* Pipe isn't running, start first */ 1673 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1674 } 1675 1676 Static usbd_status 1677 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1678 { 1679 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1680 usb_device_request_t *req; 1681 void *buf = NULL; 1682 int port, i; 1683 int s, len, value, index, l, totlen = 0; 1684 usb_port_status_t ps; 1685 usb_hub_descriptor_t hubd; 1686 usbd_status err; 1687 u_int32_t v; 1688 1689 if (sc->sc_dying) 1690 return (USBD_IOERROR); 1691 1692 #ifdef DIAGNOSTIC 1693 if (!(xfer->rqflags & URQ_REQUEST)) 1694 /* XXX panic */ 1695 return (USBD_INVAL); 1696 #endif 1697 req = &xfer->request; 1698 1699 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1700 req->bmRequestType, req->bRequest)); 1701 1702 len = UGETW(req->wLength); 1703 value = UGETW(req->wValue); 1704 index = UGETW(req->wIndex); 1705 1706 if (len != 0) 1707 buf = KERNADDR(&xfer->dmabuf, 0); 1708 1709 #define C(x,y) ((x) | ((y) << 8)) 1710 switch(C(req->bRequest, req->bmRequestType)) { 1711 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1712 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1713 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1714 /* 1715 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1716 * for the integrated root hub. 1717 */ 1718 break; 1719 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1720 if (len > 0) { 1721 *(u_int8_t *)buf = sc->sc_conf; 1722 totlen = 1; 1723 } 1724 break; 1725 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1726 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1727 if (len == 0) 1728 break; 1729 switch(value >> 8) { 1730 case UDESC_DEVICE: 1731 if ((value & 0xff) != 0) { 1732 err = USBD_IOERROR; 1733 goto ret; 1734 } 1735 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1736 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1737 memcpy(buf, &ehci_devd, l); 1738 break; 1739 /* 1740 * We can't really operate at another speed, but the spec says 1741 * we need this descriptor. 1742 */ 1743 case UDESC_DEVICE_QUALIFIER: 1744 if ((value & 0xff) != 0) { 1745 err = USBD_IOERROR; 1746 goto ret; 1747 } 1748 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1749 memcpy(buf, &ehci_odevd, l); 1750 break; 1751 /* 1752 * We can't really operate at another speed, but the spec says 1753 * we need this descriptor. 1754 */ 1755 case UDESC_OTHER_SPEED_CONFIGURATION: 1756 case UDESC_CONFIG: 1757 if ((value & 0xff) != 0) { 1758 err = USBD_IOERROR; 1759 goto ret; 1760 } 1761 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1762 memcpy(buf, &ehci_confd, l); 1763 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1764 value >> 8; 1765 buf = (char *)buf + l; 1766 len -= l; 1767 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1768 totlen += l; 1769 memcpy(buf, &ehci_ifcd, l); 1770 buf = (char *)buf + l; 1771 len -= l; 1772 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1773 totlen += l; 1774 memcpy(buf, &ehci_endpd, l); 1775 break; 1776 case UDESC_STRING: 1777 *(u_int8_t *)buf = 0; 1778 totlen = 1; 1779 switch (value & 0xff) { 1780 case 0: /* Language table */ 1781 totlen = ehci_str(buf, len, "\001"); 1782 break; 1783 case 1: /* Vendor */ 1784 totlen = ehci_str(buf, len, sc->sc_vendor); 1785 break; 1786 case 2: /* Product */ 1787 totlen = ehci_str(buf, len, "EHCI root hub"); 1788 break; 1789 } 1790 break; 1791 default: 1792 err = USBD_IOERROR; 1793 goto ret; 1794 } 1795 break; 1796 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1797 if (len > 0) { 1798 *(u_int8_t *)buf = 0; 1799 totlen = 1; 1800 } 1801 break; 1802 case C(UR_GET_STATUS, UT_READ_DEVICE): 1803 if (len > 1) { 1804 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1805 totlen = 2; 1806 } 1807 break; 1808 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1809 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1810 if (len > 1) { 1811 USETW(((usb_status_t *)buf)->wStatus, 0); 1812 totlen = 2; 1813 } 1814 break; 1815 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1816 if (value >= USB_MAX_DEVICES) { 1817 err = USBD_IOERROR; 1818 goto ret; 1819 } 1820 sc->sc_addr = value; 1821 break; 1822 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1823 if (value != 0 && value != 1) { 1824 err = USBD_IOERROR; 1825 goto ret; 1826 } 1827 sc->sc_conf = value; 1828 break; 1829 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1830 break; 1831 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1832 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1833 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1834 err = USBD_IOERROR; 1835 goto ret; 1836 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1837 break; 1838 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1839 break; 1840 /* Hub requests */ 1841 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1842 break; 1843 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1844 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1845 "port=%d feature=%d\n", 1846 index, value)); 1847 if (index < 1 || index > sc->sc_noport) { 1848 err = USBD_IOERROR; 1849 goto ret; 1850 } 1851 port = EHCI_PORTSC(index); 1852 v = EOREAD4(sc, port); 1853 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1854 v &= ~EHCI_PS_CLEAR; 1855 switch(value) { 1856 case UHF_PORT_ENABLE: 1857 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1858 break; 1859 case UHF_PORT_SUSPEND: 1860 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1861 break; 1862 case UHF_PORT_POWER: 1863 if (sc->sc_hasppc) 1864 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1865 break; 1866 case UHF_PORT_TEST: 1867 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1868 "%d\n", index)); 1869 break; 1870 case UHF_PORT_INDICATOR: 1871 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1872 "%d\n", index)); 1873 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1874 break; 1875 case UHF_C_PORT_CONNECTION: 1876 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1877 break; 1878 case UHF_C_PORT_ENABLE: 1879 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1880 break; 1881 case UHF_C_PORT_SUSPEND: 1882 /* how? */ 1883 break; 1884 case UHF_C_PORT_OVER_CURRENT: 1885 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1886 break; 1887 case UHF_C_PORT_RESET: 1888 sc->sc_isreset[index] = 0; 1889 break; 1890 default: 1891 err = USBD_IOERROR; 1892 goto ret; 1893 } 1894 #if 0 1895 switch(value) { 1896 case UHF_C_PORT_CONNECTION: 1897 case UHF_C_PORT_ENABLE: 1898 case UHF_C_PORT_SUSPEND: 1899 case UHF_C_PORT_OVER_CURRENT: 1900 case UHF_C_PORT_RESET: 1901 /* Enable RHSC interrupt if condition is cleared. */ 1902 if ((OREAD4(sc, port) >> 16) == 0) 1903 ehci_pcd_able(sc, 1); 1904 break; 1905 default: 1906 break; 1907 } 1908 #endif 1909 break; 1910 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1911 if (len == 0) 1912 break; 1913 if ((value & 0xff) != 0) { 1914 err = USBD_IOERROR; 1915 goto ret; 1916 } 1917 hubd = ehci_hubd; 1918 hubd.bNbrPorts = sc->sc_noport; 1919 v = EOREAD4(sc, EHCI_HCSPARAMS); 1920 USETW(hubd.wHubCharacteristics, 1921 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1922 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1923 ? UHD_PORT_IND : 0); 1924 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1925 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1926 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1927 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1928 l = min(len, hubd.bDescLength); 1929 totlen = l; 1930 memcpy(buf, &hubd, l); 1931 break; 1932 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1933 if (len != 4) { 1934 err = USBD_IOERROR; 1935 goto ret; 1936 } 1937 memset(buf, 0, len); /* ? XXX */ 1938 totlen = len; 1939 break; 1940 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1941 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1942 index)); 1943 if (index < 1 || index > sc->sc_noport) { 1944 err = USBD_IOERROR; 1945 goto ret; 1946 } 1947 if (len != 4) { 1948 err = USBD_IOERROR; 1949 goto ret; 1950 } 1951 v = EOREAD4(sc, EHCI_PORTSC(index)); 1952 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1953 v)); 1954 i = UPS_HIGH_SPEED; 1955 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1956 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1957 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1958 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1959 if (v & EHCI_PS_PR) i |= UPS_RESET; 1960 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1961 USETW(ps.wPortStatus, i); 1962 i = 0; 1963 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1964 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1965 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1966 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1967 USETW(ps.wPortChange, i); 1968 l = min(len, sizeof ps); 1969 memcpy(buf, &ps, l); 1970 totlen = l; 1971 break; 1972 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1973 err = USBD_IOERROR; 1974 goto ret; 1975 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1976 break; 1977 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1978 if (index < 1 || index > sc->sc_noport) { 1979 err = USBD_IOERROR; 1980 goto ret; 1981 } 1982 port = EHCI_PORTSC(index); 1983 v = EOREAD4(sc, port); 1984 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1985 v &= ~EHCI_PS_CLEAR; 1986 switch(value) { 1987 case UHF_PORT_ENABLE: 1988 EOWRITE4(sc, port, v | EHCI_PS_PE); 1989 break; 1990 case UHF_PORT_SUSPEND: 1991 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1992 break; 1993 case UHF_PORT_RESET: 1994 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1995 index)); 1996 if (EHCI_PS_IS_LOWSPEED(v)) { 1997 /* Low speed device, give up ownership. */ 1998 ehci_disown(sc, index, 1); 1999 break; 2000 } 2001 /* Start reset sequence. */ 2002 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2003 EOWRITE4(sc, port, v | EHCI_PS_PR); 2004 /* Wait for reset to complete. */ 2005 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2006 if (sc->sc_dying) { 2007 err = USBD_IOERROR; 2008 goto ret; 2009 } 2010 /* Terminate reset sequence. */ 2011 EOWRITE4(sc, port, v); 2012 /* Wait for HC to complete reset. */ 2013 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2014 if (sc->sc_dying) { 2015 err = USBD_IOERROR; 2016 goto ret; 2017 } 2018 v = EOREAD4(sc, port); 2019 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2020 if (v & EHCI_PS_PR) { 2021 printf("%s: port reset timeout\n", 2022 USBDEVNAME(sc->sc_bus.bdev)); 2023 return (USBD_TIMEOUT); 2024 } 2025 if (!(v & EHCI_PS_PE)) { 2026 /* Not a high speed device, give up ownership.*/ 2027 ehci_disown(sc, index, 0); 2028 break; 2029 } 2030 sc->sc_isreset[index] = 1; 2031 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2032 index, v)); 2033 break; 2034 case UHF_PORT_POWER: 2035 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2036 "%d (has PPC = %d)\n", index, 2037 sc->sc_hasppc)); 2038 if (sc->sc_hasppc) 2039 EOWRITE4(sc, port, v | EHCI_PS_PP); 2040 break; 2041 case UHF_PORT_TEST: 2042 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2043 "%d\n", index)); 2044 break; 2045 case UHF_PORT_INDICATOR: 2046 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2047 "%d\n", index)); 2048 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2049 break; 2050 default: 2051 err = USBD_IOERROR; 2052 goto ret; 2053 } 2054 break; 2055 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2056 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2057 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2058 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2059 break; 2060 default: 2061 err = USBD_IOERROR; 2062 goto ret; 2063 } 2064 xfer->actlen = totlen; 2065 err = USBD_NORMAL_COMPLETION; 2066 ret: 2067 xfer->status = err; 2068 s = splusb(); 2069 usb_transfer_complete(xfer); 2070 splx(s); 2071 return (USBD_IN_PROGRESS); 2072 } 2073 2074 void 2075 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2076 { 2077 int port; 2078 u_int32_t v; 2079 2080 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2081 #ifdef DIAGNOSTIC 2082 if (sc->sc_npcomp != 0) { 2083 int i = (index-1) / sc->sc_npcomp; 2084 if (i >= sc->sc_ncomp) 2085 printf("%s: strange port\n", 2086 USBDEVNAME(sc->sc_bus.bdev)); 2087 else 2088 printf("%s: handing over %s speed device on " 2089 "port %d to %s\n", 2090 USBDEVNAME(sc->sc_bus.bdev), 2091 lowspeed ? "low" : "full", 2092 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2093 } else { 2094 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2095 } 2096 #endif 2097 port = EHCI_PORTSC(index); 2098 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2099 EOWRITE4(sc, port, v | EHCI_PS_PO); 2100 } 2101 2102 /* Abort a root control request. */ 2103 Static void 2104 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2105 { 2106 /* Nothing to do, all transfers are synchronous. */ 2107 } 2108 2109 /* Close the root pipe. */ 2110 Static void 2111 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2112 { 2113 DPRINTF(("ehci_root_ctrl_close\n")); 2114 /* Nothing to do. */ 2115 } 2116 2117 void 2118 ehci_root_intr_done(usbd_xfer_handle xfer) 2119 { 2120 xfer->hcpriv = NULL; 2121 } 2122 2123 Static usbd_status 2124 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2125 { 2126 usbd_status err; 2127 2128 /* Insert last in queue. */ 2129 err = usb_insert_transfer(xfer); 2130 if (err) 2131 return (err); 2132 2133 /* Pipe isn't running, start first */ 2134 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2135 } 2136 2137 Static usbd_status 2138 ehci_root_intr_start(usbd_xfer_handle xfer) 2139 { 2140 usbd_pipe_handle pipe = xfer->pipe; 2141 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2142 2143 if (sc->sc_dying) 2144 return (USBD_IOERROR); 2145 2146 sc->sc_intrxfer = xfer; 2147 2148 return (USBD_IN_PROGRESS); 2149 } 2150 2151 /* Abort a root interrupt request. */ 2152 Static void 2153 ehci_root_intr_abort(usbd_xfer_handle xfer) 2154 { 2155 int s; 2156 2157 if (xfer->pipe->intrxfer == xfer) { 2158 DPRINTF(("ehci_root_intr_abort: remove\n")); 2159 xfer->pipe->intrxfer = NULL; 2160 } 2161 xfer->status = USBD_CANCELLED; 2162 s = splusb(); 2163 usb_transfer_complete(xfer); 2164 splx(s); 2165 } 2166 2167 /* Close the root pipe. */ 2168 Static void 2169 ehci_root_intr_close(usbd_pipe_handle pipe) 2170 { 2171 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2172 2173 DPRINTF(("ehci_root_intr_close\n")); 2174 2175 sc->sc_intrxfer = NULL; 2176 } 2177 2178 void 2179 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2180 { 2181 xfer->hcpriv = NULL; 2182 } 2183 2184 /************************/ 2185 2186 ehci_soft_qh_t * 2187 ehci_alloc_sqh(ehci_softc_t *sc) 2188 { 2189 ehci_soft_qh_t *sqh; 2190 usbd_status err; 2191 int i, offs; 2192 usb_dma_t dma; 2193 2194 if (sc->sc_freeqhs == NULL) { 2195 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2196 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2197 EHCI_PAGE_SIZE, &dma); 2198 #ifdef EHCI_DEBUG 2199 if (err) 2200 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2201 #endif 2202 if (err) 2203 return (NULL); 2204 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2205 offs = i * EHCI_SQH_SIZE; 2206 sqh = KERNADDR(&dma, offs); 2207 sqh->physaddr = DMAADDR(&dma, offs); 2208 sqh->next = sc->sc_freeqhs; 2209 sc->sc_freeqhs = sqh; 2210 } 2211 } 2212 sqh = sc->sc_freeqhs; 2213 sc->sc_freeqhs = sqh->next; 2214 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2215 sqh->next = NULL; 2216 return (sqh); 2217 } 2218 2219 void 2220 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2221 { 2222 sqh->next = sc->sc_freeqhs; 2223 sc->sc_freeqhs = sqh; 2224 } 2225 2226 ehci_soft_qtd_t * 2227 ehci_alloc_sqtd(ehci_softc_t *sc) 2228 { 2229 ehci_soft_qtd_t *sqtd; 2230 usbd_status err; 2231 int i, offs; 2232 usb_dma_t dma; 2233 int s; 2234 2235 if (sc->sc_freeqtds == NULL) { 2236 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2237 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2238 EHCI_PAGE_SIZE, &dma); 2239 #ifdef EHCI_DEBUG 2240 if (err) 2241 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2242 #endif 2243 if (err) 2244 return (NULL); 2245 s = splusb(); 2246 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2247 offs = i * EHCI_SQTD_SIZE; 2248 sqtd = KERNADDR(&dma, offs); 2249 sqtd->physaddr = DMAADDR(&dma, offs); 2250 sqtd->nextqtd = sc->sc_freeqtds; 2251 sc->sc_freeqtds = sqtd; 2252 } 2253 splx(s); 2254 } 2255 2256 s = splusb(); 2257 sqtd = sc->sc_freeqtds; 2258 sc->sc_freeqtds = sqtd->nextqtd; 2259 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2260 sqtd->nextqtd = NULL; 2261 sqtd->xfer = NULL; 2262 splx(s); 2263 2264 return (sqtd); 2265 } 2266 2267 void 2268 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2269 { 2270 int s; 2271 2272 s = splusb(); 2273 sqtd->nextqtd = sc->sc_freeqtds; 2274 sc->sc_freeqtds = sqtd; 2275 splx(s); 2276 } 2277 2278 usbd_status 2279 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2280 int alen, int rd, usbd_xfer_handle xfer, 2281 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2282 { 2283 ehci_soft_qtd_t *next, *cur; 2284 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2285 u_int32_t qtdstatus; 2286 int len, curlen, mps; 2287 int i, tog; 2288 usb_dma_t *dma = &xfer->dmabuf; 2289 u_int16_t flags = xfer->flags; 2290 2291 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2292 2293 len = alen; 2294 dataphys = DMAADDR(dma, 0); 2295 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2296 qtdstatus = EHCI_QTD_ACTIVE | 2297 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2298 EHCI_QTD_SET_CERR(3) 2299 /* IOC set below */ 2300 /* BYTES set below */ 2301 ; 2302 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2303 tog = epipe->nexttoggle; 2304 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2305 2306 cur = ehci_alloc_sqtd(sc); 2307 *sp = cur; 2308 if (cur == NULL) 2309 goto nomem; 2310 for (;;) { 2311 dataphyspage = EHCI_PAGE(dataphys); 2312 /* The EHCI hardware can handle at most 5 pages. */ 2313 if (dataphyslastpage - dataphyspage < 2314 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2315 /* we can handle it in this QTD */ 2316 curlen = len; 2317 } else { 2318 /* must use multiple TDs, fill as much as possible. */ 2319 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2320 EHCI_PAGE_OFFSET(dataphys); 2321 #ifdef DIAGNOSTIC 2322 if (curlen > len) { 2323 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2324 "len=0x%x offs=0x%x\n", curlen, len, 2325 EHCI_PAGE_OFFSET(dataphys)); 2326 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2327 dataphyslastpage, dataphyspage, 2328 dataphys); 2329 curlen = len; 2330 } 2331 #endif 2332 /* the length must be a multiple of the max size */ 2333 curlen -= curlen % mps; 2334 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2335 "curlen=%d\n", curlen)); 2336 #ifdef DIAGNOSTIC 2337 if (curlen == 0) 2338 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2339 #endif 2340 } 2341 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2342 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2343 dataphys, dataphyslastpage, 2344 len, curlen)); 2345 len -= curlen; 2346 2347 /* 2348 * Allocate another transfer if there's more data left, 2349 * or if force last short transfer flag is set and we're 2350 * allocating a multiple of the max packet size. 2351 */ 2352 if (len != 0 || 2353 ((curlen % mps) == 0 && !rd && curlen != 0 && 2354 (flags & USBD_FORCE_SHORT_XFER))) { 2355 next = ehci_alloc_sqtd(sc); 2356 if (next == NULL) 2357 goto nomem; 2358 nextphys = htole32(next->physaddr); 2359 } else { 2360 next = NULL; 2361 nextphys = EHCI_NULL; 2362 } 2363 2364 for (i = 0; i * EHCI_PAGE_SIZE < 2365 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2366 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2367 if (i != 0) /* use offset only in first buffer */ 2368 a = EHCI_PAGE(a); 2369 cur->qtd.qtd_buffer[i] = htole32(a); 2370 cur->qtd.qtd_buffer_hi[i] = 0; 2371 #ifdef DIAGNOSTIC 2372 if (i >= EHCI_QTD_NBUFFERS) { 2373 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2374 goto nomem; 2375 } 2376 #endif 2377 } 2378 cur->nextqtd = next; 2379 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2380 cur->qtd.qtd_status = 2381 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2382 cur->xfer = xfer; 2383 cur->len = curlen; 2384 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2385 dataphys, dataphys + curlen)); 2386 /* adjust the toggle based on the number of packets in this 2387 qtd */ 2388 if (((curlen + mps - 1) / mps) & 1) { 2389 tog ^= 1; 2390 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2391 } 2392 if (next == NULL) 2393 break; 2394 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2395 dataphys += curlen; 2396 cur = next; 2397 } 2398 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2399 *ep = cur; 2400 epipe->nexttoggle = tog; 2401 2402 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2403 *sp, *ep)); 2404 2405 return (USBD_NORMAL_COMPLETION); 2406 2407 nomem: 2408 /* XXX free chain */ 2409 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2410 return (USBD_NOMEM); 2411 } 2412 2413 Static void 2414 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2415 ehci_soft_qtd_t *sqtdend) 2416 { 2417 ehci_soft_qtd_t *p; 2418 int i; 2419 2420 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2421 sqtd, sqtdend)); 2422 2423 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2424 p = sqtd->nextqtd; 2425 ehci_free_sqtd(sc, sqtd); 2426 } 2427 } 2428 2429 /****************/ 2430 2431 /* 2432 * Close a reqular pipe. 2433 * Assumes that there are no pending transactions. 2434 */ 2435 void 2436 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2437 { 2438 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2439 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2440 ehci_soft_qh_t *sqh = epipe->sqh; 2441 int s; 2442 2443 s = splusb(); 2444 ehci_rem_qh(sc, sqh, head); 2445 splx(s); 2446 ehci_free_sqh(sc, epipe->sqh); 2447 } 2448 2449 /* 2450 * Abort a device request. 2451 * If this routine is called at splusb() it guarantees that the request 2452 * will be removed from the hardware scheduling and that the callback 2453 * for it will be called with USBD_CANCELLED status. 2454 * It's impossible to guarantee that the requested transfer will not 2455 * have happened since the hardware runs concurrently. 2456 * If the transaction has already happened we rely on the ordinary 2457 * interrupt processing to process it. 2458 * XXX This is most probably wrong. 2459 */ 2460 void 2461 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2462 { 2463 #define exfer EXFER(xfer) 2464 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2465 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2466 ehci_soft_qh_t *sqh = epipe->sqh; 2467 ehci_soft_qtd_t *sqtd; 2468 ehci_physaddr_t cur; 2469 u_int32_t qhstatus; 2470 int s; 2471 int hit; 2472 int wake; 2473 2474 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2475 2476 if (sc->sc_dying) { 2477 /* If we're dying, just do the software part. */ 2478 s = splusb(); 2479 xfer->status = status; /* make software ignore it */ 2480 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2481 usb_transfer_complete(xfer); 2482 splx(s); 2483 return; 2484 } 2485 2486 if (xfer->device->bus->intr_context || !curproc) 2487 panic("ehci_abort_xfer: not in process context"); 2488 2489 /* 2490 * If an abort is already in progress then just wait for it to 2491 * complete and return. 2492 */ 2493 if (xfer->hcflags & UXFER_ABORTING) { 2494 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2495 #ifdef DIAGNOSTIC 2496 if (status == USBD_TIMEOUT) 2497 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2498 #endif 2499 /* Override the status which might be USBD_TIMEOUT. */ 2500 xfer->status = status; 2501 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2502 xfer->hcflags |= UXFER_ABORTWAIT; 2503 while (xfer->hcflags & UXFER_ABORTING) 2504 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2505 return; 2506 } 2507 xfer->hcflags |= UXFER_ABORTING; 2508 2509 /* 2510 * Step 1: Make interrupt routine and hardware ignore xfer. 2511 */ 2512 s = splusb(); 2513 xfer->status = status; /* make software ignore it */ 2514 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2515 qhstatus = sqh->qh.qh_qtd.qtd_status; 2516 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2517 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2518 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2519 if (sqtd == exfer->sqtdend) 2520 break; 2521 } 2522 splx(s); 2523 2524 /* 2525 * Step 2: Wait until we know hardware has finished any possible 2526 * use of the xfer. Also make sure the soft interrupt routine 2527 * has run. 2528 */ 2529 ehci_sync_hc(sc); 2530 s = splusb(); 2531 #ifdef USB_USE_SOFTINTR 2532 sc->sc_softwake = 1; 2533 #endif /* USB_USE_SOFTINTR */ 2534 usb_schedsoftintr(&sc->sc_bus); 2535 #ifdef USB_USE_SOFTINTR 2536 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2537 #endif /* USB_USE_SOFTINTR */ 2538 splx(s); 2539 2540 /* 2541 * Step 3: Remove any vestiges of the xfer from the hardware. 2542 * The complication here is that the hardware may have executed 2543 * beyond the xfer we're trying to abort. So as we're scanning 2544 * the TDs of this xfer we check if the hardware points to 2545 * any of them. 2546 */ 2547 s = splusb(); /* XXX why? */ 2548 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2549 hit = 0; 2550 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2551 hit |= cur == sqtd->physaddr; 2552 if (sqtd == exfer->sqtdend) 2553 break; 2554 } 2555 sqtd = sqtd->nextqtd; 2556 /* Zap curqtd register if hardware pointed inside the xfer. */ 2557 if (hit && sqtd != NULL) { 2558 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2559 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2560 sqh->qh.qh_qtd.qtd_status = qhstatus; 2561 } else { 2562 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2563 } 2564 2565 /* 2566 * Step 4: Execute callback. 2567 */ 2568 #ifdef DIAGNOSTIC 2569 exfer->isdone = 1; 2570 #endif 2571 wake = xfer->hcflags & UXFER_ABORTWAIT; 2572 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2573 usb_transfer_complete(xfer); 2574 if (wake) 2575 wakeup(&xfer->hcflags); 2576 2577 splx(s); 2578 #undef exfer 2579 } 2580 2581 void 2582 ehci_timeout(void *addr) 2583 { 2584 struct ehci_xfer *exfer = addr; 2585 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2586 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2587 2588 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2589 #ifdef USB_DEBUG 2590 if (ehcidebug > 1) 2591 usbd_dump_pipe(exfer->xfer.pipe); 2592 #endif 2593 2594 if (sc->sc_dying) { 2595 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2596 return; 2597 } 2598 2599 /* Execute the abort in a process context. */ 2600 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2601 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2602 } 2603 2604 void 2605 ehci_timeout_task(void *addr) 2606 { 2607 usbd_xfer_handle xfer = addr; 2608 int s; 2609 2610 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2611 2612 s = splusb(); 2613 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2614 splx(s); 2615 } 2616 2617 /************************/ 2618 2619 Static usbd_status 2620 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2621 { 2622 usbd_status err; 2623 2624 /* Insert last in queue. */ 2625 err = usb_insert_transfer(xfer); 2626 if (err) 2627 return (err); 2628 2629 /* Pipe isn't running, start first */ 2630 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2631 } 2632 2633 Static usbd_status 2634 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2635 { 2636 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2637 usbd_status err; 2638 2639 if (sc->sc_dying) 2640 return (USBD_IOERROR); 2641 2642 #ifdef DIAGNOSTIC 2643 if (!(xfer->rqflags & URQ_REQUEST)) { 2644 /* XXX panic */ 2645 printf("ehci_device_ctrl_transfer: not a request\n"); 2646 return (USBD_INVAL); 2647 } 2648 #endif 2649 2650 err = ehci_device_request(xfer); 2651 if (err) 2652 return (err); 2653 2654 if (sc->sc_bus.use_polling) 2655 ehci_waitintr(sc, xfer); 2656 return (USBD_IN_PROGRESS); 2657 } 2658 2659 void 2660 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2661 { 2662 struct ehci_xfer *ex = EXFER(xfer); 2663 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2664 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2665 2666 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2667 2668 #ifdef DIAGNOSTIC 2669 if (!(xfer->rqflags & URQ_REQUEST)) { 2670 panic("ehci_ctrl_done: not a request"); 2671 } 2672 #endif 2673 2674 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2675 ehci_del_intr_list(ex); /* remove from active list */ 2676 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2677 } 2678 2679 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2680 } 2681 2682 /* Abort a device control request. */ 2683 Static void 2684 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2685 { 2686 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2687 ehci_abort_xfer(xfer, USBD_CANCELLED); 2688 } 2689 2690 /* Close a device control pipe. */ 2691 Static void 2692 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2693 { 2694 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2695 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2696 2697 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2698 ehci_close_pipe(pipe, sc->sc_async_head); 2699 } 2700 2701 usbd_status 2702 ehci_device_request(usbd_xfer_handle xfer) 2703 { 2704 #define exfer EXFER(xfer) 2705 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2706 usb_device_request_t *req = &xfer->request; 2707 usbd_device_handle dev = epipe->pipe.device; 2708 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2709 int addr = dev->address; 2710 ehci_soft_qtd_t *setup, *stat, *next; 2711 ehci_soft_qh_t *sqh; 2712 int isread; 2713 int len; 2714 usbd_status err; 2715 int s; 2716 2717 isread = req->bmRequestType & UT_READ; 2718 len = UGETW(req->wLength); 2719 2720 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2721 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2722 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2723 UGETW(req->wIndex), len, addr, 2724 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2725 2726 setup = ehci_alloc_sqtd(sc); 2727 if (setup == NULL) { 2728 err = USBD_NOMEM; 2729 goto bad1; 2730 } 2731 stat = ehci_alloc_sqtd(sc); 2732 if (stat == NULL) { 2733 err = USBD_NOMEM; 2734 goto bad2; 2735 } 2736 2737 sqh = epipe->sqh; 2738 epipe->u.ctl.length = len; 2739 2740 /* Update device address and length since they may have changed 2741 during the setup of the control pipe in usbd_new_device(). */ 2742 /* XXX This only needs to be done once, but it's too early in open. */ 2743 /* XXXX Should not touch ED here! */ 2744 sqh->qh.qh_endp = 2745 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2746 htole32( 2747 EHCI_QH_SET_ADDR(addr) | 2748 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2749 ); 2750 2751 /* Set up data transaction */ 2752 if (len != 0) { 2753 ehci_soft_qtd_t *end; 2754 2755 /* Start toggle at 1. */ 2756 epipe->nexttoggle = 1; 2757 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2758 &next, &end); 2759 if (err) 2760 goto bad3; 2761 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2762 end->nextqtd = stat; 2763 end->qtd.qtd_next = 2764 end->qtd.qtd_altnext = htole32(stat->physaddr); 2765 } else { 2766 next = stat; 2767 } 2768 2769 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2770 2771 /* Clear toggle */ 2772 setup->qtd.qtd_status = htole32( 2773 EHCI_QTD_ACTIVE | 2774 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2775 EHCI_QTD_SET_CERR(3) | 2776 EHCI_QTD_SET_TOGGLE(0) | 2777 EHCI_QTD_SET_BYTES(sizeof *req) 2778 ); 2779 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2780 setup->qtd.qtd_buffer_hi[0] = 0; 2781 setup->nextqtd = next; 2782 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2783 setup->xfer = xfer; 2784 setup->len = sizeof *req; 2785 2786 stat->qtd.qtd_status = htole32( 2787 EHCI_QTD_ACTIVE | 2788 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2789 EHCI_QTD_SET_CERR(3) | 2790 EHCI_QTD_SET_TOGGLE(1) | 2791 EHCI_QTD_IOC 2792 ); 2793 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2794 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2795 stat->nextqtd = NULL; 2796 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2797 stat->xfer = xfer; 2798 stat->len = 0; 2799 2800 #ifdef EHCI_DEBUG 2801 if (ehcidebug > 5) { 2802 DPRINTF(("ehci_device_request:\n")); 2803 ehci_dump_sqh(sqh); 2804 ehci_dump_sqtds(setup); 2805 } 2806 #endif 2807 2808 exfer->sqtdstart = setup; 2809 exfer->sqtdend = stat; 2810 #ifdef DIAGNOSTIC 2811 if (!exfer->isdone) { 2812 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2813 } 2814 exfer->isdone = 0; 2815 #endif 2816 2817 /* Insert qTD in QH list. */ 2818 s = splusb(); 2819 ehci_set_qh_qtd(sqh, setup); 2820 if (xfer->timeout && !sc->sc_bus.use_polling) { 2821 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2822 ehci_timeout, xfer); 2823 } 2824 ehci_add_intr_list(sc, exfer); 2825 xfer->status = USBD_IN_PROGRESS; 2826 splx(s); 2827 2828 #ifdef EHCI_DEBUG 2829 if (ehcidebug > 10) { 2830 DPRINTF(("ehci_device_request: status=%x\n", 2831 EOREAD4(sc, EHCI_USBSTS))); 2832 delay(10000); 2833 ehci_dump_regs(sc); 2834 ehci_dump_sqh(sc->sc_async_head); 2835 ehci_dump_sqh(sqh); 2836 ehci_dump_sqtds(setup); 2837 } 2838 #endif 2839 2840 return (USBD_NORMAL_COMPLETION); 2841 2842 bad3: 2843 ehci_free_sqtd(sc, stat); 2844 bad2: 2845 ehci_free_sqtd(sc, setup); 2846 bad1: 2847 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2848 xfer->status = err; 2849 usb_transfer_complete(xfer); 2850 return (err); 2851 #undef exfer 2852 } 2853 2854 /* 2855 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2856 * qTD status, or miss signalling occasionally under heavy load. If the host 2857 * machine is too fast, we we can miss transaction completion - when we scan 2858 * the active list the transaction still seems to be active. This generally 2859 * exhibits itself as a umass stall that never recovers. 2860 * 2861 * We work around this behaviour by setting up this callback after any softintr 2862 * that completes with transactions still pending, giving us another chance to 2863 * check for completion after the writeback has taken place. 2864 */ 2865 void 2866 ehci_intrlist_timeout(void *arg) 2867 { 2868 ehci_softc_t *sc = arg; 2869 int s = splusb(); 2870 2871 DPRINTF(("ehci_intrlist_timeout\n")); 2872 usb_schedsoftintr(&sc->sc_bus); 2873 2874 splx(s); 2875 } 2876 2877 /************************/ 2878 2879 Static usbd_status 2880 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2881 { 2882 usbd_status err; 2883 2884 /* Insert last in queue. */ 2885 err = usb_insert_transfer(xfer); 2886 if (err) 2887 return (err); 2888 2889 /* Pipe isn't running, start first */ 2890 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2891 } 2892 2893 usbd_status 2894 ehci_device_bulk_start(usbd_xfer_handle xfer) 2895 { 2896 #define exfer EXFER(xfer) 2897 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2898 usbd_device_handle dev = epipe->pipe.device; 2899 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2900 ehci_soft_qtd_t *data, *dataend; 2901 ehci_soft_qh_t *sqh; 2902 usbd_status err; 2903 int len, isread, endpt; 2904 int s; 2905 2906 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2907 xfer, xfer->length, xfer->flags)); 2908 2909 if (sc->sc_dying) 2910 return (USBD_IOERROR); 2911 2912 #ifdef DIAGNOSTIC 2913 if (xfer->rqflags & URQ_REQUEST) 2914 panic("ehci_device_bulk_start: a request"); 2915 #endif 2916 2917 len = xfer->length; 2918 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2919 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2920 sqh = epipe->sqh; 2921 2922 epipe->u.bulk.length = len; 2923 2924 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2925 &dataend); 2926 if (err) { 2927 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2928 xfer->status = err; 2929 usb_transfer_complete(xfer); 2930 return (err); 2931 } 2932 2933 #ifdef EHCI_DEBUG 2934 if (ehcidebug > 5) { 2935 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2936 ehci_dump_sqh(sqh); 2937 ehci_dump_sqtds(data); 2938 } 2939 #endif 2940 2941 /* Set up interrupt info. */ 2942 exfer->sqtdstart = data; 2943 exfer->sqtdend = dataend; 2944 #ifdef DIAGNOSTIC 2945 if (!exfer->isdone) { 2946 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2947 } 2948 exfer->isdone = 0; 2949 #endif 2950 2951 s = splusb(); 2952 ehci_set_qh_qtd(sqh, data); 2953 if (xfer->timeout && !sc->sc_bus.use_polling) { 2954 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2955 ehci_timeout, xfer); 2956 } 2957 ehci_add_intr_list(sc, exfer); 2958 xfer->status = USBD_IN_PROGRESS; 2959 splx(s); 2960 2961 #ifdef EHCI_DEBUG 2962 if (ehcidebug > 10) { 2963 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2964 delay(10000); 2965 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2966 ehci_dump_regs(sc); 2967 #if 0 2968 printf("async_head:\n"); 2969 ehci_dump_sqh(sc->sc_async_head); 2970 #endif 2971 printf("sqh:\n"); 2972 ehci_dump_sqh(sqh); 2973 ehci_dump_sqtds(data); 2974 } 2975 #endif 2976 2977 if (sc->sc_bus.use_polling) 2978 ehci_waitintr(sc, xfer); 2979 2980 return (USBD_IN_PROGRESS); 2981 #undef exfer 2982 } 2983 2984 Static void 2985 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2986 { 2987 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2988 ehci_abort_xfer(xfer, USBD_CANCELLED); 2989 } 2990 2991 /* 2992 * Close a device bulk pipe. 2993 */ 2994 Static void 2995 ehci_device_bulk_close(usbd_pipe_handle pipe) 2996 { 2997 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2998 2999 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3000 ehci_close_pipe(pipe, sc->sc_async_head); 3001 } 3002 3003 void 3004 ehci_device_bulk_done(usbd_xfer_handle xfer) 3005 { 3006 struct ehci_xfer *ex = EXFER(xfer); 3007 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3008 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3009 3010 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3011 xfer, xfer->actlen)); 3012 3013 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3014 ehci_del_intr_list(ex); /* remove from active list */ 3015 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3016 } 3017 3018 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3019 } 3020 3021 /************************/ 3022 3023 Static usbd_status 3024 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3025 { 3026 struct ehci_soft_islot *isp; 3027 int islot, lev; 3028 3029 /* Find a poll rate that is large enough. */ 3030 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3031 if (EHCI_ILEV_IVAL(lev) <= ival) 3032 break; 3033 3034 /* Pick an interrupt slot at the right level. */ 3035 /* XXX could do better than picking at random */ 3036 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3037 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3038 3039 sqh->islot = islot; 3040 isp = &sc->sc_islots[islot]; 3041 ehci_add_qh(sqh, isp->sqh); 3042 3043 return (USBD_NORMAL_COMPLETION); 3044 } 3045 3046 Static usbd_status 3047 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3048 { 3049 usbd_status err; 3050 3051 /* Insert last in queue. */ 3052 err = usb_insert_transfer(xfer); 3053 if (err) 3054 return (err); 3055 3056 /* 3057 * Pipe isn't running (otherwise err would be USBD_INPROG), 3058 * so start it first. 3059 */ 3060 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3061 } 3062 3063 Static usbd_status 3064 ehci_device_intr_start(usbd_xfer_handle xfer) 3065 { 3066 #define exfer EXFER(xfer) 3067 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3068 usbd_device_handle dev = xfer->pipe->device; 3069 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3070 ehci_soft_qtd_t *data, *dataend; 3071 ehci_soft_qh_t *sqh; 3072 usbd_status err; 3073 int len, isread, endpt; 3074 int s; 3075 3076 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3077 xfer, xfer->length, xfer->flags)); 3078 3079 if (sc->sc_dying) 3080 return (USBD_IOERROR); 3081 3082 #ifdef DIAGNOSTIC 3083 if (xfer->rqflags & URQ_REQUEST) 3084 panic("ehci_device_intr_start: a request"); 3085 #endif 3086 3087 len = xfer->length; 3088 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3089 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3090 sqh = epipe->sqh; 3091 3092 epipe->u.intr.length = len; 3093 3094 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3095 &dataend); 3096 if (err) { 3097 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3098 xfer->status = err; 3099 usb_transfer_complete(xfer); 3100 return (err); 3101 } 3102 3103 #ifdef EHCI_DEBUG 3104 if (ehcidebug > 5) { 3105 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3106 ehci_dump_sqh(sqh); 3107 ehci_dump_sqtds(data); 3108 } 3109 #endif 3110 3111 /* Set up interrupt info. */ 3112 exfer->sqtdstart = data; 3113 exfer->sqtdend = dataend; 3114 #ifdef DIAGNOSTIC 3115 if (!exfer->isdone) { 3116 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3117 } 3118 exfer->isdone = 0; 3119 #endif 3120 3121 s = splusb(); 3122 ehci_set_qh_qtd(sqh, data); 3123 if (xfer->timeout && !sc->sc_bus.use_polling) { 3124 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3125 ehci_timeout, xfer); 3126 } 3127 ehci_add_intr_list(sc, exfer); 3128 xfer->status = USBD_IN_PROGRESS; 3129 splx(s); 3130 3131 #ifdef EHCI_DEBUG 3132 if (ehcidebug > 10) { 3133 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3134 delay(10000); 3135 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3136 ehci_dump_regs(sc); 3137 printf("sqh:\n"); 3138 ehci_dump_sqh(sqh); 3139 ehci_dump_sqtds(data); 3140 } 3141 #endif 3142 3143 if (sc->sc_bus.use_polling) 3144 ehci_waitintr(sc, xfer); 3145 3146 return (USBD_IN_PROGRESS); 3147 #undef exfer 3148 } 3149 3150 Static void 3151 ehci_device_intr_abort(usbd_xfer_handle xfer) 3152 { 3153 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3154 if (xfer->pipe->intrxfer == xfer) { 3155 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3156 xfer->pipe->intrxfer = NULL; 3157 } 3158 ehci_abort_xfer(xfer, USBD_CANCELLED); 3159 } 3160 3161 Static void 3162 ehci_device_intr_close(usbd_pipe_handle pipe) 3163 { 3164 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3166 struct ehci_soft_islot *isp; 3167 3168 isp = &sc->sc_islots[epipe->sqh->islot]; 3169 ehci_close_pipe(pipe, isp->sqh); 3170 } 3171 3172 Static void 3173 ehci_device_intr_done(usbd_xfer_handle xfer) 3174 { 3175 #define exfer EXFER(xfer) 3176 struct ehci_xfer *ex = EXFER(xfer); 3177 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3178 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3179 ehci_soft_qtd_t *data, *dataend; 3180 ehci_soft_qh_t *sqh; 3181 usbd_status err; 3182 int len, isread, endpt, s; 3183 3184 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3185 xfer, xfer->actlen)); 3186 3187 if (xfer->pipe->repeat) { 3188 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3189 3190 len = epipe->u.intr.length; 3191 xfer->length = len; 3192 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3193 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3194 sqh = epipe->sqh; 3195 3196 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3197 &data, &dataend); 3198 if (err) { 3199 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3200 xfer->status = err; 3201 return; 3202 } 3203 3204 /* Set up interrupt info. */ 3205 exfer->sqtdstart = data; 3206 exfer->sqtdend = dataend; 3207 #ifdef DIAGNOSTIC 3208 if (!exfer->isdone) { 3209 printf("ehci_device_intr_done: not done, ex=%p\n", 3210 exfer); 3211 } 3212 exfer->isdone = 0; 3213 #endif 3214 3215 s = splusb(); 3216 ehci_set_qh_qtd(sqh, data); 3217 if (xfer->timeout && !sc->sc_bus.use_polling) { 3218 usb_callout(xfer->timeout_handle, 3219 mstohz(xfer->timeout), ehci_timeout, xfer); 3220 } 3221 splx(s); 3222 3223 xfer->status = USBD_IN_PROGRESS; 3224 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3225 ehci_del_intr_list(ex); /* remove from active list */ 3226 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3227 } 3228 #undef exfer 3229 } 3230 3231 /************************/ 3232 3233 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3234 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3235 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3236 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3237 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3238
Indexes created Mon Sep 22 13:09:51 GMT 2025