ehci.c revision 1.113
1 /* $NetBSD: ehci.c,v 1.113 2006/10/12 01:31:59 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.113 2006/10/12 01:31:59 christos Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 Static void ehci_power(int, void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t vers, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 vers = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 vers >> 8, vers & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 370 371 if (EHCI_HCC_64BIT(cparams)) { 372 /* MUST clear segment register if 64 bit capable. */ 373 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 374 } 375 376 sc->sc_bus.usbrev = USBREV_2_0; 377 378 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 379 USB_MEM_RESERVE); 380 381 /* Reset the controller */ 382 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 383 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 384 usb_delay_ms(&sc->sc_bus, 1); 385 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 386 for (i = 0; i < 100; i++) { 387 usb_delay_ms(&sc->sc_bus, 1); 388 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 389 if (!hcr) 390 break; 391 } 392 if (hcr) { 393 aprint_error("%s: reset timeout\n", 394 USBDEVNAME(sc->sc_bus.bdev)); 395 return (USBD_IOERROR); 396 } 397 398 /* XXX need proper intr scheduling */ 399 sc->sc_rand = 96; 400 401 /* frame list size at default, read back what we got and use that */ 402 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 403 case 0: sc->sc_flsize = 1024; break; 404 case 1: sc->sc_flsize = 512; break; 405 case 2: sc->sc_flsize = 256; break; 406 case 3: return (USBD_IOERROR); 407 } 408 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 409 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 410 if (err) 411 return (err); 412 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 413 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 414 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 415 416 /* Set up the bus struct. */ 417 sc->sc_bus.methods = &ehci_bus_methods; 418 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 419 420 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 421 ehci_power, sc); 422 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 423 424 sc->sc_eintrs = EHCI_NORMAL_INTRS; 425 426 /* 427 * Allocate the interrupt dummy QHs. These are arranged to give poll 428 * intervals that are powers of 2 times 1ms. 429 */ 430 for (i = 0; i < EHCI_INTRQHS; i++) { 431 sqh = ehci_alloc_sqh(sc); 432 if (sqh == NULL) { 433 err = USBD_NOMEM; 434 goto bad1; 435 } 436 sc->sc_islots[i].sqh = sqh; 437 } 438 for (i = 0; i < EHCI_INTRQHS; i++) { 439 sqh = sc->sc_islots[i].sqh; 440 if (i == 0) { 441 /* The last (1ms) QH terminates. */ 442 sqh->qh.qh_link = EHCI_NULL; 443 sqh->next = NULL; 444 } else { 445 /* Otherwise the next QH has half the poll interval */ 446 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 447 sqh->qh.qh_link = htole32(sqh->next->physaddr | 448 EHCI_LINK_QH); 449 } 450 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 451 sqh->qh.qh_curqtd = EHCI_NULL; 452 sqh->next = NULL; 453 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 454 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 455 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 456 sqh->sqtd = NULL; 457 } 458 /* Point the frame list at the last level (128ms). */ 459 for (i = 0; i < sc->sc_flsize; i++) { 460 int j; 461 462 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 463 revbits[i & (EHCI_MAX_POLLRATE-1)]; 464 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 465 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 466 i)].sqh->physaddr); 467 } 468 469 /* Allocate dummy QH that starts the async list. */ 470 sqh = ehci_alloc_sqh(sc); 471 if (sqh == NULL) { 472 err = USBD_NOMEM; 473 goto bad1; 474 } 475 /* Fill the QH */ 476 sqh->qh.qh_endp = 477 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 478 sqh->qh.qh_link = 479 htole32(sqh->physaddr | EHCI_LINK_QH); 480 sqh->qh.qh_curqtd = EHCI_NULL; 481 sqh->next = NULL; 482 /* Fill the overlay qTD */ 483 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 484 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 485 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 486 sqh->sqtd = NULL; 487 #ifdef EHCI_DEBUG 488 if (ehcidebug) { 489 ehci_dump_sqh(sqh); 490 } 491 #endif 492 493 /* Point to async list */ 494 sc->sc_async_head = sqh; 495 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 496 497 usb_callout_init(sc->sc_tmo_pcd); 498 usb_callout_init(sc->sc_tmo_intrlist); 499 500 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 501 502 /* Turn on controller */ 503 EOWRITE4(sc, EHCI_USBCMD, 504 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 505 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 506 EHCI_CMD_ASE | 507 EHCI_CMD_PSE | 508 EHCI_CMD_RS); 509 510 /* Take over port ownership */ 511 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 512 513 for (i = 0; i < 100; i++) { 514 usb_delay_ms(&sc->sc_bus, 1); 515 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 516 if (!hcr) 517 break; 518 } 519 if (hcr) { 520 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 521 return (USBD_IOERROR); 522 } 523 524 /* Enable interrupts */ 525 DPRINTFN(1,("ehci_init: enabling\n")); 526 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 /* Schedule a callout to catch any dropped transactions. */ 704 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 705 !LIST_EMPTY(&sc->sc_intrhead)) 706 usb_callout(sc->sc_tmo_intrlist, hz, 707 ehci_intrlist_timeout, sc); 708 709 #ifdef USB_USE_SOFTINTR 710 if (sc->sc_softwake) { 711 sc->sc_softwake = 0; 712 wakeup(&sc->sc_softwake); 713 } 714 #endif /* USB_USE_SOFTINTR */ 715 716 sc->sc_bus.intr_context--; 717 } 718 719 /* Check for an interrupt. */ 720 void 721 ehci_check_intr(ehci_softc_t *sc __unused, struct ehci_xfer *ex) 722 { 723 ehci_soft_qtd_t *sqtd, *lsqtd; 724 u_int32_t status; 725 726 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 727 728 if (ex->sqtdstart == NULL) { 729 printf("ehci_check_intr: sqtdstart=NULL\n"); 730 return; 731 } 732 lsqtd = ex->sqtdend; 733 #ifdef DIAGNOSTIC 734 if (lsqtd == NULL) { 735 printf("ehci_check_intr: lsqtd==0\n"); 736 return; 737 } 738 #endif 739 /* 740 * If the last TD is still active we need to check whether there 741 * is a an error somewhere in the middle, or whether there was a 742 * short packet (SPD and not ACTIVE). 743 */ 744 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 745 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 746 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 747 status = le32toh(sqtd->qtd.qtd_status); 748 /* If there's an active QTD the xfer isn't done. */ 749 if (status & EHCI_QTD_ACTIVE) 750 break; 751 /* Any kind of error makes the xfer done. */ 752 if (status & EHCI_QTD_HALTED) 753 goto done; 754 /* We want short packets, and it is short: it's done */ 755 if (EHCI_QTD_GET_BYTES(status) != 0) 756 goto done; 757 } 758 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 759 ex, ex->sqtdstart)); 760 return; 761 } 762 done: 763 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 764 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 765 ehci_idone(ex); 766 } 767 768 void 769 ehci_idone(struct ehci_xfer *ex) 770 { 771 usbd_xfer_handle xfer = &ex->xfer; 772 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 773 ehci_soft_qtd_t *sqtd, *lsqtd; 774 u_int32_t status = 0, nstatus = 0; 775 int actlen; 776 uint pkts_left; 777 778 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 779 #ifdef DIAGNOSTIC 780 { 781 int s = splhigh(); 782 if (ex->isdone) { 783 splx(s); 784 #ifdef EHCI_DEBUG 785 printf("ehci_idone: ex is done!\n "); 786 ehci_dump_exfer(ex); 787 #else 788 printf("ehci_idone: ex=%p is done!\n", ex); 789 #endif 790 return; 791 } 792 ex->isdone = 1; 793 splx(s); 794 } 795 #endif 796 797 if (xfer->status == USBD_CANCELLED || 798 xfer->status == USBD_TIMEOUT) { 799 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 800 return; 801 } 802 803 #ifdef EHCI_DEBUG 804 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 805 if (ehcidebug > 10) 806 ehci_dump_sqtds(ex->sqtdstart); 807 #endif 808 809 /* The transfer is done, compute actual length and status. */ 810 lsqtd = ex->sqtdend; 811 actlen = 0; 812 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 813 nstatus = le32toh(sqtd->qtd.qtd_status); 814 if (nstatus & EHCI_QTD_ACTIVE) 815 break; 816 817 status = nstatus; 818 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 819 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 820 } 821 822 /* 823 * If there are left over TDs we need to update the toggle. 824 * The default pipe doesn't need it since control transfers 825 * start the toggle at 0 every time. 826 */ 827 if (sqtd != lsqtd->nextqtd && 828 xfer->pipe->device->default_pipe != xfer->pipe) { 829 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 830 #if 0 831 ehci_dump_sqh(epipe->sqh); 832 ehci_dump_sqtds(ex->sqtdstart); 833 #endif 834 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 835 } 836 837 /* 838 * For a short transfer we need to update the toggle for the missing 839 * packets within the qTD. 840 */ 841 pkts_left = EHCI_QTD_GET_BYTES(status) / 842 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 843 epipe->nexttoggle ^= pkts_left % 2; 844 845 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 846 xfer->length, actlen, status)); 847 xfer->actlen = actlen; 848 if (status & EHCI_QTD_HALTED) { 849 #ifdef EHCI_DEBUG 850 char sbuf[128]; 851 852 bitmask_snprintf((u_int32_t)status, 853 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 854 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 855 856 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 857 "status 0x%s\n", 858 xfer->pipe->device->address, 859 xfer->pipe->endpoint->edesc->bEndpointAddress, 860 sbuf)); 861 if (ehcidebug > 2) { 862 ehci_dump_sqh(epipe->sqh); 863 ehci_dump_sqtds(ex->sqtdstart); 864 } 865 #endif 866 /* low&full speed has an extra error flag */ 867 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 868 EHCI_QH_SPEED_HIGH) 869 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 870 else 871 status &= EHCI_QTD_STATERRS; 872 if (status == 0) /* no other errors means a stall */ 873 xfer->status = USBD_STALLED; 874 else 875 xfer->status = USBD_IOERROR; /* more info XXX */ 876 /* XXX need to reset TT on missed microframe */ 877 if (status & EHCI_QTD_MISSEDMICRO) { 878 ehci_softc_t *sc = (ehci_softc_t *) 879 xfer->pipe->device->bus; 880 881 printf("%s: missed microframe, TT reset not " 882 "implemented, hub might be inoperational\n", 883 USBDEVNAME(sc->sc_bus.bdev)); 884 } 885 } else { 886 xfer->status = USBD_NORMAL_COMPLETION; 887 } 888 889 usb_transfer_complete(xfer); 890 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 891 } 892 893 /* 894 * Wait here until controller claims to have an interrupt. 895 * Then call ehci_intr and return. Use timeout to avoid waiting 896 * too long. 897 */ 898 void 899 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 900 { 901 int timo; 902 u_int32_t intrs; 903 904 xfer->status = USBD_IN_PROGRESS; 905 for (timo = xfer->timeout; timo >= 0; timo--) { 906 usb_delay_ms(&sc->sc_bus, 1); 907 if (sc->sc_dying) 908 break; 909 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 910 sc->sc_eintrs; 911 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 912 #ifdef EHCI_DEBUG 913 if (ehcidebug > 15) 914 ehci_dump_regs(sc); 915 #endif 916 if (intrs) { 917 ehci_intr1(sc); 918 if (xfer->status != USBD_IN_PROGRESS) 919 return; 920 } 921 } 922 923 /* Timeout */ 924 DPRINTF(("ehci_waitintr: timeout\n")); 925 xfer->status = USBD_TIMEOUT; 926 usb_transfer_complete(xfer); 927 /* XXX should free TD */ 928 } 929 930 void 931 ehci_poll(struct usbd_bus *bus) 932 { 933 ehci_softc_t *sc = (ehci_softc_t *)bus; 934 #ifdef EHCI_DEBUG 935 static int last; 936 int new; 937 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 938 if (new != last) { 939 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 940 last = new; 941 } 942 #endif 943 944 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 945 ehci_intr1(sc); 946 } 947 948 int 949 ehci_detach(struct ehci_softc *sc, int flags) 950 { 951 int rv = 0; 952 953 if (sc->sc_child != NULL) 954 rv = config_detach(sc->sc_child, flags); 955 956 if (rv != 0) 957 return (rv); 958 959 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 960 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 961 962 if (sc->sc_powerhook != NULL) 963 powerhook_disestablish(sc->sc_powerhook); 964 if (sc->sc_shutdownhook != NULL) 965 shutdownhook_disestablish(sc->sc_shutdownhook); 966 967 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 968 969 /* XXX free other data structures XXX */ 970 971 return (rv); 972 } 973 974 975 int 976 ehci_activate(device_ptr_t self, enum devact act) 977 { 978 struct ehci_softc *sc = (struct ehci_softc *)self; 979 int rv = 0; 980 981 switch (act) { 982 case DVACT_ACTIVATE: 983 return (EOPNOTSUPP); 984 985 case DVACT_DEACTIVATE: 986 if (sc->sc_child != NULL) 987 rv = config_deactivate(sc->sc_child); 988 sc->sc_dying = 1; 989 break; 990 } 991 return (rv); 992 } 993 994 /* 995 * Handle suspend/resume. 996 * 997 * We need to switch to polling mode here, because this routine is 998 * called from an interrupt context. This is all right since we 999 * are almost suspended anyway. 1000 */ 1001 void 1002 ehci_power(int why, void *v) 1003 { 1004 ehci_softc_t *sc = v; 1005 u_int32_t cmd, hcr; 1006 int s, i; 1007 1008 #ifdef EHCI_DEBUG 1009 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1010 if (ehcidebug > 0) 1011 ehci_dump_regs(sc); 1012 #endif 1013 1014 s = splhardusb(); 1015 switch (why) { 1016 case PWR_SUSPEND: 1017 case PWR_STANDBY: 1018 sc->sc_bus.use_polling++; 1019 1020 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1021 1022 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1023 EOWRITE4(sc, EHCI_USBCMD, cmd); 1024 1025 for (i = 0; i < 100; i++) { 1026 hcr = EOREAD4(sc, EHCI_USBSTS) & 1027 (EHCI_STS_ASS | EHCI_STS_PSS); 1028 if (hcr == 0) 1029 break; 1030 1031 usb_delay_ms(&sc->sc_bus, 1); 1032 } 1033 if (hcr != 0) { 1034 printf("%s: reset timeout\n", 1035 USBDEVNAME(sc->sc_bus.bdev)); 1036 } 1037 1038 cmd &= ~EHCI_CMD_RS; 1039 EOWRITE4(sc, EHCI_USBCMD, cmd); 1040 1041 for (i = 0; i < 100; i++) { 1042 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1043 if (hcr == EHCI_STS_HCH) 1044 break; 1045 1046 usb_delay_ms(&sc->sc_bus, 1); 1047 } 1048 if (hcr != EHCI_STS_HCH) { 1049 printf("%s: config timeout\n", 1050 USBDEVNAME(sc->sc_bus.bdev)); 1051 } 1052 1053 sc->sc_bus.use_polling--; 1054 break; 1055 1056 case PWR_RESUME: 1057 sc->sc_bus.use_polling++; 1058 1059 /* restore things in case the bios sucks */ 1060 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1061 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1062 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1063 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1064 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1065 1066 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1067 1068 for (i = 0; i < 100; i++) { 1069 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1070 if (hcr != EHCI_STS_HCH) 1071 break; 1072 1073 usb_delay_ms(&sc->sc_bus, 1); 1074 } 1075 if (hcr == EHCI_STS_HCH) { 1076 printf("%s: config timeout\n", 1077 USBDEVNAME(sc->sc_bus.bdev)); 1078 } 1079 1080 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1081 1082 sc->sc_bus.use_polling--; 1083 break; 1084 case PWR_SOFTSUSPEND: 1085 case PWR_SOFTSTANDBY: 1086 case PWR_SOFTRESUME: 1087 break; 1088 } 1089 splx(s); 1090 1091 #ifdef EHCI_DEBUG 1092 DPRINTF(("ehci_power: sc=%p\n", sc)); 1093 if (ehcidebug > 0) 1094 ehci_dump_regs(sc); 1095 #endif 1096 } 1097 1098 /* 1099 * Shut down the controller when the system is going down. 1100 */ 1101 void 1102 ehci_shutdown(void *v) 1103 { 1104 ehci_softc_t *sc = v; 1105 1106 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1107 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1108 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1109 } 1110 1111 usbd_status 1112 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 usbd_status err; 1116 1117 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1118 if (err == USBD_NOMEM) 1119 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1120 #ifdef EHCI_DEBUG 1121 if (err) 1122 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1123 #endif 1124 return (err); 1125 } 1126 1127 void 1128 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1129 { 1130 struct ehci_softc *sc = (struct ehci_softc *)bus; 1131 1132 if (dma->block->flags & USB_DMA_RESERVE) { 1133 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1134 dma); 1135 return; 1136 } 1137 usb_freemem(&sc->sc_bus, dma); 1138 } 1139 1140 usbd_xfer_handle 1141 ehci_allocx(struct usbd_bus *bus) 1142 { 1143 struct ehci_softc *sc = (struct ehci_softc *)bus; 1144 usbd_xfer_handle xfer; 1145 1146 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1147 if (xfer != NULL) { 1148 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1149 #ifdef DIAGNOSTIC 1150 if (xfer->busy_free != XFER_FREE) { 1151 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1152 xfer->busy_free); 1153 } 1154 #endif 1155 } else { 1156 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1157 } 1158 if (xfer != NULL) { 1159 memset(xfer, 0, sizeof(struct ehci_xfer)); 1160 #ifdef DIAGNOSTIC 1161 EXFER(xfer)->isdone = 1; 1162 xfer->busy_free = XFER_BUSY; 1163 #endif 1164 } 1165 return (xfer); 1166 } 1167 1168 void 1169 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1170 { 1171 struct ehci_softc *sc = (struct ehci_softc *)bus; 1172 1173 #ifdef DIAGNOSTIC 1174 if (xfer->busy_free != XFER_BUSY) { 1175 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1176 xfer->busy_free); 1177 return; 1178 } 1179 xfer->busy_free = XFER_FREE; 1180 if (!EXFER(xfer)->isdone) { 1181 printf("ehci_freex: !isdone\n"); 1182 return; 1183 } 1184 #endif 1185 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1186 } 1187 1188 Static void 1189 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1190 { 1191 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1192 1193 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1194 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1195 #ifdef USB_DEBUG 1196 if (ehcidebug) 1197 usbd_dump_pipe(pipe); 1198 #endif 1199 epipe->nexttoggle = 0; 1200 } 1201 1202 Static void 1203 ehci_noop(usbd_pipe_handle pipe __unused) 1204 { 1205 } 1206 1207 #ifdef EHCI_DEBUG 1208 void 1209 ehci_dump_regs(ehci_softc_t *sc) 1210 { 1211 int i; 1212 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1213 EOREAD4(sc, EHCI_USBCMD), 1214 EOREAD4(sc, EHCI_USBSTS), 1215 EOREAD4(sc, EHCI_USBINTR)); 1216 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1217 EOREAD4(sc, EHCI_FRINDEX), 1218 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1219 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1220 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1221 for (i = 1; i <= sc->sc_noport; i++) 1222 printf("port %d status=0x%08x\n", i, 1223 EOREAD4(sc, EHCI_PORTSC(i))); 1224 } 1225 1226 /* 1227 * Unused function - this is meant to be called from a kernel 1228 * debugger. 1229 */ 1230 void 1231 ehci_dump() 1232 { 1233 ehci_dump_regs(theehci); 1234 } 1235 1236 void 1237 ehci_dump_link(ehci_link_t link, int type) 1238 { 1239 link = le32toh(link); 1240 printf("0x%08x", link); 1241 if (link & EHCI_LINK_TERMINATE) 1242 printf("<T>"); 1243 else { 1244 printf("<"); 1245 if (type) { 1246 switch (EHCI_LINK_TYPE(link)) { 1247 case EHCI_LINK_ITD: printf("ITD"); break; 1248 case EHCI_LINK_QH: printf("QH"); break; 1249 case EHCI_LINK_SITD: printf("SITD"); break; 1250 case EHCI_LINK_FSTN: printf("FSTN"); break; 1251 } 1252 } 1253 printf(">"); 1254 } 1255 } 1256 1257 void 1258 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1259 { 1260 int i; 1261 u_int32_t stop; 1262 1263 stop = 0; 1264 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1265 ehci_dump_sqtd(sqtd); 1266 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1267 } 1268 if (sqtd) 1269 printf("dump aborted, too many TDs\n"); 1270 } 1271 1272 void 1273 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1274 { 1275 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1276 ehci_dump_qtd(&sqtd->qtd); 1277 } 1278 1279 void 1280 ehci_dump_qtd(ehci_qtd_t *qtd) 1281 { 1282 u_int32_t s; 1283 char sbuf[128]; 1284 1285 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1286 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1287 printf("\n"); 1288 s = le32toh(qtd->qtd_status); 1289 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1290 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1291 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1292 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1293 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1294 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1295 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1296 EHCI_QTD_GET_PID(s), sbuf); 1297 for (s = 0; s < 5; s++) 1298 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1299 } 1300 1301 void 1302 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1303 { 1304 ehci_qh_t *qh = &sqh->qh; 1305 u_int32_t endp, endphub; 1306 1307 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1308 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1309 endp = le32toh(qh->qh_endp); 1310 printf(" endp=0x%08x\n", endp); 1311 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1312 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1313 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1314 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1315 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1316 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1317 EHCI_QH_GET_NRL(endp)); 1318 endphub = le32toh(qh->qh_endphub); 1319 printf(" endphub=0x%08x\n", endphub); 1320 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1321 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1322 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1323 EHCI_QH_GET_MULT(endphub)); 1324 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1325 printf("Overlay qTD:\n"); 1326 ehci_dump_qtd(&qh->qh_qtd); 1327 } 1328 1329 #ifdef DIAGNOSTIC 1330 Static void 1331 ehci_dump_exfer(struct ehci_xfer *ex) 1332 { 1333 printf("ehci_dump_exfer: ex=%p\n", ex); 1334 } 1335 #endif 1336 #endif 1337 1338 usbd_status 1339 ehci_open(usbd_pipe_handle pipe) 1340 { 1341 usbd_device_handle dev = pipe->device; 1342 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1343 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1344 u_int8_t addr = dev->address; 1345 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1346 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1347 ehci_soft_qh_t *sqh; 1348 usbd_status err; 1349 int s; 1350 int ival, speed, naks; 1351 int hshubaddr, hshubport; 1352 1353 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1354 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1355 1356 if (dev->myhsport) { 1357 hshubaddr = dev->myhsport->parent->address; 1358 hshubport = dev->myhsport->portno; 1359 } else { 1360 hshubaddr = 0; 1361 hshubport = 0; 1362 } 1363 1364 if (sc->sc_dying) 1365 return (USBD_IOERROR); 1366 1367 epipe->nexttoggle = 0; 1368 1369 if (addr == sc->sc_addr) { 1370 switch (ed->bEndpointAddress) { 1371 case USB_CONTROL_ENDPOINT: 1372 pipe->methods = &ehci_root_ctrl_methods; 1373 break; 1374 case UE_DIR_IN | EHCI_INTR_ENDPT: 1375 pipe->methods = &ehci_root_intr_methods; 1376 break; 1377 default: 1378 return (USBD_INVAL); 1379 } 1380 return (USBD_NORMAL_COMPLETION); 1381 } 1382 1383 /* XXX All this stuff is only valid for async. */ 1384 switch (dev->speed) { 1385 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1386 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1387 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1388 default: panic("ehci_open: bad device speed %d", dev->speed); 1389 } 1390 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1391 printf("%s: *** WARNING: opening low/full speed isoc device, " 1392 "this does not work yet.\n", 1393 USBDEVNAME(sc->sc_bus.bdev)); 1394 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1395 hshubaddr, hshubport)); 1396 return USBD_INVAL; 1397 } 1398 1399 naks = 8; /* XXX */ 1400 sqh = ehci_alloc_sqh(sc); 1401 if (sqh == NULL) 1402 goto bad0; 1403 /* qh_link filled when the QH is added */ 1404 sqh->qh.qh_endp = htole32( 1405 EHCI_QH_SET_ADDR(addr) | 1406 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1407 EHCI_QH_SET_EPS(speed) | 1408 EHCI_QH_DTC | 1409 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1410 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1411 EHCI_QH_CTL : 0) | 1412 EHCI_QH_SET_NRL(naks) 1413 ); 1414 sqh->qh.qh_endphub = htole32( 1415 EHCI_QH_SET_MULT(1) | 1416 EHCI_QH_SET_HUBA(hshubaddr) | 1417 EHCI_QH_SET_PORT(hshubport) | 1418 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1419 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1420 ); 1421 sqh->qh.qh_curqtd = EHCI_NULL; 1422 /* Fill the overlay qTD */ 1423 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1424 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1425 sqh->qh.qh_qtd.qtd_status = htole32(0); 1426 1427 epipe->sqh = sqh; 1428 1429 switch (xfertype) { 1430 case UE_CONTROL: 1431 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1432 0, &epipe->u.ctl.reqdma); 1433 #ifdef EHCI_DEBUG 1434 if (err) 1435 printf("ehci_open: usb_allocmem()=%d\n", err); 1436 #endif 1437 if (err) 1438 goto bad1; 1439 pipe->methods = &ehci_device_ctrl_methods; 1440 s = splusb(); 1441 ehci_add_qh(sqh, sc->sc_async_head); 1442 splx(s); 1443 break; 1444 case UE_BULK: 1445 pipe->methods = &ehci_device_bulk_methods; 1446 s = splusb(); 1447 ehci_add_qh(sqh, sc->sc_async_head); 1448 splx(s); 1449 break; 1450 case UE_INTERRUPT: 1451 pipe->methods = &ehci_device_intr_methods; 1452 ival = pipe->interval; 1453 if (ival == USBD_DEFAULT_INTERVAL) 1454 ival = ed->bInterval; 1455 return (ehci_device_setintr(sc, sqh, ival)); 1456 case UE_ISOCHRONOUS: 1457 pipe->methods = &ehci_device_isoc_methods; 1458 return (USBD_INVAL); 1459 default: 1460 return (USBD_INVAL); 1461 } 1462 return (USBD_NORMAL_COMPLETION); 1463 1464 bad1: 1465 ehci_free_sqh(sc, sqh); 1466 bad0: 1467 return (USBD_NOMEM); 1468 } 1469 1470 /* 1471 * Add an ED to the schedule. Called at splusb(). 1472 */ 1473 void 1474 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1475 { 1476 SPLUSBCHECK; 1477 1478 sqh->next = head->next; 1479 sqh->qh.qh_link = head->qh.qh_link; 1480 head->next = sqh; 1481 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1482 1483 #ifdef EHCI_DEBUG 1484 if (ehcidebug > 5) { 1485 printf("ehci_add_qh:\n"); 1486 ehci_dump_sqh(sqh); 1487 } 1488 #endif 1489 } 1490 1491 /* 1492 * Remove an ED from the schedule. Called at splusb(). 1493 */ 1494 void 1495 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1496 { 1497 ehci_soft_qh_t *p; 1498 1499 SPLUSBCHECK; 1500 /* XXX */ 1501 for (p = head; p != NULL && p->next != sqh; p = p->next) 1502 ; 1503 if (p == NULL) 1504 panic("ehci_rem_qh: ED not found"); 1505 p->next = sqh->next; 1506 p->qh.qh_link = sqh->qh.qh_link; 1507 1508 ehci_sync_hc(sc); 1509 } 1510 1511 void 1512 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1513 { 1514 int i; 1515 u_int32_t status; 1516 1517 /* Save toggle bit and ping status. */ 1518 status = sqh->qh.qh_qtd.qtd_status & 1519 htole32(EHCI_QTD_TOGGLE_MASK | 1520 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1521 /* Set HALTED to make hw leave it alone. */ 1522 sqh->qh.qh_qtd.qtd_status = 1523 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1524 sqh->qh.qh_curqtd = 0; 1525 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1526 sqh->qh.qh_qtd.qtd_altnext = 0; 1527 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1528 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1529 sqh->sqtd = sqtd; 1530 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1531 sqh->qh.qh_qtd.qtd_status = status; 1532 } 1533 1534 /* 1535 * Ensure that the HC has released all references to the QH. We do this 1536 * by asking for a Async Advance Doorbell interrupt and then we wait for 1537 * the interrupt. 1538 * To make this easier we first obtain exclusive use of the doorbell. 1539 */ 1540 void 1541 ehci_sync_hc(ehci_softc_t *sc) 1542 { 1543 int s, error; 1544 1545 if (sc->sc_dying) { 1546 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1547 return; 1548 } 1549 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1550 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1551 s = splhardusb(); 1552 /* ask for doorbell */ 1553 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1554 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1555 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1556 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1557 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1558 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1559 splx(s); 1560 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1561 #ifdef DIAGNOSTIC 1562 if (error) 1563 printf("ehci_sync_hc: tsleep() = %d\n", error); 1564 #endif 1565 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1566 } 1567 1568 /***********/ 1569 1570 /* 1571 * Data structures and routines to emulate the root hub. 1572 */ 1573 Static usb_device_descriptor_t ehci_devd = { 1574 USB_DEVICE_DESCRIPTOR_SIZE, 1575 UDESC_DEVICE, /* type */ 1576 {0x00, 0x02}, /* USB version */ 1577 UDCLASS_HUB, /* class */ 1578 UDSUBCLASS_HUB, /* subclass */ 1579 UDPROTO_HSHUBSTT, /* protocol */ 1580 64, /* max packet */ 1581 {0},{0},{0x00,0x01}, /* device id */ 1582 1,2,0, /* string indicies */ 1583 1 /* # of configurations */ 1584 }; 1585 1586 Static usb_device_qualifier_t ehci_odevd = { 1587 USB_DEVICE_DESCRIPTOR_SIZE, 1588 UDESC_DEVICE_QUALIFIER, /* type */ 1589 {0x00, 0x02}, /* USB version */ 1590 UDCLASS_HUB, /* class */ 1591 UDSUBCLASS_HUB, /* subclass */ 1592 UDPROTO_FSHUB, /* protocol */ 1593 64, /* max packet */ 1594 1, /* # of configurations */ 1595 0 1596 }; 1597 1598 Static usb_config_descriptor_t ehci_confd = { 1599 USB_CONFIG_DESCRIPTOR_SIZE, 1600 UDESC_CONFIG, 1601 {USB_CONFIG_DESCRIPTOR_SIZE + 1602 USB_INTERFACE_DESCRIPTOR_SIZE + 1603 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1604 1, 1605 1, 1606 0, 1607 UC_SELF_POWERED, 1608 0 /* max power */ 1609 }; 1610 1611 Static usb_interface_descriptor_t ehci_ifcd = { 1612 USB_INTERFACE_DESCRIPTOR_SIZE, 1613 UDESC_INTERFACE, 1614 0, 1615 0, 1616 1, 1617 UICLASS_HUB, 1618 UISUBCLASS_HUB, 1619 UIPROTO_HSHUBSTT, 1620 0 1621 }; 1622 1623 Static usb_endpoint_descriptor_t ehci_endpd = { 1624 USB_ENDPOINT_DESCRIPTOR_SIZE, 1625 UDESC_ENDPOINT, 1626 UE_DIR_IN | EHCI_INTR_ENDPT, 1627 UE_INTERRUPT, 1628 {8, 0}, /* max packet */ 1629 255 1630 }; 1631 1632 Static usb_hub_descriptor_t ehci_hubd = { 1633 USB_HUB_DESCRIPTOR_SIZE, 1634 UDESC_HUB, 1635 0, 1636 {0,0}, 1637 0, 1638 0, 1639 {""}, 1640 {""}, 1641 }; 1642 1643 Static int 1644 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1645 { 1646 int i; 1647 1648 if (l == 0) 1649 return (0); 1650 p->bLength = 2 * strlen(s) + 2; 1651 if (l == 1) 1652 return (1); 1653 p->bDescriptorType = UDESC_STRING; 1654 l -= 2; 1655 for (i = 0; s[i] && l > 1; i++, l -= 2) 1656 USETW2(p->bString[i], 0, s[i]); 1657 return (2*i+2); 1658 } 1659 1660 /* 1661 * Simulate a hardware hub by handling all the necessary requests. 1662 */ 1663 Static usbd_status 1664 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1665 { 1666 usbd_status err; 1667 1668 /* Insert last in queue. */ 1669 err = usb_insert_transfer(xfer); 1670 if (err) 1671 return (err); 1672 1673 /* Pipe isn't running, start first */ 1674 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1675 } 1676 1677 Static usbd_status 1678 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1679 { 1680 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1681 usb_device_request_t *req; 1682 void *buf = NULL; 1683 int port, i; 1684 int s, len, value, index, l, totlen = 0; 1685 usb_port_status_t ps; 1686 usb_hub_descriptor_t hubd; 1687 usbd_status err; 1688 u_int32_t v; 1689 1690 if (sc->sc_dying) 1691 return (USBD_IOERROR); 1692 1693 #ifdef DIAGNOSTIC 1694 if (!(xfer->rqflags & URQ_REQUEST)) 1695 /* XXX panic */ 1696 return (USBD_INVAL); 1697 #endif 1698 req = &xfer->request; 1699 1700 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1701 req->bmRequestType, req->bRequest)); 1702 1703 len = UGETW(req->wLength); 1704 value = UGETW(req->wValue); 1705 index = UGETW(req->wIndex); 1706 1707 if (len != 0) 1708 buf = KERNADDR(&xfer->dmabuf, 0); 1709 1710 #define C(x,y) ((x) | ((y) << 8)) 1711 switch(C(req->bRequest, req->bmRequestType)) { 1712 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1713 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1714 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1715 /* 1716 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1717 * for the integrated root hub. 1718 */ 1719 break; 1720 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1721 if (len > 0) { 1722 *(u_int8_t *)buf = sc->sc_conf; 1723 totlen = 1; 1724 } 1725 break; 1726 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1727 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1728 if (len == 0) 1729 break; 1730 switch(value >> 8) { 1731 case UDESC_DEVICE: 1732 if ((value & 0xff) != 0) { 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1737 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1738 memcpy(buf, &ehci_devd, l); 1739 break; 1740 /* 1741 * We can't really operate at another speed, but the spec says 1742 * we need this descriptor. 1743 */ 1744 case UDESC_DEVICE_QUALIFIER: 1745 if ((value & 0xff) != 0) { 1746 err = USBD_IOERROR; 1747 goto ret; 1748 } 1749 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1750 memcpy(buf, &ehci_odevd, l); 1751 break; 1752 /* 1753 * We can't really operate at another speed, but the spec says 1754 * we need this descriptor. 1755 */ 1756 case UDESC_OTHER_SPEED_CONFIGURATION: 1757 case UDESC_CONFIG: 1758 if ((value & 0xff) != 0) { 1759 err = USBD_IOERROR; 1760 goto ret; 1761 } 1762 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1763 memcpy(buf, &ehci_confd, l); 1764 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1765 value >> 8; 1766 buf = (char *)buf + l; 1767 len -= l; 1768 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1769 totlen += l; 1770 memcpy(buf, &ehci_ifcd, l); 1771 buf = (char *)buf + l; 1772 len -= l; 1773 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1774 totlen += l; 1775 memcpy(buf, &ehci_endpd, l); 1776 break; 1777 case UDESC_STRING: 1778 *(u_int8_t *)buf = 0; 1779 totlen = 1; 1780 switch (value & 0xff) { 1781 case 0: /* Language table */ 1782 totlen = ehci_str(buf, len, "\001"); 1783 break; 1784 case 1: /* Vendor */ 1785 totlen = ehci_str(buf, len, sc->sc_vendor); 1786 break; 1787 case 2: /* Product */ 1788 totlen = ehci_str(buf, len, "EHCI root hub"); 1789 break; 1790 } 1791 break; 1792 default: 1793 err = USBD_IOERROR; 1794 goto ret; 1795 } 1796 break; 1797 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1798 if (len > 0) { 1799 *(u_int8_t *)buf = 0; 1800 totlen = 1; 1801 } 1802 break; 1803 case C(UR_GET_STATUS, UT_READ_DEVICE): 1804 if (len > 1) { 1805 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1806 totlen = 2; 1807 } 1808 break; 1809 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1810 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1811 if (len > 1) { 1812 USETW(((usb_status_t *)buf)->wStatus, 0); 1813 totlen = 2; 1814 } 1815 break; 1816 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1817 if (value >= USB_MAX_DEVICES) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 sc->sc_addr = value; 1822 break; 1823 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1824 if (value != 0 && value != 1) { 1825 err = USBD_IOERROR; 1826 goto ret; 1827 } 1828 sc->sc_conf = value; 1829 break; 1830 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1831 break; 1832 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1833 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1834 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1835 err = USBD_IOERROR; 1836 goto ret; 1837 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1838 break; 1839 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1840 break; 1841 /* Hub requests */ 1842 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1843 break; 1844 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1845 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1846 "port=%d feature=%d\n", 1847 index, value)); 1848 if (index < 1 || index > sc->sc_noport) { 1849 err = USBD_IOERROR; 1850 goto ret; 1851 } 1852 port = EHCI_PORTSC(index); 1853 v = EOREAD4(sc, port); 1854 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1855 v &= ~EHCI_PS_CLEAR; 1856 switch(value) { 1857 case UHF_PORT_ENABLE: 1858 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1859 break; 1860 case UHF_PORT_SUSPEND: 1861 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1862 break; 1863 case UHF_PORT_POWER: 1864 if (sc->sc_hasppc) 1865 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1866 break; 1867 case UHF_PORT_TEST: 1868 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1869 "%d\n", index)); 1870 break; 1871 case UHF_PORT_INDICATOR: 1872 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1873 "%d\n", index)); 1874 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1875 break; 1876 case UHF_C_PORT_CONNECTION: 1877 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1878 break; 1879 case UHF_C_PORT_ENABLE: 1880 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1881 break; 1882 case UHF_C_PORT_SUSPEND: 1883 /* how? */ 1884 break; 1885 case UHF_C_PORT_OVER_CURRENT: 1886 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1887 break; 1888 case UHF_C_PORT_RESET: 1889 sc->sc_isreset[index] = 0; 1890 break; 1891 default: 1892 err = USBD_IOERROR; 1893 goto ret; 1894 } 1895 #if 0 1896 switch(value) { 1897 case UHF_C_PORT_CONNECTION: 1898 case UHF_C_PORT_ENABLE: 1899 case UHF_C_PORT_SUSPEND: 1900 case UHF_C_PORT_OVER_CURRENT: 1901 case UHF_C_PORT_RESET: 1902 /* Enable RHSC interrupt if condition is cleared. */ 1903 if ((OREAD4(sc, port) >> 16) == 0) 1904 ehci_pcd_able(sc, 1); 1905 break; 1906 default: 1907 break; 1908 } 1909 #endif 1910 break; 1911 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1912 if (len == 0) 1913 break; 1914 if ((value & 0xff) != 0) { 1915 err = USBD_IOERROR; 1916 goto ret; 1917 } 1918 hubd = ehci_hubd; 1919 hubd.bNbrPorts = sc->sc_noport; 1920 v = EOREAD4(sc, EHCI_HCSPARAMS); 1921 USETW(hubd.wHubCharacteristics, 1922 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1923 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1924 ? UHD_PORT_IND : 0); 1925 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1926 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1927 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1928 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1929 l = min(len, hubd.bDescLength); 1930 totlen = l; 1931 memcpy(buf, &hubd, l); 1932 break; 1933 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1934 if (len != 4) { 1935 err = USBD_IOERROR; 1936 goto ret; 1937 } 1938 memset(buf, 0, len); /* ? XXX */ 1939 totlen = len; 1940 break; 1941 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1942 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1943 index)); 1944 if (index < 1 || index > sc->sc_noport) { 1945 err = USBD_IOERROR; 1946 goto ret; 1947 } 1948 if (len != 4) { 1949 err = USBD_IOERROR; 1950 goto ret; 1951 } 1952 v = EOREAD4(sc, EHCI_PORTSC(index)); 1953 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1954 v)); 1955 i = UPS_HIGH_SPEED; 1956 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1957 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1958 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1959 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1960 if (v & EHCI_PS_PR) i |= UPS_RESET; 1961 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1962 USETW(ps.wPortStatus, i); 1963 i = 0; 1964 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1965 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1966 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1967 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1968 USETW(ps.wPortChange, i); 1969 l = min(len, sizeof ps); 1970 memcpy(buf, &ps, l); 1971 totlen = l; 1972 break; 1973 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1974 err = USBD_IOERROR; 1975 goto ret; 1976 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1977 break; 1978 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1979 if (index < 1 || index > sc->sc_noport) { 1980 err = USBD_IOERROR; 1981 goto ret; 1982 } 1983 port = EHCI_PORTSC(index); 1984 v = EOREAD4(sc, port); 1985 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1986 v &= ~EHCI_PS_CLEAR; 1987 switch(value) { 1988 case UHF_PORT_ENABLE: 1989 EOWRITE4(sc, port, v | EHCI_PS_PE); 1990 break; 1991 case UHF_PORT_SUSPEND: 1992 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1993 break; 1994 case UHF_PORT_RESET: 1995 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1996 index)); 1997 if (EHCI_PS_IS_LOWSPEED(v)) { 1998 /* Low speed device, give up ownership. */ 1999 ehci_disown(sc, index, 1); 2000 break; 2001 } 2002 /* Start reset sequence. */ 2003 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2004 EOWRITE4(sc, port, v | EHCI_PS_PR); 2005 /* Wait for reset to complete. */ 2006 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2007 if (sc->sc_dying) { 2008 err = USBD_IOERROR; 2009 goto ret; 2010 } 2011 /* Terminate reset sequence. */ 2012 EOWRITE4(sc, port, v); 2013 /* Wait for HC to complete reset. */ 2014 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2015 if (sc->sc_dying) { 2016 err = USBD_IOERROR; 2017 goto ret; 2018 } 2019 v = EOREAD4(sc, port); 2020 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2021 if (v & EHCI_PS_PR) { 2022 printf("%s: port reset timeout\n", 2023 USBDEVNAME(sc->sc_bus.bdev)); 2024 return (USBD_TIMEOUT); 2025 } 2026 if (!(v & EHCI_PS_PE)) { 2027 /* Not a high speed device, give up ownership.*/ 2028 ehci_disown(sc, index, 0); 2029 break; 2030 } 2031 sc->sc_isreset[index] = 1; 2032 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2033 index, v)); 2034 break; 2035 case UHF_PORT_POWER: 2036 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2037 "%d (has PPC = %d)\n", index, 2038 sc->sc_hasppc)); 2039 if (sc->sc_hasppc) 2040 EOWRITE4(sc, port, v | EHCI_PS_PP); 2041 break; 2042 case UHF_PORT_TEST: 2043 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2044 "%d\n", index)); 2045 break; 2046 case UHF_PORT_INDICATOR: 2047 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2048 "%d\n", index)); 2049 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2050 break; 2051 default: 2052 err = USBD_IOERROR; 2053 goto ret; 2054 } 2055 break; 2056 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2057 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2058 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2059 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2060 break; 2061 default: 2062 err = USBD_IOERROR; 2063 goto ret; 2064 } 2065 xfer->actlen = totlen; 2066 err = USBD_NORMAL_COMPLETION; 2067 ret: 2068 xfer->status = err; 2069 s = splusb(); 2070 usb_transfer_complete(xfer); 2071 splx(s); 2072 return (USBD_IN_PROGRESS); 2073 } 2074 2075 void 2076 ehci_disown(ehci_softc_t *sc, int index, int lowspeed __unused) 2077 { 2078 int port; 2079 u_int32_t v; 2080 2081 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2082 #ifdef DIAGNOSTIC 2083 if (sc->sc_npcomp != 0) { 2084 int i = (index-1) / sc->sc_npcomp; 2085 if (i >= sc->sc_ncomp) 2086 printf("%s: strange port\n", 2087 USBDEVNAME(sc->sc_bus.bdev)); 2088 else 2089 printf("%s: handing over %s speed device on " 2090 "port %d to %s\n", 2091 USBDEVNAME(sc->sc_bus.bdev), 2092 lowspeed ? "low" : "full", 2093 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2094 } else { 2095 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2096 } 2097 #endif 2098 port = EHCI_PORTSC(index); 2099 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2100 EOWRITE4(sc, port, v | EHCI_PS_PO); 2101 } 2102 2103 /* Abort a root control request. */ 2104 Static void 2105 ehci_root_ctrl_abort(usbd_xfer_handle xfer __unused) 2106 { 2107 /* Nothing to do, all transfers are synchronous. */ 2108 } 2109 2110 /* Close the root pipe. */ 2111 Static void 2112 ehci_root_ctrl_close(usbd_pipe_handle pipe __unused) 2113 { 2114 DPRINTF(("ehci_root_ctrl_close\n")); 2115 /* Nothing to do. */ 2116 } 2117 2118 void 2119 ehci_root_intr_done(usbd_xfer_handle xfer) 2120 { 2121 xfer->hcpriv = NULL; 2122 } 2123 2124 Static usbd_status 2125 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2126 { 2127 usbd_status err; 2128 2129 /* Insert last in queue. */ 2130 err = usb_insert_transfer(xfer); 2131 if (err) 2132 return (err); 2133 2134 /* Pipe isn't running, start first */ 2135 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2136 } 2137 2138 Static usbd_status 2139 ehci_root_intr_start(usbd_xfer_handle xfer) 2140 { 2141 usbd_pipe_handle pipe = xfer->pipe; 2142 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2143 2144 if (sc->sc_dying) 2145 return (USBD_IOERROR); 2146 2147 sc->sc_intrxfer = xfer; 2148 2149 return (USBD_IN_PROGRESS); 2150 } 2151 2152 /* Abort a root interrupt request. */ 2153 Static void 2154 ehci_root_intr_abort(usbd_xfer_handle xfer) 2155 { 2156 int s; 2157 2158 if (xfer->pipe->intrxfer == xfer) { 2159 DPRINTF(("ehci_root_intr_abort: remove\n")); 2160 xfer->pipe->intrxfer = NULL; 2161 } 2162 xfer->status = USBD_CANCELLED; 2163 s = splusb(); 2164 usb_transfer_complete(xfer); 2165 splx(s); 2166 } 2167 2168 /* Close the root pipe. */ 2169 Static void 2170 ehci_root_intr_close(usbd_pipe_handle pipe) 2171 { 2172 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2173 2174 DPRINTF(("ehci_root_intr_close\n")); 2175 2176 sc->sc_intrxfer = NULL; 2177 } 2178 2179 void 2180 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2181 { 2182 xfer->hcpriv = NULL; 2183 } 2184 2185 /************************/ 2186 2187 ehci_soft_qh_t * 2188 ehci_alloc_sqh(ehci_softc_t *sc) 2189 { 2190 ehci_soft_qh_t *sqh; 2191 usbd_status err; 2192 int i, offs; 2193 usb_dma_t dma; 2194 2195 if (sc->sc_freeqhs == NULL) { 2196 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2197 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2198 EHCI_PAGE_SIZE, &dma); 2199 #ifdef EHCI_DEBUG 2200 if (err) 2201 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2202 #endif 2203 if (err) 2204 return (NULL); 2205 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2206 offs = i * EHCI_SQH_SIZE; 2207 sqh = KERNADDR(&dma, offs); 2208 sqh->physaddr = DMAADDR(&dma, offs); 2209 sqh->next = sc->sc_freeqhs; 2210 sc->sc_freeqhs = sqh; 2211 } 2212 } 2213 sqh = sc->sc_freeqhs; 2214 sc->sc_freeqhs = sqh->next; 2215 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2216 sqh->next = NULL; 2217 return (sqh); 2218 } 2219 2220 void 2221 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2222 { 2223 sqh->next = sc->sc_freeqhs; 2224 sc->sc_freeqhs = sqh; 2225 } 2226 2227 ehci_soft_qtd_t * 2228 ehci_alloc_sqtd(ehci_softc_t *sc) 2229 { 2230 ehci_soft_qtd_t *sqtd; 2231 usbd_status err; 2232 int i, offs; 2233 usb_dma_t dma; 2234 int s; 2235 2236 if (sc->sc_freeqtds == NULL) { 2237 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2238 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2239 EHCI_PAGE_SIZE, &dma); 2240 #ifdef EHCI_DEBUG 2241 if (err) 2242 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2243 #endif 2244 if (err) 2245 return (NULL); 2246 s = splusb(); 2247 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2248 offs = i * EHCI_SQTD_SIZE; 2249 sqtd = KERNADDR(&dma, offs); 2250 sqtd->physaddr = DMAADDR(&dma, offs); 2251 sqtd->nextqtd = sc->sc_freeqtds; 2252 sc->sc_freeqtds = sqtd; 2253 } 2254 splx(s); 2255 } 2256 2257 s = splusb(); 2258 sqtd = sc->sc_freeqtds; 2259 sc->sc_freeqtds = sqtd->nextqtd; 2260 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2261 sqtd->nextqtd = NULL; 2262 sqtd->xfer = NULL; 2263 splx(s); 2264 2265 return (sqtd); 2266 } 2267 2268 void 2269 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2270 { 2271 int s; 2272 2273 s = splusb(); 2274 sqtd->nextqtd = sc->sc_freeqtds; 2275 sc->sc_freeqtds = sqtd; 2276 splx(s); 2277 } 2278 2279 usbd_status 2280 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2281 int alen, int rd, usbd_xfer_handle xfer, 2282 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2283 { 2284 ehci_soft_qtd_t *next, *cur; 2285 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2286 u_int32_t qtdstatus; 2287 int len, curlen, mps; 2288 int i, tog; 2289 usb_dma_t *dma = &xfer->dmabuf; 2290 u_int16_t flags = xfer->flags; 2291 2292 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2293 2294 len = alen; 2295 dataphys = DMAADDR(dma, 0); 2296 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2297 qtdstatus = EHCI_QTD_ACTIVE | 2298 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2299 EHCI_QTD_SET_CERR(3) 2300 /* IOC set below */ 2301 /* BYTES set below */ 2302 ; 2303 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2304 tog = epipe->nexttoggle; 2305 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2306 2307 cur = ehci_alloc_sqtd(sc); 2308 *sp = cur; 2309 if (cur == NULL) 2310 goto nomem; 2311 for (;;) { 2312 dataphyspage = EHCI_PAGE(dataphys); 2313 /* The EHCI hardware can handle at most 5 pages. */ 2314 if (dataphyslastpage - dataphyspage < 2315 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2316 /* we can handle it in this QTD */ 2317 curlen = len; 2318 } else { 2319 /* must use multiple TDs, fill as much as possible. */ 2320 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2321 EHCI_PAGE_OFFSET(dataphys); 2322 #ifdef DIAGNOSTIC 2323 if (curlen > len) { 2324 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2325 "len=0x%x offs=0x%x\n", curlen, len, 2326 EHCI_PAGE_OFFSET(dataphys)); 2327 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2328 dataphyslastpage, dataphyspage, 2329 dataphys); 2330 curlen = len; 2331 } 2332 #endif 2333 /* the length must be a multiple of the max size */ 2334 curlen -= curlen % mps; 2335 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2336 "curlen=%d\n", curlen)); 2337 #ifdef DIAGNOSTIC 2338 if (curlen == 0) 2339 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2340 #endif 2341 } 2342 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2343 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2344 dataphys, dataphyslastpage, 2345 len, curlen)); 2346 len -= curlen; 2347 2348 /* 2349 * Allocate another transfer if there's more data left, 2350 * or if force last short transfer flag is set and we're 2351 * allocating a multiple of the max packet size. 2352 */ 2353 if (len != 0 || 2354 ((curlen % mps) == 0 && !rd && curlen != 0 && 2355 (flags & USBD_FORCE_SHORT_XFER))) { 2356 next = ehci_alloc_sqtd(sc); 2357 if (next == NULL) 2358 goto nomem; 2359 nextphys = htole32(next->physaddr); 2360 } else { 2361 next = NULL; 2362 nextphys = EHCI_NULL; 2363 } 2364 2365 for (i = 0; i * EHCI_PAGE_SIZE < 2366 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2367 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2368 if (i != 0) /* use offset only in first buffer */ 2369 a = EHCI_PAGE(a); 2370 cur->qtd.qtd_buffer[i] = htole32(a); 2371 cur->qtd.qtd_buffer_hi[i] = 0; 2372 #ifdef DIAGNOSTIC 2373 if (i >= EHCI_QTD_NBUFFERS) { 2374 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2375 goto nomem; 2376 } 2377 #endif 2378 } 2379 cur->nextqtd = next; 2380 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2381 cur->qtd.qtd_status = 2382 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2383 cur->xfer = xfer; 2384 cur->len = curlen; 2385 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2386 dataphys, dataphys + curlen)); 2387 /* adjust the toggle based on the number of packets in this 2388 qtd */ 2389 if (((curlen + mps - 1) / mps) & 1) { 2390 tog ^= 1; 2391 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2392 } 2393 if (next == NULL) 2394 break; 2395 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2396 dataphys += curlen; 2397 cur = next; 2398 } 2399 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2400 *ep = cur; 2401 epipe->nexttoggle = tog; 2402 2403 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2404 *sp, *ep)); 2405 2406 return (USBD_NORMAL_COMPLETION); 2407 2408 nomem: 2409 /* XXX free chain */ 2410 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2411 return (USBD_NOMEM); 2412 } 2413 2414 Static void 2415 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2416 ehci_soft_qtd_t *sqtdend) 2417 { 2418 ehci_soft_qtd_t *p; 2419 int i; 2420 2421 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2422 sqtd, sqtdend)); 2423 2424 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2425 p = sqtd->nextqtd; 2426 ehci_free_sqtd(sc, sqtd); 2427 } 2428 } 2429 2430 /****************/ 2431 2432 /* 2433 * Close a reqular pipe. 2434 * Assumes that there are no pending transactions. 2435 */ 2436 void 2437 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2438 { 2439 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2440 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2441 ehci_soft_qh_t *sqh = epipe->sqh; 2442 int s; 2443 2444 s = splusb(); 2445 ehci_rem_qh(sc, sqh, head); 2446 splx(s); 2447 ehci_free_sqh(sc, epipe->sqh); 2448 } 2449 2450 /* 2451 * Abort a device request. 2452 * If this routine is called at splusb() it guarantees that the request 2453 * will be removed from the hardware scheduling and that the callback 2454 * for it will be called with USBD_CANCELLED status. 2455 * It's impossible to guarantee that the requested transfer will not 2456 * have happened since the hardware runs concurrently. 2457 * If the transaction has already happened we rely on the ordinary 2458 * interrupt processing to process it. 2459 * XXX This is most probably wrong. 2460 */ 2461 void 2462 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2463 { 2464 #define exfer EXFER(xfer) 2465 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2466 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2467 ehci_soft_qh_t *sqh = epipe->sqh; 2468 ehci_soft_qtd_t *sqtd; 2469 ehci_physaddr_t cur; 2470 u_int32_t qhstatus; 2471 int s; 2472 int hit; 2473 int wake; 2474 2475 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2476 2477 if (sc->sc_dying) { 2478 /* If we're dying, just do the software part. */ 2479 s = splusb(); 2480 xfer->status = status; /* make software ignore it */ 2481 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2482 usb_transfer_complete(xfer); 2483 splx(s); 2484 return; 2485 } 2486 2487 if (xfer->device->bus->intr_context || !curproc) 2488 panic("ehci_abort_xfer: not in process context"); 2489 2490 /* 2491 * If an abort is already in progress then just wait for it to 2492 * complete and return. 2493 */ 2494 if (xfer->hcflags & UXFER_ABORTING) { 2495 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2496 #ifdef DIAGNOSTIC 2497 if (status == USBD_TIMEOUT) 2498 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2499 #endif 2500 /* Override the status which might be USBD_TIMEOUT. */ 2501 xfer->status = status; 2502 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2503 xfer->hcflags |= UXFER_ABORTWAIT; 2504 while (xfer->hcflags & UXFER_ABORTING) 2505 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2506 return; 2507 } 2508 xfer->hcflags |= UXFER_ABORTING; 2509 2510 /* 2511 * Step 1: Make interrupt routine and hardware ignore xfer. 2512 */ 2513 s = splusb(); 2514 xfer->status = status; /* make software ignore it */ 2515 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2516 qhstatus = sqh->qh.qh_qtd.qtd_status; 2517 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2518 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2519 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2520 if (sqtd == exfer->sqtdend) 2521 break; 2522 } 2523 splx(s); 2524 2525 /* 2526 * Step 2: Wait until we know hardware has finished any possible 2527 * use of the xfer. Also make sure the soft interrupt routine 2528 * has run. 2529 */ 2530 ehci_sync_hc(sc); 2531 s = splusb(); 2532 #ifdef USB_USE_SOFTINTR 2533 sc->sc_softwake = 1; 2534 #endif /* USB_USE_SOFTINTR */ 2535 usb_schedsoftintr(&sc->sc_bus); 2536 #ifdef USB_USE_SOFTINTR 2537 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2538 #endif /* USB_USE_SOFTINTR */ 2539 splx(s); 2540 2541 /* 2542 * Step 3: Remove any vestiges of the xfer from the hardware. 2543 * The complication here is that the hardware may have executed 2544 * beyond the xfer we're trying to abort. So as we're scanning 2545 * the TDs of this xfer we check if the hardware points to 2546 * any of them. 2547 */ 2548 s = splusb(); /* XXX why? */ 2549 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2550 hit = 0; 2551 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2552 hit |= cur == sqtd->physaddr; 2553 if (sqtd == exfer->sqtdend) 2554 break; 2555 } 2556 sqtd = sqtd->nextqtd; 2557 /* Zap curqtd register if hardware pointed inside the xfer. */ 2558 if (hit && sqtd != NULL) { 2559 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2560 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2561 sqh->qh.qh_qtd.qtd_status = qhstatus; 2562 } else { 2563 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2564 } 2565 2566 /* 2567 * Step 4: Execute callback. 2568 */ 2569 #ifdef DIAGNOSTIC 2570 exfer->isdone = 1; 2571 #endif 2572 wake = xfer->hcflags & UXFER_ABORTWAIT; 2573 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2574 usb_transfer_complete(xfer); 2575 if (wake) 2576 wakeup(&xfer->hcflags); 2577 2578 splx(s); 2579 #undef exfer 2580 } 2581 2582 void 2583 ehci_timeout(void *addr) 2584 { 2585 struct ehci_xfer *exfer = addr; 2586 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2587 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2588 2589 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2590 #ifdef USB_DEBUG 2591 if (ehcidebug > 1) 2592 usbd_dump_pipe(exfer->xfer.pipe); 2593 #endif 2594 2595 if (sc->sc_dying) { 2596 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2597 return; 2598 } 2599 2600 /* Execute the abort in a process context. */ 2601 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2602 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2603 } 2604 2605 void 2606 ehci_timeout_task(void *addr) 2607 { 2608 usbd_xfer_handle xfer = addr; 2609 int s; 2610 2611 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2612 2613 s = splusb(); 2614 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2615 splx(s); 2616 } 2617 2618 /************************/ 2619 2620 Static usbd_status 2621 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2622 { 2623 usbd_status err; 2624 2625 /* Insert last in queue. */ 2626 err = usb_insert_transfer(xfer); 2627 if (err) 2628 return (err); 2629 2630 /* Pipe isn't running, start first */ 2631 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2632 } 2633 2634 Static usbd_status 2635 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2636 { 2637 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2638 usbd_status err; 2639 2640 if (sc->sc_dying) 2641 return (USBD_IOERROR); 2642 2643 #ifdef DIAGNOSTIC 2644 if (!(xfer->rqflags & URQ_REQUEST)) { 2645 /* XXX panic */ 2646 printf("ehci_device_ctrl_transfer: not a request\n"); 2647 return (USBD_INVAL); 2648 } 2649 #endif 2650 2651 err = ehci_device_request(xfer); 2652 if (err) 2653 return (err); 2654 2655 if (sc->sc_bus.use_polling) 2656 ehci_waitintr(sc, xfer); 2657 return (USBD_IN_PROGRESS); 2658 } 2659 2660 void 2661 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2662 { 2663 struct ehci_xfer *ex = EXFER(xfer); 2664 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2665 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2666 2667 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2668 2669 #ifdef DIAGNOSTIC 2670 if (!(xfer->rqflags & URQ_REQUEST)) { 2671 panic("ehci_ctrl_done: not a request"); 2672 } 2673 #endif 2674 2675 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2676 ehci_del_intr_list(ex); /* remove from active list */ 2677 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2678 } 2679 2680 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2681 } 2682 2683 /* Abort a device control request. */ 2684 Static void 2685 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2686 { 2687 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2688 ehci_abort_xfer(xfer, USBD_CANCELLED); 2689 } 2690 2691 /* Close a device control pipe. */ 2692 Static void 2693 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2694 { 2695 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2696 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2697 2698 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2699 ehci_close_pipe(pipe, sc->sc_async_head); 2700 } 2701 2702 usbd_status 2703 ehci_device_request(usbd_xfer_handle xfer) 2704 { 2705 #define exfer EXFER(xfer) 2706 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2707 usb_device_request_t *req = &xfer->request; 2708 usbd_device_handle dev = epipe->pipe.device; 2709 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2710 int addr = dev->address; 2711 ehci_soft_qtd_t *setup, *stat, *next; 2712 ehci_soft_qh_t *sqh; 2713 int isread; 2714 int len; 2715 usbd_status err; 2716 int s; 2717 2718 isread = req->bmRequestType & UT_READ; 2719 len = UGETW(req->wLength); 2720 2721 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2722 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2723 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2724 UGETW(req->wIndex), len, addr, 2725 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2726 2727 setup = ehci_alloc_sqtd(sc); 2728 if (setup == NULL) { 2729 err = USBD_NOMEM; 2730 goto bad1; 2731 } 2732 stat = ehci_alloc_sqtd(sc); 2733 if (stat == NULL) { 2734 err = USBD_NOMEM; 2735 goto bad2; 2736 } 2737 2738 sqh = epipe->sqh; 2739 epipe->u.ctl.length = len; 2740 2741 /* Update device address and length since they may have changed 2742 during the setup of the control pipe in usbd_new_device(). */ 2743 /* XXX This only needs to be done once, but it's too early in open. */ 2744 /* XXXX Should not touch ED here! */ 2745 sqh->qh.qh_endp = 2746 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2747 htole32( 2748 EHCI_QH_SET_ADDR(addr) | 2749 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2750 ); 2751 2752 /* Set up data transaction */ 2753 if (len != 0) { 2754 ehci_soft_qtd_t *end; 2755 2756 /* Start toggle at 1. */ 2757 epipe->nexttoggle = 1; 2758 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2759 &next, &end); 2760 if (err) 2761 goto bad3; 2762 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2763 end->nextqtd = stat; 2764 end->qtd.qtd_next = 2765 end->qtd.qtd_altnext = htole32(stat->physaddr); 2766 } else { 2767 next = stat; 2768 } 2769 2770 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2771 2772 /* Clear toggle */ 2773 setup->qtd.qtd_status = htole32( 2774 EHCI_QTD_ACTIVE | 2775 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2776 EHCI_QTD_SET_CERR(3) | 2777 EHCI_QTD_SET_TOGGLE(0) | 2778 EHCI_QTD_SET_BYTES(sizeof *req) 2779 ); 2780 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2781 setup->qtd.qtd_buffer_hi[0] = 0; 2782 setup->nextqtd = next; 2783 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2784 setup->xfer = xfer; 2785 setup->len = sizeof *req; 2786 2787 stat->qtd.qtd_status = htole32( 2788 EHCI_QTD_ACTIVE | 2789 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2790 EHCI_QTD_SET_CERR(3) | 2791 EHCI_QTD_SET_TOGGLE(1) | 2792 EHCI_QTD_IOC 2793 ); 2794 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2795 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2796 stat->nextqtd = NULL; 2797 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2798 stat->xfer = xfer; 2799 stat->len = 0; 2800 2801 #ifdef EHCI_DEBUG 2802 if (ehcidebug > 5) { 2803 DPRINTF(("ehci_device_request:\n")); 2804 ehci_dump_sqh(sqh); 2805 ehci_dump_sqtds(setup); 2806 } 2807 #endif 2808 2809 exfer->sqtdstart = setup; 2810 exfer->sqtdend = stat; 2811 #ifdef DIAGNOSTIC 2812 if (!exfer->isdone) { 2813 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2814 } 2815 exfer->isdone = 0; 2816 #endif 2817 2818 /* Insert qTD in QH list. */ 2819 s = splusb(); 2820 ehci_set_qh_qtd(sqh, setup); 2821 if (xfer->timeout && !sc->sc_bus.use_polling) { 2822 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2823 ehci_timeout, xfer); 2824 } 2825 ehci_add_intr_list(sc, exfer); 2826 xfer->status = USBD_IN_PROGRESS; 2827 splx(s); 2828 2829 #ifdef EHCI_DEBUG 2830 if (ehcidebug > 10) { 2831 DPRINTF(("ehci_device_request: status=%x\n", 2832 EOREAD4(sc, EHCI_USBSTS))); 2833 delay(10000); 2834 ehci_dump_regs(sc); 2835 ehci_dump_sqh(sc->sc_async_head); 2836 ehci_dump_sqh(sqh); 2837 ehci_dump_sqtds(setup); 2838 } 2839 #endif 2840 2841 return (USBD_NORMAL_COMPLETION); 2842 2843 bad3: 2844 ehci_free_sqtd(sc, stat); 2845 bad2: 2846 ehci_free_sqtd(sc, setup); 2847 bad1: 2848 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2849 xfer->status = err; 2850 usb_transfer_complete(xfer); 2851 return (err); 2852 #undef exfer 2853 } 2854 2855 /* 2856 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2857 * qTD status, or miss signalling occasionally under heavy load. If the host 2858 * machine is too fast, we we can miss transaction completion - when we scan 2859 * the active list the transaction still seems to be active. This generally 2860 * exhibits itself as a umass stall that never recovers. 2861 * 2862 * We work around this behaviour by setting up this callback after any softintr 2863 * that completes with transactions still pending, giving us another chance to 2864 * check for completion after the writeback has taken place. 2865 */ 2866 void 2867 ehci_intrlist_timeout(void *arg) 2868 { 2869 ehci_softc_t *sc = arg; 2870 int s = splusb(); 2871 2872 DPRINTF(("ehci_intrlist_timeout\n")); 2873 usb_schedsoftintr(&sc->sc_bus); 2874 2875 splx(s); 2876 } 2877 2878 /************************/ 2879 2880 Static usbd_status 2881 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2882 { 2883 usbd_status err; 2884 2885 /* Insert last in queue. */ 2886 err = usb_insert_transfer(xfer); 2887 if (err) 2888 return (err); 2889 2890 /* Pipe isn't running, start first */ 2891 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2892 } 2893 2894 usbd_status 2895 ehci_device_bulk_start(usbd_xfer_handle xfer) 2896 { 2897 #define exfer EXFER(xfer) 2898 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2899 usbd_device_handle dev = epipe->pipe.device; 2900 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2901 ehci_soft_qtd_t *data, *dataend; 2902 ehci_soft_qh_t *sqh; 2903 usbd_status err; 2904 int len, isread, endpt; 2905 int s; 2906 2907 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2908 xfer, xfer->length, xfer->flags)); 2909 2910 if (sc->sc_dying) 2911 return (USBD_IOERROR); 2912 2913 #ifdef DIAGNOSTIC 2914 if (xfer->rqflags & URQ_REQUEST) 2915 panic("ehci_device_bulk_start: a request"); 2916 #endif 2917 2918 len = xfer->length; 2919 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2920 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2921 sqh = epipe->sqh; 2922 2923 epipe->u.bulk.length = len; 2924 2925 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2926 &dataend); 2927 if (err) { 2928 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2929 xfer->status = err; 2930 usb_transfer_complete(xfer); 2931 return (err); 2932 } 2933 2934 #ifdef EHCI_DEBUG 2935 if (ehcidebug > 5) { 2936 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2937 ehci_dump_sqh(sqh); 2938 ehci_dump_sqtds(data); 2939 } 2940 #endif 2941 2942 /* Set up interrupt info. */ 2943 exfer->sqtdstart = data; 2944 exfer->sqtdend = dataend; 2945 #ifdef DIAGNOSTIC 2946 if (!exfer->isdone) { 2947 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2948 } 2949 exfer->isdone = 0; 2950 #endif 2951 2952 s = splusb(); 2953 ehci_set_qh_qtd(sqh, data); 2954 if (xfer->timeout && !sc->sc_bus.use_polling) { 2955 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2956 ehci_timeout, xfer); 2957 } 2958 ehci_add_intr_list(sc, exfer); 2959 xfer->status = USBD_IN_PROGRESS; 2960 splx(s); 2961 2962 #ifdef EHCI_DEBUG 2963 if (ehcidebug > 10) { 2964 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2965 delay(10000); 2966 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2967 ehci_dump_regs(sc); 2968 #if 0 2969 printf("async_head:\n"); 2970 ehci_dump_sqh(sc->sc_async_head); 2971 #endif 2972 printf("sqh:\n"); 2973 ehci_dump_sqh(sqh); 2974 ehci_dump_sqtds(data); 2975 } 2976 #endif 2977 2978 if (sc->sc_bus.use_polling) 2979 ehci_waitintr(sc, xfer); 2980 2981 return (USBD_IN_PROGRESS); 2982 #undef exfer 2983 } 2984 2985 Static void 2986 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2987 { 2988 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2989 ehci_abort_xfer(xfer, USBD_CANCELLED); 2990 } 2991 2992 /* 2993 * Close a device bulk pipe. 2994 */ 2995 Static void 2996 ehci_device_bulk_close(usbd_pipe_handle pipe) 2997 { 2998 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2999 3000 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3001 ehci_close_pipe(pipe, sc->sc_async_head); 3002 } 3003 3004 void 3005 ehci_device_bulk_done(usbd_xfer_handle xfer) 3006 { 3007 struct ehci_xfer *ex = EXFER(xfer); 3008 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3009 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3010 3011 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3012 xfer, xfer->actlen)); 3013 3014 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3015 ehci_del_intr_list(ex); /* remove from active list */ 3016 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3017 } 3018 3019 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3020 } 3021 3022 /************************/ 3023 3024 Static usbd_status 3025 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3026 { 3027 struct ehci_soft_islot *isp; 3028 int islot, lev; 3029 3030 /* Find a poll rate that is large enough. */ 3031 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3032 if (EHCI_ILEV_IVAL(lev) <= ival) 3033 break; 3034 3035 /* Pick an interrupt slot at the right level. */ 3036 /* XXX could do better than picking at random */ 3037 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3038 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3039 3040 sqh->islot = islot; 3041 isp = &sc->sc_islots[islot]; 3042 ehci_add_qh(sqh, isp->sqh); 3043 3044 return (USBD_NORMAL_COMPLETION); 3045 } 3046 3047 Static usbd_status 3048 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3049 { 3050 usbd_status err; 3051 3052 /* Insert last in queue. */ 3053 err = usb_insert_transfer(xfer); 3054 if (err) 3055 return (err); 3056 3057 /* 3058 * Pipe isn't running (otherwise err would be USBD_INPROG), 3059 * so start it first. 3060 */ 3061 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3062 } 3063 3064 Static usbd_status 3065 ehci_device_intr_start(usbd_xfer_handle xfer) 3066 { 3067 #define exfer EXFER(xfer) 3068 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3069 usbd_device_handle dev = xfer->pipe->device; 3070 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3071 ehci_soft_qtd_t *data, *dataend; 3072 ehci_soft_qh_t *sqh; 3073 usbd_status err; 3074 int len, isread, endpt; 3075 int s; 3076 3077 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3078 xfer, xfer->length, xfer->flags)); 3079 3080 if (sc->sc_dying) 3081 return (USBD_IOERROR); 3082 3083 #ifdef DIAGNOSTIC 3084 if (xfer->rqflags & URQ_REQUEST) 3085 panic("ehci_device_intr_start: a request"); 3086 #endif 3087 3088 len = xfer->length; 3089 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3090 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3091 sqh = epipe->sqh; 3092 3093 epipe->u.intr.length = len; 3094 3095 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3096 &dataend); 3097 if (err) { 3098 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3099 xfer->status = err; 3100 usb_transfer_complete(xfer); 3101 return (err); 3102 } 3103 3104 #ifdef EHCI_DEBUG 3105 if (ehcidebug > 5) { 3106 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3107 ehci_dump_sqh(sqh); 3108 ehci_dump_sqtds(data); 3109 } 3110 #endif 3111 3112 /* Set up interrupt info. */ 3113 exfer->sqtdstart = data; 3114 exfer->sqtdend = dataend; 3115 #ifdef DIAGNOSTIC 3116 if (!exfer->isdone) { 3117 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3118 } 3119 exfer->isdone = 0; 3120 #endif 3121 3122 s = splusb(); 3123 ehci_set_qh_qtd(sqh, data); 3124 if (xfer->timeout && !sc->sc_bus.use_polling) { 3125 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3126 ehci_timeout, xfer); 3127 } 3128 ehci_add_intr_list(sc, exfer); 3129 xfer->status = USBD_IN_PROGRESS; 3130 splx(s); 3131 3132 #ifdef EHCI_DEBUG 3133 if (ehcidebug > 10) { 3134 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3135 delay(10000); 3136 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3137 ehci_dump_regs(sc); 3138 printf("sqh:\n"); 3139 ehci_dump_sqh(sqh); 3140 ehci_dump_sqtds(data); 3141 } 3142 #endif 3143 3144 if (sc->sc_bus.use_polling) 3145 ehci_waitintr(sc, xfer); 3146 3147 return (USBD_IN_PROGRESS); 3148 #undef exfer 3149 } 3150 3151 Static void 3152 ehci_device_intr_abort(usbd_xfer_handle xfer) 3153 { 3154 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3155 if (xfer->pipe->intrxfer == xfer) { 3156 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3157 xfer->pipe->intrxfer = NULL; 3158 } 3159 ehci_abort_xfer(xfer, USBD_CANCELLED); 3160 } 3161 3162 Static void 3163 ehci_device_intr_close(usbd_pipe_handle pipe) 3164 { 3165 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3166 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3167 struct ehci_soft_islot *isp; 3168 3169 isp = &sc->sc_islots[epipe->sqh->islot]; 3170 ehci_close_pipe(pipe, isp->sqh); 3171 } 3172 3173 Static void 3174 ehci_device_intr_done(usbd_xfer_handle xfer) 3175 { 3176 #define exfer EXFER(xfer) 3177 struct ehci_xfer *ex = EXFER(xfer); 3178 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3179 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3180 ehci_soft_qtd_t *data, *dataend; 3181 ehci_soft_qh_t *sqh; 3182 usbd_status err; 3183 int len, isread, endpt, s; 3184 3185 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3186 xfer, xfer->actlen)); 3187 3188 if (xfer->pipe->repeat) { 3189 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3190 3191 len = epipe->u.intr.length; 3192 xfer->length = len; 3193 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3194 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3195 sqh = epipe->sqh; 3196 3197 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3198 &data, &dataend); 3199 if (err) { 3200 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3201 xfer->status = err; 3202 return; 3203 } 3204 3205 /* Set up interrupt info. */ 3206 exfer->sqtdstart = data; 3207 exfer->sqtdend = dataend; 3208 #ifdef DIAGNOSTIC 3209 if (!exfer->isdone) { 3210 printf("ehci_device_intr_done: not done, ex=%p\n", 3211 exfer); 3212 } 3213 exfer->isdone = 0; 3214 #endif 3215 3216 s = splusb(); 3217 ehci_set_qh_qtd(sqh, data); 3218 if (xfer->timeout && !sc->sc_bus.use_polling) { 3219 usb_callout(xfer->timeout_handle, 3220 mstohz(xfer->timeout), ehci_timeout, xfer); 3221 } 3222 splx(s); 3223 3224 xfer->status = USBD_IN_PROGRESS; 3225 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3226 ehci_del_intr_list(ex); /* remove from active list */ 3227 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3228 } 3229 #undef exfer 3230 } 3231 3232 /************************/ 3233 3234 Static usbd_status 3235 ehci_device_isoc_transfer(usbd_xfer_handle xfer __unused) 3236 { 3237 return USBD_IOERROR; 3238 } 3239 Static usbd_status 3240 ehci_device_isoc_start(usbd_xfer_handle xfer __unused) 3241 { 3242 return USBD_IOERROR; 3243 } 3244 Static void 3245 ehci_device_isoc_abort(usbd_xfer_handle xfer __unused) 3246 { 3247 } 3248 Static void 3249 ehci_device_isoc_close(usbd_pipe_handle pipe __unused) 3250 { 3251 } 3252 Static void 3253 ehci_device_isoc_done(usbd_xfer_handle xfer __unused) 3254 { 3255 } 3256
Indexes created Mon Sep 22 13:09:51 GMT 2025