ehci.c revision 1.116
1 /* $NetBSD: ehci.c,v 1.116 2006/11/22 21:10:36 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.116 2006/11/22 21:10:36 drochner Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 Static void ehci_power(int, void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t vers, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 vers = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 vers >> 8, vers & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 370 371 if (EHCI_HCC_64BIT(cparams)) { 372 /* MUST clear segment register if 64 bit capable. */ 373 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 374 } 375 376 sc->sc_bus.usbrev = USBREV_2_0; 377 378 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 379 USB_MEM_RESERVE); 380 381 /* Reset the controller */ 382 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 383 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 384 usb_delay_ms(&sc->sc_bus, 1); 385 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 386 for (i = 0; i < 100; i++) { 387 usb_delay_ms(&sc->sc_bus, 1); 388 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 389 if (!hcr) 390 break; 391 } 392 if (hcr) { 393 aprint_error("%s: reset timeout\n", 394 USBDEVNAME(sc->sc_bus.bdev)); 395 return (USBD_IOERROR); 396 } 397 398 /* XXX need proper intr scheduling */ 399 sc->sc_rand = 96; 400 401 /* frame list size at default, read back what we got and use that */ 402 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 403 case 0: sc->sc_flsize = 1024; break; 404 case 1: sc->sc_flsize = 512; break; 405 case 2: sc->sc_flsize = 256; break; 406 case 3: return (USBD_IOERROR); 407 } 408 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 409 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 410 if (err) 411 return (err); 412 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 413 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 414 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 415 416 /* Set up the bus struct. */ 417 sc->sc_bus.methods = &ehci_bus_methods; 418 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 419 420 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 421 ehci_power, sc); 422 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 423 424 sc->sc_eintrs = EHCI_NORMAL_INTRS; 425 426 /* 427 * Allocate the interrupt dummy QHs. These are arranged to give poll 428 * intervals that are powers of 2 times 1ms. 429 */ 430 for (i = 0; i < EHCI_INTRQHS; i++) { 431 sqh = ehci_alloc_sqh(sc); 432 if (sqh == NULL) { 433 err = USBD_NOMEM; 434 goto bad1; 435 } 436 sc->sc_islots[i].sqh = sqh; 437 } 438 for (i = 0; i < EHCI_INTRQHS; i++) { 439 sqh = sc->sc_islots[i].sqh; 440 if (i == 0) { 441 /* The last (1ms) QH terminates. */ 442 sqh->qh.qh_link = EHCI_NULL; 443 sqh->next = NULL; 444 } else { 445 /* Otherwise the next QH has half the poll interval */ 446 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 447 sqh->qh.qh_link = htole32(sqh->next->physaddr | 448 EHCI_LINK_QH); 449 } 450 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 451 sqh->qh.qh_curqtd = EHCI_NULL; 452 sqh->next = NULL; 453 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 454 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 455 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 456 sqh->sqtd = NULL; 457 } 458 /* Point the frame list at the last level (128ms). */ 459 for (i = 0; i < sc->sc_flsize; i++) { 460 int j; 461 462 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 463 revbits[i & (EHCI_MAX_POLLRATE-1)]; 464 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 465 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 466 i)].sqh->physaddr); 467 } 468 469 /* Allocate dummy QH that starts the async list. */ 470 sqh = ehci_alloc_sqh(sc); 471 if (sqh == NULL) { 472 err = USBD_NOMEM; 473 goto bad1; 474 } 475 /* Fill the QH */ 476 sqh->qh.qh_endp = 477 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 478 sqh->qh.qh_link = 479 htole32(sqh->physaddr | EHCI_LINK_QH); 480 sqh->qh.qh_curqtd = EHCI_NULL; 481 sqh->next = NULL; 482 /* Fill the overlay qTD */ 483 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 484 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 485 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 486 sqh->sqtd = NULL; 487 #ifdef EHCI_DEBUG 488 if (ehcidebug) { 489 ehci_dump_sqh(sqh); 490 } 491 #endif 492 493 /* Point to async list */ 494 sc->sc_async_head = sqh; 495 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 496 497 usb_callout_init(sc->sc_tmo_pcd); 498 usb_callout_init(sc->sc_tmo_intrlist); 499 500 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 501 502 /* Turn on controller */ 503 EOWRITE4(sc, EHCI_USBCMD, 504 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 505 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 506 EHCI_CMD_ASE | 507 EHCI_CMD_PSE | 508 EHCI_CMD_RS); 509 510 /* Take over port ownership */ 511 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 512 513 for (i = 0; i < 100; i++) { 514 usb_delay_ms(&sc->sc_bus, 1); 515 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 516 if (!hcr) 517 break; 518 } 519 if (hcr) { 520 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 521 return (USBD_IOERROR); 522 } 523 524 /* Enable interrupts */ 525 DPRINTFN(1,("ehci_init: enabling\n")); 526 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 /* Schedule a callout to catch any dropped transactions. */ 704 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 705 !LIST_EMPTY(&sc->sc_intrhead)) 706 usb_callout(sc->sc_tmo_intrlist, hz, 707 ehci_intrlist_timeout, sc); 708 709 #ifdef USB_USE_SOFTINTR 710 if (sc->sc_softwake) { 711 sc->sc_softwake = 0; 712 wakeup(&sc->sc_softwake); 713 } 714 #endif /* USB_USE_SOFTINTR */ 715 716 sc->sc_bus.intr_context--; 717 } 718 719 /* Check for an interrupt. */ 720 void 721 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 722 { 723 ehci_soft_qtd_t *sqtd, *lsqtd; 724 u_int32_t status; 725 726 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 727 728 if (ex->sqtdstart == NULL) { 729 printf("ehci_check_intr: sqtdstart=NULL\n"); 730 return; 731 } 732 lsqtd = ex->sqtdend; 733 #ifdef DIAGNOSTIC 734 if (lsqtd == NULL) { 735 printf("ehci_check_intr: lsqtd==0\n"); 736 return; 737 } 738 #endif 739 /* 740 * If the last TD is still active we need to check whether there 741 * is a an error somewhere in the middle, or whether there was a 742 * short packet (SPD and not ACTIVE). 743 */ 744 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 745 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 746 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 747 status = le32toh(sqtd->qtd.qtd_status); 748 /* If there's an active QTD the xfer isn't done. */ 749 if (status & EHCI_QTD_ACTIVE) 750 break; 751 /* Any kind of error makes the xfer done. */ 752 if (status & EHCI_QTD_HALTED) 753 goto done; 754 /* We want short packets, and it is short: it's done */ 755 if (EHCI_QTD_GET_BYTES(status) != 0) 756 goto done; 757 } 758 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 759 ex, ex->sqtdstart)); 760 return; 761 } 762 done: 763 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 764 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 765 ehci_idone(ex); 766 } 767 768 void 769 ehci_idone(struct ehci_xfer *ex) 770 { 771 usbd_xfer_handle xfer = &ex->xfer; 772 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 773 ehci_soft_qtd_t *sqtd, *lsqtd; 774 u_int32_t status = 0, nstatus = 0; 775 int actlen; 776 uint pkts_left; 777 778 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 779 #ifdef DIAGNOSTIC 780 { 781 int s = splhigh(); 782 if (ex->isdone) { 783 splx(s); 784 #ifdef EHCI_DEBUG 785 printf("ehci_idone: ex is done!\n "); 786 ehci_dump_exfer(ex); 787 #else 788 printf("ehci_idone: ex=%p is done!\n", ex); 789 #endif 790 return; 791 } 792 ex->isdone = 1; 793 splx(s); 794 } 795 #endif 796 797 if (xfer->status == USBD_CANCELLED || 798 xfer->status == USBD_TIMEOUT) { 799 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 800 return; 801 } 802 803 #ifdef EHCI_DEBUG 804 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 805 if (ehcidebug > 10) 806 ehci_dump_sqtds(ex->sqtdstart); 807 #endif 808 809 /* The transfer is done, compute actual length and status. */ 810 lsqtd = ex->sqtdend; 811 actlen = 0; 812 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 813 nstatus = le32toh(sqtd->qtd.qtd_status); 814 if (nstatus & EHCI_QTD_ACTIVE) 815 break; 816 817 status = nstatus; 818 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 819 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 820 } 821 822 /* 823 * If there are left over TDs we need to update the toggle. 824 * The default pipe doesn't need it since control transfers 825 * start the toggle at 0 every time. 826 */ 827 if (sqtd != lsqtd->nextqtd && 828 xfer->pipe->device->default_pipe != xfer->pipe) { 829 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 830 #if 0 831 ehci_dump_sqh(epipe->sqh); 832 ehci_dump_sqtds(ex->sqtdstart); 833 #endif 834 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 835 } 836 837 /* 838 * For a short transfer we need to update the toggle for the missing 839 * packets within the qTD. 840 */ 841 pkts_left = EHCI_QTD_GET_BYTES(status) / 842 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 843 epipe->nexttoggle ^= pkts_left % 2; 844 845 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 846 xfer->length, actlen, status)); 847 xfer->actlen = actlen; 848 if (status & EHCI_QTD_HALTED) { 849 #ifdef EHCI_DEBUG 850 char sbuf[128]; 851 852 bitmask_snprintf((u_int32_t)status, 853 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 854 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 855 856 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 857 "status 0x%s\n", 858 xfer->pipe->device->address, 859 xfer->pipe->endpoint->edesc->bEndpointAddress, 860 sbuf)); 861 if (ehcidebug > 2) { 862 ehci_dump_sqh(epipe->sqh); 863 ehci_dump_sqtds(ex->sqtdstart); 864 } 865 #endif 866 /* low&full speed has an extra error flag */ 867 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 868 EHCI_QH_SPEED_HIGH) 869 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 870 else 871 status &= EHCI_QTD_STATERRS; 872 if (status == 0) /* no other errors means a stall */ 873 xfer->status = USBD_STALLED; 874 else 875 xfer->status = USBD_IOERROR; /* more info XXX */ 876 /* XXX need to reset TT on missed microframe */ 877 if (status & EHCI_QTD_MISSEDMICRO) { 878 ehci_softc_t *sc = (ehci_softc_t *) 879 xfer->pipe->device->bus; 880 881 printf("%s: missed microframe, TT reset not " 882 "implemented, hub might be inoperational\n", 883 USBDEVNAME(sc->sc_bus.bdev)); 884 } 885 } else { 886 xfer->status = USBD_NORMAL_COMPLETION; 887 } 888 889 usb_transfer_complete(xfer); 890 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 891 } 892 893 /* 894 * Wait here until controller claims to have an interrupt. 895 * Then call ehci_intr and return. Use timeout to avoid waiting 896 * too long. 897 */ 898 void 899 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 900 { 901 int timo; 902 u_int32_t intrs; 903 904 xfer->status = USBD_IN_PROGRESS; 905 for (timo = xfer->timeout; timo >= 0; timo--) { 906 usb_delay_ms(&sc->sc_bus, 1); 907 if (sc->sc_dying) 908 break; 909 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 910 sc->sc_eintrs; 911 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 912 #ifdef EHCI_DEBUG 913 if (ehcidebug > 15) 914 ehci_dump_regs(sc); 915 #endif 916 if (intrs) { 917 ehci_intr1(sc); 918 if (xfer->status != USBD_IN_PROGRESS) 919 return; 920 } 921 } 922 923 /* Timeout */ 924 DPRINTF(("ehci_waitintr: timeout\n")); 925 xfer->status = USBD_TIMEOUT; 926 usb_transfer_complete(xfer); 927 /* XXX should free TD */ 928 } 929 930 void 931 ehci_poll(struct usbd_bus *bus) 932 { 933 ehci_softc_t *sc = (ehci_softc_t *)bus; 934 #ifdef EHCI_DEBUG 935 static int last; 936 int new; 937 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 938 if (new != last) { 939 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 940 last = new; 941 } 942 #endif 943 944 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 945 ehci_intr1(sc); 946 } 947 948 int 949 ehci_detach(struct ehci_softc *sc, int flags) 950 { 951 int rv = 0; 952 953 if (sc->sc_child != NULL) 954 rv = config_detach(sc->sc_child, flags); 955 956 if (rv != 0) 957 return (rv); 958 959 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 960 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 961 962 if (sc->sc_powerhook != NULL) 963 powerhook_disestablish(sc->sc_powerhook); 964 if (sc->sc_shutdownhook != NULL) 965 shutdownhook_disestablish(sc->sc_shutdownhook); 966 967 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 968 969 /* XXX free other data structures XXX */ 970 971 return (rv); 972 } 973 974 975 int 976 ehci_activate(device_ptr_t self, enum devact act) 977 { 978 struct ehci_softc *sc = (struct ehci_softc *)self; 979 int rv = 0; 980 981 switch (act) { 982 case DVACT_ACTIVATE: 983 return (EOPNOTSUPP); 984 985 case DVACT_DEACTIVATE: 986 if (sc->sc_child != NULL) 987 rv = config_deactivate(sc->sc_child); 988 sc->sc_dying = 1; 989 break; 990 } 991 return (rv); 992 } 993 994 /* 995 * Handle suspend/resume. 996 * 997 * We need to switch to polling mode here, because this routine is 998 * called from an interrupt context. This is all right since we 999 * are almost suspended anyway. 1000 */ 1001 void 1002 ehci_power(int why, void *v) 1003 { 1004 ehci_softc_t *sc = v; 1005 u_int32_t cmd, hcr; 1006 int s, i; 1007 1008 #ifdef EHCI_DEBUG 1009 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1010 if (ehcidebug > 0) 1011 ehci_dump_regs(sc); 1012 #endif 1013 1014 s = splhardusb(); 1015 switch (why) { 1016 case PWR_SUSPEND: 1017 case PWR_STANDBY: 1018 sc->sc_bus.use_polling++; 1019 1020 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1021 1022 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1023 EOWRITE4(sc, EHCI_USBCMD, cmd); 1024 1025 for (i = 0; i < 100; i++) { 1026 hcr = EOREAD4(sc, EHCI_USBSTS) & 1027 (EHCI_STS_ASS | EHCI_STS_PSS); 1028 if (hcr == 0) 1029 break; 1030 1031 usb_delay_ms(&sc->sc_bus, 1); 1032 } 1033 if (hcr != 0) { 1034 printf("%s: reset timeout\n", 1035 USBDEVNAME(sc->sc_bus.bdev)); 1036 } 1037 1038 cmd &= ~EHCI_CMD_RS; 1039 EOWRITE4(sc, EHCI_USBCMD, cmd); 1040 1041 for (i = 0; i < 100; i++) { 1042 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1043 if (hcr == EHCI_STS_HCH) 1044 break; 1045 1046 usb_delay_ms(&sc->sc_bus, 1); 1047 } 1048 if (hcr != EHCI_STS_HCH) { 1049 printf("%s: config timeout\n", 1050 USBDEVNAME(sc->sc_bus.bdev)); 1051 } 1052 1053 sc->sc_bus.use_polling--; 1054 break; 1055 1056 case PWR_RESUME: 1057 sc->sc_bus.use_polling++; 1058 1059 /* restore things in case the bios sucks */ 1060 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1061 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1062 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1063 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1064 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1065 1066 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1067 1068 for (i = 0; i < 100; i++) { 1069 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1070 if (hcr != EHCI_STS_HCH) 1071 break; 1072 1073 usb_delay_ms(&sc->sc_bus, 1); 1074 } 1075 if (hcr == EHCI_STS_HCH) { 1076 printf("%s: config timeout\n", 1077 USBDEVNAME(sc->sc_bus.bdev)); 1078 } 1079 1080 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1081 1082 sc->sc_bus.use_polling--; 1083 break; 1084 case PWR_SOFTSUSPEND: 1085 case PWR_SOFTSTANDBY: 1086 case PWR_SOFTRESUME: 1087 break; 1088 } 1089 splx(s); 1090 1091 #ifdef EHCI_DEBUG 1092 DPRINTF(("ehci_power: sc=%p\n", sc)); 1093 if (ehcidebug > 0) 1094 ehci_dump_regs(sc); 1095 #endif 1096 } 1097 1098 /* 1099 * Shut down the controller when the system is going down. 1100 */ 1101 void 1102 ehci_shutdown(void *v) 1103 { 1104 ehci_softc_t *sc = v; 1105 1106 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1107 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1108 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1109 } 1110 1111 usbd_status 1112 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 usbd_status err; 1116 1117 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1118 if (err == USBD_NOMEM) 1119 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1120 #ifdef EHCI_DEBUG 1121 if (err) 1122 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1123 #endif 1124 return (err); 1125 } 1126 1127 void 1128 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1129 { 1130 struct ehci_softc *sc = (struct ehci_softc *)bus; 1131 1132 if (dma->block->flags & USB_DMA_RESERVE) { 1133 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1134 dma); 1135 return; 1136 } 1137 usb_freemem(&sc->sc_bus, dma); 1138 } 1139 1140 usbd_xfer_handle 1141 ehci_allocx(struct usbd_bus *bus) 1142 { 1143 struct ehci_softc *sc = (struct ehci_softc *)bus; 1144 usbd_xfer_handle xfer; 1145 1146 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1147 if (xfer != NULL) { 1148 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1149 #ifdef DIAGNOSTIC 1150 if (xfer->busy_free != XFER_FREE) { 1151 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1152 xfer->busy_free); 1153 } 1154 #endif 1155 } else { 1156 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1157 } 1158 if (xfer != NULL) { 1159 memset(xfer, 0, sizeof(struct ehci_xfer)); 1160 #ifdef DIAGNOSTIC 1161 EXFER(xfer)->isdone = 1; 1162 xfer->busy_free = XFER_BUSY; 1163 #endif 1164 } 1165 return (xfer); 1166 } 1167 1168 void 1169 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1170 { 1171 struct ehci_softc *sc = (struct ehci_softc *)bus; 1172 1173 #ifdef DIAGNOSTIC 1174 if (xfer->busy_free != XFER_BUSY) { 1175 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1176 xfer->busy_free); 1177 return; 1178 } 1179 xfer->busy_free = XFER_FREE; 1180 if (!EXFER(xfer)->isdone) { 1181 printf("ehci_freex: !isdone\n"); 1182 return; 1183 } 1184 #endif 1185 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1186 } 1187 1188 Static void 1189 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1190 { 1191 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1192 1193 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1194 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1195 #ifdef USB_DEBUG 1196 if (ehcidebug) 1197 usbd_dump_pipe(pipe); 1198 #endif 1199 epipe->nexttoggle = 0; 1200 } 1201 1202 Static void 1203 ehci_noop(usbd_pipe_handle pipe) 1204 { 1205 } 1206 1207 #ifdef EHCI_DEBUG 1208 void 1209 ehci_dump_regs(ehci_softc_t *sc) 1210 { 1211 int i; 1212 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1213 EOREAD4(sc, EHCI_USBCMD), 1214 EOREAD4(sc, EHCI_USBSTS), 1215 EOREAD4(sc, EHCI_USBINTR)); 1216 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1217 EOREAD4(sc, EHCI_FRINDEX), 1218 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1219 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1220 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1221 for (i = 1; i <= sc->sc_noport; i++) 1222 printf("port %d status=0x%08x\n", i, 1223 EOREAD4(sc, EHCI_PORTSC(i))); 1224 } 1225 1226 /* 1227 * Unused function - this is meant to be called from a kernel 1228 * debugger. 1229 */ 1230 void 1231 ehci_dump() 1232 { 1233 ehci_dump_regs(theehci); 1234 } 1235 1236 void 1237 ehci_dump_link(ehci_link_t link, int type) 1238 { 1239 link = le32toh(link); 1240 printf("0x%08x", link); 1241 if (link & EHCI_LINK_TERMINATE) 1242 printf("<T>"); 1243 else { 1244 printf("<"); 1245 if (type) { 1246 switch (EHCI_LINK_TYPE(link)) { 1247 case EHCI_LINK_ITD: printf("ITD"); break; 1248 case EHCI_LINK_QH: printf("QH"); break; 1249 case EHCI_LINK_SITD: printf("SITD"); break; 1250 case EHCI_LINK_FSTN: printf("FSTN"); break; 1251 } 1252 } 1253 printf(">"); 1254 } 1255 } 1256 1257 void 1258 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1259 { 1260 int i; 1261 u_int32_t stop; 1262 1263 stop = 0; 1264 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1265 ehci_dump_sqtd(sqtd); 1266 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1267 } 1268 if (sqtd) 1269 printf("dump aborted, too many TDs\n"); 1270 } 1271 1272 void 1273 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1274 { 1275 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1276 ehci_dump_qtd(&sqtd->qtd); 1277 } 1278 1279 void 1280 ehci_dump_qtd(ehci_qtd_t *qtd) 1281 { 1282 u_int32_t s; 1283 char sbuf[128]; 1284 1285 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1286 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1287 printf("\n"); 1288 s = le32toh(qtd->qtd_status); 1289 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1290 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1291 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1292 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1293 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1294 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1295 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1296 EHCI_QTD_GET_PID(s), sbuf); 1297 for (s = 0; s < 5; s++) 1298 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1299 } 1300 1301 void 1302 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1303 { 1304 ehci_qh_t *qh = &sqh->qh; 1305 u_int32_t endp, endphub; 1306 1307 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1308 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1309 endp = le32toh(qh->qh_endp); 1310 printf(" endp=0x%08x\n", endp); 1311 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1312 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1313 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1314 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1315 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1316 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1317 EHCI_QH_GET_NRL(endp)); 1318 endphub = le32toh(qh->qh_endphub); 1319 printf(" endphub=0x%08x\n", endphub); 1320 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1321 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1322 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1323 EHCI_QH_GET_MULT(endphub)); 1324 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1325 printf("Overlay qTD:\n"); 1326 ehci_dump_qtd(&qh->qh_qtd); 1327 } 1328 1329 #ifdef DIAGNOSTIC 1330 Static void 1331 ehci_dump_exfer(struct ehci_xfer *ex) 1332 { 1333 printf("ehci_dump_exfer: ex=%p\n", ex); 1334 } 1335 #endif 1336 #endif 1337 1338 usbd_status 1339 ehci_open(usbd_pipe_handle pipe) 1340 { 1341 usbd_device_handle dev = pipe->device; 1342 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1343 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1344 u_int8_t addr = dev->address; 1345 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1346 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1347 ehci_soft_qh_t *sqh; 1348 usbd_status err; 1349 int s; 1350 int ival, speed, naks; 1351 int hshubaddr, hshubport; 1352 1353 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1354 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1355 1356 if (dev->myhsport) { 1357 hshubaddr = dev->myhsport->parent->address; 1358 hshubport = dev->myhsport->portno; 1359 } else { 1360 hshubaddr = 0; 1361 hshubport = 0; 1362 } 1363 1364 if (sc->sc_dying) 1365 return (USBD_IOERROR); 1366 1367 epipe->nexttoggle = 0; 1368 1369 if (addr == sc->sc_addr) { 1370 switch (ed->bEndpointAddress) { 1371 case USB_CONTROL_ENDPOINT: 1372 pipe->methods = &ehci_root_ctrl_methods; 1373 break; 1374 case UE_DIR_IN | EHCI_INTR_ENDPT: 1375 pipe->methods = &ehci_root_intr_methods; 1376 break; 1377 default: 1378 return (USBD_INVAL); 1379 } 1380 return (USBD_NORMAL_COMPLETION); 1381 } 1382 1383 /* XXX All this stuff is only valid for async. */ 1384 switch (dev->speed) { 1385 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1386 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1387 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1388 default: panic("ehci_open: bad device speed %d", dev->speed); 1389 } 1390 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1391 printf("%s: *** WARNING: opening low/full speed isoc device, " 1392 "this does not work yet.\n", 1393 USBDEVNAME(sc->sc_bus.bdev)); 1394 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1395 hshubaddr, hshubport)); 1396 return USBD_INVAL; 1397 } 1398 1399 naks = 8; /* XXX */ 1400 sqh = ehci_alloc_sqh(sc); 1401 if (sqh == NULL) 1402 return (USBD_NOMEM); 1403 /* qh_link filled when the QH is added */ 1404 sqh->qh.qh_endp = htole32( 1405 EHCI_QH_SET_ADDR(addr) | 1406 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1407 EHCI_QH_SET_EPS(speed) | 1408 EHCI_QH_DTC | 1409 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1410 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1411 EHCI_QH_CTL : 0) | 1412 EHCI_QH_SET_NRL(naks) 1413 ); 1414 sqh->qh.qh_endphub = htole32( 1415 EHCI_QH_SET_MULT(1) | 1416 EHCI_QH_SET_HUBA(hshubaddr) | 1417 EHCI_QH_SET_PORT(hshubport) | 1418 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1419 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1420 ); 1421 sqh->qh.qh_curqtd = EHCI_NULL; 1422 /* Fill the overlay qTD */ 1423 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1424 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1425 sqh->qh.qh_qtd.qtd_status = htole32(0); 1426 1427 epipe->sqh = sqh; 1428 1429 switch (xfertype) { 1430 case UE_CONTROL: 1431 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1432 0, &epipe->u.ctl.reqdma); 1433 #ifdef EHCI_DEBUG 1434 if (err) 1435 printf("ehci_open: usb_allocmem()=%d\n", err); 1436 #endif 1437 if (err) 1438 goto bad; 1439 pipe->methods = &ehci_device_ctrl_methods; 1440 s = splusb(); 1441 ehci_add_qh(sqh, sc->sc_async_head); 1442 splx(s); 1443 break; 1444 case UE_BULK: 1445 pipe->methods = &ehci_device_bulk_methods; 1446 s = splusb(); 1447 ehci_add_qh(sqh, sc->sc_async_head); 1448 splx(s); 1449 break; 1450 case UE_INTERRUPT: 1451 pipe->methods = &ehci_device_intr_methods; 1452 ival = pipe->interval; 1453 if (ival == USBD_DEFAULT_INTERVAL) { 1454 if (speed == EHCI_QH_SPEED_HIGH) { 1455 if (ed->bInterval > 16) { 1456 /* 1457 * illegal with high-speed, but there 1458 * were documentation bugs in the spec, 1459 * so be generous 1460 */ 1461 ival = 256; 1462 } else 1463 ival = (1 << (ed->bInterval - 1)) / 8; 1464 } else 1465 ival = ed->bInterval; 1466 } 1467 err = ehci_device_setintr(sc, sqh, ival); 1468 if (err) 1469 goto bad; 1470 break; 1471 case UE_ISOCHRONOUS: 1472 pipe->methods = &ehci_device_isoc_methods; 1473 /* FALLTHROUGH */ 1474 default: 1475 err = USBD_INVAL; 1476 goto bad; 1477 } 1478 return (USBD_NORMAL_COMPLETION); 1479 1480 bad: 1481 ehci_free_sqh(sc, sqh); 1482 return (err); 1483 } 1484 1485 /* 1486 * Add an ED to the schedule. Called at splusb(). 1487 */ 1488 void 1489 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1490 { 1491 SPLUSBCHECK; 1492 1493 sqh->next = head->next; 1494 sqh->qh.qh_link = head->qh.qh_link; 1495 head->next = sqh; 1496 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1497 1498 #ifdef EHCI_DEBUG 1499 if (ehcidebug > 5) { 1500 printf("ehci_add_qh:\n"); 1501 ehci_dump_sqh(sqh); 1502 } 1503 #endif 1504 } 1505 1506 /* 1507 * Remove an ED from the schedule. Called at splusb(). 1508 */ 1509 void 1510 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1511 { 1512 ehci_soft_qh_t *p; 1513 1514 SPLUSBCHECK; 1515 /* XXX */ 1516 for (p = head; p != NULL && p->next != sqh; p = p->next) 1517 ; 1518 if (p == NULL) 1519 panic("ehci_rem_qh: ED not found"); 1520 p->next = sqh->next; 1521 p->qh.qh_link = sqh->qh.qh_link; 1522 1523 ehci_sync_hc(sc); 1524 } 1525 1526 void 1527 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1528 { 1529 int i; 1530 u_int32_t status; 1531 1532 /* Save toggle bit and ping status. */ 1533 status = sqh->qh.qh_qtd.qtd_status & 1534 htole32(EHCI_QTD_TOGGLE_MASK | 1535 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1536 /* Set HALTED to make hw leave it alone. */ 1537 sqh->qh.qh_qtd.qtd_status = 1538 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1539 sqh->qh.qh_curqtd = 0; 1540 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1541 sqh->qh.qh_qtd.qtd_altnext = 0; 1542 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1543 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1544 sqh->sqtd = sqtd; 1545 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1546 sqh->qh.qh_qtd.qtd_status = status; 1547 } 1548 1549 /* 1550 * Ensure that the HC has released all references to the QH. We do this 1551 * by asking for a Async Advance Doorbell interrupt and then we wait for 1552 * the interrupt. 1553 * To make this easier we first obtain exclusive use of the doorbell. 1554 */ 1555 void 1556 ehci_sync_hc(ehci_softc_t *sc) 1557 { 1558 int s, error; 1559 1560 if (sc->sc_dying) { 1561 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1562 return; 1563 } 1564 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1565 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1566 s = splhardusb(); 1567 /* ask for doorbell */ 1568 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1569 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1570 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1571 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1572 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1573 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1574 splx(s); 1575 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1576 #ifdef DIAGNOSTIC 1577 if (error) 1578 printf("ehci_sync_hc: tsleep() = %d\n", error); 1579 #endif 1580 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1581 } 1582 1583 /***********/ 1584 1585 /* 1586 * Data structures and routines to emulate the root hub. 1587 */ 1588 Static usb_device_descriptor_t ehci_devd = { 1589 USB_DEVICE_DESCRIPTOR_SIZE, 1590 UDESC_DEVICE, /* type */ 1591 {0x00, 0x02}, /* USB version */ 1592 UDCLASS_HUB, /* class */ 1593 UDSUBCLASS_HUB, /* subclass */ 1594 UDPROTO_HSHUBSTT, /* protocol */ 1595 64, /* max packet */ 1596 {0},{0},{0x00,0x01}, /* device id */ 1597 1,2,0, /* string indicies */ 1598 1 /* # of configurations */ 1599 }; 1600 1601 Static usb_device_qualifier_t ehci_odevd = { 1602 USB_DEVICE_DESCRIPTOR_SIZE, 1603 UDESC_DEVICE_QUALIFIER, /* type */ 1604 {0x00, 0x02}, /* USB version */ 1605 UDCLASS_HUB, /* class */ 1606 UDSUBCLASS_HUB, /* subclass */ 1607 UDPROTO_FSHUB, /* protocol */ 1608 64, /* max packet */ 1609 1, /* # of configurations */ 1610 0 1611 }; 1612 1613 Static usb_config_descriptor_t ehci_confd = { 1614 USB_CONFIG_DESCRIPTOR_SIZE, 1615 UDESC_CONFIG, 1616 {USB_CONFIG_DESCRIPTOR_SIZE + 1617 USB_INTERFACE_DESCRIPTOR_SIZE + 1618 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1619 1, 1620 1, 1621 0, 1622 UC_SELF_POWERED, 1623 0 /* max power */ 1624 }; 1625 1626 Static usb_interface_descriptor_t ehci_ifcd = { 1627 USB_INTERFACE_DESCRIPTOR_SIZE, 1628 UDESC_INTERFACE, 1629 0, 1630 0, 1631 1, 1632 UICLASS_HUB, 1633 UISUBCLASS_HUB, 1634 UIPROTO_HSHUBSTT, 1635 0 1636 }; 1637 1638 Static usb_endpoint_descriptor_t ehci_endpd = { 1639 USB_ENDPOINT_DESCRIPTOR_SIZE, 1640 UDESC_ENDPOINT, 1641 UE_DIR_IN | EHCI_INTR_ENDPT, 1642 UE_INTERRUPT, 1643 {8, 0}, /* max packet */ 1644 255 1645 }; 1646 1647 Static usb_hub_descriptor_t ehci_hubd = { 1648 USB_HUB_DESCRIPTOR_SIZE, 1649 UDESC_HUB, 1650 0, 1651 {0,0}, 1652 0, 1653 0, 1654 {""}, 1655 {""}, 1656 }; 1657 1658 Static int 1659 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1660 { 1661 int i; 1662 1663 if (l == 0) 1664 return (0); 1665 p->bLength = 2 * strlen(s) + 2; 1666 if (l == 1) 1667 return (1); 1668 p->bDescriptorType = UDESC_STRING; 1669 l -= 2; 1670 for (i = 0; s[i] && l > 1; i++, l -= 2) 1671 USETW2(p->bString[i], 0, s[i]); 1672 return (2*i+2); 1673 } 1674 1675 /* 1676 * Simulate a hardware hub by handling all the necessary requests. 1677 */ 1678 Static usbd_status 1679 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1680 { 1681 usbd_status err; 1682 1683 /* Insert last in queue. */ 1684 err = usb_insert_transfer(xfer); 1685 if (err) 1686 return (err); 1687 1688 /* Pipe isn't running, start first */ 1689 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1690 } 1691 1692 Static usbd_status 1693 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1694 { 1695 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1696 usb_device_request_t *req; 1697 void *buf = NULL; 1698 int port, i; 1699 int s, len, value, index, l, totlen = 0; 1700 usb_port_status_t ps; 1701 usb_hub_descriptor_t hubd; 1702 usbd_status err; 1703 u_int32_t v; 1704 1705 if (sc->sc_dying) 1706 return (USBD_IOERROR); 1707 1708 #ifdef DIAGNOSTIC 1709 if (!(xfer->rqflags & URQ_REQUEST)) 1710 /* XXX panic */ 1711 return (USBD_INVAL); 1712 #endif 1713 req = &xfer->request; 1714 1715 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1716 req->bmRequestType, req->bRequest)); 1717 1718 len = UGETW(req->wLength); 1719 value = UGETW(req->wValue); 1720 index = UGETW(req->wIndex); 1721 1722 if (len != 0) 1723 buf = KERNADDR(&xfer->dmabuf, 0); 1724 1725 #define C(x,y) ((x) | ((y) << 8)) 1726 switch(C(req->bRequest, req->bmRequestType)) { 1727 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1728 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1729 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1730 /* 1731 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1732 * for the integrated root hub. 1733 */ 1734 break; 1735 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1736 if (len > 0) { 1737 *(u_int8_t *)buf = sc->sc_conf; 1738 totlen = 1; 1739 } 1740 break; 1741 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1742 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1743 if (len == 0) 1744 break; 1745 switch(value >> 8) { 1746 case UDESC_DEVICE: 1747 if ((value & 0xff) != 0) { 1748 err = USBD_IOERROR; 1749 goto ret; 1750 } 1751 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1752 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1753 memcpy(buf, &ehci_devd, l); 1754 break; 1755 /* 1756 * We can't really operate at another speed, but the spec says 1757 * we need this descriptor. 1758 */ 1759 case UDESC_DEVICE_QUALIFIER: 1760 if ((value & 0xff) != 0) { 1761 err = USBD_IOERROR; 1762 goto ret; 1763 } 1764 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1765 memcpy(buf, &ehci_odevd, l); 1766 break; 1767 /* 1768 * We can't really operate at another speed, but the spec says 1769 * we need this descriptor. 1770 */ 1771 case UDESC_OTHER_SPEED_CONFIGURATION: 1772 case UDESC_CONFIG: 1773 if ((value & 0xff) != 0) { 1774 err = USBD_IOERROR; 1775 goto ret; 1776 } 1777 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1778 memcpy(buf, &ehci_confd, l); 1779 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1780 value >> 8; 1781 buf = (char *)buf + l; 1782 len -= l; 1783 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1784 totlen += l; 1785 memcpy(buf, &ehci_ifcd, l); 1786 buf = (char *)buf + l; 1787 len -= l; 1788 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1789 totlen += l; 1790 memcpy(buf, &ehci_endpd, l); 1791 break; 1792 case UDESC_STRING: 1793 *(u_int8_t *)buf = 0; 1794 totlen = 1; 1795 switch (value & 0xff) { 1796 case 0: /* Language table */ 1797 totlen = ehci_str(buf, len, "\001"); 1798 break; 1799 case 1: /* Vendor */ 1800 totlen = ehci_str(buf, len, sc->sc_vendor); 1801 break; 1802 case 2: /* Product */ 1803 totlen = ehci_str(buf, len, "EHCI root hub"); 1804 break; 1805 } 1806 break; 1807 default: 1808 err = USBD_IOERROR; 1809 goto ret; 1810 } 1811 break; 1812 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1813 if (len > 0) { 1814 *(u_int8_t *)buf = 0; 1815 totlen = 1; 1816 } 1817 break; 1818 case C(UR_GET_STATUS, UT_READ_DEVICE): 1819 if (len > 1) { 1820 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1821 totlen = 2; 1822 } 1823 break; 1824 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1825 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1826 if (len > 1) { 1827 USETW(((usb_status_t *)buf)->wStatus, 0); 1828 totlen = 2; 1829 } 1830 break; 1831 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1832 if (value >= USB_MAX_DEVICES) { 1833 err = USBD_IOERROR; 1834 goto ret; 1835 } 1836 sc->sc_addr = value; 1837 break; 1838 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1839 if (value != 0 && value != 1) { 1840 err = USBD_IOERROR; 1841 goto ret; 1842 } 1843 sc->sc_conf = value; 1844 break; 1845 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1846 break; 1847 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1848 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1849 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1850 err = USBD_IOERROR; 1851 goto ret; 1852 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1853 break; 1854 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1855 break; 1856 /* Hub requests */ 1857 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1858 break; 1859 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1860 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1861 "port=%d feature=%d\n", 1862 index, value)); 1863 if (index < 1 || index > sc->sc_noport) { 1864 err = USBD_IOERROR; 1865 goto ret; 1866 } 1867 port = EHCI_PORTSC(index); 1868 v = EOREAD4(sc, port); 1869 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1870 v &= ~EHCI_PS_CLEAR; 1871 switch(value) { 1872 case UHF_PORT_ENABLE: 1873 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1874 break; 1875 case UHF_PORT_SUSPEND: 1876 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1877 break; 1878 case UHF_PORT_POWER: 1879 if (sc->sc_hasppc) 1880 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1881 break; 1882 case UHF_PORT_TEST: 1883 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1884 "%d\n", index)); 1885 break; 1886 case UHF_PORT_INDICATOR: 1887 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1888 "%d\n", index)); 1889 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1890 break; 1891 case UHF_C_PORT_CONNECTION: 1892 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1893 break; 1894 case UHF_C_PORT_ENABLE: 1895 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1896 break; 1897 case UHF_C_PORT_SUSPEND: 1898 /* how? */ 1899 break; 1900 case UHF_C_PORT_OVER_CURRENT: 1901 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1902 break; 1903 case UHF_C_PORT_RESET: 1904 sc->sc_isreset[index] = 0; 1905 break; 1906 default: 1907 err = USBD_IOERROR; 1908 goto ret; 1909 } 1910 #if 0 1911 switch(value) { 1912 case UHF_C_PORT_CONNECTION: 1913 case UHF_C_PORT_ENABLE: 1914 case UHF_C_PORT_SUSPEND: 1915 case UHF_C_PORT_OVER_CURRENT: 1916 case UHF_C_PORT_RESET: 1917 /* Enable RHSC interrupt if condition is cleared. */ 1918 if ((OREAD4(sc, port) >> 16) == 0) 1919 ehci_pcd_able(sc, 1); 1920 break; 1921 default: 1922 break; 1923 } 1924 #endif 1925 break; 1926 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1927 if (len == 0) 1928 break; 1929 if ((value & 0xff) != 0) { 1930 err = USBD_IOERROR; 1931 goto ret; 1932 } 1933 hubd = ehci_hubd; 1934 hubd.bNbrPorts = sc->sc_noport; 1935 v = EOREAD4(sc, EHCI_HCSPARAMS); 1936 USETW(hubd.wHubCharacteristics, 1937 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1938 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1939 ? UHD_PORT_IND : 0); 1940 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1941 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1942 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1943 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1944 l = min(len, hubd.bDescLength); 1945 totlen = l; 1946 memcpy(buf, &hubd, l); 1947 break; 1948 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1949 if (len != 4) { 1950 err = USBD_IOERROR; 1951 goto ret; 1952 } 1953 memset(buf, 0, len); /* ? XXX */ 1954 totlen = len; 1955 break; 1956 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1957 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1958 index)); 1959 if (index < 1 || index > sc->sc_noport) { 1960 err = USBD_IOERROR; 1961 goto ret; 1962 } 1963 if (len != 4) { 1964 err = USBD_IOERROR; 1965 goto ret; 1966 } 1967 v = EOREAD4(sc, EHCI_PORTSC(index)); 1968 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1969 v)); 1970 i = UPS_HIGH_SPEED; 1971 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1972 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1973 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1974 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1975 if (v & EHCI_PS_PR) i |= UPS_RESET; 1976 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1977 USETW(ps.wPortStatus, i); 1978 i = 0; 1979 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1980 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1981 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1982 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1983 USETW(ps.wPortChange, i); 1984 l = min(len, sizeof ps); 1985 memcpy(buf, &ps, l); 1986 totlen = l; 1987 break; 1988 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1989 err = USBD_IOERROR; 1990 goto ret; 1991 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1992 break; 1993 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1994 if (index < 1 || index > sc->sc_noport) { 1995 err = USBD_IOERROR; 1996 goto ret; 1997 } 1998 port = EHCI_PORTSC(index); 1999 v = EOREAD4(sc, port); 2000 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 2001 v &= ~EHCI_PS_CLEAR; 2002 switch(value) { 2003 case UHF_PORT_ENABLE: 2004 EOWRITE4(sc, port, v | EHCI_PS_PE); 2005 break; 2006 case UHF_PORT_SUSPEND: 2007 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 2008 break; 2009 case UHF_PORT_RESET: 2010 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 2011 index)); 2012 if (EHCI_PS_IS_LOWSPEED(v)) { 2013 /* Low speed device, give up ownership. */ 2014 ehci_disown(sc, index, 1); 2015 break; 2016 } 2017 /* Start reset sequence. */ 2018 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2019 EOWRITE4(sc, port, v | EHCI_PS_PR); 2020 /* Wait for reset to complete. */ 2021 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2022 if (sc->sc_dying) { 2023 err = USBD_IOERROR; 2024 goto ret; 2025 } 2026 /* Terminate reset sequence. */ 2027 EOWRITE4(sc, port, v); 2028 /* Wait for HC to complete reset. */ 2029 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2030 if (sc->sc_dying) { 2031 err = USBD_IOERROR; 2032 goto ret; 2033 } 2034 v = EOREAD4(sc, port); 2035 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2036 if (v & EHCI_PS_PR) { 2037 printf("%s: port reset timeout\n", 2038 USBDEVNAME(sc->sc_bus.bdev)); 2039 return (USBD_TIMEOUT); 2040 } 2041 if (!(v & EHCI_PS_PE)) { 2042 /* Not a high speed device, give up ownership.*/ 2043 ehci_disown(sc, index, 0); 2044 break; 2045 } 2046 sc->sc_isreset[index] = 1; 2047 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2048 index, v)); 2049 break; 2050 case UHF_PORT_POWER: 2051 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2052 "%d (has PPC = %d)\n", index, 2053 sc->sc_hasppc)); 2054 if (sc->sc_hasppc) 2055 EOWRITE4(sc, port, v | EHCI_PS_PP); 2056 break; 2057 case UHF_PORT_TEST: 2058 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2059 "%d\n", index)); 2060 break; 2061 case UHF_PORT_INDICATOR: 2062 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2063 "%d\n", index)); 2064 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2065 break; 2066 default: 2067 err = USBD_IOERROR; 2068 goto ret; 2069 } 2070 break; 2071 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2072 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2073 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2074 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2075 break; 2076 default: 2077 err = USBD_IOERROR; 2078 goto ret; 2079 } 2080 xfer->actlen = totlen; 2081 err = USBD_NORMAL_COMPLETION; 2082 ret: 2083 xfer->status = err; 2084 s = splusb(); 2085 usb_transfer_complete(xfer); 2086 splx(s); 2087 return (USBD_IN_PROGRESS); 2088 } 2089 2090 void 2091 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2092 { 2093 int port; 2094 u_int32_t v; 2095 2096 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2097 #ifdef DIAGNOSTIC 2098 if (sc->sc_npcomp != 0) { 2099 int i = (index-1) / sc->sc_npcomp; 2100 if (i >= sc->sc_ncomp) 2101 printf("%s: strange port\n", 2102 USBDEVNAME(sc->sc_bus.bdev)); 2103 else 2104 printf("%s: handing over %s speed device on " 2105 "port %d to %s\n", 2106 USBDEVNAME(sc->sc_bus.bdev), 2107 lowspeed ? "low" : "full", 2108 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2109 } else { 2110 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2111 } 2112 #endif 2113 port = EHCI_PORTSC(index); 2114 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2115 EOWRITE4(sc, port, v | EHCI_PS_PO); 2116 } 2117 2118 /* Abort a root control request. */ 2119 Static void 2120 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2121 { 2122 /* Nothing to do, all transfers are synchronous. */ 2123 } 2124 2125 /* Close the root pipe. */ 2126 Static void 2127 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2128 { 2129 DPRINTF(("ehci_root_ctrl_close\n")); 2130 /* Nothing to do. */ 2131 } 2132 2133 void 2134 ehci_root_intr_done(usbd_xfer_handle xfer) 2135 { 2136 xfer->hcpriv = NULL; 2137 } 2138 2139 Static usbd_status 2140 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2141 { 2142 usbd_status err; 2143 2144 /* Insert last in queue. */ 2145 err = usb_insert_transfer(xfer); 2146 if (err) 2147 return (err); 2148 2149 /* Pipe isn't running, start first */ 2150 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2151 } 2152 2153 Static usbd_status 2154 ehci_root_intr_start(usbd_xfer_handle xfer) 2155 { 2156 usbd_pipe_handle pipe = xfer->pipe; 2157 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2158 2159 if (sc->sc_dying) 2160 return (USBD_IOERROR); 2161 2162 sc->sc_intrxfer = xfer; 2163 2164 return (USBD_IN_PROGRESS); 2165 } 2166 2167 /* Abort a root interrupt request. */ 2168 Static void 2169 ehci_root_intr_abort(usbd_xfer_handle xfer) 2170 { 2171 int s; 2172 2173 if (xfer->pipe->intrxfer == xfer) { 2174 DPRINTF(("ehci_root_intr_abort: remove\n")); 2175 xfer->pipe->intrxfer = NULL; 2176 } 2177 xfer->status = USBD_CANCELLED; 2178 s = splusb(); 2179 usb_transfer_complete(xfer); 2180 splx(s); 2181 } 2182 2183 /* Close the root pipe. */ 2184 Static void 2185 ehci_root_intr_close(usbd_pipe_handle pipe) 2186 { 2187 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2188 2189 DPRINTF(("ehci_root_intr_close\n")); 2190 2191 sc->sc_intrxfer = NULL; 2192 } 2193 2194 void 2195 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2196 { 2197 xfer->hcpriv = NULL; 2198 } 2199 2200 /************************/ 2201 2202 ehci_soft_qh_t * 2203 ehci_alloc_sqh(ehci_softc_t *sc) 2204 { 2205 ehci_soft_qh_t *sqh; 2206 usbd_status err; 2207 int i, offs; 2208 usb_dma_t dma; 2209 2210 if (sc->sc_freeqhs == NULL) { 2211 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2212 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2213 EHCI_PAGE_SIZE, &dma); 2214 #ifdef EHCI_DEBUG 2215 if (err) 2216 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2217 #endif 2218 if (err) 2219 return (NULL); 2220 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2221 offs = i * EHCI_SQH_SIZE; 2222 sqh = KERNADDR(&dma, offs); 2223 sqh->physaddr = DMAADDR(&dma, offs); 2224 sqh->next = sc->sc_freeqhs; 2225 sc->sc_freeqhs = sqh; 2226 } 2227 } 2228 sqh = sc->sc_freeqhs; 2229 sc->sc_freeqhs = sqh->next; 2230 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2231 sqh->next = NULL; 2232 return (sqh); 2233 } 2234 2235 void 2236 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2237 { 2238 sqh->next = sc->sc_freeqhs; 2239 sc->sc_freeqhs = sqh; 2240 } 2241 2242 ehci_soft_qtd_t * 2243 ehci_alloc_sqtd(ehci_softc_t *sc) 2244 { 2245 ehci_soft_qtd_t *sqtd; 2246 usbd_status err; 2247 int i, offs; 2248 usb_dma_t dma; 2249 int s; 2250 2251 if (sc->sc_freeqtds == NULL) { 2252 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2253 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2254 EHCI_PAGE_SIZE, &dma); 2255 #ifdef EHCI_DEBUG 2256 if (err) 2257 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2258 #endif 2259 if (err) 2260 return (NULL); 2261 s = splusb(); 2262 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2263 offs = i * EHCI_SQTD_SIZE; 2264 sqtd = KERNADDR(&dma, offs); 2265 sqtd->physaddr = DMAADDR(&dma, offs); 2266 sqtd->nextqtd = sc->sc_freeqtds; 2267 sc->sc_freeqtds = sqtd; 2268 } 2269 splx(s); 2270 } 2271 2272 s = splusb(); 2273 sqtd = sc->sc_freeqtds; 2274 sc->sc_freeqtds = sqtd->nextqtd; 2275 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2276 sqtd->nextqtd = NULL; 2277 sqtd->xfer = NULL; 2278 splx(s); 2279 2280 return (sqtd); 2281 } 2282 2283 void 2284 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2285 { 2286 int s; 2287 2288 s = splusb(); 2289 sqtd->nextqtd = sc->sc_freeqtds; 2290 sc->sc_freeqtds = sqtd; 2291 splx(s); 2292 } 2293 2294 usbd_status 2295 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2296 int alen, int rd, usbd_xfer_handle xfer, 2297 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2298 { 2299 ehci_soft_qtd_t *next, *cur; 2300 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2301 u_int32_t qtdstatus; 2302 int len, curlen, mps; 2303 int i, tog; 2304 usb_dma_t *dma = &xfer->dmabuf; 2305 u_int16_t flags = xfer->flags; 2306 2307 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2308 2309 len = alen; 2310 dataphys = DMAADDR(dma, 0); 2311 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2312 qtdstatus = EHCI_QTD_ACTIVE | 2313 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2314 EHCI_QTD_SET_CERR(3) 2315 /* IOC set below */ 2316 /* BYTES set below */ 2317 ; 2318 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2319 tog = epipe->nexttoggle; 2320 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2321 2322 cur = ehci_alloc_sqtd(sc); 2323 *sp = cur; 2324 if (cur == NULL) 2325 goto nomem; 2326 for (;;) { 2327 dataphyspage = EHCI_PAGE(dataphys); 2328 /* The EHCI hardware can handle at most 5 pages. */ 2329 if (dataphyslastpage - dataphyspage < 2330 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2331 /* we can handle it in this QTD */ 2332 curlen = len; 2333 } else { 2334 /* must use multiple TDs, fill as much as possible. */ 2335 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2336 EHCI_PAGE_OFFSET(dataphys); 2337 #ifdef DIAGNOSTIC 2338 if (curlen > len) { 2339 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2340 "len=0x%x offs=0x%x\n", curlen, len, 2341 EHCI_PAGE_OFFSET(dataphys)); 2342 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2343 dataphyslastpage, dataphyspage, 2344 dataphys); 2345 curlen = len; 2346 } 2347 #endif 2348 /* the length must be a multiple of the max size */ 2349 curlen -= curlen % mps; 2350 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2351 "curlen=%d\n", curlen)); 2352 #ifdef DIAGNOSTIC 2353 if (curlen == 0) 2354 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2355 #endif 2356 } 2357 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2358 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2359 dataphys, dataphyslastpage, 2360 len, curlen)); 2361 len -= curlen; 2362 2363 /* 2364 * Allocate another transfer if there's more data left, 2365 * or if force last short transfer flag is set and we're 2366 * allocating a multiple of the max packet size. 2367 */ 2368 if (len != 0 || 2369 ((curlen % mps) == 0 && !rd && curlen != 0 && 2370 (flags & USBD_FORCE_SHORT_XFER))) { 2371 next = ehci_alloc_sqtd(sc); 2372 if (next == NULL) 2373 goto nomem; 2374 nextphys = htole32(next->physaddr); 2375 } else { 2376 next = NULL; 2377 nextphys = EHCI_NULL; 2378 } 2379 2380 for (i = 0; i * EHCI_PAGE_SIZE < 2381 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2382 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2383 if (i != 0) /* use offset only in first buffer */ 2384 a = EHCI_PAGE(a); 2385 cur->qtd.qtd_buffer[i] = htole32(a); 2386 cur->qtd.qtd_buffer_hi[i] = 0; 2387 #ifdef DIAGNOSTIC 2388 if (i >= EHCI_QTD_NBUFFERS) { 2389 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2390 goto nomem; 2391 } 2392 #endif 2393 } 2394 cur->nextqtd = next; 2395 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2396 cur->qtd.qtd_status = 2397 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2398 cur->xfer = xfer; 2399 cur->len = curlen; 2400 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2401 dataphys, dataphys + curlen)); 2402 /* adjust the toggle based on the number of packets in this 2403 qtd */ 2404 if (((curlen + mps - 1) / mps) & 1) { 2405 tog ^= 1; 2406 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2407 } 2408 if (next == NULL) 2409 break; 2410 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2411 dataphys += curlen; 2412 cur = next; 2413 } 2414 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2415 *ep = cur; 2416 epipe->nexttoggle = tog; 2417 2418 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2419 *sp, *ep)); 2420 2421 return (USBD_NORMAL_COMPLETION); 2422 2423 nomem: 2424 /* XXX free chain */ 2425 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2426 return (USBD_NOMEM); 2427 } 2428 2429 Static void 2430 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2431 ehci_soft_qtd_t *sqtdend) 2432 { 2433 ehci_soft_qtd_t *p; 2434 int i; 2435 2436 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2437 sqtd, sqtdend)); 2438 2439 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2440 p = sqtd->nextqtd; 2441 ehci_free_sqtd(sc, sqtd); 2442 } 2443 } 2444 2445 /****************/ 2446 2447 /* 2448 * Close a reqular pipe. 2449 * Assumes that there are no pending transactions. 2450 */ 2451 void 2452 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2453 { 2454 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2455 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2456 ehci_soft_qh_t *sqh = epipe->sqh; 2457 int s; 2458 2459 s = splusb(); 2460 ehci_rem_qh(sc, sqh, head); 2461 splx(s); 2462 ehci_free_sqh(sc, epipe->sqh); 2463 } 2464 2465 /* 2466 * Abort a device request. 2467 * If this routine is called at splusb() it guarantees that the request 2468 * will be removed from the hardware scheduling and that the callback 2469 * for it will be called with USBD_CANCELLED status. 2470 * It's impossible to guarantee that the requested transfer will not 2471 * have happened since the hardware runs concurrently. 2472 * If the transaction has already happened we rely on the ordinary 2473 * interrupt processing to process it. 2474 * XXX This is most probably wrong. 2475 */ 2476 void 2477 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2478 { 2479 #define exfer EXFER(xfer) 2480 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2481 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2482 ehci_soft_qh_t *sqh = epipe->sqh; 2483 ehci_soft_qtd_t *sqtd; 2484 ehci_physaddr_t cur; 2485 u_int32_t qhstatus; 2486 int s; 2487 int hit; 2488 int wake; 2489 2490 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2491 2492 if (sc->sc_dying) { 2493 /* If we're dying, just do the software part. */ 2494 s = splusb(); 2495 xfer->status = status; /* make software ignore it */ 2496 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2497 usb_transfer_complete(xfer); 2498 splx(s); 2499 return; 2500 } 2501 2502 if (xfer->device->bus->intr_context || !curproc) 2503 panic("ehci_abort_xfer: not in process context"); 2504 2505 /* 2506 * If an abort is already in progress then just wait for it to 2507 * complete and return. 2508 */ 2509 if (xfer->hcflags & UXFER_ABORTING) { 2510 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2511 #ifdef DIAGNOSTIC 2512 if (status == USBD_TIMEOUT) 2513 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2514 #endif 2515 /* Override the status which might be USBD_TIMEOUT. */ 2516 xfer->status = status; 2517 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2518 xfer->hcflags |= UXFER_ABORTWAIT; 2519 while (xfer->hcflags & UXFER_ABORTING) 2520 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2521 return; 2522 } 2523 xfer->hcflags |= UXFER_ABORTING; 2524 2525 /* 2526 * Step 1: Make interrupt routine and hardware ignore xfer. 2527 */ 2528 s = splusb(); 2529 xfer->status = status; /* make software ignore it */ 2530 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2531 qhstatus = sqh->qh.qh_qtd.qtd_status; 2532 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2533 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2534 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2535 if (sqtd == exfer->sqtdend) 2536 break; 2537 } 2538 splx(s); 2539 2540 /* 2541 * Step 2: Wait until we know hardware has finished any possible 2542 * use of the xfer. Also make sure the soft interrupt routine 2543 * has run. 2544 */ 2545 ehci_sync_hc(sc); 2546 s = splusb(); 2547 #ifdef USB_USE_SOFTINTR 2548 sc->sc_softwake = 1; 2549 #endif /* USB_USE_SOFTINTR */ 2550 usb_schedsoftintr(&sc->sc_bus); 2551 #ifdef USB_USE_SOFTINTR 2552 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2553 #endif /* USB_USE_SOFTINTR */ 2554 splx(s); 2555 2556 /* 2557 * Step 3: Remove any vestiges of the xfer from the hardware. 2558 * The complication here is that the hardware may have executed 2559 * beyond the xfer we're trying to abort. So as we're scanning 2560 * the TDs of this xfer we check if the hardware points to 2561 * any of them. 2562 */ 2563 s = splusb(); /* XXX why? */ 2564 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2565 hit = 0; 2566 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2567 hit |= cur == sqtd->physaddr; 2568 if (sqtd == exfer->sqtdend) 2569 break; 2570 } 2571 sqtd = sqtd->nextqtd; 2572 /* Zap curqtd register if hardware pointed inside the xfer. */ 2573 if (hit && sqtd != NULL) { 2574 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2575 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2576 sqh->qh.qh_qtd.qtd_status = qhstatus; 2577 } else { 2578 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2579 } 2580 2581 /* 2582 * Step 4: Execute callback. 2583 */ 2584 #ifdef DIAGNOSTIC 2585 exfer->isdone = 1; 2586 #endif 2587 wake = xfer->hcflags & UXFER_ABORTWAIT; 2588 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2589 usb_transfer_complete(xfer); 2590 if (wake) 2591 wakeup(&xfer->hcflags); 2592 2593 splx(s); 2594 #undef exfer 2595 } 2596 2597 void 2598 ehci_timeout(void *addr) 2599 { 2600 struct ehci_xfer *exfer = addr; 2601 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2602 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2603 2604 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2605 #ifdef USB_DEBUG 2606 if (ehcidebug > 1) 2607 usbd_dump_pipe(exfer->xfer.pipe); 2608 #endif 2609 2610 if (sc->sc_dying) { 2611 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2612 return; 2613 } 2614 2615 /* Execute the abort in a process context. */ 2616 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2617 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2618 USB_TASKQ_HC); 2619 } 2620 2621 void 2622 ehci_timeout_task(void *addr) 2623 { 2624 usbd_xfer_handle xfer = addr; 2625 int s; 2626 2627 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2628 2629 s = splusb(); 2630 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2631 splx(s); 2632 } 2633 2634 /************************/ 2635 2636 Static usbd_status 2637 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2638 { 2639 usbd_status err; 2640 2641 /* Insert last in queue. */ 2642 err = usb_insert_transfer(xfer); 2643 if (err) 2644 return (err); 2645 2646 /* Pipe isn't running, start first */ 2647 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2648 } 2649 2650 Static usbd_status 2651 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2652 { 2653 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2654 usbd_status err; 2655 2656 if (sc->sc_dying) 2657 return (USBD_IOERROR); 2658 2659 #ifdef DIAGNOSTIC 2660 if (!(xfer->rqflags & URQ_REQUEST)) { 2661 /* XXX panic */ 2662 printf("ehci_device_ctrl_transfer: not a request\n"); 2663 return (USBD_INVAL); 2664 } 2665 #endif 2666 2667 err = ehci_device_request(xfer); 2668 if (err) 2669 return (err); 2670 2671 if (sc->sc_bus.use_polling) 2672 ehci_waitintr(sc, xfer); 2673 return (USBD_IN_PROGRESS); 2674 } 2675 2676 void 2677 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2678 { 2679 struct ehci_xfer *ex = EXFER(xfer); 2680 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2681 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2682 2683 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2684 2685 #ifdef DIAGNOSTIC 2686 if (!(xfer->rqflags & URQ_REQUEST)) { 2687 panic("ehci_ctrl_done: not a request"); 2688 } 2689 #endif 2690 2691 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2692 ehci_del_intr_list(ex); /* remove from active list */ 2693 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2694 } 2695 2696 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2697 } 2698 2699 /* Abort a device control request. */ 2700 Static void 2701 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2702 { 2703 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2704 ehci_abort_xfer(xfer, USBD_CANCELLED); 2705 } 2706 2707 /* Close a device control pipe. */ 2708 Static void 2709 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2710 { 2711 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2712 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2713 2714 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2715 ehci_close_pipe(pipe, sc->sc_async_head); 2716 } 2717 2718 usbd_status 2719 ehci_device_request(usbd_xfer_handle xfer) 2720 { 2721 #define exfer EXFER(xfer) 2722 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2723 usb_device_request_t *req = &xfer->request; 2724 usbd_device_handle dev = epipe->pipe.device; 2725 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2726 int addr = dev->address; 2727 ehci_soft_qtd_t *setup, *stat, *next; 2728 ehci_soft_qh_t *sqh; 2729 int isread; 2730 int len; 2731 usbd_status err; 2732 int s; 2733 2734 isread = req->bmRequestType & UT_READ; 2735 len = UGETW(req->wLength); 2736 2737 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2738 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2739 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2740 UGETW(req->wIndex), len, addr, 2741 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2742 2743 setup = ehci_alloc_sqtd(sc); 2744 if (setup == NULL) { 2745 err = USBD_NOMEM; 2746 goto bad1; 2747 } 2748 stat = ehci_alloc_sqtd(sc); 2749 if (stat == NULL) { 2750 err = USBD_NOMEM; 2751 goto bad2; 2752 } 2753 2754 sqh = epipe->sqh; 2755 epipe->u.ctl.length = len; 2756 2757 /* Update device address and length since they may have changed 2758 during the setup of the control pipe in usbd_new_device(). */ 2759 /* XXX This only needs to be done once, but it's too early in open. */ 2760 /* XXXX Should not touch ED here! */ 2761 sqh->qh.qh_endp = 2762 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2763 htole32( 2764 EHCI_QH_SET_ADDR(addr) | 2765 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2766 ); 2767 2768 /* Set up data transaction */ 2769 if (len != 0) { 2770 ehci_soft_qtd_t *end; 2771 2772 /* Start toggle at 1. */ 2773 epipe->nexttoggle = 1; 2774 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2775 &next, &end); 2776 if (err) 2777 goto bad3; 2778 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2779 end->nextqtd = stat; 2780 end->qtd.qtd_next = 2781 end->qtd.qtd_altnext = htole32(stat->physaddr); 2782 } else { 2783 next = stat; 2784 } 2785 2786 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2787 2788 /* Clear toggle */ 2789 setup->qtd.qtd_status = htole32( 2790 EHCI_QTD_ACTIVE | 2791 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2792 EHCI_QTD_SET_CERR(3) | 2793 EHCI_QTD_SET_TOGGLE(0) | 2794 EHCI_QTD_SET_BYTES(sizeof *req) 2795 ); 2796 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2797 setup->qtd.qtd_buffer_hi[0] = 0; 2798 setup->nextqtd = next; 2799 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2800 setup->xfer = xfer; 2801 setup->len = sizeof *req; 2802 2803 stat->qtd.qtd_status = htole32( 2804 EHCI_QTD_ACTIVE | 2805 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2806 EHCI_QTD_SET_CERR(3) | 2807 EHCI_QTD_SET_TOGGLE(1) | 2808 EHCI_QTD_IOC 2809 ); 2810 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2811 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2812 stat->nextqtd = NULL; 2813 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2814 stat->xfer = xfer; 2815 stat->len = 0; 2816 2817 #ifdef EHCI_DEBUG 2818 if (ehcidebug > 5) { 2819 DPRINTF(("ehci_device_request:\n")); 2820 ehci_dump_sqh(sqh); 2821 ehci_dump_sqtds(setup); 2822 } 2823 #endif 2824 2825 exfer->sqtdstart = setup; 2826 exfer->sqtdend = stat; 2827 #ifdef DIAGNOSTIC 2828 if (!exfer->isdone) { 2829 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2830 } 2831 exfer->isdone = 0; 2832 #endif 2833 2834 /* Insert qTD in QH list. */ 2835 s = splusb(); 2836 ehci_set_qh_qtd(sqh, setup); 2837 if (xfer->timeout && !sc->sc_bus.use_polling) { 2838 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2839 ehci_timeout, xfer); 2840 } 2841 ehci_add_intr_list(sc, exfer); 2842 xfer->status = USBD_IN_PROGRESS; 2843 splx(s); 2844 2845 #ifdef EHCI_DEBUG 2846 if (ehcidebug > 10) { 2847 DPRINTF(("ehci_device_request: status=%x\n", 2848 EOREAD4(sc, EHCI_USBSTS))); 2849 delay(10000); 2850 ehci_dump_regs(sc); 2851 ehci_dump_sqh(sc->sc_async_head); 2852 ehci_dump_sqh(sqh); 2853 ehci_dump_sqtds(setup); 2854 } 2855 #endif 2856 2857 return (USBD_NORMAL_COMPLETION); 2858 2859 bad3: 2860 ehci_free_sqtd(sc, stat); 2861 bad2: 2862 ehci_free_sqtd(sc, setup); 2863 bad1: 2864 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2865 xfer->status = err; 2866 usb_transfer_complete(xfer); 2867 return (err); 2868 #undef exfer 2869 } 2870 2871 /* 2872 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2873 * qTD status, or miss signalling occasionally under heavy load. If the host 2874 * machine is too fast, we we can miss transaction completion - when we scan 2875 * the active list the transaction still seems to be active. This generally 2876 * exhibits itself as a umass stall that never recovers. 2877 * 2878 * We work around this behaviour by setting up this callback after any softintr 2879 * that completes with transactions still pending, giving us another chance to 2880 * check for completion after the writeback has taken place. 2881 */ 2882 void 2883 ehci_intrlist_timeout(void *arg) 2884 { 2885 ehci_softc_t *sc = arg; 2886 int s = splusb(); 2887 2888 DPRINTF(("ehci_intrlist_timeout\n")); 2889 usb_schedsoftintr(&sc->sc_bus); 2890 2891 splx(s); 2892 } 2893 2894 /************************/ 2895 2896 Static usbd_status 2897 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2898 { 2899 usbd_status err; 2900 2901 /* Insert last in queue. */ 2902 err = usb_insert_transfer(xfer); 2903 if (err) 2904 return (err); 2905 2906 /* Pipe isn't running, start first */ 2907 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2908 } 2909 2910 usbd_status 2911 ehci_device_bulk_start(usbd_xfer_handle xfer) 2912 { 2913 #define exfer EXFER(xfer) 2914 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2915 usbd_device_handle dev = epipe->pipe.device; 2916 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2917 ehci_soft_qtd_t *data, *dataend; 2918 ehci_soft_qh_t *sqh; 2919 usbd_status err; 2920 int len, isread, endpt; 2921 int s; 2922 2923 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2924 xfer, xfer->length, xfer->flags)); 2925 2926 if (sc->sc_dying) 2927 return (USBD_IOERROR); 2928 2929 #ifdef DIAGNOSTIC 2930 if (xfer->rqflags & URQ_REQUEST) 2931 panic("ehci_device_bulk_start: a request"); 2932 #endif 2933 2934 len = xfer->length; 2935 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2936 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2937 sqh = epipe->sqh; 2938 2939 epipe->u.bulk.length = len; 2940 2941 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2942 &dataend); 2943 if (err) { 2944 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2945 xfer->status = err; 2946 usb_transfer_complete(xfer); 2947 return (err); 2948 } 2949 2950 #ifdef EHCI_DEBUG 2951 if (ehcidebug > 5) { 2952 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2953 ehci_dump_sqh(sqh); 2954 ehci_dump_sqtds(data); 2955 } 2956 #endif 2957 2958 /* Set up interrupt info. */ 2959 exfer->sqtdstart = data; 2960 exfer->sqtdend = dataend; 2961 #ifdef DIAGNOSTIC 2962 if (!exfer->isdone) { 2963 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2964 } 2965 exfer->isdone = 0; 2966 #endif 2967 2968 s = splusb(); 2969 ehci_set_qh_qtd(sqh, data); 2970 if (xfer->timeout && !sc->sc_bus.use_polling) { 2971 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2972 ehci_timeout, xfer); 2973 } 2974 ehci_add_intr_list(sc, exfer); 2975 xfer->status = USBD_IN_PROGRESS; 2976 splx(s); 2977 2978 #ifdef EHCI_DEBUG 2979 if (ehcidebug > 10) { 2980 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2981 delay(10000); 2982 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2983 ehci_dump_regs(sc); 2984 #if 0 2985 printf("async_head:\n"); 2986 ehci_dump_sqh(sc->sc_async_head); 2987 #endif 2988 printf("sqh:\n"); 2989 ehci_dump_sqh(sqh); 2990 ehci_dump_sqtds(data); 2991 } 2992 #endif 2993 2994 if (sc->sc_bus.use_polling) 2995 ehci_waitintr(sc, xfer); 2996 2997 return (USBD_IN_PROGRESS); 2998 #undef exfer 2999 } 3000 3001 Static void 3002 ehci_device_bulk_abort(usbd_xfer_handle xfer) 3003 { 3004 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 3005 ehci_abort_xfer(xfer, USBD_CANCELLED); 3006 } 3007 3008 /* 3009 * Close a device bulk pipe. 3010 */ 3011 Static void 3012 ehci_device_bulk_close(usbd_pipe_handle pipe) 3013 { 3014 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3015 3016 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3017 ehci_close_pipe(pipe, sc->sc_async_head); 3018 } 3019 3020 void 3021 ehci_device_bulk_done(usbd_xfer_handle xfer) 3022 { 3023 struct ehci_xfer *ex = EXFER(xfer); 3024 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3025 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3026 3027 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3028 xfer, xfer->actlen)); 3029 3030 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3031 ehci_del_intr_list(ex); /* remove from active list */ 3032 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3033 } 3034 3035 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3036 } 3037 3038 /************************/ 3039 3040 Static usbd_status 3041 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3042 { 3043 struct ehci_soft_islot *isp; 3044 int islot, lev; 3045 3046 /* Find a poll rate that is large enough. */ 3047 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3048 if (EHCI_ILEV_IVAL(lev) <= ival) 3049 break; 3050 3051 /* Pick an interrupt slot at the right level. */ 3052 /* XXX could do better than picking at random */ 3053 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3054 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3055 3056 sqh->islot = islot; 3057 isp = &sc->sc_islots[islot]; 3058 ehci_add_qh(sqh, isp->sqh); 3059 3060 return (USBD_NORMAL_COMPLETION); 3061 } 3062 3063 Static usbd_status 3064 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3065 { 3066 usbd_status err; 3067 3068 /* Insert last in queue. */ 3069 err = usb_insert_transfer(xfer); 3070 if (err) 3071 return (err); 3072 3073 /* 3074 * Pipe isn't running (otherwise err would be USBD_INPROG), 3075 * so start it first. 3076 */ 3077 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3078 } 3079 3080 Static usbd_status 3081 ehci_device_intr_start(usbd_xfer_handle xfer) 3082 { 3083 #define exfer EXFER(xfer) 3084 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3085 usbd_device_handle dev = xfer->pipe->device; 3086 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3087 ehci_soft_qtd_t *data, *dataend; 3088 ehci_soft_qh_t *sqh; 3089 usbd_status err; 3090 int len, isread, endpt; 3091 int s; 3092 3093 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3094 xfer, xfer->length, xfer->flags)); 3095 3096 if (sc->sc_dying) 3097 return (USBD_IOERROR); 3098 3099 #ifdef DIAGNOSTIC 3100 if (xfer->rqflags & URQ_REQUEST) 3101 panic("ehci_device_intr_start: a request"); 3102 #endif 3103 3104 len = xfer->length; 3105 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3106 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3107 sqh = epipe->sqh; 3108 3109 epipe->u.intr.length = len; 3110 3111 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3112 &dataend); 3113 if (err) { 3114 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3115 xfer->status = err; 3116 usb_transfer_complete(xfer); 3117 return (err); 3118 } 3119 3120 #ifdef EHCI_DEBUG 3121 if (ehcidebug > 5) { 3122 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3123 ehci_dump_sqh(sqh); 3124 ehci_dump_sqtds(data); 3125 } 3126 #endif 3127 3128 /* Set up interrupt info. */ 3129 exfer->sqtdstart = data; 3130 exfer->sqtdend = dataend; 3131 #ifdef DIAGNOSTIC 3132 if (!exfer->isdone) { 3133 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3134 } 3135 exfer->isdone = 0; 3136 #endif 3137 3138 s = splusb(); 3139 ehci_set_qh_qtd(sqh, data); 3140 if (xfer->timeout && !sc->sc_bus.use_polling) { 3141 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3142 ehci_timeout, xfer); 3143 } 3144 ehci_add_intr_list(sc, exfer); 3145 xfer->status = USBD_IN_PROGRESS; 3146 splx(s); 3147 3148 #ifdef EHCI_DEBUG 3149 if (ehcidebug > 10) { 3150 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3151 delay(10000); 3152 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3153 ehci_dump_regs(sc); 3154 printf("sqh:\n"); 3155 ehci_dump_sqh(sqh); 3156 ehci_dump_sqtds(data); 3157 } 3158 #endif 3159 3160 if (sc->sc_bus.use_polling) 3161 ehci_waitintr(sc, xfer); 3162 3163 return (USBD_IN_PROGRESS); 3164 #undef exfer 3165 } 3166 3167 Static void 3168 ehci_device_intr_abort(usbd_xfer_handle xfer) 3169 { 3170 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3171 if (xfer->pipe->intrxfer == xfer) { 3172 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3173 xfer->pipe->intrxfer = NULL; 3174 } 3175 ehci_abort_xfer(xfer, USBD_CANCELLED); 3176 } 3177 3178 Static void 3179 ehci_device_intr_close(usbd_pipe_handle pipe) 3180 { 3181 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3182 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3183 struct ehci_soft_islot *isp; 3184 3185 isp = &sc->sc_islots[epipe->sqh->islot]; 3186 ehci_close_pipe(pipe, isp->sqh); 3187 } 3188 3189 Static void 3190 ehci_device_intr_done(usbd_xfer_handle xfer) 3191 { 3192 #define exfer EXFER(xfer) 3193 struct ehci_xfer *ex = EXFER(xfer); 3194 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3195 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3196 ehci_soft_qtd_t *data, *dataend; 3197 ehci_soft_qh_t *sqh; 3198 usbd_status err; 3199 int len, isread, endpt, s; 3200 3201 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3202 xfer, xfer->actlen)); 3203 3204 if (xfer->pipe->repeat) { 3205 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3206 3207 len = epipe->u.intr.length; 3208 xfer->length = len; 3209 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3210 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3211 sqh = epipe->sqh; 3212 3213 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3214 &data, &dataend); 3215 if (err) { 3216 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3217 xfer->status = err; 3218 return; 3219 } 3220 3221 /* Set up interrupt info. */ 3222 exfer->sqtdstart = data; 3223 exfer->sqtdend = dataend; 3224 #ifdef DIAGNOSTIC 3225 if (!exfer->isdone) { 3226 printf("ehci_device_intr_done: not done, ex=%p\n", 3227 exfer); 3228 } 3229 exfer->isdone = 0; 3230 #endif 3231 3232 s = splusb(); 3233 ehci_set_qh_qtd(sqh, data); 3234 if (xfer->timeout && !sc->sc_bus.use_polling) { 3235 usb_callout(xfer->timeout_handle, 3236 mstohz(xfer->timeout), ehci_timeout, xfer); 3237 } 3238 splx(s); 3239 3240 xfer->status = USBD_IN_PROGRESS; 3241 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3242 ehci_del_intr_list(ex); /* remove from active list */ 3243 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3244 } 3245 #undef exfer 3246 } 3247 3248 /************************/ 3249 3250 Static usbd_status 3251 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3252 { 3253 return USBD_IOERROR; 3254 } 3255 Static usbd_status 3256 ehci_device_isoc_start(usbd_xfer_handle xfer) 3257 { 3258 return USBD_IOERROR; 3259 } 3260 Static void 3261 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3262 { 3263 } 3264 Static void 3265 ehci_device_isoc_close(usbd_pipe_handle pipe) 3266 { 3267 } 3268 Static void 3269 ehci_device_isoc_done(usbd_xfer_handle xfer) 3270 { 3271 } 3272
Indexes created Mon Sep 22 13:09:51 GMT 2025