ehci.c revision 1.117
1 /* $NetBSD: ehci.c,v 1.117 2006/11/28 20:58:12 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.117 2006/11/28 20:58:12 drochner Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 Static void ehci_power(int, void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_pcd_able(ehci_softc_t *, int); 192 Static void ehci_pcd_enable(void *); 193 Static void ehci_disown(ehci_softc_t *, int, int); 194 195 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 196 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 197 198 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 199 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 200 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 201 ehci_softc_t *, int, int, usbd_xfer_handle, 202 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 203 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 204 ehci_soft_qtd_t *); 205 206 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 207 208 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 209 int ival); 210 211 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 212 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 213 ehci_soft_qh_t *); 214 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 215 Static void ehci_sync_hc(ehci_softc_t *); 216 217 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 218 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 219 220 #ifdef EHCI_DEBUG 221 Static void ehci_dump_regs(ehci_softc_t *); 222 void ehci_dump(void); 223 Static ehci_softc_t *theehci; 224 Static void ehci_dump_link(ehci_link_t, int); 225 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 226 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 227 Static void ehci_dump_qtd(ehci_qtd_t *); 228 Static void ehci_dump_sqh(ehci_soft_qh_t *); 229 #ifdef DIAGNOSTIC 230 Static void ehci_dump_exfer(struct ehci_xfer *); 231 #endif 232 #endif 233 234 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 235 236 #define EHCI_INTR_ENDPT 1 237 238 #define ehci_add_intr_list(sc, ex) \ 239 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 240 #define ehci_del_intr_list(ex) \ 241 do { \ 242 LIST_REMOVE((ex), inext); \ 243 (ex)->inext.le_prev = NULL; \ 244 } while (0) 245 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 246 247 Static struct usbd_bus_methods ehci_bus_methods = { 248 ehci_open, 249 ehci_softintr, 250 ehci_poll, 251 ehci_allocm, 252 ehci_freem, 253 ehci_allocx, 254 ehci_freex, 255 }; 256 257 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 258 ehci_root_ctrl_transfer, 259 ehci_root_ctrl_start, 260 ehci_root_ctrl_abort, 261 ehci_root_ctrl_close, 262 ehci_noop, 263 ehci_root_ctrl_done, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_intr_methods = { 267 ehci_root_intr_transfer, 268 ehci_root_intr_start, 269 ehci_root_intr_abort, 270 ehci_root_intr_close, 271 ehci_noop, 272 ehci_root_intr_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 276 ehci_device_ctrl_transfer, 277 ehci_device_ctrl_start, 278 ehci_device_ctrl_abort, 279 ehci_device_ctrl_close, 280 ehci_noop, 281 ehci_device_ctrl_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_intr_methods = { 285 ehci_device_intr_transfer, 286 ehci_device_intr_start, 287 ehci_device_intr_abort, 288 ehci_device_intr_close, 289 ehci_device_clear_toggle, 290 ehci_device_intr_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 294 ehci_device_bulk_transfer, 295 ehci_device_bulk_start, 296 ehci_device_bulk_abort, 297 ehci_device_bulk_close, 298 ehci_device_clear_toggle, 299 ehci_device_bulk_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 303 ehci_device_isoc_transfer, 304 ehci_device_isoc_start, 305 ehci_device_isoc_abort, 306 ehci_device_isoc_close, 307 ehci_noop, 308 ehci_device_isoc_done, 309 }; 310 311 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 312 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 313 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 314 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 315 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 316 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 317 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 318 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 319 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 320 }; 321 322 usbd_status 323 ehci_init(ehci_softc_t *sc) 324 { 325 u_int32_t vers, sparams, cparams, hcr; 326 u_int i; 327 usbd_status err; 328 ehci_soft_qh_t *sqh; 329 u_int ncomp; 330 331 DPRINTF(("ehci_init: start\n")); 332 #ifdef EHCI_DEBUG 333 theehci = sc; 334 #endif 335 336 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 337 338 vers = EREAD2(sc, EHCI_HCIVERSION); 339 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 340 vers >> 8, vers & 0xff); 341 342 sparams = EREAD4(sc, EHCI_HCSPARAMS); 343 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 344 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 345 ncomp = EHCI_HCS_N_CC(sparams); 346 if (ncomp != sc->sc_ncomp) { 347 aprint_error("%s: wrong number of companions (%d != %d)\n", 348 USBDEVNAME(sc->sc_bus.bdev), 349 ncomp, sc->sc_ncomp); 350 #if NOHCI == 0 || NUHCI == 0 351 aprint_error("%s: ohci or uhci probably not configured\n", 352 USBDEVNAME(sc->sc_bus.bdev)); 353 #endif 354 if (ncomp < sc->sc_ncomp) 355 sc->sc_ncomp = ncomp; 356 } 357 if (sc->sc_ncomp > 0) { 358 aprint_normal("%s: companion controller%s, %d port%s each:", 359 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 360 EHCI_HCS_N_PCC(sparams), 361 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 362 for (i = 0; i < sc->sc_ncomp; i++) 363 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 364 aprint_normal("\n"); 365 } 366 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 367 cparams = EREAD4(sc, EHCI_HCCPARAMS); 368 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 369 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 370 371 if (EHCI_HCC_64BIT(cparams)) { 372 /* MUST clear segment register if 64 bit capable. */ 373 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 374 } 375 376 sc->sc_bus.usbrev = USBREV_2_0; 377 378 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 379 USB_MEM_RESERVE); 380 381 /* Reset the controller */ 382 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 383 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 384 usb_delay_ms(&sc->sc_bus, 1); 385 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 386 for (i = 0; i < 100; i++) { 387 usb_delay_ms(&sc->sc_bus, 1); 388 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 389 if (!hcr) 390 break; 391 } 392 if (hcr) { 393 aprint_error("%s: reset timeout\n", 394 USBDEVNAME(sc->sc_bus.bdev)); 395 return (USBD_IOERROR); 396 } 397 398 /* XXX need proper intr scheduling */ 399 sc->sc_rand = 96; 400 401 /* frame list size at default, read back what we got and use that */ 402 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 403 case 0: sc->sc_flsize = 1024; break; 404 case 1: sc->sc_flsize = 512; break; 405 case 2: sc->sc_flsize = 256; break; 406 case 3: return (USBD_IOERROR); 407 } 408 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 409 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 410 if (err) 411 return (err); 412 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 413 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 414 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 415 416 /* Set up the bus struct. */ 417 sc->sc_bus.methods = &ehci_bus_methods; 418 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 419 420 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 421 ehci_power, sc); 422 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 423 424 sc->sc_eintrs = EHCI_NORMAL_INTRS; 425 426 /* 427 * Allocate the interrupt dummy QHs. These are arranged to give poll 428 * intervals that are powers of 2 times 1ms. 429 */ 430 for (i = 0; i < EHCI_INTRQHS; i++) { 431 sqh = ehci_alloc_sqh(sc); 432 if (sqh == NULL) { 433 err = USBD_NOMEM; 434 goto bad1; 435 } 436 sc->sc_islots[i].sqh = sqh; 437 } 438 for (i = 0; i < EHCI_INTRQHS; i++) { 439 sqh = sc->sc_islots[i].sqh; 440 if (i == 0) { 441 /* The last (1ms) QH terminates. */ 442 sqh->qh.qh_link = EHCI_NULL; 443 sqh->next = NULL; 444 } else { 445 /* Otherwise the next QH has half the poll interval */ 446 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 447 sqh->qh.qh_link = htole32(sqh->next->physaddr | 448 EHCI_LINK_QH); 449 } 450 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 451 sqh->qh.qh_curqtd = EHCI_NULL; 452 sqh->next = NULL; 453 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 454 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 455 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 456 sqh->sqtd = NULL; 457 } 458 /* Point the frame list at the last level (128ms). */ 459 for (i = 0; i < sc->sc_flsize; i++) { 460 int j; 461 462 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 463 revbits[i & (EHCI_MAX_POLLRATE-1)]; 464 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 465 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 466 i)].sqh->physaddr); 467 } 468 469 /* Allocate dummy QH that starts the async list. */ 470 sqh = ehci_alloc_sqh(sc); 471 if (sqh == NULL) { 472 err = USBD_NOMEM; 473 goto bad1; 474 } 475 /* Fill the QH */ 476 sqh->qh.qh_endp = 477 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 478 sqh->qh.qh_link = 479 htole32(sqh->physaddr | EHCI_LINK_QH); 480 sqh->qh.qh_curqtd = EHCI_NULL; 481 sqh->next = NULL; 482 /* Fill the overlay qTD */ 483 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 484 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 485 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 486 sqh->sqtd = NULL; 487 #ifdef EHCI_DEBUG 488 if (ehcidebug) { 489 ehci_dump_sqh(sqh); 490 } 491 #endif 492 493 /* Point to async list */ 494 sc->sc_async_head = sqh; 495 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 496 497 usb_callout_init(sc->sc_tmo_pcd); 498 usb_callout_init(sc->sc_tmo_intrlist); 499 500 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 501 502 /* Turn on controller */ 503 EOWRITE4(sc, EHCI_USBCMD, 504 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 505 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 506 EHCI_CMD_ASE | 507 EHCI_CMD_PSE | 508 EHCI_CMD_RS); 509 510 /* Take over port ownership */ 511 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 512 513 for (i = 0; i < 100; i++) { 514 usb_delay_ms(&sc->sc_bus, 1); 515 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 516 if (!hcr) 517 break; 518 } 519 if (hcr) { 520 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 521 return (USBD_IOERROR); 522 } 523 524 /* Enable interrupts */ 525 DPRINTFN(1,("ehci_init: enabling\n")); 526 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 /* Schedule a callout to catch any dropped transactions. */ 704 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 705 !LIST_EMPTY(&sc->sc_intrhead)) 706 usb_callout(sc->sc_tmo_intrlist, hz, 707 ehci_intrlist_timeout, sc); 708 709 #ifdef USB_USE_SOFTINTR 710 if (sc->sc_softwake) { 711 sc->sc_softwake = 0; 712 wakeup(&sc->sc_softwake); 713 } 714 #endif /* USB_USE_SOFTINTR */ 715 716 sc->sc_bus.intr_context--; 717 } 718 719 /* Check for an interrupt. */ 720 void 721 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 722 { 723 ehci_soft_qtd_t *sqtd, *lsqtd; 724 u_int32_t status; 725 726 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 727 728 if (ex->sqtdstart == NULL) { 729 printf("ehci_check_intr: sqtdstart=NULL\n"); 730 return; 731 } 732 lsqtd = ex->sqtdend; 733 #ifdef DIAGNOSTIC 734 if (lsqtd == NULL) { 735 printf("ehci_check_intr: lsqtd==0\n"); 736 return; 737 } 738 #endif 739 /* 740 * If the last TD is still active we need to check whether there 741 * is a an error somewhere in the middle, or whether there was a 742 * short packet (SPD and not ACTIVE). 743 */ 744 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 745 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 746 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 747 status = le32toh(sqtd->qtd.qtd_status); 748 /* If there's an active QTD the xfer isn't done. */ 749 if (status & EHCI_QTD_ACTIVE) 750 break; 751 /* Any kind of error makes the xfer done. */ 752 if (status & EHCI_QTD_HALTED) 753 goto done; 754 /* We want short packets, and it is short: it's done */ 755 if (EHCI_QTD_GET_BYTES(status) != 0) 756 goto done; 757 } 758 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 759 ex, ex->sqtdstart)); 760 return; 761 } 762 done: 763 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 764 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 765 ehci_idone(ex); 766 } 767 768 void 769 ehci_idone(struct ehci_xfer *ex) 770 { 771 usbd_xfer_handle xfer = &ex->xfer; 772 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 773 ehci_soft_qtd_t *sqtd, *lsqtd; 774 u_int32_t status = 0, nstatus = 0; 775 int actlen; 776 777 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 778 #ifdef DIAGNOSTIC 779 { 780 int s = splhigh(); 781 if (ex->isdone) { 782 splx(s); 783 #ifdef EHCI_DEBUG 784 printf("ehci_idone: ex is done!\n "); 785 ehci_dump_exfer(ex); 786 #else 787 printf("ehci_idone: ex=%p is done!\n", ex); 788 #endif 789 return; 790 } 791 ex->isdone = 1; 792 splx(s); 793 } 794 #endif 795 796 if (xfer->status == USBD_CANCELLED || 797 xfer->status == USBD_TIMEOUT) { 798 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 799 return; 800 } 801 802 #ifdef EHCI_DEBUG 803 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 804 if (ehcidebug > 10) 805 ehci_dump_sqtds(ex->sqtdstart); 806 #endif 807 808 /* The transfer is done, compute actual length and status. */ 809 lsqtd = ex->sqtdend; 810 actlen = 0; 811 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 812 nstatus = le32toh(sqtd->qtd.qtd_status); 813 if (nstatus & EHCI_QTD_ACTIVE) 814 break; 815 816 status = nstatus; 817 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 818 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 819 } 820 821 /* 822 * If there are left over TDs we need to update the toggle. 823 * The default pipe doesn't need it since control transfers 824 * start the toggle at 0 every time. 825 * For a short transfer we need to update the toggle for the missing 826 * packets within the qTD. 827 */ 828 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 829 xfer->pipe->device->default_pipe != xfer->pipe) { 830 DPRINTFN(2, ("ehci_idone: need toggle update " 831 "status=%08x nstatus=%08x\n", status, nstatus)); 832 #if 0 833 ehci_dump_sqh(epipe->sqh); 834 ehci_dump_sqtds(ex->sqtdstart); 835 #endif 836 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 837 } 838 839 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 840 xfer->length, actlen, status)); 841 xfer->actlen = actlen; 842 if (status & EHCI_QTD_HALTED) { 843 #ifdef EHCI_DEBUG 844 char sbuf[128]; 845 846 bitmask_snprintf((u_int32_t)status, 847 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 848 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 849 850 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 851 "status 0x%s\n", 852 xfer->pipe->device->address, 853 xfer->pipe->endpoint->edesc->bEndpointAddress, 854 sbuf)); 855 if (ehcidebug > 2) { 856 ehci_dump_sqh(epipe->sqh); 857 ehci_dump_sqtds(ex->sqtdstart); 858 } 859 #endif 860 /* low&full speed has an extra error flag */ 861 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 862 EHCI_QH_SPEED_HIGH) 863 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 864 else 865 status &= EHCI_QTD_STATERRS; 866 if (status == 0) /* no other errors means a stall */ 867 xfer->status = USBD_STALLED; 868 else 869 xfer->status = USBD_IOERROR; /* more info XXX */ 870 /* XXX need to reset TT on missed microframe */ 871 if (status & EHCI_QTD_MISSEDMICRO) { 872 ehci_softc_t *sc = (ehci_softc_t *) 873 xfer->pipe->device->bus; 874 875 printf("%s: missed microframe, TT reset not " 876 "implemented, hub might be inoperational\n", 877 USBDEVNAME(sc->sc_bus.bdev)); 878 } 879 } else { 880 xfer->status = USBD_NORMAL_COMPLETION; 881 } 882 883 usb_transfer_complete(xfer); 884 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 885 } 886 887 /* 888 * Wait here until controller claims to have an interrupt. 889 * Then call ehci_intr and return. Use timeout to avoid waiting 890 * too long. 891 */ 892 void 893 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 894 { 895 int timo; 896 u_int32_t intrs; 897 898 xfer->status = USBD_IN_PROGRESS; 899 for (timo = xfer->timeout; timo >= 0; timo--) { 900 usb_delay_ms(&sc->sc_bus, 1); 901 if (sc->sc_dying) 902 break; 903 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 904 sc->sc_eintrs; 905 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 906 #ifdef EHCI_DEBUG 907 if (ehcidebug > 15) 908 ehci_dump_regs(sc); 909 #endif 910 if (intrs) { 911 ehci_intr1(sc); 912 if (xfer->status != USBD_IN_PROGRESS) 913 return; 914 } 915 } 916 917 /* Timeout */ 918 DPRINTF(("ehci_waitintr: timeout\n")); 919 xfer->status = USBD_TIMEOUT; 920 usb_transfer_complete(xfer); 921 /* XXX should free TD */ 922 } 923 924 void 925 ehci_poll(struct usbd_bus *bus) 926 { 927 ehci_softc_t *sc = (ehci_softc_t *)bus; 928 #ifdef EHCI_DEBUG 929 static int last; 930 int new; 931 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 932 if (new != last) { 933 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 934 last = new; 935 } 936 #endif 937 938 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 939 ehci_intr1(sc); 940 } 941 942 int 943 ehci_detach(struct ehci_softc *sc, int flags) 944 { 945 int rv = 0; 946 947 if (sc->sc_child != NULL) 948 rv = config_detach(sc->sc_child, flags); 949 950 if (rv != 0) 951 return (rv); 952 953 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 954 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 955 956 if (sc->sc_powerhook != NULL) 957 powerhook_disestablish(sc->sc_powerhook); 958 if (sc->sc_shutdownhook != NULL) 959 shutdownhook_disestablish(sc->sc_shutdownhook); 960 961 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 962 963 /* XXX free other data structures XXX */ 964 965 return (rv); 966 } 967 968 969 int 970 ehci_activate(device_ptr_t self, enum devact act) 971 { 972 struct ehci_softc *sc = (struct ehci_softc *)self; 973 int rv = 0; 974 975 switch (act) { 976 case DVACT_ACTIVATE: 977 return (EOPNOTSUPP); 978 979 case DVACT_DEACTIVATE: 980 if (sc->sc_child != NULL) 981 rv = config_deactivate(sc->sc_child); 982 sc->sc_dying = 1; 983 break; 984 } 985 return (rv); 986 } 987 988 /* 989 * Handle suspend/resume. 990 * 991 * We need to switch to polling mode here, because this routine is 992 * called from an interrupt context. This is all right since we 993 * are almost suspended anyway. 994 */ 995 void 996 ehci_power(int why, void *v) 997 { 998 ehci_softc_t *sc = v; 999 u_int32_t cmd, hcr; 1000 int s, i; 1001 1002 #ifdef EHCI_DEBUG 1003 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1004 if (ehcidebug > 0) 1005 ehci_dump_regs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 1014 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1015 1016 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1017 EOWRITE4(sc, EHCI_USBCMD, cmd); 1018 1019 for (i = 0; i < 100; i++) { 1020 hcr = EOREAD4(sc, EHCI_USBSTS) & 1021 (EHCI_STS_ASS | EHCI_STS_PSS); 1022 if (hcr == 0) 1023 break; 1024 1025 usb_delay_ms(&sc->sc_bus, 1); 1026 } 1027 if (hcr != 0) { 1028 printf("%s: reset timeout\n", 1029 USBDEVNAME(sc->sc_bus.bdev)); 1030 } 1031 1032 cmd &= ~EHCI_CMD_RS; 1033 EOWRITE4(sc, EHCI_USBCMD, cmd); 1034 1035 for (i = 0; i < 100; i++) { 1036 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1037 if (hcr == EHCI_STS_HCH) 1038 break; 1039 1040 usb_delay_ms(&sc->sc_bus, 1); 1041 } 1042 if (hcr != EHCI_STS_HCH) { 1043 printf("%s: config timeout\n", 1044 USBDEVNAME(sc->sc_bus.bdev)); 1045 } 1046 1047 sc->sc_bus.use_polling--; 1048 break; 1049 1050 case PWR_RESUME: 1051 sc->sc_bus.use_polling++; 1052 1053 /* restore things in case the bios sucks */ 1054 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1055 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1056 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1057 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1058 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1059 1060 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1061 1062 for (i = 0; i < 100; i++) { 1063 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1064 if (hcr != EHCI_STS_HCH) 1065 break; 1066 1067 usb_delay_ms(&sc->sc_bus, 1); 1068 } 1069 if (hcr == EHCI_STS_HCH) { 1070 printf("%s: config timeout\n", 1071 USBDEVNAME(sc->sc_bus.bdev)); 1072 } 1073 1074 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1075 1076 sc->sc_bus.use_polling--; 1077 break; 1078 case PWR_SOFTSUSPEND: 1079 case PWR_SOFTSTANDBY: 1080 case PWR_SOFTRESUME: 1081 break; 1082 } 1083 splx(s); 1084 1085 #ifdef EHCI_DEBUG 1086 DPRINTF(("ehci_power: sc=%p\n", sc)); 1087 if (ehcidebug > 0) 1088 ehci_dump_regs(sc); 1089 #endif 1090 } 1091 1092 /* 1093 * Shut down the controller when the system is going down. 1094 */ 1095 void 1096 ehci_shutdown(void *v) 1097 { 1098 ehci_softc_t *sc = v; 1099 1100 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1101 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1102 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1103 } 1104 1105 usbd_status 1106 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1107 { 1108 struct ehci_softc *sc = (struct ehci_softc *)bus; 1109 usbd_status err; 1110 1111 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1112 if (err == USBD_NOMEM) 1113 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1114 #ifdef EHCI_DEBUG 1115 if (err) 1116 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1117 #endif 1118 return (err); 1119 } 1120 1121 void 1122 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1123 { 1124 struct ehci_softc *sc = (struct ehci_softc *)bus; 1125 1126 if (dma->block->flags & USB_DMA_RESERVE) { 1127 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1128 dma); 1129 return; 1130 } 1131 usb_freemem(&sc->sc_bus, dma); 1132 } 1133 1134 usbd_xfer_handle 1135 ehci_allocx(struct usbd_bus *bus) 1136 { 1137 struct ehci_softc *sc = (struct ehci_softc *)bus; 1138 usbd_xfer_handle xfer; 1139 1140 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1141 if (xfer != NULL) { 1142 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1143 #ifdef DIAGNOSTIC 1144 if (xfer->busy_free != XFER_FREE) { 1145 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1146 xfer->busy_free); 1147 } 1148 #endif 1149 } else { 1150 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1151 } 1152 if (xfer != NULL) { 1153 memset(xfer, 0, sizeof(struct ehci_xfer)); 1154 #ifdef DIAGNOSTIC 1155 EXFER(xfer)->isdone = 1; 1156 xfer->busy_free = XFER_BUSY; 1157 #endif 1158 } 1159 return (xfer); 1160 } 1161 1162 void 1163 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1164 { 1165 struct ehci_softc *sc = (struct ehci_softc *)bus; 1166 1167 #ifdef DIAGNOSTIC 1168 if (xfer->busy_free != XFER_BUSY) { 1169 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1170 xfer->busy_free); 1171 return; 1172 } 1173 xfer->busy_free = XFER_FREE; 1174 if (!EXFER(xfer)->isdone) { 1175 printf("ehci_freex: !isdone\n"); 1176 return; 1177 } 1178 #endif 1179 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1180 } 1181 1182 Static void 1183 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1184 { 1185 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1186 1187 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1188 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1189 #ifdef USB_DEBUG 1190 if (ehcidebug) 1191 usbd_dump_pipe(pipe); 1192 #endif 1193 epipe->nexttoggle = 0; 1194 } 1195 1196 Static void 1197 ehci_noop(usbd_pipe_handle pipe) 1198 { 1199 } 1200 1201 #ifdef EHCI_DEBUG 1202 void 1203 ehci_dump_regs(ehci_softc_t *sc) 1204 { 1205 int i; 1206 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1207 EOREAD4(sc, EHCI_USBCMD), 1208 EOREAD4(sc, EHCI_USBSTS), 1209 EOREAD4(sc, EHCI_USBINTR)); 1210 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1211 EOREAD4(sc, EHCI_FRINDEX), 1212 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1213 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1214 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1215 for (i = 1; i <= sc->sc_noport; i++) 1216 printf("port %d status=0x%08x\n", i, 1217 EOREAD4(sc, EHCI_PORTSC(i))); 1218 } 1219 1220 /* 1221 * Unused function - this is meant to be called from a kernel 1222 * debugger. 1223 */ 1224 void 1225 ehci_dump() 1226 { 1227 ehci_dump_regs(theehci); 1228 } 1229 1230 void 1231 ehci_dump_link(ehci_link_t link, int type) 1232 { 1233 link = le32toh(link); 1234 printf("0x%08x", link); 1235 if (link & EHCI_LINK_TERMINATE) 1236 printf("<T>"); 1237 else { 1238 printf("<"); 1239 if (type) { 1240 switch (EHCI_LINK_TYPE(link)) { 1241 case EHCI_LINK_ITD: printf("ITD"); break; 1242 case EHCI_LINK_QH: printf("QH"); break; 1243 case EHCI_LINK_SITD: printf("SITD"); break; 1244 case EHCI_LINK_FSTN: printf("FSTN"); break; 1245 } 1246 } 1247 printf(">"); 1248 } 1249 } 1250 1251 void 1252 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1253 { 1254 int i; 1255 u_int32_t stop; 1256 1257 stop = 0; 1258 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1259 ehci_dump_sqtd(sqtd); 1260 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1261 } 1262 if (sqtd) 1263 printf("dump aborted, too many TDs\n"); 1264 } 1265 1266 void 1267 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1268 { 1269 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1270 ehci_dump_qtd(&sqtd->qtd); 1271 } 1272 1273 void 1274 ehci_dump_qtd(ehci_qtd_t *qtd) 1275 { 1276 u_int32_t s; 1277 char sbuf[128]; 1278 1279 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1280 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1281 printf("\n"); 1282 s = le32toh(qtd->qtd_status); 1283 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1284 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1285 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1286 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1287 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1288 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1289 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1290 EHCI_QTD_GET_PID(s), sbuf); 1291 for (s = 0; s < 5; s++) 1292 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1293 } 1294 1295 void 1296 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1297 { 1298 ehci_qh_t *qh = &sqh->qh; 1299 u_int32_t endp, endphub; 1300 1301 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1302 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1303 endp = le32toh(qh->qh_endp); 1304 printf(" endp=0x%08x\n", endp); 1305 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1306 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1307 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1308 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1309 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1310 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1311 EHCI_QH_GET_NRL(endp)); 1312 endphub = le32toh(qh->qh_endphub); 1313 printf(" endphub=0x%08x\n", endphub); 1314 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1315 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1316 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1317 EHCI_QH_GET_MULT(endphub)); 1318 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1319 printf("Overlay qTD:\n"); 1320 ehci_dump_qtd(&qh->qh_qtd); 1321 } 1322 1323 #ifdef DIAGNOSTIC 1324 Static void 1325 ehci_dump_exfer(struct ehci_xfer *ex) 1326 { 1327 printf("ehci_dump_exfer: ex=%p\n", ex); 1328 } 1329 #endif 1330 #endif 1331 1332 usbd_status 1333 ehci_open(usbd_pipe_handle pipe) 1334 { 1335 usbd_device_handle dev = pipe->device; 1336 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1337 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1338 u_int8_t addr = dev->address; 1339 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1340 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1341 ehci_soft_qh_t *sqh; 1342 usbd_status err; 1343 int s; 1344 int ival, speed, naks; 1345 int hshubaddr, hshubport; 1346 1347 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1348 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1349 1350 if (dev->myhsport) { 1351 hshubaddr = dev->myhsport->parent->address; 1352 hshubport = dev->myhsport->portno; 1353 } else { 1354 hshubaddr = 0; 1355 hshubport = 0; 1356 } 1357 1358 if (sc->sc_dying) 1359 return (USBD_IOERROR); 1360 1361 epipe->nexttoggle = 0; 1362 1363 if (addr == sc->sc_addr) { 1364 switch (ed->bEndpointAddress) { 1365 case USB_CONTROL_ENDPOINT: 1366 pipe->methods = &ehci_root_ctrl_methods; 1367 break; 1368 case UE_DIR_IN | EHCI_INTR_ENDPT: 1369 pipe->methods = &ehci_root_intr_methods; 1370 break; 1371 default: 1372 return (USBD_INVAL); 1373 } 1374 return (USBD_NORMAL_COMPLETION); 1375 } 1376 1377 /* XXX All this stuff is only valid for async. */ 1378 switch (dev->speed) { 1379 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1380 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1381 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1382 default: panic("ehci_open: bad device speed %d", dev->speed); 1383 } 1384 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1385 printf("%s: *** WARNING: opening low/full speed isoc device, " 1386 "this does not work yet.\n", 1387 USBDEVNAME(sc->sc_bus.bdev)); 1388 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1389 hshubaddr, hshubport)); 1390 return USBD_INVAL; 1391 } 1392 1393 naks = 8; /* XXX */ 1394 sqh = ehci_alloc_sqh(sc); 1395 if (sqh == NULL) 1396 return (USBD_NOMEM); 1397 /* qh_link filled when the QH is added */ 1398 sqh->qh.qh_endp = htole32( 1399 EHCI_QH_SET_ADDR(addr) | 1400 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1401 EHCI_QH_SET_EPS(speed) | 1402 EHCI_QH_DTC | 1403 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1404 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1405 EHCI_QH_CTL : 0) | 1406 EHCI_QH_SET_NRL(naks) 1407 ); 1408 sqh->qh.qh_endphub = htole32( 1409 EHCI_QH_SET_MULT(1) | 1410 EHCI_QH_SET_HUBA(hshubaddr) | 1411 EHCI_QH_SET_PORT(hshubport) | 1412 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1413 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1414 ); 1415 sqh->qh.qh_curqtd = EHCI_NULL; 1416 /* Fill the overlay qTD */ 1417 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1418 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1419 sqh->qh.qh_qtd.qtd_status = htole32(0); 1420 1421 epipe->sqh = sqh; 1422 1423 switch (xfertype) { 1424 case UE_CONTROL: 1425 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1426 0, &epipe->u.ctl.reqdma); 1427 #ifdef EHCI_DEBUG 1428 if (err) 1429 printf("ehci_open: usb_allocmem()=%d\n", err); 1430 #endif 1431 if (err) 1432 goto bad; 1433 pipe->methods = &ehci_device_ctrl_methods; 1434 s = splusb(); 1435 ehci_add_qh(sqh, sc->sc_async_head); 1436 splx(s); 1437 break; 1438 case UE_BULK: 1439 pipe->methods = &ehci_device_bulk_methods; 1440 s = splusb(); 1441 ehci_add_qh(sqh, sc->sc_async_head); 1442 splx(s); 1443 break; 1444 case UE_INTERRUPT: 1445 pipe->methods = &ehci_device_intr_methods; 1446 ival = pipe->interval; 1447 if (ival == USBD_DEFAULT_INTERVAL) { 1448 if (speed == EHCI_QH_SPEED_HIGH) { 1449 if (ed->bInterval > 16) { 1450 /* 1451 * illegal with high-speed, but there 1452 * were documentation bugs in the spec, 1453 * so be generous 1454 */ 1455 ival = 256; 1456 } else 1457 ival = (1 << (ed->bInterval - 1)) / 8; 1458 } else 1459 ival = ed->bInterval; 1460 } 1461 err = ehci_device_setintr(sc, sqh, ival); 1462 if (err) 1463 goto bad; 1464 break; 1465 case UE_ISOCHRONOUS: 1466 pipe->methods = &ehci_device_isoc_methods; 1467 /* FALLTHROUGH */ 1468 default: 1469 err = USBD_INVAL; 1470 goto bad; 1471 } 1472 return (USBD_NORMAL_COMPLETION); 1473 1474 bad: 1475 ehci_free_sqh(sc, sqh); 1476 return (err); 1477 } 1478 1479 /* 1480 * Add an ED to the schedule. Called at splusb(). 1481 */ 1482 void 1483 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1484 { 1485 SPLUSBCHECK; 1486 1487 sqh->next = head->next; 1488 sqh->qh.qh_link = head->qh.qh_link; 1489 head->next = sqh; 1490 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1491 1492 #ifdef EHCI_DEBUG 1493 if (ehcidebug > 5) { 1494 printf("ehci_add_qh:\n"); 1495 ehci_dump_sqh(sqh); 1496 } 1497 #endif 1498 } 1499 1500 /* 1501 * Remove an ED from the schedule. Called at splusb(). 1502 */ 1503 void 1504 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1505 { 1506 ehci_soft_qh_t *p; 1507 1508 SPLUSBCHECK; 1509 /* XXX */ 1510 for (p = head; p != NULL && p->next != sqh; p = p->next) 1511 ; 1512 if (p == NULL) 1513 panic("ehci_rem_qh: ED not found"); 1514 p->next = sqh->next; 1515 p->qh.qh_link = sqh->qh.qh_link; 1516 1517 ehci_sync_hc(sc); 1518 } 1519 1520 void 1521 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1522 { 1523 int i; 1524 u_int32_t status; 1525 1526 /* Save toggle bit and ping status. */ 1527 status = sqh->qh.qh_qtd.qtd_status & 1528 htole32(EHCI_QTD_TOGGLE_MASK | 1529 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1530 /* Set HALTED to make hw leave it alone. */ 1531 sqh->qh.qh_qtd.qtd_status = 1532 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1533 sqh->qh.qh_curqtd = 0; 1534 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1535 sqh->qh.qh_qtd.qtd_altnext = 0; 1536 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1537 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1538 sqh->sqtd = sqtd; 1539 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1540 sqh->qh.qh_qtd.qtd_status = status; 1541 } 1542 1543 /* 1544 * Ensure that the HC has released all references to the QH. We do this 1545 * by asking for a Async Advance Doorbell interrupt and then we wait for 1546 * the interrupt. 1547 * To make this easier we first obtain exclusive use of the doorbell. 1548 */ 1549 void 1550 ehci_sync_hc(ehci_softc_t *sc) 1551 { 1552 int s, error; 1553 1554 if (sc->sc_dying) { 1555 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1556 return; 1557 } 1558 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1559 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1560 s = splhardusb(); 1561 /* ask for doorbell */ 1562 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1563 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1564 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1565 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1566 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1567 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1568 splx(s); 1569 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1570 #ifdef DIAGNOSTIC 1571 if (error) 1572 printf("ehci_sync_hc: tsleep() = %d\n", error); 1573 #endif 1574 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1575 } 1576 1577 /***********/ 1578 1579 /* 1580 * Data structures and routines to emulate the root hub. 1581 */ 1582 Static usb_device_descriptor_t ehci_devd = { 1583 USB_DEVICE_DESCRIPTOR_SIZE, 1584 UDESC_DEVICE, /* type */ 1585 {0x00, 0x02}, /* USB version */ 1586 UDCLASS_HUB, /* class */ 1587 UDSUBCLASS_HUB, /* subclass */ 1588 UDPROTO_HSHUBSTT, /* protocol */ 1589 64, /* max packet */ 1590 {0},{0},{0x00,0x01}, /* device id */ 1591 1,2,0, /* string indicies */ 1592 1 /* # of configurations */ 1593 }; 1594 1595 Static usb_device_qualifier_t ehci_odevd = { 1596 USB_DEVICE_DESCRIPTOR_SIZE, 1597 UDESC_DEVICE_QUALIFIER, /* type */ 1598 {0x00, 0x02}, /* USB version */ 1599 UDCLASS_HUB, /* class */ 1600 UDSUBCLASS_HUB, /* subclass */ 1601 UDPROTO_FSHUB, /* protocol */ 1602 64, /* max packet */ 1603 1, /* # of configurations */ 1604 0 1605 }; 1606 1607 Static usb_config_descriptor_t ehci_confd = { 1608 USB_CONFIG_DESCRIPTOR_SIZE, 1609 UDESC_CONFIG, 1610 {USB_CONFIG_DESCRIPTOR_SIZE + 1611 USB_INTERFACE_DESCRIPTOR_SIZE + 1612 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1613 1, 1614 1, 1615 0, 1616 UC_SELF_POWERED, 1617 0 /* max power */ 1618 }; 1619 1620 Static usb_interface_descriptor_t ehci_ifcd = { 1621 USB_INTERFACE_DESCRIPTOR_SIZE, 1622 UDESC_INTERFACE, 1623 0, 1624 0, 1625 1, 1626 UICLASS_HUB, 1627 UISUBCLASS_HUB, 1628 UIPROTO_HSHUBSTT, 1629 0 1630 }; 1631 1632 Static usb_endpoint_descriptor_t ehci_endpd = { 1633 USB_ENDPOINT_DESCRIPTOR_SIZE, 1634 UDESC_ENDPOINT, 1635 UE_DIR_IN | EHCI_INTR_ENDPT, 1636 UE_INTERRUPT, 1637 {8, 0}, /* max packet */ 1638 255 1639 }; 1640 1641 Static usb_hub_descriptor_t ehci_hubd = { 1642 USB_HUB_DESCRIPTOR_SIZE, 1643 UDESC_HUB, 1644 0, 1645 {0,0}, 1646 0, 1647 0, 1648 {""}, 1649 {""}, 1650 }; 1651 1652 Static int 1653 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1654 { 1655 int i; 1656 1657 if (l == 0) 1658 return (0); 1659 p->bLength = 2 * strlen(s) + 2; 1660 if (l == 1) 1661 return (1); 1662 p->bDescriptorType = UDESC_STRING; 1663 l -= 2; 1664 for (i = 0; s[i] && l > 1; i++, l -= 2) 1665 USETW2(p->bString[i], 0, s[i]); 1666 return (2*i+2); 1667 } 1668 1669 /* 1670 * Simulate a hardware hub by handling all the necessary requests. 1671 */ 1672 Static usbd_status 1673 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1674 { 1675 usbd_status err; 1676 1677 /* Insert last in queue. */ 1678 err = usb_insert_transfer(xfer); 1679 if (err) 1680 return (err); 1681 1682 /* Pipe isn't running, start first */ 1683 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1684 } 1685 1686 Static usbd_status 1687 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1688 { 1689 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1690 usb_device_request_t *req; 1691 void *buf = NULL; 1692 int port, i; 1693 int s, len, value, index, l, totlen = 0; 1694 usb_port_status_t ps; 1695 usb_hub_descriptor_t hubd; 1696 usbd_status err; 1697 u_int32_t v; 1698 1699 if (sc->sc_dying) 1700 return (USBD_IOERROR); 1701 1702 #ifdef DIAGNOSTIC 1703 if (!(xfer->rqflags & URQ_REQUEST)) 1704 /* XXX panic */ 1705 return (USBD_INVAL); 1706 #endif 1707 req = &xfer->request; 1708 1709 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1710 req->bmRequestType, req->bRequest)); 1711 1712 len = UGETW(req->wLength); 1713 value = UGETW(req->wValue); 1714 index = UGETW(req->wIndex); 1715 1716 if (len != 0) 1717 buf = KERNADDR(&xfer->dmabuf, 0); 1718 1719 #define C(x,y) ((x) | ((y) << 8)) 1720 switch(C(req->bRequest, req->bmRequestType)) { 1721 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1722 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1723 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1724 /* 1725 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1726 * for the integrated root hub. 1727 */ 1728 break; 1729 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1730 if (len > 0) { 1731 *(u_int8_t *)buf = sc->sc_conf; 1732 totlen = 1; 1733 } 1734 break; 1735 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1736 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1737 if (len == 0) 1738 break; 1739 switch(value >> 8) { 1740 case UDESC_DEVICE: 1741 if ((value & 0xff) != 0) { 1742 err = USBD_IOERROR; 1743 goto ret; 1744 } 1745 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1746 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1747 memcpy(buf, &ehci_devd, l); 1748 break; 1749 /* 1750 * We can't really operate at another speed, but the spec says 1751 * we need this descriptor. 1752 */ 1753 case UDESC_DEVICE_QUALIFIER: 1754 if ((value & 0xff) != 0) { 1755 err = USBD_IOERROR; 1756 goto ret; 1757 } 1758 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1759 memcpy(buf, &ehci_odevd, l); 1760 break; 1761 /* 1762 * We can't really operate at another speed, but the spec says 1763 * we need this descriptor. 1764 */ 1765 case UDESC_OTHER_SPEED_CONFIGURATION: 1766 case UDESC_CONFIG: 1767 if ((value & 0xff) != 0) { 1768 err = USBD_IOERROR; 1769 goto ret; 1770 } 1771 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1772 memcpy(buf, &ehci_confd, l); 1773 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1774 value >> 8; 1775 buf = (char *)buf + l; 1776 len -= l; 1777 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1778 totlen += l; 1779 memcpy(buf, &ehci_ifcd, l); 1780 buf = (char *)buf + l; 1781 len -= l; 1782 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1783 totlen += l; 1784 memcpy(buf, &ehci_endpd, l); 1785 break; 1786 case UDESC_STRING: 1787 *(u_int8_t *)buf = 0; 1788 totlen = 1; 1789 switch (value & 0xff) { 1790 case 0: /* Language table */ 1791 totlen = ehci_str(buf, len, "\001"); 1792 break; 1793 case 1: /* Vendor */ 1794 totlen = ehci_str(buf, len, sc->sc_vendor); 1795 break; 1796 case 2: /* Product */ 1797 totlen = ehci_str(buf, len, "EHCI root hub"); 1798 break; 1799 } 1800 break; 1801 default: 1802 err = USBD_IOERROR; 1803 goto ret; 1804 } 1805 break; 1806 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1807 if (len > 0) { 1808 *(u_int8_t *)buf = 0; 1809 totlen = 1; 1810 } 1811 break; 1812 case C(UR_GET_STATUS, UT_READ_DEVICE): 1813 if (len > 1) { 1814 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1815 totlen = 2; 1816 } 1817 break; 1818 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1819 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1820 if (len > 1) { 1821 USETW(((usb_status_t *)buf)->wStatus, 0); 1822 totlen = 2; 1823 } 1824 break; 1825 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1826 if (value >= USB_MAX_DEVICES) { 1827 err = USBD_IOERROR; 1828 goto ret; 1829 } 1830 sc->sc_addr = value; 1831 break; 1832 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1833 if (value != 0 && value != 1) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 sc->sc_conf = value; 1838 break; 1839 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1840 break; 1841 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1842 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1843 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1844 err = USBD_IOERROR; 1845 goto ret; 1846 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1847 break; 1848 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1849 break; 1850 /* Hub requests */ 1851 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1852 break; 1853 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1854 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1855 "port=%d feature=%d\n", 1856 index, value)); 1857 if (index < 1 || index > sc->sc_noport) { 1858 err = USBD_IOERROR; 1859 goto ret; 1860 } 1861 port = EHCI_PORTSC(index); 1862 v = EOREAD4(sc, port); 1863 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1864 v &= ~EHCI_PS_CLEAR; 1865 switch(value) { 1866 case UHF_PORT_ENABLE: 1867 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1868 break; 1869 case UHF_PORT_SUSPEND: 1870 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1871 break; 1872 case UHF_PORT_POWER: 1873 if (sc->sc_hasppc) 1874 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1875 break; 1876 case UHF_PORT_TEST: 1877 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1878 "%d\n", index)); 1879 break; 1880 case UHF_PORT_INDICATOR: 1881 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1882 "%d\n", index)); 1883 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1884 break; 1885 case UHF_C_PORT_CONNECTION: 1886 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1887 break; 1888 case UHF_C_PORT_ENABLE: 1889 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1890 break; 1891 case UHF_C_PORT_SUSPEND: 1892 /* how? */ 1893 break; 1894 case UHF_C_PORT_OVER_CURRENT: 1895 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1896 break; 1897 case UHF_C_PORT_RESET: 1898 sc->sc_isreset[index] = 0; 1899 break; 1900 default: 1901 err = USBD_IOERROR; 1902 goto ret; 1903 } 1904 #if 0 1905 switch(value) { 1906 case UHF_C_PORT_CONNECTION: 1907 case UHF_C_PORT_ENABLE: 1908 case UHF_C_PORT_SUSPEND: 1909 case UHF_C_PORT_OVER_CURRENT: 1910 case UHF_C_PORT_RESET: 1911 /* Enable RHSC interrupt if condition is cleared. */ 1912 if ((OREAD4(sc, port) >> 16) == 0) 1913 ehci_pcd_able(sc, 1); 1914 break; 1915 default: 1916 break; 1917 } 1918 #endif 1919 break; 1920 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1921 if (len == 0) 1922 break; 1923 if ((value & 0xff) != 0) { 1924 err = USBD_IOERROR; 1925 goto ret; 1926 } 1927 hubd = ehci_hubd; 1928 hubd.bNbrPorts = sc->sc_noport; 1929 v = EOREAD4(sc, EHCI_HCSPARAMS); 1930 USETW(hubd.wHubCharacteristics, 1931 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1932 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1933 ? UHD_PORT_IND : 0); 1934 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1935 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1936 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1937 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1938 l = min(len, hubd.bDescLength); 1939 totlen = l; 1940 memcpy(buf, &hubd, l); 1941 break; 1942 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1943 if (len != 4) { 1944 err = USBD_IOERROR; 1945 goto ret; 1946 } 1947 memset(buf, 0, len); /* ? XXX */ 1948 totlen = len; 1949 break; 1950 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1951 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1952 index)); 1953 if (index < 1 || index > sc->sc_noport) { 1954 err = USBD_IOERROR; 1955 goto ret; 1956 } 1957 if (len != 4) { 1958 err = USBD_IOERROR; 1959 goto ret; 1960 } 1961 v = EOREAD4(sc, EHCI_PORTSC(index)); 1962 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1963 v)); 1964 i = UPS_HIGH_SPEED; 1965 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1966 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1967 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1968 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1969 if (v & EHCI_PS_PR) i |= UPS_RESET; 1970 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1971 USETW(ps.wPortStatus, i); 1972 i = 0; 1973 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1974 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1975 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1976 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1977 USETW(ps.wPortChange, i); 1978 l = min(len, sizeof ps); 1979 memcpy(buf, &ps, l); 1980 totlen = l; 1981 break; 1982 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1983 err = USBD_IOERROR; 1984 goto ret; 1985 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1986 break; 1987 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1988 if (index < 1 || index > sc->sc_noport) { 1989 err = USBD_IOERROR; 1990 goto ret; 1991 } 1992 port = EHCI_PORTSC(index); 1993 v = EOREAD4(sc, port); 1994 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1995 v &= ~EHCI_PS_CLEAR; 1996 switch(value) { 1997 case UHF_PORT_ENABLE: 1998 EOWRITE4(sc, port, v | EHCI_PS_PE); 1999 break; 2000 case UHF_PORT_SUSPEND: 2001 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 2002 break; 2003 case UHF_PORT_RESET: 2004 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 2005 index)); 2006 if (EHCI_PS_IS_LOWSPEED(v)) { 2007 /* Low speed device, give up ownership. */ 2008 ehci_disown(sc, index, 1); 2009 break; 2010 } 2011 /* Start reset sequence. */ 2012 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2013 EOWRITE4(sc, port, v | EHCI_PS_PR); 2014 /* Wait for reset to complete. */ 2015 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2016 if (sc->sc_dying) { 2017 err = USBD_IOERROR; 2018 goto ret; 2019 } 2020 /* Terminate reset sequence. */ 2021 EOWRITE4(sc, port, v); 2022 /* Wait for HC to complete reset. */ 2023 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2024 if (sc->sc_dying) { 2025 err = USBD_IOERROR; 2026 goto ret; 2027 } 2028 v = EOREAD4(sc, port); 2029 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2030 if (v & EHCI_PS_PR) { 2031 printf("%s: port reset timeout\n", 2032 USBDEVNAME(sc->sc_bus.bdev)); 2033 return (USBD_TIMEOUT); 2034 } 2035 if (!(v & EHCI_PS_PE)) { 2036 /* Not a high speed device, give up ownership.*/ 2037 ehci_disown(sc, index, 0); 2038 break; 2039 } 2040 sc->sc_isreset[index] = 1; 2041 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2042 index, v)); 2043 break; 2044 case UHF_PORT_POWER: 2045 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2046 "%d (has PPC = %d)\n", index, 2047 sc->sc_hasppc)); 2048 if (sc->sc_hasppc) 2049 EOWRITE4(sc, port, v | EHCI_PS_PP); 2050 break; 2051 case UHF_PORT_TEST: 2052 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2053 "%d\n", index)); 2054 break; 2055 case UHF_PORT_INDICATOR: 2056 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2057 "%d\n", index)); 2058 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2059 break; 2060 default: 2061 err = USBD_IOERROR; 2062 goto ret; 2063 } 2064 break; 2065 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2066 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2067 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2068 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2069 break; 2070 default: 2071 err = USBD_IOERROR; 2072 goto ret; 2073 } 2074 xfer->actlen = totlen; 2075 err = USBD_NORMAL_COMPLETION; 2076 ret: 2077 xfer->status = err; 2078 s = splusb(); 2079 usb_transfer_complete(xfer); 2080 splx(s); 2081 return (USBD_IN_PROGRESS); 2082 } 2083 2084 void 2085 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2086 { 2087 int port; 2088 u_int32_t v; 2089 2090 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2091 #ifdef DIAGNOSTIC 2092 if (sc->sc_npcomp != 0) { 2093 int i = (index-1) / sc->sc_npcomp; 2094 if (i >= sc->sc_ncomp) 2095 printf("%s: strange port\n", 2096 USBDEVNAME(sc->sc_bus.bdev)); 2097 else 2098 printf("%s: handing over %s speed device on " 2099 "port %d to %s\n", 2100 USBDEVNAME(sc->sc_bus.bdev), 2101 lowspeed ? "low" : "full", 2102 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2103 } else { 2104 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2105 } 2106 #endif 2107 port = EHCI_PORTSC(index); 2108 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2109 EOWRITE4(sc, port, v | EHCI_PS_PO); 2110 } 2111 2112 /* Abort a root control request. */ 2113 Static void 2114 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2115 { 2116 /* Nothing to do, all transfers are synchronous. */ 2117 } 2118 2119 /* Close the root pipe. */ 2120 Static void 2121 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2122 { 2123 DPRINTF(("ehci_root_ctrl_close\n")); 2124 /* Nothing to do. */ 2125 } 2126 2127 void 2128 ehci_root_intr_done(usbd_xfer_handle xfer) 2129 { 2130 xfer->hcpriv = NULL; 2131 } 2132 2133 Static usbd_status 2134 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2135 { 2136 usbd_status err; 2137 2138 /* Insert last in queue. */ 2139 err = usb_insert_transfer(xfer); 2140 if (err) 2141 return (err); 2142 2143 /* Pipe isn't running, start first */ 2144 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2145 } 2146 2147 Static usbd_status 2148 ehci_root_intr_start(usbd_xfer_handle xfer) 2149 { 2150 usbd_pipe_handle pipe = xfer->pipe; 2151 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2152 2153 if (sc->sc_dying) 2154 return (USBD_IOERROR); 2155 2156 sc->sc_intrxfer = xfer; 2157 2158 return (USBD_IN_PROGRESS); 2159 } 2160 2161 /* Abort a root interrupt request. */ 2162 Static void 2163 ehci_root_intr_abort(usbd_xfer_handle xfer) 2164 { 2165 int s; 2166 2167 if (xfer->pipe->intrxfer == xfer) { 2168 DPRINTF(("ehci_root_intr_abort: remove\n")); 2169 xfer->pipe->intrxfer = NULL; 2170 } 2171 xfer->status = USBD_CANCELLED; 2172 s = splusb(); 2173 usb_transfer_complete(xfer); 2174 splx(s); 2175 } 2176 2177 /* Close the root pipe. */ 2178 Static void 2179 ehci_root_intr_close(usbd_pipe_handle pipe) 2180 { 2181 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2182 2183 DPRINTF(("ehci_root_intr_close\n")); 2184 2185 sc->sc_intrxfer = NULL; 2186 } 2187 2188 void 2189 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2190 { 2191 xfer->hcpriv = NULL; 2192 } 2193 2194 /************************/ 2195 2196 ehci_soft_qh_t * 2197 ehci_alloc_sqh(ehci_softc_t *sc) 2198 { 2199 ehci_soft_qh_t *sqh; 2200 usbd_status err; 2201 int i, offs; 2202 usb_dma_t dma; 2203 2204 if (sc->sc_freeqhs == NULL) { 2205 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2206 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2207 EHCI_PAGE_SIZE, &dma); 2208 #ifdef EHCI_DEBUG 2209 if (err) 2210 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2211 #endif 2212 if (err) 2213 return (NULL); 2214 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2215 offs = i * EHCI_SQH_SIZE; 2216 sqh = KERNADDR(&dma, offs); 2217 sqh->physaddr = DMAADDR(&dma, offs); 2218 sqh->next = sc->sc_freeqhs; 2219 sc->sc_freeqhs = sqh; 2220 } 2221 } 2222 sqh = sc->sc_freeqhs; 2223 sc->sc_freeqhs = sqh->next; 2224 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2225 sqh->next = NULL; 2226 return (sqh); 2227 } 2228 2229 void 2230 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2231 { 2232 sqh->next = sc->sc_freeqhs; 2233 sc->sc_freeqhs = sqh; 2234 } 2235 2236 ehci_soft_qtd_t * 2237 ehci_alloc_sqtd(ehci_softc_t *sc) 2238 { 2239 ehci_soft_qtd_t *sqtd; 2240 usbd_status err; 2241 int i, offs; 2242 usb_dma_t dma; 2243 int s; 2244 2245 if (sc->sc_freeqtds == NULL) { 2246 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2247 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2248 EHCI_PAGE_SIZE, &dma); 2249 #ifdef EHCI_DEBUG 2250 if (err) 2251 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2252 #endif 2253 if (err) 2254 return (NULL); 2255 s = splusb(); 2256 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2257 offs = i * EHCI_SQTD_SIZE; 2258 sqtd = KERNADDR(&dma, offs); 2259 sqtd->physaddr = DMAADDR(&dma, offs); 2260 sqtd->nextqtd = sc->sc_freeqtds; 2261 sc->sc_freeqtds = sqtd; 2262 } 2263 splx(s); 2264 } 2265 2266 s = splusb(); 2267 sqtd = sc->sc_freeqtds; 2268 sc->sc_freeqtds = sqtd->nextqtd; 2269 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2270 sqtd->nextqtd = NULL; 2271 sqtd->xfer = NULL; 2272 splx(s); 2273 2274 return (sqtd); 2275 } 2276 2277 void 2278 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2279 { 2280 int s; 2281 2282 s = splusb(); 2283 sqtd->nextqtd = sc->sc_freeqtds; 2284 sc->sc_freeqtds = sqtd; 2285 splx(s); 2286 } 2287 2288 usbd_status 2289 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2290 int alen, int rd, usbd_xfer_handle xfer, 2291 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2292 { 2293 ehci_soft_qtd_t *next, *cur; 2294 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2295 u_int32_t qtdstatus; 2296 int len, curlen, mps; 2297 int i, tog; 2298 usb_dma_t *dma = &xfer->dmabuf; 2299 u_int16_t flags = xfer->flags; 2300 2301 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2302 2303 len = alen; 2304 dataphys = DMAADDR(dma, 0); 2305 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2306 qtdstatus = EHCI_QTD_ACTIVE | 2307 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2308 EHCI_QTD_SET_CERR(3) 2309 /* IOC set below */ 2310 /* BYTES set below */ 2311 ; 2312 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2313 tog = epipe->nexttoggle; 2314 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2315 2316 cur = ehci_alloc_sqtd(sc); 2317 *sp = cur; 2318 if (cur == NULL) 2319 goto nomem; 2320 for (;;) { 2321 dataphyspage = EHCI_PAGE(dataphys); 2322 /* The EHCI hardware can handle at most 5 pages. */ 2323 if (dataphyslastpage - dataphyspage < 2324 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2325 /* we can handle it in this QTD */ 2326 curlen = len; 2327 } else { 2328 /* must use multiple TDs, fill as much as possible. */ 2329 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2330 EHCI_PAGE_OFFSET(dataphys); 2331 #ifdef DIAGNOSTIC 2332 if (curlen > len) { 2333 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2334 "len=0x%x offs=0x%x\n", curlen, len, 2335 EHCI_PAGE_OFFSET(dataphys)); 2336 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2337 dataphyslastpage, dataphyspage, 2338 dataphys); 2339 curlen = len; 2340 } 2341 #endif 2342 /* the length must be a multiple of the max size */ 2343 curlen -= curlen % mps; 2344 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2345 "curlen=%d\n", curlen)); 2346 #ifdef DIAGNOSTIC 2347 if (curlen == 0) 2348 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2349 #endif 2350 } 2351 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2352 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2353 dataphys, dataphyslastpage, 2354 len, curlen)); 2355 len -= curlen; 2356 2357 /* 2358 * Allocate another transfer if there's more data left, 2359 * or if force last short transfer flag is set and we're 2360 * allocating a multiple of the max packet size. 2361 */ 2362 if (len != 0 || 2363 ((curlen % mps) == 0 && !rd && curlen != 0 && 2364 (flags & USBD_FORCE_SHORT_XFER))) { 2365 next = ehci_alloc_sqtd(sc); 2366 if (next == NULL) 2367 goto nomem; 2368 nextphys = htole32(next->physaddr); 2369 } else { 2370 next = NULL; 2371 nextphys = EHCI_NULL; 2372 } 2373 2374 for (i = 0; i * EHCI_PAGE_SIZE < 2375 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2376 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2377 if (i != 0) /* use offset only in first buffer */ 2378 a = EHCI_PAGE(a); 2379 cur->qtd.qtd_buffer[i] = htole32(a); 2380 cur->qtd.qtd_buffer_hi[i] = 0; 2381 #ifdef DIAGNOSTIC 2382 if (i >= EHCI_QTD_NBUFFERS) { 2383 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2384 goto nomem; 2385 } 2386 #endif 2387 } 2388 cur->nextqtd = next; 2389 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2390 cur->qtd.qtd_status = 2391 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2392 cur->xfer = xfer; 2393 cur->len = curlen; 2394 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2395 dataphys, dataphys + curlen)); 2396 /* adjust the toggle based on the number of packets in this 2397 qtd */ 2398 if (((curlen + mps - 1) / mps) & 1) { 2399 tog ^= 1; 2400 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2401 } 2402 if (next == NULL) 2403 break; 2404 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2405 dataphys += curlen; 2406 cur = next; 2407 } 2408 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2409 *ep = cur; 2410 epipe->nexttoggle = tog; 2411 2412 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2413 *sp, *ep)); 2414 2415 return (USBD_NORMAL_COMPLETION); 2416 2417 nomem: 2418 /* XXX free chain */ 2419 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2420 return (USBD_NOMEM); 2421 } 2422 2423 Static void 2424 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2425 ehci_soft_qtd_t *sqtdend) 2426 { 2427 ehci_soft_qtd_t *p; 2428 int i; 2429 2430 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2431 sqtd, sqtdend)); 2432 2433 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2434 p = sqtd->nextqtd; 2435 ehci_free_sqtd(sc, sqtd); 2436 } 2437 } 2438 2439 /****************/ 2440 2441 /* 2442 * Close a reqular pipe. 2443 * Assumes that there are no pending transactions. 2444 */ 2445 void 2446 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2447 { 2448 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2449 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2450 ehci_soft_qh_t *sqh = epipe->sqh; 2451 int s; 2452 2453 s = splusb(); 2454 ehci_rem_qh(sc, sqh, head); 2455 splx(s); 2456 ehci_free_sqh(sc, epipe->sqh); 2457 } 2458 2459 /* 2460 * Abort a device request. 2461 * If this routine is called at splusb() it guarantees that the request 2462 * will be removed from the hardware scheduling and that the callback 2463 * for it will be called with USBD_CANCELLED status. 2464 * It's impossible to guarantee that the requested transfer will not 2465 * have happened since the hardware runs concurrently. 2466 * If the transaction has already happened we rely on the ordinary 2467 * interrupt processing to process it. 2468 * XXX This is most probably wrong. 2469 */ 2470 void 2471 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2472 { 2473 #define exfer EXFER(xfer) 2474 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2475 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2476 ehci_soft_qh_t *sqh = epipe->sqh; 2477 ehci_soft_qtd_t *sqtd; 2478 ehci_physaddr_t cur; 2479 u_int32_t qhstatus; 2480 int s; 2481 int hit; 2482 int wake; 2483 2484 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2485 2486 if (sc->sc_dying) { 2487 /* If we're dying, just do the software part. */ 2488 s = splusb(); 2489 xfer->status = status; /* make software ignore it */ 2490 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2491 usb_transfer_complete(xfer); 2492 splx(s); 2493 return; 2494 } 2495 2496 if (xfer->device->bus->intr_context || !curproc) 2497 panic("ehci_abort_xfer: not in process context"); 2498 2499 /* 2500 * If an abort is already in progress then just wait for it to 2501 * complete and return. 2502 */ 2503 if (xfer->hcflags & UXFER_ABORTING) { 2504 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2505 #ifdef DIAGNOSTIC 2506 if (status == USBD_TIMEOUT) 2507 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2508 #endif 2509 /* Override the status which might be USBD_TIMEOUT. */ 2510 xfer->status = status; 2511 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2512 xfer->hcflags |= UXFER_ABORTWAIT; 2513 while (xfer->hcflags & UXFER_ABORTING) 2514 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2515 return; 2516 } 2517 xfer->hcflags |= UXFER_ABORTING; 2518 2519 /* 2520 * Step 1: Make interrupt routine and hardware ignore xfer. 2521 */ 2522 s = splusb(); 2523 xfer->status = status; /* make software ignore it */ 2524 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2525 qhstatus = sqh->qh.qh_qtd.qtd_status; 2526 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2527 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2528 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2529 if (sqtd == exfer->sqtdend) 2530 break; 2531 } 2532 splx(s); 2533 2534 /* 2535 * Step 2: Wait until we know hardware has finished any possible 2536 * use of the xfer. Also make sure the soft interrupt routine 2537 * has run. 2538 */ 2539 ehci_sync_hc(sc); 2540 s = splusb(); 2541 #ifdef USB_USE_SOFTINTR 2542 sc->sc_softwake = 1; 2543 #endif /* USB_USE_SOFTINTR */ 2544 usb_schedsoftintr(&sc->sc_bus); 2545 #ifdef USB_USE_SOFTINTR 2546 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2547 #endif /* USB_USE_SOFTINTR */ 2548 splx(s); 2549 2550 /* 2551 * Step 3: Remove any vestiges of the xfer from the hardware. 2552 * The complication here is that the hardware may have executed 2553 * beyond the xfer we're trying to abort. So as we're scanning 2554 * the TDs of this xfer we check if the hardware points to 2555 * any of them. 2556 */ 2557 s = splusb(); /* XXX why? */ 2558 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2559 hit = 0; 2560 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2561 hit |= cur == sqtd->physaddr; 2562 if (sqtd == exfer->sqtdend) 2563 break; 2564 } 2565 sqtd = sqtd->nextqtd; 2566 /* Zap curqtd register if hardware pointed inside the xfer. */ 2567 if (hit && sqtd != NULL) { 2568 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2569 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2570 sqh->qh.qh_qtd.qtd_status = qhstatus; 2571 } else { 2572 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2573 } 2574 2575 /* 2576 * Step 4: Execute callback. 2577 */ 2578 #ifdef DIAGNOSTIC 2579 exfer->isdone = 1; 2580 #endif 2581 wake = xfer->hcflags & UXFER_ABORTWAIT; 2582 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2583 usb_transfer_complete(xfer); 2584 if (wake) 2585 wakeup(&xfer->hcflags); 2586 2587 splx(s); 2588 #undef exfer 2589 } 2590 2591 void 2592 ehci_timeout(void *addr) 2593 { 2594 struct ehci_xfer *exfer = addr; 2595 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2596 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2597 2598 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2599 #ifdef USB_DEBUG 2600 if (ehcidebug > 1) 2601 usbd_dump_pipe(exfer->xfer.pipe); 2602 #endif 2603 2604 if (sc->sc_dying) { 2605 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2606 return; 2607 } 2608 2609 /* Execute the abort in a process context. */ 2610 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2611 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2612 USB_TASKQ_HC); 2613 } 2614 2615 void 2616 ehci_timeout_task(void *addr) 2617 { 2618 usbd_xfer_handle xfer = addr; 2619 int s; 2620 2621 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2622 2623 s = splusb(); 2624 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2625 splx(s); 2626 } 2627 2628 /************************/ 2629 2630 Static usbd_status 2631 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2632 { 2633 usbd_status err; 2634 2635 /* Insert last in queue. */ 2636 err = usb_insert_transfer(xfer); 2637 if (err) 2638 return (err); 2639 2640 /* Pipe isn't running, start first */ 2641 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2642 } 2643 2644 Static usbd_status 2645 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2646 { 2647 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2648 usbd_status err; 2649 2650 if (sc->sc_dying) 2651 return (USBD_IOERROR); 2652 2653 #ifdef DIAGNOSTIC 2654 if (!(xfer->rqflags & URQ_REQUEST)) { 2655 /* XXX panic */ 2656 printf("ehci_device_ctrl_transfer: not a request\n"); 2657 return (USBD_INVAL); 2658 } 2659 #endif 2660 2661 err = ehci_device_request(xfer); 2662 if (err) 2663 return (err); 2664 2665 if (sc->sc_bus.use_polling) 2666 ehci_waitintr(sc, xfer); 2667 return (USBD_IN_PROGRESS); 2668 } 2669 2670 void 2671 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2672 { 2673 struct ehci_xfer *ex = EXFER(xfer); 2674 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2675 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2676 2677 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2678 2679 #ifdef DIAGNOSTIC 2680 if (!(xfer->rqflags & URQ_REQUEST)) { 2681 panic("ehci_ctrl_done: not a request"); 2682 } 2683 #endif 2684 2685 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2686 ehci_del_intr_list(ex); /* remove from active list */ 2687 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2688 } 2689 2690 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2691 } 2692 2693 /* Abort a device control request. */ 2694 Static void 2695 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2696 { 2697 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2698 ehci_abort_xfer(xfer, USBD_CANCELLED); 2699 } 2700 2701 /* Close a device control pipe. */ 2702 Static void 2703 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2704 { 2705 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2706 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2707 2708 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2709 ehci_close_pipe(pipe, sc->sc_async_head); 2710 } 2711 2712 usbd_status 2713 ehci_device_request(usbd_xfer_handle xfer) 2714 { 2715 #define exfer EXFER(xfer) 2716 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2717 usb_device_request_t *req = &xfer->request; 2718 usbd_device_handle dev = epipe->pipe.device; 2719 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2720 int addr = dev->address; 2721 ehci_soft_qtd_t *setup, *stat, *next; 2722 ehci_soft_qh_t *sqh; 2723 int isread; 2724 int len; 2725 usbd_status err; 2726 int s; 2727 2728 isread = req->bmRequestType & UT_READ; 2729 len = UGETW(req->wLength); 2730 2731 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2732 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2733 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2734 UGETW(req->wIndex), len, addr, 2735 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2736 2737 setup = ehci_alloc_sqtd(sc); 2738 if (setup == NULL) { 2739 err = USBD_NOMEM; 2740 goto bad1; 2741 } 2742 stat = ehci_alloc_sqtd(sc); 2743 if (stat == NULL) { 2744 err = USBD_NOMEM; 2745 goto bad2; 2746 } 2747 2748 sqh = epipe->sqh; 2749 epipe->u.ctl.length = len; 2750 2751 /* Update device address and length since they may have changed 2752 during the setup of the control pipe in usbd_new_device(). */ 2753 /* XXX This only needs to be done once, but it's too early in open. */ 2754 /* XXXX Should not touch ED here! */ 2755 sqh->qh.qh_endp = 2756 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2757 htole32( 2758 EHCI_QH_SET_ADDR(addr) | 2759 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2760 ); 2761 2762 /* Set up data transaction */ 2763 if (len != 0) { 2764 ehci_soft_qtd_t *end; 2765 2766 /* Start toggle at 1. */ 2767 epipe->nexttoggle = 1; 2768 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2769 &next, &end); 2770 if (err) 2771 goto bad3; 2772 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2773 end->nextqtd = stat; 2774 end->qtd.qtd_next = 2775 end->qtd.qtd_altnext = htole32(stat->physaddr); 2776 } else { 2777 next = stat; 2778 } 2779 2780 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2781 2782 /* Clear toggle */ 2783 setup->qtd.qtd_status = htole32( 2784 EHCI_QTD_ACTIVE | 2785 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2786 EHCI_QTD_SET_CERR(3) | 2787 EHCI_QTD_SET_TOGGLE(0) | 2788 EHCI_QTD_SET_BYTES(sizeof *req) 2789 ); 2790 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2791 setup->qtd.qtd_buffer_hi[0] = 0; 2792 setup->nextqtd = next; 2793 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2794 setup->xfer = xfer; 2795 setup->len = sizeof *req; 2796 2797 stat->qtd.qtd_status = htole32( 2798 EHCI_QTD_ACTIVE | 2799 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2800 EHCI_QTD_SET_CERR(3) | 2801 EHCI_QTD_SET_TOGGLE(1) | 2802 EHCI_QTD_IOC 2803 ); 2804 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2805 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2806 stat->nextqtd = NULL; 2807 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2808 stat->xfer = xfer; 2809 stat->len = 0; 2810 2811 #ifdef EHCI_DEBUG 2812 if (ehcidebug > 5) { 2813 DPRINTF(("ehci_device_request:\n")); 2814 ehci_dump_sqh(sqh); 2815 ehci_dump_sqtds(setup); 2816 } 2817 #endif 2818 2819 exfer->sqtdstart = setup; 2820 exfer->sqtdend = stat; 2821 #ifdef DIAGNOSTIC 2822 if (!exfer->isdone) { 2823 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2824 } 2825 exfer->isdone = 0; 2826 #endif 2827 2828 /* Insert qTD in QH list. */ 2829 s = splusb(); 2830 ehci_set_qh_qtd(sqh, setup); 2831 if (xfer->timeout && !sc->sc_bus.use_polling) { 2832 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2833 ehci_timeout, xfer); 2834 } 2835 ehci_add_intr_list(sc, exfer); 2836 xfer->status = USBD_IN_PROGRESS; 2837 splx(s); 2838 2839 #ifdef EHCI_DEBUG 2840 if (ehcidebug > 10) { 2841 DPRINTF(("ehci_device_request: status=%x\n", 2842 EOREAD4(sc, EHCI_USBSTS))); 2843 delay(10000); 2844 ehci_dump_regs(sc); 2845 ehci_dump_sqh(sc->sc_async_head); 2846 ehci_dump_sqh(sqh); 2847 ehci_dump_sqtds(setup); 2848 } 2849 #endif 2850 2851 return (USBD_NORMAL_COMPLETION); 2852 2853 bad3: 2854 ehci_free_sqtd(sc, stat); 2855 bad2: 2856 ehci_free_sqtd(sc, setup); 2857 bad1: 2858 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2859 xfer->status = err; 2860 usb_transfer_complete(xfer); 2861 return (err); 2862 #undef exfer 2863 } 2864 2865 /* 2866 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2867 * qTD status, or miss signalling occasionally under heavy load. If the host 2868 * machine is too fast, we we can miss transaction completion - when we scan 2869 * the active list the transaction still seems to be active. This generally 2870 * exhibits itself as a umass stall that never recovers. 2871 * 2872 * We work around this behaviour by setting up this callback after any softintr 2873 * that completes with transactions still pending, giving us another chance to 2874 * check for completion after the writeback has taken place. 2875 */ 2876 void 2877 ehci_intrlist_timeout(void *arg) 2878 { 2879 ehci_softc_t *sc = arg; 2880 int s = splusb(); 2881 2882 DPRINTF(("ehci_intrlist_timeout\n")); 2883 usb_schedsoftintr(&sc->sc_bus); 2884 2885 splx(s); 2886 } 2887 2888 /************************/ 2889 2890 Static usbd_status 2891 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2892 { 2893 usbd_status err; 2894 2895 /* Insert last in queue. */ 2896 err = usb_insert_transfer(xfer); 2897 if (err) 2898 return (err); 2899 2900 /* Pipe isn't running, start first */ 2901 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2902 } 2903 2904 usbd_status 2905 ehci_device_bulk_start(usbd_xfer_handle xfer) 2906 { 2907 #define exfer EXFER(xfer) 2908 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2909 usbd_device_handle dev = epipe->pipe.device; 2910 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2911 ehci_soft_qtd_t *data, *dataend; 2912 ehci_soft_qh_t *sqh; 2913 usbd_status err; 2914 int len, isread, endpt; 2915 int s; 2916 2917 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2918 xfer, xfer->length, xfer->flags)); 2919 2920 if (sc->sc_dying) 2921 return (USBD_IOERROR); 2922 2923 #ifdef DIAGNOSTIC 2924 if (xfer->rqflags & URQ_REQUEST) 2925 panic("ehci_device_bulk_start: a request"); 2926 #endif 2927 2928 len = xfer->length; 2929 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2930 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2931 sqh = epipe->sqh; 2932 2933 epipe->u.bulk.length = len; 2934 2935 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2936 &dataend); 2937 if (err) { 2938 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2939 xfer->status = err; 2940 usb_transfer_complete(xfer); 2941 return (err); 2942 } 2943 2944 #ifdef EHCI_DEBUG 2945 if (ehcidebug > 5) { 2946 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2947 ehci_dump_sqh(sqh); 2948 ehci_dump_sqtds(data); 2949 } 2950 #endif 2951 2952 /* Set up interrupt info. */ 2953 exfer->sqtdstart = data; 2954 exfer->sqtdend = dataend; 2955 #ifdef DIAGNOSTIC 2956 if (!exfer->isdone) { 2957 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2958 } 2959 exfer->isdone = 0; 2960 #endif 2961 2962 s = splusb(); 2963 ehci_set_qh_qtd(sqh, data); 2964 if (xfer->timeout && !sc->sc_bus.use_polling) { 2965 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2966 ehci_timeout, xfer); 2967 } 2968 ehci_add_intr_list(sc, exfer); 2969 xfer->status = USBD_IN_PROGRESS; 2970 splx(s); 2971 2972 #ifdef EHCI_DEBUG 2973 if (ehcidebug > 10) { 2974 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2975 delay(10000); 2976 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2977 ehci_dump_regs(sc); 2978 #if 0 2979 printf("async_head:\n"); 2980 ehci_dump_sqh(sc->sc_async_head); 2981 #endif 2982 printf("sqh:\n"); 2983 ehci_dump_sqh(sqh); 2984 ehci_dump_sqtds(data); 2985 } 2986 #endif 2987 2988 if (sc->sc_bus.use_polling) 2989 ehci_waitintr(sc, xfer); 2990 2991 return (USBD_IN_PROGRESS); 2992 #undef exfer 2993 } 2994 2995 Static void 2996 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2997 { 2998 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2999 ehci_abort_xfer(xfer, USBD_CANCELLED); 3000 } 3001 3002 /* 3003 * Close a device bulk pipe. 3004 */ 3005 Static void 3006 ehci_device_bulk_close(usbd_pipe_handle pipe) 3007 { 3008 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3009 3010 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3011 ehci_close_pipe(pipe, sc->sc_async_head); 3012 } 3013 3014 void 3015 ehci_device_bulk_done(usbd_xfer_handle xfer) 3016 { 3017 struct ehci_xfer *ex = EXFER(xfer); 3018 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3019 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3020 3021 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3022 xfer, xfer->actlen)); 3023 3024 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3025 ehci_del_intr_list(ex); /* remove from active list */ 3026 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3027 } 3028 3029 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3030 } 3031 3032 /************************/ 3033 3034 Static usbd_status 3035 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3036 { 3037 struct ehci_soft_islot *isp; 3038 int islot, lev; 3039 3040 /* Find a poll rate that is large enough. */ 3041 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3042 if (EHCI_ILEV_IVAL(lev) <= ival) 3043 break; 3044 3045 /* Pick an interrupt slot at the right level. */ 3046 /* XXX could do better than picking at random */ 3047 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3048 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3049 3050 sqh->islot = islot; 3051 isp = &sc->sc_islots[islot]; 3052 ehci_add_qh(sqh, isp->sqh); 3053 3054 return (USBD_NORMAL_COMPLETION); 3055 } 3056 3057 Static usbd_status 3058 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3059 { 3060 usbd_status err; 3061 3062 /* Insert last in queue. */ 3063 err = usb_insert_transfer(xfer); 3064 if (err) 3065 return (err); 3066 3067 /* 3068 * Pipe isn't running (otherwise err would be USBD_INPROG), 3069 * so start it first. 3070 */ 3071 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3072 } 3073 3074 Static usbd_status 3075 ehci_device_intr_start(usbd_xfer_handle xfer) 3076 { 3077 #define exfer EXFER(xfer) 3078 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3079 usbd_device_handle dev = xfer->pipe->device; 3080 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3081 ehci_soft_qtd_t *data, *dataend; 3082 ehci_soft_qh_t *sqh; 3083 usbd_status err; 3084 int len, isread, endpt; 3085 int s; 3086 3087 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3088 xfer, xfer->length, xfer->flags)); 3089 3090 if (sc->sc_dying) 3091 return (USBD_IOERROR); 3092 3093 #ifdef DIAGNOSTIC 3094 if (xfer->rqflags & URQ_REQUEST) 3095 panic("ehci_device_intr_start: a request"); 3096 #endif 3097 3098 len = xfer->length; 3099 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3100 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3101 sqh = epipe->sqh; 3102 3103 epipe->u.intr.length = len; 3104 3105 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3106 &dataend); 3107 if (err) { 3108 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3109 xfer->status = err; 3110 usb_transfer_complete(xfer); 3111 return (err); 3112 } 3113 3114 #ifdef EHCI_DEBUG 3115 if (ehcidebug > 5) { 3116 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3117 ehci_dump_sqh(sqh); 3118 ehci_dump_sqtds(data); 3119 } 3120 #endif 3121 3122 /* Set up interrupt info. */ 3123 exfer->sqtdstart = data; 3124 exfer->sqtdend = dataend; 3125 #ifdef DIAGNOSTIC 3126 if (!exfer->isdone) { 3127 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3128 } 3129 exfer->isdone = 0; 3130 #endif 3131 3132 s = splusb(); 3133 ehci_set_qh_qtd(sqh, data); 3134 if (xfer->timeout && !sc->sc_bus.use_polling) { 3135 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3136 ehci_timeout, xfer); 3137 } 3138 ehci_add_intr_list(sc, exfer); 3139 xfer->status = USBD_IN_PROGRESS; 3140 splx(s); 3141 3142 #ifdef EHCI_DEBUG 3143 if (ehcidebug > 10) { 3144 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3145 delay(10000); 3146 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3147 ehci_dump_regs(sc); 3148 printf("sqh:\n"); 3149 ehci_dump_sqh(sqh); 3150 ehci_dump_sqtds(data); 3151 } 3152 #endif 3153 3154 if (sc->sc_bus.use_polling) 3155 ehci_waitintr(sc, xfer); 3156 3157 return (USBD_IN_PROGRESS); 3158 #undef exfer 3159 } 3160 3161 Static void 3162 ehci_device_intr_abort(usbd_xfer_handle xfer) 3163 { 3164 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3165 if (xfer->pipe->intrxfer == xfer) { 3166 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3167 xfer->pipe->intrxfer = NULL; 3168 } 3169 ehci_abort_xfer(xfer, USBD_CANCELLED); 3170 } 3171 3172 Static void 3173 ehci_device_intr_close(usbd_pipe_handle pipe) 3174 { 3175 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3176 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3177 struct ehci_soft_islot *isp; 3178 3179 isp = &sc->sc_islots[epipe->sqh->islot]; 3180 ehci_close_pipe(pipe, isp->sqh); 3181 } 3182 3183 Static void 3184 ehci_device_intr_done(usbd_xfer_handle xfer) 3185 { 3186 #define exfer EXFER(xfer) 3187 struct ehci_xfer *ex = EXFER(xfer); 3188 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3189 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3190 ehci_soft_qtd_t *data, *dataend; 3191 ehci_soft_qh_t *sqh; 3192 usbd_status err; 3193 int len, isread, endpt, s; 3194 3195 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3196 xfer, xfer->actlen)); 3197 3198 if (xfer->pipe->repeat) { 3199 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3200 3201 len = epipe->u.intr.length; 3202 xfer->length = len; 3203 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3204 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3205 sqh = epipe->sqh; 3206 3207 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3208 &data, &dataend); 3209 if (err) { 3210 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3211 xfer->status = err; 3212 return; 3213 } 3214 3215 /* Set up interrupt info. */ 3216 exfer->sqtdstart = data; 3217 exfer->sqtdend = dataend; 3218 #ifdef DIAGNOSTIC 3219 if (!exfer->isdone) { 3220 printf("ehci_device_intr_done: not done, ex=%p\n", 3221 exfer); 3222 } 3223 exfer->isdone = 0; 3224 #endif 3225 3226 s = splusb(); 3227 ehci_set_qh_qtd(sqh, data); 3228 if (xfer->timeout && !sc->sc_bus.use_polling) { 3229 usb_callout(xfer->timeout_handle, 3230 mstohz(xfer->timeout), ehci_timeout, xfer); 3231 } 3232 splx(s); 3233 3234 xfer->status = USBD_IN_PROGRESS; 3235 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3236 ehci_del_intr_list(ex); /* remove from active list */ 3237 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3238 } 3239 #undef exfer 3240 } 3241 3242 /************************/ 3243 3244 Static usbd_status 3245 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3246 { 3247 return USBD_IOERROR; 3248 } 3249 Static usbd_status 3250 ehci_device_isoc_start(usbd_xfer_handle xfer) 3251 { 3252 return USBD_IOERROR; 3253 } 3254 Static void 3255 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3256 { 3257 } 3258 Static void 3259 ehci_device_isoc_close(usbd_pipe_handle pipe) 3260 { 3261 } 3262 Static void 3263 ehci_device_isoc_done(usbd_xfer_handle xfer) 3264 { 3265 } 3266
Indexes created Tue Sep 23 14:10:03 GMT 2025