ehci.c revision 1.120
1 /* $NetBSD: ehci.c,v 1.120 2007/01/19 22:46:21 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.120 2007/01/19 22:46:21 drochner Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 Static void ehci_power(int, void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_disown(ehci_softc_t *, int, int); 192 193 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 194 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 195 196 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 197 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 198 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 199 ehci_softc_t *, int, int, usbd_xfer_handle, 200 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 201 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 202 ehci_soft_qtd_t *); 203 204 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 205 206 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 207 int ival); 208 209 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 210 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 211 ehci_soft_qh_t *); 212 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 213 Static void ehci_sync_hc(ehci_softc_t *); 214 215 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 216 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 217 218 #ifdef EHCI_DEBUG 219 Static void ehci_dump_regs(ehci_softc_t *); 220 void ehci_dump(void); 221 Static ehci_softc_t *theehci; 222 Static void ehci_dump_link(ehci_link_t, int); 223 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 224 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 225 Static void ehci_dump_qtd(ehci_qtd_t *); 226 Static void ehci_dump_sqh(ehci_soft_qh_t *); 227 #ifdef DIAGNOSTIC 228 Static void ehci_dump_exfer(struct ehci_xfer *); 229 #endif 230 #endif 231 232 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 233 234 #define EHCI_INTR_ENDPT 1 235 236 #define ehci_add_intr_list(sc, ex) \ 237 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 238 #define ehci_del_intr_list(ex) \ 239 do { \ 240 LIST_REMOVE((ex), inext); \ 241 (ex)->inext.le_prev = NULL; \ 242 } while (0) 243 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 244 245 Static struct usbd_bus_methods ehci_bus_methods = { 246 ehci_open, 247 ehci_softintr, 248 ehci_poll, 249 ehci_allocm, 250 ehci_freem, 251 ehci_allocx, 252 ehci_freex, 253 }; 254 255 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 256 ehci_root_ctrl_transfer, 257 ehci_root_ctrl_start, 258 ehci_root_ctrl_abort, 259 ehci_root_ctrl_close, 260 ehci_noop, 261 ehci_root_ctrl_done, 262 }; 263 264 Static struct usbd_pipe_methods ehci_root_intr_methods = { 265 ehci_root_intr_transfer, 266 ehci_root_intr_start, 267 ehci_root_intr_abort, 268 ehci_root_intr_close, 269 ehci_noop, 270 ehci_root_intr_done, 271 }; 272 273 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 274 ehci_device_ctrl_transfer, 275 ehci_device_ctrl_start, 276 ehci_device_ctrl_abort, 277 ehci_device_ctrl_close, 278 ehci_noop, 279 ehci_device_ctrl_done, 280 }; 281 282 Static struct usbd_pipe_methods ehci_device_intr_methods = { 283 ehci_device_intr_transfer, 284 ehci_device_intr_start, 285 ehci_device_intr_abort, 286 ehci_device_intr_close, 287 ehci_device_clear_toggle, 288 ehci_device_intr_done, 289 }; 290 291 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 292 ehci_device_bulk_transfer, 293 ehci_device_bulk_start, 294 ehci_device_bulk_abort, 295 ehci_device_bulk_close, 296 ehci_device_clear_toggle, 297 ehci_device_bulk_done, 298 }; 299 300 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 301 ehci_device_isoc_transfer, 302 ehci_device_isoc_start, 303 ehci_device_isoc_abort, 304 ehci_device_isoc_close, 305 ehci_noop, 306 ehci_device_isoc_done, 307 }; 308 309 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 310 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 311 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 312 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 313 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 314 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 315 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 316 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 317 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 318 }; 319 320 usbd_status 321 ehci_init(ehci_softc_t *sc) 322 { 323 u_int32_t vers, sparams, cparams, hcr; 324 u_int i; 325 usbd_status err; 326 ehci_soft_qh_t *sqh; 327 u_int ncomp; 328 329 DPRINTF(("ehci_init: start\n")); 330 #ifdef EHCI_DEBUG 331 theehci = sc; 332 #endif 333 334 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 335 336 vers = EREAD2(sc, EHCI_HCIVERSION); 337 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 338 vers >> 8, vers & 0xff); 339 340 sparams = EREAD4(sc, EHCI_HCSPARAMS); 341 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 342 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 343 ncomp = EHCI_HCS_N_CC(sparams); 344 if (ncomp != sc->sc_ncomp) { 345 aprint_error("%s: wrong number of companions (%d != %d)\n", 346 USBDEVNAME(sc->sc_bus.bdev), 347 ncomp, sc->sc_ncomp); 348 #if NOHCI == 0 || NUHCI == 0 349 aprint_error("%s: ohci or uhci probably not configured\n", 350 USBDEVNAME(sc->sc_bus.bdev)); 351 #endif 352 if (ncomp < sc->sc_ncomp) 353 sc->sc_ncomp = ncomp; 354 } 355 if (sc->sc_ncomp > 0) { 356 aprint_normal("%s: companion controller%s, %d port%s each:", 357 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 358 EHCI_HCS_N_PCC(sparams), 359 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 360 for (i = 0; i < sc->sc_ncomp; i++) 361 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 362 aprint_normal("\n"); 363 } 364 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 365 cparams = EREAD4(sc, EHCI_HCCPARAMS); 366 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 367 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 368 369 if (EHCI_HCC_64BIT(cparams)) { 370 /* MUST clear segment register if 64 bit capable. */ 371 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 372 } 373 374 sc->sc_bus.usbrev = USBREV_2_0; 375 376 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 377 USB_MEM_RESERVE); 378 379 /* Reset the controller */ 380 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 381 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 382 usb_delay_ms(&sc->sc_bus, 1); 383 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 384 for (i = 0; i < 100; i++) { 385 usb_delay_ms(&sc->sc_bus, 1); 386 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 387 if (!hcr) 388 break; 389 } 390 if (hcr) { 391 aprint_error("%s: reset timeout\n", 392 USBDEVNAME(sc->sc_bus.bdev)); 393 return (USBD_IOERROR); 394 } 395 396 /* XXX need proper intr scheduling */ 397 sc->sc_rand = 96; 398 399 /* frame list size at default, read back what we got and use that */ 400 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 401 case 0: sc->sc_flsize = 1024; break; 402 case 1: sc->sc_flsize = 512; break; 403 case 2: sc->sc_flsize = 256; break; 404 case 3: return (USBD_IOERROR); 405 } 406 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 407 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 408 if (err) 409 return (err); 410 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 411 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 412 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 413 414 /* Set up the bus struct. */ 415 sc->sc_bus.methods = &ehci_bus_methods; 416 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 417 418 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 419 ehci_power, sc); 420 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 421 422 sc->sc_eintrs = EHCI_NORMAL_INTRS; 423 424 /* 425 * Allocate the interrupt dummy QHs. These are arranged to give poll 426 * intervals that are powers of 2 times 1ms. 427 */ 428 for (i = 0; i < EHCI_INTRQHS; i++) { 429 sqh = ehci_alloc_sqh(sc); 430 if (sqh == NULL) { 431 err = USBD_NOMEM; 432 goto bad1; 433 } 434 sc->sc_islots[i].sqh = sqh; 435 } 436 for (i = 0; i < EHCI_INTRQHS; i++) { 437 sqh = sc->sc_islots[i].sqh; 438 if (i == 0) { 439 /* The last (1ms) QH terminates. */ 440 sqh->qh.qh_link = EHCI_NULL; 441 sqh->next = NULL; 442 } else { 443 /* Otherwise the next QH has half the poll interval */ 444 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 445 sqh->qh.qh_link = htole32(sqh->next->physaddr | 446 EHCI_LINK_QH); 447 } 448 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 449 sqh->qh.qh_curqtd = EHCI_NULL; 450 sqh->next = NULL; 451 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 452 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 453 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 454 sqh->sqtd = NULL; 455 } 456 /* Point the frame list at the last level (128ms). */ 457 for (i = 0; i < sc->sc_flsize; i++) { 458 int j; 459 460 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 461 revbits[i & (EHCI_MAX_POLLRATE-1)]; 462 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 463 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 464 i)].sqh->physaddr); 465 } 466 467 /* Allocate dummy QH that starts the async list. */ 468 sqh = ehci_alloc_sqh(sc); 469 if (sqh == NULL) { 470 err = USBD_NOMEM; 471 goto bad1; 472 } 473 /* Fill the QH */ 474 sqh->qh.qh_endp = 475 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 476 sqh->qh.qh_link = 477 htole32(sqh->physaddr | EHCI_LINK_QH); 478 sqh->qh.qh_curqtd = EHCI_NULL; 479 sqh->next = NULL; 480 /* Fill the overlay qTD */ 481 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 482 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 483 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 484 sqh->sqtd = NULL; 485 #ifdef EHCI_DEBUG 486 if (ehcidebug) { 487 ehci_dump_sqh(sqh); 488 } 489 #endif 490 491 /* Point to async list */ 492 sc->sc_async_head = sqh; 493 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 494 495 usb_callout_init(sc->sc_tmo_intrlist); 496 497 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 498 499 /* Turn on controller */ 500 EOWRITE4(sc, EHCI_USBCMD, 501 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 502 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 503 EHCI_CMD_ASE | 504 EHCI_CMD_PSE | 505 EHCI_CMD_RS); 506 507 /* Take over port ownership */ 508 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 509 510 for (i = 0; i < 100; i++) { 511 usb_delay_ms(&sc->sc_bus, 1); 512 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 513 if (!hcr) 514 break; 515 } 516 if (hcr) { 517 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 518 return (USBD_IOERROR); 519 } 520 521 /* Enable interrupts */ 522 DPRINTFN(1,("ehci_init: enabling\n")); 523 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 524 525 return (USBD_NORMAL_COMPLETION); 526 527 #if 0 528 bad2: 529 ehci_free_sqh(sc, sc->sc_async_head); 530 #endif 531 bad1: 532 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 533 return (err); 534 } 535 536 int 537 ehci_intr(void *v) 538 { 539 ehci_softc_t *sc = v; 540 541 if (sc == NULL || sc->sc_dying) 542 return (0); 543 544 /* If we get an interrupt while polling, then just ignore it. */ 545 if (sc->sc_bus.use_polling) { 546 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 547 548 if (intrs) 549 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 550 #ifdef DIAGNOSTIC 551 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 552 #endif 553 return (0); 554 } 555 556 return (ehci_intr1(sc)); 557 } 558 559 Static int 560 ehci_intr1(ehci_softc_t *sc) 561 { 562 u_int32_t intrs, eintrs; 563 564 DPRINTFN(20,("ehci_intr1: enter\n")); 565 566 /* In case the interrupt occurs before initialization has completed. */ 567 if (sc == NULL) { 568 #ifdef DIAGNOSTIC 569 printf("ehci_intr1: sc == NULL\n"); 570 #endif 571 return (0); 572 } 573 574 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 575 if (!intrs) 576 return (0); 577 578 eintrs = intrs & sc->sc_eintrs; 579 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 580 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 581 (u_int)eintrs)); 582 if (!eintrs) 583 return (0); 584 585 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 586 sc->sc_bus.intr_context++; 587 sc->sc_bus.no_intrs++; 588 if (eintrs & EHCI_STS_IAA) { 589 DPRINTF(("ehci_intr1: door bell\n")); 590 wakeup(&sc->sc_async_head); 591 eintrs &= ~EHCI_STS_IAA; 592 } 593 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 594 DPRINTFN(5,("ehci_intr1: %s %s\n", 595 eintrs & EHCI_STS_INT ? "INT" : "", 596 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 597 usb_schedsoftintr(&sc->sc_bus); 598 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 599 } 600 if (eintrs & EHCI_STS_HSE) { 601 printf("%s: unrecoverable error, controller halted\n", 602 USBDEVNAME(sc->sc_bus.bdev)); 603 /* XXX what else */ 604 } 605 if (eintrs & EHCI_STS_PCD) { 606 ehci_pcd(sc, sc->sc_intrxfer); 607 eintrs &= ~EHCI_STS_PCD; 608 } 609 610 sc->sc_bus.intr_context--; 611 612 if (eintrs != 0) { 613 /* Block unprocessed interrupts. */ 614 sc->sc_eintrs &= ~eintrs; 615 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 616 printf("%s: blocking intrs 0x%x\n", 617 USBDEVNAME(sc->sc_bus.bdev), eintrs); 618 } 619 620 return (1); 621 } 622 623 624 void 625 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 626 { 627 usbd_pipe_handle pipe; 628 u_char *p; 629 int i, m; 630 631 if (xfer == NULL) { 632 /* Just ignore the change. */ 633 return; 634 } 635 636 pipe = xfer->pipe; 637 638 p = KERNADDR(&xfer->dmabuf, 0); 639 m = min(sc->sc_noport, xfer->length * 8 - 1); 640 memset(p, 0, xfer->length); 641 for (i = 1; i <= m; i++) { 642 /* Pick out CHANGE bits from the status reg. */ 643 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 644 p[i/8] |= 1 << (i%8); 645 } 646 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 647 xfer->actlen = xfer->length; 648 xfer->status = USBD_NORMAL_COMPLETION; 649 650 usb_transfer_complete(xfer); 651 } 652 653 void 654 ehci_softintr(void *v) 655 { 656 ehci_softc_t *sc = v; 657 struct ehci_xfer *ex, *nextex; 658 659 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 660 sc->sc_bus.intr_context)); 661 662 sc->sc_bus.intr_context++; 663 664 /* 665 * The only explanation I can think of for why EHCI is as brain dead 666 * as UHCI interrupt-wise is that Intel was involved in both. 667 * An interrupt just tells us that something is done, we have no 668 * clue what, so we need to scan through all active transfers. :-( 669 */ 670 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 671 nextex = LIST_NEXT(ex, inext); 672 ehci_check_intr(sc, ex); 673 } 674 675 /* Schedule a callout to catch any dropped transactions. */ 676 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 677 !LIST_EMPTY(&sc->sc_intrhead)) 678 usb_callout(sc->sc_tmo_intrlist, hz, 679 ehci_intrlist_timeout, sc); 680 681 #ifdef USB_USE_SOFTINTR 682 if (sc->sc_softwake) { 683 sc->sc_softwake = 0; 684 wakeup(&sc->sc_softwake); 685 } 686 #endif /* USB_USE_SOFTINTR */ 687 688 sc->sc_bus.intr_context--; 689 } 690 691 /* Check for an interrupt. */ 692 void 693 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 694 { 695 ehci_soft_qtd_t *sqtd, *lsqtd; 696 u_int32_t status; 697 698 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 699 700 if (ex->sqtdstart == NULL) { 701 printf("ehci_check_intr: sqtdstart=NULL\n"); 702 return; 703 } 704 lsqtd = ex->sqtdend; 705 #ifdef DIAGNOSTIC 706 if (lsqtd == NULL) { 707 printf("ehci_check_intr: lsqtd==0\n"); 708 return; 709 } 710 #endif 711 /* 712 * If the last TD is still active we need to check whether there 713 * is a an error somewhere in the middle, or whether there was a 714 * short packet (SPD and not ACTIVE). 715 */ 716 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 717 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 718 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 719 status = le32toh(sqtd->qtd.qtd_status); 720 /* If there's an active QTD the xfer isn't done. */ 721 if (status & EHCI_QTD_ACTIVE) 722 break; 723 /* Any kind of error makes the xfer done. */ 724 if (status & EHCI_QTD_HALTED) 725 goto done; 726 /* We want short packets, and it is short: it's done */ 727 if (EHCI_QTD_GET_BYTES(status) != 0) 728 goto done; 729 } 730 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 731 ex, ex->sqtdstart)); 732 return; 733 } 734 done: 735 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 736 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 737 ehci_idone(ex); 738 } 739 740 void 741 ehci_idone(struct ehci_xfer *ex) 742 { 743 usbd_xfer_handle xfer = &ex->xfer; 744 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 745 ehci_soft_qtd_t *sqtd, *lsqtd; 746 u_int32_t status = 0, nstatus = 0; 747 int actlen; 748 749 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 750 #ifdef DIAGNOSTIC 751 { 752 int s = splhigh(); 753 if (ex->isdone) { 754 splx(s); 755 #ifdef EHCI_DEBUG 756 printf("ehci_idone: ex is done!\n "); 757 ehci_dump_exfer(ex); 758 #else 759 printf("ehci_idone: ex=%p is done!\n", ex); 760 #endif 761 return; 762 } 763 ex->isdone = 1; 764 splx(s); 765 } 766 #endif 767 768 if (xfer->status == USBD_CANCELLED || 769 xfer->status == USBD_TIMEOUT) { 770 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 771 return; 772 } 773 774 #ifdef EHCI_DEBUG 775 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 776 if (ehcidebug > 10) 777 ehci_dump_sqtds(ex->sqtdstart); 778 #endif 779 780 /* The transfer is done, compute actual length and status. */ 781 lsqtd = ex->sqtdend; 782 actlen = 0; 783 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 784 nstatus = le32toh(sqtd->qtd.qtd_status); 785 if (nstatus & EHCI_QTD_ACTIVE) 786 break; 787 788 status = nstatus; 789 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 790 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 791 } 792 793 /* 794 * If there are left over TDs we need to update the toggle. 795 * The default pipe doesn't need it since control transfers 796 * start the toggle at 0 every time. 797 * For a short transfer we need to update the toggle for the missing 798 * packets within the qTD. 799 */ 800 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 801 xfer->pipe->device->default_pipe != xfer->pipe) { 802 DPRINTFN(2, ("ehci_idone: need toggle update " 803 "status=%08x nstatus=%08x\n", status, nstatus)); 804 #if 0 805 ehci_dump_sqh(epipe->sqh); 806 ehci_dump_sqtds(ex->sqtdstart); 807 #endif 808 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 809 } 810 811 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 812 xfer->length, actlen, status)); 813 xfer->actlen = actlen; 814 if (status & EHCI_QTD_HALTED) { 815 #ifdef EHCI_DEBUG 816 char sbuf[128]; 817 818 bitmask_snprintf((u_int32_t)status, 819 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 820 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 821 822 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 823 "status 0x%s\n", 824 xfer->pipe->device->address, 825 xfer->pipe->endpoint->edesc->bEndpointAddress, 826 sbuf)); 827 if (ehcidebug > 2) { 828 ehci_dump_sqh(epipe->sqh); 829 ehci_dump_sqtds(ex->sqtdstart); 830 } 831 #endif 832 /* low&full speed has an extra error flag */ 833 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 834 EHCI_QH_SPEED_HIGH) 835 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 836 else 837 status &= EHCI_QTD_STATERRS; 838 if (status == 0) /* no other errors means a stall */ 839 xfer->status = USBD_STALLED; 840 else 841 xfer->status = USBD_IOERROR; /* more info XXX */ 842 /* XXX need to reset TT on missed microframe */ 843 if (status & EHCI_QTD_MISSEDMICRO) { 844 ehci_softc_t *sc = (ehci_softc_t *) 845 xfer->pipe->device->bus; 846 847 printf("%s: missed microframe, TT reset not " 848 "implemented, hub might be inoperational\n", 849 USBDEVNAME(sc->sc_bus.bdev)); 850 } 851 } else { 852 xfer->status = USBD_NORMAL_COMPLETION; 853 } 854 855 usb_transfer_complete(xfer); 856 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 857 } 858 859 /* 860 * Wait here until controller claims to have an interrupt. 861 * Then call ehci_intr and return. Use timeout to avoid waiting 862 * too long. 863 */ 864 void 865 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 866 { 867 int timo; 868 u_int32_t intrs; 869 870 xfer->status = USBD_IN_PROGRESS; 871 for (timo = xfer->timeout; timo >= 0; timo--) { 872 usb_delay_ms(&sc->sc_bus, 1); 873 if (sc->sc_dying) 874 break; 875 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 876 sc->sc_eintrs; 877 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 878 #ifdef EHCI_DEBUG 879 if (ehcidebug > 15) 880 ehci_dump_regs(sc); 881 #endif 882 if (intrs) { 883 ehci_intr1(sc); 884 if (xfer->status != USBD_IN_PROGRESS) 885 return; 886 } 887 } 888 889 /* Timeout */ 890 DPRINTF(("ehci_waitintr: timeout\n")); 891 xfer->status = USBD_TIMEOUT; 892 usb_transfer_complete(xfer); 893 /* XXX should free TD */ 894 } 895 896 void 897 ehci_poll(struct usbd_bus *bus) 898 { 899 ehci_softc_t *sc = (ehci_softc_t *)bus; 900 #ifdef EHCI_DEBUG 901 static int last; 902 int new; 903 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 904 if (new != last) { 905 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 906 last = new; 907 } 908 #endif 909 910 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 911 ehci_intr1(sc); 912 } 913 914 int 915 ehci_detach(struct ehci_softc *sc, int flags) 916 { 917 int rv = 0; 918 919 if (sc->sc_child != NULL) 920 rv = config_detach(sc->sc_child, flags); 921 922 if (rv != 0) 923 return (rv); 924 925 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 926 927 if (sc->sc_powerhook != NULL) 928 powerhook_disestablish(sc->sc_powerhook); 929 if (sc->sc_shutdownhook != NULL) 930 shutdownhook_disestablish(sc->sc_shutdownhook); 931 932 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 933 934 /* XXX free other data structures XXX */ 935 936 return (rv); 937 } 938 939 940 int 941 ehci_activate(device_ptr_t self, enum devact act) 942 { 943 struct ehci_softc *sc = (struct ehci_softc *)self; 944 int rv = 0; 945 946 switch (act) { 947 case DVACT_ACTIVATE: 948 return (EOPNOTSUPP); 949 950 case DVACT_DEACTIVATE: 951 if (sc->sc_child != NULL) 952 rv = config_deactivate(sc->sc_child); 953 sc->sc_dying = 1; 954 break; 955 } 956 return (rv); 957 } 958 959 /* 960 * Handle suspend/resume. 961 * 962 * We need to switch to polling mode here, because this routine is 963 * called from an interrupt context. This is all right since we 964 * are almost suspended anyway. 965 */ 966 void 967 ehci_power(int why, void *v) 968 { 969 ehci_softc_t *sc = v; 970 u_int32_t cmd, hcr; 971 int s, i; 972 973 #ifdef EHCI_DEBUG 974 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 975 if (ehcidebug > 0) 976 ehci_dump_regs(sc); 977 #endif 978 979 s = splhardusb(); 980 switch (why) { 981 case PWR_SUSPEND: 982 case PWR_STANDBY: 983 sc->sc_bus.use_polling++; 984 985 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 986 987 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 988 EOWRITE4(sc, EHCI_USBCMD, cmd); 989 990 for (i = 0; i < 100; i++) { 991 hcr = EOREAD4(sc, EHCI_USBSTS) & 992 (EHCI_STS_ASS | EHCI_STS_PSS); 993 if (hcr == 0) 994 break; 995 996 usb_delay_ms(&sc->sc_bus, 1); 997 } 998 if (hcr != 0) { 999 printf("%s: reset timeout\n", 1000 USBDEVNAME(sc->sc_bus.bdev)); 1001 } 1002 1003 cmd &= ~EHCI_CMD_RS; 1004 EOWRITE4(sc, EHCI_USBCMD, cmd); 1005 1006 for (i = 0; i < 100; i++) { 1007 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1008 if (hcr == EHCI_STS_HCH) 1009 break; 1010 1011 usb_delay_ms(&sc->sc_bus, 1); 1012 } 1013 if (hcr != EHCI_STS_HCH) { 1014 printf("%s: config timeout\n", 1015 USBDEVNAME(sc->sc_bus.bdev)); 1016 } 1017 1018 sc->sc_bus.use_polling--; 1019 break; 1020 1021 case PWR_RESUME: 1022 sc->sc_bus.use_polling++; 1023 1024 /* restore things in case the bios sucks */ 1025 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1026 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1027 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1028 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1029 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1030 1031 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1032 1033 for (i = 0; i < 100; i++) { 1034 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1035 if (hcr != EHCI_STS_HCH) 1036 break; 1037 1038 usb_delay_ms(&sc->sc_bus, 1); 1039 } 1040 if (hcr == EHCI_STS_HCH) { 1041 printf("%s: config timeout\n", 1042 USBDEVNAME(sc->sc_bus.bdev)); 1043 } 1044 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1046 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 1056 #ifdef EHCI_DEBUG 1057 DPRINTF(("ehci_power: sc=%p\n", sc)); 1058 if (ehcidebug > 0) 1059 ehci_dump_regs(sc); 1060 #endif 1061 } 1062 1063 /* 1064 * Shut down the controller when the system is going down. 1065 */ 1066 void 1067 ehci_shutdown(void *v) 1068 { 1069 ehci_softc_t *sc = v; 1070 1071 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1072 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1073 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1074 } 1075 1076 usbd_status 1077 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1078 { 1079 struct ehci_softc *sc = (struct ehci_softc *)bus; 1080 usbd_status err; 1081 1082 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1083 if (err == USBD_NOMEM) 1084 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1085 #ifdef EHCI_DEBUG 1086 if (err) 1087 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1088 #endif 1089 return (err); 1090 } 1091 1092 void 1093 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1094 { 1095 struct ehci_softc *sc = (struct ehci_softc *)bus; 1096 1097 if (dma->block->flags & USB_DMA_RESERVE) { 1098 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1099 dma); 1100 return; 1101 } 1102 usb_freemem(&sc->sc_bus, dma); 1103 } 1104 1105 usbd_xfer_handle 1106 ehci_allocx(struct usbd_bus *bus) 1107 { 1108 struct ehci_softc *sc = (struct ehci_softc *)bus; 1109 usbd_xfer_handle xfer; 1110 1111 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1112 if (xfer != NULL) { 1113 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1114 #ifdef DIAGNOSTIC 1115 if (xfer->busy_free != XFER_FREE) { 1116 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1117 xfer->busy_free); 1118 } 1119 #endif 1120 } else { 1121 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1122 } 1123 if (xfer != NULL) { 1124 memset(xfer, 0, sizeof(struct ehci_xfer)); 1125 #ifdef DIAGNOSTIC 1126 EXFER(xfer)->isdone = 1; 1127 xfer->busy_free = XFER_BUSY; 1128 #endif 1129 } 1130 return (xfer); 1131 } 1132 1133 void 1134 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1135 { 1136 struct ehci_softc *sc = (struct ehci_softc *)bus; 1137 1138 #ifdef DIAGNOSTIC 1139 if (xfer->busy_free != XFER_BUSY) { 1140 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1141 xfer->busy_free); 1142 return; 1143 } 1144 xfer->busy_free = XFER_FREE; 1145 if (!EXFER(xfer)->isdone) { 1146 printf("ehci_freex: !isdone\n"); 1147 return; 1148 } 1149 #endif 1150 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1151 } 1152 1153 Static void 1154 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1155 { 1156 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1157 1158 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1159 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1160 #ifdef USB_DEBUG 1161 if (ehcidebug) 1162 usbd_dump_pipe(pipe); 1163 #endif 1164 epipe->nexttoggle = 0; 1165 } 1166 1167 Static void 1168 ehci_noop(usbd_pipe_handle pipe) 1169 { 1170 } 1171 1172 #ifdef EHCI_DEBUG 1173 void 1174 ehci_dump_regs(ehci_softc_t *sc) 1175 { 1176 int i; 1177 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1178 EOREAD4(sc, EHCI_USBCMD), 1179 EOREAD4(sc, EHCI_USBSTS), 1180 EOREAD4(sc, EHCI_USBINTR)); 1181 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1182 EOREAD4(sc, EHCI_FRINDEX), 1183 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1184 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1185 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1186 for (i = 1; i <= sc->sc_noport; i++) 1187 printf("port %d status=0x%08x\n", i, 1188 EOREAD4(sc, EHCI_PORTSC(i))); 1189 } 1190 1191 /* 1192 * Unused function - this is meant to be called from a kernel 1193 * debugger. 1194 */ 1195 void 1196 ehci_dump() 1197 { 1198 ehci_dump_regs(theehci); 1199 } 1200 1201 void 1202 ehci_dump_link(ehci_link_t link, int type) 1203 { 1204 link = le32toh(link); 1205 printf("0x%08x", link); 1206 if (link & EHCI_LINK_TERMINATE) 1207 printf("<T>"); 1208 else { 1209 printf("<"); 1210 if (type) { 1211 switch (EHCI_LINK_TYPE(link)) { 1212 case EHCI_LINK_ITD: printf("ITD"); break; 1213 case EHCI_LINK_QH: printf("QH"); break; 1214 case EHCI_LINK_SITD: printf("SITD"); break; 1215 case EHCI_LINK_FSTN: printf("FSTN"); break; 1216 } 1217 } 1218 printf(">"); 1219 } 1220 } 1221 1222 void 1223 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1224 { 1225 int i; 1226 u_int32_t stop; 1227 1228 stop = 0; 1229 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1230 ehci_dump_sqtd(sqtd); 1231 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1232 } 1233 if (sqtd) 1234 printf("dump aborted, too many TDs\n"); 1235 } 1236 1237 void 1238 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1239 { 1240 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1241 ehci_dump_qtd(&sqtd->qtd); 1242 } 1243 1244 void 1245 ehci_dump_qtd(ehci_qtd_t *qtd) 1246 { 1247 u_int32_t s; 1248 char sbuf[128]; 1249 1250 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1251 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1252 printf("\n"); 1253 s = le32toh(qtd->qtd_status); 1254 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1255 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1256 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1257 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1258 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1259 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1260 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1261 EHCI_QTD_GET_PID(s), sbuf); 1262 for (s = 0; s < 5; s++) 1263 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1264 } 1265 1266 void 1267 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1268 { 1269 ehci_qh_t *qh = &sqh->qh; 1270 u_int32_t endp, endphub; 1271 1272 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1273 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1274 endp = le32toh(qh->qh_endp); 1275 printf(" endp=0x%08x\n", endp); 1276 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1277 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1278 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1279 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1280 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1281 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1282 EHCI_QH_GET_NRL(endp)); 1283 endphub = le32toh(qh->qh_endphub); 1284 printf(" endphub=0x%08x\n", endphub); 1285 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1286 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1287 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1288 EHCI_QH_GET_MULT(endphub)); 1289 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1290 printf("Overlay qTD:\n"); 1291 ehci_dump_qtd(&qh->qh_qtd); 1292 } 1293 1294 #ifdef DIAGNOSTIC 1295 Static void 1296 ehci_dump_exfer(struct ehci_xfer *ex) 1297 { 1298 printf("ehci_dump_exfer: ex=%p\n", ex); 1299 } 1300 #endif 1301 #endif 1302 1303 usbd_status 1304 ehci_open(usbd_pipe_handle pipe) 1305 { 1306 usbd_device_handle dev = pipe->device; 1307 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1308 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1309 u_int8_t addr = dev->address; 1310 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1311 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1312 ehci_soft_qh_t *sqh; 1313 usbd_status err; 1314 int s; 1315 int ival, speed, naks; 1316 int hshubaddr, hshubport; 1317 1318 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1319 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1320 1321 if (dev->myhsport) { 1322 hshubaddr = dev->myhsport->parent->address; 1323 hshubport = dev->myhsport->portno; 1324 } else { 1325 hshubaddr = 0; 1326 hshubport = 0; 1327 } 1328 1329 if (sc->sc_dying) 1330 return (USBD_IOERROR); 1331 1332 epipe->nexttoggle = 0; 1333 1334 if (addr == sc->sc_addr) { 1335 switch (ed->bEndpointAddress) { 1336 case USB_CONTROL_ENDPOINT: 1337 pipe->methods = &ehci_root_ctrl_methods; 1338 break; 1339 case UE_DIR_IN | EHCI_INTR_ENDPT: 1340 pipe->methods = &ehci_root_intr_methods; 1341 break; 1342 default: 1343 return (USBD_INVAL); 1344 } 1345 return (USBD_NORMAL_COMPLETION); 1346 } 1347 1348 /* XXX All this stuff is only valid for async. */ 1349 switch (dev->speed) { 1350 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1351 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1352 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1353 default: panic("ehci_open: bad device speed %d", dev->speed); 1354 } 1355 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1356 printf("%s: *** WARNING: opening low/full speed isoc device, " 1357 "this does not work yet.\n", 1358 USBDEVNAME(sc->sc_bus.bdev)); 1359 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1360 hshubaddr, hshubport)); 1361 return USBD_INVAL; 1362 } 1363 1364 naks = 8; /* XXX */ 1365 sqh = ehci_alloc_sqh(sc); 1366 if (sqh == NULL) 1367 return (USBD_NOMEM); 1368 /* qh_link filled when the QH is added */ 1369 sqh->qh.qh_endp = htole32( 1370 EHCI_QH_SET_ADDR(addr) | 1371 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1372 EHCI_QH_SET_EPS(speed) | 1373 EHCI_QH_DTC | 1374 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1375 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1376 EHCI_QH_CTL : 0) | 1377 EHCI_QH_SET_NRL(naks) 1378 ); 1379 sqh->qh.qh_endphub = htole32( 1380 EHCI_QH_SET_MULT(1) | 1381 EHCI_QH_SET_HUBA(hshubaddr) | 1382 EHCI_QH_SET_PORT(hshubport) | 1383 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1384 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1385 ); 1386 sqh->qh.qh_curqtd = EHCI_NULL; 1387 /* Fill the overlay qTD */ 1388 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1389 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1390 sqh->qh.qh_qtd.qtd_status = htole32(0); 1391 1392 epipe->sqh = sqh; 1393 1394 switch (xfertype) { 1395 case UE_CONTROL: 1396 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1397 0, &epipe->u.ctl.reqdma); 1398 #ifdef EHCI_DEBUG 1399 if (err) 1400 printf("ehci_open: usb_allocmem()=%d\n", err); 1401 #endif 1402 if (err) 1403 goto bad; 1404 pipe->methods = &ehci_device_ctrl_methods; 1405 s = splusb(); 1406 ehci_add_qh(sqh, sc->sc_async_head); 1407 splx(s); 1408 break; 1409 case UE_BULK: 1410 pipe->methods = &ehci_device_bulk_methods; 1411 s = splusb(); 1412 ehci_add_qh(sqh, sc->sc_async_head); 1413 splx(s); 1414 break; 1415 case UE_INTERRUPT: 1416 pipe->methods = &ehci_device_intr_methods; 1417 ival = pipe->interval; 1418 if (ival == USBD_DEFAULT_INTERVAL) { 1419 if (speed == EHCI_QH_SPEED_HIGH) { 1420 if (ed->bInterval > 16) { 1421 /* 1422 * illegal with high-speed, but there 1423 * were documentation bugs in the spec, 1424 * so be generous 1425 */ 1426 ival = 256; 1427 } else 1428 ival = (1 << (ed->bInterval - 1)) / 8; 1429 } else 1430 ival = ed->bInterval; 1431 } 1432 err = ehci_device_setintr(sc, sqh, ival); 1433 if (err) 1434 goto bad; 1435 break; 1436 case UE_ISOCHRONOUS: 1437 pipe->methods = &ehci_device_isoc_methods; 1438 /* FALLTHROUGH */ 1439 default: 1440 err = USBD_INVAL; 1441 goto bad; 1442 } 1443 return (USBD_NORMAL_COMPLETION); 1444 1445 bad: 1446 ehci_free_sqh(sc, sqh); 1447 return (err); 1448 } 1449 1450 /* 1451 * Add an ED to the schedule. Called at splusb(). 1452 */ 1453 void 1454 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1455 { 1456 SPLUSBCHECK; 1457 1458 sqh->next = head->next; 1459 sqh->qh.qh_link = head->qh.qh_link; 1460 head->next = sqh; 1461 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1462 1463 #ifdef EHCI_DEBUG 1464 if (ehcidebug > 5) { 1465 printf("ehci_add_qh:\n"); 1466 ehci_dump_sqh(sqh); 1467 } 1468 #endif 1469 } 1470 1471 /* 1472 * Remove an ED from the schedule. Called at splusb(). 1473 */ 1474 void 1475 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1476 { 1477 ehci_soft_qh_t *p; 1478 1479 SPLUSBCHECK; 1480 /* XXX */ 1481 for (p = head; p != NULL && p->next != sqh; p = p->next) 1482 ; 1483 if (p == NULL) 1484 panic("ehci_rem_qh: ED not found"); 1485 p->next = sqh->next; 1486 p->qh.qh_link = sqh->qh.qh_link; 1487 1488 ehci_sync_hc(sc); 1489 } 1490 1491 void 1492 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1493 { 1494 int i; 1495 u_int32_t status; 1496 1497 /* Save toggle bit and ping status. */ 1498 status = sqh->qh.qh_qtd.qtd_status & 1499 htole32(EHCI_QTD_TOGGLE_MASK | 1500 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1501 /* Set HALTED to make hw leave it alone. */ 1502 sqh->qh.qh_qtd.qtd_status = 1503 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1504 sqh->qh.qh_curqtd = 0; 1505 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1506 sqh->qh.qh_qtd.qtd_altnext = 0; 1507 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1508 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1509 sqh->sqtd = sqtd; 1510 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1511 sqh->qh.qh_qtd.qtd_status = status; 1512 } 1513 1514 /* 1515 * Ensure that the HC has released all references to the QH. We do this 1516 * by asking for a Async Advance Doorbell interrupt and then we wait for 1517 * the interrupt. 1518 * To make this easier we first obtain exclusive use of the doorbell. 1519 */ 1520 void 1521 ehci_sync_hc(ehci_softc_t *sc) 1522 { 1523 int s, error; 1524 1525 if (sc->sc_dying) { 1526 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1527 return; 1528 } 1529 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1530 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1531 s = splhardusb(); 1532 /* ask for doorbell */ 1533 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1534 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1535 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1536 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1537 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1538 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1539 splx(s); 1540 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1541 #ifdef DIAGNOSTIC 1542 if (error) 1543 printf("ehci_sync_hc: tsleep() = %d\n", error); 1544 #endif 1545 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1546 } 1547 1548 /***********/ 1549 1550 /* 1551 * Data structures and routines to emulate the root hub. 1552 */ 1553 Static usb_device_descriptor_t ehci_devd = { 1554 USB_DEVICE_DESCRIPTOR_SIZE, 1555 UDESC_DEVICE, /* type */ 1556 {0x00, 0x02}, /* USB version */ 1557 UDCLASS_HUB, /* class */ 1558 UDSUBCLASS_HUB, /* subclass */ 1559 UDPROTO_HSHUBSTT, /* protocol */ 1560 64, /* max packet */ 1561 {0},{0},{0x00,0x01}, /* device id */ 1562 1,2,0, /* string indicies */ 1563 1 /* # of configurations */ 1564 }; 1565 1566 Static usb_device_qualifier_t ehci_odevd = { 1567 USB_DEVICE_DESCRIPTOR_SIZE, 1568 UDESC_DEVICE_QUALIFIER, /* type */ 1569 {0x00, 0x02}, /* USB version */ 1570 UDCLASS_HUB, /* class */ 1571 UDSUBCLASS_HUB, /* subclass */ 1572 UDPROTO_FSHUB, /* protocol */ 1573 64, /* max packet */ 1574 1, /* # of configurations */ 1575 0 1576 }; 1577 1578 Static usb_config_descriptor_t ehci_confd = { 1579 USB_CONFIG_DESCRIPTOR_SIZE, 1580 UDESC_CONFIG, 1581 {USB_CONFIG_DESCRIPTOR_SIZE + 1582 USB_INTERFACE_DESCRIPTOR_SIZE + 1583 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1584 1, 1585 1, 1586 0, 1587 UC_ATTR_MBO | UC_SELF_POWERED, 1588 0 /* max power */ 1589 }; 1590 1591 Static usb_interface_descriptor_t ehci_ifcd = { 1592 USB_INTERFACE_DESCRIPTOR_SIZE, 1593 UDESC_INTERFACE, 1594 0, 1595 0, 1596 1, 1597 UICLASS_HUB, 1598 UISUBCLASS_HUB, 1599 UIPROTO_HSHUBSTT, 1600 0 1601 }; 1602 1603 Static usb_endpoint_descriptor_t ehci_endpd = { 1604 USB_ENDPOINT_DESCRIPTOR_SIZE, 1605 UDESC_ENDPOINT, 1606 UE_DIR_IN | EHCI_INTR_ENDPT, 1607 UE_INTERRUPT, 1608 {8, 0}, /* max packet */ 1609 12 1610 }; 1611 1612 Static usb_hub_descriptor_t ehci_hubd = { 1613 USB_HUB_DESCRIPTOR_SIZE, 1614 UDESC_HUB, 1615 0, 1616 {0,0}, 1617 0, 1618 0, 1619 {""}, 1620 {""}, 1621 }; 1622 1623 Static int 1624 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1625 { 1626 int i; 1627 1628 if (l == 0) 1629 return (0); 1630 p->bLength = 2 * strlen(s) + 2; 1631 if (l == 1) 1632 return (1); 1633 p->bDescriptorType = UDESC_STRING; 1634 l -= 2; 1635 for (i = 0; s[i] && l > 1; i++, l -= 2) 1636 USETW2(p->bString[i], 0, s[i]); 1637 return (2*i+2); 1638 } 1639 1640 /* 1641 * Simulate a hardware hub by handling all the necessary requests. 1642 */ 1643 Static usbd_status 1644 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1645 { 1646 usbd_status err; 1647 1648 /* Insert last in queue. */ 1649 err = usb_insert_transfer(xfer); 1650 if (err) 1651 return (err); 1652 1653 /* Pipe isn't running, start first */ 1654 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1655 } 1656 1657 Static usbd_status 1658 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1659 { 1660 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1661 usb_device_request_t *req; 1662 void *buf = NULL; 1663 int port, i; 1664 int s, len, value, index, l, totlen = 0; 1665 usb_port_status_t ps; 1666 usb_hub_descriptor_t hubd; 1667 usbd_status err; 1668 u_int32_t v; 1669 1670 if (sc->sc_dying) 1671 return (USBD_IOERROR); 1672 1673 #ifdef DIAGNOSTIC 1674 if (!(xfer->rqflags & URQ_REQUEST)) 1675 /* XXX panic */ 1676 return (USBD_INVAL); 1677 #endif 1678 req = &xfer->request; 1679 1680 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1681 req->bmRequestType, req->bRequest)); 1682 1683 len = UGETW(req->wLength); 1684 value = UGETW(req->wValue); 1685 index = UGETW(req->wIndex); 1686 1687 if (len != 0) 1688 buf = KERNADDR(&xfer->dmabuf, 0); 1689 1690 #define C(x,y) ((x) | ((y) << 8)) 1691 switch(C(req->bRequest, req->bmRequestType)) { 1692 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1693 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1694 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1695 /* 1696 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1697 * for the integrated root hub. 1698 */ 1699 break; 1700 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1701 if (len > 0) { 1702 *(u_int8_t *)buf = sc->sc_conf; 1703 totlen = 1; 1704 } 1705 break; 1706 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1707 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1708 if (len == 0) 1709 break; 1710 switch(value >> 8) { 1711 case UDESC_DEVICE: 1712 if ((value & 0xff) != 0) { 1713 err = USBD_IOERROR; 1714 goto ret; 1715 } 1716 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1717 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1718 memcpy(buf, &ehci_devd, l); 1719 break; 1720 /* 1721 * We can't really operate at another speed, but the spec says 1722 * we need this descriptor. 1723 */ 1724 case UDESC_DEVICE_QUALIFIER: 1725 if ((value & 0xff) != 0) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1730 memcpy(buf, &ehci_odevd, l); 1731 break; 1732 /* 1733 * We can't really operate at another speed, but the spec says 1734 * we need this descriptor. 1735 */ 1736 case UDESC_OTHER_SPEED_CONFIGURATION: 1737 case UDESC_CONFIG: 1738 if ((value & 0xff) != 0) { 1739 err = USBD_IOERROR; 1740 goto ret; 1741 } 1742 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1743 memcpy(buf, &ehci_confd, l); 1744 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1745 value >> 8; 1746 buf = (char *)buf + l; 1747 len -= l; 1748 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1749 totlen += l; 1750 memcpy(buf, &ehci_ifcd, l); 1751 buf = (char *)buf + l; 1752 len -= l; 1753 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1754 totlen += l; 1755 memcpy(buf, &ehci_endpd, l); 1756 break; 1757 case UDESC_STRING: 1758 *(u_int8_t *)buf = 0; 1759 totlen = 1; 1760 switch (value & 0xff) { 1761 case 0: /* Language table */ 1762 totlen = ehci_str(buf, len, "\001"); 1763 break; 1764 case 1: /* Vendor */ 1765 totlen = ehci_str(buf, len, sc->sc_vendor); 1766 break; 1767 case 2: /* Product */ 1768 totlen = ehci_str(buf, len, "EHCI root hub"); 1769 break; 1770 } 1771 break; 1772 default: 1773 err = USBD_IOERROR; 1774 goto ret; 1775 } 1776 break; 1777 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1778 if (len > 0) { 1779 *(u_int8_t *)buf = 0; 1780 totlen = 1; 1781 } 1782 break; 1783 case C(UR_GET_STATUS, UT_READ_DEVICE): 1784 if (len > 1) { 1785 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1786 totlen = 2; 1787 } 1788 break; 1789 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1790 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1791 if (len > 1) { 1792 USETW(((usb_status_t *)buf)->wStatus, 0); 1793 totlen = 2; 1794 } 1795 break; 1796 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1797 if (value >= USB_MAX_DEVICES) { 1798 err = USBD_IOERROR; 1799 goto ret; 1800 } 1801 sc->sc_addr = value; 1802 break; 1803 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1804 if (value != 0 && value != 1) { 1805 err = USBD_IOERROR; 1806 goto ret; 1807 } 1808 sc->sc_conf = value; 1809 break; 1810 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1811 break; 1812 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1813 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1814 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1815 err = USBD_IOERROR; 1816 goto ret; 1817 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1818 break; 1819 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1820 break; 1821 /* Hub requests */ 1822 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1823 break; 1824 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1825 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1826 "port=%d feature=%d\n", 1827 index, value)); 1828 if (index < 1 || index > sc->sc_noport) { 1829 err = USBD_IOERROR; 1830 goto ret; 1831 } 1832 port = EHCI_PORTSC(index); 1833 v = EOREAD4(sc, port); 1834 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1835 v &= ~EHCI_PS_CLEAR; 1836 switch(value) { 1837 case UHF_PORT_ENABLE: 1838 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1839 break; 1840 case UHF_PORT_SUSPEND: 1841 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1842 break; 1843 case UHF_PORT_POWER: 1844 if (sc->sc_hasppc) 1845 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1846 break; 1847 case UHF_PORT_TEST: 1848 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1849 "%d\n", index)); 1850 break; 1851 case UHF_PORT_INDICATOR: 1852 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1853 "%d\n", index)); 1854 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1855 break; 1856 case UHF_C_PORT_CONNECTION: 1857 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1858 break; 1859 case UHF_C_PORT_ENABLE: 1860 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1861 break; 1862 case UHF_C_PORT_SUSPEND: 1863 /* how? */ 1864 break; 1865 case UHF_C_PORT_OVER_CURRENT: 1866 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1867 break; 1868 case UHF_C_PORT_RESET: 1869 sc->sc_isreset[index] = 0; 1870 break; 1871 default: 1872 err = USBD_IOERROR; 1873 goto ret; 1874 } 1875 #if 0 1876 switch(value) { 1877 case UHF_C_PORT_CONNECTION: 1878 case UHF_C_PORT_ENABLE: 1879 case UHF_C_PORT_SUSPEND: 1880 case UHF_C_PORT_OVER_CURRENT: 1881 case UHF_C_PORT_RESET: 1882 default: 1883 break; 1884 } 1885 #endif 1886 break; 1887 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1888 if (len == 0) 1889 break; 1890 if ((value & 0xff) != 0) { 1891 err = USBD_IOERROR; 1892 goto ret; 1893 } 1894 hubd = ehci_hubd; 1895 hubd.bNbrPorts = sc->sc_noport; 1896 v = EOREAD4(sc, EHCI_HCSPARAMS); 1897 USETW(hubd.wHubCharacteristics, 1898 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1899 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1900 ? UHD_PORT_IND : 0); 1901 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1902 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1903 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1904 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1905 l = min(len, hubd.bDescLength); 1906 totlen = l; 1907 memcpy(buf, &hubd, l); 1908 break; 1909 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1910 if (len != 4) { 1911 err = USBD_IOERROR; 1912 goto ret; 1913 } 1914 memset(buf, 0, len); /* ? XXX */ 1915 totlen = len; 1916 break; 1917 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1918 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1919 index)); 1920 if (index < 1 || index > sc->sc_noport) { 1921 err = USBD_IOERROR; 1922 goto ret; 1923 } 1924 if (len != 4) { 1925 err = USBD_IOERROR; 1926 goto ret; 1927 } 1928 v = EOREAD4(sc, EHCI_PORTSC(index)); 1929 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1930 v)); 1931 i = UPS_HIGH_SPEED; 1932 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1933 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1934 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1935 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1936 if (v & EHCI_PS_PR) i |= UPS_RESET; 1937 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1938 USETW(ps.wPortStatus, i); 1939 i = 0; 1940 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1941 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1942 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1943 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1944 USETW(ps.wPortChange, i); 1945 l = min(len, sizeof ps); 1946 memcpy(buf, &ps, l); 1947 totlen = l; 1948 break; 1949 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1950 err = USBD_IOERROR; 1951 goto ret; 1952 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1953 break; 1954 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1955 if (index < 1 || index > sc->sc_noport) { 1956 err = USBD_IOERROR; 1957 goto ret; 1958 } 1959 port = EHCI_PORTSC(index); 1960 v = EOREAD4(sc, port); 1961 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1962 v &= ~EHCI_PS_CLEAR; 1963 switch(value) { 1964 case UHF_PORT_ENABLE: 1965 EOWRITE4(sc, port, v | EHCI_PS_PE); 1966 break; 1967 case UHF_PORT_SUSPEND: 1968 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1969 break; 1970 case UHF_PORT_RESET: 1971 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1972 index)); 1973 if (EHCI_PS_IS_LOWSPEED(v)) { 1974 /* Low speed device, give up ownership. */ 1975 ehci_disown(sc, index, 1); 1976 break; 1977 } 1978 /* Start reset sequence. */ 1979 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1980 EOWRITE4(sc, port, v | EHCI_PS_PR); 1981 /* Wait for reset to complete. */ 1982 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1983 if (sc->sc_dying) { 1984 err = USBD_IOERROR; 1985 goto ret; 1986 } 1987 /* Terminate reset sequence. */ 1988 EOWRITE4(sc, port, v); 1989 /* Wait for HC to complete reset. */ 1990 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1991 if (sc->sc_dying) { 1992 err = USBD_IOERROR; 1993 goto ret; 1994 } 1995 v = EOREAD4(sc, port); 1996 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1997 if (v & EHCI_PS_PR) { 1998 printf("%s: port reset timeout\n", 1999 USBDEVNAME(sc->sc_bus.bdev)); 2000 return (USBD_TIMEOUT); 2001 } 2002 if (!(v & EHCI_PS_PE)) { 2003 /* Not a high speed device, give up ownership.*/ 2004 ehci_disown(sc, index, 0); 2005 break; 2006 } 2007 sc->sc_isreset[index] = 1; 2008 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2009 index, v)); 2010 break; 2011 case UHF_PORT_POWER: 2012 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2013 "%d (has PPC = %d)\n", index, 2014 sc->sc_hasppc)); 2015 if (sc->sc_hasppc) 2016 EOWRITE4(sc, port, v | EHCI_PS_PP); 2017 break; 2018 case UHF_PORT_TEST: 2019 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2020 "%d\n", index)); 2021 break; 2022 case UHF_PORT_INDICATOR: 2023 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2024 "%d\n", index)); 2025 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2026 break; 2027 default: 2028 err = USBD_IOERROR; 2029 goto ret; 2030 } 2031 break; 2032 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2033 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2034 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2035 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2036 break; 2037 default: 2038 err = USBD_IOERROR; 2039 goto ret; 2040 } 2041 xfer->actlen = totlen; 2042 err = USBD_NORMAL_COMPLETION; 2043 ret: 2044 xfer->status = err; 2045 s = splusb(); 2046 usb_transfer_complete(xfer); 2047 splx(s); 2048 return (USBD_IN_PROGRESS); 2049 } 2050 2051 void 2052 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2053 { 2054 int port; 2055 u_int32_t v; 2056 2057 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2058 #ifdef DIAGNOSTIC 2059 if (sc->sc_npcomp != 0) { 2060 int i = (index-1) / sc->sc_npcomp; 2061 if (i >= sc->sc_ncomp) 2062 printf("%s: strange port\n", 2063 USBDEVNAME(sc->sc_bus.bdev)); 2064 else 2065 printf("%s: handing over %s speed device on " 2066 "port %d to %s\n", 2067 USBDEVNAME(sc->sc_bus.bdev), 2068 lowspeed ? "low" : "full", 2069 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2070 } else { 2071 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2072 } 2073 #endif 2074 port = EHCI_PORTSC(index); 2075 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2076 EOWRITE4(sc, port, v | EHCI_PS_PO); 2077 } 2078 2079 /* Abort a root control request. */ 2080 Static void 2081 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2082 { 2083 /* Nothing to do, all transfers are synchronous. */ 2084 } 2085 2086 /* Close the root pipe. */ 2087 Static void 2088 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2089 { 2090 DPRINTF(("ehci_root_ctrl_close\n")); 2091 /* Nothing to do. */ 2092 } 2093 2094 void 2095 ehci_root_intr_done(usbd_xfer_handle xfer) 2096 { 2097 xfer->hcpriv = NULL; 2098 } 2099 2100 Static usbd_status 2101 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2102 { 2103 usbd_status err; 2104 2105 /* Insert last in queue. */ 2106 err = usb_insert_transfer(xfer); 2107 if (err) 2108 return (err); 2109 2110 /* Pipe isn't running, start first */ 2111 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2112 } 2113 2114 Static usbd_status 2115 ehci_root_intr_start(usbd_xfer_handle xfer) 2116 { 2117 usbd_pipe_handle pipe = xfer->pipe; 2118 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2119 2120 if (sc->sc_dying) 2121 return (USBD_IOERROR); 2122 2123 sc->sc_intrxfer = xfer; 2124 2125 return (USBD_IN_PROGRESS); 2126 } 2127 2128 /* Abort a root interrupt request. */ 2129 Static void 2130 ehci_root_intr_abort(usbd_xfer_handle xfer) 2131 { 2132 int s; 2133 2134 if (xfer->pipe->intrxfer == xfer) { 2135 DPRINTF(("ehci_root_intr_abort: remove\n")); 2136 xfer->pipe->intrxfer = NULL; 2137 } 2138 xfer->status = USBD_CANCELLED; 2139 s = splusb(); 2140 usb_transfer_complete(xfer); 2141 splx(s); 2142 } 2143 2144 /* Close the root pipe. */ 2145 Static void 2146 ehci_root_intr_close(usbd_pipe_handle pipe) 2147 { 2148 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2149 2150 DPRINTF(("ehci_root_intr_close\n")); 2151 2152 sc->sc_intrxfer = NULL; 2153 } 2154 2155 void 2156 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2157 { 2158 xfer->hcpriv = NULL; 2159 } 2160 2161 /************************/ 2162 2163 ehci_soft_qh_t * 2164 ehci_alloc_sqh(ehci_softc_t *sc) 2165 { 2166 ehci_soft_qh_t *sqh; 2167 usbd_status err; 2168 int i, offs; 2169 usb_dma_t dma; 2170 2171 if (sc->sc_freeqhs == NULL) { 2172 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2173 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2174 EHCI_PAGE_SIZE, &dma); 2175 #ifdef EHCI_DEBUG 2176 if (err) 2177 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2178 #endif 2179 if (err) 2180 return (NULL); 2181 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2182 offs = i * EHCI_SQH_SIZE; 2183 sqh = KERNADDR(&dma, offs); 2184 sqh->physaddr = DMAADDR(&dma, offs); 2185 sqh->next = sc->sc_freeqhs; 2186 sc->sc_freeqhs = sqh; 2187 } 2188 } 2189 sqh = sc->sc_freeqhs; 2190 sc->sc_freeqhs = sqh->next; 2191 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2192 sqh->next = NULL; 2193 return (sqh); 2194 } 2195 2196 void 2197 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2198 { 2199 sqh->next = sc->sc_freeqhs; 2200 sc->sc_freeqhs = sqh; 2201 } 2202 2203 ehci_soft_qtd_t * 2204 ehci_alloc_sqtd(ehci_softc_t *sc) 2205 { 2206 ehci_soft_qtd_t *sqtd; 2207 usbd_status err; 2208 int i, offs; 2209 usb_dma_t dma; 2210 int s; 2211 2212 if (sc->sc_freeqtds == NULL) { 2213 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2214 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2215 EHCI_PAGE_SIZE, &dma); 2216 #ifdef EHCI_DEBUG 2217 if (err) 2218 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2219 #endif 2220 if (err) 2221 return (NULL); 2222 s = splusb(); 2223 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2224 offs = i * EHCI_SQTD_SIZE; 2225 sqtd = KERNADDR(&dma, offs); 2226 sqtd->physaddr = DMAADDR(&dma, offs); 2227 sqtd->nextqtd = sc->sc_freeqtds; 2228 sc->sc_freeqtds = sqtd; 2229 } 2230 splx(s); 2231 } 2232 2233 s = splusb(); 2234 sqtd = sc->sc_freeqtds; 2235 sc->sc_freeqtds = sqtd->nextqtd; 2236 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2237 sqtd->nextqtd = NULL; 2238 sqtd->xfer = NULL; 2239 splx(s); 2240 2241 return (sqtd); 2242 } 2243 2244 void 2245 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2246 { 2247 int s; 2248 2249 s = splusb(); 2250 sqtd->nextqtd = sc->sc_freeqtds; 2251 sc->sc_freeqtds = sqtd; 2252 splx(s); 2253 } 2254 2255 usbd_status 2256 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2257 int alen, int rd, usbd_xfer_handle xfer, 2258 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2259 { 2260 ehci_soft_qtd_t *next, *cur; 2261 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2262 u_int32_t qtdstatus; 2263 int len, curlen, mps; 2264 int i, tog; 2265 usb_dma_t *dma = &xfer->dmabuf; 2266 u_int16_t flags = xfer->flags; 2267 2268 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2269 2270 len = alen; 2271 dataphys = DMAADDR(dma, 0); 2272 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2273 qtdstatus = EHCI_QTD_ACTIVE | 2274 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2275 EHCI_QTD_SET_CERR(3) 2276 /* IOC set below */ 2277 /* BYTES set below */ 2278 ; 2279 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2280 tog = epipe->nexttoggle; 2281 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2282 2283 cur = ehci_alloc_sqtd(sc); 2284 *sp = cur; 2285 if (cur == NULL) 2286 goto nomem; 2287 for (;;) { 2288 dataphyspage = EHCI_PAGE(dataphys); 2289 /* The EHCI hardware can handle at most 5 pages. */ 2290 if (dataphyslastpage - dataphyspage < 2291 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2292 /* we can handle it in this QTD */ 2293 curlen = len; 2294 } else { 2295 /* must use multiple TDs, fill as much as possible. */ 2296 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2297 EHCI_PAGE_OFFSET(dataphys); 2298 #ifdef DIAGNOSTIC 2299 if (curlen > len) { 2300 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2301 "len=0x%x offs=0x%x\n", curlen, len, 2302 EHCI_PAGE_OFFSET(dataphys)); 2303 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2304 dataphyslastpage, dataphyspage, 2305 dataphys); 2306 curlen = len; 2307 } 2308 #endif 2309 /* the length must be a multiple of the max size */ 2310 curlen -= curlen % mps; 2311 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2312 "curlen=%d\n", curlen)); 2313 #ifdef DIAGNOSTIC 2314 if (curlen == 0) 2315 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2316 #endif 2317 } 2318 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2319 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2320 dataphys, dataphyslastpage, 2321 len, curlen)); 2322 len -= curlen; 2323 2324 /* 2325 * Allocate another transfer if there's more data left, 2326 * or if force last short transfer flag is set and we're 2327 * allocating a multiple of the max packet size. 2328 */ 2329 if (len != 0 || 2330 ((curlen % mps) == 0 && !rd && curlen != 0 && 2331 (flags & USBD_FORCE_SHORT_XFER))) { 2332 next = ehci_alloc_sqtd(sc); 2333 if (next == NULL) 2334 goto nomem; 2335 nextphys = htole32(next->physaddr); 2336 } else { 2337 next = NULL; 2338 nextphys = EHCI_NULL; 2339 } 2340 2341 for (i = 0; i * EHCI_PAGE_SIZE < 2342 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2343 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2344 if (i != 0) /* use offset only in first buffer */ 2345 a = EHCI_PAGE(a); 2346 cur->qtd.qtd_buffer[i] = htole32(a); 2347 cur->qtd.qtd_buffer_hi[i] = 0; 2348 #ifdef DIAGNOSTIC 2349 if (i >= EHCI_QTD_NBUFFERS) { 2350 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2351 goto nomem; 2352 } 2353 #endif 2354 } 2355 cur->nextqtd = next; 2356 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2357 cur->qtd.qtd_status = 2358 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2359 cur->xfer = xfer; 2360 cur->len = curlen; 2361 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2362 dataphys, dataphys + curlen)); 2363 /* adjust the toggle based on the number of packets in this 2364 qtd */ 2365 if (((curlen + mps - 1) / mps) & 1) { 2366 tog ^= 1; 2367 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2368 } 2369 if (next == NULL) 2370 break; 2371 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2372 dataphys += curlen; 2373 cur = next; 2374 } 2375 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2376 *ep = cur; 2377 epipe->nexttoggle = tog; 2378 2379 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2380 *sp, *ep)); 2381 2382 return (USBD_NORMAL_COMPLETION); 2383 2384 nomem: 2385 /* XXX free chain */ 2386 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2387 return (USBD_NOMEM); 2388 } 2389 2390 Static void 2391 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2392 ehci_soft_qtd_t *sqtdend) 2393 { 2394 ehci_soft_qtd_t *p; 2395 int i; 2396 2397 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2398 sqtd, sqtdend)); 2399 2400 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2401 p = sqtd->nextqtd; 2402 ehci_free_sqtd(sc, sqtd); 2403 } 2404 } 2405 2406 /****************/ 2407 2408 /* 2409 * Close a reqular pipe. 2410 * Assumes that there are no pending transactions. 2411 */ 2412 void 2413 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2414 { 2415 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2416 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2417 ehci_soft_qh_t *sqh = epipe->sqh; 2418 int s; 2419 2420 s = splusb(); 2421 ehci_rem_qh(sc, sqh, head); 2422 splx(s); 2423 ehci_free_sqh(sc, epipe->sqh); 2424 } 2425 2426 /* 2427 * Abort a device request. 2428 * If this routine is called at splusb() it guarantees that the request 2429 * will be removed from the hardware scheduling and that the callback 2430 * for it will be called with USBD_CANCELLED status. 2431 * It's impossible to guarantee that the requested transfer will not 2432 * have happened since the hardware runs concurrently. 2433 * If the transaction has already happened we rely on the ordinary 2434 * interrupt processing to process it. 2435 * XXX This is most probably wrong. 2436 */ 2437 void 2438 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2439 { 2440 #define exfer EXFER(xfer) 2441 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2442 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2443 ehci_soft_qh_t *sqh = epipe->sqh; 2444 ehci_soft_qtd_t *sqtd; 2445 ehci_physaddr_t cur; 2446 u_int32_t qhstatus; 2447 int s; 2448 int hit; 2449 int wake; 2450 2451 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2452 2453 if (sc->sc_dying) { 2454 /* If we're dying, just do the software part. */ 2455 s = splusb(); 2456 xfer->status = status; /* make software ignore it */ 2457 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2458 usb_transfer_complete(xfer); 2459 splx(s); 2460 return; 2461 } 2462 2463 if (xfer->device->bus->intr_context || !curproc) 2464 panic("ehci_abort_xfer: not in process context"); 2465 2466 /* 2467 * If an abort is already in progress then just wait for it to 2468 * complete and return. 2469 */ 2470 if (xfer->hcflags & UXFER_ABORTING) { 2471 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2472 #ifdef DIAGNOSTIC 2473 if (status == USBD_TIMEOUT) 2474 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2475 #endif 2476 /* Override the status which might be USBD_TIMEOUT. */ 2477 xfer->status = status; 2478 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2479 xfer->hcflags |= UXFER_ABORTWAIT; 2480 while (xfer->hcflags & UXFER_ABORTING) 2481 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2482 return; 2483 } 2484 xfer->hcflags |= UXFER_ABORTING; 2485 2486 /* 2487 * Step 1: Make interrupt routine and hardware ignore xfer. 2488 */ 2489 s = splusb(); 2490 xfer->status = status; /* make software ignore it */ 2491 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2492 qhstatus = sqh->qh.qh_qtd.qtd_status; 2493 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2494 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2495 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2496 if (sqtd == exfer->sqtdend) 2497 break; 2498 } 2499 splx(s); 2500 2501 /* 2502 * Step 2: Wait until we know hardware has finished any possible 2503 * use of the xfer. Also make sure the soft interrupt routine 2504 * has run. 2505 */ 2506 ehci_sync_hc(sc); 2507 s = splusb(); 2508 #ifdef USB_USE_SOFTINTR 2509 sc->sc_softwake = 1; 2510 #endif /* USB_USE_SOFTINTR */ 2511 usb_schedsoftintr(&sc->sc_bus); 2512 #ifdef USB_USE_SOFTINTR 2513 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2514 #endif /* USB_USE_SOFTINTR */ 2515 splx(s); 2516 2517 /* 2518 * Step 3: Remove any vestiges of the xfer from the hardware. 2519 * The complication here is that the hardware may have executed 2520 * beyond the xfer we're trying to abort. So as we're scanning 2521 * the TDs of this xfer we check if the hardware points to 2522 * any of them. 2523 */ 2524 s = splusb(); /* XXX why? */ 2525 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2526 hit = 0; 2527 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2528 hit |= cur == sqtd->physaddr; 2529 if (sqtd == exfer->sqtdend) 2530 break; 2531 } 2532 sqtd = sqtd->nextqtd; 2533 /* Zap curqtd register if hardware pointed inside the xfer. */ 2534 if (hit && sqtd != NULL) { 2535 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2536 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2537 sqh->qh.qh_qtd.qtd_status = qhstatus; 2538 } else { 2539 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2540 } 2541 2542 /* 2543 * Step 4: Execute callback. 2544 */ 2545 #ifdef DIAGNOSTIC 2546 exfer->isdone = 1; 2547 #endif 2548 wake = xfer->hcflags & UXFER_ABORTWAIT; 2549 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2550 usb_transfer_complete(xfer); 2551 if (wake) 2552 wakeup(&xfer->hcflags); 2553 2554 splx(s); 2555 #undef exfer 2556 } 2557 2558 void 2559 ehci_timeout(void *addr) 2560 { 2561 struct ehci_xfer *exfer = addr; 2562 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2563 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2564 2565 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2566 #ifdef USB_DEBUG 2567 if (ehcidebug > 1) 2568 usbd_dump_pipe(exfer->xfer.pipe); 2569 #endif 2570 2571 if (sc->sc_dying) { 2572 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2573 return; 2574 } 2575 2576 /* Execute the abort in a process context. */ 2577 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2578 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2579 USB_TASKQ_HC); 2580 } 2581 2582 void 2583 ehci_timeout_task(void *addr) 2584 { 2585 usbd_xfer_handle xfer = addr; 2586 int s; 2587 2588 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2589 2590 s = splusb(); 2591 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2592 splx(s); 2593 } 2594 2595 /************************/ 2596 2597 Static usbd_status 2598 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2599 { 2600 usbd_status err; 2601 2602 /* Insert last in queue. */ 2603 err = usb_insert_transfer(xfer); 2604 if (err) 2605 return (err); 2606 2607 /* Pipe isn't running, start first */ 2608 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2609 } 2610 2611 Static usbd_status 2612 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2613 { 2614 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2615 usbd_status err; 2616 2617 if (sc->sc_dying) 2618 return (USBD_IOERROR); 2619 2620 #ifdef DIAGNOSTIC 2621 if (!(xfer->rqflags & URQ_REQUEST)) { 2622 /* XXX panic */ 2623 printf("ehci_device_ctrl_transfer: not a request\n"); 2624 return (USBD_INVAL); 2625 } 2626 #endif 2627 2628 err = ehci_device_request(xfer); 2629 if (err) 2630 return (err); 2631 2632 if (sc->sc_bus.use_polling) 2633 ehci_waitintr(sc, xfer); 2634 return (USBD_IN_PROGRESS); 2635 } 2636 2637 void 2638 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2639 { 2640 struct ehci_xfer *ex = EXFER(xfer); 2641 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2642 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2643 2644 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2645 2646 #ifdef DIAGNOSTIC 2647 if (!(xfer->rqflags & URQ_REQUEST)) { 2648 panic("ehci_ctrl_done: not a request"); 2649 } 2650 #endif 2651 2652 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2653 ehci_del_intr_list(ex); /* remove from active list */ 2654 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2655 } 2656 2657 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2658 } 2659 2660 /* Abort a device control request. */ 2661 Static void 2662 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2663 { 2664 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2665 ehci_abort_xfer(xfer, USBD_CANCELLED); 2666 } 2667 2668 /* Close a device control pipe. */ 2669 Static void 2670 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2671 { 2672 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2673 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2674 2675 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2676 ehci_close_pipe(pipe, sc->sc_async_head); 2677 } 2678 2679 usbd_status 2680 ehci_device_request(usbd_xfer_handle xfer) 2681 { 2682 #define exfer EXFER(xfer) 2683 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2684 usb_device_request_t *req = &xfer->request; 2685 usbd_device_handle dev = epipe->pipe.device; 2686 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2687 int addr = dev->address; 2688 ehci_soft_qtd_t *setup, *stat, *next; 2689 ehci_soft_qh_t *sqh; 2690 int isread; 2691 int len; 2692 usbd_status err; 2693 int s; 2694 2695 isread = req->bmRequestType & UT_READ; 2696 len = UGETW(req->wLength); 2697 2698 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2699 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2700 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2701 UGETW(req->wIndex), len, addr, 2702 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2703 2704 setup = ehci_alloc_sqtd(sc); 2705 if (setup == NULL) { 2706 err = USBD_NOMEM; 2707 goto bad1; 2708 } 2709 stat = ehci_alloc_sqtd(sc); 2710 if (stat == NULL) { 2711 err = USBD_NOMEM; 2712 goto bad2; 2713 } 2714 2715 sqh = epipe->sqh; 2716 epipe->u.ctl.length = len; 2717 2718 /* Update device address and length since they may have changed 2719 during the setup of the control pipe in usbd_new_device(). */ 2720 /* XXX This only needs to be done once, but it's too early in open. */ 2721 /* XXXX Should not touch ED here! */ 2722 sqh->qh.qh_endp = 2723 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2724 htole32( 2725 EHCI_QH_SET_ADDR(addr) | 2726 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2727 ); 2728 2729 /* Set up data transaction */ 2730 if (len != 0) { 2731 ehci_soft_qtd_t *end; 2732 2733 /* Start toggle at 1. */ 2734 epipe->nexttoggle = 1; 2735 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2736 &next, &end); 2737 if (err) 2738 goto bad3; 2739 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2740 end->nextqtd = stat; 2741 end->qtd.qtd_next = 2742 end->qtd.qtd_altnext = htole32(stat->physaddr); 2743 } else { 2744 next = stat; 2745 } 2746 2747 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2748 2749 /* Clear toggle */ 2750 setup->qtd.qtd_status = htole32( 2751 EHCI_QTD_ACTIVE | 2752 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2753 EHCI_QTD_SET_CERR(3) | 2754 EHCI_QTD_SET_TOGGLE(0) | 2755 EHCI_QTD_SET_BYTES(sizeof *req) 2756 ); 2757 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2758 setup->qtd.qtd_buffer_hi[0] = 0; 2759 setup->nextqtd = next; 2760 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2761 setup->xfer = xfer; 2762 setup->len = sizeof *req; 2763 2764 stat->qtd.qtd_status = htole32( 2765 EHCI_QTD_ACTIVE | 2766 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2767 EHCI_QTD_SET_CERR(3) | 2768 EHCI_QTD_SET_TOGGLE(1) | 2769 EHCI_QTD_IOC 2770 ); 2771 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2772 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2773 stat->nextqtd = NULL; 2774 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2775 stat->xfer = xfer; 2776 stat->len = 0; 2777 2778 #ifdef EHCI_DEBUG 2779 if (ehcidebug > 5) { 2780 DPRINTF(("ehci_device_request:\n")); 2781 ehci_dump_sqh(sqh); 2782 ehci_dump_sqtds(setup); 2783 } 2784 #endif 2785 2786 exfer->sqtdstart = setup; 2787 exfer->sqtdend = stat; 2788 #ifdef DIAGNOSTIC 2789 if (!exfer->isdone) { 2790 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2791 } 2792 exfer->isdone = 0; 2793 #endif 2794 2795 /* Insert qTD in QH list. */ 2796 s = splusb(); 2797 ehci_set_qh_qtd(sqh, setup); 2798 if (xfer->timeout && !sc->sc_bus.use_polling) { 2799 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2800 ehci_timeout, xfer); 2801 } 2802 ehci_add_intr_list(sc, exfer); 2803 xfer->status = USBD_IN_PROGRESS; 2804 splx(s); 2805 2806 #ifdef EHCI_DEBUG 2807 if (ehcidebug > 10) { 2808 DPRINTF(("ehci_device_request: status=%x\n", 2809 EOREAD4(sc, EHCI_USBSTS))); 2810 delay(10000); 2811 ehci_dump_regs(sc); 2812 ehci_dump_sqh(sc->sc_async_head); 2813 ehci_dump_sqh(sqh); 2814 ehci_dump_sqtds(setup); 2815 } 2816 #endif 2817 2818 return (USBD_NORMAL_COMPLETION); 2819 2820 bad3: 2821 ehci_free_sqtd(sc, stat); 2822 bad2: 2823 ehci_free_sqtd(sc, setup); 2824 bad1: 2825 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2826 xfer->status = err; 2827 usb_transfer_complete(xfer); 2828 return (err); 2829 #undef exfer 2830 } 2831 2832 /* 2833 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2834 * qTD status, or miss signalling occasionally under heavy load. If the host 2835 * machine is too fast, we we can miss transaction completion - when we scan 2836 * the active list the transaction still seems to be active. This generally 2837 * exhibits itself as a umass stall that never recovers. 2838 * 2839 * We work around this behaviour by setting up this callback after any softintr 2840 * that completes with transactions still pending, giving us another chance to 2841 * check for completion after the writeback has taken place. 2842 */ 2843 void 2844 ehci_intrlist_timeout(void *arg) 2845 { 2846 ehci_softc_t *sc = arg; 2847 int s = splusb(); 2848 2849 DPRINTF(("ehci_intrlist_timeout\n")); 2850 usb_schedsoftintr(&sc->sc_bus); 2851 2852 splx(s); 2853 } 2854 2855 /************************/ 2856 2857 Static usbd_status 2858 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2859 { 2860 usbd_status err; 2861 2862 /* Insert last in queue. */ 2863 err = usb_insert_transfer(xfer); 2864 if (err) 2865 return (err); 2866 2867 /* Pipe isn't running, start first */ 2868 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2869 } 2870 2871 usbd_status 2872 ehci_device_bulk_start(usbd_xfer_handle xfer) 2873 { 2874 #define exfer EXFER(xfer) 2875 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2876 usbd_device_handle dev = epipe->pipe.device; 2877 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2878 ehci_soft_qtd_t *data, *dataend; 2879 ehci_soft_qh_t *sqh; 2880 usbd_status err; 2881 int len, isread, endpt; 2882 int s; 2883 2884 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2885 xfer, xfer->length, xfer->flags)); 2886 2887 if (sc->sc_dying) 2888 return (USBD_IOERROR); 2889 2890 #ifdef DIAGNOSTIC 2891 if (xfer->rqflags & URQ_REQUEST) 2892 panic("ehci_device_bulk_start: a request"); 2893 #endif 2894 2895 len = xfer->length; 2896 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2897 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2898 sqh = epipe->sqh; 2899 2900 epipe->u.bulk.length = len; 2901 2902 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2903 &dataend); 2904 if (err) { 2905 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2906 xfer->status = err; 2907 usb_transfer_complete(xfer); 2908 return (err); 2909 } 2910 2911 #ifdef EHCI_DEBUG 2912 if (ehcidebug > 5) { 2913 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2914 ehci_dump_sqh(sqh); 2915 ehci_dump_sqtds(data); 2916 } 2917 #endif 2918 2919 /* Set up interrupt info. */ 2920 exfer->sqtdstart = data; 2921 exfer->sqtdend = dataend; 2922 #ifdef DIAGNOSTIC 2923 if (!exfer->isdone) { 2924 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2925 } 2926 exfer->isdone = 0; 2927 #endif 2928 2929 s = splusb(); 2930 ehci_set_qh_qtd(sqh, data); 2931 if (xfer->timeout && !sc->sc_bus.use_polling) { 2932 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2933 ehci_timeout, xfer); 2934 } 2935 ehci_add_intr_list(sc, exfer); 2936 xfer->status = USBD_IN_PROGRESS; 2937 splx(s); 2938 2939 #ifdef EHCI_DEBUG 2940 if (ehcidebug > 10) { 2941 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2942 delay(10000); 2943 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2944 ehci_dump_regs(sc); 2945 #if 0 2946 printf("async_head:\n"); 2947 ehci_dump_sqh(sc->sc_async_head); 2948 #endif 2949 printf("sqh:\n"); 2950 ehci_dump_sqh(sqh); 2951 ehci_dump_sqtds(data); 2952 } 2953 #endif 2954 2955 if (sc->sc_bus.use_polling) 2956 ehci_waitintr(sc, xfer); 2957 2958 return (USBD_IN_PROGRESS); 2959 #undef exfer 2960 } 2961 2962 Static void 2963 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2964 { 2965 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2966 ehci_abort_xfer(xfer, USBD_CANCELLED); 2967 } 2968 2969 /* 2970 * Close a device bulk pipe. 2971 */ 2972 Static void 2973 ehci_device_bulk_close(usbd_pipe_handle pipe) 2974 { 2975 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2976 2977 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2978 ehci_close_pipe(pipe, sc->sc_async_head); 2979 } 2980 2981 void 2982 ehci_device_bulk_done(usbd_xfer_handle xfer) 2983 { 2984 struct ehci_xfer *ex = EXFER(xfer); 2985 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2986 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2987 2988 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2989 xfer, xfer->actlen)); 2990 2991 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2992 ehci_del_intr_list(ex); /* remove from active list */ 2993 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2994 } 2995 2996 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2997 } 2998 2999 /************************/ 3000 3001 Static usbd_status 3002 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3003 { 3004 struct ehci_soft_islot *isp; 3005 int islot, lev; 3006 3007 /* Find a poll rate that is large enough. */ 3008 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3009 if (EHCI_ILEV_IVAL(lev) <= ival) 3010 break; 3011 3012 /* Pick an interrupt slot at the right level. */ 3013 /* XXX could do better than picking at random */ 3014 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3015 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3016 3017 sqh->islot = islot; 3018 isp = &sc->sc_islots[islot]; 3019 ehci_add_qh(sqh, isp->sqh); 3020 3021 return (USBD_NORMAL_COMPLETION); 3022 } 3023 3024 Static usbd_status 3025 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3026 { 3027 usbd_status err; 3028 3029 /* Insert last in queue. */ 3030 err = usb_insert_transfer(xfer); 3031 if (err) 3032 return (err); 3033 3034 /* 3035 * Pipe isn't running (otherwise err would be USBD_INPROG), 3036 * so start it first. 3037 */ 3038 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3039 } 3040 3041 Static usbd_status 3042 ehci_device_intr_start(usbd_xfer_handle xfer) 3043 { 3044 #define exfer EXFER(xfer) 3045 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3046 usbd_device_handle dev = xfer->pipe->device; 3047 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3048 ehci_soft_qtd_t *data, *dataend; 3049 ehci_soft_qh_t *sqh; 3050 usbd_status err; 3051 int len, isread, endpt; 3052 int s; 3053 3054 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3055 xfer, xfer->length, xfer->flags)); 3056 3057 if (sc->sc_dying) 3058 return (USBD_IOERROR); 3059 3060 #ifdef DIAGNOSTIC 3061 if (xfer->rqflags & URQ_REQUEST) 3062 panic("ehci_device_intr_start: a request"); 3063 #endif 3064 3065 len = xfer->length; 3066 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3067 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3068 sqh = epipe->sqh; 3069 3070 epipe->u.intr.length = len; 3071 3072 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3073 &dataend); 3074 if (err) { 3075 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3076 xfer->status = err; 3077 usb_transfer_complete(xfer); 3078 return (err); 3079 } 3080 3081 #ifdef EHCI_DEBUG 3082 if (ehcidebug > 5) { 3083 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3084 ehci_dump_sqh(sqh); 3085 ehci_dump_sqtds(data); 3086 } 3087 #endif 3088 3089 /* Set up interrupt info. */ 3090 exfer->sqtdstart = data; 3091 exfer->sqtdend = dataend; 3092 #ifdef DIAGNOSTIC 3093 if (!exfer->isdone) { 3094 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3095 } 3096 exfer->isdone = 0; 3097 #endif 3098 3099 s = splusb(); 3100 ehci_set_qh_qtd(sqh, data); 3101 if (xfer->timeout && !sc->sc_bus.use_polling) { 3102 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3103 ehci_timeout, xfer); 3104 } 3105 ehci_add_intr_list(sc, exfer); 3106 xfer->status = USBD_IN_PROGRESS; 3107 splx(s); 3108 3109 #ifdef EHCI_DEBUG 3110 if (ehcidebug > 10) { 3111 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3112 delay(10000); 3113 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3114 ehci_dump_regs(sc); 3115 printf("sqh:\n"); 3116 ehci_dump_sqh(sqh); 3117 ehci_dump_sqtds(data); 3118 } 3119 #endif 3120 3121 if (sc->sc_bus.use_polling) 3122 ehci_waitintr(sc, xfer); 3123 3124 return (USBD_IN_PROGRESS); 3125 #undef exfer 3126 } 3127 3128 Static void 3129 ehci_device_intr_abort(usbd_xfer_handle xfer) 3130 { 3131 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3132 if (xfer->pipe->intrxfer == xfer) { 3133 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3134 xfer->pipe->intrxfer = NULL; 3135 } 3136 ehci_abort_xfer(xfer, USBD_CANCELLED); 3137 } 3138 3139 Static void 3140 ehci_device_intr_close(usbd_pipe_handle pipe) 3141 { 3142 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3143 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3144 struct ehci_soft_islot *isp; 3145 3146 isp = &sc->sc_islots[epipe->sqh->islot]; 3147 ehci_close_pipe(pipe, isp->sqh); 3148 } 3149 3150 Static void 3151 ehci_device_intr_done(usbd_xfer_handle xfer) 3152 { 3153 #define exfer EXFER(xfer) 3154 struct ehci_xfer *ex = EXFER(xfer); 3155 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3156 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3157 ehci_soft_qtd_t *data, *dataend; 3158 ehci_soft_qh_t *sqh; 3159 usbd_status err; 3160 int len, isread, endpt, s; 3161 3162 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3163 xfer, xfer->actlen)); 3164 3165 if (xfer->pipe->repeat) { 3166 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3167 3168 len = epipe->u.intr.length; 3169 xfer->length = len; 3170 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3171 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3172 sqh = epipe->sqh; 3173 3174 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3175 &data, &dataend); 3176 if (err) { 3177 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3178 xfer->status = err; 3179 return; 3180 } 3181 3182 /* Set up interrupt info. */ 3183 exfer->sqtdstart = data; 3184 exfer->sqtdend = dataend; 3185 #ifdef DIAGNOSTIC 3186 if (!exfer->isdone) { 3187 printf("ehci_device_intr_done: not done, ex=%p\n", 3188 exfer); 3189 } 3190 exfer->isdone = 0; 3191 #endif 3192 3193 s = splusb(); 3194 ehci_set_qh_qtd(sqh, data); 3195 if (xfer->timeout && !sc->sc_bus.use_polling) { 3196 usb_callout(xfer->timeout_handle, 3197 mstohz(xfer->timeout), ehci_timeout, xfer); 3198 } 3199 splx(s); 3200 3201 xfer->status = USBD_IN_PROGRESS; 3202 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3203 ehci_del_intr_list(ex); /* remove from active list */ 3204 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3205 } 3206 #undef exfer 3207 } 3208 3209 /************************/ 3210 3211 Static usbd_status 3212 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3213 { 3214 return USBD_IOERROR; 3215 } 3216 Static usbd_status 3217 ehci_device_isoc_start(usbd_xfer_handle xfer) 3218 { 3219 return USBD_IOERROR; 3220 } 3221 Static void 3222 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3223 { 3224 } 3225 Static void 3226 ehci_device_isoc_close(usbd_pipe_handle pipe) 3227 { 3228 } 3229 Static void 3230 ehci_device_isoc_done(usbd_xfer_handle xfer) 3231 { 3232 } 3233
Indexes created Mon Sep 22 13:09:51 GMT 2025