ehci.c revision 1.123.18.1
1 /* $NetBSD: ehci.c,v 1.123.18.1 2007/08/03 22:17:25 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.18.1 2007/08/03 22:17:25 jmcneill Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 189 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 190 Static void ehci_disown(ehci_softc_t *, int, int); 191 192 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 193 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 194 195 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 196 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 197 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 198 ehci_softc_t *, int, int, usbd_xfer_handle, 199 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 200 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 201 ehci_soft_qtd_t *); 202 203 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 204 205 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 206 int ival); 207 208 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 209 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 210 ehci_soft_qh_t *); 211 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 212 Static void ehci_sync_hc(ehci_softc_t *); 213 214 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 215 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 #ifdef EHCI_DEBUG 218 Static void ehci_dump_regs(ehci_softc_t *); 219 void ehci_dump(void); 220 Static ehci_softc_t *theehci; 221 Static void ehci_dump_link(ehci_link_t, int); 222 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 223 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 224 Static void ehci_dump_qtd(ehci_qtd_t *); 225 Static void ehci_dump_sqh(ehci_soft_qh_t *); 226 #ifdef DIAGNOSTIC 227 Static void ehci_dump_exfer(struct ehci_xfer *); 228 #endif 229 #endif 230 231 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 232 233 #define EHCI_INTR_ENDPT 1 234 235 #define ehci_add_intr_list(sc, ex) \ 236 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 237 #define ehci_del_intr_list(ex) \ 238 do { \ 239 LIST_REMOVE((ex), inext); \ 240 (ex)->inext.le_prev = NULL; \ 241 } while (0) 242 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 243 244 Static const struct usbd_bus_methods ehci_bus_methods = { 245 ehci_open, 246 ehci_softintr, 247 ehci_poll, 248 ehci_allocm, 249 ehci_freem, 250 ehci_allocx, 251 ehci_freex, 252 }; 253 254 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 255 ehci_root_ctrl_transfer, 256 ehci_root_ctrl_start, 257 ehci_root_ctrl_abort, 258 ehci_root_ctrl_close, 259 ehci_noop, 260 ehci_root_ctrl_done, 261 }; 262 263 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 264 ehci_root_intr_transfer, 265 ehci_root_intr_start, 266 ehci_root_intr_abort, 267 ehci_root_intr_close, 268 ehci_noop, 269 ehci_root_intr_done, 270 }; 271 272 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 273 ehci_device_ctrl_transfer, 274 ehci_device_ctrl_start, 275 ehci_device_ctrl_abort, 276 ehci_device_ctrl_close, 277 ehci_noop, 278 ehci_device_ctrl_done, 279 }; 280 281 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 282 ehci_device_intr_transfer, 283 ehci_device_intr_start, 284 ehci_device_intr_abort, 285 ehci_device_intr_close, 286 ehci_device_clear_toggle, 287 ehci_device_intr_done, 288 }; 289 290 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 291 ehci_device_bulk_transfer, 292 ehci_device_bulk_start, 293 ehci_device_bulk_abort, 294 ehci_device_bulk_close, 295 ehci_device_clear_toggle, 296 ehci_device_bulk_done, 297 }; 298 299 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 300 ehci_device_isoc_transfer, 301 ehci_device_isoc_start, 302 ehci_device_isoc_abort, 303 ehci_device_isoc_close, 304 ehci_noop, 305 ehci_device_isoc_done, 306 }; 307 308 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 309 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 310 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 311 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 312 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 313 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 314 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 315 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 316 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 317 }; 318 319 usbd_status 320 ehci_init(ehci_softc_t *sc) 321 { 322 u_int32_t vers, sparams, cparams, hcr; 323 u_int i; 324 usbd_status err; 325 ehci_soft_qh_t *sqh; 326 u_int ncomp; 327 328 DPRINTF(("ehci_init: start\n")); 329 #ifdef EHCI_DEBUG 330 theehci = sc; 331 #endif 332 333 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 334 335 vers = EREAD2(sc, EHCI_HCIVERSION); 336 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 337 vers >> 8, vers & 0xff); 338 339 sparams = EREAD4(sc, EHCI_HCSPARAMS); 340 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 341 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 342 ncomp = EHCI_HCS_N_CC(sparams); 343 if (ncomp != sc->sc_ncomp) { 344 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 345 USBDEVNAME(sc->sc_bus.bdev), 346 ncomp, sc->sc_ncomp); 347 #if NOHCI == 0 || NUHCI == 0 348 aprint_error("%s: ohci or uhci probably not configured\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 #endif 351 if (ncomp < sc->sc_ncomp) 352 sc->sc_ncomp = ncomp; 353 } 354 if (sc->sc_ncomp > 0) { 355 aprint_normal("%s: companion controller%s, %d port%s each:", 356 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 357 EHCI_HCS_N_PCC(sparams), 358 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 359 for (i = 0; i < sc->sc_ncomp; i++) 360 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 361 aprint_normal("\n"); 362 } 363 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 364 cparams = EREAD4(sc, EHCI_HCCPARAMS); 365 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 366 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 367 368 if (EHCI_HCC_64BIT(cparams)) { 369 /* MUST clear segment register if 64 bit capable. */ 370 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 371 } 372 373 sc->sc_bus.usbrev = USBREV_2_0; 374 375 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 376 USB_MEM_RESERVE); 377 378 /* Reset the controller */ 379 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 380 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 381 usb_delay_ms(&sc->sc_bus, 1); 382 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 383 for (i = 0; i < 100; i++) { 384 usb_delay_ms(&sc->sc_bus, 1); 385 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 386 if (!hcr) 387 break; 388 } 389 if (hcr) { 390 aprint_error("%s: reset timeout\n", 391 USBDEVNAME(sc->sc_bus.bdev)); 392 return (USBD_IOERROR); 393 } 394 395 /* XXX need proper intr scheduling */ 396 sc->sc_rand = 96; 397 398 /* frame list size at default, read back what we got and use that */ 399 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 400 case 0: sc->sc_flsize = 1024; break; 401 case 1: sc->sc_flsize = 512; break; 402 case 2: sc->sc_flsize = 256; break; 403 case 3: return (USBD_IOERROR); 404 } 405 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 406 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 407 if (err) 408 return (err); 409 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 410 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 411 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 412 413 /* Set up the bus struct. */ 414 sc->sc_bus.methods = &ehci_bus_methods; 415 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 416 417 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 418 419 sc->sc_eintrs = EHCI_NORMAL_INTRS; 420 421 /* 422 * Allocate the interrupt dummy QHs. These are arranged to give poll 423 * intervals that are powers of 2 times 1ms. 424 */ 425 for (i = 0; i < EHCI_INTRQHS; i++) { 426 sqh = ehci_alloc_sqh(sc); 427 if (sqh == NULL) { 428 err = USBD_NOMEM; 429 goto bad1; 430 } 431 sc->sc_islots[i].sqh = sqh; 432 } 433 for (i = 0; i < EHCI_INTRQHS; i++) { 434 sqh = sc->sc_islots[i].sqh; 435 if (i == 0) { 436 /* The last (1ms) QH terminates. */ 437 sqh->qh.qh_link = EHCI_NULL; 438 sqh->next = NULL; 439 } else { 440 /* Otherwise the next QH has half the poll interval */ 441 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 442 sqh->qh.qh_link = htole32(sqh->next->physaddr | 443 EHCI_LINK_QH); 444 } 445 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 446 sqh->qh.qh_curqtd = EHCI_NULL; 447 sqh->next = NULL; 448 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 449 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 451 sqh->sqtd = NULL; 452 } 453 /* Point the frame list at the last level (128ms). */ 454 for (i = 0; i < sc->sc_flsize; i++) { 455 int j; 456 457 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 458 revbits[i & (EHCI_MAX_POLLRATE-1)]; 459 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 460 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 461 i)].sqh->physaddr); 462 } 463 464 /* Allocate dummy QH that starts the async list. */ 465 sqh = ehci_alloc_sqh(sc); 466 if (sqh == NULL) { 467 err = USBD_NOMEM; 468 goto bad1; 469 } 470 /* Fill the QH */ 471 sqh->qh.qh_endp = 472 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 473 sqh->qh.qh_link = 474 htole32(sqh->physaddr | EHCI_LINK_QH); 475 sqh->qh.qh_curqtd = EHCI_NULL; 476 sqh->next = NULL; 477 /* Fill the overlay qTD */ 478 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 479 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 481 sqh->sqtd = NULL; 482 #ifdef EHCI_DEBUG 483 if (ehcidebug) { 484 ehci_dump_sqh(sqh); 485 } 486 #endif 487 488 /* Point to async list */ 489 sc->sc_async_head = sqh; 490 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 491 492 usb_callout_init(sc->sc_tmo_intrlist); 493 494 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 495 496 /* Turn on controller */ 497 EOWRITE4(sc, EHCI_USBCMD, 498 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 499 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 500 EHCI_CMD_ASE | 501 EHCI_CMD_PSE | 502 EHCI_CMD_RS); 503 504 /* Take over port ownership */ 505 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 506 507 for (i = 0; i < 100; i++) { 508 usb_delay_ms(&sc->sc_bus, 1); 509 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 510 if (!hcr) 511 break; 512 } 513 if (hcr) { 514 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 515 return (USBD_IOERROR); 516 } 517 518 /* Enable interrupts */ 519 DPRINTFN(1,("ehci_init: enabling\n")); 520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 521 522 return (USBD_NORMAL_COMPLETION); 523 524 #if 0 525 bad2: 526 ehci_free_sqh(sc, sc->sc_async_head); 527 #endif 528 bad1: 529 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 530 return (err); 531 } 532 533 int 534 ehci_intr(void *v) 535 { 536 ehci_softc_t *sc = v; 537 538 if (sc == NULL || sc->sc_dying) 539 return (0); 540 541 /* If we get an interrupt while polling, then just ignore it. */ 542 if (sc->sc_bus.use_polling) { 543 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 544 545 if (intrs) 546 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 547 #ifdef DIAGNOSTIC 548 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 549 #endif 550 return (0); 551 } 552 553 return (ehci_intr1(sc)); 554 } 555 556 Static int 557 ehci_intr1(ehci_softc_t *sc) 558 { 559 u_int32_t intrs, eintrs; 560 561 DPRINTFN(20,("ehci_intr1: enter\n")); 562 563 /* In case the interrupt occurs before initialization has completed. */ 564 if (sc == NULL) { 565 #ifdef DIAGNOSTIC 566 printf("ehci_intr1: sc == NULL\n"); 567 #endif 568 return (0); 569 } 570 571 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 572 if (!intrs) 573 return (0); 574 575 eintrs = intrs & sc->sc_eintrs; 576 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 577 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 578 (u_int)eintrs)); 579 if (!eintrs) 580 return (0); 581 582 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 583 sc->sc_bus.intr_context++; 584 sc->sc_bus.no_intrs++; 585 if (eintrs & EHCI_STS_IAA) { 586 DPRINTF(("ehci_intr1: door bell\n")); 587 wakeup(&sc->sc_async_head); 588 eintrs &= ~EHCI_STS_IAA; 589 } 590 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 591 DPRINTFN(5,("ehci_intr1: %s %s\n", 592 eintrs & EHCI_STS_INT ? "INT" : "", 593 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 594 usb_schedsoftintr(&sc->sc_bus); 595 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 596 } 597 if (eintrs & EHCI_STS_HSE) { 598 printf("%s: unrecoverable error, controller halted\n", 599 USBDEVNAME(sc->sc_bus.bdev)); 600 /* XXX what else */ 601 } 602 if (eintrs & EHCI_STS_PCD) { 603 ehci_pcd(sc, sc->sc_intrxfer); 604 eintrs &= ~EHCI_STS_PCD; 605 } 606 607 sc->sc_bus.intr_context--; 608 609 if (eintrs != 0) { 610 /* Block unprocessed interrupts. */ 611 sc->sc_eintrs &= ~eintrs; 612 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 613 printf("%s: blocking intrs 0x%x\n", 614 USBDEVNAME(sc->sc_bus.bdev), eintrs); 615 } 616 617 return (1); 618 } 619 620 621 void 622 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 623 { 624 usbd_pipe_handle pipe; 625 u_char *p; 626 int i, m; 627 628 if (xfer == NULL) { 629 /* Just ignore the change. */ 630 return; 631 } 632 633 pipe = xfer->pipe; 634 635 p = KERNADDR(&xfer->dmabuf, 0); 636 m = min(sc->sc_noport, xfer->length * 8 - 1); 637 memset(p, 0, xfer->length); 638 for (i = 1; i <= m; i++) { 639 /* Pick out CHANGE bits from the status reg. */ 640 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 641 p[i/8] |= 1 << (i%8); 642 } 643 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 644 xfer->actlen = xfer->length; 645 xfer->status = USBD_NORMAL_COMPLETION; 646 647 usb_transfer_complete(xfer); 648 } 649 650 void 651 ehci_softintr(void *v) 652 { 653 ehci_softc_t *sc = v; 654 struct ehci_xfer *ex, *nextex; 655 656 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 657 sc->sc_bus.intr_context)); 658 659 sc->sc_bus.intr_context++; 660 661 /* 662 * The only explanation I can think of for why EHCI is as brain dead 663 * as UHCI interrupt-wise is that Intel was involved in both. 664 * An interrupt just tells us that something is done, we have no 665 * clue what, so we need to scan through all active transfers. :-( 666 */ 667 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 668 nextex = LIST_NEXT(ex, inext); 669 ehci_check_intr(sc, ex); 670 } 671 672 /* Schedule a callout to catch any dropped transactions. */ 673 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 674 !LIST_EMPTY(&sc->sc_intrhead)) 675 usb_callout(sc->sc_tmo_intrlist, hz, 676 ehci_intrlist_timeout, sc); 677 678 #ifdef USB_USE_SOFTINTR 679 if (sc->sc_softwake) { 680 sc->sc_softwake = 0; 681 wakeup(&sc->sc_softwake); 682 } 683 #endif /* USB_USE_SOFTINTR */ 684 685 sc->sc_bus.intr_context--; 686 } 687 688 /* Check for an interrupt. */ 689 void 690 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 691 { 692 ehci_soft_qtd_t *sqtd, *lsqtd; 693 u_int32_t status; 694 695 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 696 697 if (ex->sqtdstart == NULL) { 698 printf("ehci_check_intr: sqtdstart=NULL\n"); 699 return; 700 } 701 lsqtd = ex->sqtdend; 702 #ifdef DIAGNOSTIC 703 if (lsqtd == NULL) { 704 printf("ehci_check_intr: lsqtd==0\n"); 705 return; 706 } 707 #endif 708 /* 709 * If the last TD is still active we need to check whether there 710 * is a an error somewhere in the middle, or whether there was a 711 * short packet (SPD and not ACTIVE). 712 */ 713 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 714 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 715 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 716 status = le32toh(sqtd->qtd.qtd_status); 717 /* If there's an active QTD the xfer isn't done. */ 718 if (status & EHCI_QTD_ACTIVE) 719 break; 720 /* Any kind of error makes the xfer done. */ 721 if (status & EHCI_QTD_HALTED) 722 goto done; 723 /* We want short packets, and it is short: it's done */ 724 if (EHCI_QTD_GET_BYTES(status) != 0) 725 goto done; 726 } 727 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 728 ex, ex->sqtdstart)); 729 return; 730 } 731 done: 732 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 733 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 734 ehci_idone(ex); 735 } 736 737 void 738 ehci_idone(struct ehci_xfer *ex) 739 { 740 usbd_xfer_handle xfer = &ex->xfer; 741 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 742 ehci_soft_qtd_t *sqtd, *lsqtd; 743 u_int32_t status = 0, nstatus = 0; 744 int actlen; 745 746 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 747 #ifdef DIAGNOSTIC 748 { 749 int s = splhigh(); 750 if (ex->isdone) { 751 splx(s); 752 #ifdef EHCI_DEBUG 753 printf("ehci_idone: ex is done!\n "); 754 ehci_dump_exfer(ex); 755 #else 756 printf("ehci_idone: ex=%p is done!\n", ex); 757 #endif 758 return; 759 } 760 ex->isdone = 1; 761 splx(s); 762 } 763 #endif 764 765 if (xfer->status == USBD_CANCELLED || 766 xfer->status == USBD_TIMEOUT) { 767 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 768 return; 769 } 770 771 #ifdef EHCI_DEBUG 772 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 773 if (ehcidebug > 10) 774 ehci_dump_sqtds(ex->sqtdstart); 775 #endif 776 777 /* The transfer is done, compute actual length and status. */ 778 lsqtd = ex->sqtdend; 779 actlen = 0; 780 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 781 nstatus = le32toh(sqtd->qtd.qtd_status); 782 if (nstatus & EHCI_QTD_ACTIVE) 783 break; 784 785 status = nstatus; 786 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 787 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 788 } 789 790 /* 791 * If there are left over TDs we need to update the toggle. 792 * The default pipe doesn't need it since control transfers 793 * start the toggle at 0 every time. 794 * For a short transfer we need to update the toggle for the missing 795 * packets within the qTD. 796 */ 797 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 798 xfer->pipe->device->default_pipe != xfer->pipe) { 799 DPRINTFN(2, ("ehci_idone: need toggle update " 800 "status=%08x nstatus=%08x\n", status, nstatus)); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 809 xfer->length, actlen, status)); 810 xfer->actlen = actlen; 811 if (status & EHCI_QTD_HALTED) { 812 #ifdef EHCI_DEBUG 813 char sbuf[128]; 814 815 bitmask_snprintf((u_int32_t)status, 816 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 817 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 818 819 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 820 "status 0x%s\n", 821 xfer->pipe->device->address, 822 xfer->pipe->endpoint->edesc->bEndpointAddress, 823 sbuf)); 824 if (ehcidebug > 2) { 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 } 828 #endif 829 /* low&full speed has an extra error flag */ 830 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 831 EHCI_QH_SPEED_HIGH) 832 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 833 else 834 status &= EHCI_QTD_STATERRS; 835 if (status == 0) /* no other errors means a stall */ 836 xfer->status = USBD_STALLED; 837 else 838 xfer->status = USBD_IOERROR; /* more info XXX */ 839 /* XXX need to reset TT on missed microframe */ 840 if (status & EHCI_QTD_MISSEDMICRO) { 841 ehci_softc_t *sc = (ehci_softc_t *) 842 xfer->pipe->device->bus; 843 844 printf("%s: missed microframe, TT reset not " 845 "implemented, hub might be inoperational\n", 846 USBDEVNAME(sc->sc_bus.bdev)); 847 } 848 } else { 849 xfer->status = USBD_NORMAL_COMPLETION; 850 } 851 852 usb_transfer_complete(xfer); 853 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 854 } 855 856 /* 857 * Wait here until controller claims to have an interrupt. 858 * Then call ehci_intr and return. Use timeout to avoid waiting 859 * too long. 860 */ 861 void 862 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 863 { 864 int timo; 865 u_int32_t intrs; 866 867 xfer->status = USBD_IN_PROGRESS; 868 for (timo = xfer->timeout; timo >= 0; timo--) { 869 usb_delay_ms(&sc->sc_bus, 1); 870 if (sc->sc_dying) 871 break; 872 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 873 sc->sc_eintrs; 874 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 875 #ifdef EHCI_DEBUG 876 if (ehcidebug > 15) 877 ehci_dump_regs(sc); 878 #endif 879 if (intrs) { 880 ehci_intr1(sc); 881 if (xfer->status != USBD_IN_PROGRESS) 882 return; 883 } 884 } 885 886 /* Timeout */ 887 DPRINTF(("ehci_waitintr: timeout\n")); 888 xfer->status = USBD_TIMEOUT; 889 usb_transfer_complete(xfer); 890 /* XXX should free TD */ 891 } 892 893 void 894 ehci_poll(struct usbd_bus *bus) 895 { 896 ehci_softc_t *sc = (ehci_softc_t *)bus; 897 #ifdef EHCI_DEBUG 898 static int last; 899 int new; 900 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 901 if (new != last) { 902 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 903 last = new; 904 } 905 #endif 906 907 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 908 ehci_intr1(sc); 909 } 910 911 int 912 ehci_detach(struct ehci_softc *sc, int flags) 913 { 914 int rv = 0; 915 916 if (sc->sc_child != NULL) 917 rv = config_detach(sc->sc_child, flags); 918 919 if (rv != 0) 920 return (rv); 921 922 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 923 924 if (sc->sc_shutdownhook != NULL) 925 shutdownhook_disestablish(sc->sc_shutdownhook); 926 927 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 928 929 /* XXX free other data structures XXX */ 930 931 return (rv); 932 } 933 934 935 int 936 ehci_activate(device_ptr_t self, enum devact act) 937 { 938 struct ehci_softc *sc = (struct ehci_softc *)self; 939 int rv = 0; 940 941 switch (act) { 942 case DVACT_ACTIVATE: 943 return (EOPNOTSUPP); 944 945 case DVACT_DEACTIVATE: 946 if (sc->sc_child != NULL) 947 rv = config_deactivate(sc->sc_child); 948 sc->sc_dying = 1; 949 break; 950 } 951 return (rv); 952 } 953 954 /* 955 * Handle suspend/resume. 956 * 957 * We need to switch to polling mode here, because this routine is 958 * called from an interrupt context. This is all right since we 959 * are almost suspended anyway. 960 * 961 * Note that this power handler isn't to be registered directly; the 962 * bus glue needs to call out to it. 963 */ 964 pnp_status_t 965 ehci_power(device_t dv, pnp_request_t req, void *opaque) 966 { 967 ehci_softc_t *sc = (ehci_softc_t *)dv; 968 pnp_state_t *pstate; 969 pnp_capabilities_t *pcaps; 970 u_int32_t cmd, hcr; 971 int s, i; 972 973 #ifdef EHCI_DEBUG 974 DPRINTF(("ehci_power: sc=%p, req=%d, opaque=%p\n", sc, req, opaque)); 975 if (ehcidebug > 0) 976 ehci_dump_regs(sc); 977 #endif 978 979 s = splhardusb(); 980 switch (req) { 981 case PNP_REQUEST_GET_CAPABILITIES: 982 pcaps = opaque; 983 pcaps->state |= PNP_STATE_D0 | PNP_STATE_D3; 984 break; 985 case PNP_REQUEST_SET_STATE: 986 pstate = opaque; 987 switch (*pstate) { 988 case PNP_STATE_D3: 989 sc->sc_bus.use_polling++; 990 991 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 992 993 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 994 EOWRITE4(sc, EHCI_USBCMD, cmd); 995 996 for (i = 0; i < 100; i++) { 997 hcr = EOREAD4(sc, EHCI_USBSTS) & 998 (EHCI_STS_ASS | EHCI_STS_PSS); 999 if (hcr == 0) 1000 break; 1001 1002 usb_delay_ms(&sc->sc_bus, 1); 1003 } 1004 if (hcr != 0) 1005 printf("%s: reset timeout\n", 1006 USBDEVNAME(sc->sc_bus.bdev)); 1007 1008 cmd &= ~EHCI_CMD_RS; 1009 EOWRITE4(sc, EHCI_USBCMD, cmd); 1010 1011 for (i = 0; i < 100; i++) { 1012 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1013 if (hcr == EHCI_STS_HCH) 1014 break; 1015 1016 usb_delay_ms(&sc->sc_bus, 1); 1017 } 1018 if (hcr != EHCI_STS_HCH) 1019 printf("%s: config timeout\n", 1020 USBDEVNAME(sc->sc_bus.bdev)); 1021 1022 sc->sc_bus.use_polling--; 1023 break; 1024 1025 case PNP_STATE_D0: 1026 sc->sc_bus.use_polling++; 1027 1028 /* restore things in case the bios sucks */ 1029 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1030 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1031 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1032 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1033 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1034 1035 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1036 1037 for (i = 0; i < 100; i++) { 1038 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1039 if (hcr != EHCI_STS_HCH) 1040 break; 1041 1042 usb_delay_ms(&sc->sc_bus, 1); 1043 } 1044 if (hcr == EHCI_STS_HCH) { 1045 printf("%s: config timeout\n", 1046 USBDEVNAME(sc->sc_bus.bdev)); 1047 } 1048 1049 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1050 1051 sc->sc_bus.use_polling--; 1052 break; 1053 default: 1054 break; 1055 } 1056 1057 break; 1058 default: 1059 break; 1060 } 1061 1062 splx(s); 1063 1064 #ifdef EHCI_DEBUG 1065 DPRINTF(("ehci_power: sc=%p\n", sc)); 1066 if (ehcidebug > 0) 1067 ehci_dump_regs(sc); 1068 #endif 1069 1070 return PNP_STATUS_SUCCESS; 1071 } 1072 1073 /* 1074 * Shut down the controller when the system is going down. 1075 */ 1076 void 1077 ehci_shutdown(void *v) 1078 { 1079 ehci_softc_t *sc = v; 1080 1081 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1082 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1083 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1084 } 1085 1086 usbd_status 1087 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1088 { 1089 struct ehci_softc *sc = (struct ehci_softc *)bus; 1090 usbd_status err; 1091 1092 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1093 if (err == USBD_NOMEM) 1094 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1095 #ifdef EHCI_DEBUG 1096 if (err) 1097 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1098 #endif 1099 return (err); 1100 } 1101 1102 void 1103 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1104 { 1105 struct ehci_softc *sc = (struct ehci_softc *)bus; 1106 1107 if (dma->block->flags & USB_DMA_RESERVE) { 1108 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1109 dma); 1110 return; 1111 } 1112 usb_freemem(&sc->sc_bus, dma); 1113 } 1114 1115 usbd_xfer_handle 1116 ehci_allocx(struct usbd_bus *bus) 1117 { 1118 struct ehci_softc *sc = (struct ehci_softc *)bus; 1119 usbd_xfer_handle xfer; 1120 1121 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1122 if (xfer != NULL) { 1123 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1124 #ifdef DIAGNOSTIC 1125 if (xfer->busy_free != XFER_FREE) { 1126 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1127 xfer->busy_free); 1128 } 1129 #endif 1130 } else { 1131 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1132 } 1133 if (xfer != NULL) { 1134 memset(xfer, 0, sizeof(struct ehci_xfer)); 1135 #ifdef DIAGNOSTIC 1136 EXFER(xfer)->isdone = 1; 1137 xfer->busy_free = XFER_BUSY; 1138 #endif 1139 } 1140 return (xfer); 1141 } 1142 1143 void 1144 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1145 { 1146 struct ehci_softc *sc = (struct ehci_softc *)bus; 1147 1148 #ifdef DIAGNOSTIC 1149 if (xfer->busy_free != XFER_BUSY) { 1150 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1151 xfer->busy_free); 1152 } 1153 xfer->busy_free = XFER_FREE; 1154 if (!EXFER(xfer)->isdone) { 1155 printf("ehci_freex: !isdone\n"); 1156 } 1157 #endif 1158 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1159 } 1160 1161 Static void 1162 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1163 { 1164 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1165 1166 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1167 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1168 #ifdef USB_DEBUG 1169 if (ehcidebug) 1170 usbd_dump_pipe(pipe); 1171 #endif 1172 epipe->nexttoggle = 0; 1173 } 1174 1175 Static void 1176 ehci_noop(usbd_pipe_handle pipe) 1177 { 1178 } 1179 1180 #ifdef EHCI_DEBUG 1181 void 1182 ehci_dump_regs(ehci_softc_t *sc) 1183 { 1184 int i; 1185 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1186 EOREAD4(sc, EHCI_USBCMD), 1187 EOREAD4(sc, EHCI_USBSTS), 1188 EOREAD4(sc, EHCI_USBINTR)); 1189 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1190 EOREAD4(sc, EHCI_FRINDEX), 1191 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1192 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1193 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1194 for (i = 1; i <= sc->sc_noport; i++) 1195 printf("port %d status=0x%08x\n", i, 1196 EOREAD4(sc, EHCI_PORTSC(i))); 1197 } 1198 1199 /* 1200 * Unused function - this is meant to be called from a kernel 1201 * debugger. 1202 */ 1203 void 1204 ehci_dump() 1205 { 1206 ehci_dump_regs(theehci); 1207 } 1208 1209 void 1210 ehci_dump_link(ehci_link_t link, int type) 1211 { 1212 link = le32toh(link); 1213 printf("0x%08x", link); 1214 if (link & EHCI_LINK_TERMINATE) 1215 printf("<T>"); 1216 else { 1217 printf("<"); 1218 if (type) { 1219 switch (EHCI_LINK_TYPE(link)) { 1220 case EHCI_LINK_ITD: printf("ITD"); break; 1221 case EHCI_LINK_QH: printf("QH"); break; 1222 case EHCI_LINK_SITD: printf("SITD"); break; 1223 case EHCI_LINK_FSTN: printf("FSTN"); break; 1224 } 1225 } 1226 printf(">"); 1227 } 1228 } 1229 1230 void 1231 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1232 { 1233 int i; 1234 u_int32_t stop; 1235 1236 stop = 0; 1237 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1238 ehci_dump_sqtd(sqtd); 1239 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1240 } 1241 if (sqtd) 1242 printf("dump aborted, too many TDs\n"); 1243 } 1244 1245 void 1246 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1247 { 1248 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1249 ehci_dump_qtd(&sqtd->qtd); 1250 } 1251 1252 void 1253 ehci_dump_qtd(ehci_qtd_t *qtd) 1254 { 1255 u_int32_t s; 1256 char sbuf[128]; 1257 1258 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1259 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1260 printf("\n"); 1261 s = le32toh(qtd->qtd_status); 1262 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1263 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1264 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1265 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1266 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1267 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1268 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1269 EHCI_QTD_GET_PID(s), sbuf); 1270 for (s = 0; s < 5; s++) 1271 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1272 } 1273 1274 void 1275 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1276 { 1277 ehci_qh_t *qh = &sqh->qh; 1278 u_int32_t endp, endphub; 1279 1280 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1281 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1282 endp = le32toh(qh->qh_endp); 1283 printf(" endp=0x%08x\n", endp); 1284 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1285 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1286 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1287 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1288 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1289 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1290 EHCI_QH_GET_NRL(endp)); 1291 endphub = le32toh(qh->qh_endphub); 1292 printf(" endphub=0x%08x\n", endphub); 1293 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1294 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1295 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1296 EHCI_QH_GET_MULT(endphub)); 1297 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1298 printf("Overlay qTD:\n"); 1299 ehci_dump_qtd(&qh->qh_qtd); 1300 } 1301 1302 #ifdef DIAGNOSTIC 1303 Static void 1304 ehci_dump_exfer(struct ehci_xfer *ex) 1305 { 1306 printf("ehci_dump_exfer: ex=%p\n", ex); 1307 } 1308 #endif 1309 #endif 1310 1311 usbd_status 1312 ehci_open(usbd_pipe_handle pipe) 1313 { 1314 usbd_device_handle dev = pipe->device; 1315 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1316 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1317 u_int8_t addr = dev->address; 1318 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1319 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1320 ehci_soft_qh_t *sqh; 1321 usbd_status err; 1322 int s; 1323 int ival, speed, naks; 1324 int hshubaddr, hshubport; 1325 1326 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1327 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1328 1329 if (dev->myhsport) { 1330 hshubaddr = dev->myhsport->parent->address; 1331 hshubport = dev->myhsport->portno; 1332 } else { 1333 hshubaddr = 0; 1334 hshubport = 0; 1335 } 1336 1337 if (sc->sc_dying) 1338 return (USBD_IOERROR); 1339 1340 epipe->nexttoggle = 0; 1341 1342 if (addr == sc->sc_addr) { 1343 switch (ed->bEndpointAddress) { 1344 case USB_CONTROL_ENDPOINT: 1345 pipe->methods = &ehci_root_ctrl_methods; 1346 break; 1347 case UE_DIR_IN | EHCI_INTR_ENDPT: 1348 pipe->methods = &ehci_root_intr_methods; 1349 break; 1350 default: 1351 return (USBD_INVAL); 1352 } 1353 return (USBD_NORMAL_COMPLETION); 1354 } 1355 1356 /* XXX All this stuff is only valid for async. */ 1357 switch (dev->speed) { 1358 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1359 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1360 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1361 default: panic("ehci_open: bad device speed %d", dev->speed); 1362 } 1363 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1364 printf("%s: *** WARNING: opening low/full speed isoc device, " 1365 "this does not work yet.\n", 1366 USBDEVNAME(sc->sc_bus.bdev)); 1367 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1368 hshubaddr, hshubport)); 1369 return USBD_INVAL; 1370 } 1371 1372 naks = 8; /* XXX */ 1373 sqh = ehci_alloc_sqh(sc); 1374 if (sqh == NULL) 1375 return (USBD_NOMEM); 1376 /* qh_link filled when the QH is added */ 1377 sqh->qh.qh_endp = htole32( 1378 EHCI_QH_SET_ADDR(addr) | 1379 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1380 EHCI_QH_SET_EPS(speed) | 1381 EHCI_QH_DTC | 1382 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1383 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1384 EHCI_QH_CTL : 0) | 1385 EHCI_QH_SET_NRL(naks) 1386 ); 1387 sqh->qh.qh_endphub = htole32( 1388 EHCI_QH_SET_MULT(1) | 1389 EHCI_QH_SET_HUBA(hshubaddr) | 1390 EHCI_QH_SET_PORT(hshubport) | 1391 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1392 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1393 ); 1394 sqh->qh.qh_curqtd = EHCI_NULL; 1395 /* Fill the overlay qTD */ 1396 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1397 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1398 sqh->qh.qh_qtd.qtd_status = htole32(0); 1399 1400 epipe->sqh = sqh; 1401 1402 switch (xfertype) { 1403 case UE_CONTROL: 1404 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1405 0, &epipe->u.ctl.reqdma); 1406 #ifdef EHCI_DEBUG 1407 if (err) 1408 printf("ehci_open: usb_allocmem()=%d\n", err); 1409 #endif 1410 if (err) 1411 goto bad; 1412 pipe->methods = &ehci_device_ctrl_methods; 1413 s = splusb(); 1414 ehci_add_qh(sqh, sc->sc_async_head); 1415 splx(s); 1416 break; 1417 case UE_BULK: 1418 pipe->methods = &ehci_device_bulk_methods; 1419 s = splusb(); 1420 ehci_add_qh(sqh, sc->sc_async_head); 1421 splx(s); 1422 break; 1423 case UE_INTERRUPT: 1424 pipe->methods = &ehci_device_intr_methods; 1425 ival = pipe->interval; 1426 if (ival == USBD_DEFAULT_INTERVAL) { 1427 if (speed == EHCI_QH_SPEED_HIGH) { 1428 if (ed->bInterval > 16) { 1429 /* 1430 * illegal with high-speed, but there 1431 * were documentation bugs in the spec, 1432 * so be generous 1433 */ 1434 ival = 256; 1435 } else 1436 ival = (1 << (ed->bInterval - 1)) / 8; 1437 } else 1438 ival = ed->bInterval; 1439 } 1440 err = ehci_device_setintr(sc, sqh, ival); 1441 if (err) 1442 goto bad; 1443 break; 1444 case UE_ISOCHRONOUS: 1445 pipe->methods = &ehci_device_isoc_methods; 1446 /* FALLTHROUGH */ 1447 default: 1448 err = USBD_INVAL; 1449 goto bad; 1450 } 1451 return (USBD_NORMAL_COMPLETION); 1452 1453 bad: 1454 ehci_free_sqh(sc, sqh); 1455 return (err); 1456 } 1457 1458 /* 1459 * Add an ED to the schedule. Called at splusb(). 1460 */ 1461 void 1462 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1463 { 1464 SPLUSBCHECK; 1465 1466 sqh->next = head->next; 1467 sqh->qh.qh_link = head->qh.qh_link; 1468 head->next = sqh; 1469 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1470 1471 #ifdef EHCI_DEBUG 1472 if (ehcidebug > 5) { 1473 printf("ehci_add_qh:\n"); 1474 ehci_dump_sqh(sqh); 1475 } 1476 #endif 1477 } 1478 1479 /* 1480 * Remove an ED from the schedule. Called at splusb(). 1481 */ 1482 void 1483 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1484 { 1485 ehci_soft_qh_t *p; 1486 1487 SPLUSBCHECK; 1488 /* XXX */ 1489 for (p = head; p != NULL && p->next != sqh; p = p->next) 1490 ; 1491 if (p == NULL) 1492 panic("ehci_rem_qh: ED not found"); 1493 p->next = sqh->next; 1494 p->qh.qh_link = sqh->qh.qh_link; 1495 1496 ehci_sync_hc(sc); 1497 } 1498 1499 void 1500 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1501 { 1502 int i; 1503 u_int32_t status; 1504 1505 /* Save toggle bit and ping status. */ 1506 status = sqh->qh.qh_qtd.qtd_status & 1507 htole32(EHCI_QTD_TOGGLE_MASK | 1508 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1509 /* Set HALTED to make hw leave it alone. */ 1510 sqh->qh.qh_qtd.qtd_status = 1511 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1512 sqh->qh.qh_curqtd = 0; 1513 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1514 sqh->qh.qh_qtd.qtd_altnext = 0; 1515 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1516 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1517 sqh->sqtd = sqtd; 1518 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1519 sqh->qh.qh_qtd.qtd_status = status; 1520 } 1521 1522 /* 1523 * Ensure that the HC has released all references to the QH. We do this 1524 * by asking for a Async Advance Doorbell interrupt and then we wait for 1525 * the interrupt. 1526 * To make this easier we first obtain exclusive use of the doorbell. 1527 */ 1528 void 1529 ehci_sync_hc(ehci_softc_t *sc) 1530 { 1531 int s, error; 1532 1533 if (sc->sc_dying) { 1534 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1535 return; 1536 } 1537 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1538 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1539 s = splhardusb(); 1540 /* ask for doorbell */ 1541 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1542 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1543 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1544 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1545 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1546 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1547 splx(s); 1548 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1549 #ifdef DIAGNOSTIC 1550 if (error) 1551 printf("ehci_sync_hc: tsleep() = %d\n", error); 1552 #endif 1553 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1554 } 1555 1556 /***********/ 1557 1558 /* 1559 * Data structures and routines to emulate the root hub. 1560 */ 1561 Static usb_device_descriptor_t ehci_devd = { 1562 USB_DEVICE_DESCRIPTOR_SIZE, 1563 UDESC_DEVICE, /* type */ 1564 {0x00, 0x02}, /* USB version */ 1565 UDCLASS_HUB, /* class */ 1566 UDSUBCLASS_HUB, /* subclass */ 1567 UDPROTO_HSHUBSTT, /* protocol */ 1568 64, /* max packet */ 1569 {0},{0},{0x00,0x01}, /* device id */ 1570 1,2,0, /* string indicies */ 1571 1 /* # of configurations */ 1572 }; 1573 1574 Static const usb_device_qualifier_t ehci_odevd = { 1575 USB_DEVICE_DESCRIPTOR_SIZE, 1576 UDESC_DEVICE_QUALIFIER, /* type */ 1577 {0x00, 0x02}, /* USB version */ 1578 UDCLASS_HUB, /* class */ 1579 UDSUBCLASS_HUB, /* subclass */ 1580 UDPROTO_FSHUB, /* protocol */ 1581 64, /* max packet */ 1582 1, /* # of configurations */ 1583 0 1584 }; 1585 1586 Static const usb_config_descriptor_t ehci_confd = { 1587 USB_CONFIG_DESCRIPTOR_SIZE, 1588 UDESC_CONFIG, 1589 {USB_CONFIG_DESCRIPTOR_SIZE + 1590 USB_INTERFACE_DESCRIPTOR_SIZE + 1591 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1592 1, 1593 1, 1594 0, 1595 UC_ATTR_MBO | UC_SELF_POWERED, 1596 0 /* max power */ 1597 }; 1598 1599 Static const usb_interface_descriptor_t ehci_ifcd = { 1600 USB_INTERFACE_DESCRIPTOR_SIZE, 1601 UDESC_INTERFACE, 1602 0, 1603 0, 1604 1, 1605 UICLASS_HUB, 1606 UISUBCLASS_HUB, 1607 UIPROTO_HSHUBSTT, 1608 0 1609 }; 1610 1611 Static const usb_endpoint_descriptor_t ehci_endpd = { 1612 USB_ENDPOINT_DESCRIPTOR_SIZE, 1613 UDESC_ENDPOINT, 1614 UE_DIR_IN | EHCI_INTR_ENDPT, 1615 UE_INTERRUPT, 1616 {8, 0}, /* max packet */ 1617 12 1618 }; 1619 1620 Static const usb_hub_descriptor_t ehci_hubd = { 1621 USB_HUB_DESCRIPTOR_SIZE, 1622 UDESC_HUB, 1623 0, 1624 {0,0}, 1625 0, 1626 0, 1627 {""}, 1628 {""}, 1629 }; 1630 1631 Static int 1632 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1633 { 1634 int i; 1635 1636 if (l == 0) 1637 return (0); 1638 p->bLength = 2 * strlen(s) + 2; 1639 if (l == 1) 1640 return (1); 1641 p->bDescriptorType = UDESC_STRING; 1642 l -= 2; 1643 for (i = 0; s[i] && l > 1; i++, l -= 2) 1644 USETW2(p->bString[i], 0, s[i]); 1645 return (2*i+2); 1646 } 1647 1648 /* 1649 * Simulate a hardware hub by handling all the necessary requests. 1650 */ 1651 Static usbd_status 1652 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1653 { 1654 usbd_status err; 1655 1656 /* Insert last in queue. */ 1657 err = usb_insert_transfer(xfer); 1658 if (err) 1659 return (err); 1660 1661 /* Pipe isn't running, start first */ 1662 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1663 } 1664 1665 Static usbd_status 1666 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1667 { 1668 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1669 usb_device_request_t *req; 1670 void *buf = NULL; 1671 int port, i; 1672 int s, len, value, index, l, totlen = 0; 1673 usb_port_status_t ps; 1674 usb_hub_descriptor_t hubd; 1675 usbd_status err; 1676 u_int32_t v; 1677 1678 if (sc->sc_dying) 1679 return (USBD_IOERROR); 1680 1681 #ifdef DIAGNOSTIC 1682 if (!(xfer->rqflags & URQ_REQUEST)) 1683 /* XXX panic */ 1684 return (USBD_INVAL); 1685 #endif 1686 req = &xfer->request; 1687 1688 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1689 req->bmRequestType, req->bRequest)); 1690 1691 len = UGETW(req->wLength); 1692 value = UGETW(req->wValue); 1693 index = UGETW(req->wIndex); 1694 1695 if (len != 0) 1696 buf = KERNADDR(&xfer->dmabuf, 0); 1697 1698 #define C(x,y) ((x) | ((y) << 8)) 1699 switch(C(req->bRequest, req->bmRequestType)) { 1700 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1702 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1703 /* 1704 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1705 * for the integrated root hub. 1706 */ 1707 break; 1708 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1709 if (len > 0) { 1710 *(u_int8_t *)buf = sc->sc_conf; 1711 totlen = 1; 1712 } 1713 break; 1714 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1715 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1716 if (len == 0) 1717 break; 1718 switch(value >> 8) { 1719 case UDESC_DEVICE: 1720 if ((value & 0xff) != 0) { 1721 err = USBD_IOERROR; 1722 goto ret; 1723 } 1724 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1725 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1726 memcpy(buf, &ehci_devd, l); 1727 break; 1728 /* 1729 * We can't really operate at another speed, but the spec says 1730 * we need this descriptor. 1731 */ 1732 case UDESC_DEVICE_QUALIFIER: 1733 if ((value & 0xff) != 0) { 1734 err = USBD_IOERROR; 1735 goto ret; 1736 } 1737 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1738 memcpy(buf, &ehci_odevd, l); 1739 break; 1740 /* 1741 * We can't really operate at another speed, but the spec says 1742 * we need this descriptor. 1743 */ 1744 case UDESC_OTHER_SPEED_CONFIGURATION: 1745 case UDESC_CONFIG: 1746 if ((value & 0xff) != 0) { 1747 err = USBD_IOERROR; 1748 goto ret; 1749 } 1750 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1751 memcpy(buf, &ehci_confd, l); 1752 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1753 value >> 8; 1754 buf = (char *)buf + l; 1755 len -= l; 1756 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1757 totlen += l; 1758 memcpy(buf, &ehci_ifcd, l); 1759 buf = (char *)buf + l; 1760 len -= l; 1761 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1762 totlen += l; 1763 memcpy(buf, &ehci_endpd, l); 1764 break; 1765 case UDESC_STRING: 1766 *(u_int8_t *)buf = 0; 1767 totlen = 1; 1768 switch (value & 0xff) { 1769 case 0: /* Language table */ 1770 if (len > 0) 1771 *(u_int8_t *)buf = 4; 1772 if (len >= 4) { 1773 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1774 totlen = 4; 1775 } 1776 break; 1777 case 1: /* Vendor */ 1778 totlen = ehci_str(buf, len, sc->sc_vendor); 1779 break; 1780 case 2: /* Product */ 1781 totlen = ehci_str(buf, len, "EHCI root hub"); 1782 break; 1783 } 1784 break; 1785 default: 1786 err = USBD_IOERROR; 1787 goto ret; 1788 } 1789 break; 1790 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1791 if (len > 0) { 1792 *(u_int8_t *)buf = 0; 1793 totlen = 1; 1794 } 1795 break; 1796 case C(UR_GET_STATUS, UT_READ_DEVICE): 1797 if (len > 1) { 1798 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1799 totlen = 2; 1800 } 1801 break; 1802 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1803 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1804 if (len > 1) { 1805 USETW(((usb_status_t *)buf)->wStatus, 0); 1806 totlen = 2; 1807 } 1808 break; 1809 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1810 if (value >= USB_MAX_DEVICES) { 1811 err = USBD_IOERROR; 1812 goto ret; 1813 } 1814 sc->sc_addr = value; 1815 break; 1816 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1817 if (value != 0 && value != 1) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 sc->sc_conf = value; 1822 break; 1823 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1824 break; 1825 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1826 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1827 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1828 err = USBD_IOERROR; 1829 goto ret; 1830 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1831 break; 1832 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1833 break; 1834 /* Hub requests */ 1835 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1836 break; 1837 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1838 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1839 "port=%d feature=%d\n", 1840 index, value)); 1841 if (index < 1 || index > sc->sc_noport) { 1842 err = USBD_IOERROR; 1843 goto ret; 1844 } 1845 port = EHCI_PORTSC(index); 1846 v = EOREAD4(sc, port); 1847 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1848 v &= ~EHCI_PS_CLEAR; 1849 switch(value) { 1850 case UHF_PORT_ENABLE: 1851 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1852 break; 1853 case UHF_PORT_SUSPEND: 1854 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1855 break; 1856 case UHF_PORT_POWER: 1857 if (sc->sc_hasppc) 1858 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1859 break; 1860 case UHF_PORT_TEST: 1861 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1862 "%d\n", index)); 1863 break; 1864 case UHF_PORT_INDICATOR: 1865 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1866 "%d\n", index)); 1867 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1868 break; 1869 case UHF_C_PORT_CONNECTION: 1870 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1871 break; 1872 case UHF_C_PORT_ENABLE: 1873 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1874 break; 1875 case UHF_C_PORT_SUSPEND: 1876 /* how? */ 1877 break; 1878 case UHF_C_PORT_OVER_CURRENT: 1879 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1880 break; 1881 case UHF_C_PORT_RESET: 1882 sc->sc_isreset[index] = 0; 1883 break; 1884 default: 1885 err = USBD_IOERROR; 1886 goto ret; 1887 } 1888 #if 0 1889 switch(value) { 1890 case UHF_C_PORT_CONNECTION: 1891 case UHF_C_PORT_ENABLE: 1892 case UHF_C_PORT_SUSPEND: 1893 case UHF_C_PORT_OVER_CURRENT: 1894 case UHF_C_PORT_RESET: 1895 default: 1896 break; 1897 } 1898 #endif 1899 break; 1900 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1901 if (len == 0) 1902 break; 1903 if ((value & 0xff) != 0) { 1904 err = USBD_IOERROR; 1905 goto ret; 1906 } 1907 hubd = ehci_hubd; 1908 hubd.bNbrPorts = sc->sc_noport; 1909 v = EOREAD4(sc, EHCI_HCSPARAMS); 1910 USETW(hubd.wHubCharacteristics, 1911 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1912 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1913 ? UHD_PORT_IND : 0); 1914 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1915 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1916 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1917 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1918 l = min(len, hubd.bDescLength); 1919 totlen = l; 1920 memcpy(buf, &hubd, l); 1921 break; 1922 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1923 if (len != 4) { 1924 err = USBD_IOERROR; 1925 goto ret; 1926 } 1927 memset(buf, 0, len); /* ? XXX */ 1928 totlen = len; 1929 break; 1930 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1931 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1932 index)); 1933 if (index < 1 || index > sc->sc_noport) { 1934 err = USBD_IOERROR; 1935 goto ret; 1936 } 1937 if (len != 4) { 1938 err = USBD_IOERROR; 1939 goto ret; 1940 } 1941 v = EOREAD4(sc, EHCI_PORTSC(index)); 1942 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1943 v)); 1944 i = UPS_HIGH_SPEED; 1945 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1946 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1947 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1948 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1949 if (v & EHCI_PS_PR) i |= UPS_RESET; 1950 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1951 USETW(ps.wPortStatus, i); 1952 i = 0; 1953 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1954 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1955 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1956 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1957 USETW(ps.wPortChange, i); 1958 l = min(len, sizeof ps); 1959 memcpy(buf, &ps, l); 1960 totlen = l; 1961 break; 1962 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1963 err = USBD_IOERROR; 1964 goto ret; 1965 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1966 break; 1967 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1968 if (index < 1 || index > sc->sc_noport) { 1969 err = USBD_IOERROR; 1970 goto ret; 1971 } 1972 port = EHCI_PORTSC(index); 1973 v = EOREAD4(sc, port); 1974 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1975 v &= ~EHCI_PS_CLEAR; 1976 switch(value) { 1977 case UHF_PORT_ENABLE: 1978 EOWRITE4(sc, port, v | EHCI_PS_PE); 1979 break; 1980 case UHF_PORT_SUSPEND: 1981 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1982 break; 1983 case UHF_PORT_RESET: 1984 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1985 index)); 1986 if (EHCI_PS_IS_LOWSPEED(v)) { 1987 /* Low speed device, give up ownership. */ 1988 ehci_disown(sc, index, 1); 1989 break; 1990 } 1991 /* Start reset sequence. */ 1992 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1993 EOWRITE4(sc, port, v | EHCI_PS_PR); 1994 /* Wait for reset to complete. */ 1995 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1996 if (sc->sc_dying) { 1997 err = USBD_IOERROR; 1998 goto ret; 1999 } 2000 /* Terminate reset sequence. */ 2001 EOWRITE4(sc, port, v); 2002 /* Wait for HC to complete reset. */ 2003 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2004 if (sc->sc_dying) { 2005 err = USBD_IOERROR; 2006 goto ret; 2007 } 2008 v = EOREAD4(sc, port); 2009 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2010 if (v & EHCI_PS_PR) { 2011 printf("%s: port reset timeout\n", 2012 USBDEVNAME(sc->sc_bus.bdev)); 2013 return (USBD_TIMEOUT); 2014 } 2015 if (!(v & EHCI_PS_PE)) { 2016 /* Not a high speed device, give up ownership.*/ 2017 ehci_disown(sc, index, 0); 2018 break; 2019 } 2020 sc->sc_isreset[index] = 1; 2021 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2022 index, v)); 2023 break; 2024 case UHF_PORT_POWER: 2025 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2026 "%d (has PPC = %d)\n", index, 2027 sc->sc_hasppc)); 2028 if (sc->sc_hasppc) 2029 EOWRITE4(sc, port, v | EHCI_PS_PP); 2030 break; 2031 case UHF_PORT_TEST: 2032 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2033 "%d\n", index)); 2034 break; 2035 case UHF_PORT_INDICATOR: 2036 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2037 "%d\n", index)); 2038 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2039 break; 2040 default: 2041 err = USBD_IOERROR; 2042 goto ret; 2043 } 2044 break; 2045 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2046 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2047 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2048 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2049 break; 2050 default: 2051 err = USBD_IOERROR; 2052 goto ret; 2053 } 2054 xfer->actlen = totlen; 2055 err = USBD_NORMAL_COMPLETION; 2056 ret: 2057 xfer->status = err; 2058 s = splusb(); 2059 usb_transfer_complete(xfer); 2060 splx(s); 2061 return (USBD_IN_PROGRESS); 2062 } 2063 2064 void 2065 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2066 { 2067 int port; 2068 u_int32_t v; 2069 2070 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2071 #ifdef DIAGNOSTIC 2072 if (sc->sc_npcomp != 0) { 2073 int i = (index-1) / sc->sc_npcomp; 2074 if (i >= sc->sc_ncomp) 2075 printf("%s: strange port\n", 2076 USBDEVNAME(sc->sc_bus.bdev)); 2077 else 2078 printf("%s: handing over %s speed device on " 2079 "port %d to %s\n", 2080 USBDEVNAME(sc->sc_bus.bdev), 2081 lowspeed ? "low" : "full", 2082 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2083 } else { 2084 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2085 } 2086 #endif 2087 port = EHCI_PORTSC(index); 2088 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2089 EOWRITE4(sc, port, v | EHCI_PS_PO); 2090 } 2091 2092 /* Abort a root control request. */ 2093 Static void 2094 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2095 { 2096 /* Nothing to do, all transfers are synchronous. */ 2097 } 2098 2099 /* Close the root pipe. */ 2100 Static void 2101 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2102 { 2103 DPRINTF(("ehci_root_ctrl_close\n")); 2104 /* Nothing to do. */ 2105 } 2106 2107 void 2108 ehci_root_intr_done(usbd_xfer_handle xfer) 2109 { 2110 xfer->hcpriv = NULL; 2111 } 2112 2113 Static usbd_status 2114 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2115 { 2116 usbd_status err; 2117 2118 /* Insert last in queue. */ 2119 err = usb_insert_transfer(xfer); 2120 if (err) 2121 return (err); 2122 2123 /* Pipe isn't running, start first */ 2124 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2125 } 2126 2127 Static usbd_status 2128 ehci_root_intr_start(usbd_xfer_handle xfer) 2129 { 2130 usbd_pipe_handle pipe = xfer->pipe; 2131 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2132 2133 if (sc->sc_dying) 2134 return (USBD_IOERROR); 2135 2136 sc->sc_intrxfer = xfer; 2137 2138 return (USBD_IN_PROGRESS); 2139 } 2140 2141 /* Abort a root interrupt request. */ 2142 Static void 2143 ehci_root_intr_abort(usbd_xfer_handle xfer) 2144 { 2145 int s; 2146 2147 if (xfer->pipe->intrxfer == xfer) { 2148 DPRINTF(("ehci_root_intr_abort: remove\n")); 2149 xfer->pipe->intrxfer = NULL; 2150 } 2151 xfer->status = USBD_CANCELLED; 2152 s = splusb(); 2153 usb_transfer_complete(xfer); 2154 splx(s); 2155 } 2156 2157 /* Close the root pipe. */ 2158 Static void 2159 ehci_root_intr_close(usbd_pipe_handle pipe) 2160 { 2161 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2162 2163 DPRINTF(("ehci_root_intr_close\n")); 2164 2165 sc->sc_intrxfer = NULL; 2166 } 2167 2168 void 2169 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2170 { 2171 xfer->hcpriv = NULL; 2172 } 2173 2174 /************************/ 2175 2176 ehci_soft_qh_t * 2177 ehci_alloc_sqh(ehci_softc_t *sc) 2178 { 2179 ehci_soft_qh_t *sqh; 2180 usbd_status err; 2181 int i, offs; 2182 usb_dma_t dma; 2183 2184 if (sc->sc_freeqhs == NULL) { 2185 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2186 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2187 EHCI_PAGE_SIZE, &dma); 2188 #ifdef EHCI_DEBUG 2189 if (err) 2190 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2191 #endif 2192 if (err) 2193 return (NULL); 2194 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2195 offs = i * EHCI_SQH_SIZE; 2196 sqh = KERNADDR(&dma, offs); 2197 sqh->physaddr = DMAADDR(&dma, offs); 2198 sqh->next = sc->sc_freeqhs; 2199 sc->sc_freeqhs = sqh; 2200 } 2201 } 2202 sqh = sc->sc_freeqhs; 2203 sc->sc_freeqhs = sqh->next; 2204 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2205 sqh->next = NULL; 2206 return (sqh); 2207 } 2208 2209 void 2210 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2211 { 2212 sqh->next = sc->sc_freeqhs; 2213 sc->sc_freeqhs = sqh; 2214 } 2215 2216 ehci_soft_qtd_t * 2217 ehci_alloc_sqtd(ehci_softc_t *sc) 2218 { 2219 ehci_soft_qtd_t *sqtd; 2220 usbd_status err; 2221 int i, offs; 2222 usb_dma_t dma; 2223 int s; 2224 2225 if (sc->sc_freeqtds == NULL) { 2226 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2227 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2228 EHCI_PAGE_SIZE, &dma); 2229 #ifdef EHCI_DEBUG 2230 if (err) 2231 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2232 #endif 2233 if (err) 2234 return (NULL); 2235 s = splusb(); 2236 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2237 offs = i * EHCI_SQTD_SIZE; 2238 sqtd = KERNADDR(&dma, offs); 2239 sqtd->physaddr = DMAADDR(&dma, offs); 2240 sqtd->nextqtd = sc->sc_freeqtds; 2241 sc->sc_freeqtds = sqtd; 2242 } 2243 splx(s); 2244 } 2245 2246 s = splusb(); 2247 sqtd = sc->sc_freeqtds; 2248 sc->sc_freeqtds = sqtd->nextqtd; 2249 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2250 sqtd->nextqtd = NULL; 2251 sqtd->xfer = NULL; 2252 splx(s); 2253 2254 return (sqtd); 2255 } 2256 2257 void 2258 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2259 { 2260 int s; 2261 2262 s = splusb(); 2263 sqtd->nextqtd = sc->sc_freeqtds; 2264 sc->sc_freeqtds = sqtd; 2265 splx(s); 2266 } 2267 2268 usbd_status 2269 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2270 int alen, int rd, usbd_xfer_handle xfer, 2271 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2272 { 2273 ehci_soft_qtd_t *next, *cur; 2274 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2275 u_int32_t qtdstatus; 2276 int len, curlen, mps; 2277 int i, tog; 2278 usb_dma_t *dma = &xfer->dmabuf; 2279 u_int16_t flags = xfer->flags; 2280 2281 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2282 2283 len = alen; 2284 dataphys = DMAADDR(dma, 0); 2285 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2286 qtdstatus = EHCI_QTD_ACTIVE | 2287 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2288 EHCI_QTD_SET_CERR(3) 2289 /* IOC set below */ 2290 /* BYTES set below */ 2291 ; 2292 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2293 tog = epipe->nexttoggle; 2294 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2295 2296 cur = ehci_alloc_sqtd(sc); 2297 *sp = cur; 2298 if (cur == NULL) 2299 goto nomem; 2300 for (;;) { 2301 dataphyspage = EHCI_PAGE(dataphys); 2302 /* The EHCI hardware can handle at most 5 pages. */ 2303 if (dataphyslastpage - dataphyspage < 2304 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2305 /* we can handle it in this QTD */ 2306 curlen = len; 2307 } else { 2308 /* must use multiple TDs, fill as much as possible. */ 2309 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2310 EHCI_PAGE_OFFSET(dataphys); 2311 #ifdef DIAGNOSTIC 2312 if (curlen > len) { 2313 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2314 "len=0x%x offs=0x%x\n", curlen, len, 2315 EHCI_PAGE_OFFSET(dataphys)); 2316 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2317 dataphyslastpage, dataphyspage, 2318 dataphys); 2319 curlen = len; 2320 } 2321 #endif 2322 /* the length must be a multiple of the max size */ 2323 curlen -= curlen % mps; 2324 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2325 "curlen=%d\n", curlen)); 2326 #ifdef DIAGNOSTIC 2327 if (curlen == 0) 2328 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2329 #endif 2330 } 2331 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2332 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2333 dataphys, dataphyslastpage, 2334 len, curlen)); 2335 len -= curlen; 2336 2337 /* 2338 * Allocate another transfer if there's more data left, 2339 * or if force last short transfer flag is set and we're 2340 * allocating a multiple of the max packet size. 2341 */ 2342 if (len != 0 || 2343 ((curlen % mps) == 0 && !rd && curlen != 0 && 2344 (flags & USBD_FORCE_SHORT_XFER))) { 2345 next = ehci_alloc_sqtd(sc); 2346 if (next == NULL) 2347 goto nomem; 2348 nextphys = htole32(next->physaddr); 2349 } else { 2350 next = NULL; 2351 nextphys = EHCI_NULL; 2352 } 2353 2354 for (i = 0; i * EHCI_PAGE_SIZE < 2355 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2356 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2357 if (i != 0) /* use offset only in first buffer */ 2358 a = EHCI_PAGE(a); 2359 cur->qtd.qtd_buffer[i] = htole32(a); 2360 cur->qtd.qtd_buffer_hi[i] = 0; 2361 #ifdef DIAGNOSTIC 2362 if (i >= EHCI_QTD_NBUFFERS) { 2363 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2364 goto nomem; 2365 } 2366 #endif 2367 } 2368 cur->nextqtd = next; 2369 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2370 cur->qtd.qtd_status = 2371 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2372 cur->xfer = xfer; 2373 cur->len = curlen; 2374 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2375 dataphys, dataphys + curlen)); 2376 /* adjust the toggle based on the number of packets in this 2377 qtd */ 2378 if (((curlen + mps - 1) / mps) & 1) { 2379 tog ^= 1; 2380 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2381 } 2382 if (next == NULL) 2383 break; 2384 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2385 dataphys += curlen; 2386 cur = next; 2387 } 2388 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2389 *ep = cur; 2390 epipe->nexttoggle = tog; 2391 2392 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2393 *sp, *ep)); 2394 2395 return (USBD_NORMAL_COMPLETION); 2396 2397 nomem: 2398 /* XXX free chain */ 2399 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2400 return (USBD_NOMEM); 2401 } 2402 2403 Static void 2404 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2405 ehci_soft_qtd_t *sqtdend) 2406 { 2407 ehci_soft_qtd_t *p; 2408 int i; 2409 2410 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2411 sqtd, sqtdend)); 2412 2413 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2414 p = sqtd->nextqtd; 2415 ehci_free_sqtd(sc, sqtd); 2416 } 2417 } 2418 2419 /****************/ 2420 2421 /* 2422 * Close a reqular pipe. 2423 * Assumes that there are no pending transactions. 2424 */ 2425 void 2426 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2427 { 2428 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2429 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2430 ehci_soft_qh_t *sqh = epipe->sqh; 2431 int s; 2432 2433 s = splusb(); 2434 ehci_rem_qh(sc, sqh, head); 2435 splx(s); 2436 ehci_free_sqh(sc, epipe->sqh); 2437 } 2438 2439 /* 2440 * Abort a device request. 2441 * If this routine is called at splusb() it guarantees that the request 2442 * will be removed from the hardware scheduling and that the callback 2443 * for it will be called with USBD_CANCELLED status. 2444 * It's impossible to guarantee that the requested transfer will not 2445 * have happened since the hardware runs concurrently. 2446 * If the transaction has already happened we rely on the ordinary 2447 * interrupt processing to process it. 2448 * XXX This is most probably wrong. 2449 */ 2450 void 2451 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2452 { 2453 #define exfer EXFER(xfer) 2454 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2455 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2456 ehci_soft_qh_t *sqh = epipe->sqh; 2457 ehci_soft_qtd_t *sqtd; 2458 ehci_physaddr_t cur; 2459 u_int32_t qhstatus; 2460 int s; 2461 int hit; 2462 int wake; 2463 2464 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2465 2466 if (sc->sc_dying) { 2467 /* If we're dying, just do the software part. */ 2468 s = splusb(); 2469 xfer->status = status; /* make software ignore it */ 2470 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2471 usb_transfer_complete(xfer); 2472 splx(s); 2473 return; 2474 } 2475 2476 if (xfer->device->bus->intr_context || !curproc) 2477 panic("ehci_abort_xfer: not in process context"); 2478 2479 /* 2480 * If an abort is already in progress then just wait for it to 2481 * complete and return. 2482 */ 2483 if (xfer->hcflags & UXFER_ABORTING) { 2484 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2485 #ifdef DIAGNOSTIC 2486 if (status == USBD_TIMEOUT) 2487 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2488 #endif 2489 /* Override the status which might be USBD_TIMEOUT. */ 2490 xfer->status = status; 2491 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2492 xfer->hcflags |= UXFER_ABORTWAIT; 2493 while (xfer->hcflags & UXFER_ABORTING) 2494 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2495 return; 2496 } 2497 xfer->hcflags |= UXFER_ABORTING; 2498 2499 /* 2500 * Step 1: Make interrupt routine and hardware ignore xfer. 2501 */ 2502 s = splusb(); 2503 xfer->status = status; /* make software ignore it */ 2504 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2505 qhstatus = sqh->qh.qh_qtd.qtd_status; 2506 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2507 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2508 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2509 if (sqtd == exfer->sqtdend) 2510 break; 2511 } 2512 splx(s); 2513 2514 /* 2515 * Step 2: Wait until we know hardware has finished any possible 2516 * use of the xfer. Also make sure the soft interrupt routine 2517 * has run. 2518 */ 2519 ehci_sync_hc(sc); 2520 s = splusb(); 2521 #ifdef USB_USE_SOFTINTR 2522 sc->sc_softwake = 1; 2523 #endif /* USB_USE_SOFTINTR */ 2524 usb_schedsoftintr(&sc->sc_bus); 2525 #ifdef USB_USE_SOFTINTR 2526 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2527 #endif /* USB_USE_SOFTINTR */ 2528 splx(s); 2529 2530 /* 2531 * Step 3: Remove any vestiges of the xfer from the hardware. 2532 * The complication here is that the hardware may have executed 2533 * beyond the xfer we're trying to abort. So as we're scanning 2534 * the TDs of this xfer we check if the hardware points to 2535 * any of them. 2536 */ 2537 s = splusb(); /* XXX why? */ 2538 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2539 hit = 0; 2540 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2541 hit |= cur == sqtd->physaddr; 2542 if (sqtd == exfer->sqtdend) 2543 break; 2544 } 2545 sqtd = sqtd->nextqtd; 2546 /* Zap curqtd register if hardware pointed inside the xfer. */ 2547 if (hit && sqtd != NULL) { 2548 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2549 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2550 sqh->qh.qh_qtd.qtd_status = qhstatus; 2551 } else { 2552 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2553 } 2554 2555 /* 2556 * Step 4: Execute callback. 2557 */ 2558 #ifdef DIAGNOSTIC 2559 exfer->isdone = 1; 2560 #endif 2561 wake = xfer->hcflags & UXFER_ABORTWAIT; 2562 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2563 usb_transfer_complete(xfer); 2564 if (wake) 2565 wakeup(&xfer->hcflags); 2566 2567 splx(s); 2568 #undef exfer 2569 } 2570 2571 void 2572 ehci_timeout(void *addr) 2573 { 2574 struct ehci_xfer *exfer = addr; 2575 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2576 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2577 2578 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2579 #ifdef USB_DEBUG 2580 if (ehcidebug > 1) 2581 usbd_dump_pipe(exfer->xfer.pipe); 2582 #endif 2583 2584 if (sc->sc_dying) { 2585 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2586 return; 2587 } 2588 2589 /* Execute the abort in a process context. */ 2590 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2591 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2592 USB_TASKQ_HC); 2593 } 2594 2595 void 2596 ehci_timeout_task(void *addr) 2597 { 2598 usbd_xfer_handle xfer = addr; 2599 int s; 2600 2601 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2602 2603 s = splusb(); 2604 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2605 splx(s); 2606 } 2607 2608 /************************/ 2609 2610 Static usbd_status 2611 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2612 { 2613 usbd_status err; 2614 2615 /* Insert last in queue. */ 2616 err = usb_insert_transfer(xfer); 2617 if (err) 2618 return (err); 2619 2620 /* Pipe isn't running, start first */ 2621 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2622 } 2623 2624 Static usbd_status 2625 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2626 { 2627 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2628 usbd_status err; 2629 2630 if (sc->sc_dying) 2631 return (USBD_IOERROR); 2632 2633 #ifdef DIAGNOSTIC 2634 if (!(xfer->rqflags & URQ_REQUEST)) { 2635 /* XXX panic */ 2636 printf("ehci_device_ctrl_transfer: not a request\n"); 2637 return (USBD_INVAL); 2638 } 2639 #endif 2640 2641 err = ehci_device_request(xfer); 2642 if (err) 2643 return (err); 2644 2645 if (sc->sc_bus.use_polling) 2646 ehci_waitintr(sc, xfer); 2647 return (USBD_IN_PROGRESS); 2648 } 2649 2650 void 2651 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2652 { 2653 struct ehci_xfer *ex = EXFER(xfer); 2654 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2655 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2656 2657 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2658 2659 #ifdef DIAGNOSTIC 2660 if (!(xfer->rqflags & URQ_REQUEST)) { 2661 panic("ehci_ctrl_done: not a request"); 2662 } 2663 #endif 2664 2665 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2666 ehci_del_intr_list(ex); /* remove from active list */ 2667 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2668 } 2669 2670 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2671 } 2672 2673 /* Abort a device control request. */ 2674 Static void 2675 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2676 { 2677 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2678 ehci_abort_xfer(xfer, USBD_CANCELLED); 2679 } 2680 2681 /* Close a device control pipe. */ 2682 Static void 2683 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2684 { 2685 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2686 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2687 2688 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2689 ehci_close_pipe(pipe, sc->sc_async_head); 2690 } 2691 2692 usbd_status 2693 ehci_device_request(usbd_xfer_handle xfer) 2694 { 2695 #define exfer EXFER(xfer) 2696 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2697 usb_device_request_t *req = &xfer->request; 2698 usbd_device_handle dev = epipe->pipe.device; 2699 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2700 int addr = dev->address; 2701 ehci_soft_qtd_t *setup, *stat, *next; 2702 ehci_soft_qh_t *sqh; 2703 int isread; 2704 int len; 2705 usbd_status err; 2706 int s; 2707 2708 isread = req->bmRequestType & UT_READ; 2709 len = UGETW(req->wLength); 2710 2711 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2712 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2713 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2714 UGETW(req->wIndex), len, addr, 2715 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2716 2717 setup = ehci_alloc_sqtd(sc); 2718 if (setup == NULL) { 2719 err = USBD_NOMEM; 2720 goto bad1; 2721 } 2722 stat = ehci_alloc_sqtd(sc); 2723 if (stat == NULL) { 2724 err = USBD_NOMEM; 2725 goto bad2; 2726 } 2727 2728 sqh = epipe->sqh; 2729 epipe->u.ctl.length = len; 2730 2731 /* Update device address and length since they may have changed 2732 during the setup of the control pipe in usbd_new_device(). */ 2733 /* XXX This only needs to be done once, but it's too early in open. */ 2734 /* XXXX Should not touch ED here! */ 2735 sqh->qh.qh_endp = 2736 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2737 htole32( 2738 EHCI_QH_SET_ADDR(addr) | 2739 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2740 ); 2741 2742 /* Set up data transaction */ 2743 if (len != 0) { 2744 ehci_soft_qtd_t *end; 2745 2746 /* Start toggle at 1. */ 2747 epipe->nexttoggle = 1; 2748 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2749 &next, &end); 2750 if (err) 2751 goto bad3; 2752 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2753 end->nextqtd = stat; 2754 end->qtd.qtd_next = 2755 end->qtd.qtd_altnext = htole32(stat->physaddr); 2756 } else { 2757 next = stat; 2758 } 2759 2760 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2761 2762 /* Clear toggle */ 2763 setup->qtd.qtd_status = htole32( 2764 EHCI_QTD_ACTIVE | 2765 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2766 EHCI_QTD_SET_CERR(3) | 2767 EHCI_QTD_SET_TOGGLE(0) | 2768 EHCI_QTD_SET_BYTES(sizeof *req) 2769 ); 2770 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2771 setup->qtd.qtd_buffer_hi[0] = 0; 2772 setup->nextqtd = next; 2773 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2774 setup->xfer = xfer; 2775 setup->len = sizeof *req; 2776 2777 stat->qtd.qtd_status = htole32( 2778 EHCI_QTD_ACTIVE | 2779 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2780 EHCI_QTD_SET_CERR(3) | 2781 EHCI_QTD_SET_TOGGLE(1) | 2782 EHCI_QTD_IOC 2783 ); 2784 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2785 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2786 stat->nextqtd = NULL; 2787 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2788 stat->xfer = xfer; 2789 stat->len = 0; 2790 2791 #ifdef EHCI_DEBUG 2792 if (ehcidebug > 5) { 2793 DPRINTF(("ehci_device_request:\n")); 2794 ehci_dump_sqh(sqh); 2795 ehci_dump_sqtds(setup); 2796 } 2797 #endif 2798 2799 exfer->sqtdstart = setup; 2800 exfer->sqtdend = stat; 2801 #ifdef DIAGNOSTIC 2802 if (!exfer->isdone) { 2803 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2804 } 2805 exfer->isdone = 0; 2806 #endif 2807 2808 /* Insert qTD in QH list. */ 2809 s = splusb(); 2810 ehci_set_qh_qtd(sqh, setup); 2811 if (xfer->timeout && !sc->sc_bus.use_polling) { 2812 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2813 ehci_timeout, xfer); 2814 } 2815 ehci_add_intr_list(sc, exfer); 2816 xfer->status = USBD_IN_PROGRESS; 2817 splx(s); 2818 2819 #ifdef EHCI_DEBUG 2820 if (ehcidebug > 10) { 2821 DPRINTF(("ehci_device_request: status=%x\n", 2822 EOREAD4(sc, EHCI_USBSTS))); 2823 delay(10000); 2824 ehci_dump_regs(sc); 2825 ehci_dump_sqh(sc->sc_async_head); 2826 ehci_dump_sqh(sqh); 2827 ehci_dump_sqtds(setup); 2828 } 2829 #endif 2830 2831 return (USBD_NORMAL_COMPLETION); 2832 2833 bad3: 2834 ehci_free_sqtd(sc, stat); 2835 bad2: 2836 ehci_free_sqtd(sc, setup); 2837 bad1: 2838 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2839 xfer->status = err; 2840 usb_transfer_complete(xfer); 2841 return (err); 2842 #undef exfer 2843 } 2844 2845 /* 2846 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2847 * qTD status, or miss signalling occasionally under heavy load. If the host 2848 * machine is too fast, we we can miss transaction completion - when we scan 2849 * the active list the transaction still seems to be active. This generally 2850 * exhibits itself as a umass stall that never recovers. 2851 * 2852 * We work around this behaviour by setting up this callback after any softintr 2853 * that completes with transactions still pending, giving us another chance to 2854 * check for completion after the writeback has taken place. 2855 */ 2856 void 2857 ehci_intrlist_timeout(void *arg) 2858 { 2859 ehci_softc_t *sc = arg; 2860 int s = splusb(); 2861 2862 DPRINTF(("ehci_intrlist_timeout\n")); 2863 usb_schedsoftintr(&sc->sc_bus); 2864 2865 splx(s); 2866 } 2867 2868 /************************/ 2869 2870 Static usbd_status 2871 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2872 { 2873 usbd_status err; 2874 2875 /* Insert last in queue. */ 2876 err = usb_insert_transfer(xfer); 2877 if (err) 2878 return (err); 2879 2880 /* Pipe isn't running, start first */ 2881 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2882 } 2883 2884 usbd_status 2885 ehci_device_bulk_start(usbd_xfer_handle xfer) 2886 { 2887 #define exfer EXFER(xfer) 2888 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2889 usbd_device_handle dev = epipe->pipe.device; 2890 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2891 ehci_soft_qtd_t *data, *dataend; 2892 ehci_soft_qh_t *sqh; 2893 usbd_status err; 2894 int len, isread, endpt; 2895 int s; 2896 2897 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2898 xfer, xfer->length, xfer->flags)); 2899 2900 if (sc->sc_dying) 2901 return (USBD_IOERROR); 2902 2903 #ifdef DIAGNOSTIC 2904 if (xfer->rqflags & URQ_REQUEST) 2905 panic("ehci_device_bulk_start: a request"); 2906 #endif 2907 2908 len = xfer->length; 2909 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2910 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2911 sqh = epipe->sqh; 2912 2913 epipe->u.bulk.length = len; 2914 2915 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2916 &dataend); 2917 if (err) { 2918 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2919 xfer->status = err; 2920 usb_transfer_complete(xfer); 2921 return (err); 2922 } 2923 2924 #ifdef EHCI_DEBUG 2925 if (ehcidebug > 5) { 2926 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2927 ehci_dump_sqh(sqh); 2928 ehci_dump_sqtds(data); 2929 } 2930 #endif 2931 2932 /* Set up interrupt info. */ 2933 exfer->sqtdstart = data; 2934 exfer->sqtdend = dataend; 2935 #ifdef DIAGNOSTIC 2936 if (!exfer->isdone) { 2937 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2938 } 2939 exfer->isdone = 0; 2940 #endif 2941 2942 s = splusb(); 2943 ehci_set_qh_qtd(sqh, data); 2944 if (xfer->timeout && !sc->sc_bus.use_polling) { 2945 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2946 ehci_timeout, xfer); 2947 } 2948 ehci_add_intr_list(sc, exfer); 2949 xfer->status = USBD_IN_PROGRESS; 2950 splx(s); 2951 2952 #ifdef EHCI_DEBUG 2953 if (ehcidebug > 10) { 2954 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2955 delay(10000); 2956 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2957 ehci_dump_regs(sc); 2958 #if 0 2959 printf("async_head:\n"); 2960 ehci_dump_sqh(sc->sc_async_head); 2961 #endif 2962 printf("sqh:\n"); 2963 ehci_dump_sqh(sqh); 2964 ehci_dump_sqtds(data); 2965 } 2966 #endif 2967 2968 if (sc->sc_bus.use_polling) 2969 ehci_waitintr(sc, xfer); 2970 2971 return (USBD_IN_PROGRESS); 2972 #undef exfer 2973 } 2974 2975 Static void 2976 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2977 { 2978 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2979 ehci_abort_xfer(xfer, USBD_CANCELLED); 2980 } 2981 2982 /* 2983 * Close a device bulk pipe. 2984 */ 2985 Static void 2986 ehci_device_bulk_close(usbd_pipe_handle pipe) 2987 { 2988 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2989 2990 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2991 ehci_close_pipe(pipe, sc->sc_async_head); 2992 } 2993 2994 void 2995 ehci_device_bulk_done(usbd_xfer_handle xfer) 2996 { 2997 struct ehci_xfer *ex = EXFER(xfer); 2998 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2999 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3000 3001 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3002 xfer, xfer->actlen)); 3003 3004 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3005 ehci_del_intr_list(ex); /* remove from active list */ 3006 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3007 } 3008 3009 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3010 } 3011 3012 /************************/ 3013 3014 Static usbd_status 3015 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3016 { 3017 struct ehci_soft_islot *isp; 3018 int islot, lev; 3019 3020 /* Find a poll rate that is large enough. */ 3021 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3022 if (EHCI_ILEV_IVAL(lev) <= ival) 3023 break; 3024 3025 /* Pick an interrupt slot at the right level. */ 3026 /* XXX could do better than picking at random */ 3027 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3028 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3029 3030 sqh->islot = islot; 3031 isp = &sc->sc_islots[islot]; 3032 ehci_add_qh(sqh, isp->sqh); 3033 3034 return (USBD_NORMAL_COMPLETION); 3035 } 3036 3037 Static usbd_status 3038 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3039 { 3040 usbd_status err; 3041 3042 /* Insert last in queue. */ 3043 err = usb_insert_transfer(xfer); 3044 if (err) 3045 return (err); 3046 3047 /* 3048 * Pipe isn't running (otherwise err would be USBD_INPROG), 3049 * so start it first. 3050 */ 3051 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3052 } 3053 3054 Static usbd_status 3055 ehci_device_intr_start(usbd_xfer_handle xfer) 3056 { 3057 #define exfer EXFER(xfer) 3058 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3059 usbd_device_handle dev = xfer->pipe->device; 3060 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3061 ehci_soft_qtd_t *data, *dataend; 3062 ehci_soft_qh_t *sqh; 3063 usbd_status err; 3064 int len, isread, endpt; 3065 int s; 3066 3067 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3068 xfer, xfer->length, xfer->flags)); 3069 3070 if (sc->sc_dying) 3071 return (USBD_IOERROR); 3072 3073 #ifdef DIAGNOSTIC 3074 if (xfer->rqflags & URQ_REQUEST) 3075 panic("ehci_device_intr_start: a request"); 3076 #endif 3077 3078 len = xfer->length; 3079 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3080 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3081 sqh = epipe->sqh; 3082 3083 epipe->u.intr.length = len; 3084 3085 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3086 &dataend); 3087 if (err) { 3088 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3089 xfer->status = err; 3090 usb_transfer_complete(xfer); 3091 return (err); 3092 } 3093 3094 #ifdef EHCI_DEBUG 3095 if (ehcidebug > 5) { 3096 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3097 ehci_dump_sqh(sqh); 3098 ehci_dump_sqtds(data); 3099 } 3100 #endif 3101 3102 /* Set up interrupt info. */ 3103 exfer->sqtdstart = data; 3104 exfer->sqtdend = dataend; 3105 #ifdef DIAGNOSTIC 3106 if (!exfer->isdone) { 3107 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3108 } 3109 exfer->isdone = 0; 3110 #endif 3111 3112 s = splusb(); 3113 ehci_set_qh_qtd(sqh, data); 3114 if (xfer->timeout && !sc->sc_bus.use_polling) { 3115 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3116 ehci_timeout, xfer); 3117 } 3118 ehci_add_intr_list(sc, exfer); 3119 xfer->status = USBD_IN_PROGRESS; 3120 splx(s); 3121 3122 #ifdef EHCI_DEBUG 3123 if (ehcidebug > 10) { 3124 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3125 delay(10000); 3126 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3127 ehci_dump_regs(sc); 3128 printf("sqh:\n"); 3129 ehci_dump_sqh(sqh); 3130 ehci_dump_sqtds(data); 3131 } 3132 #endif 3133 3134 if (sc->sc_bus.use_polling) 3135 ehci_waitintr(sc, xfer); 3136 3137 return (USBD_IN_PROGRESS); 3138 #undef exfer 3139 } 3140 3141 Static void 3142 ehci_device_intr_abort(usbd_xfer_handle xfer) 3143 { 3144 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3145 if (xfer->pipe->intrxfer == xfer) { 3146 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3147 xfer->pipe->intrxfer = NULL; 3148 } 3149 ehci_abort_xfer(xfer, USBD_CANCELLED); 3150 } 3151 3152 Static void 3153 ehci_device_intr_close(usbd_pipe_handle pipe) 3154 { 3155 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3156 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3157 struct ehci_soft_islot *isp; 3158 3159 isp = &sc->sc_islots[epipe->sqh->islot]; 3160 ehci_close_pipe(pipe, isp->sqh); 3161 } 3162 3163 Static void 3164 ehci_device_intr_done(usbd_xfer_handle xfer) 3165 { 3166 #define exfer EXFER(xfer) 3167 struct ehci_xfer *ex = EXFER(xfer); 3168 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3169 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3170 ehci_soft_qtd_t *data, *dataend; 3171 ehci_soft_qh_t *sqh; 3172 usbd_status err; 3173 int len, isread, endpt, s; 3174 3175 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3176 xfer, xfer->actlen)); 3177 3178 if (xfer->pipe->repeat) { 3179 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3180 3181 len = epipe->u.intr.length; 3182 xfer->length = len; 3183 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3184 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3185 sqh = epipe->sqh; 3186 3187 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3188 &data, &dataend); 3189 if (err) { 3190 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3191 xfer->status = err; 3192 return; 3193 } 3194 3195 /* Set up interrupt info. */ 3196 exfer->sqtdstart = data; 3197 exfer->sqtdend = dataend; 3198 #ifdef DIAGNOSTIC 3199 if (!exfer->isdone) { 3200 printf("ehci_device_intr_done: not done, ex=%p\n", 3201 exfer); 3202 } 3203 exfer->isdone = 0; 3204 #endif 3205 3206 s = splusb(); 3207 ehci_set_qh_qtd(sqh, data); 3208 if (xfer->timeout && !sc->sc_bus.use_polling) { 3209 usb_callout(xfer->timeout_handle, 3210 mstohz(xfer->timeout), ehci_timeout, xfer); 3211 } 3212 splx(s); 3213 3214 xfer->status = USBD_IN_PROGRESS; 3215 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3216 ehci_del_intr_list(ex); /* remove from active list */ 3217 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3218 } 3219 #undef exfer 3220 } 3221 3222 /************************/ 3223 3224 Static usbd_status 3225 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3226 { 3227 return USBD_IOERROR; 3228 } 3229 Static usbd_status 3230 ehci_device_isoc_start(usbd_xfer_handle xfer) 3231 { 3232 return USBD_IOERROR; 3233 } 3234 Static void 3235 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3236 { 3237 } 3238 Static void 3239 ehci_device_isoc_close(usbd_pipe_handle pipe) 3240 { 3241 } 3242 Static void 3243 ehci_device_isoc_done(usbd_xfer_handle xfer) 3244 { 3245 } 3246
Indexes created Thu Oct 02 01:09:59 GMT 2025