ehci.c revision 1.123.18.3
1 /* $NetBSD: ehci.c,v 1.123.18.3 2007/08/16 11:03:19 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.18.3 2007/08/16 11:03:19 jmcneill Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <machine/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 189 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 190 Static void ehci_disown(ehci_softc_t *, int, int); 191 192 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 193 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 194 195 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 196 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 197 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 198 ehci_softc_t *, int, int, usbd_xfer_handle, 199 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 200 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 201 ehci_soft_qtd_t *); 202 203 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 204 205 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 206 int ival); 207 208 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 209 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 210 ehci_soft_qh_t *); 211 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 212 Static void ehci_sync_hc(ehci_softc_t *); 213 214 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 215 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 #ifdef EHCI_DEBUG 218 Static void ehci_dump_regs(ehci_softc_t *); 219 void ehci_dump(void); 220 Static ehci_softc_t *theehci; 221 Static void ehci_dump_link(ehci_link_t, int); 222 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 223 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 224 Static void ehci_dump_qtd(ehci_qtd_t *); 225 Static void ehci_dump_sqh(ehci_soft_qh_t *); 226 #ifdef DIAGNOSTIC 227 Static void ehci_dump_exfer(struct ehci_xfer *); 228 #endif 229 #endif 230 231 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 232 233 #define EHCI_INTR_ENDPT 1 234 235 #define ehci_add_intr_list(sc, ex) \ 236 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 237 #define ehci_del_intr_list(ex) \ 238 do { \ 239 LIST_REMOVE((ex), inext); \ 240 (ex)->inext.le_prev = NULL; \ 241 } while (0) 242 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 243 244 Static const struct usbd_bus_methods ehci_bus_methods = { 245 ehci_open, 246 ehci_softintr, 247 ehci_poll, 248 ehci_allocm, 249 ehci_freem, 250 ehci_allocx, 251 ehci_freex, 252 }; 253 254 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 255 ehci_root_ctrl_transfer, 256 ehci_root_ctrl_start, 257 ehci_root_ctrl_abort, 258 ehci_root_ctrl_close, 259 ehci_noop, 260 ehci_root_ctrl_done, 261 }; 262 263 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 264 ehci_root_intr_transfer, 265 ehci_root_intr_start, 266 ehci_root_intr_abort, 267 ehci_root_intr_close, 268 ehci_noop, 269 ehci_root_intr_done, 270 }; 271 272 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 273 ehci_device_ctrl_transfer, 274 ehci_device_ctrl_start, 275 ehci_device_ctrl_abort, 276 ehci_device_ctrl_close, 277 ehci_noop, 278 ehci_device_ctrl_done, 279 }; 280 281 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 282 ehci_device_intr_transfer, 283 ehci_device_intr_start, 284 ehci_device_intr_abort, 285 ehci_device_intr_close, 286 ehci_device_clear_toggle, 287 ehci_device_intr_done, 288 }; 289 290 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 291 ehci_device_bulk_transfer, 292 ehci_device_bulk_start, 293 ehci_device_bulk_abort, 294 ehci_device_bulk_close, 295 ehci_device_clear_toggle, 296 ehci_device_bulk_done, 297 }; 298 299 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 300 ehci_device_isoc_transfer, 301 ehci_device_isoc_start, 302 ehci_device_isoc_abort, 303 ehci_device_isoc_close, 304 ehci_noop, 305 ehci_device_isoc_done, 306 }; 307 308 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 309 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 310 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 311 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 312 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 313 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 314 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 315 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 316 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 317 }; 318 319 usbd_status 320 ehci_init(ehci_softc_t *sc) 321 { 322 u_int32_t vers, sparams, cparams, hcr; 323 u_int i; 324 usbd_status err; 325 ehci_soft_qh_t *sqh; 326 u_int ncomp; 327 328 DPRINTF(("ehci_init: start\n")); 329 #ifdef EHCI_DEBUG 330 theehci = sc; 331 #endif 332 333 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 334 335 vers = EREAD2(sc, EHCI_HCIVERSION); 336 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 337 vers >> 8, vers & 0xff); 338 339 sparams = EREAD4(sc, EHCI_HCSPARAMS); 340 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 341 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 342 ncomp = EHCI_HCS_N_CC(sparams); 343 if (ncomp != sc->sc_ncomp) { 344 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 345 USBDEVNAME(sc->sc_bus.bdev), 346 ncomp, sc->sc_ncomp); 347 #if NOHCI == 0 || NUHCI == 0 348 aprint_error("%s: ohci or uhci probably not configured\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 #endif 351 if (ncomp < sc->sc_ncomp) 352 sc->sc_ncomp = ncomp; 353 } 354 if (sc->sc_ncomp > 0) { 355 aprint_normal("%s: companion controller%s, %d port%s each:", 356 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 357 EHCI_HCS_N_PCC(sparams), 358 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 359 for (i = 0; i < sc->sc_ncomp; i++) 360 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 361 aprint_normal("\n"); 362 } 363 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 364 cparams = EREAD4(sc, EHCI_HCCPARAMS); 365 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 366 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 367 368 if (EHCI_HCC_64BIT(cparams)) { 369 /* MUST clear segment register if 64 bit capable. */ 370 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 371 } 372 373 sc->sc_bus.usbrev = USBREV_2_0; 374 375 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 376 USB_MEM_RESERVE); 377 378 /* Reset the controller */ 379 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 380 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 381 usb_delay_ms(&sc->sc_bus, 1); 382 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 383 for (i = 0; i < 100; i++) { 384 usb_delay_ms(&sc->sc_bus, 1); 385 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 386 if (!hcr) 387 break; 388 } 389 if (hcr) { 390 aprint_error("%s: reset timeout\n", 391 USBDEVNAME(sc->sc_bus.bdev)); 392 return (USBD_IOERROR); 393 } 394 395 /* XXX need proper intr scheduling */ 396 sc->sc_rand = 96; 397 398 /* frame list size at default, read back what we got and use that */ 399 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 400 case 0: sc->sc_flsize = 1024; break; 401 case 1: sc->sc_flsize = 512; break; 402 case 2: sc->sc_flsize = 256; break; 403 case 3: return (USBD_IOERROR); 404 } 405 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 406 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 407 if (err) 408 return (err); 409 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 410 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 411 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 412 413 /* Set up the bus struct. */ 414 sc->sc_bus.methods = &ehci_bus_methods; 415 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 416 417 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 418 419 sc->sc_eintrs = EHCI_NORMAL_INTRS; 420 421 /* 422 * Allocate the interrupt dummy QHs. These are arranged to give poll 423 * intervals that are powers of 2 times 1ms. 424 */ 425 for (i = 0; i < EHCI_INTRQHS; i++) { 426 sqh = ehci_alloc_sqh(sc); 427 if (sqh == NULL) { 428 err = USBD_NOMEM; 429 goto bad1; 430 } 431 sc->sc_islots[i].sqh = sqh; 432 } 433 for (i = 0; i < EHCI_INTRQHS; i++) { 434 sqh = sc->sc_islots[i].sqh; 435 if (i == 0) { 436 /* The last (1ms) QH terminates. */ 437 sqh->qh.qh_link = EHCI_NULL; 438 sqh->next = NULL; 439 } else { 440 /* Otherwise the next QH has half the poll interval */ 441 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 442 sqh->qh.qh_link = htole32(sqh->next->physaddr | 443 EHCI_LINK_QH); 444 } 445 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 446 sqh->qh.qh_curqtd = EHCI_NULL; 447 sqh->next = NULL; 448 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 449 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 451 sqh->sqtd = NULL; 452 } 453 /* Point the frame list at the last level (128ms). */ 454 for (i = 0; i < sc->sc_flsize; i++) { 455 int j; 456 457 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 458 revbits[i & (EHCI_MAX_POLLRATE-1)]; 459 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 460 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 461 i)].sqh->physaddr); 462 } 463 464 /* Allocate dummy QH that starts the async list. */ 465 sqh = ehci_alloc_sqh(sc); 466 if (sqh == NULL) { 467 err = USBD_NOMEM; 468 goto bad1; 469 } 470 /* Fill the QH */ 471 sqh->qh.qh_endp = 472 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 473 sqh->qh.qh_link = 474 htole32(sqh->physaddr | EHCI_LINK_QH); 475 sqh->qh.qh_curqtd = EHCI_NULL; 476 sqh->next = NULL; 477 /* Fill the overlay qTD */ 478 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 479 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 481 sqh->sqtd = NULL; 482 #ifdef EHCI_DEBUG 483 if (ehcidebug) { 484 ehci_dump_sqh(sqh); 485 } 486 #endif 487 488 /* Point to async list */ 489 sc->sc_async_head = sqh; 490 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 491 492 usb_callout_init(sc->sc_tmo_intrlist); 493 494 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 495 496 /* Turn on controller */ 497 EOWRITE4(sc, EHCI_USBCMD, 498 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 499 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 500 EHCI_CMD_ASE | 501 EHCI_CMD_PSE | 502 EHCI_CMD_RS); 503 504 /* Take over port ownership */ 505 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 506 507 for (i = 0; i < 100; i++) { 508 usb_delay_ms(&sc->sc_bus, 1); 509 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 510 if (!hcr) 511 break; 512 } 513 if (hcr) { 514 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 515 return (USBD_IOERROR); 516 } 517 518 /* Enable interrupts */ 519 DPRINTFN(1,("ehci_init: enabling\n")); 520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 521 522 return (USBD_NORMAL_COMPLETION); 523 524 #if 0 525 bad2: 526 ehci_free_sqh(sc, sc->sc_async_head); 527 #endif 528 bad1: 529 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 530 return (err); 531 } 532 533 int 534 ehci_intr(void *v) 535 { 536 ehci_softc_t *sc = v; 537 538 if (sc == NULL || sc->sc_dying) 539 return (0); 540 541 /* If we get an interrupt while polling, then just ignore it. */ 542 if (sc->sc_bus.use_polling) { 543 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 544 545 if (intrs) 546 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 547 #ifdef DIAGNOSTIC 548 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 549 #endif 550 return (0); 551 } 552 553 return (ehci_intr1(sc)); 554 } 555 556 Static int 557 ehci_intr1(ehci_softc_t *sc) 558 { 559 u_int32_t intrs, eintrs; 560 561 DPRINTFN(20,("ehci_intr1: enter\n")); 562 563 /* In case the interrupt occurs before initialization has completed. */ 564 if (sc == NULL) { 565 #ifdef DIAGNOSTIC 566 printf("ehci_intr1: sc == NULL\n"); 567 #endif 568 return (0); 569 } 570 571 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 572 if (!intrs) 573 return (0); 574 575 eintrs = intrs & sc->sc_eintrs; 576 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 577 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 578 (u_int)eintrs)); 579 if (!eintrs) 580 return (0); 581 582 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 583 sc->sc_bus.intr_context++; 584 sc->sc_bus.no_intrs++; 585 if (eintrs & EHCI_STS_IAA) { 586 DPRINTF(("ehci_intr1: door bell\n")); 587 wakeup(&sc->sc_async_head); 588 eintrs &= ~EHCI_STS_IAA; 589 } 590 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 591 DPRINTFN(5,("ehci_intr1: %s %s\n", 592 eintrs & EHCI_STS_INT ? "INT" : "", 593 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 594 usb_schedsoftintr(&sc->sc_bus); 595 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 596 } 597 if (eintrs & EHCI_STS_HSE) { 598 printf("%s: unrecoverable error, controller halted\n", 599 USBDEVNAME(sc->sc_bus.bdev)); 600 /* XXX what else */ 601 } 602 if (eintrs & EHCI_STS_PCD) { 603 ehci_pcd(sc, sc->sc_intrxfer); 604 eintrs &= ~EHCI_STS_PCD; 605 } 606 607 sc->sc_bus.intr_context--; 608 609 if (eintrs != 0) { 610 /* Block unprocessed interrupts. */ 611 sc->sc_eintrs &= ~eintrs; 612 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 613 printf("%s: blocking intrs 0x%x\n", 614 USBDEVNAME(sc->sc_bus.bdev), eintrs); 615 } 616 617 return (1); 618 } 619 620 621 void 622 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 623 { 624 usbd_pipe_handle pipe; 625 u_char *p; 626 int i, m; 627 628 if (xfer == NULL) { 629 /* Just ignore the change. */ 630 return; 631 } 632 633 pipe = xfer->pipe; 634 635 p = KERNADDR(&xfer->dmabuf, 0); 636 m = min(sc->sc_noport, xfer->length * 8 - 1); 637 memset(p, 0, xfer->length); 638 for (i = 1; i <= m; i++) { 639 /* Pick out CHANGE bits from the status reg. */ 640 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 641 p[i/8] |= 1 << (i%8); 642 } 643 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 644 xfer->actlen = xfer->length; 645 xfer->status = USBD_NORMAL_COMPLETION; 646 647 usb_transfer_complete(xfer); 648 } 649 650 void 651 ehci_softintr(void *v) 652 { 653 ehci_softc_t *sc = v; 654 struct ehci_xfer *ex, *nextex; 655 656 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 657 sc->sc_bus.intr_context)); 658 659 sc->sc_bus.intr_context++; 660 661 /* 662 * The only explanation I can think of for why EHCI is as brain dead 663 * as UHCI interrupt-wise is that Intel was involved in both. 664 * An interrupt just tells us that something is done, we have no 665 * clue what, so we need to scan through all active transfers. :-( 666 */ 667 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 668 nextex = LIST_NEXT(ex, inext); 669 ehci_check_intr(sc, ex); 670 } 671 672 /* Schedule a callout to catch any dropped transactions. */ 673 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 674 !LIST_EMPTY(&sc->sc_intrhead)) 675 usb_callout(sc->sc_tmo_intrlist, hz, 676 ehci_intrlist_timeout, sc); 677 678 #ifdef USB_USE_SOFTINTR 679 if (sc->sc_softwake) { 680 sc->sc_softwake = 0; 681 wakeup(&sc->sc_softwake); 682 } 683 #endif /* USB_USE_SOFTINTR */ 684 685 sc->sc_bus.intr_context--; 686 } 687 688 /* Check for an interrupt. */ 689 void 690 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 691 { 692 ehci_soft_qtd_t *sqtd, *lsqtd; 693 u_int32_t status; 694 695 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 696 697 if (ex->sqtdstart == NULL) { 698 printf("ehci_check_intr: sqtdstart=NULL\n"); 699 return; 700 } 701 lsqtd = ex->sqtdend; 702 #ifdef DIAGNOSTIC 703 if (lsqtd == NULL) { 704 printf("ehci_check_intr: lsqtd==0\n"); 705 return; 706 } 707 #endif 708 /* 709 * If the last TD is still active we need to check whether there 710 * is a an error somewhere in the middle, or whether there was a 711 * short packet (SPD and not ACTIVE). 712 */ 713 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 714 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 715 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 716 status = le32toh(sqtd->qtd.qtd_status); 717 /* If there's an active QTD the xfer isn't done. */ 718 if (status & EHCI_QTD_ACTIVE) 719 break; 720 /* Any kind of error makes the xfer done. */ 721 if (status & EHCI_QTD_HALTED) 722 goto done; 723 /* We want short packets, and it is short: it's done */ 724 if (EHCI_QTD_GET_BYTES(status) != 0) 725 goto done; 726 } 727 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 728 ex, ex->sqtdstart)); 729 return; 730 } 731 done: 732 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 733 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 734 ehci_idone(ex); 735 } 736 737 void 738 ehci_idone(struct ehci_xfer *ex) 739 { 740 usbd_xfer_handle xfer = &ex->xfer; 741 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 742 ehci_soft_qtd_t *sqtd, *lsqtd; 743 u_int32_t status = 0, nstatus = 0; 744 int actlen; 745 746 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 747 #ifdef DIAGNOSTIC 748 { 749 int s = splhigh(); 750 if (ex->isdone) { 751 splx(s); 752 #ifdef EHCI_DEBUG 753 printf("ehci_idone: ex is done!\n "); 754 ehci_dump_exfer(ex); 755 #else 756 printf("ehci_idone: ex=%p is done!\n", ex); 757 #endif 758 return; 759 } 760 ex->isdone = 1; 761 splx(s); 762 } 763 #endif 764 765 if (xfer->status == USBD_CANCELLED || 766 xfer->status == USBD_TIMEOUT) { 767 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 768 return; 769 } 770 771 #ifdef EHCI_DEBUG 772 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 773 if (ehcidebug > 10) 774 ehci_dump_sqtds(ex->sqtdstart); 775 #endif 776 777 /* The transfer is done, compute actual length and status. */ 778 lsqtd = ex->sqtdend; 779 actlen = 0; 780 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 781 nstatus = le32toh(sqtd->qtd.qtd_status); 782 if (nstatus & EHCI_QTD_ACTIVE) 783 break; 784 785 status = nstatus; 786 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 787 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 788 } 789 790 /* 791 * If there are left over TDs we need to update the toggle. 792 * The default pipe doesn't need it since control transfers 793 * start the toggle at 0 every time. 794 * For a short transfer we need to update the toggle for the missing 795 * packets within the qTD. 796 */ 797 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 798 xfer->pipe->device->default_pipe != xfer->pipe) { 799 DPRINTFN(2, ("ehci_idone: need toggle update " 800 "status=%08x nstatus=%08x\n", status, nstatus)); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 809 xfer->length, actlen, status)); 810 xfer->actlen = actlen; 811 if (status & EHCI_QTD_HALTED) { 812 #ifdef EHCI_DEBUG 813 char sbuf[128]; 814 815 bitmask_snprintf((u_int32_t)status, 816 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 817 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 818 819 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 820 "status 0x%s\n", 821 xfer->pipe->device->address, 822 xfer->pipe->endpoint->edesc->bEndpointAddress, 823 sbuf)); 824 if (ehcidebug > 2) { 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 } 828 #endif 829 /* low&full speed has an extra error flag */ 830 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 831 EHCI_QH_SPEED_HIGH) 832 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 833 else 834 status &= EHCI_QTD_STATERRS; 835 if (status == 0) /* no other errors means a stall */ 836 xfer->status = USBD_STALLED; 837 else 838 xfer->status = USBD_IOERROR; /* more info XXX */ 839 /* XXX need to reset TT on missed microframe */ 840 if (status & EHCI_QTD_MISSEDMICRO) { 841 ehci_softc_t *sc = (ehci_softc_t *) 842 xfer->pipe->device->bus; 843 844 printf("%s: missed microframe, TT reset not " 845 "implemented, hub might be inoperational\n", 846 USBDEVNAME(sc->sc_bus.bdev)); 847 } 848 } else { 849 xfer->status = USBD_NORMAL_COMPLETION; 850 } 851 852 usb_transfer_complete(xfer); 853 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 854 } 855 856 /* 857 * Wait here until controller claims to have an interrupt. 858 * Then call ehci_intr and return. Use timeout to avoid waiting 859 * too long. 860 */ 861 void 862 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 863 { 864 int timo; 865 u_int32_t intrs; 866 867 xfer->status = USBD_IN_PROGRESS; 868 for (timo = xfer->timeout; timo >= 0; timo--) { 869 usb_delay_ms(&sc->sc_bus, 1); 870 if (sc->sc_dying) 871 break; 872 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 873 sc->sc_eintrs; 874 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 875 #ifdef EHCI_DEBUG 876 if (ehcidebug > 15) 877 ehci_dump_regs(sc); 878 #endif 879 if (intrs) { 880 ehci_intr1(sc); 881 if (xfer->status != USBD_IN_PROGRESS) 882 return; 883 } 884 } 885 886 /* Timeout */ 887 DPRINTF(("ehci_waitintr: timeout\n")); 888 xfer->status = USBD_TIMEOUT; 889 usb_transfer_complete(xfer); 890 /* XXX should free TD */ 891 } 892 893 void 894 ehci_poll(struct usbd_bus *bus) 895 { 896 ehci_softc_t *sc = (ehci_softc_t *)bus; 897 #ifdef EHCI_DEBUG 898 static int last; 899 int new; 900 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 901 if (new != last) { 902 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 903 last = new; 904 } 905 #endif 906 907 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 908 ehci_intr1(sc); 909 } 910 911 int 912 ehci_detach(struct ehci_softc *sc, int flags) 913 { 914 int rv = 0; 915 916 if (sc->sc_child != NULL) 917 rv = config_detach(sc->sc_child, flags); 918 919 if (rv != 0) 920 return (rv); 921 922 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 923 924 if (sc->sc_shutdownhook != NULL) 925 shutdownhook_disestablish(sc->sc_shutdownhook); 926 927 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 928 929 /* XXX free other data structures XXX */ 930 931 return (rv); 932 } 933 934 935 int 936 ehci_activate(device_ptr_t self, enum devact act) 937 { 938 struct ehci_softc *sc = (struct ehci_softc *)self; 939 int rv = 0; 940 941 switch (act) { 942 case DVACT_ACTIVATE: 943 return (EOPNOTSUPP); 944 945 case DVACT_DEACTIVATE: 946 sc->sc_dying = 1; 947 if (sc->sc_child != NULL) 948 rv = config_deactivate(sc->sc_child); 949 break; 950 } 951 return (rv); 952 } 953 954 /* 955 * Handle suspend/resume. 956 * 957 * We need to switch to polling mode here, because this routine is 958 * called from an interrupt context. This is all right since we 959 * are almost suspended anyway. 960 * 961 * Note that this power handler isn't to be registered directly; the 962 * bus glue needs to call out to it. 963 */ 964 pnp_status_t 965 ehci_power(device_t dv, pnp_request_t req, void *opaque) 966 { 967 ehci_softc_t *sc = (ehci_softc_t *)dv; 968 pnp_state_t *pstate; 969 pnp_capabilities_t *pcaps; 970 u_int32_t cmd, hcr; 971 int s, i; 972 973 #ifdef EHCI_DEBUG 974 DPRINTF(("ehci_power: sc=%p, req=%d, opaque=%p\n", sc, req, opaque)); 975 if (ehcidebug > 0) 976 ehci_dump_regs(sc); 977 #endif 978 979 s = splhardusb(); 980 switch (req) { 981 case PNP_REQUEST_GET_CAPABILITIES: 982 pcaps = opaque; 983 pcaps->state |= PNP_STATE_D0 | PNP_STATE_D3; 984 break; 985 case PNP_REQUEST_SET_STATE: 986 pstate = opaque; 987 switch (*pstate) { 988 case PNP_STATE_D3: 989 sc->sc_bus.use_polling++; 990 991 for (i = 1; i <= sc->sc_noport; i++) { 992 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 993 if ((cmd & EHCI_PS_PO) == 0 && 994 (cmd & EHCI_PS_PE) == EHCI_PS_PE) 995 EOWRITE4(sc, EHCI_PORTSC(i), 996 cmd | EHCI_PS_SUSP); 997 } 998 999 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1000 1001 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1002 EOWRITE4(sc, EHCI_USBCMD, cmd); 1003 1004 for (i = 0; i < 100; i++) { 1005 hcr = EOREAD4(sc, EHCI_USBSTS) & 1006 (EHCI_STS_ASS | EHCI_STS_PSS); 1007 if (hcr == 0) 1008 break; 1009 1010 usb_delay_ms(&sc->sc_bus, 1); 1011 } 1012 if (hcr != 0) 1013 printf("%s: reset timeout\n", 1014 USBDEVNAME(sc->sc_bus.bdev)); 1015 1016 cmd &= ~EHCI_CMD_RS; 1017 EOWRITE4(sc, EHCI_USBCMD, cmd); 1018 1019 for (i = 0; i < 100; i++) { 1020 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1021 if (hcr == EHCI_STS_HCH) 1022 break; 1023 1024 usb_delay_ms(&sc->sc_bus, 1); 1025 } 1026 if (hcr != EHCI_STS_HCH) 1027 printf("%s: config timeout\n", 1028 USBDEVNAME(sc->sc_bus.bdev)); 1029 1030 sc->sc_bus.use_polling--; 1031 break; 1032 1033 case PNP_STATE_D0: 1034 sc->sc_bus.use_polling++; 1035 1036 /* restore things in case the bios sucks */ 1037 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1038 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1039 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1040 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1041 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1042 1043 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1044 1045 hcr = 0; 1046 for (i = 1; i <= sc->sc_noport; i++) { 1047 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1048 if ((cmd & EHCI_PS_PO) == 0 && 1049 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1050 EOWRITE4(sc, EHCI_PORTSC(i), 1051 cmd | EHCI_PS_FPR); 1052 hcr = 1; 1053 } 1054 } 1055 1056 if (hcr) { 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1058 1059 for (i = 1; i <= sc->sc_noport; i++) { 1060 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1061 if ((cmd & EHCI_PS_PO) == 0 && 1062 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1063 EOWRITE4(sc, EHCI_PORTSC(i), 1064 cmd & ~EHCI_PS_FPR); 1065 } 1066 } 1067 1068 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1069 1070 1071 for (i = 0; i < 100; i++) { 1072 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1073 if (hcr != EHCI_STS_HCH) 1074 break; 1075 1076 usb_delay_ms(&sc->sc_bus, 1); 1077 } 1078 if (hcr == EHCI_STS_HCH) { 1079 printf("%s: config timeout\n", 1080 USBDEVNAME(sc->sc_bus.bdev)); 1081 } 1082 1083 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1084 1085 sc->sc_bus.use_polling--; 1086 break; 1087 default: 1088 break; 1089 } 1090 1091 break; 1092 default: 1093 break; 1094 } 1095 1096 splx(s); 1097 1098 #ifdef EHCI_DEBUG 1099 DPRINTF(("ehci_power: sc=%p\n", sc)); 1100 if (ehcidebug > 0) 1101 ehci_dump_regs(sc); 1102 #endif 1103 1104 return PNP_STATUS_SUCCESS; 1105 } 1106 1107 /* 1108 * Shut down the controller when the system is going down. 1109 */ 1110 void 1111 ehci_shutdown(void *v) 1112 { 1113 ehci_softc_t *sc = v; 1114 1115 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1116 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1117 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1118 } 1119 1120 usbd_status 1121 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1122 { 1123 struct ehci_softc *sc = (struct ehci_softc *)bus; 1124 usbd_status err; 1125 1126 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1127 if (err == USBD_NOMEM) 1128 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1129 #ifdef EHCI_DEBUG 1130 if (err) 1131 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1132 #endif 1133 return (err); 1134 } 1135 1136 void 1137 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1138 { 1139 struct ehci_softc *sc = (struct ehci_softc *)bus; 1140 1141 if (dma->block->flags & USB_DMA_RESERVE) { 1142 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1143 dma); 1144 return; 1145 } 1146 usb_freemem(&sc->sc_bus, dma); 1147 } 1148 1149 usbd_xfer_handle 1150 ehci_allocx(struct usbd_bus *bus) 1151 { 1152 struct ehci_softc *sc = (struct ehci_softc *)bus; 1153 usbd_xfer_handle xfer; 1154 1155 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1156 if (xfer != NULL) { 1157 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1158 #ifdef DIAGNOSTIC 1159 if (xfer->busy_free != XFER_FREE) { 1160 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1161 xfer->busy_free); 1162 } 1163 #endif 1164 } else { 1165 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1166 } 1167 if (xfer != NULL) { 1168 memset(xfer, 0, sizeof(struct ehci_xfer)); 1169 #ifdef DIAGNOSTIC 1170 EXFER(xfer)->isdone = 1; 1171 xfer->busy_free = XFER_BUSY; 1172 #endif 1173 } 1174 return (xfer); 1175 } 1176 1177 void 1178 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1179 { 1180 struct ehci_softc *sc = (struct ehci_softc *)bus; 1181 1182 #ifdef DIAGNOSTIC 1183 if (xfer->busy_free != XFER_BUSY) { 1184 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1185 xfer->busy_free); 1186 } 1187 xfer->busy_free = XFER_FREE; 1188 if (!EXFER(xfer)->isdone) { 1189 printf("ehci_freex: !isdone\n"); 1190 } 1191 #endif 1192 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1193 } 1194 1195 Static void 1196 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1197 { 1198 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1199 1200 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1201 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1202 #ifdef USB_DEBUG 1203 if (ehcidebug) 1204 usbd_dump_pipe(pipe); 1205 #endif 1206 epipe->nexttoggle = 0; 1207 } 1208 1209 Static void 1210 ehci_noop(usbd_pipe_handle pipe) 1211 { 1212 } 1213 1214 #ifdef EHCI_DEBUG 1215 void 1216 ehci_dump_regs(ehci_softc_t *sc) 1217 { 1218 int i; 1219 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1220 EOREAD4(sc, EHCI_USBCMD), 1221 EOREAD4(sc, EHCI_USBSTS), 1222 EOREAD4(sc, EHCI_USBINTR)); 1223 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1224 EOREAD4(sc, EHCI_FRINDEX), 1225 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1226 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1227 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1228 for (i = 1; i <= sc->sc_noport; i++) 1229 printf("port %d status=0x%08x\n", i, 1230 EOREAD4(sc, EHCI_PORTSC(i))); 1231 } 1232 1233 /* 1234 * Unused function - this is meant to be called from a kernel 1235 * debugger. 1236 */ 1237 void 1238 ehci_dump() 1239 { 1240 ehci_dump_regs(theehci); 1241 } 1242 1243 void 1244 ehci_dump_link(ehci_link_t link, int type) 1245 { 1246 link = le32toh(link); 1247 printf("0x%08x", link); 1248 if (link & EHCI_LINK_TERMINATE) 1249 printf("<T>"); 1250 else { 1251 printf("<"); 1252 if (type) { 1253 switch (EHCI_LINK_TYPE(link)) { 1254 case EHCI_LINK_ITD: printf("ITD"); break; 1255 case EHCI_LINK_QH: printf("QH"); break; 1256 case EHCI_LINK_SITD: printf("SITD"); break; 1257 case EHCI_LINK_FSTN: printf("FSTN"); break; 1258 } 1259 } 1260 printf(">"); 1261 } 1262 } 1263 1264 void 1265 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1266 { 1267 int i; 1268 u_int32_t stop; 1269 1270 stop = 0; 1271 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1272 ehci_dump_sqtd(sqtd); 1273 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1274 } 1275 if (sqtd) 1276 printf("dump aborted, too many TDs\n"); 1277 } 1278 1279 void 1280 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1281 { 1282 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1283 ehci_dump_qtd(&sqtd->qtd); 1284 } 1285 1286 void 1287 ehci_dump_qtd(ehci_qtd_t *qtd) 1288 { 1289 u_int32_t s; 1290 char sbuf[128]; 1291 1292 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1293 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1294 printf("\n"); 1295 s = le32toh(qtd->qtd_status); 1296 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1297 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1298 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1299 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1300 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1301 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1302 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1303 EHCI_QTD_GET_PID(s), sbuf); 1304 for (s = 0; s < 5; s++) 1305 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1306 } 1307 1308 void 1309 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1310 { 1311 ehci_qh_t *qh = &sqh->qh; 1312 u_int32_t endp, endphub; 1313 1314 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1315 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1316 endp = le32toh(qh->qh_endp); 1317 printf(" endp=0x%08x\n", endp); 1318 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1319 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1320 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1321 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1322 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1323 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1324 EHCI_QH_GET_NRL(endp)); 1325 endphub = le32toh(qh->qh_endphub); 1326 printf(" endphub=0x%08x\n", endphub); 1327 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1328 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1329 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1330 EHCI_QH_GET_MULT(endphub)); 1331 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1332 printf("Overlay qTD:\n"); 1333 ehci_dump_qtd(&qh->qh_qtd); 1334 } 1335 1336 #ifdef DIAGNOSTIC 1337 Static void 1338 ehci_dump_exfer(struct ehci_xfer *ex) 1339 { 1340 printf("ehci_dump_exfer: ex=%p\n", ex); 1341 } 1342 #endif 1343 #endif 1344 1345 usbd_status 1346 ehci_open(usbd_pipe_handle pipe) 1347 { 1348 usbd_device_handle dev = pipe->device; 1349 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1350 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1351 u_int8_t addr = dev->address; 1352 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1353 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1354 ehci_soft_qh_t *sqh; 1355 usbd_status err; 1356 int s; 1357 int ival, speed, naks; 1358 int hshubaddr, hshubport; 1359 1360 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1361 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1362 1363 if (dev->myhsport) { 1364 hshubaddr = dev->myhsport->parent->address; 1365 hshubport = dev->myhsport->portno; 1366 } else { 1367 hshubaddr = 0; 1368 hshubport = 0; 1369 } 1370 1371 if (sc->sc_dying) 1372 return (USBD_IOERROR); 1373 1374 epipe->nexttoggle = 0; 1375 1376 if (addr == sc->sc_addr) { 1377 switch (ed->bEndpointAddress) { 1378 case USB_CONTROL_ENDPOINT: 1379 pipe->methods = &ehci_root_ctrl_methods; 1380 break; 1381 case UE_DIR_IN | EHCI_INTR_ENDPT: 1382 pipe->methods = &ehci_root_intr_methods; 1383 break; 1384 default: 1385 return (USBD_INVAL); 1386 } 1387 return (USBD_NORMAL_COMPLETION); 1388 } 1389 1390 /* XXX All this stuff is only valid for async. */ 1391 switch (dev->speed) { 1392 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1393 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1394 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1395 default: panic("ehci_open: bad device speed %d", dev->speed); 1396 } 1397 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1398 printf("%s: *** WARNING: opening low/full speed isoc device, " 1399 "this does not work yet.\n", 1400 USBDEVNAME(sc->sc_bus.bdev)); 1401 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1402 hshubaddr, hshubport)); 1403 return USBD_INVAL; 1404 } 1405 1406 naks = 8; /* XXX */ 1407 sqh = ehci_alloc_sqh(sc); 1408 if (sqh == NULL) 1409 return (USBD_NOMEM); 1410 /* qh_link filled when the QH is added */ 1411 sqh->qh.qh_endp = htole32( 1412 EHCI_QH_SET_ADDR(addr) | 1413 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1414 EHCI_QH_SET_EPS(speed) | 1415 EHCI_QH_DTC | 1416 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1417 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1418 EHCI_QH_CTL : 0) | 1419 EHCI_QH_SET_NRL(naks) 1420 ); 1421 sqh->qh.qh_endphub = htole32( 1422 EHCI_QH_SET_MULT(1) | 1423 EHCI_QH_SET_HUBA(hshubaddr) | 1424 EHCI_QH_SET_PORT(hshubport) | 1425 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1426 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1427 ); 1428 sqh->qh.qh_curqtd = EHCI_NULL; 1429 /* Fill the overlay qTD */ 1430 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1431 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1432 sqh->qh.qh_qtd.qtd_status = htole32(0); 1433 1434 epipe->sqh = sqh; 1435 1436 switch (xfertype) { 1437 case UE_CONTROL: 1438 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1439 0, &epipe->u.ctl.reqdma); 1440 #ifdef EHCI_DEBUG 1441 if (err) 1442 printf("ehci_open: usb_allocmem()=%d\n", err); 1443 #endif 1444 if (err) 1445 goto bad; 1446 pipe->methods = &ehci_device_ctrl_methods; 1447 s = splusb(); 1448 ehci_add_qh(sqh, sc->sc_async_head); 1449 splx(s); 1450 break; 1451 case UE_BULK: 1452 pipe->methods = &ehci_device_bulk_methods; 1453 s = splusb(); 1454 ehci_add_qh(sqh, sc->sc_async_head); 1455 splx(s); 1456 break; 1457 case UE_INTERRUPT: 1458 pipe->methods = &ehci_device_intr_methods; 1459 ival = pipe->interval; 1460 if (ival == USBD_DEFAULT_INTERVAL) { 1461 if (speed == EHCI_QH_SPEED_HIGH) { 1462 if (ed->bInterval > 16) { 1463 /* 1464 * illegal with high-speed, but there 1465 * were documentation bugs in the spec, 1466 * so be generous 1467 */ 1468 ival = 256; 1469 } else 1470 ival = (1 << (ed->bInterval - 1)) / 8; 1471 } else 1472 ival = ed->bInterval; 1473 } 1474 err = ehci_device_setintr(sc, sqh, ival); 1475 if (err) 1476 goto bad; 1477 break; 1478 case UE_ISOCHRONOUS: 1479 pipe->methods = &ehci_device_isoc_methods; 1480 /* FALLTHROUGH */ 1481 default: 1482 err = USBD_INVAL; 1483 goto bad; 1484 } 1485 return (USBD_NORMAL_COMPLETION); 1486 1487 bad: 1488 ehci_free_sqh(sc, sqh); 1489 return (err); 1490 } 1491 1492 /* 1493 * Add an ED to the schedule. Called at splusb(). 1494 */ 1495 void 1496 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1497 { 1498 SPLUSBCHECK; 1499 1500 sqh->next = head->next; 1501 sqh->qh.qh_link = head->qh.qh_link; 1502 head->next = sqh; 1503 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1504 1505 #ifdef EHCI_DEBUG 1506 if (ehcidebug > 5) { 1507 printf("ehci_add_qh:\n"); 1508 ehci_dump_sqh(sqh); 1509 } 1510 #endif 1511 } 1512 1513 /* 1514 * Remove an ED from the schedule. Called at splusb(). 1515 */ 1516 void 1517 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1518 { 1519 ehci_soft_qh_t *p; 1520 1521 SPLUSBCHECK; 1522 /* XXX */ 1523 for (p = head; p != NULL && p->next != sqh; p = p->next) 1524 ; 1525 if (p == NULL) 1526 panic("ehci_rem_qh: ED not found"); 1527 p->next = sqh->next; 1528 p->qh.qh_link = sqh->qh.qh_link; 1529 1530 ehci_sync_hc(sc); 1531 } 1532 1533 void 1534 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1535 { 1536 int i; 1537 u_int32_t status; 1538 1539 /* Save toggle bit and ping status. */ 1540 status = sqh->qh.qh_qtd.qtd_status & 1541 htole32(EHCI_QTD_TOGGLE_MASK | 1542 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1543 /* Set HALTED to make hw leave it alone. */ 1544 sqh->qh.qh_qtd.qtd_status = 1545 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1546 sqh->qh.qh_curqtd = 0; 1547 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1548 sqh->qh.qh_qtd.qtd_altnext = 0; 1549 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1550 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1551 sqh->sqtd = sqtd; 1552 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1553 sqh->qh.qh_qtd.qtd_status = status; 1554 } 1555 1556 /* 1557 * Ensure that the HC has released all references to the QH. We do this 1558 * by asking for a Async Advance Doorbell interrupt and then we wait for 1559 * the interrupt. 1560 * To make this easier we first obtain exclusive use of the doorbell. 1561 */ 1562 void 1563 ehci_sync_hc(ehci_softc_t *sc) 1564 { 1565 int s, error; 1566 1567 if (sc->sc_dying) { 1568 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1569 return; 1570 } 1571 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1572 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1573 s = splhardusb(); 1574 /* ask for doorbell */ 1575 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1576 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1577 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1578 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1579 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1580 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1581 splx(s); 1582 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1583 #ifdef DIAGNOSTIC 1584 if (error) 1585 printf("ehci_sync_hc: tsleep() = %d\n", error); 1586 #endif 1587 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1588 } 1589 1590 /***********/ 1591 1592 /* 1593 * Data structures and routines to emulate the root hub. 1594 */ 1595 Static usb_device_descriptor_t ehci_devd = { 1596 USB_DEVICE_DESCRIPTOR_SIZE, 1597 UDESC_DEVICE, /* type */ 1598 {0x00, 0x02}, /* USB version */ 1599 UDCLASS_HUB, /* class */ 1600 UDSUBCLASS_HUB, /* subclass */ 1601 UDPROTO_HSHUBSTT, /* protocol */ 1602 64, /* max packet */ 1603 {0},{0},{0x00,0x01}, /* device id */ 1604 1,2,0, /* string indicies */ 1605 1 /* # of configurations */ 1606 }; 1607 1608 Static const usb_device_qualifier_t ehci_odevd = { 1609 USB_DEVICE_DESCRIPTOR_SIZE, 1610 UDESC_DEVICE_QUALIFIER, /* type */ 1611 {0x00, 0x02}, /* USB version */ 1612 UDCLASS_HUB, /* class */ 1613 UDSUBCLASS_HUB, /* subclass */ 1614 UDPROTO_FSHUB, /* protocol */ 1615 64, /* max packet */ 1616 1, /* # of configurations */ 1617 0 1618 }; 1619 1620 Static const usb_config_descriptor_t ehci_confd = { 1621 USB_CONFIG_DESCRIPTOR_SIZE, 1622 UDESC_CONFIG, 1623 {USB_CONFIG_DESCRIPTOR_SIZE + 1624 USB_INTERFACE_DESCRIPTOR_SIZE + 1625 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1626 1, 1627 1, 1628 0, 1629 UC_ATTR_MBO | UC_SELF_POWERED, 1630 0 /* max power */ 1631 }; 1632 1633 Static const usb_interface_descriptor_t ehci_ifcd = { 1634 USB_INTERFACE_DESCRIPTOR_SIZE, 1635 UDESC_INTERFACE, 1636 0, 1637 0, 1638 1, 1639 UICLASS_HUB, 1640 UISUBCLASS_HUB, 1641 UIPROTO_HSHUBSTT, 1642 0 1643 }; 1644 1645 Static const usb_endpoint_descriptor_t ehci_endpd = { 1646 USB_ENDPOINT_DESCRIPTOR_SIZE, 1647 UDESC_ENDPOINT, 1648 UE_DIR_IN | EHCI_INTR_ENDPT, 1649 UE_INTERRUPT, 1650 {8, 0}, /* max packet */ 1651 12 1652 }; 1653 1654 Static const usb_hub_descriptor_t ehci_hubd = { 1655 USB_HUB_DESCRIPTOR_SIZE, 1656 UDESC_HUB, 1657 0, 1658 {0,0}, 1659 0, 1660 0, 1661 {""}, 1662 {""}, 1663 }; 1664 1665 Static int 1666 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1667 { 1668 int i; 1669 1670 if (l == 0) 1671 return (0); 1672 p->bLength = 2 * strlen(s) + 2; 1673 if (l == 1) 1674 return (1); 1675 p->bDescriptorType = UDESC_STRING; 1676 l -= 2; 1677 for (i = 0; s[i] && l > 1; i++, l -= 2) 1678 USETW2(p->bString[i], 0, s[i]); 1679 return (2*i+2); 1680 } 1681 1682 /* 1683 * Simulate a hardware hub by handling all the necessary requests. 1684 */ 1685 Static usbd_status 1686 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1687 { 1688 usbd_status err; 1689 1690 /* Insert last in queue. */ 1691 err = usb_insert_transfer(xfer); 1692 if (err) 1693 return (err); 1694 1695 /* Pipe isn't running, start first */ 1696 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1697 } 1698 1699 Static usbd_status 1700 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1701 { 1702 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1703 usb_device_request_t *req; 1704 void *buf = NULL; 1705 int port, i; 1706 int s, len, value, index, l, totlen = 0; 1707 usb_port_status_t ps; 1708 usb_hub_descriptor_t hubd; 1709 usbd_status err; 1710 u_int32_t v; 1711 1712 if (sc->sc_dying) 1713 return (USBD_IOERROR); 1714 1715 #ifdef DIAGNOSTIC 1716 if (!(xfer->rqflags & URQ_REQUEST)) 1717 /* XXX panic */ 1718 return (USBD_INVAL); 1719 #endif 1720 req = &xfer->request; 1721 1722 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1723 req->bmRequestType, req->bRequest)); 1724 1725 len = UGETW(req->wLength); 1726 value = UGETW(req->wValue); 1727 index = UGETW(req->wIndex); 1728 1729 if (len != 0) 1730 buf = KERNADDR(&xfer->dmabuf, 0); 1731 1732 #define C(x,y) ((x) | ((y) << 8)) 1733 switch(C(req->bRequest, req->bmRequestType)) { 1734 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1735 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1736 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1737 /* 1738 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1739 * for the integrated root hub. 1740 */ 1741 break; 1742 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1743 if (len > 0) { 1744 *(u_int8_t *)buf = sc->sc_conf; 1745 totlen = 1; 1746 } 1747 break; 1748 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1749 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1750 if (len == 0) 1751 break; 1752 switch(value >> 8) { 1753 case UDESC_DEVICE: 1754 if ((value & 0xff) != 0) { 1755 err = USBD_IOERROR; 1756 goto ret; 1757 } 1758 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1759 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1760 memcpy(buf, &ehci_devd, l); 1761 break; 1762 /* 1763 * We can't really operate at another speed, but the spec says 1764 * we need this descriptor. 1765 */ 1766 case UDESC_DEVICE_QUALIFIER: 1767 if ((value & 0xff) != 0) { 1768 err = USBD_IOERROR; 1769 goto ret; 1770 } 1771 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1772 memcpy(buf, &ehci_odevd, l); 1773 break; 1774 /* 1775 * We can't really operate at another speed, but the spec says 1776 * we need this descriptor. 1777 */ 1778 case UDESC_OTHER_SPEED_CONFIGURATION: 1779 case UDESC_CONFIG: 1780 if ((value & 0xff) != 0) { 1781 err = USBD_IOERROR; 1782 goto ret; 1783 } 1784 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1785 memcpy(buf, &ehci_confd, l); 1786 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1787 value >> 8; 1788 buf = (char *)buf + l; 1789 len -= l; 1790 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1791 totlen += l; 1792 memcpy(buf, &ehci_ifcd, l); 1793 buf = (char *)buf + l; 1794 len -= l; 1795 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1796 totlen += l; 1797 memcpy(buf, &ehci_endpd, l); 1798 break; 1799 case UDESC_STRING: 1800 *(u_int8_t *)buf = 0; 1801 totlen = 1; 1802 switch (value & 0xff) { 1803 case 0: /* Language table */ 1804 if (len > 0) 1805 *(u_int8_t *)buf = 4; 1806 if (len >= 4) { 1807 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1808 totlen = 4; 1809 } 1810 break; 1811 case 1: /* Vendor */ 1812 totlen = ehci_str(buf, len, sc->sc_vendor); 1813 break; 1814 case 2: /* Product */ 1815 totlen = ehci_str(buf, len, "EHCI root hub"); 1816 break; 1817 } 1818 break; 1819 default: 1820 err = USBD_IOERROR; 1821 goto ret; 1822 } 1823 break; 1824 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1825 if (len > 0) { 1826 *(u_int8_t *)buf = 0; 1827 totlen = 1; 1828 } 1829 break; 1830 case C(UR_GET_STATUS, UT_READ_DEVICE): 1831 if (len > 1) { 1832 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1833 totlen = 2; 1834 } 1835 break; 1836 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1837 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1838 if (len > 1) { 1839 USETW(((usb_status_t *)buf)->wStatus, 0); 1840 totlen = 2; 1841 } 1842 break; 1843 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1844 if (value >= USB_MAX_DEVICES) { 1845 err = USBD_IOERROR; 1846 goto ret; 1847 } 1848 sc->sc_addr = value; 1849 break; 1850 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1851 if (value != 0 && value != 1) { 1852 err = USBD_IOERROR; 1853 goto ret; 1854 } 1855 sc->sc_conf = value; 1856 break; 1857 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1858 break; 1859 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1860 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1861 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1862 err = USBD_IOERROR; 1863 goto ret; 1864 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1865 break; 1866 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1867 break; 1868 /* Hub requests */ 1869 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1870 break; 1871 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1872 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1873 "port=%d feature=%d\n", 1874 index, value)); 1875 if (index < 1 || index > sc->sc_noport) { 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 port = EHCI_PORTSC(index); 1880 v = EOREAD4(sc, port); 1881 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1882 v &= ~EHCI_PS_CLEAR; 1883 switch(value) { 1884 case UHF_PORT_ENABLE: 1885 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1886 break; 1887 case UHF_PORT_SUSPEND: 1888 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1889 break; 1890 case UHF_PORT_POWER: 1891 if (sc->sc_hasppc) 1892 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1893 break; 1894 case UHF_PORT_TEST: 1895 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1896 "%d\n", index)); 1897 break; 1898 case UHF_PORT_INDICATOR: 1899 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1900 "%d\n", index)); 1901 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1902 break; 1903 case UHF_C_PORT_CONNECTION: 1904 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1905 break; 1906 case UHF_C_PORT_ENABLE: 1907 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1908 break; 1909 case UHF_C_PORT_SUSPEND: 1910 /* how? */ 1911 break; 1912 case UHF_C_PORT_OVER_CURRENT: 1913 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1914 break; 1915 case UHF_C_PORT_RESET: 1916 sc->sc_isreset[index] = 0; 1917 break; 1918 default: 1919 err = USBD_IOERROR; 1920 goto ret; 1921 } 1922 #if 0 1923 switch(value) { 1924 case UHF_C_PORT_CONNECTION: 1925 case UHF_C_PORT_ENABLE: 1926 case UHF_C_PORT_SUSPEND: 1927 case UHF_C_PORT_OVER_CURRENT: 1928 case UHF_C_PORT_RESET: 1929 default: 1930 break; 1931 } 1932 #endif 1933 break; 1934 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1935 if (len == 0) 1936 break; 1937 if ((value & 0xff) != 0) { 1938 err = USBD_IOERROR; 1939 goto ret; 1940 } 1941 hubd = ehci_hubd; 1942 hubd.bNbrPorts = sc->sc_noport; 1943 v = EOREAD4(sc, EHCI_HCSPARAMS); 1944 USETW(hubd.wHubCharacteristics, 1945 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1946 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1947 ? UHD_PORT_IND : 0); 1948 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1949 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1950 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1951 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1952 l = min(len, hubd.bDescLength); 1953 totlen = l; 1954 memcpy(buf, &hubd, l); 1955 break; 1956 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1957 if (len != 4) { 1958 err = USBD_IOERROR; 1959 goto ret; 1960 } 1961 memset(buf, 0, len); /* ? XXX */ 1962 totlen = len; 1963 break; 1964 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1965 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1966 index)); 1967 if (index < 1 || index > sc->sc_noport) { 1968 err = USBD_IOERROR; 1969 goto ret; 1970 } 1971 if (len != 4) { 1972 err = USBD_IOERROR; 1973 goto ret; 1974 } 1975 v = EOREAD4(sc, EHCI_PORTSC(index)); 1976 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1977 v)); 1978 i = UPS_HIGH_SPEED; 1979 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1980 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1981 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1982 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1983 if (v & EHCI_PS_PR) i |= UPS_RESET; 1984 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1985 USETW(ps.wPortStatus, i); 1986 i = 0; 1987 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1988 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1989 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1990 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1991 USETW(ps.wPortChange, i); 1992 l = min(len, sizeof ps); 1993 memcpy(buf, &ps, l); 1994 totlen = l; 1995 break; 1996 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1997 err = USBD_IOERROR; 1998 goto ret; 1999 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2000 break; 2001 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2002 if (index < 1 || index > sc->sc_noport) { 2003 err = USBD_IOERROR; 2004 goto ret; 2005 } 2006 port = EHCI_PORTSC(index); 2007 v = EOREAD4(sc, port); 2008 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 2009 v &= ~EHCI_PS_CLEAR; 2010 switch(value) { 2011 case UHF_PORT_ENABLE: 2012 EOWRITE4(sc, port, v | EHCI_PS_PE); 2013 break; 2014 case UHF_PORT_SUSPEND: 2015 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 2016 break; 2017 case UHF_PORT_RESET: 2018 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 2019 index)); 2020 if (EHCI_PS_IS_LOWSPEED(v)) { 2021 /* Low speed device, give up ownership. */ 2022 ehci_disown(sc, index, 1); 2023 break; 2024 } 2025 /* Start reset sequence. */ 2026 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2027 EOWRITE4(sc, port, v | EHCI_PS_PR); 2028 /* Wait for reset to complete. */ 2029 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2030 if (sc->sc_dying) { 2031 err = USBD_IOERROR; 2032 goto ret; 2033 } 2034 /* Terminate reset sequence. */ 2035 EOWRITE4(sc, port, v); 2036 /* Wait for HC to complete reset. */ 2037 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2038 if (sc->sc_dying) { 2039 err = USBD_IOERROR; 2040 goto ret; 2041 } 2042 v = EOREAD4(sc, port); 2043 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2044 if (v & EHCI_PS_PR) { 2045 printf("%s: port reset timeout\n", 2046 USBDEVNAME(sc->sc_bus.bdev)); 2047 return (USBD_TIMEOUT); 2048 } 2049 if (!(v & EHCI_PS_PE)) { 2050 /* Not a high speed device, give up ownership.*/ 2051 ehci_disown(sc, index, 0); 2052 break; 2053 } 2054 sc->sc_isreset[index] = 1; 2055 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2056 index, v)); 2057 break; 2058 case UHF_PORT_POWER: 2059 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2060 "%d (has PPC = %d)\n", index, 2061 sc->sc_hasppc)); 2062 if (sc->sc_hasppc) 2063 EOWRITE4(sc, port, v | EHCI_PS_PP); 2064 break; 2065 case UHF_PORT_TEST: 2066 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2067 "%d\n", index)); 2068 break; 2069 case UHF_PORT_INDICATOR: 2070 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2071 "%d\n", index)); 2072 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2073 break; 2074 default: 2075 err = USBD_IOERROR; 2076 goto ret; 2077 } 2078 break; 2079 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2080 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2081 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2082 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2083 break; 2084 default: 2085 err = USBD_IOERROR; 2086 goto ret; 2087 } 2088 xfer->actlen = totlen; 2089 err = USBD_NORMAL_COMPLETION; 2090 ret: 2091 xfer->status = err; 2092 s = splusb(); 2093 usb_transfer_complete(xfer); 2094 splx(s); 2095 return (USBD_IN_PROGRESS); 2096 } 2097 2098 void 2099 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2100 { 2101 int port; 2102 u_int32_t v; 2103 2104 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2105 #ifdef DIAGNOSTIC 2106 if (sc->sc_npcomp != 0) { 2107 int i = (index-1) / sc->sc_npcomp; 2108 if (i >= sc->sc_ncomp) 2109 printf("%s: strange port\n", 2110 USBDEVNAME(sc->sc_bus.bdev)); 2111 else 2112 printf("%s: handing over %s speed device on " 2113 "port %d to %s\n", 2114 USBDEVNAME(sc->sc_bus.bdev), 2115 lowspeed ? "low" : "full", 2116 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2117 } else { 2118 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2119 } 2120 #endif 2121 port = EHCI_PORTSC(index); 2122 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2123 EOWRITE4(sc, port, v | EHCI_PS_PO); 2124 } 2125 2126 /* Abort a root control request. */ 2127 Static void 2128 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2129 { 2130 /* Nothing to do, all transfers are synchronous. */ 2131 } 2132 2133 /* Close the root pipe. */ 2134 Static void 2135 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2136 { 2137 DPRINTF(("ehci_root_ctrl_close\n")); 2138 /* Nothing to do. */ 2139 } 2140 2141 void 2142 ehci_root_intr_done(usbd_xfer_handle xfer) 2143 { 2144 xfer->hcpriv = NULL; 2145 } 2146 2147 Static usbd_status 2148 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2149 { 2150 usbd_status err; 2151 2152 /* Insert last in queue. */ 2153 err = usb_insert_transfer(xfer); 2154 if (err) 2155 return (err); 2156 2157 /* Pipe isn't running, start first */ 2158 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2159 } 2160 2161 Static usbd_status 2162 ehci_root_intr_start(usbd_xfer_handle xfer) 2163 { 2164 usbd_pipe_handle pipe = xfer->pipe; 2165 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2166 2167 if (sc->sc_dying) 2168 return (USBD_IOERROR); 2169 2170 sc->sc_intrxfer = xfer; 2171 2172 return (USBD_IN_PROGRESS); 2173 } 2174 2175 /* Abort a root interrupt request. */ 2176 Static void 2177 ehci_root_intr_abort(usbd_xfer_handle xfer) 2178 { 2179 int s; 2180 2181 if (xfer->pipe->intrxfer == xfer) { 2182 DPRINTF(("ehci_root_intr_abort: remove\n")); 2183 xfer->pipe->intrxfer = NULL; 2184 } 2185 xfer->status = USBD_CANCELLED; 2186 s = splusb(); 2187 usb_transfer_complete(xfer); 2188 splx(s); 2189 } 2190 2191 /* Close the root pipe. */ 2192 Static void 2193 ehci_root_intr_close(usbd_pipe_handle pipe) 2194 { 2195 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2196 2197 DPRINTF(("ehci_root_intr_close\n")); 2198 2199 sc->sc_intrxfer = NULL; 2200 } 2201 2202 void 2203 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2204 { 2205 xfer->hcpriv = NULL; 2206 } 2207 2208 /************************/ 2209 2210 ehci_soft_qh_t * 2211 ehci_alloc_sqh(ehci_softc_t *sc) 2212 { 2213 ehci_soft_qh_t *sqh; 2214 usbd_status err; 2215 int i, offs; 2216 usb_dma_t dma; 2217 2218 if (sc->sc_freeqhs == NULL) { 2219 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2220 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2221 EHCI_PAGE_SIZE, &dma); 2222 #ifdef EHCI_DEBUG 2223 if (err) 2224 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2225 #endif 2226 if (err) 2227 return (NULL); 2228 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2229 offs = i * EHCI_SQH_SIZE; 2230 sqh = KERNADDR(&dma, offs); 2231 sqh->physaddr = DMAADDR(&dma, offs); 2232 sqh->next = sc->sc_freeqhs; 2233 sc->sc_freeqhs = sqh; 2234 } 2235 } 2236 sqh = sc->sc_freeqhs; 2237 sc->sc_freeqhs = sqh->next; 2238 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2239 sqh->next = NULL; 2240 return (sqh); 2241 } 2242 2243 void 2244 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2245 { 2246 sqh->next = sc->sc_freeqhs; 2247 sc->sc_freeqhs = sqh; 2248 } 2249 2250 ehci_soft_qtd_t * 2251 ehci_alloc_sqtd(ehci_softc_t *sc) 2252 { 2253 ehci_soft_qtd_t *sqtd; 2254 usbd_status err; 2255 int i, offs; 2256 usb_dma_t dma; 2257 int s; 2258 2259 if (sc->sc_freeqtds == NULL) { 2260 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2261 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2262 EHCI_PAGE_SIZE, &dma); 2263 #ifdef EHCI_DEBUG 2264 if (err) 2265 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2266 #endif 2267 if (err) 2268 return (NULL); 2269 s = splusb(); 2270 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2271 offs = i * EHCI_SQTD_SIZE; 2272 sqtd = KERNADDR(&dma, offs); 2273 sqtd->physaddr = DMAADDR(&dma, offs); 2274 sqtd->nextqtd = sc->sc_freeqtds; 2275 sc->sc_freeqtds = sqtd; 2276 } 2277 splx(s); 2278 } 2279 2280 s = splusb(); 2281 sqtd = sc->sc_freeqtds; 2282 sc->sc_freeqtds = sqtd->nextqtd; 2283 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2284 sqtd->nextqtd = NULL; 2285 sqtd->xfer = NULL; 2286 splx(s); 2287 2288 return (sqtd); 2289 } 2290 2291 void 2292 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2293 { 2294 int s; 2295 2296 s = splusb(); 2297 sqtd->nextqtd = sc->sc_freeqtds; 2298 sc->sc_freeqtds = sqtd; 2299 splx(s); 2300 } 2301 2302 usbd_status 2303 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2304 int alen, int rd, usbd_xfer_handle xfer, 2305 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2306 { 2307 ehci_soft_qtd_t *next, *cur; 2308 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2309 u_int32_t qtdstatus; 2310 int len, curlen, mps; 2311 int i, tog; 2312 usb_dma_t *dma = &xfer->dmabuf; 2313 u_int16_t flags = xfer->flags; 2314 2315 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2316 2317 len = alen; 2318 dataphys = DMAADDR(dma, 0); 2319 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2320 qtdstatus = EHCI_QTD_ACTIVE | 2321 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2322 EHCI_QTD_SET_CERR(3) 2323 /* IOC set below */ 2324 /* BYTES set below */ 2325 ; 2326 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2327 tog = epipe->nexttoggle; 2328 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2329 2330 cur = ehci_alloc_sqtd(sc); 2331 *sp = cur; 2332 if (cur == NULL) 2333 goto nomem; 2334 for (;;) { 2335 dataphyspage = EHCI_PAGE(dataphys); 2336 /* The EHCI hardware can handle at most 5 pages. */ 2337 if (dataphyslastpage - dataphyspage < 2338 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2339 /* we can handle it in this QTD */ 2340 curlen = len; 2341 } else { 2342 /* must use multiple TDs, fill as much as possible. */ 2343 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2344 EHCI_PAGE_OFFSET(dataphys); 2345 #ifdef DIAGNOSTIC 2346 if (curlen > len) { 2347 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2348 "len=0x%x offs=0x%x\n", curlen, len, 2349 EHCI_PAGE_OFFSET(dataphys)); 2350 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2351 dataphyslastpage, dataphyspage, 2352 dataphys); 2353 curlen = len; 2354 } 2355 #endif 2356 /* the length must be a multiple of the max size */ 2357 curlen -= curlen % mps; 2358 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2359 "curlen=%d\n", curlen)); 2360 #ifdef DIAGNOSTIC 2361 if (curlen == 0) 2362 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2363 #endif 2364 } 2365 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2366 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2367 dataphys, dataphyslastpage, 2368 len, curlen)); 2369 len -= curlen; 2370 2371 /* 2372 * Allocate another transfer if there's more data left, 2373 * or if force last short transfer flag is set and we're 2374 * allocating a multiple of the max packet size. 2375 */ 2376 if (len != 0 || 2377 ((curlen % mps) == 0 && !rd && curlen != 0 && 2378 (flags & USBD_FORCE_SHORT_XFER))) { 2379 next = ehci_alloc_sqtd(sc); 2380 if (next == NULL) 2381 goto nomem; 2382 nextphys = htole32(next->physaddr); 2383 } else { 2384 next = NULL; 2385 nextphys = EHCI_NULL; 2386 } 2387 2388 for (i = 0; i * EHCI_PAGE_SIZE < 2389 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2390 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2391 if (i != 0) /* use offset only in first buffer */ 2392 a = EHCI_PAGE(a); 2393 cur->qtd.qtd_buffer[i] = htole32(a); 2394 cur->qtd.qtd_buffer_hi[i] = 0; 2395 #ifdef DIAGNOSTIC 2396 if (i >= EHCI_QTD_NBUFFERS) { 2397 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2398 goto nomem; 2399 } 2400 #endif 2401 } 2402 cur->nextqtd = next; 2403 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2404 cur->qtd.qtd_status = 2405 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2406 cur->xfer = xfer; 2407 cur->len = curlen; 2408 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2409 dataphys, dataphys + curlen)); 2410 /* adjust the toggle based on the number of packets in this 2411 qtd */ 2412 if (((curlen + mps - 1) / mps) & 1) { 2413 tog ^= 1; 2414 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2415 } 2416 if (next == NULL) 2417 break; 2418 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2419 dataphys += curlen; 2420 cur = next; 2421 } 2422 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2423 *ep = cur; 2424 epipe->nexttoggle = tog; 2425 2426 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2427 *sp, *ep)); 2428 2429 return (USBD_NORMAL_COMPLETION); 2430 2431 nomem: 2432 /* XXX free chain */ 2433 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2434 return (USBD_NOMEM); 2435 } 2436 2437 Static void 2438 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2439 ehci_soft_qtd_t *sqtdend) 2440 { 2441 ehci_soft_qtd_t *p; 2442 int i; 2443 2444 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2445 sqtd, sqtdend)); 2446 2447 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2448 p = sqtd->nextqtd; 2449 ehci_free_sqtd(sc, sqtd); 2450 } 2451 } 2452 2453 /****************/ 2454 2455 /* 2456 * Close a reqular pipe. 2457 * Assumes that there are no pending transactions. 2458 */ 2459 void 2460 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2461 { 2462 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2463 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2464 ehci_soft_qh_t *sqh = epipe->sqh; 2465 int s; 2466 2467 s = splusb(); 2468 ehci_rem_qh(sc, sqh, head); 2469 splx(s); 2470 ehci_free_sqh(sc, epipe->sqh); 2471 } 2472 2473 /* 2474 * Abort a device request. 2475 * If this routine is called at splusb() it guarantees that the request 2476 * will be removed from the hardware scheduling and that the callback 2477 * for it will be called with USBD_CANCELLED status. 2478 * It's impossible to guarantee that the requested transfer will not 2479 * have happened since the hardware runs concurrently. 2480 * If the transaction has already happened we rely on the ordinary 2481 * interrupt processing to process it. 2482 * XXX This is most probably wrong. 2483 */ 2484 void 2485 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2486 { 2487 #define exfer EXFER(xfer) 2488 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2489 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2490 ehci_soft_qh_t *sqh = epipe->sqh; 2491 ehci_soft_qtd_t *sqtd; 2492 ehci_physaddr_t cur; 2493 u_int32_t qhstatus; 2494 int s; 2495 int hit; 2496 int wake; 2497 2498 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2499 2500 if (sc->sc_dying) { 2501 /* If we're dying, just do the software part. */ 2502 s = splusb(); 2503 xfer->status = status; /* make software ignore it */ 2504 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2505 usb_transfer_complete(xfer); 2506 splx(s); 2507 return; 2508 } 2509 2510 if (xfer->device->bus->intr_context || !curproc) 2511 panic("ehci_abort_xfer: not in process context"); 2512 2513 /* 2514 * If an abort is already in progress then just wait for it to 2515 * complete and return. 2516 */ 2517 if (xfer->hcflags & UXFER_ABORTING) { 2518 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2519 #ifdef DIAGNOSTIC 2520 if (status == USBD_TIMEOUT) 2521 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2522 #endif 2523 /* Override the status which might be USBD_TIMEOUT. */ 2524 xfer->status = status; 2525 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2526 xfer->hcflags |= UXFER_ABORTWAIT; 2527 while (xfer->hcflags & UXFER_ABORTING) 2528 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2529 return; 2530 } 2531 xfer->hcflags |= UXFER_ABORTING; 2532 2533 /* 2534 * Step 1: Make interrupt routine and hardware ignore xfer. 2535 */ 2536 s = splusb(); 2537 xfer->status = status; /* make software ignore it */ 2538 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2539 qhstatus = sqh->qh.qh_qtd.qtd_status; 2540 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2541 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2542 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2543 if (sqtd == exfer->sqtdend) 2544 break; 2545 } 2546 splx(s); 2547 2548 /* 2549 * Step 2: Wait until we know hardware has finished any possible 2550 * use of the xfer. Also make sure the soft interrupt routine 2551 * has run. 2552 */ 2553 ehci_sync_hc(sc); 2554 s = splusb(); 2555 #ifdef USB_USE_SOFTINTR 2556 sc->sc_softwake = 1; 2557 #endif /* USB_USE_SOFTINTR */ 2558 usb_schedsoftintr(&sc->sc_bus); 2559 #ifdef USB_USE_SOFTINTR 2560 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2561 #endif /* USB_USE_SOFTINTR */ 2562 splx(s); 2563 2564 /* 2565 * Step 3: Remove any vestiges of the xfer from the hardware. 2566 * The complication here is that the hardware may have executed 2567 * beyond the xfer we're trying to abort. So as we're scanning 2568 * the TDs of this xfer we check if the hardware points to 2569 * any of them. 2570 */ 2571 s = splusb(); /* XXX why? */ 2572 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2573 hit = 0; 2574 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2575 hit |= cur == sqtd->physaddr; 2576 if (sqtd == exfer->sqtdend) 2577 break; 2578 } 2579 sqtd = sqtd->nextqtd; 2580 /* Zap curqtd register if hardware pointed inside the xfer. */ 2581 if (hit && sqtd != NULL) { 2582 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2583 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2584 sqh->qh.qh_qtd.qtd_status = qhstatus; 2585 } else { 2586 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2587 } 2588 2589 /* 2590 * Step 4: Execute callback. 2591 */ 2592 #ifdef DIAGNOSTIC 2593 exfer->isdone = 1; 2594 #endif 2595 wake = xfer->hcflags & UXFER_ABORTWAIT; 2596 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2597 usb_transfer_complete(xfer); 2598 if (wake) 2599 wakeup(&xfer->hcflags); 2600 2601 splx(s); 2602 #undef exfer 2603 } 2604 2605 void 2606 ehci_timeout(void *addr) 2607 { 2608 struct ehci_xfer *exfer = addr; 2609 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2610 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2611 2612 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2613 #ifdef USB_DEBUG 2614 if (ehcidebug > 1) 2615 usbd_dump_pipe(exfer->xfer.pipe); 2616 #endif 2617 2618 if (sc->sc_dying) { 2619 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2620 return; 2621 } 2622 2623 /* Execute the abort in a process context. */ 2624 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2625 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2626 USB_TASKQ_HC); 2627 } 2628 2629 void 2630 ehci_timeout_task(void *addr) 2631 { 2632 usbd_xfer_handle xfer = addr; 2633 int s; 2634 2635 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2636 2637 s = splusb(); 2638 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2639 splx(s); 2640 } 2641 2642 /************************/ 2643 2644 Static usbd_status 2645 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2646 { 2647 usbd_status err; 2648 2649 /* Insert last in queue. */ 2650 err = usb_insert_transfer(xfer); 2651 if (err) 2652 return (err); 2653 2654 /* Pipe isn't running, start first */ 2655 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2656 } 2657 2658 Static usbd_status 2659 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2660 { 2661 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2662 usbd_status err; 2663 2664 if (sc->sc_dying) 2665 return (USBD_IOERROR); 2666 2667 #ifdef DIAGNOSTIC 2668 if (!(xfer->rqflags & URQ_REQUEST)) { 2669 /* XXX panic */ 2670 printf("ehci_device_ctrl_transfer: not a request\n"); 2671 return (USBD_INVAL); 2672 } 2673 #endif 2674 2675 err = ehci_device_request(xfer); 2676 if (err) 2677 return (err); 2678 2679 if (sc->sc_bus.use_polling) 2680 ehci_waitintr(sc, xfer); 2681 return (USBD_IN_PROGRESS); 2682 } 2683 2684 void 2685 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2686 { 2687 struct ehci_xfer *ex = EXFER(xfer); 2688 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2689 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2690 2691 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2692 2693 #ifdef DIAGNOSTIC 2694 if (!(xfer->rqflags & URQ_REQUEST)) { 2695 panic("ehci_ctrl_done: not a request"); 2696 } 2697 #endif 2698 2699 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2700 ehci_del_intr_list(ex); /* remove from active list */ 2701 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2702 } 2703 2704 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2705 } 2706 2707 /* Abort a device control request. */ 2708 Static void 2709 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2710 { 2711 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2712 ehci_abort_xfer(xfer, USBD_CANCELLED); 2713 } 2714 2715 /* Close a device control pipe. */ 2716 Static void 2717 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2718 { 2719 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2720 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2721 2722 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2723 ehci_close_pipe(pipe, sc->sc_async_head); 2724 } 2725 2726 usbd_status 2727 ehci_device_request(usbd_xfer_handle xfer) 2728 { 2729 #define exfer EXFER(xfer) 2730 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2731 usb_device_request_t *req = &xfer->request; 2732 usbd_device_handle dev = epipe->pipe.device; 2733 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2734 int addr = dev->address; 2735 ehci_soft_qtd_t *setup, *stat, *next; 2736 ehci_soft_qh_t *sqh; 2737 int isread; 2738 int len; 2739 usbd_status err; 2740 int s; 2741 2742 isread = req->bmRequestType & UT_READ; 2743 len = UGETW(req->wLength); 2744 2745 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2746 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2747 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2748 UGETW(req->wIndex), len, addr, 2749 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2750 2751 setup = ehci_alloc_sqtd(sc); 2752 if (setup == NULL) { 2753 err = USBD_NOMEM; 2754 goto bad1; 2755 } 2756 stat = ehci_alloc_sqtd(sc); 2757 if (stat == NULL) { 2758 err = USBD_NOMEM; 2759 goto bad2; 2760 } 2761 2762 sqh = epipe->sqh; 2763 epipe->u.ctl.length = len; 2764 2765 /* Update device address and length since they may have changed 2766 during the setup of the control pipe in usbd_new_device(). */ 2767 /* XXX This only needs to be done once, but it's too early in open. */ 2768 /* XXXX Should not touch ED here! */ 2769 sqh->qh.qh_endp = 2770 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2771 htole32( 2772 EHCI_QH_SET_ADDR(addr) | 2773 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2774 ); 2775 2776 /* Set up data transaction */ 2777 if (len != 0) { 2778 ehci_soft_qtd_t *end; 2779 2780 /* Start toggle at 1. */ 2781 epipe->nexttoggle = 1; 2782 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2783 &next, &end); 2784 if (err) 2785 goto bad3; 2786 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2787 end->nextqtd = stat; 2788 end->qtd.qtd_next = 2789 end->qtd.qtd_altnext = htole32(stat->physaddr); 2790 } else { 2791 next = stat; 2792 } 2793 2794 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2795 2796 /* Clear toggle */ 2797 setup->qtd.qtd_status = htole32( 2798 EHCI_QTD_ACTIVE | 2799 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2800 EHCI_QTD_SET_CERR(3) | 2801 EHCI_QTD_SET_TOGGLE(0) | 2802 EHCI_QTD_SET_BYTES(sizeof *req) 2803 ); 2804 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2805 setup->qtd.qtd_buffer_hi[0] = 0; 2806 setup->nextqtd = next; 2807 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2808 setup->xfer = xfer; 2809 setup->len = sizeof *req; 2810 2811 stat->qtd.qtd_status = htole32( 2812 EHCI_QTD_ACTIVE | 2813 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2814 EHCI_QTD_SET_CERR(3) | 2815 EHCI_QTD_SET_TOGGLE(1) | 2816 EHCI_QTD_IOC 2817 ); 2818 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2819 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2820 stat->nextqtd = NULL; 2821 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2822 stat->xfer = xfer; 2823 stat->len = 0; 2824 2825 #ifdef EHCI_DEBUG 2826 if (ehcidebug > 5) { 2827 DPRINTF(("ehci_device_request:\n")); 2828 ehci_dump_sqh(sqh); 2829 ehci_dump_sqtds(setup); 2830 } 2831 #endif 2832 2833 exfer->sqtdstart = setup; 2834 exfer->sqtdend = stat; 2835 #ifdef DIAGNOSTIC 2836 if (!exfer->isdone) { 2837 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2838 } 2839 exfer->isdone = 0; 2840 #endif 2841 2842 /* Insert qTD in QH list. */ 2843 s = splusb(); 2844 ehci_set_qh_qtd(sqh, setup); 2845 if (xfer->timeout && !sc->sc_bus.use_polling) { 2846 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2847 ehci_timeout, xfer); 2848 } 2849 ehci_add_intr_list(sc, exfer); 2850 xfer->status = USBD_IN_PROGRESS; 2851 splx(s); 2852 2853 #ifdef EHCI_DEBUG 2854 if (ehcidebug > 10) { 2855 DPRINTF(("ehci_device_request: status=%x\n", 2856 EOREAD4(sc, EHCI_USBSTS))); 2857 delay(10000); 2858 ehci_dump_regs(sc); 2859 ehci_dump_sqh(sc->sc_async_head); 2860 ehci_dump_sqh(sqh); 2861 ehci_dump_sqtds(setup); 2862 } 2863 #endif 2864 2865 return (USBD_NORMAL_COMPLETION); 2866 2867 bad3: 2868 ehci_free_sqtd(sc, stat); 2869 bad2: 2870 ehci_free_sqtd(sc, setup); 2871 bad1: 2872 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2873 xfer->status = err; 2874 usb_transfer_complete(xfer); 2875 return (err); 2876 #undef exfer 2877 } 2878 2879 /* 2880 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2881 * qTD status, or miss signalling occasionally under heavy load. If the host 2882 * machine is too fast, we we can miss transaction completion - when we scan 2883 * the active list the transaction still seems to be active. This generally 2884 * exhibits itself as a umass stall that never recovers. 2885 * 2886 * We work around this behaviour by setting up this callback after any softintr 2887 * that completes with transactions still pending, giving us another chance to 2888 * check for completion after the writeback has taken place. 2889 */ 2890 void 2891 ehci_intrlist_timeout(void *arg) 2892 { 2893 ehci_softc_t *sc = arg; 2894 int s = splusb(); 2895 2896 DPRINTF(("ehci_intrlist_timeout\n")); 2897 usb_schedsoftintr(&sc->sc_bus); 2898 2899 splx(s); 2900 } 2901 2902 /************************/ 2903 2904 Static usbd_status 2905 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2906 { 2907 usbd_status err; 2908 2909 /* Insert last in queue. */ 2910 err = usb_insert_transfer(xfer); 2911 if (err) 2912 return (err); 2913 2914 /* Pipe isn't running, start first */ 2915 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2916 } 2917 2918 usbd_status 2919 ehci_device_bulk_start(usbd_xfer_handle xfer) 2920 { 2921 #define exfer EXFER(xfer) 2922 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2923 usbd_device_handle dev = epipe->pipe.device; 2924 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2925 ehci_soft_qtd_t *data, *dataend; 2926 ehci_soft_qh_t *sqh; 2927 usbd_status err; 2928 int len, isread, endpt; 2929 int s; 2930 2931 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2932 xfer, xfer->length, xfer->flags)); 2933 2934 if (sc->sc_dying) 2935 return (USBD_IOERROR); 2936 2937 #ifdef DIAGNOSTIC 2938 if (xfer->rqflags & URQ_REQUEST) 2939 panic("ehci_device_bulk_start: a request"); 2940 #endif 2941 2942 len = xfer->length; 2943 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2944 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2945 sqh = epipe->sqh; 2946 2947 epipe->u.bulk.length = len; 2948 2949 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2950 &dataend); 2951 if (err) { 2952 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2953 xfer->status = err; 2954 usb_transfer_complete(xfer); 2955 return (err); 2956 } 2957 2958 #ifdef EHCI_DEBUG 2959 if (ehcidebug > 5) { 2960 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2961 ehci_dump_sqh(sqh); 2962 ehci_dump_sqtds(data); 2963 } 2964 #endif 2965 2966 /* Set up interrupt info. */ 2967 exfer->sqtdstart = data; 2968 exfer->sqtdend = dataend; 2969 #ifdef DIAGNOSTIC 2970 if (!exfer->isdone) { 2971 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2972 } 2973 exfer->isdone = 0; 2974 #endif 2975 2976 s = splusb(); 2977 ehci_set_qh_qtd(sqh, data); 2978 if (xfer->timeout && !sc->sc_bus.use_polling) { 2979 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2980 ehci_timeout, xfer); 2981 } 2982 ehci_add_intr_list(sc, exfer); 2983 xfer->status = USBD_IN_PROGRESS; 2984 splx(s); 2985 2986 #ifdef EHCI_DEBUG 2987 if (ehcidebug > 10) { 2988 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2989 delay(10000); 2990 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2991 ehci_dump_regs(sc); 2992 #if 0 2993 printf("async_head:\n"); 2994 ehci_dump_sqh(sc->sc_async_head); 2995 #endif 2996 printf("sqh:\n"); 2997 ehci_dump_sqh(sqh); 2998 ehci_dump_sqtds(data); 2999 } 3000 #endif 3001 3002 if (sc->sc_bus.use_polling) 3003 ehci_waitintr(sc, xfer); 3004 3005 return (USBD_IN_PROGRESS); 3006 #undef exfer 3007 } 3008 3009 Static void 3010 ehci_device_bulk_abort(usbd_xfer_handle xfer) 3011 { 3012 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 3013 ehci_abort_xfer(xfer, USBD_CANCELLED); 3014 } 3015 3016 /* 3017 * Close a device bulk pipe. 3018 */ 3019 Static void 3020 ehci_device_bulk_close(usbd_pipe_handle pipe) 3021 { 3022 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3023 3024 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3025 ehci_close_pipe(pipe, sc->sc_async_head); 3026 } 3027 3028 void 3029 ehci_device_bulk_done(usbd_xfer_handle xfer) 3030 { 3031 struct ehci_xfer *ex = EXFER(xfer); 3032 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3033 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3034 3035 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3036 xfer, xfer->actlen)); 3037 3038 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3039 ehci_del_intr_list(ex); /* remove from active list */ 3040 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3041 } 3042 3043 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3044 } 3045 3046 /************************/ 3047 3048 Static usbd_status 3049 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3050 { 3051 struct ehci_soft_islot *isp; 3052 int islot, lev; 3053 3054 /* Find a poll rate that is large enough. */ 3055 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3056 if (EHCI_ILEV_IVAL(lev) <= ival) 3057 break; 3058 3059 /* Pick an interrupt slot at the right level. */ 3060 /* XXX could do better than picking at random */ 3061 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3062 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3063 3064 sqh->islot = islot; 3065 isp = &sc->sc_islots[islot]; 3066 ehci_add_qh(sqh, isp->sqh); 3067 3068 return (USBD_NORMAL_COMPLETION); 3069 } 3070 3071 Static usbd_status 3072 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3073 { 3074 usbd_status err; 3075 3076 /* Insert last in queue. */ 3077 err = usb_insert_transfer(xfer); 3078 if (err) 3079 return (err); 3080 3081 /* 3082 * Pipe isn't running (otherwise err would be USBD_INPROG), 3083 * so start it first. 3084 */ 3085 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3086 } 3087 3088 Static usbd_status 3089 ehci_device_intr_start(usbd_xfer_handle xfer) 3090 { 3091 #define exfer EXFER(xfer) 3092 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3093 usbd_device_handle dev = xfer->pipe->device; 3094 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3095 ehci_soft_qtd_t *data, *dataend; 3096 ehci_soft_qh_t *sqh; 3097 usbd_status err; 3098 int len, isread, endpt; 3099 int s; 3100 3101 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3102 xfer, xfer->length, xfer->flags)); 3103 3104 if (sc->sc_dying) 3105 return (USBD_IOERROR); 3106 3107 #ifdef DIAGNOSTIC 3108 if (xfer->rqflags & URQ_REQUEST) 3109 panic("ehci_device_intr_start: a request"); 3110 #endif 3111 3112 len = xfer->length; 3113 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3114 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3115 sqh = epipe->sqh; 3116 3117 epipe->u.intr.length = len; 3118 3119 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3120 &dataend); 3121 if (err) { 3122 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3123 xfer->status = err; 3124 usb_transfer_complete(xfer); 3125 return (err); 3126 } 3127 3128 #ifdef EHCI_DEBUG 3129 if (ehcidebug > 5) { 3130 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3131 ehci_dump_sqh(sqh); 3132 ehci_dump_sqtds(data); 3133 } 3134 #endif 3135 3136 /* Set up interrupt info. */ 3137 exfer->sqtdstart = data; 3138 exfer->sqtdend = dataend; 3139 #ifdef DIAGNOSTIC 3140 if (!exfer->isdone) { 3141 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3142 } 3143 exfer->isdone = 0; 3144 #endif 3145 3146 s = splusb(); 3147 ehci_set_qh_qtd(sqh, data); 3148 if (xfer->timeout && !sc->sc_bus.use_polling) { 3149 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3150 ehci_timeout, xfer); 3151 } 3152 ehci_add_intr_list(sc, exfer); 3153 xfer->status = USBD_IN_PROGRESS; 3154 splx(s); 3155 3156 #ifdef EHCI_DEBUG 3157 if (ehcidebug > 10) { 3158 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3159 delay(10000); 3160 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3161 ehci_dump_regs(sc); 3162 printf("sqh:\n"); 3163 ehci_dump_sqh(sqh); 3164 ehci_dump_sqtds(data); 3165 } 3166 #endif 3167 3168 if (sc->sc_bus.use_polling) 3169 ehci_waitintr(sc, xfer); 3170 3171 return (USBD_IN_PROGRESS); 3172 #undef exfer 3173 } 3174 3175 Static void 3176 ehci_device_intr_abort(usbd_xfer_handle xfer) 3177 { 3178 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3179 if (xfer->pipe->intrxfer == xfer) { 3180 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3181 xfer->pipe->intrxfer = NULL; 3182 } 3183 ehci_abort_xfer(xfer, USBD_CANCELLED); 3184 } 3185 3186 Static void 3187 ehci_device_intr_close(usbd_pipe_handle pipe) 3188 { 3189 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3190 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3191 struct ehci_soft_islot *isp; 3192 3193 isp = &sc->sc_islots[epipe->sqh->islot]; 3194 ehci_close_pipe(pipe, isp->sqh); 3195 } 3196 3197 Static void 3198 ehci_device_intr_done(usbd_xfer_handle xfer) 3199 { 3200 #define exfer EXFER(xfer) 3201 struct ehci_xfer *ex = EXFER(xfer); 3202 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3203 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3204 ehci_soft_qtd_t *data, *dataend; 3205 ehci_soft_qh_t *sqh; 3206 usbd_status err; 3207 int len, isread, endpt, s; 3208 3209 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3210 xfer, xfer->actlen)); 3211 3212 if (xfer->pipe->repeat) { 3213 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3214 3215 len = epipe->u.intr.length; 3216 xfer->length = len; 3217 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3218 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3219 sqh = epipe->sqh; 3220 3221 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3222 &data, &dataend); 3223 if (err) { 3224 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3225 xfer->status = err; 3226 return; 3227 } 3228 3229 /* Set up interrupt info. */ 3230 exfer->sqtdstart = data; 3231 exfer->sqtdend = dataend; 3232 #ifdef DIAGNOSTIC 3233 if (!exfer->isdone) { 3234 printf("ehci_device_intr_done: not done, ex=%p\n", 3235 exfer); 3236 } 3237 exfer->isdone = 0; 3238 #endif 3239 3240 s = splusb(); 3241 ehci_set_qh_qtd(sqh, data); 3242 if (xfer->timeout && !sc->sc_bus.use_polling) { 3243 usb_callout(xfer->timeout_handle, 3244 mstohz(xfer->timeout), ehci_timeout, xfer); 3245 } 3246 splx(s); 3247 3248 xfer->status = USBD_IN_PROGRESS; 3249 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3250 ehci_del_intr_list(ex); /* remove from active list */ 3251 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3252 } 3253 #undef exfer 3254 } 3255 3256 /************************/ 3257 3258 Static usbd_status 3259 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3260 { 3261 return USBD_IOERROR; 3262 } 3263 Static usbd_status 3264 ehci_device_isoc_start(usbd_xfer_handle xfer) 3265 { 3266 return USBD_IOERROR; 3267 } 3268 Static void 3269 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3270 { 3271 } 3272 Static void 3273 ehci_device_isoc_close(usbd_pipe_handle pipe) 3274 { 3275 } 3276 Static void 3277 ehci_device_isoc_done(usbd_xfer_handle xfer) 3278 { 3279 } 3280
Indexes created Thu Oct 02 01:09:59 GMT 2025