ehci.c revision 1.123.18.5
1 /* $NetBSD: ehci.c,v 1.123.18.5 2007/10/26 15:47:47 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.18.5 2007/10/26 15:47:47 joerg Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <sys/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 189 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 190 Static void ehci_disown(ehci_softc_t *, int, int); 191 192 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 193 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 194 195 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 196 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 197 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 198 ehci_softc_t *, int, int, usbd_xfer_handle, 199 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 200 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 201 ehci_soft_qtd_t *); 202 203 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 204 205 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 206 int ival); 207 208 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 209 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 210 ehci_soft_qh_t *); 211 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 212 Static void ehci_sync_hc(ehci_softc_t *); 213 214 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 215 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 #ifdef EHCI_DEBUG 218 Static void ehci_dump_regs(ehci_softc_t *); 219 void ehci_dump(void); 220 Static ehci_softc_t *theehci; 221 Static void ehci_dump_link(ehci_link_t, int); 222 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 223 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 224 Static void ehci_dump_qtd(ehci_qtd_t *); 225 Static void ehci_dump_sqh(ehci_soft_qh_t *); 226 #ifdef DIAGNOSTIC 227 Static void ehci_dump_exfer(struct ehci_xfer *); 228 #endif 229 #endif 230 231 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 232 233 #define EHCI_INTR_ENDPT 1 234 235 #define ehci_add_intr_list(sc, ex) \ 236 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 237 #define ehci_del_intr_list(ex) \ 238 do { \ 239 LIST_REMOVE((ex), inext); \ 240 (ex)->inext.le_prev = NULL; \ 241 } while (0) 242 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 243 244 Static const struct usbd_bus_methods ehci_bus_methods = { 245 ehci_open, 246 ehci_softintr, 247 ehci_poll, 248 ehci_allocm, 249 ehci_freem, 250 ehci_allocx, 251 ehci_freex, 252 }; 253 254 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 255 ehci_root_ctrl_transfer, 256 ehci_root_ctrl_start, 257 ehci_root_ctrl_abort, 258 ehci_root_ctrl_close, 259 ehci_noop, 260 ehci_root_ctrl_done, 261 }; 262 263 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 264 ehci_root_intr_transfer, 265 ehci_root_intr_start, 266 ehci_root_intr_abort, 267 ehci_root_intr_close, 268 ehci_noop, 269 ehci_root_intr_done, 270 }; 271 272 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 273 ehci_device_ctrl_transfer, 274 ehci_device_ctrl_start, 275 ehci_device_ctrl_abort, 276 ehci_device_ctrl_close, 277 ehci_noop, 278 ehci_device_ctrl_done, 279 }; 280 281 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 282 ehci_device_intr_transfer, 283 ehci_device_intr_start, 284 ehci_device_intr_abort, 285 ehci_device_intr_close, 286 ehci_device_clear_toggle, 287 ehci_device_intr_done, 288 }; 289 290 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 291 ehci_device_bulk_transfer, 292 ehci_device_bulk_start, 293 ehci_device_bulk_abort, 294 ehci_device_bulk_close, 295 ehci_device_clear_toggle, 296 ehci_device_bulk_done, 297 }; 298 299 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 300 ehci_device_isoc_transfer, 301 ehci_device_isoc_start, 302 ehci_device_isoc_abort, 303 ehci_device_isoc_close, 304 ehci_noop, 305 ehci_device_isoc_done, 306 }; 307 308 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 309 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 310 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 311 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 312 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 313 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 314 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 315 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 316 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 317 }; 318 319 usbd_status 320 ehci_init(ehci_softc_t *sc) 321 { 322 u_int32_t vers, sparams, cparams, hcr; 323 u_int i; 324 usbd_status err; 325 ehci_soft_qh_t *sqh; 326 u_int ncomp; 327 328 DPRINTF(("ehci_init: start\n")); 329 #ifdef EHCI_DEBUG 330 theehci = sc; 331 #endif 332 333 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 334 335 vers = EREAD2(sc, EHCI_HCIVERSION); 336 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 337 vers >> 8, vers & 0xff); 338 339 sparams = EREAD4(sc, EHCI_HCSPARAMS); 340 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 341 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 342 ncomp = EHCI_HCS_N_CC(sparams); 343 if (ncomp != sc->sc_ncomp) { 344 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 345 USBDEVNAME(sc->sc_bus.bdev), 346 ncomp, sc->sc_ncomp); 347 #if NOHCI == 0 || NUHCI == 0 348 aprint_error("%s: ohci or uhci probably not configured\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 #endif 351 if (ncomp < sc->sc_ncomp) 352 sc->sc_ncomp = ncomp; 353 } 354 if (sc->sc_ncomp > 0) { 355 aprint_normal("%s: companion controller%s, %d port%s each:", 356 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 357 EHCI_HCS_N_PCC(sparams), 358 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 359 for (i = 0; i < sc->sc_ncomp; i++) 360 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 361 aprint_normal("\n"); 362 } 363 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 364 cparams = EREAD4(sc, EHCI_HCCPARAMS); 365 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 366 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 367 368 if (EHCI_HCC_64BIT(cparams)) { 369 /* MUST clear segment register if 64 bit capable. */ 370 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 371 } 372 373 sc->sc_bus.usbrev = USBREV_2_0; 374 375 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 376 USB_MEM_RESERVE); 377 378 /* Reset the controller */ 379 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 380 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 381 usb_delay_ms(&sc->sc_bus, 1); 382 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 383 for (i = 0; i < 100; i++) { 384 usb_delay_ms(&sc->sc_bus, 1); 385 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 386 if (!hcr) 387 break; 388 } 389 if (hcr) { 390 aprint_error("%s: reset timeout\n", 391 USBDEVNAME(sc->sc_bus.bdev)); 392 return (USBD_IOERROR); 393 } 394 395 /* XXX need proper intr scheduling */ 396 sc->sc_rand = 96; 397 398 /* frame list size at default, read back what we got and use that */ 399 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 400 case 0: sc->sc_flsize = 1024; break; 401 case 1: sc->sc_flsize = 512; break; 402 case 2: sc->sc_flsize = 256; break; 403 case 3: return (USBD_IOERROR); 404 } 405 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 406 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 407 if (err) 408 return (err); 409 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 410 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 411 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 412 413 /* Set up the bus struct. */ 414 sc->sc_bus.methods = &ehci_bus_methods; 415 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 416 417 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 418 419 sc->sc_eintrs = EHCI_NORMAL_INTRS; 420 421 /* 422 * Allocate the interrupt dummy QHs. These are arranged to give poll 423 * intervals that are powers of 2 times 1ms. 424 */ 425 for (i = 0; i < EHCI_INTRQHS; i++) { 426 sqh = ehci_alloc_sqh(sc); 427 if (sqh == NULL) { 428 err = USBD_NOMEM; 429 goto bad1; 430 } 431 sc->sc_islots[i].sqh = sqh; 432 } 433 for (i = 0; i < EHCI_INTRQHS; i++) { 434 sqh = sc->sc_islots[i].sqh; 435 if (i == 0) { 436 /* The last (1ms) QH terminates. */ 437 sqh->qh.qh_link = EHCI_NULL; 438 sqh->next = NULL; 439 } else { 440 /* Otherwise the next QH has half the poll interval */ 441 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 442 sqh->qh.qh_link = htole32(sqh->next->physaddr | 443 EHCI_LINK_QH); 444 } 445 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 446 sqh->qh.qh_curqtd = EHCI_NULL; 447 sqh->next = NULL; 448 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 449 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 451 sqh->sqtd = NULL; 452 } 453 /* Point the frame list at the last level (128ms). */ 454 for (i = 0; i < sc->sc_flsize; i++) { 455 int j; 456 457 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 458 revbits[i & (EHCI_MAX_POLLRATE-1)]; 459 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 460 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 461 i)].sqh->physaddr); 462 } 463 464 /* Allocate dummy QH that starts the async list. */ 465 sqh = ehci_alloc_sqh(sc); 466 if (sqh == NULL) { 467 err = USBD_NOMEM; 468 goto bad1; 469 } 470 /* Fill the QH */ 471 sqh->qh.qh_endp = 472 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 473 sqh->qh.qh_link = 474 htole32(sqh->physaddr | EHCI_LINK_QH); 475 sqh->qh.qh_curqtd = EHCI_NULL; 476 sqh->next = NULL; 477 /* Fill the overlay qTD */ 478 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 479 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 481 sqh->sqtd = NULL; 482 #ifdef EHCI_DEBUG 483 if (ehcidebug) { 484 ehci_dump_sqh(sqh); 485 } 486 #endif 487 488 /* Point to async list */ 489 sc->sc_async_head = sqh; 490 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 491 492 usb_callout_init(sc->sc_tmo_intrlist); 493 494 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 495 496 /* Turn on controller */ 497 EOWRITE4(sc, EHCI_USBCMD, 498 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 499 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 500 EHCI_CMD_ASE | 501 EHCI_CMD_PSE | 502 EHCI_CMD_RS); 503 504 /* Take over port ownership */ 505 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 506 507 for (i = 0; i < 100; i++) { 508 usb_delay_ms(&sc->sc_bus, 1); 509 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 510 if (!hcr) 511 break; 512 } 513 if (hcr) { 514 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 515 return (USBD_IOERROR); 516 } 517 518 /* Enable interrupts */ 519 DPRINTFN(1,("ehci_init: enabling\n")); 520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 521 522 return (USBD_NORMAL_COMPLETION); 523 524 #if 0 525 bad2: 526 ehci_free_sqh(sc, sc->sc_async_head); 527 #endif 528 bad1: 529 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 530 return (err); 531 } 532 533 int 534 ehci_intr(void *v) 535 { 536 ehci_softc_t *sc = v; 537 538 if (sc == NULL || sc->sc_dying) 539 return (0); 540 541 /* If we get an interrupt while polling, then just ignore it. */ 542 if (sc->sc_bus.use_polling) { 543 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 544 545 if (intrs) 546 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 547 #ifdef DIAGNOSTIC 548 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 549 #endif 550 return (0); 551 } 552 553 return (ehci_intr1(sc)); 554 } 555 556 Static int 557 ehci_intr1(ehci_softc_t *sc) 558 { 559 u_int32_t intrs, eintrs; 560 561 DPRINTFN(20,("ehci_intr1: enter\n")); 562 563 /* In case the interrupt occurs before initialization has completed. */ 564 if (sc == NULL) { 565 #ifdef DIAGNOSTIC 566 printf("ehci_intr1: sc == NULL\n"); 567 #endif 568 return (0); 569 } 570 571 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 572 if (!intrs) 573 return (0); 574 575 eintrs = intrs & sc->sc_eintrs; 576 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 577 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 578 (u_int)eintrs)); 579 if (!eintrs) 580 return (0); 581 582 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 583 sc->sc_bus.intr_context++; 584 sc->sc_bus.no_intrs++; 585 if (eintrs & EHCI_STS_IAA) { 586 DPRINTF(("ehci_intr1: door bell\n")); 587 wakeup(&sc->sc_async_head); 588 eintrs &= ~EHCI_STS_IAA; 589 } 590 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 591 DPRINTFN(5,("ehci_intr1: %s %s\n", 592 eintrs & EHCI_STS_INT ? "INT" : "", 593 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 594 usb_schedsoftintr(&sc->sc_bus); 595 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 596 } 597 if (eintrs & EHCI_STS_HSE) { 598 printf("%s: unrecoverable error, controller halted\n", 599 USBDEVNAME(sc->sc_bus.bdev)); 600 /* XXX what else */ 601 } 602 if (eintrs & EHCI_STS_PCD) { 603 ehci_pcd(sc, sc->sc_intrxfer); 604 eintrs &= ~EHCI_STS_PCD; 605 } 606 607 sc->sc_bus.intr_context--; 608 609 if (eintrs != 0) { 610 /* Block unprocessed interrupts. */ 611 sc->sc_eintrs &= ~eintrs; 612 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 613 printf("%s: blocking intrs 0x%x\n", 614 USBDEVNAME(sc->sc_bus.bdev), eintrs); 615 } 616 617 return (1); 618 } 619 620 621 void 622 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 623 { 624 usbd_pipe_handle pipe; 625 u_char *p; 626 int i, m; 627 628 if (xfer == NULL) { 629 /* Just ignore the change. */ 630 return; 631 } 632 633 pipe = xfer->pipe; 634 635 p = KERNADDR(&xfer->dmabuf, 0); 636 m = min(sc->sc_noport, xfer->length * 8 - 1); 637 memset(p, 0, xfer->length); 638 for (i = 1; i <= m; i++) { 639 /* Pick out CHANGE bits from the status reg. */ 640 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 641 p[i/8] |= 1 << (i%8); 642 } 643 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 644 xfer->actlen = xfer->length; 645 xfer->status = USBD_NORMAL_COMPLETION; 646 647 usb_transfer_complete(xfer); 648 } 649 650 void 651 ehci_softintr(void *v) 652 { 653 ehci_softc_t *sc = v; 654 struct ehci_xfer *ex, *nextex; 655 656 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 657 sc->sc_bus.intr_context)); 658 659 sc->sc_bus.intr_context++; 660 661 /* 662 * The only explanation I can think of for why EHCI is as brain dead 663 * as UHCI interrupt-wise is that Intel was involved in both. 664 * An interrupt just tells us that something is done, we have no 665 * clue what, so we need to scan through all active transfers. :-( 666 */ 667 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 668 nextex = LIST_NEXT(ex, inext); 669 ehci_check_intr(sc, ex); 670 } 671 672 /* Schedule a callout to catch any dropped transactions. */ 673 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 674 !LIST_EMPTY(&sc->sc_intrhead)) 675 usb_callout(sc->sc_tmo_intrlist, hz, 676 ehci_intrlist_timeout, sc); 677 678 #ifdef USB_USE_SOFTINTR 679 if (sc->sc_softwake) { 680 sc->sc_softwake = 0; 681 wakeup(&sc->sc_softwake); 682 } 683 #endif /* USB_USE_SOFTINTR */ 684 685 sc->sc_bus.intr_context--; 686 } 687 688 /* Check for an interrupt. */ 689 void 690 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 691 { 692 ehci_soft_qtd_t *sqtd, *lsqtd; 693 u_int32_t status; 694 695 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 696 697 if (ex->sqtdstart == NULL) { 698 printf("ehci_check_intr: sqtdstart=NULL\n"); 699 return; 700 } 701 lsqtd = ex->sqtdend; 702 #ifdef DIAGNOSTIC 703 if (lsqtd == NULL) { 704 printf("ehci_check_intr: lsqtd==0\n"); 705 return; 706 } 707 #endif 708 /* 709 * If the last TD is still active we need to check whether there 710 * is a an error somewhere in the middle, or whether there was a 711 * short packet (SPD and not ACTIVE). 712 */ 713 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 714 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 715 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 716 status = le32toh(sqtd->qtd.qtd_status); 717 /* If there's an active QTD the xfer isn't done. */ 718 if (status & EHCI_QTD_ACTIVE) 719 break; 720 /* Any kind of error makes the xfer done. */ 721 if (status & EHCI_QTD_HALTED) 722 goto done; 723 /* We want short packets, and it is short: it's done */ 724 if (EHCI_QTD_GET_BYTES(status) != 0) 725 goto done; 726 } 727 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 728 ex, ex->sqtdstart)); 729 return; 730 } 731 done: 732 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 733 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 734 ehci_idone(ex); 735 } 736 737 void 738 ehci_idone(struct ehci_xfer *ex) 739 { 740 usbd_xfer_handle xfer = &ex->xfer; 741 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 742 ehci_soft_qtd_t *sqtd, *lsqtd; 743 u_int32_t status = 0, nstatus = 0; 744 int actlen; 745 746 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 747 #ifdef DIAGNOSTIC 748 { 749 int s = splhigh(); 750 if (ex->isdone) { 751 splx(s); 752 #ifdef EHCI_DEBUG 753 printf("ehci_idone: ex is done!\n "); 754 ehci_dump_exfer(ex); 755 #else 756 printf("ehci_idone: ex=%p is done!\n", ex); 757 #endif 758 return; 759 } 760 ex->isdone = 1; 761 splx(s); 762 } 763 #endif 764 765 if (xfer->status == USBD_CANCELLED || 766 xfer->status == USBD_TIMEOUT) { 767 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 768 return; 769 } 770 771 #ifdef EHCI_DEBUG 772 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 773 if (ehcidebug > 10) 774 ehci_dump_sqtds(ex->sqtdstart); 775 #endif 776 777 /* The transfer is done, compute actual length and status. */ 778 lsqtd = ex->sqtdend; 779 actlen = 0; 780 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 781 nstatus = le32toh(sqtd->qtd.qtd_status); 782 if (nstatus & EHCI_QTD_ACTIVE) 783 break; 784 785 status = nstatus; 786 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 787 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 788 } 789 790 /* 791 * If there are left over TDs we need to update the toggle. 792 * The default pipe doesn't need it since control transfers 793 * start the toggle at 0 every time. 794 * For a short transfer we need to update the toggle for the missing 795 * packets within the qTD. 796 */ 797 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 798 xfer->pipe->device->default_pipe != xfer->pipe) { 799 DPRINTFN(2, ("ehci_idone: need toggle update " 800 "status=%08x nstatus=%08x\n", status, nstatus)); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 809 xfer->length, actlen, status)); 810 xfer->actlen = actlen; 811 if (status & EHCI_QTD_HALTED) { 812 #ifdef EHCI_DEBUG 813 char sbuf[128]; 814 815 bitmask_snprintf((u_int32_t)status, 816 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 817 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 818 819 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 820 "status 0x%s\n", 821 xfer->pipe->device->address, 822 xfer->pipe->endpoint->edesc->bEndpointAddress, 823 sbuf)); 824 if (ehcidebug > 2) { 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 } 828 #endif 829 /* low&full speed has an extra error flag */ 830 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 831 EHCI_QH_SPEED_HIGH) 832 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 833 else 834 status &= EHCI_QTD_STATERRS; 835 if (status == 0) /* no other errors means a stall */ 836 xfer->status = USBD_STALLED; 837 else 838 xfer->status = USBD_IOERROR; /* more info XXX */ 839 /* XXX need to reset TT on missed microframe */ 840 if (status & EHCI_QTD_MISSEDMICRO) { 841 ehci_softc_t *sc = (ehci_softc_t *) 842 xfer->pipe->device->bus; 843 844 printf("%s: missed microframe, TT reset not " 845 "implemented, hub might be inoperational\n", 846 USBDEVNAME(sc->sc_bus.bdev)); 847 } 848 } else { 849 xfer->status = USBD_NORMAL_COMPLETION; 850 } 851 852 usb_transfer_complete(xfer); 853 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 854 } 855 856 /* 857 * Wait here until controller claims to have an interrupt. 858 * Then call ehci_intr and return. Use timeout to avoid waiting 859 * too long. 860 */ 861 void 862 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 863 { 864 int timo; 865 u_int32_t intrs; 866 867 xfer->status = USBD_IN_PROGRESS; 868 for (timo = xfer->timeout; timo >= 0; timo--) { 869 usb_delay_ms(&sc->sc_bus, 1); 870 if (sc->sc_dying) 871 break; 872 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 873 sc->sc_eintrs; 874 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 875 #ifdef EHCI_DEBUG 876 if (ehcidebug > 15) 877 ehci_dump_regs(sc); 878 #endif 879 if (intrs) { 880 ehci_intr1(sc); 881 if (xfer->status != USBD_IN_PROGRESS) 882 return; 883 } 884 } 885 886 /* Timeout */ 887 DPRINTF(("ehci_waitintr: timeout\n")); 888 xfer->status = USBD_TIMEOUT; 889 usb_transfer_complete(xfer); 890 /* XXX should free TD */ 891 } 892 893 void 894 ehci_poll(struct usbd_bus *bus) 895 { 896 ehci_softc_t *sc = (ehci_softc_t *)bus; 897 #ifdef EHCI_DEBUG 898 static int last; 899 int new; 900 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 901 if (new != last) { 902 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 903 last = new; 904 } 905 #endif 906 907 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 908 ehci_intr1(sc); 909 } 910 911 int 912 ehci_detach(struct ehci_softc *sc, int flags) 913 { 914 int rv = 0; 915 916 if (sc->sc_child != NULL) 917 rv = config_detach(sc->sc_child, flags); 918 919 if (rv != 0) 920 return (rv); 921 922 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 923 924 if (sc->sc_shutdownhook != NULL) 925 shutdownhook_disestablish(sc->sc_shutdownhook); 926 927 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 928 929 /* XXX free other data structures XXX */ 930 931 return (rv); 932 } 933 934 935 int 936 ehci_activate(device_ptr_t self, enum devact act) 937 { 938 struct ehci_softc *sc = (struct ehci_softc *)self; 939 int rv = 0; 940 941 switch (act) { 942 case DVACT_ACTIVATE: 943 return (EOPNOTSUPP); 944 945 case DVACT_DEACTIVATE: 946 sc->sc_dying = 1; 947 if (sc->sc_child != NULL) 948 rv = config_deactivate(sc->sc_child); 949 break; 950 } 951 return (rv); 952 } 953 954 /* 955 * Handle suspend/resume. 956 * 957 * We need to switch to polling mode here, because this routine is 958 * called from an interrupt context. This is all right since we 959 * are almost suspended anyway. 960 * 961 * Note that this power handler isn't to be registered directly; the 962 * bus glue needs to call out to it. 963 */ 964 void 965 ehci_suspend(device_t dv) 966 { 967 ehci_softc_t *sc = (ehci_softc_t *)dv; 968 int i, s; 969 uint32_t cmd, hcr; 970 971 s = splhardusb(); 972 973 sc->sc_bus.use_polling++; 974 975 for (i = 1; i <= sc->sc_noport; i++) { 976 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 977 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 978 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 979 } 980 981 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 982 983 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 984 EOWRITE4(sc, EHCI_USBCMD, cmd); 985 986 for (i = 0; i < 100; i++) { 987 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 988 if (hcr == 0) 989 break; 990 991 usb_delay_ms(&sc->sc_bus, 1); 992 } 993 if (hcr != 0) 994 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 995 996 cmd &= ~EHCI_CMD_RS; 997 EOWRITE4(sc, EHCI_USBCMD, cmd); 998 999 for (i = 0; i < 100; i++) { 1000 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1001 if (hcr == EHCI_STS_HCH) 1002 break; 1003 1004 usb_delay_ms(&sc->sc_bus, 1); 1005 } 1006 if (hcr != EHCI_STS_HCH) 1007 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1008 1009 sc->sc_bus.use_polling--; 1010 splx(s); 1011 } 1012 1013 void 1014 ehci_resume(device_t dv) 1015 { 1016 ehci_softc_t *sc = (ehci_softc_t *)dv; 1017 int i, s; 1018 uint32_t cmd, hcr; 1019 1020 s = splhardusb(); 1021 1022 sc->sc_bus.use_polling++; 1023 1024 /* restore things in case the bios sucks */ 1025 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1026 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1027 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1028 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1029 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1030 1031 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1032 1033 hcr = 0; 1034 for (i = 1; i <= sc->sc_noport; i++) { 1035 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1036 if ((cmd & EHCI_PS_PO) == 0 && 1037 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1038 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1039 hcr = 1; 1040 } 1041 } 1042 1043 if (hcr) { 1044 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1045 1046 for (i = 1; i <= sc->sc_noport; i++) { 1047 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1048 if ((cmd & EHCI_PS_PO) == 0 && 1049 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1050 EOWRITE4(sc, EHCI_PORTSC(i), 1051 cmd & ~EHCI_PS_FPR); 1052 } 1053 } 1054 1055 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1056 1057 for (i = 0; i < 100; i++) { 1058 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1059 if (hcr != EHCI_STS_HCH) 1060 break; 1061 1062 usb_delay_ms(&sc->sc_bus, 1); 1063 } 1064 if (hcr == EHCI_STS_HCH) 1065 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1066 1067 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1068 1069 sc->sc_bus.use_polling--; 1070 1071 splx(s); 1072 } 1073 1074 /* 1075 * Shut down the controller when the system is going down. 1076 */ 1077 void 1078 ehci_shutdown(void *v) 1079 { 1080 ehci_softc_t *sc = v; 1081 1082 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1083 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1084 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1085 } 1086 1087 usbd_status 1088 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1089 { 1090 struct ehci_softc *sc = (struct ehci_softc *)bus; 1091 usbd_status err; 1092 1093 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1094 if (err == USBD_NOMEM) 1095 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1096 #ifdef EHCI_DEBUG 1097 if (err) 1098 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1099 #endif 1100 return (err); 1101 } 1102 1103 void 1104 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1105 { 1106 struct ehci_softc *sc = (struct ehci_softc *)bus; 1107 1108 if (dma->block->flags & USB_DMA_RESERVE) { 1109 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1110 dma); 1111 return; 1112 } 1113 usb_freemem(&sc->sc_bus, dma); 1114 } 1115 1116 usbd_xfer_handle 1117 ehci_allocx(struct usbd_bus *bus) 1118 { 1119 struct ehci_softc *sc = (struct ehci_softc *)bus; 1120 usbd_xfer_handle xfer; 1121 1122 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1123 if (xfer != NULL) { 1124 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1125 #ifdef DIAGNOSTIC 1126 if (xfer->busy_free != XFER_FREE) { 1127 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1128 xfer->busy_free); 1129 } 1130 #endif 1131 } else { 1132 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1133 } 1134 if (xfer != NULL) { 1135 memset(xfer, 0, sizeof(struct ehci_xfer)); 1136 #ifdef DIAGNOSTIC 1137 EXFER(xfer)->isdone = 1; 1138 xfer->busy_free = XFER_BUSY; 1139 #endif 1140 } 1141 return (xfer); 1142 } 1143 1144 void 1145 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1146 { 1147 struct ehci_softc *sc = (struct ehci_softc *)bus; 1148 1149 #ifdef DIAGNOSTIC 1150 if (xfer->busy_free != XFER_BUSY) { 1151 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1152 xfer->busy_free); 1153 } 1154 xfer->busy_free = XFER_FREE; 1155 if (!EXFER(xfer)->isdone) { 1156 printf("ehci_freex: !isdone\n"); 1157 } 1158 #endif 1159 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1160 } 1161 1162 Static void 1163 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1164 { 1165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1166 1167 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1168 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1169 #ifdef USB_DEBUG 1170 if (ehcidebug) 1171 usbd_dump_pipe(pipe); 1172 #endif 1173 epipe->nexttoggle = 0; 1174 } 1175 1176 Static void 1177 ehci_noop(usbd_pipe_handle pipe) 1178 { 1179 } 1180 1181 #ifdef EHCI_DEBUG 1182 void 1183 ehci_dump_regs(ehci_softc_t *sc) 1184 { 1185 int i; 1186 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1187 EOREAD4(sc, EHCI_USBCMD), 1188 EOREAD4(sc, EHCI_USBSTS), 1189 EOREAD4(sc, EHCI_USBINTR)); 1190 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1191 EOREAD4(sc, EHCI_FRINDEX), 1192 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1193 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1194 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1195 for (i = 1; i <= sc->sc_noport; i++) 1196 printf("port %d status=0x%08x\n", i, 1197 EOREAD4(sc, EHCI_PORTSC(i))); 1198 } 1199 1200 /* 1201 * Unused function - this is meant to be called from a kernel 1202 * debugger. 1203 */ 1204 void 1205 ehci_dump() 1206 { 1207 ehci_dump_regs(theehci); 1208 } 1209 1210 void 1211 ehci_dump_link(ehci_link_t link, int type) 1212 { 1213 link = le32toh(link); 1214 printf("0x%08x", link); 1215 if (link & EHCI_LINK_TERMINATE) 1216 printf("<T>"); 1217 else { 1218 printf("<"); 1219 if (type) { 1220 switch (EHCI_LINK_TYPE(link)) { 1221 case EHCI_LINK_ITD: printf("ITD"); break; 1222 case EHCI_LINK_QH: printf("QH"); break; 1223 case EHCI_LINK_SITD: printf("SITD"); break; 1224 case EHCI_LINK_FSTN: printf("FSTN"); break; 1225 } 1226 } 1227 printf(">"); 1228 } 1229 } 1230 1231 void 1232 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1233 { 1234 int i; 1235 u_int32_t stop; 1236 1237 stop = 0; 1238 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1239 ehci_dump_sqtd(sqtd); 1240 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1241 } 1242 if (sqtd) 1243 printf("dump aborted, too many TDs\n"); 1244 } 1245 1246 void 1247 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1248 { 1249 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1250 ehci_dump_qtd(&sqtd->qtd); 1251 } 1252 1253 void 1254 ehci_dump_qtd(ehci_qtd_t *qtd) 1255 { 1256 u_int32_t s; 1257 char sbuf[128]; 1258 1259 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1260 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1261 printf("\n"); 1262 s = le32toh(qtd->qtd_status); 1263 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1264 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1265 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1266 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1267 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1268 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1269 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1270 EHCI_QTD_GET_PID(s), sbuf); 1271 for (s = 0; s < 5; s++) 1272 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1273 } 1274 1275 void 1276 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1277 { 1278 ehci_qh_t *qh = &sqh->qh; 1279 u_int32_t endp, endphub; 1280 1281 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1282 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1283 endp = le32toh(qh->qh_endp); 1284 printf(" endp=0x%08x\n", endp); 1285 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1286 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1287 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1288 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1289 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1290 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1291 EHCI_QH_GET_NRL(endp)); 1292 endphub = le32toh(qh->qh_endphub); 1293 printf(" endphub=0x%08x\n", endphub); 1294 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1295 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1296 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1297 EHCI_QH_GET_MULT(endphub)); 1298 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1299 printf("Overlay qTD:\n"); 1300 ehci_dump_qtd(&qh->qh_qtd); 1301 } 1302 1303 #ifdef DIAGNOSTIC 1304 Static void 1305 ehci_dump_exfer(struct ehci_xfer *ex) 1306 { 1307 printf("ehci_dump_exfer: ex=%p\n", ex); 1308 } 1309 #endif 1310 #endif 1311 1312 usbd_status 1313 ehci_open(usbd_pipe_handle pipe) 1314 { 1315 usbd_device_handle dev = pipe->device; 1316 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1317 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1318 u_int8_t addr = dev->address; 1319 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1320 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1321 ehci_soft_qh_t *sqh; 1322 usbd_status err; 1323 int s; 1324 int ival, speed, naks; 1325 int hshubaddr, hshubport; 1326 1327 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1328 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1329 1330 if (dev->myhsport) { 1331 hshubaddr = dev->myhsport->parent->address; 1332 hshubport = dev->myhsport->portno; 1333 } else { 1334 hshubaddr = 0; 1335 hshubport = 0; 1336 } 1337 1338 if (sc->sc_dying) 1339 return (USBD_IOERROR); 1340 1341 epipe->nexttoggle = 0; 1342 1343 if (addr == sc->sc_addr) { 1344 switch (ed->bEndpointAddress) { 1345 case USB_CONTROL_ENDPOINT: 1346 pipe->methods = &ehci_root_ctrl_methods; 1347 break; 1348 case UE_DIR_IN | EHCI_INTR_ENDPT: 1349 pipe->methods = &ehci_root_intr_methods; 1350 break; 1351 default: 1352 return (USBD_INVAL); 1353 } 1354 return (USBD_NORMAL_COMPLETION); 1355 } 1356 1357 /* XXX All this stuff is only valid for async. */ 1358 switch (dev->speed) { 1359 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1360 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1361 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1362 default: panic("ehci_open: bad device speed %d", dev->speed); 1363 } 1364 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1365 printf("%s: *** WARNING: opening low/full speed isoc device, " 1366 "this does not work yet.\n", 1367 USBDEVNAME(sc->sc_bus.bdev)); 1368 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1369 hshubaddr, hshubport)); 1370 return USBD_INVAL; 1371 } 1372 1373 naks = 8; /* XXX */ 1374 sqh = ehci_alloc_sqh(sc); 1375 if (sqh == NULL) 1376 return (USBD_NOMEM); 1377 /* qh_link filled when the QH is added */ 1378 sqh->qh.qh_endp = htole32( 1379 EHCI_QH_SET_ADDR(addr) | 1380 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1381 EHCI_QH_SET_EPS(speed) | 1382 EHCI_QH_DTC | 1383 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1384 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1385 EHCI_QH_CTL : 0) | 1386 EHCI_QH_SET_NRL(naks) 1387 ); 1388 sqh->qh.qh_endphub = htole32( 1389 EHCI_QH_SET_MULT(1) | 1390 EHCI_QH_SET_HUBA(hshubaddr) | 1391 EHCI_QH_SET_PORT(hshubport) | 1392 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1393 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1394 ); 1395 sqh->qh.qh_curqtd = EHCI_NULL; 1396 /* Fill the overlay qTD */ 1397 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1398 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1399 sqh->qh.qh_qtd.qtd_status = htole32(0); 1400 1401 epipe->sqh = sqh; 1402 1403 switch (xfertype) { 1404 case UE_CONTROL: 1405 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1406 0, &epipe->u.ctl.reqdma); 1407 #ifdef EHCI_DEBUG 1408 if (err) 1409 printf("ehci_open: usb_allocmem()=%d\n", err); 1410 #endif 1411 if (err) 1412 goto bad; 1413 pipe->methods = &ehci_device_ctrl_methods; 1414 s = splusb(); 1415 ehci_add_qh(sqh, sc->sc_async_head); 1416 splx(s); 1417 break; 1418 case UE_BULK: 1419 pipe->methods = &ehci_device_bulk_methods; 1420 s = splusb(); 1421 ehci_add_qh(sqh, sc->sc_async_head); 1422 splx(s); 1423 break; 1424 case UE_INTERRUPT: 1425 pipe->methods = &ehci_device_intr_methods; 1426 ival = pipe->interval; 1427 if (ival == USBD_DEFAULT_INTERVAL) { 1428 if (speed == EHCI_QH_SPEED_HIGH) { 1429 if (ed->bInterval > 16) { 1430 /* 1431 * illegal with high-speed, but there 1432 * were documentation bugs in the spec, 1433 * so be generous 1434 */ 1435 ival = 256; 1436 } else 1437 ival = (1 << (ed->bInterval - 1)) / 8; 1438 } else 1439 ival = ed->bInterval; 1440 } 1441 err = ehci_device_setintr(sc, sqh, ival); 1442 if (err) 1443 goto bad; 1444 break; 1445 case UE_ISOCHRONOUS: 1446 pipe->methods = &ehci_device_isoc_methods; 1447 /* FALLTHROUGH */ 1448 default: 1449 err = USBD_INVAL; 1450 goto bad; 1451 } 1452 return (USBD_NORMAL_COMPLETION); 1453 1454 bad: 1455 ehci_free_sqh(sc, sqh); 1456 return (err); 1457 } 1458 1459 /* 1460 * Add an ED to the schedule. Called at splusb(). 1461 */ 1462 void 1463 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1464 { 1465 SPLUSBCHECK; 1466 1467 sqh->next = head->next; 1468 sqh->qh.qh_link = head->qh.qh_link; 1469 head->next = sqh; 1470 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1471 1472 #ifdef EHCI_DEBUG 1473 if (ehcidebug > 5) { 1474 printf("ehci_add_qh:\n"); 1475 ehci_dump_sqh(sqh); 1476 } 1477 #endif 1478 } 1479 1480 /* 1481 * Remove an ED from the schedule. Called at splusb(). 1482 */ 1483 void 1484 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1485 { 1486 ehci_soft_qh_t *p; 1487 1488 SPLUSBCHECK; 1489 /* XXX */ 1490 for (p = head; p != NULL && p->next != sqh; p = p->next) 1491 ; 1492 if (p == NULL) 1493 panic("ehci_rem_qh: ED not found"); 1494 p->next = sqh->next; 1495 p->qh.qh_link = sqh->qh.qh_link; 1496 1497 ehci_sync_hc(sc); 1498 } 1499 1500 void 1501 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1502 { 1503 int i; 1504 u_int32_t status; 1505 1506 /* Save toggle bit and ping status. */ 1507 status = sqh->qh.qh_qtd.qtd_status & 1508 htole32(EHCI_QTD_TOGGLE_MASK | 1509 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1510 /* Set HALTED to make hw leave it alone. */ 1511 sqh->qh.qh_qtd.qtd_status = 1512 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1513 sqh->qh.qh_curqtd = 0; 1514 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1515 sqh->qh.qh_qtd.qtd_altnext = 0; 1516 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1517 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1518 sqh->sqtd = sqtd; 1519 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1520 sqh->qh.qh_qtd.qtd_status = status; 1521 } 1522 1523 /* 1524 * Ensure that the HC has released all references to the QH. We do this 1525 * by asking for a Async Advance Doorbell interrupt and then we wait for 1526 * the interrupt. 1527 * To make this easier we first obtain exclusive use of the doorbell. 1528 */ 1529 void 1530 ehci_sync_hc(ehci_softc_t *sc) 1531 { 1532 int s, error; 1533 1534 if (sc->sc_dying) { 1535 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1536 return; 1537 } 1538 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1539 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1540 s = splhardusb(); 1541 /* ask for doorbell */ 1542 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1543 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1544 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1545 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1546 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1547 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1548 splx(s); 1549 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1550 #ifdef DIAGNOSTIC 1551 if (error) 1552 printf("ehci_sync_hc: tsleep() = %d\n", error); 1553 #endif 1554 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1555 } 1556 1557 /***********/ 1558 1559 /* 1560 * Data structures and routines to emulate the root hub. 1561 */ 1562 Static usb_device_descriptor_t ehci_devd = { 1563 USB_DEVICE_DESCRIPTOR_SIZE, 1564 UDESC_DEVICE, /* type */ 1565 {0x00, 0x02}, /* USB version */ 1566 UDCLASS_HUB, /* class */ 1567 UDSUBCLASS_HUB, /* subclass */ 1568 UDPROTO_HSHUBSTT, /* protocol */ 1569 64, /* max packet */ 1570 {0},{0},{0x00,0x01}, /* device id */ 1571 1,2,0, /* string indicies */ 1572 1 /* # of configurations */ 1573 }; 1574 1575 Static const usb_device_qualifier_t ehci_odevd = { 1576 USB_DEVICE_DESCRIPTOR_SIZE, 1577 UDESC_DEVICE_QUALIFIER, /* type */ 1578 {0x00, 0x02}, /* USB version */ 1579 UDCLASS_HUB, /* class */ 1580 UDSUBCLASS_HUB, /* subclass */ 1581 UDPROTO_FSHUB, /* protocol */ 1582 64, /* max packet */ 1583 1, /* # of configurations */ 1584 0 1585 }; 1586 1587 Static const usb_config_descriptor_t ehci_confd = { 1588 USB_CONFIG_DESCRIPTOR_SIZE, 1589 UDESC_CONFIG, 1590 {USB_CONFIG_DESCRIPTOR_SIZE + 1591 USB_INTERFACE_DESCRIPTOR_SIZE + 1592 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1593 1, 1594 1, 1595 0, 1596 UC_ATTR_MBO | UC_SELF_POWERED, 1597 0 /* max power */ 1598 }; 1599 1600 Static const usb_interface_descriptor_t ehci_ifcd = { 1601 USB_INTERFACE_DESCRIPTOR_SIZE, 1602 UDESC_INTERFACE, 1603 0, 1604 0, 1605 1, 1606 UICLASS_HUB, 1607 UISUBCLASS_HUB, 1608 UIPROTO_HSHUBSTT, 1609 0 1610 }; 1611 1612 Static const usb_endpoint_descriptor_t ehci_endpd = { 1613 USB_ENDPOINT_DESCRIPTOR_SIZE, 1614 UDESC_ENDPOINT, 1615 UE_DIR_IN | EHCI_INTR_ENDPT, 1616 UE_INTERRUPT, 1617 {8, 0}, /* max packet */ 1618 12 1619 }; 1620 1621 Static const usb_hub_descriptor_t ehci_hubd = { 1622 USB_HUB_DESCRIPTOR_SIZE, 1623 UDESC_HUB, 1624 0, 1625 {0,0}, 1626 0, 1627 0, 1628 {""}, 1629 {""}, 1630 }; 1631 1632 Static int 1633 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1634 { 1635 int i; 1636 1637 if (l == 0) 1638 return (0); 1639 p->bLength = 2 * strlen(s) + 2; 1640 if (l == 1) 1641 return (1); 1642 p->bDescriptorType = UDESC_STRING; 1643 l -= 2; 1644 for (i = 0; s[i] && l > 1; i++, l -= 2) 1645 USETW2(p->bString[i], 0, s[i]); 1646 return (2*i+2); 1647 } 1648 1649 /* 1650 * Simulate a hardware hub by handling all the necessary requests. 1651 */ 1652 Static usbd_status 1653 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1654 { 1655 usbd_status err; 1656 1657 /* Insert last in queue. */ 1658 err = usb_insert_transfer(xfer); 1659 if (err) 1660 return (err); 1661 1662 /* Pipe isn't running, start first */ 1663 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1664 } 1665 1666 Static usbd_status 1667 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1668 { 1669 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1670 usb_device_request_t *req; 1671 void *buf = NULL; 1672 int port, i; 1673 int s, len, value, index, l, totlen = 0; 1674 usb_port_status_t ps; 1675 usb_hub_descriptor_t hubd; 1676 usbd_status err; 1677 u_int32_t v; 1678 1679 if (sc->sc_dying) 1680 return (USBD_IOERROR); 1681 1682 #ifdef DIAGNOSTIC 1683 if (!(xfer->rqflags & URQ_REQUEST)) 1684 /* XXX panic */ 1685 return (USBD_INVAL); 1686 #endif 1687 req = &xfer->request; 1688 1689 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1690 req->bmRequestType, req->bRequest)); 1691 1692 len = UGETW(req->wLength); 1693 value = UGETW(req->wValue); 1694 index = UGETW(req->wIndex); 1695 1696 if (len != 0) 1697 buf = KERNADDR(&xfer->dmabuf, 0); 1698 1699 #define C(x,y) ((x) | ((y) << 8)) 1700 switch(C(req->bRequest, req->bmRequestType)) { 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1702 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1703 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1704 /* 1705 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1706 * for the integrated root hub. 1707 */ 1708 break; 1709 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1710 if (len > 0) { 1711 *(u_int8_t *)buf = sc->sc_conf; 1712 totlen = 1; 1713 } 1714 break; 1715 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1716 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1717 if (len == 0) 1718 break; 1719 switch(value >> 8) { 1720 case UDESC_DEVICE: 1721 if ((value & 0xff) != 0) { 1722 err = USBD_IOERROR; 1723 goto ret; 1724 } 1725 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1726 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1727 memcpy(buf, &ehci_devd, l); 1728 break; 1729 /* 1730 * We can't really operate at another speed, but the spec says 1731 * we need this descriptor. 1732 */ 1733 case UDESC_DEVICE_QUALIFIER: 1734 if ((value & 0xff) != 0) { 1735 err = USBD_IOERROR; 1736 goto ret; 1737 } 1738 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1739 memcpy(buf, &ehci_odevd, l); 1740 break; 1741 /* 1742 * We can't really operate at another speed, but the spec says 1743 * we need this descriptor. 1744 */ 1745 case UDESC_OTHER_SPEED_CONFIGURATION: 1746 case UDESC_CONFIG: 1747 if ((value & 0xff) != 0) { 1748 err = USBD_IOERROR; 1749 goto ret; 1750 } 1751 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1752 memcpy(buf, &ehci_confd, l); 1753 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1754 value >> 8; 1755 buf = (char *)buf + l; 1756 len -= l; 1757 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1758 totlen += l; 1759 memcpy(buf, &ehci_ifcd, l); 1760 buf = (char *)buf + l; 1761 len -= l; 1762 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1763 totlen += l; 1764 memcpy(buf, &ehci_endpd, l); 1765 break; 1766 case UDESC_STRING: 1767 *(u_int8_t *)buf = 0; 1768 totlen = 1; 1769 switch (value & 0xff) { 1770 case 0: /* Language table */ 1771 if (len > 0) 1772 *(u_int8_t *)buf = 4; 1773 if (len >= 4) { 1774 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1775 totlen = 4; 1776 } 1777 break; 1778 case 1: /* Vendor */ 1779 totlen = ehci_str(buf, len, sc->sc_vendor); 1780 break; 1781 case 2: /* Product */ 1782 totlen = ehci_str(buf, len, "EHCI root hub"); 1783 break; 1784 } 1785 break; 1786 default: 1787 err = USBD_IOERROR; 1788 goto ret; 1789 } 1790 break; 1791 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1792 if (len > 0) { 1793 *(u_int8_t *)buf = 0; 1794 totlen = 1; 1795 } 1796 break; 1797 case C(UR_GET_STATUS, UT_READ_DEVICE): 1798 if (len > 1) { 1799 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1800 totlen = 2; 1801 } 1802 break; 1803 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1804 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1805 if (len > 1) { 1806 USETW(((usb_status_t *)buf)->wStatus, 0); 1807 totlen = 2; 1808 } 1809 break; 1810 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1811 if (value >= USB_MAX_DEVICES) { 1812 err = USBD_IOERROR; 1813 goto ret; 1814 } 1815 sc->sc_addr = value; 1816 break; 1817 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1818 if (value != 0 && value != 1) { 1819 err = USBD_IOERROR; 1820 goto ret; 1821 } 1822 sc->sc_conf = value; 1823 break; 1824 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1825 break; 1826 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1827 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1828 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1829 err = USBD_IOERROR; 1830 goto ret; 1831 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1832 break; 1833 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1834 break; 1835 /* Hub requests */ 1836 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1837 break; 1838 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1839 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1840 "port=%d feature=%d\n", 1841 index, value)); 1842 if (index < 1 || index > sc->sc_noport) { 1843 err = USBD_IOERROR; 1844 goto ret; 1845 } 1846 port = EHCI_PORTSC(index); 1847 v = EOREAD4(sc, port); 1848 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1849 v &= ~EHCI_PS_CLEAR; 1850 switch(value) { 1851 case UHF_PORT_ENABLE: 1852 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1853 break; 1854 case UHF_PORT_SUSPEND: 1855 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1856 break; 1857 case UHF_PORT_POWER: 1858 if (sc->sc_hasppc) 1859 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1860 break; 1861 case UHF_PORT_TEST: 1862 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1863 "%d\n", index)); 1864 break; 1865 case UHF_PORT_INDICATOR: 1866 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1867 "%d\n", index)); 1868 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1869 break; 1870 case UHF_C_PORT_CONNECTION: 1871 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1872 break; 1873 case UHF_C_PORT_ENABLE: 1874 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1875 break; 1876 case UHF_C_PORT_SUSPEND: 1877 /* how? */ 1878 break; 1879 case UHF_C_PORT_OVER_CURRENT: 1880 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1881 break; 1882 case UHF_C_PORT_RESET: 1883 sc->sc_isreset[index] = 0; 1884 break; 1885 default: 1886 err = USBD_IOERROR; 1887 goto ret; 1888 } 1889 #if 0 1890 switch(value) { 1891 case UHF_C_PORT_CONNECTION: 1892 case UHF_C_PORT_ENABLE: 1893 case UHF_C_PORT_SUSPEND: 1894 case UHF_C_PORT_OVER_CURRENT: 1895 case UHF_C_PORT_RESET: 1896 default: 1897 break; 1898 } 1899 #endif 1900 break; 1901 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1902 if (len == 0) 1903 break; 1904 if ((value & 0xff) != 0) { 1905 err = USBD_IOERROR; 1906 goto ret; 1907 } 1908 hubd = ehci_hubd; 1909 hubd.bNbrPorts = sc->sc_noport; 1910 v = EOREAD4(sc, EHCI_HCSPARAMS); 1911 USETW(hubd.wHubCharacteristics, 1912 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1913 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1914 ? UHD_PORT_IND : 0); 1915 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1916 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1917 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1918 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1919 l = min(len, hubd.bDescLength); 1920 totlen = l; 1921 memcpy(buf, &hubd, l); 1922 break; 1923 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1924 if (len != 4) { 1925 err = USBD_IOERROR; 1926 goto ret; 1927 } 1928 memset(buf, 0, len); /* ? XXX */ 1929 totlen = len; 1930 break; 1931 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1932 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1933 index)); 1934 if (index < 1 || index > sc->sc_noport) { 1935 err = USBD_IOERROR; 1936 goto ret; 1937 } 1938 if (len != 4) { 1939 err = USBD_IOERROR; 1940 goto ret; 1941 } 1942 v = EOREAD4(sc, EHCI_PORTSC(index)); 1943 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1944 v)); 1945 i = UPS_HIGH_SPEED; 1946 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1947 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1948 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1949 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1950 if (v & EHCI_PS_PR) i |= UPS_RESET; 1951 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1952 USETW(ps.wPortStatus, i); 1953 i = 0; 1954 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1955 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1956 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1957 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1958 USETW(ps.wPortChange, i); 1959 l = min(len, sizeof ps); 1960 memcpy(buf, &ps, l); 1961 totlen = l; 1962 break; 1963 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1964 err = USBD_IOERROR; 1965 goto ret; 1966 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1967 break; 1968 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1969 if (index < 1 || index > sc->sc_noport) { 1970 err = USBD_IOERROR; 1971 goto ret; 1972 } 1973 port = EHCI_PORTSC(index); 1974 v = EOREAD4(sc, port); 1975 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1976 v &= ~EHCI_PS_CLEAR; 1977 switch(value) { 1978 case UHF_PORT_ENABLE: 1979 EOWRITE4(sc, port, v | EHCI_PS_PE); 1980 break; 1981 case UHF_PORT_SUSPEND: 1982 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1983 break; 1984 case UHF_PORT_RESET: 1985 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1986 index)); 1987 if (EHCI_PS_IS_LOWSPEED(v)) { 1988 /* Low speed device, give up ownership. */ 1989 ehci_disown(sc, index, 1); 1990 break; 1991 } 1992 /* Start reset sequence. */ 1993 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1994 EOWRITE4(sc, port, v | EHCI_PS_PR); 1995 /* Wait for reset to complete. */ 1996 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1997 if (sc->sc_dying) { 1998 err = USBD_IOERROR; 1999 goto ret; 2000 } 2001 /* Terminate reset sequence. */ 2002 EOWRITE4(sc, port, v); 2003 /* Wait for HC to complete reset. */ 2004 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2005 if (sc->sc_dying) { 2006 err = USBD_IOERROR; 2007 goto ret; 2008 } 2009 v = EOREAD4(sc, port); 2010 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2011 if (v & EHCI_PS_PR) { 2012 printf("%s: port reset timeout\n", 2013 USBDEVNAME(sc->sc_bus.bdev)); 2014 return (USBD_TIMEOUT); 2015 } 2016 if (!(v & EHCI_PS_PE)) { 2017 /* Not a high speed device, give up ownership.*/ 2018 ehci_disown(sc, index, 0); 2019 break; 2020 } 2021 sc->sc_isreset[index] = 1; 2022 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2023 index, v)); 2024 break; 2025 case UHF_PORT_POWER: 2026 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2027 "%d (has PPC = %d)\n", index, 2028 sc->sc_hasppc)); 2029 if (sc->sc_hasppc) 2030 EOWRITE4(sc, port, v | EHCI_PS_PP); 2031 break; 2032 case UHF_PORT_TEST: 2033 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2034 "%d\n", index)); 2035 break; 2036 case UHF_PORT_INDICATOR: 2037 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2038 "%d\n", index)); 2039 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2040 break; 2041 default: 2042 err = USBD_IOERROR; 2043 goto ret; 2044 } 2045 break; 2046 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2047 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2048 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2049 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2050 break; 2051 default: 2052 err = USBD_IOERROR; 2053 goto ret; 2054 } 2055 xfer->actlen = totlen; 2056 err = USBD_NORMAL_COMPLETION; 2057 ret: 2058 xfer->status = err; 2059 s = splusb(); 2060 usb_transfer_complete(xfer); 2061 splx(s); 2062 return (USBD_IN_PROGRESS); 2063 } 2064 2065 void 2066 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2067 { 2068 int port; 2069 u_int32_t v; 2070 2071 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2072 #ifdef DIAGNOSTIC 2073 if (sc->sc_npcomp != 0) { 2074 int i = (index-1) / sc->sc_npcomp; 2075 if (i >= sc->sc_ncomp) 2076 printf("%s: strange port\n", 2077 USBDEVNAME(sc->sc_bus.bdev)); 2078 else 2079 printf("%s: handing over %s speed device on " 2080 "port %d to %s\n", 2081 USBDEVNAME(sc->sc_bus.bdev), 2082 lowspeed ? "low" : "full", 2083 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2084 } else { 2085 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2086 } 2087 #endif 2088 port = EHCI_PORTSC(index); 2089 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2090 EOWRITE4(sc, port, v | EHCI_PS_PO); 2091 } 2092 2093 /* Abort a root control request. */ 2094 Static void 2095 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2096 { 2097 /* Nothing to do, all transfers are synchronous. */ 2098 } 2099 2100 /* Close the root pipe. */ 2101 Static void 2102 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2103 { 2104 DPRINTF(("ehci_root_ctrl_close\n")); 2105 /* Nothing to do. */ 2106 } 2107 2108 void 2109 ehci_root_intr_done(usbd_xfer_handle xfer) 2110 { 2111 xfer->hcpriv = NULL; 2112 } 2113 2114 Static usbd_status 2115 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2116 { 2117 usbd_status err; 2118 2119 /* Insert last in queue. */ 2120 err = usb_insert_transfer(xfer); 2121 if (err) 2122 return (err); 2123 2124 /* Pipe isn't running, start first */ 2125 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2126 } 2127 2128 Static usbd_status 2129 ehci_root_intr_start(usbd_xfer_handle xfer) 2130 { 2131 usbd_pipe_handle pipe = xfer->pipe; 2132 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2133 2134 if (sc->sc_dying) 2135 return (USBD_IOERROR); 2136 2137 sc->sc_intrxfer = xfer; 2138 2139 return (USBD_IN_PROGRESS); 2140 } 2141 2142 /* Abort a root interrupt request. */ 2143 Static void 2144 ehci_root_intr_abort(usbd_xfer_handle xfer) 2145 { 2146 int s; 2147 2148 if (xfer->pipe->intrxfer == xfer) { 2149 DPRINTF(("ehci_root_intr_abort: remove\n")); 2150 xfer->pipe->intrxfer = NULL; 2151 } 2152 xfer->status = USBD_CANCELLED; 2153 s = splusb(); 2154 usb_transfer_complete(xfer); 2155 splx(s); 2156 } 2157 2158 /* Close the root pipe. */ 2159 Static void 2160 ehci_root_intr_close(usbd_pipe_handle pipe) 2161 { 2162 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2163 2164 DPRINTF(("ehci_root_intr_close\n")); 2165 2166 sc->sc_intrxfer = NULL; 2167 } 2168 2169 void 2170 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2171 { 2172 xfer->hcpriv = NULL; 2173 } 2174 2175 /************************/ 2176 2177 ehci_soft_qh_t * 2178 ehci_alloc_sqh(ehci_softc_t *sc) 2179 { 2180 ehci_soft_qh_t *sqh; 2181 usbd_status err; 2182 int i, offs; 2183 usb_dma_t dma; 2184 2185 if (sc->sc_freeqhs == NULL) { 2186 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2187 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2188 EHCI_PAGE_SIZE, &dma); 2189 #ifdef EHCI_DEBUG 2190 if (err) 2191 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2192 #endif 2193 if (err) 2194 return (NULL); 2195 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2196 offs = i * EHCI_SQH_SIZE; 2197 sqh = KERNADDR(&dma, offs); 2198 sqh->physaddr = DMAADDR(&dma, offs); 2199 sqh->next = sc->sc_freeqhs; 2200 sc->sc_freeqhs = sqh; 2201 } 2202 } 2203 sqh = sc->sc_freeqhs; 2204 sc->sc_freeqhs = sqh->next; 2205 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2206 sqh->next = NULL; 2207 return (sqh); 2208 } 2209 2210 void 2211 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2212 { 2213 sqh->next = sc->sc_freeqhs; 2214 sc->sc_freeqhs = sqh; 2215 } 2216 2217 ehci_soft_qtd_t * 2218 ehci_alloc_sqtd(ehci_softc_t *sc) 2219 { 2220 ehci_soft_qtd_t *sqtd; 2221 usbd_status err; 2222 int i, offs; 2223 usb_dma_t dma; 2224 int s; 2225 2226 if (sc->sc_freeqtds == NULL) { 2227 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2228 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2229 EHCI_PAGE_SIZE, &dma); 2230 #ifdef EHCI_DEBUG 2231 if (err) 2232 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2233 #endif 2234 if (err) 2235 return (NULL); 2236 s = splusb(); 2237 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2238 offs = i * EHCI_SQTD_SIZE; 2239 sqtd = KERNADDR(&dma, offs); 2240 sqtd->physaddr = DMAADDR(&dma, offs); 2241 sqtd->nextqtd = sc->sc_freeqtds; 2242 sc->sc_freeqtds = sqtd; 2243 } 2244 splx(s); 2245 } 2246 2247 s = splusb(); 2248 sqtd = sc->sc_freeqtds; 2249 sc->sc_freeqtds = sqtd->nextqtd; 2250 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2251 sqtd->nextqtd = NULL; 2252 sqtd->xfer = NULL; 2253 splx(s); 2254 2255 return (sqtd); 2256 } 2257 2258 void 2259 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2260 { 2261 int s; 2262 2263 s = splusb(); 2264 sqtd->nextqtd = sc->sc_freeqtds; 2265 sc->sc_freeqtds = sqtd; 2266 splx(s); 2267 } 2268 2269 usbd_status 2270 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2271 int alen, int rd, usbd_xfer_handle xfer, 2272 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2273 { 2274 ehci_soft_qtd_t *next, *cur; 2275 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2276 u_int32_t qtdstatus; 2277 int len, curlen, mps; 2278 int i, tog; 2279 usb_dma_t *dma = &xfer->dmabuf; 2280 u_int16_t flags = xfer->flags; 2281 2282 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2283 2284 len = alen; 2285 dataphys = DMAADDR(dma, 0); 2286 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2287 qtdstatus = EHCI_QTD_ACTIVE | 2288 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2289 EHCI_QTD_SET_CERR(3) 2290 /* IOC set below */ 2291 /* BYTES set below */ 2292 ; 2293 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2294 tog = epipe->nexttoggle; 2295 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2296 2297 cur = ehci_alloc_sqtd(sc); 2298 *sp = cur; 2299 if (cur == NULL) 2300 goto nomem; 2301 for (;;) { 2302 dataphyspage = EHCI_PAGE(dataphys); 2303 /* The EHCI hardware can handle at most 5 pages. */ 2304 if (dataphyslastpage - dataphyspage < 2305 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2306 /* we can handle it in this QTD */ 2307 curlen = len; 2308 } else { 2309 /* must use multiple TDs, fill as much as possible. */ 2310 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2311 EHCI_PAGE_OFFSET(dataphys); 2312 #ifdef DIAGNOSTIC 2313 if (curlen > len) { 2314 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2315 "len=0x%x offs=0x%x\n", curlen, len, 2316 EHCI_PAGE_OFFSET(dataphys)); 2317 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2318 dataphyslastpage, dataphyspage, 2319 dataphys); 2320 curlen = len; 2321 } 2322 #endif 2323 /* the length must be a multiple of the max size */ 2324 curlen -= curlen % mps; 2325 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2326 "curlen=%d\n", curlen)); 2327 #ifdef DIAGNOSTIC 2328 if (curlen == 0) 2329 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2330 #endif 2331 } 2332 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2333 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2334 dataphys, dataphyslastpage, 2335 len, curlen)); 2336 len -= curlen; 2337 2338 /* 2339 * Allocate another transfer if there's more data left, 2340 * or if force last short transfer flag is set and we're 2341 * allocating a multiple of the max packet size. 2342 */ 2343 if (len != 0 || 2344 ((curlen % mps) == 0 && !rd && curlen != 0 && 2345 (flags & USBD_FORCE_SHORT_XFER))) { 2346 next = ehci_alloc_sqtd(sc); 2347 if (next == NULL) 2348 goto nomem; 2349 nextphys = htole32(next->physaddr); 2350 } else { 2351 next = NULL; 2352 nextphys = EHCI_NULL; 2353 } 2354 2355 for (i = 0; i * EHCI_PAGE_SIZE < 2356 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2357 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2358 if (i != 0) /* use offset only in first buffer */ 2359 a = EHCI_PAGE(a); 2360 cur->qtd.qtd_buffer[i] = htole32(a); 2361 cur->qtd.qtd_buffer_hi[i] = 0; 2362 #ifdef DIAGNOSTIC 2363 if (i >= EHCI_QTD_NBUFFERS) { 2364 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2365 goto nomem; 2366 } 2367 #endif 2368 } 2369 cur->nextqtd = next; 2370 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2371 cur->qtd.qtd_status = 2372 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2373 cur->xfer = xfer; 2374 cur->len = curlen; 2375 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2376 dataphys, dataphys + curlen)); 2377 /* adjust the toggle based on the number of packets in this 2378 qtd */ 2379 if (((curlen + mps - 1) / mps) & 1) { 2380 tog ^= 1; 2381 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2382 } 2383 if (next == NULL) 2384 break; 2385 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2386 dataphys += curlen; 2387 cur = next; 2388 } 2389 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2390 *ep = cur; 2391 epipe->nexttoggle = tog; 2392 2393 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2394 *sp, *ep)); 2395 2396 return (USBD_NORMAL_COMPLETION); 2397 2398 nomem: 2399 /* XXX free chain */ 2400 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2401 return (USBD_NOMEM); 2402 } 2403 2404 Static void 2405 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2406 ehci_soft_qtd_t *sqtdend) 2407 { 2408 ehci_soft_qtd_t *p; 2409 int i; 2410 2411 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2412 sqtd, sqtdend)); 2413 2414 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2415 p = sqtd->nextqtd; 2416 ehci_free_sqtd(sc, sqtd); 2417 } 2418 } 2419 2420 /****************/ 2421 2422 /* 2423 * Close a reqular pipe. 2424 * Assumes that there are no pending transactions. 2425 */ 2426 void 2427 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2428 { 2429 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2430 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2431 ehci_soft_qh_t *sqh = epipe->sqh; 2432 int s; 2433 2434 s = splusb(); 2435 ehci_rem_qh(sc, sqh, head); 2436 splx(s); 2437 ehci_free_sqh(sc, epipe->sqh); 2438 } 2439 2440 /* 2441 * Abort a device request. 2442 * If this routine is called at splusb() it guarantees that the request 2443 * will be removed from the hardware scheduling and that the callback 2444 * for it will be called with USBD_CANCELLED status. 2445 * It's impossible to guarantee that the requested transfer will not 2446 * have happened since the hardware runs concurrently. 2447 * If the transaction has already happened we rely on the ordinary 2448 * interrupt processing to process it. 2449 * XXX This is most probably wrong. 2450 */ 2451 void 2452 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2453 { 2454 #define exfer EXFER(xfer) 2455 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2456 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2457 ehci_soft_qh_t *sqh = epipe->sqh; 2458 ehci_soft_qtd_t *sqtd; 2459 ehci_physaddr_t cur; 2460 u_int32_t qhstatus; 2461 int s; 2462 int hit; 2463 int wake; 2464 2465 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2466 2467 if (sc->sc_dying) { 2468 /* If we're dying, just do the software part. */ 2469 s = splusb(); 2470 xfer->status = status; /* make software ignore it */ 2471 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2472 usb_transfer_complete(xfer); 2473 splx(s); 2474 return; 2475 } 2476 2477 if (xfer->device->bus->intr_context || !curproc) 2478 panic("ehci_abort_xfer: not in process context"); 2479 2480 /* 2481 * If an abort is already in progress then just wait for it to 2482 * complete and return. 2483 */ 2484 if (xfer->hcflags & UXFER_ABORTING) { 2485 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2486 #ifdef DIAGNOSTIC 2487 if (status == USBD_TIMEOUT) 2488 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2489 #endif 2490 /* Override the status which might be USBD_TIMEOUT. */ 2491 xfer->status = status; 2492 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2493 xfer->hcflags |= UXFER_ABORTWAIT; 2494 while (xfer->hcflags & UXFER_ABORTING) 2495 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2496 return; 2497 } 2498 xfer->hcflags |= UXFER_ABORTING; 2499 2500 /* 2501 * Step 1: Make interrupt routine and hardware ignore xfer. 2502 */ 2503 s = splusb(); 2504 xfer->status = status; /* make software ignore it */ 2505 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2506 qhstatus = sqh->qh.qh_qtd.qtd_status; 2507 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2508 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2509 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2510 if (sqtd == exfer->sqtdend) 2511 break; 2512 } 2513 splx(s); 2514 2515 /* 2516 * Step 2: Wait until we know hardware has finished any possible 2517 * use of the xfer. Also make sure the soft interrupt routine 2518 * has run. 2519 */ 2520 ehci_sync_hc(sc); 2521 s = splusb(); 2522 #ifdef USB_USE_SOFTINTR 2523 sc->sc_softwake = 1; 2524 #endif /* USB_USE_SOFTINTR */ 2525 usb_schedsoftintr(&sc->sc_bus); 2526 #ifdef USB_USE_SOFTINTR 2527 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2528 #endif /* USB_USE_SOFTINTR */ 2529 splx(s); 2530 2531 /* 2532 * Step 3: Remove any vestiges of the xfer from the hardware. 2533 * The complication here is that the hardware may have executed 2534 * beyond the xfer we're trying to abort. So as we're scanning 2535 * the TDs of this xfer we check if the hardware points to 2536 * any of them. 2537 */ 2538 s = splusb(); /* XXX why? */ 2539 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2540 hit = 0; 2541 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2542 hit |= cur == sqtd->physaddr; 2543 if (sqtd == exfer->sqtdend) 2544 break; 2545 } 2546 sqtd = sqtd->nextqtd; 2547 /* Zap curqtd register if hardware pointed inside the xfer. */ 2548 if (hit && sqtd != NULL) { 2549 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2550 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2551 sqh->qh.qh_qtd.qtd_status = qhstatus; 2552 } else { 2553 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2554 } 2555 2556 /* 2557 * Step 4: Execute callback. 2558 */ 2559 #ifdef DIAGNOSTIC 2560 exfer->isdone = 1; 2561 #endif 2562 wake = xfer->hcflags & UXFER_ABORTWAIT; 2563 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2564 usb_transfer_complete(xfer); 2565 if (wake) 2566 wakeup(&xfer->hcflags); 2567 2568 splx(s); 2569 #undef exfer 2570 } 2571 2572 void 2573 ehci_timeout(void *addr) 2574 { 2575 struct ehci_xfer *exfer = addr; 2576 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2577 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2578 2579 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2580 #ifdef USB_DEBUG 2581 if (ehcidebug > 1) 2582 usbd_dump_pipe(exfer->xfer.pipe); 2583 #endif 2584 2585 if (sc->sc_dying) { 2586 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2587 return; 2588 } 2589 2590 /* Execute the abort in a process context. */ 2591 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2592 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2593 USB_TASKQ_HC); 2594 } 2595 2596 void 2597 ehci_timeout_task(void *addr) 2598 { 2599 usbd_xfer_handle xfer = addr; 2600 int s; 2601 2602 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2603 2604 s = splusb(); 2605 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2606 splx(s); 2607 } 2608 2609 /************************/ 2610 2611 Static usbd_status 2612 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2613 { 2614 usbd_status err; 2615 2616 /* Insert last in queue. */ 2617 err = usb_insert_transfer(xfer); 2618 if (err) 2619 return (err); 2620 2621 /* Pipe isn't running, start first */ 2622 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2623 } 2624 2625 Static usbd_status 2626 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2627 { 2628 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2629 usbd_status err; 2630 2631 if (sc->sc_dying) 2632 return (USBD_IOERROR); 2633 2634 #ifdef DIAGNOSTIC 2635 if (!(xfer->rqflags & URQ_REQUEST)) { 2636 /* XXX panic */ 2637 printf("ehci_device_ctrl_transfer: not a request\n"); 2638 return (USBD_INVAL); 2639 } 2640 #endif 2641 2642 err = ehci_device_request(xfer); 2643 if (err) 2644 return (err); 2645 2646 if (sc->sc_bus.use_polling) 2647 ehci_waitintr(sc, xfer); 2648 return (USBD_IN_PROGRESS); 2649 } 2650 2651 void 2652 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2653 { 2654 struct ehci_xfer *ex = EXFER(xfer); 2655 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2656 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2657 2658 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2659 2660 #ifdef DIAGNOSTIC 2661 if (!(xfer->rqflags & URQ_REQUEST)) { 2662 panic("ehci_ctrl_done: not a request"); 2663 } 2664 #endif 2665 2666 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2667 ehci_del_intr_list(ex); /* remove from active list */ 2668 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2669 } 2670 2671 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2672 } 2673 2674 /* Abort a device control request. */ 2675 Static void 2676 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2677 { 2678 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2679 ehci_abort_xfer(xfer, USBD_CANCELLED); 2680 } 2681 2682 /* Close a device control pipe. */ 2683 Static void 2684 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2685 { 2686 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2687 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2688 2689 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2690 ehci_close_pipe(pipe, sc->sc_async_head); 2691 } 2692 2693 usbd_status 2694 ehci_device_request(usbd_xfer_handle xfer) 2695 { 2696 #define exfer EXFER(xfer) 2697 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2698 usb_device_request_t *req = &xfer->request; 2699 usbd_device_handle dev = epipe->pipe.device; 2700 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2701 int addr = dev->address; 2702 ehci_soft_qtd_t *setup, *stat, *next; 2703 ehci_soft_qh_t *sqh; 2704 int isread; 2705 int len; 2706 usbd_status err; 2707 int s; 2708 2709 isread = req->bmRequestType & UT_READ; 2710 len = UGETW(req->wLength); 2711 2712 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2713 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2714 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2715 UGETW(req->wIndex), len, addr, 2716 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2717 2718 setup = ehci_alloc_sqtd(sc); 2719 if (setup == NULL) { 2720 err = USBD_NOMEM; 2721 goto bad1; 2722 } 2723 stat = ehci_alloc_sqtd(sc); 2724 if (stat == NULL) { 2725 err = USBD_NOMEM; 2726 goto bad2; 2727 } 2728 2729 sqh = epipe->sqh; 2730 epipe->u.ctl.length = len; 2731 2732 /* Update device address and length since they may have changed 2733 during the setup of the control pipe in usbd_new_device(). */ 2734 /* XXX This only needs to be done once, but it's too early in open. */ 2735 /* XXXX Should not touch ED here! */ 2736 sqh->qh.qh_endp = 2737 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2738 htole32( 2739 EHCI_QH_SET_ADDR(addr) | 2740 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2741 ); 2742 2743 /* Set up data transaction */ 2744 if (len != 0) { 2745 ehci_soft_qtd_t *end; 2746 2747 /* Start toggle at 1. */ 2748 epipe->nexttoggle = 1; 2749 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2750 &next, &end); 2751 if (err) 2752 goto bad3; 2753 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2754 end->nextqtd = stat; 2755 end->qtd.qtd_next = 2756 end->qtd.qtd_altnext = htole32(stat->physaddr); 2757 } else { 2758 next = stat; 2759 } 2760 2761 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2762 2763 /* Clear toggle */ 2764 setup->qtd.qtd_status = htole32( 2765 EHCI_QTD_ACTIVE | 2766 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2767 EHCI_QTD_SET_CERR(3) | 2768 EHCI_QTD_SET_TOGGLE(0) | 2769 EHCI_QTD_SET_BYTES(sizeof *req) 2770 ); 2771 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2772 setup->qtd.qtd_buffer_hi[0] = 0; 2773 setup->nextqtd = next; 2774 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2775 setup->xfer = xfer; 2776 setup->len = sizeof *req; 2777 2778 stat->qtd.qtd_status = htole32( 2779 EHCI_QTD_ACTIVE | 2780 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2781 EHCI_QTD_SET_CERR(3) | 2782 EHCI_QTD_SET_TOGGLE(1) | 2783 EHCI_QTD_IOC 2784 ); 2785 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2786 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2787 stat->nextqtd = NULL; 2788 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2789 stat->xfer = xfer; 2790 stat->len = 0; 2791 2792 #ifdef EHCI_DEBUG 2793 if (ehcidebug > 5) { 2794 DPRINTF(("ehci_device_request:\n")); 2795 ehci_dump_sqh(sqh); 2796 ehci_dump_sqtds(setup); 2797 } 2798 #endif 2799 2800 exfer->sqtdstart = setup; 2801 exfer->sqtdend = stat; 2802 #ifdef DIAGNOSTIC 2803 if (!exfer->isdone) { 2804 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2805 } 2806 exfer->isdone = 0; 2807 #endif 2808 2809 /* Insert qTD in QH list. */ 2810 s = splusb(); 2811 ehci_set_qh_qtd(sqh, setup); 2812 if (xfer->timeout && !sc->sc_bus.use_polling) { 2813 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2814 ehci_timeout, xfer); 2815 } 2816 ehci_add_intr_list(sc, exfer); 2817 xfer->status = USBD_IN_PROGRESS; 2818 splx(s); 2819 2820 #ifdef EHCI_DEBUG 2821 if (ehcidebug > 10) { 2822 DPRINTF(("ehci_device_request: status=%x\n", 2823 EOREAD4(sc, EHCI_USBSTS))); 2824 delay(10000); 2825 ehci_dump_regs(sc); 2826 ehci_dump_sqh(sc->sc_async_head); 2827 ehci_dump_sqh(sqh); 2828 ehci_dump_sqtds(setup); 2829 } 2830 #endif 2831 2832 return (USBD_NORMAL_COMPLETION); 2833 2834 bad3: 2835 ehci_free_sqtd(sc, stat); 2836 bad2: 2837 ehci_free_sqtd(sc, setup); 2838 bad1: 2839 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2840 xfer->status = err; 2841 usb_transfer_complete(xfer); 2842 return (err); 2843 #undef exfer 2844 } 2845 2846 /* 2847 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2848 * qTD status, or miss signalling occasionally under heavy load. If the host 2849 * machine is too fast, we we can miss transaction completion - when we scan 2850 * the active list the transaction still seems to be active. This generally 2851 * exhibits itself as a umass stall that never recovers. 2852 * 2853 * We work around this behaviour by setting up this callback after any softintr 2854 * that completes with transactions still pending, giving us another chance to 2855 * check for completion after the writeback has taken place. 2856 */ 2857 void 2858 ehci_intrlist_timeout(void *arg) 2859 { 2860 ehci_softc_t *sc = arg; 2861 int s = splusb(); 2862 2863 DPRINTF(("ehci_intrlist_timeout\n")); 2864 usb_schedsoftintr(&sc->sc_bus); 2865 2866 splx(s); 2867 } 2868 2869 /************************/ 2870 2871 Static usbd_status 2872 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2873 { 2874 usbd_status err; 2875 2876 /* Insert last in queue. */ 2877 err = usb_insert_transfer(xfer); 2878 if (err) 2879 return (err); 2880 2881 /* Pipe isn't running, start first */ 2882 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2883 } 2884 2885 usbd_status 2886 ehci_device_bulk_start(usbd_xfer_handle xfer) 2887 { 2888 #define exfer EXFER(xfer) 2889 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2890 usbd_device_handle dev = epipe->pipe.device; 2891 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2892 ehci_soft_qtd_t *data, *dataend; 2893 ehci_soft_qh_t *sqh; 2894 usbd_status err; 2895 int len, isread, endpt; 2896 int s; 2897 2898 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2899 xfer, xfer->length, xfer->flags)); 2900 2901 if (sc->sc_dying) 2902 return (USBD_IOERROR); 2903 2904 #ifdef DIAGNOSTIC 2905 if (xfer->rqflags & URQ_REQUEST) 2906 panic("ehci_device_bulk_start: a request"); 2907 #endif 2908 2909 len = xfer->length; 2910 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2911 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2912 sqh = epipe->sqh; 2913 2914 epipe->u.bulk.length = len; 2915 2916 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2917 &dataend); 2918 if (err) { 2919 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2920 xfer->status = err; 2921 usb_transfer_complete(xfer); 2922 return (err); 2923 } 2924 2925 #ifdef EHCI_DEBUG 2926 if (ehcidebug > 5) { 2927 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2928 ehci_dump_sqh(sqh); 2929 ehci_dump_sqtds(data); 2930 } 2931 #endif 2932 2933 /* Set up interrupt info. */ 2934 exfer->sqtdstart = data; 2935 exfer->sqtdend = dataend; 2936 #ifdef DIAGNOSTIC 2937 if (!exfer->isdone) { 2938 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2939 } 2940 exfer->isdone = 0; 2941 #endif 2942 2943 s = splusb(); 2944 ehci_set_qh_qtd(sqh, data); 2945 if (xfer->timeout && !sc->sc_bus.use_polling) { 2946 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2947 ehci_timeout, xfer); 2948 } 2949 ehci_add_intr_list(sc, exfer); 2950 xfer->status = USBD_IN_PROGRESS; 2951 splx(s); 2952 2953 #ifdef EHCI_DEBUG 2954 if (ehcidebug > 10) { 2955 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2956 delay(10000); 2957 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2958 ehci_dump_regs(sc); 2959 #if 0 2960 printf("async_head:\n"); 2961 ehci_dump_sqh(sc->sc_async_head); 2962 #endif 2963 printf("sqh:\n"); 2964 ehci_dump_sqh(sqh); 2965 ehci_dump_sqtds(data); 2966 } 2967 #endif 2968 2969 if (sc->sc_bus.use_polling) 2970 ehci_waitintr(sc, xfer); 2971 2972 return (USBD_IN_PROGRESS); 2973 #undef exfer 2974 } 2975 2976 Static void 2977 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2978 { 2979 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2980 ehci_abort_xfer(xfer, USBD_CANCELLED); 2981 } 2982 2983 /* 2984 * Close a device bulk pipe. 2985 */ 2986 Static void 2987 ehci_device_bulk_close(usbd_pipe_handle pipe) 2988 { 2989 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2990 2991 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2992 ehci_close_pipe(pipe, sc->sc_async_head); 2993 } 2994 2995 void 2996 ehci_device_bulk_done(usbd_xfer_handle xfer) 2997 { 2998 struct ehci_xfer *ex = EXFER(xfer); 2999 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3000 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3001 3002 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3003 xfer, xfer->actlen)); 3004 3005 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3006 ehci_del_intr_list(ex); /* remove from active list */ 3007 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3008 } 3009 3010 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3011 } 3012 3013 /************************/ 3014 3015 Static usbd_status 3016 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3017 { 3018 struct ehci_soft_islot *isp; 3019 int islot, lev; 3020 3021 /* Find a poll rate that is large enough. */ 3022 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3023 if (EHCI_ILEV_IVAL(lev) <= ival) 3024 break; 3025 3026 /* Pick an interrupt slot at the right level. */ 3027 /* XXX could do better than picking at random */ 3028 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3029 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3030 3031 sqh->islot = islot; 3032 isp = &sc->sc_islots[islot]; 3033 ehci_add_qh(sqh, isp->sqh); 3034 3035 return (USBD_NORMAL_COMPLETION); 3036 } 3037 3038 Static usbd_status 3039 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3040 { 3041 usbd_status err; 3042 3043 /* Insert last in queue. */ 3044 err = usb_insert_transfer(xfer); 3045 if (err) 3046 return (err); 3047 3048 /* 3049 * Pipe isn't running (otherwise err would be USBD_INPROG), 3050 * so start it first. 3051 */ 3052 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3053 } 3054 3055 Static usbd_status 3056 ehci_device_intr_start(usbd_xfer_handle xfer) 3057 { 3058 #define exfer EXFER(xfer) 3059 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3060 usbd_device_handle dev = xfer->pipe->device; 3061 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3062 ehci_soft_qtd_t *data, *dataend; 3063 ehci_soft_qh_t *sqh; 3064 usbd_status err; 3065 int len, isread, endpt; 3066 int s; 3067 3068 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3069 xfer, xfer->length, xfer->flags)); 3070 3071 if (sc->sc_dying) 3072 return (USBD_IOERROR); 3073 3074 #ifdef DIAGNOSTIC 3075 if (xfer->rqflags & URQ_REQUEST) 3076 panic("ehci_device_intr_start: a request"); 3077 #endif 3078 3079 len = xfer->length; 3080 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3081 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3082 sqh = epipe->sqh; 3083 3084 epipe->u.intr.length = len; 3085 3086 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3087 &dataend); 3088 if (err) { 3089 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3090 xfer->status = err; 3091 usb_transfer_complete(xfer); 3092 return (err); 3093 } 3094 3095 #ifdef EHCI_DEBUG 3096 if (ehcidebug > 5) { 3097 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3098 ehci_dump_sqh(sqh); 3099 ehci_dump_sqtds(data); 3100 } 3101 #endif 3102 3103 /* Set up interrupt info. */ 3104 exfer->sqtdstart = data; 3105 exfer->sqtdend = dataend; 3106 #ifdef DIAGNOSTIC 3107 if (!exfer->isdone) { 3108 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3109 } 3110 exfer->isdone = 0; 3111 #endif 3112 3113 s = splusb(); 3114 ehci_set_qh_qtd(sqh, data); 3115 if (xfer->timeout && !sc->sc_bus.use_polling) { 3116 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3117 ehci_timeout, xfer); 3118 } 3119 ehci_add_intr_list(sc, exfer); 3120 xfer->status = USBD_IN_PROGRESS; 3121 splx(s); 3122 3123 #ifdef EHCI_DEBUG 3124 if (ehcidebug > 10) { 3125 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3126 delay(10000); 3127 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3128 ehci_dump_regs(sc); 3129 printf("sqh:\n"); 3130 ehci_dump_sqh(sqh); 3131 ehci_dump_sqtds(data); 3132 } 3133 #endif 3134 3135 if (sc->sc_bus.use_polling) 3136 ehci_waitintr(sc, xfer); 3137 3138 return (USBD_IN_PROGRESS); 3139 #undef exfer 3140 } 3141 3142 Static void 3143 ehci_device_intr_abort(usbd_xfer_handle xfer) 3144 { 3145 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3146 if (xfer->pipe->intrxfer == xfer) { 3147 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3148 xfer->pipe->intrxfer = NULL; 3149 } 3150 ehci_abort_xfer(xfer, USBD_CANCELLED); 3151 } 3152 3153 Static void 3154 ehci_device_intr_close(usbd_pipe_handle pipe) 3155 { 3156 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3157 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3158 struct ehci_soft_islot *isp; 3159 3160 isp = &sc->sc_islots[epipe->sqh->islot]; 3161 ehci_close_pipe(pipe, isp->sqh); 3162 } 3163 3164 Static void 3165 ehci_device_intr_done(usbd_xfer_handle xfer) 3166 { 3167 #define exfer EXFER(xfer) 3168 struct ehci_xfer *ex = EXFER(xfer); 3169 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3170 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3171 ehci_soft_qtd_t *data, *dataend; 3172 ehci_soft_qh_t *sqh; 3173 usbd_status err; 3174 int len, isread, endpt, s; 3175 3176 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3177 xfer, xfer->actlen)); 3178 3179 if (xfer->pipe->repeat) { 3180 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3181 3182 len = epipe->u.intr.length; 3183 xfer->length = len; 3184 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3185 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3186 sqh = epipe->sqh; 3187 3188 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3189 &data, &dataend); 3190 if (err) { 3191 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3192 xfer->status = err; 3193 return; 3194 } 3195 3196 /* Set up interrupt info. */ 3197 exfer->sqtdstart = data; 3198 exfer->sqtdend = dataend; 3199 #ifdef DIAGNOSTIC 3200 if (!exfer->isdone) { 3201 printf("ehci_device_intr_done: not done, ex=%p\n", 3202 exfer); 3203 } 3204 exfer->isdone = 0; 3205 #endif 3206 3207 s = splusb(); 3208 ehci_set_qh_qtd(sqh, data); 3209 if (xfer->timeout && !sc->sc_bus.use_polling) { 3210 usb_callout(xfer->timeout_handle, 3211 mstohz(xfer->timeout), ehci_timeout, xfer); 3212 } 3213 splx(s); 3214 3215 xfer->status = USBD_IN_PROGRESS; 3216 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3217 ehci_del_intr_list(ex); /* remove from active list */ 3218 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3219 } 3220 #undef exfer 3221 } 3222 3223 /************************/ 3224 3225 Static usbd_status 3226 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3227 { 3228 return USBD_IOERROR; 3229 } 3230 Static usbd_status 3231 ehci_device_isoc_start(usbd_xfer_handle xfer) 3232 { 3233 return USBD_IOERROR; 3234 } 3235 Static void 3236 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3237 { 3238 } 3239 Static void 3240 ehci_device_isoc_close(usbd_pipe_handle pipe) 3241 { 3242 } 3243 Static void 3244 ehci_device_isoc_done(usbd_xfer_handle xfer) 3245 { 3246 } 3247
Indexes created Thu Oct 02 01:09:59 GMT 2025