ehci.c revision 1.123.18.6
1 /* $NetBSD: ehci.c,v 1.123.18.6 2007/11/06 14:27:32 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.18.6 2007/11/06 14:27:32 joerg Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 78 #include <sys/bus.h> 79 #include <machine/endian.h> 80 81 #include <dev/usb/usb.h> 82 #include <dev/usb/usbdi.h> 83 #include <dev/usb/usbdivar.h> 84 #include <dev/usb/usb_mem.h> 85 #include <dev/usb/usb_quirks.h> 86 87 #include <dev/usb/ehcireg.h> 88 #include <dev/usb/ehcivar.h> 89 90 #ifdef EHCI_DEBUG 91 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 92 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 93 int ehcidebug = 0; 94 #ifndef __NetBSD__ 95 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 96 #endif 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 struct ehci_pipe { 103 struct usbd_pipe pipe; 104 int nexttoggle; 105 106 ehci_soft_qh_t *sqh; 107 union { 108 ehci_soft_qtd_t *qtd; 109 /* ehci_soft_itd_t *itd; */ 110 } tail; 111 union { 112 /* Control pipe */ 113 struct { 114 usb_dma_t reqdma; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 u_int length; 120 } intr; 121 /* Bulk pipe */ 122 struct { 123 u_int length; 124 } bulk; 125 /* Iso pipe */ 126 /* XXX */ 127 } u; 128 }; 129 130 Static void ehci_shutdown(void *); 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 189 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 190 Static void ehci_disown(ehci_softc_t *, int, int); 191 192 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 193 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 194 195 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 196 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 197 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 198 ehci_softc_t *, int, int, usbd_xfer_handle, 199 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 200 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 201 ehci_soft_qtd_t *); 202 203 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 204 205 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 206 int ival); 207 208 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 209 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 210 ehci_soft_qh_t *); 211 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 212 Static void ehci_sync_hc(ehci_softc_t *); 213 214 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 215 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 #ifdef EHCI_DEBUG 218 Static void ehci_dump_regs(ehci_softc_t *); 219 void ehci_dump(void); 220 Static ehci_softc_t *theehci; 221 Static void ehci_dump_link(ehci_link_t, int); 222 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 223 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 224 Static void ehci_dump_qtd(ehci_qtd_t *); 225 Static void ehci_dump_sqh(ehci_soft_qh_t *); 226 #ifdef DIAGNOSTIC 227 Static void ehci_dump_exfer(struct ehci_xfer *); 228 #endif 229 #endif 230 231 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 232 233 #define EHCI_INTR_ENDPT 1 234 235 #define ehci_add_intr_list(sc, ex) \ 236 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 237 #define ehci_del_intr_list(ex) \ 238 do { \ 239 LIST_REMOVE((ex), inext); \ 240 (ex)->inext.le_prev = NULL; \ 241 } while (0) 242 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 243 244 Static const struct usbd_bus_methods ehci_bus_methods = { 245 ehci_open, 246 ehci_softintr, 247 ehci_poll, 248 ehci_allocm, 249 ehci_freem, 250 ehci_allocx, 251 ehci_freex, 252 }; 253 254 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 255 ehci_root_ctrl_transfer, 256 ehci_root_ctrl_start, 257 ehci_root_ctrl_abort, 258 ehci_root_ctrl_close, 259 ehci_noop, 260 ehci_root_ctrl_done, 261 }; 262 263 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 264 ehci_root_intr_transfer, 265 ehci_root_intr_start, 266 ehci_root_intr_abort, 267 ehci_root_intr_close, 268 ehci_noop, 269 ehci_root_intr_done, 270 }; 271 272 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 273 ehci_device_ctrl_transfer, 274 ehci_device_ctrl_start, 275 ehci_device_ctrl_abort, 276 ehci_device_ctrl_close, 277 ehci_noop, 278 ehci_device_ctrl_done, 279 }; 280 281 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 282 ehci_device_intr_transfer, 283 ehci_device_intr_start, 284 ehci_device_intr_abort, 285 ehci_device_intr_close, 286 ehci_device_clear_toggle, 287 ehci_device_intr_done, 288 }; 289 290 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 291 ehci_device_bulk_transfer, 292 ehci_device_bulk_start, 293 ehci_device_bulk_abort, 294 ehci_device_bulk_close, 295 ehci_device_clear_toggle, 296 ehci_device_bulk_done, 297 }; 298 299 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 300 ehci_device_isoc_transfer, 301 ehci_device_isoc_start, 302 ehci_device_isoc_abort, 303 ehci_device_isoc_close, 304 ehci_noop, 305 ehci_device_isoc_done, 306 }; 307 308 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 309 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 310 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 311 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 312 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 313 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 314 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 315 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 316 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 317 }; 318 319 usbd_status 320 ehci_init(ehci_softc_t *sc) 321 { 322 u_int32_t vers, sparams, cparams, hcr; 323 u_int i; 324 usbd_status err; 325 ehci_soft_qh_t *sqh; 326 u_int ncomp; 327 328 DPRINTF(("ehci_init: start\n")); 329 #ifdef EHCI_DEBUG 330 theehci = sc; 331 #endif 332 333 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 334 335 vers = EREAD2(sc, EHCI_HCIVERSION); 336 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 337 vers >> 8, vers & 0xff); 338 339 sparams = EREAD4(sc, EHCI_HCSPARAMS); 340 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 341 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 342 ncomp = EHCI_HCS_N_CC(sparams); 343 if (ncomp != sc->sc_ncomp) { 344 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 345 USBDEVNAME(sc->sc_bus.bdev), 346 ncomp, sc->sc_ncomp); 347 #if NOHCI == 0 || NUHCI == 0 348 aprint_error("%s: ohci or uhci probably not configured\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 #endif 351 if (ncomp < sc->sc_ncomp) 352 sc->sc_ncomp = ncomp; 353 } 354 if (sc->sc_ncomp > 0) { 355 aprint_normal("%s: companion controller%s, %d port%s each:", 356 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 357 EHCI_HCS_N_PCC(sparams), 358 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 359 for (i = 0; i < sc->sc_ncomp; i++) 360 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 361 aprint_normal("\n"); 362 } 363 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 364 cparams = EREAD4(sc, EHCI_HCCPARAMS); 365 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 366 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 367 368 if (EHCI_HCC_64BIT(cparams)) { 369 /* MUST clear segment register if 64 bit capable. */ 370 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 371 } 372 373 sc->sc_bus.usbrev = USBREV_2_0; 374 375 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 376 USB_MEM_RESERVE); 377 378 /* Reset the controller */ 379 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 380 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 381 usb_delay_ms(&sc->sc_bus, 1); 382 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 383 for (i = 0; i < 100; i++) { 384 usb_delay_ms(&sc->sc_bus, 1); 385 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 386 if (!hcr) 387 break; 388 } 389 if (hcr) { 390 aprint_error("%s: reset timeout\n", 391 USBDEVNAME(sc->sc_bus.bdev)); 392 return (USBD_IOERROR); 393 } 394 395 /* XXX need proper intr scheduling */ 396 sc->sc_rand = 96; 397 398 /* frame list size at default, read back what we got and use that */ 399 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 400 case 0: sc->sc_flsize = 1024; break; 401 case 1: sc->sc_flsize = 512; break; 402 case 2: sc->sc_flsize = 256; break; 403 case 3: return (USBD_IOERROR); 404 } 405 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 406 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 407 if (err) 408 return (err); 409 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 410 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 411 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 412 413 /* Set up the bus struct. */ 414 sc->sc_bus.methods = &ehci_bus_methods; 415 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 416 417 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 418 419 sc->sc_eintrs = EHCI_NORMAL_INTRS; 420 421 /* 422 * Allocate the interrupt dummy QHs. These are arranged to give poll 423 * intervals that are powers of 2 times 1ms. 424 */ 425 for (i = 0; i < EHCI_INTRQHS; i++) { 426 sqh = ehci_alloc_sqh(sc); 427 if (sqh == NULL) { 428 err = USBD_NOMEM; 429 goto bad1; 430 } 431 sc->sc_islots[i].sqh = sqh; 432 } 433 for (i = 0; i < EHCI_INTRQHS; i++) { 434 sqh = sc->sc_islots[i].sqh; 435 if (i == 0) { 436 /* The last (1ms) QH terminates. */ 437 sqh->qh.qh_link = EHCI_NULL; 438 sqh->next = NULL; 439 } else { 440 /* Otherwise the next QH has half the poll interval */ 441 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 442 sqh->qh.qh_link = htole32(sqh->next->physaddr | 443 EHCI_LINK_QH); 444 } 445 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 446 sqh->qh.qh_curqtd = EHCI_NULL; 447 sqh->next = NULL; 448 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 449 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 451 sqh->sqtd = NULL; 452 } 453 /* Point the frame list at the last level (128ms). */ 454 for (i = 0; i < sc->sc_flsize; i++) { 455 int j; 456 457 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 458 revbits[i & (EHCI_MAX_POLLRATE-1)]; 459 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 460 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 461 i)].sqh->physaddr); 462 } 463 464 /* Allocate dummy QH that starts the async list. */ 465 sqh = ehci_alloc_sqh(sc); 466 if (sqh == NULL) { 467 err = USBD_NOMEM; 468 goto bad1; 469 } 470 /* Fill the QH */ 471 sqh->qh.qh_endp = 472 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 473 sqh->qh.qh_link = 474 htole32(sqh->physaddr | EHCI_LINK_QH); 475 sqh->qh.qh_curqtd = EHCI_NULL; 476 sqh->next = NULL; 477 /* Fill the overlay qTD */ 478 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 479 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 481 sqh->sqtd = NULL; 482 #ifdef EHCI_DEBUG 483 if (ehcidebug) { 484 ehci_dump_sqh(sqh); 485 } 486 #endif 487 488 /* Point to async list */ 489 sc->sc_async_head = sqh; 490 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 491 492 usb_callout_init(sc->sc_tmo_intrlist); 493 494 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 495 496 /* Turn on controller */ 497 EOWRITE4(sc, EHCI_USBCMD, 498 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 499 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 500 EHCI_CMD_ASE | 501 EHCI_CMD_PSE | 502 EHCI_CMD_RS); 503 504 /* Take over port ownership */ 505 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 506 507 for (i = 0; i < 100; i++) { 508 usb_delay_ms(&sc->sc_bus, 1); 509 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 510 if (!hcr) 511 break; 512 } 513 if (hcr) { 514 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 515 return (USBD_IOERROR); 516 } 517 518 /* Enable interrupts */ 519 DPRINTFN(1,("ehci_init: enabling\n")); 520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 521 522 return (USBD_NORMAL_COMPLETION); 523 524 #if 0 525 bad2: 526 ehci_free_sqh(sc, sc->sc_async_head); 527 #endif 528 bad1: 529 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 530 return (err); 531 } 532 533 int 534 ehci_intr(void *v) 535 { 536 ehci_softc_t *sc = v; 537 538 if (sc == NULL || sc->sc_dying || !device_is_active(&sc->sc_bus.bdev)) 539 return (0); 540 541 /* If we get an interrupt while polling, then just ignore it. */ 542 if (sc->sc_bus.use_polling) { 543 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 544 545 if (intrs) 546 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 547 #ifdef DIAGNOSTIC 548 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 549 #endif 550 return (0); 551 } 552 553 return (ehci_intr1(sc)); 554 } 555 556 Static int 557 ehci_intr1(ehci_softc_t *sc) 558 { 559 u_int32_t intrs, eintrs; 560 561 DPRINTFN(20,("ehci_intr1: enter\n")); 562 563 /* In case the interrupt occurs before initialization has completed. */ 564 if (sc == NULL) { 565 #ifdef DIAGNOSTIC 566 printf("ehci_intr1: sc == NULL\n"); 567 #endif 568 return (0); 569 } 570 571 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 572 if (!intrs) 573 return (0); 574 575 eintrs = intrs & sc->sc_eintrs; 576 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 577 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 578 (u_int)eintrs)); 579 if (!eintrs) 580 return (0); 581 582 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 583 sc->sc_bus.intr_context++; 584 sc->sc_bus.no_intrs++; 585 if (eintrs & EHCI_STS_IAA) { 586 DPRINTF(("ehci_intr1: door bell\n")); 587 wakeup(&sc->sc_async_head); 588 eintrs &= ~EHCI_STS_IAA; 589 } 590 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 591 DPRINTFN(5,("ehci_intr1: %s %s\n", 592 eintrs & EHCI_STS_INT ? "INT" : "", 593 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 594 usb_schedsoftintr(&sc->sc_bus); 595 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 596 } 597 if (eintrs & EHCI_STS_HSE) { 598 printf("%s: unrecoverable error, controller halted\n", 599 USBDEVNAME(sc->sc_bus.bdev)); 600 /* XXX what else */ 601 } 602 if (eintrs & EHCI_STS_PCD) { 603 ehci_pcd(sc, sc->sc_intrxfer); 604 eintrs &= ~EHCI_STS_PCD; 605 } 606 607 sc->sc_bus.intr_context--; 608 609 if (eintrs != 0) { 610 /* Block unprocessed interrupts. */ 611 sc->sc_eintrs &= ~eintrs; 612 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 613 printf("%s: blocking intrs 0x%x\n", 614 USBDEVNAME(sc->sc_bus.bdev), eintrs); 615 } 616 617 return (1); 618 } 619 620 621 void 622 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 623 { 624 usbd_pipe_handle pipe; 625 u_char *p; 626 int i, m; 627 628 if (xfer == NULL) { 629 /* Just ignore the change. */ 630 return; 631 } 632 633 pipe = xfer->pipe; 634 635 p = KERNADDR(&xfer->dmabuf, 0); 636 m = min(sc->sc_noport, xfer->length * 8 - 1); 637 memset(p, 0, xfer->length); 638 for (i = 1; i <= m; i++) { 639 /* Pick out CHANGE bits from the status reg. */ 640 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 641 p[i/8] |= 1 << (i%8); 642 } 643 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 644 xfer->actlen = xfer->length; 645 xfer->status = USBD_NORMAL_COMPLETION; 646 647 usb_transfer_complete(xfer); 648 } 649 650 void 651 ehci_softintr(void *v) 652 { 653 ehci_softc_t *sc = v; 654 struct ehci_xfer *ex, *nextex; 655 656 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 657 sc->sc_bus.intr_context)); 658 659 sc->sc_bus.intr_context++; 660 661 /* 662 * The only explanation I can think of for why EHCI is as brain dead 663 * as UHCI interrupt-wise is that Intel was involved in both. 664 * An interrupt just tells us that something is done, we have no 665 * clue what, so we need to scan through all active transfers. :-( 666 */ 667 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 668 nextex = LIST_NEXT(ex, inext); 669 ehci_check_intr(sc, ex); 670 } 671 672 /* Schedule a callout to catch any dropped transactions. */ 673 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 674 !LIST_EMPTY(&sc->sc_intrhead)) 675 usb_callout(sc->sc_tmo_intrlist, hz, 676 ehci_intrlist_timeout, sc); 677 678 #ifdef USB_USE_SOFTINTR 679 if (sc->sc_softwake) { 680 sc->sc_softwake = 0; 681 wakeup(&sc->sc_softwake); 682 } 683 #endif /* USB_USE_SOFTINTR */ 684 685 sc->sc_bus.intr_context--; 686 } 687 688 /* Check for an interrupt. */ 689 void 690 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 691 { 692 ehci_soft_qtd_t *sqtd, *lsqtd; 693 u_int32_t status; 694 695 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 696 697 if (ex->sqtdstart == NULL) { 698 printf("ehci_check_intr: sqtdstart=NULL\n"); 699 return; 700 } 701 lsqtd = ex->sqtdend; 702 #ifdef DIAGNOSTIC 703 if (lsqtd == NULL) { 704 printf("ehci_check_intr: lsqtd==0\n"); 705 return; 706 } 707 #endif 708 /* 709 * If the last TD is still active we need to check whether there 710 * is a an error somewhere in the middle, or whether there was a 711 * short packet (SPD and not ACTIVE). 712 */ 713 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 714 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 715 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 716 status = le32toh(sqtd->qtd.qtd_status); 717 /* If there's an active QTD the xfer isn't done. */ 718 if (status & EHCI_QTD_ACTIVE) 719 break; 720 /* Any kind of error makes the xfer done. */ 721 if (status & EHCI_QTD_HALTED) 722 goto done; 723 /* We want short packets, and it is short: it's done */ 724 if (EHCI_QTD_GET_BYTES(status) != 0) 725 goto done; 726 } 727 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 728 ex, ex->sqtdstart)); 729 return; 730 } 731 done: 732 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 733 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 734 ehci_idone(ex); 735 } 736 737 void 738 ehci_idone(struct ehci_xfer *ex) 739 { 740 usbd_xfer_handle xfer = &ex->xfer; 741 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 742 ehci_soft_qtd_t *sqtd, *lsqtd; 743 u_int32_t status = 0, nstatus = 0; 744 int actlen; 745 746 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 747 #ifdef DIAGNOSTIC 748 { 749 int s = splhigh(); 750 if (ex->isdone) { 751 splx(s); 752 #ifdef EHCI_DEBUG 753 printf("ehci_idone: ex is done!\n "); 754 ehci_dump_exfer(ex); 755 #else 756 printf("ehci_idone: ex=%p is done!\n", ex); 757 #endif 758 return; 759 } 760 ex->isdone = 1; 761 splx(s); 762 } 763 #endif 764 765 if (xfer->status == USBD_CANCELLED || 766 xfer->status == USBD_TIMEOUT) { 767 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 768 return; 769 } 770 771 #ifdef EHCI_DEBUG 772 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 773 if (ehcidebug > 10) 774 ehci_dump_sqtds(ex->sqtdstart); 775 #endif 776 777 /* The transfer is done, compute actual length and status. */ 778 lsqtd = ex->sqtdend; 779 actlen = 0; 780 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 781 nstatus = le32toh(sqtd->qtd.qtd_status); 782 if (nstatus & EHCI_QTD_ACTIVE) 783 break; 784 785 status = nstatus; 786 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 787 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 788 } 789 790 /* 791 * If there are left over TDs we need to update the toggle. 792 * The default pipe doesn't need it since control transfers 793 * start the toggle at 0 every time. 794 * For a short transfer we need to update the toggle for the missing 795 * packets within the qTD. 796 */ 797 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 798 xfer->pipe->device->default_pipe != xfer->pipe) { 799 DPRINTFN(2, ("ehci_idone: need toggle update " 800 "status=%08x nstatus=%08x\n", status, nstatus)); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 809 xfer->length, actlen, status)); 810 xfer->actlen = actlen; 811 if (status & EHCI_QTD_HALTED) { 812 #ifdef EHCI_DEBUG 813 char sbuf[128]; 814 815 bitmask_snprintf((u_int32_t)status, 816 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 817 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 818 819 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 820 "status 0x%s\n", 821 xfer->pipe->device->address, 822 xfer->pipe->endpoint->edesc->bEndpointAddress, 823 sbuf)); 824 if (ehcidebug > 2) { 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 } 828 #endif 829 /* low&full speed has an extra error flag */ 830 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 831 EHCI_QH_SPEED_HIGH) 832 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 833 else 834 status &= EHCI_QTD_STATERRS; 835 if (status == 0) /* no other errors means a stall */ 836 xfer->status = USBD_STALLED; 837 else 838 xfer->status = USBD_IOERROR; /* more info XXX */ 839 /* XXX need to reset TT on missed microframe */ 840 if (status & EHCI_QTD_MISSEDMICRO) { 841 ehci_softc_t *sc = (ehci_softc_t *) 842 xfer->pipe->device->bus; 843 844 printf("%s: missed microframe, TT reset not " 845 "implemented, hub might be inoperational\n", 846 USBDEVNAME(sc->sc_bus.bdev)); 847 } 848 } else { 849 xfer->status = USBD_NORMAL_COMPLETION; 850 } 851 852 usb_transfer_complete(xfer); 853 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 854 } 855 856 /* 857 * Wait here until controller claims to have an interrupt. 858 * Then call ehci_intr and return. Use timeout to avoid waiting 859 * too long. 860 */ 861 void 862 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 863 { 864 int timo; 865 u_int32_t intrs; 866 867 xfer->status = USBD_IN_PROGRESS; 868 for (timo = xfer->timeout; timo >= 0; timo--) { 869 usb_delay_ms(&sc->sc_bus, 1); 870 if (sc->sc_dying) 871 break; 872 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 873 sc->sc_eintrs; 874 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 875 #ifdef EHCI_DEBUG 876 if (ehcidebug > 15) 877 ehci_dump_regs(sc); 878 #endif 879 if (intrs) { 880 ehci_intr1(sc); 881 if (xfer->status != USBD_IN_PROGRESS) 882 return; 883 } 884 } 885 886 /* Timeout */ 887 DPRINTF(("ehci_waitintr: timeout\n")); 888 xfer->status = USBD_TIMEOUT; 889 usb_transfer_complete(xfer); 890 /* XXX should free TD */ 891 } 892 893 void 894 ehci_poll(struct usbd_bus *bus) 895 { 896 ehci_softc_t *sc = (ehci_softc_t *)bus; 897 #ifdef EHCI_DEBUG 898 static int last; 899 int new; 900 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 901 if (new != last) { 902 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 903 last = new; 904 } 905 #endif 906 907 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 908 ehci_intr1(sc); 909 } 910 911 int 912 ehci_detach(struct ehci_softc *sc, int flags) 913 { 914 int rv = 0; 915 916 if (sc->sc_child != NULL) 917 rv = config_detach(sc->sc_child, flags); 918 919 if (rv != 0) 920 return (rv); 921 922 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 923 924 if (sc->sc_shutdownhook != NULL) 925 shutdownhook_disestablish(sc->sc_shutdownhook); 926 927 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 928 929 /* XXX free other data structures XXX */ 930 931 return (rv); 932 } 933 934 935 int 936 ehci_activate(device_ptr_t self, enum devact act) 937 { 938 struct ehci_softc *sc = (struct ehci_softc *)self; 939 int rv = 0; 940 941 switch (act) { 942 case DVACT_ACTIVATE: 943 return (EOPNOTSUPP); 944 945 case DVACT_DEACTIVATE: 946 sc->sc_dying = 1; 947 if (sc->sc_child != NULL) 948 rv = config_deactivate(sc->sc_child); 949 break; 950 } 951 return (rv); 952 } 953 954 /* 955 * Handle suspend/resume. 956 * 957 * We need to switch to polling mode here, because this routine is 958 * called from an interrupt context. This is all right since we 959 * are almost suspended anyway. 960 * 961 * Note that this power handler isn't to be registered directly; the 962 * bus glue needs to call out to it. 963 */ 964 bool 965 ehci_suspend(device_t dv) 966 { 967 ehci_softc_t *sc = (ehci_softc_t *)dv; 968 int i, s; 969 uint32_t cmd, hcr; 970 971 s = splhardusb(); 972 973 sc->sc_bus.use_polling++; 974 975 for (i = 1; i <= sc->sc_noport; i++) { 976 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 977 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 978 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 979 } 980 981 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 982 983 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 984 EOWRITE4(sc, EHCI_USBCMD, cmd); 985 986 for (i = 0; i < 100; i++) { 987 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 988 if (hcr == 0) 989 break; 990 991 usb_delay_ms(&sc->sc_bus, 1); 992 } 993 if (hcr != 0) 994 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 995 996 cmd &= ~EHCI_CMD_RS; 997 EOWRITE4(sc, EHCI_USBCMD, cmd); 998 999 for (i = 0; i < 100; i++) { 1000 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1001 if (hcr == EHCI_STS_HCH) 1002 break; 1003 1004 usb_delay_ms(&sc->sc_bus, 1); 1005 } 1006 if (hcr != EHCI_STS_HCH) 1007 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1008 1009 sc->sc_bus.use_polling--; 1010 splx(s); 1011 1012 return true; 1013 } 1014 1015 bool 1016 ehci_resume(device_t dv) 1017 { 1018 ehci_softc_t *sc = (ehci_softc_t *)dv; 1019 int i, s; 1020 uint32_t cmd, hcr; 1021 1022 s = splhardusb(); 1023 1024 sc->sc_bus.use_polling++; 1025 1026 /* restore things in case the bios sucks */ 1027 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1028 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1029 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1030 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1031 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1032 1033 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1034 1035 hcr = 0; 1036 for (i = 1; i <= sc->sc_noport; i++) { 1037 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1038 if ((cmd & EHCI_PS_PO) == 0 && 1039 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1040 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1041 hcr = 1; 1042 } 1043 } 1044 1045 if (hcr) { 1046 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1047 1048 for (i = 1; i <= sc->sc_noport; i++) { 1049 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1050 if ((cmd & EHCI_PS_PO) == 0 && 1051 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1052 EOWRITE4(sc, EHCI_PORTSC(i), 1053 cmd & ~EHCI_PS_FPR); 1054 } 1055 } 1056 1057 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1058 1059 for (i = 0; i < 100; i++) { 1060 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1061 if (hcr != EHCI_STS_HCH) 1062 break; 1063 1064 usb_delay_ms(&sc->sc_bus, 1); 1065 } 1066 if (hcr == EHCI_STS_HCH) 1067 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1068 1069 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1070 1071 sc->sc_bus.use_polling--; 1072 1073 splx(s); 1074 1075 return true; 1076 } 1077 1078 /* 1079 * Shut down the controller when the system is going down. 1080 */ 1081 void 1082 ehci_shutdown(void *v) 1083 { 1084 ehci_softc_t *sc = v; 1085 1086 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1087 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1088 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1089 } 1090 1091 usbd_status 1092 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1093 { 1094 struct ehci_softc *sc = (struct ehci_softc *)bus; 1095 usbd_status err; 1096 1097 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1098 if (err == USBD_NOMEM) 1099 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1100 #ifdef EHCI_DEBUG 1101 if (err) 1102 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1103 #endif 1104 return (err); 1105 } 1106 1107 void 1108 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1109 { 1110 struct ehci_softc *sc = (struct ehci_softc *)bus; 1111 1112 if (dma->block->flags & USB_DMA_RESERVE) { 1113 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1114 dma); 1115 return; 1116 } 1117 usb_freemem(&sc->sc_bus, dma); 1118 } 1119 1120 usbd_xfer_handle 1121 ehci_allocx(struct usbd_bus *bus) 1122 { 1123 struct ehci_softc *sc = (struct ehci_softc *)bus; 1124 usbd_xfer_handle xfer; 1125 1126 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1127 if (xfer != NULL) { 1128 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1129 #ifdef DIAGNOSTIC 1130 if (xfer->busy_free != XFER_FREE) { 1131 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1132 xfer->busy_free); 1133 } 1134 #endif 1135 } else { 1136 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1137 } 1138 if (xfer != NULL) { 1139 memset(xfer, 0, sizeof(struct ehci_xfer)); 1140 #ifdef DIAGNOSTIC 1141 EXFER(xfer)->isdone = 1; 1142 xfer->busy_free = XFER_BUSY; 1143 #endif 1144 } 1145 return (xfer); 1146 } 1147 1148 void 1149 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1150 { 1151 struct ehci_softc *sc = (struct ehci_softc *)bus; 1152 1153 #ifdef DIAGNOSTIC 1154 if (xfer->busy_free != XFER_BUSY) { 1155 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1156 xfer->busy_free); 1157 } 1158 xfer->busy_free = XFER_FREE; 1159 if (!EXFER(xfer)->isdone) { 1160 printf("ehci_freex: !isdone\n"); 1161 } 1162 #endif 1163 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1164 } 1165 1166 Static void 1167 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1168 { 1169 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1170 1171 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1172 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1173 #ifdef USB_DEBUG 1174 if (ehcidebug) 1175 usbd_dump_pipe(pipe); 1176 #endif 1177 epipe->nexttoggle = 0; 1178 } 1179 1180 Static void 1181 ehci_noop(usbd_pipe_handle pipe) 1182 { 1183 } 1184 1185 #ifdef EHCI_DEBUG 1186 void 1187 ehci_dump_regs(ehci_softc_t *sc) 1188 { 1189 int i; 1190 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1191 EOREAD4(sc, EHCI_USBCMD), 1192 EOREAD4(sc, EHCI_USBSTS), 1193 EOREAD4(sc, EHCI_USBINTR)); 1194 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1195 EOREAD4(sc, EHCI_FRINDEX), 1196 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1197 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1198 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1199 for (i = 1; i <= sc->sc_noport; i++) 1200 printf("port %d status=0x%08x\n", i, 1201 EOREAD4(sc, EHCI_PORTSC(i))); 1202 } 1203 1204 /* 1205 * Unused function - this is meant to be called from a kernel 1206 * debugger. 1207 */ 1208 void 1209 ehci_dump() 1210 { 1211 ehci_dump_regs(theehci); 1212 } 1213 1214 void 1215 ehci_dump_link(ehci_link_t link, int type) 1216 { 1217 link = le32toh(link); 1218 printf("0x%08x", link); 1219 if (link & EHCI_LINK_TERMINATE) 1220 printf("<T>"); 1221 else { 1222 printf("<"); 1223 if (type) { 1224 switch (EHCI_LINK_TYPE(link)) { 1225 case EHCI_LINK_ITD: printf("ITD"); break; 1226 case EHCI_LINK_QH: printf("QH"); break; 1227 case EHCI_LINK_SITD: printf("SITD"); break; 1228 case EHCI_LINK_FSTN: printf("FSTN"); break; 1229 } 1230 } 1231 printf(">"); 1232 } 1233 } 1234 1235 void 1236 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1237 { 1238 int i; 1239 u_int32_t stop; 1240 1241 stop = 0; 1242 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1243 ehci_dump_sqtd(sqtd); 1244 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1245 } 1246 if (sqtd) 1247 printf("dump aborted, too many TDs\n"); 1248 } 1249 1250 void 1251 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1252 { 1253 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1254 ehci_dump_qtd(&sqtd->qtd); 1255 } 1256 1257 void 1258 ehci_dump_qtd(ehci_qtd_t *qtd) 1259 { 1260 u_int32_t s; 1261 char sbuf[128]; 1262 1263 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1264 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1265 printf("\n"); 1266 s = le32toh(qtd->qtd_status); 1267 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1268 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1269 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1270 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1271 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1272 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1273 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1274 EHCI_QTD_GET_PID(s), sbuf); 1275 for (s = 0; s < 5; s++) 1276 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1277 } 1278 1279 void 1280 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1281 { 1282 ehci_qh_t *qh = &sqh->qh; 1283 u_int32_t endp, endphub; 1284 1285 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1286 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1287 endp = le32toh(qh->qh_endp); 1288 printf(" endp=0x%08x\n", endp); 1289 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1290 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1291 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1292 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1293 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1294 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1295 EHCI_QH_GET_NRL(endp)); 1296 endphub = le32toh(qh->qh_endphub); 1297 printf(" endphub=0x%08x\n", endphub); 1298 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1299 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1300 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1301 EHCI_QH_GET_MULT(endphub)); 1302 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1303 printf("Overlay qTD:\n"); 1304 ehci_dump_qtd(&qh->qh_qtd); 1305 } 1306 1307 #ifdef DIAGNOSTIC 1308 Static void 1309 ehci_dump_exfer(struct ehci_xfer *ex) 1310 { 1311 printf("ehci_dump_exfer: ex=%p\n", ex); 1312 } 1313 #endif 1314 #endif 1315 1316 usbd_status 1317 ehci_open(usbd_pipe_handle pipe) 1318 { 1319 usbd_device_handle dev = pipe->device; 1320 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1321 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1322 u_int8_t addr = dev->address; 1323 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1324 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1325 ehci_soft_qh_t *sqh; 1326 usbd_status err; 1327 int s; 1328 int ival, speed, naks; 1329 int hshubaddr, hshubport; 1330 1331 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1332 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1333 1334 if (dev->myhsport) { 1335 hshubaddr = dev->myhsport->parent->address; 1336 hshubport = dev->myhsport->portno; 1337 } else { 1338 hshubaddr = 0; 1339 hshubport = 0; 1340 } 1341 1342 if (sc->sc_dying) 1343 return (USBD_IOERROR); 1344 1345 epipe->nexttoggle = 0; 1346 1347 if (addr == sc->sc_addr) { 1348 switch (ed->bEndpointAddress) { 1349 case USB_CONTROL_ENDPOINT: 1350 pipe->methods = &ehci_root_ctrl_methods; 1351 break; 1352 case UE_DIR_IN | EHCI_INTR_ENDPT: 1353 pipe->methods = &ehci_root_intr_methods; 1354 break; 1355 default: 1356 return (USBD_INVAL); 1357 } 1358 return (USBD_NORMAL_COMPLETION); 1359 } 1360 1361 /* XXX All this stuff is only valid for async. */ 1362 switch (dev->speed) { 1363 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1364 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1365 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1366 default: panic("ehci_open: bad device speed %d", dev->speed); 1367 } 1368 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1369 printf("%s: *** WARNING: opening low/full speed isoc device, " 1370 "this does not work yet.\n", 1371 USBDEVNAME(sc->sc_bus.bdev)); 1372 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1373 hshubaddr, hshubport)); 1374 return USBD_INVAL; 1375 } 1376 1377 naks = 8; /* XXX */ 1378 sqh = ehci_alloc_sqh(sc); 1379 if (sqh == NULL) 1380 return (USBD_NOMEM); 1381 /* qh_link filled when the QH is added */ 1382 sqh->qh.qh_endp = htole32( 1383 EHCI_QH_SET_ADDR(addr) | 1384 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1385 EHCI_QH_SET_EPS(speed) | 1386 EHCI_QH_DTC | 1387 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1388 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1389 EHCI_QH_CTL : 0) | 1390 EHCI_QH_SET_NRL(naks) 1391 ); 1392 sqh->qh.qh_endphub = htole32( 1393 EHCI_QH_SET_MULT(1) | 1394 EHCI_QH_SET_HUBA(hshubaddr) | 1395 EHCI_QH_SET_PORT(hshubport) | 1396 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1397 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1398 ); 1399 sqh->qh.qh_curqtd = EHCI_NULL; 1400 /* Fill the overlay qTD */ 1401 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1402 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1403 sqh->qh.qh_qtd.qtd_status = htole32(0); 1404 1405 epipe->sqh = sqh; 1406 1407 switch (xfertype) { 1408 case UE_CONTROL: 1409 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1410 0, &epipe->u.ctl.reqdma); 1411 #ifdef EHCI_DEBUG 1412 if (err) 1413 printf("ehci_open: usb_allocmem()=%d\n", err); 1414 #endif 1415 if (err) 1416 goto bad; 1417 pipe->methods = &ehci_device_ctrl_methods; 1418 s = splusb(); 1419 ehci_add_qh(sqh, sc->sc_async_head); 1420 splx(s); 1421 break; 1422 case UE_BULK: 1423 pipe->methods = &ehci_device_bulk_methods; 1424 s = splusb(); 1425 ehci_add_qh(sqh, sc->sc_async_head); 1426 splx(s); 1427 break; 1428 case UE_INTERRUPT: 1429 pipe->methods = &ehci_device_intr_methods; 1430 ival = pipe->interval; 1431 if (ival == USBD_DEFAULT_INTERVAL) { 1432 if (speed == EHCI_QH_SPEED_HIGH) { 1433 if (ed->bInterval > 16) { 1434 /* 1435 * illegal with high-speed, but there 1436 * were documentation bugs in the spec, 1437 * so be generous 1438 */ 1439 ival = 256; 1440 } else 1441 ival = (1 << (ed->bInterval - 1)) / 8; 1442 } else 1443 ival = ed->bInterval; 1444 } 1445 err = ehci_device_setintr(sc, sqh, ival); 1446 if (err) 1447 goto bad; 1448 break; 1449 case UE_ISOCHRONOUS: 1450 pipe->methods = &ehci_device_isoc_methods; 1451 /* FALLTHROUGH */ 1452 default: 1453 err = USBD_INVAL; 1454 goto bad; 1455 } 1456 return (USBD_NORMAL_COMPLETION); 1457 1458 bad: 1459 ehci_free_sqh(sc, sqh); 1460 return (err); 1461 } 1462 1463 /* 1464 * Add an ED to the schedule. Called at splusb(). 1465 */ 1466 void 1467 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1468 { 1469 SPLUSBCHECK; 1470 1471 sqh->next = head->next; 1472 sqh->qh.qh_link = head->qh.qh_link; 1473 head->next = sqh; 1474 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1475 1476 #ifdef EHCI_DEBUG 1477 if (ehcidebug > 5) { 1478 printf("ehci_add_qh:\n"); 1479 ehci_dump_sqh(sqh); 1480 } 1481 #endif 1482 } 1483 1484 /* 1485 * Remove an ED from the schedule. Called at splusb(). 1486 */ 1487 void 1488 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1489 { 1490 ehci_soft_qh_t *p; 1491 1492 SPLUSBCHECK; 1493 /* XXX */ 1494 for (p = head; p != NULL && p->next != sqh; p = p->next) 1495 ; 1496 if (p == NULL) 1497 panic("ehci_rem_qh: ED not found"); 1498 p->next = sqh->next; 1499 p->qh.qh_link = sqh->qh.qh_link; 1500 1501 ehci_sync_hc(sc); 1502 } 1503 1504 void 1505 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1506 { 1507 int i; 1508 u_int32_t status; 1509 1510 /* Save toggle bit and ping status. */ 1511 status = sqh->qh.qh_qtd.qtd_status & 1512 htole32(EHCI_QTD_TOGGLE_MASK | 1513 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1514 /* Set HALTED to make hw leave it alone. */ 1515 sqh->qh.qh_qtd.qtd_status = 1516 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1517 sqh->qh.qh_curqtd = 0; 1518 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1519 sqh->qh.qh_qtd.qtd_altnext = 0; 1520 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1521 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1522 sqh->sqtd = sqtd; 1523 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1524 sqh->qh.qh_qtd.qtd_status = status; 1525 } 1526 1527 /* 1528 * Ensure that the HC has released all references to the QH. We do this 1529 * by asking for a Async Advance Doorbell interrupt and then we wait for 1530 * the interrupt. 1531 * To make this easier we first obtain exclusive use of the doorbell. 1532 */ 1533 void 1534 ehci_sync_hc(ehci_softc_t *sc) 1535 { 1536 int s, error; 1537 1538 if (sc->sc_dying) { 1539 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1540 return; 1541 } 1542 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1543 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1544 s = splhardusb(); 1545 /* ask for doorbell */ 1546 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1547 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1548 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1549 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1550 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1551 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1552 splx(s); 1553 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1554 #ifdef DIAGNOSTIC 1555 if (error) 1556 printf("ehci_sync_hc: tsleep() = %d\n", error); 1557 #endif 1558 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1559 } 1560 1561 /***********/ 1562 1563 /* 1564 * Data structures and routines to emulate the root hub. 1565 */ 1566 Static usb_device_descriptor_t ehci_devd = { 1567 USB_DEVICE_DESCRIPTOR_SIZE, 1568 UDESC_DEVICE, /* type */ 1569 {0x00, 0x02}, /* USB version */ 1570 UDCLASS_HUB, /* class */ 1571 UDSUBCLASS_HUB, /* subclass */ 1572 UDPROTO_HSHUBSTT, /* protocol */ 1573 64, /* max packet */ 1574 {0},{0},{0x00,0x01}, /* device id */ 1575 1,2,0, /* string indicies */ 1576 1 /* # of configurations */ 1577 }; 1578 1579 Static const usb_device_qualifier_t ehci_odevd = { 1580 USB_DEVICE_DESCRIPTOR_SIZE, 1581 UDESC_DEVICE_QUALIFIER, /* type */ 1582 {0x00, 0x02}, /* USB version */ 1583 UDCLASS_HUB, /* class */ 1584 UDSUBCLASS_HUB, /* subclass */ 1585 UDPROTO_FSHUB, /* protocol */ 1586 64, /* max packet */ 1587 1, /* # of configurations */ 1588 0 1589 }; 1590 1591 Static const usb_config_descriptor_t ehci_confd = { 1592 USB_CONFIG_DESCRIPTOR_SIZE, 1593 UDESC_CONFIG, 1594 {USB_CONFIG_DESCRIPTOR_SIZE + 1595 USB_INTERFACE_DESCRIPTOR_SIZE + 1596 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1597 1, 1598 1, 1599 0, 1600 UC_ATTR_MBO | UC_SELF_POWERED, 1601 0 /* max power */ 1602 }; 1603 1604 Static const usb_interface_descriptor_t ehci_ifcd = { 1605 USB_INTERFACE_DESCRIPTOR_SIZE, 1606 UDESC_INTERFACE, 1607 0, 1608 0, 1609 1, 1610 UICLASS_HUB, 1611 UISUBCLASS_HUB, 1612 UIPROTO_HSHUBSTT, 1613 0 1614 }; 1615 1616 Static const usb_endpoint_descriptor_t ehci_endpd = { 1617 USB_ENDPOINT_DESCRIPTOR_SIZE, 1618 UDESC_ENDPOINT, 1619 UE_DIR_IN | EHCI_INTR_ENDPT, 1620 UE_INTERRUPT, 1621 {8, 0}, /* max packet */ 1622 12 1623 }; 1624 1625 Static const usb_hub_descriptor_t ehci_hubd = { 1626 USB_HUB_DESCRIPTOR_SIZE, 1627 UDESC_HUB, 1628 0, 1629 {0,0}, 1630 0, 1631 0, 1632 {""}, 1633 {""}, 1634 }; 1635 1636 Static int 1637 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1638 { 1639 int i; 1640 1641 if (l == 0) 1642 return (0); 1643 p->bLength = 2 * strlen(s) + 2; 1644 if (l == 1) 1645 return (1); 1646 p->bDescriptorType = UDESC_STRING; 1647 l -= 2; 1648 for (i = 0; s[i] && l > 1; i++, l -= 2) 1649 USETW2(p->bString[i], 0, s[i]); 1650 return (2*i+2); 1651 } 1652 1653 /* 1654 * Simulate a hardware hub by handling all the necessary requests. 1655 */ 1656 Static usbd_status 1657 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1658 { 1659 usbd_status err; 1660 1661 /* Insert last in queue. */ 1662 err = usb_insert_transfer(xfer); 1663 if (err) 1664 return (err); 1665 1666 /* Pipe isn't running, start first */ 1667 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1668 } 1669 1670 Static usbd_status 1671 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1672 { 1673 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1674 usb_device_request_t *req; 1675 void *buf = NULL; 1676 int port, i; 1677 int s, len, value, index, l, totlen = 0; 1678 usb_port_status_t ps; 1679 usb_hub_descriptor_t hubd; 1680 usbd_status err; 1681 u_int32_t v; 1682 1683 if (sc->sc_dying) 1684 return (USBD_IOERROR); 1685 1686 #ifdef DIAGNOSTIC 1687 if (!(xfer->rqflags & URQ_REQUEST)) 1688 /* XXX panic */ 1689 return (USBD_INVAL); 1690 #endif 1691 req = &xfer->request; 1692 1693 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1694 req->bmRequestType, req->bRequest)); 1695 1696 len = UGETW(req->wLength); 1697 value = UGETW(req->wValue); 1698 index = UGETW(req->wIndex); 1699 1700 if (len != 0) 1701 buf = KERNADDR(&xfer->dmabuf, 0); 1702 1703 #define C(x,y) ((x) | ((y) << 8)) 1704 switch(C(req->bRequest, req->bmRequestType)) { 1705 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1706 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1707 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1708 /* 1709 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1710 * for the integrated root hub. 1711 */ 1712 break; 1713 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1714 if (len > 0) { 1715 *(u_int8_t *)buf = sc->sc_conf; 1716 totlen = 1; 1717 } 1718 break; 1719 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1720 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1721 if (len == 0) 1722 break; 1723 switch(value >> 8) { 1724 case UDESC_DEVICE: 1725 if ((value & 0xff) != 0) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1730 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1731 memcpy(buf, &ehci_devd, l); 1732 break; 1733 /* 1734 * We can't really operate at another speed, but the spec says 1735 * we need this descriptor. 1736 */ 1737 case UDESC_DEVICE_QUALIFIER: 1738 if ((value & 0xff) != 0) { 1739 err = USBD_IOERROR; 1740 goto ret; 1741 } 1742 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1743 memcpy(buf, &ehci_odevd, l); 1744 break; 1745 /* 1746 * We can't really operate at another speed, but the spec says 1747 * we need this descriptor. 1748 */ 1749 case UDESC_OTHER_SPEED_CONFIGURATION: 1750 case UDESC_CONFIG: 1751 if ((value & 0xff) != 0) { 1752 err = USBD_IOERROR; 1753 goto ret; 1754 } 1755 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1756 memcpy(buf, &ehci_confd, l); 1757 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1758 value >> 8; 1759 buf = (char *)buf + l; 1760 len -= l; 1761 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1762 totlen += l; 1763 memcpy(buf, &ehci_ifcd, l); 1764 buf = (char *)buf + l; 1765 len -= l; 1766 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1767 totlen += l; 1768 memcpy(buf, &ehci_endpd, l); 1769 break; 1770 case UDESC_STRING: 1771 *(u_int8_t *)buf = 0; 1772 totlen = 1; 1773 switch (value & 0xff) { 1774 case 0: /* Language table */ 1775 if (len > 0) 1776 *(u_int8_t *)buf = 4; 1777 if (len >= 4) { 1778 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1779 totlen = 4; 1780 } 1781 break; 1782 case 1: /* Vendor */ 1783 totlen = ehci_str(buf, len, sc->sc_vendor); 1784 break; 1785 case 2: /* Product */ 1786 totlen = ehci_str(buf, len, "EHCI root hub"); 1787 break; 1788 } 1789 break; 1790 default: 1791 err = USBD_IOERROR; 1792 goto ret; 1793 } 1794 break; 1795 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1796 if (len > 0) { 1797 *(u_int8_t *)buf = 0; 1798 totlen = 1; 1799 } 1800 break; 1801 case C(UR_GET_STATUS, UT_READ_DEVICE): 1802 if (len > 1) { 1803 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1804 totlen = 2; 1805 } 1806 break; 1807 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1808 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1809 if (len > 1) { 1810 USETW(((usb_status_t *)buf)->wStatus, 0); 1811 totlen = 2; 1812 } 1813 break; 1814 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1815 if (value >= USB_MAX_DEVICES) { 1816 err = USBD_IOERROR; 1817 goto ret; 1818 } 1819 sc->sc_addr = value; 1820 break; 1821 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1822 if (value != 0 && value != 1) { 1823 err = USBD_IOERROR; 1824 goto ret; 1825 } 1826 sc->sc_conf = value; 1827 break; 1828 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1829 break; 1830 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1831 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1832 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1833 err = USBD_IOERROR; 1834 goto ret; 1835 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1836 break; 1837 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1838 break; 1839 /* Hub requests */ 1840 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1841 break; 1842 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1843 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1844 "port=%d feature=%d\n", 1845 index, value)); 1846 if (index < 1 || index > sc->sc_noport) { 1847 err = USBD_IOERROR; 1848 goto ret; 1849 } 1850 port = EHCI_PORTSC(index); 1851 v = EOREAD4(sc, port); 1852 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1853 v &= ~EHCI_PS_CLEAR; 1854 switch(value) { 1855 case UHF_PORT_ENABLE: 1856 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1857 break; 1858 case UHF_PORT_SUSPEND: 1859 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1860 break; 1861 case UHF_PORT_POWER: 1862 if (sc->sc_hasppc) 1863 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1864 break; 1865 case UHF_PORT_TEST: 1866 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1867 "%d\n", index)); 1868 break; 1869 case UHF_PORT_INDICATOR: 1870 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1871 "%d\n", index)); 1872 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1873 break; 1874 case UHF_C_PORT_CONNECTION: 1875 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1876 break; 1877 case UHF_C_PORT_ENABLE: 1878 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1879 break; 1880 case UHF_C_PORT_SUSPEND: 1881 /* how? */ 1882 break; 1883 case UHF_C_PORT_OVER_CURRENT: 1884 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1885 break; 1886 case UHF_C_PORT_RESET: 1887 sc->sc_isreset[index] = 0; 1888 break; 1889 default: 1890 err = USBD_IOERROR; 1891 goto ret; 1892 } 1893 #if 0 1894 switch(value) { 1895 case UHF_C_PORT_CONNECTION: 1896 case UHF_C_PORT_ENABLE: 1897 case UHF_C_PORT_SUSPEND: 1898 case UHF_C_PORT_OVER_CURRENT: 1899 case UHF_C_PORT_RESET: 1900 default: 1901 break; 1902 } 1903 #endif 1904 break; 1905 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1906 if (len == 0) 1907 break; 1908 if ((value & 0xff) != 0) { 1909 err = USBD_IOERROR; 1910 goto ret; 1911 } 1912 hubd = ehci_hubd; 1913 hubd.bNbrPorts = sc->sc_noport; 1914 v = EOREAD4(sc, EHCI_HCSPARAMS); 1915 USETW(hubd.wHubCharacteristics, 1916 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1917 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1918 ? UHD_PORT_IND : 0); 1919 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1920 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1921 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1922 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1923 l = min(len, hubd.bDescLength); 1924 totlen = l; 1925 memcpy(buf, &hubd, l); 1926 break; 1927 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1928 if (len != 4) { 1929 err = USBD_IOERROR; 1930 goto ret; 1931 } 1932 memset(buf, 0, len); /* ? XXX */ 1933 totlen = len; 1934 break; 1935 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1936 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1937 index)); 1938 if (index < 1 || index > sc->sc_noport) { 1939 err = USBD_IOERROR; 1940 goto ret; 1941 } 1942 if (len != 4) { 1943 err = USBD_IOERROR; 1944 goto ret; 1945 } 1946 v = EOREAD4(sc, EHCI_PORTSC(index)); 1947 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1948 v)); 1949 i = UPS_HIGH_SPEED; 1950 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1951 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1952 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1953 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1954 if (v & EHCI_PS_PR) i |= UPS_RESET; 1955 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1956 USETW(ps.wPortStatus, i); 1957 i = 0; 1958 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1959 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1960 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1961 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1962 USETW(ps.wPortChange, i); 1963 l = min(len, sizeof ps); 1964 memcpy(buf, &ps, l); 1965 totlen = l; 1966 break; 1967 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1968 err = USBD_IOERROR; 1969 goto ret; 1970 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1971 break; 1972 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1973 if (index < 1 || index > sc->sc_noport) { 1974 err = USBD_IOERROR; 1975 goto ret; 1976 } 1977 port = EHCI_PORTSC(index); 1978 v = EOREAD4(sc, port); 1979 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1980 v &= ~EHCI_PS_CLEAR; 1981 switch(value) { 1982 case UHF_PORT_ENABLE: 1983 EOWRITE4(sc, port, v | EHCI_PS_PE); 1984 break; 1985 case UHF_PORT_SUSPEND: 1986 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1987 break; 1988 case UHF_PORT_RESET: 1989 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1990 index)); 1991 if (EHCI_PS_IS_LOWSPEED(v)) { 1992 /* Low speed device, give up ownership. */ 1993 ehci_disown(sc, index, 1); 1994 break; 1995 } 1996 /* Start reset sequence. */ 1997 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1998 EOWRITE4(sc, port, v | EHCI_PS_PR); 1999 /* Wait for reset to complete. */ 2000 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2001 if (sc->sc_dying) { 2002 err = USBD_IOERROR; 2003 goto ret; 2004 } 2005 /* Terminate reset sequence. */ 2006 EOWRITE4(sc, port, v); 2007 /* Wait for HC to complete reset. */ 2008 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2009 if (sc->sc_dying) { 2010 err = USBD_IOERROR; 2011 goto ret; 2012 } 2013 v = EOREAD4(sc, port); 2014 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2015 if (v & EHCI_PS_PR) { 2016 printf("%s: port reset timeout\n", 2017 USBDEVNAME(sc->sc_bus.bdev)); 2018 return (USBD_TIMEOUT); 2019 } 2020 if (!(v & EHCI_PS_PE)) { 2021 /* Not a high speed device, give up ownership.*/ 2022 ehci_disown(sc, index, 0); 2023 break; 2024 } 2025 sc->sc_isreset[index] = 1; 2026 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2027 index, v)); 2028 break; 2029 case UHF_PORT_POWER: 2030 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2031 "%d (has PPC = %d)\n", index, 2032 sc->sc_hasppc)); 2033 if (sc->sc_hasppc) 2034 EOWRITE4(sc, port, v | EHCI_PS_PP); 2035 break; 2036 case UHF_PORT_TEST: 2037 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2038 "%d\n", index)); 2039 break; 2040 case UHF_PORT_INDICATOR: 2041 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2042 "%d\n", index)); 2043 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2044 break; 2045 default: 2046 err = USBD_IOERROR; 2047 goto ret; 2048 } 2049 break; 2050 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2051 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2052 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2053 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2054 break; 2055 default: 2056 err = USBD_IOERROR; 2057 goto ret; 2058 } 2059 xfer->actlen = totlen; 2060 err = USBD_NORMAL_COMPLETION; 2061 ret: 2062 xfer->status = err; 2063 s = splusb(); 2064 usb_transfer_complete(xfer); 2065 splx(s); 2066 return (USBD_IN_PROGRESS); 2067 } 2068 2069 void 2070 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2071 { 2072 int port; 2073 u_int32_t v; 2074 2075 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2076 #ifdef DIAGNOSTIC 2077 if (sc->sc_npcomp != 0) { 2078 int i = (index-1) / sc->sc_npcomp; 2079 if (i >= sc->sc_ncomp) 2080 printf("%s: strange port\n", 2081 USBDEVNAME(sc->sc_bus.bdev)); 2082 else 2083 printf("%s: handing over %s speed device on " 2084 "port %d to %s\n", 2085 USBDEVNAME(sc->sc_bus.bdev), 2086 lowspeed ? "low" : "full", 2087 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2088 } else { 2089 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2090 } 2091 #endif 2092 port = EHCI_PORTSC(index); 2093 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2094 EOWRITE4(sc, port, v | EHCI_PS_PO); 2095 } 2096 2097 /* Abort a root control request. */ 2098 Static void 2099 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2100 { 2101 /* Nothing to do, all transfers are synchronous. */ 2102 } 2103 2104 /* Close the root pipe. */ 2105 Static void 2106 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2107 { 2108 DPRINTF(("ehci_root_ctrl_close\n")); 2109 /* Nothing to do. */ 2110 } 2111 2112 void 2113 ehci_root_intr_done(usbd_xfer_handle xfer) 2114 { 2115 xfer->hcpriv = NULL; 2116 } 2117 2118 Static usbd_status 2119 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2120 { 2121 usbd_status err; 2122 2123 /* Insert last in queue. */ 2124 err = usb_insert_transfer(xfer); 2125 if (err) 2126 return (err); 2127 2128 /* Pipe isn't running, start first */ 2129 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2130 } 2131 2132 Static usbd_status 2133 ehci_root_intr_start(usbd_xfer_handle xfer) 2134 { 2135 usbd_pipe_handle pipe = xfer->pipe; 2136 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2137 2138 if (sc->sc_dying) 2139 return (USBD_IOERROR); 2140 2141 sc->sc_intrxfer = xfer; 2142 2143 return (USBD_IN_PROGRESS); 2144 } 2145 2146 /* Abort a root interrupt request. */ 2147 Static void 2148 ehci_root_intr_abort(usbd_xfer_handle xfer) 2149 { 2150 int s; 2151 2152 if (xfer->pipe->intrxfer == xfer) { 2153 DPRINTF(("ehci_root_intr_abort: remove\n")); 2154 xfer->pipe->intrxfer = NULL; 2155 } 2156 xfer->status = USBD_CANCELLED; 2157 s = splusb(); 2158 usb_transfer_complete(xfer); 2159 splx(s); 2160 } 2161 2162 /* Close the root pipe. */ 2163 Static void 2164 ehci_root_intr_close(usbd_pipe_handle pipe) 2165 { 2166 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2167 2168 DPRINTF(("ehci_root_intr_close\n")); 2169 2170 sc->sc_intrxfer = NULL; 2171 } 2172 2173 void 2174 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2175 { 2176 xfer->hcpriv = NULL; 2177 } 2178 2179 /************************/ 2180 2181 ehci_soft_qh_t * 2182 ehci_alloc_sqh(ehci_softc_t *sc) 2183 { 2184 ehci_soft_qh_t *sqh; 2185 usbd_status err; 2186 int i, offs; 2187 usb_dma_t dma; 2188 2189 if (sc->sc_freeqhs == NULL) { 2190 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2191 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2192 EHCI_PAGE_SIZE, &dma); 2193 #ifdef EHCI_DEBUG 2194 if (err) 2195 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2196 #endif 2197 if (err) 2198 return (NULL); 2199 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2200 offs = i * EHCI_SQH_SIZE; 2201 sqh = KERNADDR(&dma, offs); 2202 sqh->physaddr = DMAADDR(&dma, offs); 2203 sqh->next = sc->sc_freeqhs; 2204 sc->sc_freeqhs = sqh; 2205 } 2206 } 2207 sqh = sc->sc_freeqhs; 2208 sc->sc_freeqhs = sqh->next; 2209 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2210 sqh->next = NULL; 2211 return (sqh); 2212 } 2213 2214 void 2215 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2216 { 2217 sqh->next = sc->sc_freeqhs; 2218 sc->sc_freeqhs = sqh; 2219 } 2220 2221 ehci_soft_qtd_t * 2222 ehci_alloc_sqtd(ehci_softc_t *sc) 2223 { 2224 ehci_soft_qtd_t *sqtd; 2225 usbd_status err; 2226 int i, offs; 2227 usb_dma_t dma; 2228 int s; 2229 2230 if (sc->sc_freeqtds == NULL) { 2231 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2232 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2233 EHCI_PAGE_SIZE, &dma); 2234 #ifdef EHCI_DEBUG 2235 if (err) 2236 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2237 #endif 2238 if (err) 2239 return (NULL); 2240 s = splusb(); 2241 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2242 offs = i * EHCI_SQTD_SIZE; 2243 sqtd = KERNADDR(&dma, offs); 2244 sqtd->physaddr = DMAADDR(&dma, offs); 2245 sqtd->nextqtd = sc->sc_freeqtds; 2246 sc->sc_freeqtds = sqtd; 2247 } 2248 splx(s); 2249 } 2250 2251 s = splusb(); 2252 sqtd = sc->sc_freeqtds; 2253 sc->sc_freeqtds = sqtd->nextqtd; 2254 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2255 sqtd->nextqtd = NULL; 2256 sqtd->xfer = NULL; 2257 splx(s); 2258 2259 return (sqtd); 2260 } 2261 2262 void 2263 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2264 { 2265 int s; 2266 2267 s = splusb(); 2268 sqtd->nextqtd = sc->sc_freeqtds; 2269 sc->sc_freeqtds = sqtd; 2270 splx(s); 2271 } 2272 2273 usbd_status 2274 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2275 int alen, int rd, usbd_xfer_handle xfer, 2276 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2277 { 2278 ehci_soft_qtd_t *next, *cur; 2279 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2280 u_int32_t qtdstatus; 2281 int len, curlen, mps; 2282 int i, tog; 2283 usb_dma_t *dma = &xfer->dmabuf; 2284 u_int16_t flags = xfer->flags; 2285 2286 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2287 2288 len = alen; 2289 dataphys = DMAADDR(dma, 0); 2290 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2291 qtdstatus = EHCI_QTD_ACTIVE | 2292 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2293 EHCI_QTD_SET_CERR(3) 2294 /* IOC set below */ 2295 /* BYTES set below */ 2296 ; 2297 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2298 tog = epipe->nexttoggle; 2299 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2300 2301 cur = ehci_alloc_sqtd(sc); 2302 *sp = cur; 2303 if (cur == NULL) 2304 goto nomem; 2305 for (;;) { 2306 dataphyspage = EHCI_PAGE(dataphys); 2307 /* The EHCI hardware can handle at most 5 pages. */ 2308 if (dataphyslastpage - dataphyspage < 2309 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2310 /* we can handle it in this QTD */ 2311 curlen = len; 2312 } else { 2313 /* must use multiple TDs, fill as much as possible. */ 2314 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2315 EHCI_PAGE_OFFSET(dataphys); 2316 #ifdef DIAGNOSTIC 2317 if (curlen > len) { 2318 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2319 "len=0x%x offs=0x%x\n", curlen, len, 2320 EHCI_PAGE_OFFSET(dataphys)); 2321 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2322 dataphyslastpage, dataphyspage, 2323 dataphys); 2324 curlen = len; 2325 } 2326 #endif 2327 /* the length must be a multiple of the max size */ 2328 curlen -= curlen % mps; 2329 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2330 "curlen=%d\n", curlen)); 2331 #ifdef DIAGNOSTIC 2332 if (curlen == 0) 2333 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2334 #endif 2335 } 2336 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2337 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2338 dataphys, dataphyslastpage, 2339 len, curlen)); 2340 len -= curlen; 2341 2342 /* 2343 * Allocate another transfer if there's more data left, 2344 * or if force last short transfer flag is set and we're 2345 * allocating a multiple of the max packet size. 2346 */ 2347 if (len != 0 || 2348 ((curlen % mps) == 0 && !rd && curlen != 0 && 2349 (flags & USBD_FORCE_SHORT_XFER))) { 2350 next = ehci_alloc_sqtd(sc); 2351 if (next == NULL) 2352 goto nomem; 2353 nextphys = htole32(next->physaddr); 2354 } else { 2355 next = NULL; 2356 nextphys = EHCI_NULL; 2357 } 2358 2359 for (i = 0; i * EHCI_PAGE_SIZE < 2360 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2361 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2362 if (i != 0) /* use offset only in first buffer */ 2363 a = EHCI_PAGE(a); 2364 cur->qtd.qtd_buffer[i] = htole32(a); 2365 cur->qtd.qtd_buffer_hi[i] = 0; 2366 #ifdef DIAGNOSTIC 2367 if (i >= EHCI_QTD_NBUFFERS) { 2368 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2369 goto nomem; 2370 } 2371 #endif 2372 } 2373 cur->nextqtd = next; 2374 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2375 cur->qtd.qtd_status = 2376 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2377 cur->xfer = xfer; 2378 cur->len = curlen; 2379 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2380 dataphys, dataphys + curlen)); 2381 /* adjust the toggle based on the number of packets in this 2382 qtd */ 2383 if (((curlen + mps - 1) / mps) & 1) { 2384 tog ^= 1; 2385 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2386 } 2387 if (next == NULL) 2388 break; 2389 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2390 dataphys += curlen; 2391 cur = next; 2392 } 2393 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2394 *ep = cur; 2395 epipe->nexttoggle = tog; 2396 2397 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2398 *sp, *ep)); 2399 2400 return (USBD_NORMAL_COMPLETION); 2401 2402 nomem: 2403 /* XXX free chain */ 2404 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2405 return (USBD_NOMEM); 2406 } 2407 2408 Static void 2409 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2410 ehci_soft_qtd_t *sqtdend) 2411 { 2412 ehci_soft_qtd_t *p; 2413 int i; 2414 2415 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2416 sqtd, sqtdend)); 2417 2418 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2419 p = sqtd->nextqtd; 2420 ehci_free_sqtd(sc, sqtd); 2421 } 2422 } 2423 2424 /****************/ 2425 2426 /* 2427 * Close a reqular pipe. 2428 * Assumes that there are no pending transactions. 2429 */ 2430 void 2431 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2432 { 2433 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2434 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2435 ehci_soft_qh_t *sqh = epipe->sqh; 2436 int s; 2437 2438 s = splusb(); 2439 ehci_rem_qh(sc, sqh, head); 2440 splx(s); 2441 ehci_free_sqh(sc, epipe->sqh); 2442 } 2443 2444 /* 2445 * Abort a device request. 2446 * If this routine is called at splusb() it guarantees that the request 2447 * will be removed from the hardware scheduling and that the callback 2448 * for it will be called with USBD_CANCELLED status. 2449 * It's impossible to guarantee that the requested transfer will not 2450 * have happened since the hardware runs concurrently. 2451 * If the transaction has already happened we rely on the ordinary 2452 * interrupt processing to process it. 2453 * XXX This is most probably wrong. 2454 */ 2455 void 2456 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2457 { 2458 #define exfer EXFER(xfer) 2459 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2460 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2461 ehci_soft_qh_t *sqh = epipe->sqh; 2462 ehci_soft_qtd_t *sqtd; 2463 ehci_physaddr_t cur; 2464 u_int32_t qhstatus; 2465 int s; 2466 int hit; 2467 int wake; 2468 2469 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2470 2471 if (sc->sc_dying) { 2472 /* If we're dying, just do the software part. */ 2473 s = splusb(); 2474 xfer->status = status; /* make software ignore it */ 2475 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2476 usb_transfer_complete(xfer); 2477 splx(s); 2478 return; 2479 } 2480 2481 if (xfer->device->bus->intr_context || !curproc) 2482 panic("ehci_abort_xfer: not in process context"); 2483 2484 /* 2485 * If an abort is already in progress then just wait for it to 2486 * complete and return. 2487 */ 2488 if (xfer->hcflags & UXFER_ABORTING) { 2489 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2490 #ifdef DIAGNOSTIC 2491 if (status == USBD_TIMEOUT) 2492 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2493 #endif 2494 /* Override the status which might be USBD_TIMEOUT. */ 2495 xfer->status = status; 2496 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2497 xfer->hcflags |= UXFER_ABORTWAIT; 2498 while (xfer->hcflags & UXFER_ABORTING) 2499 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2500 return; 2501 } 2502 xfer->hcflags |= UXFER_ABORTING; 2503 2504 /* 2505 * Step 1: Make interrupt routine and hardware ignore xfer. 2506 */ 2507 s = splusb(); 2508 xfer->status = status; /* make software ignore it */ 2509 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2510 qhstatus = sqh->qh.qh_qtd.qtd_status; 2511 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2512 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2513 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2514 if (sqtd == exfer->sqtdend) 2515 break; 2516 } 2517 splx(s); 2518 2519 /* 2520 * Step 2: Wait until we know hardware has finished any possible 2521 * use of the xfer. Also make sure the soft interrupt routine 2522 * has run. 2523 */ 2524 ehci_sync_hc(sc); 2525 s = splusb(); 2526 #ifdef USB_USE_SOFTINTR 2527 sc->sc_softwake = 1; 2528 #endif /* USB_USE_SOFTINTR */ 2529 usb_schedsoftintr(&sc->sc_bus); 2530 #ifdef USB_USE_SOFTINTR 2531 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2532 #endif /* USB_USE_SOFTINTR */ 2533 splx(s); 2534 2535 /* 2536 * Step 3: Remove any vestiges of the xfer from the hardware. 2537 * The complication here is that the hardware may have executed 2538 * beyond the xfer we're trying to abort. So as we're scanning 2539 * the TDs of this xfer we check if the hardware points to 2540 * any of them. 2541 */ 2542 s = splusb(); /* XXX why? */ 2543 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2544 hit = 0; 2545 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2546 hit |= cur == sqtd->physaddr; 2547 if (sqtd == exfer->sqtdend) 2548 break; 2549 } 2550 sqtd = sqtd->nextqtd; 2551 /* Zap curqtd register if hardware pointed inside the xfer. */ 2552 if (hit && sqtd != NULL) { 2553 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2554 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2555 sqh->qh.qh_qtd.qtd_status = qhstatus; 2556 } else { 2557 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2558 } 2559 2560 /* 2561 * Step 4: Execute callback. 2562 */ 2563 #ifdef DIAGNOSTIC 2564 exfer->isdone = 1; 2565 #endif 2566 wake = xfer->hcflags & UXFER_ABORTWAIT; 2567 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2568 usb_transfer_complete(xfer); 2569 if (wake) 2570 wakeup(&xfer->hcflags); 2571 2572 splx(s); 2573 #undef exfer 2574 } 2575 2576 void 2577 ehci_timeout(void *addr) 2578 { 2579 struct ehci_xfer *exfer = addr; 2580 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2581 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2582 2583 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2584 #ifdef USB_DEBUG 2585 if (ehcidebug > 1) 2586 usbd_dump_pipe(exfer->xfer.pipe); 2587 #endif 2588 2589 if (sc->sc_dying) { 2590 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2591 return; 2592 } 2593 2594 /* Execute the abort in a process context. */ 2595 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2596 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2597 USB_TASKQ_HC); 2598 } 2599 2600 void 2601 ehci_timeout_task(void *addr) 2602 { 2603 usbd_xfer_handle xfer = addr; 2604 int s; 2605 2606 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2607 2608 s = splusb(); 2609 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2610 splx(s); 2611 } 2612 2613 /************************/ 2614 2615 Static usbd_status 2616 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2617 { 2618 usbd_status err; 2619 2620 /* Insert last in queue. */ 2621 err = usb_insert_transfer(xfer); 2622 if (err) 2623 return (err); 2624 2625 /* Pipe isn't running, start first */ 2626 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2627 } 2628 2629 Static usbd_status 2630 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2631 { 2632 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2633 usbd_status err; 2634 2635 if (sc->sc_dying) 2636 return (USBD_IOERROR); 2637 2638 #ifdef DIAGNOSTIC 2639 if (!(xfer->rqflags & URQ_REQUEST)) { 2640 /* XXX panic */ 2641 printf("ehci_device_ctrl_transfer: not a request\n"); 2642 return (USBD_INVAL); 2643 } 2644 #endif 2645 2646 err = ehci_device_request(xfer); 2647 if (err) 2648 return (err); 2649 2650 if (sc->sc_bus.use_polling) 2651 ehci_waitintr(sc, xfer); 2652 return (USBD_IN_PROGRESS); 2653 } 2654 2655 void 2656 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2657 { 2658 struct ehci_xfer *ex = EXFER(xfer); 2659 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2660 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2661 2662 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2663 2664 #ifdef DIAGNOSTIC 2665 if (!(xfer->rqflags & URQ_REQUEST)) { 2666 panic("ehci_ctrl_done: not a request"); 2667 } 2668 #endif 2669 2670 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2671 ehci_del_intr_list(ex); /* remove from active list */ 2672 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2673 } 2674 2675 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2676 } 2677 2678 /* Abort a device control request. */ 2679 Static void 2680 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2681 { 2682 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2683 ehci_abort_xfer(xfer, USBD_CANCELLED); 2684 } 2685 2686 /* Close a device control pipe. */ 2687 Static void 2688 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2689 { 2690 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2691 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2692 2693 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2694 ehci_close_pipe(pipe, sc->sc_async_head); 2695 } 2696 2697 usbd_status 2698 ehci_device_request(usbd_xfer_handle xfer) 2699 { 2700 #define exfer EXFER(xfer) 2701 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2702 usb_device_request_t *req = &xfer->request; 2703 usbd_device_handle dev = epipe->pipe.device; 2704 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2705 int addr = dev->address; 2706 ehci_soft_qtd_t *setup, *stat, *next; 2707 ehci_soft_qh_t *sqh; 2708 int isread; 2709 int len; 2710 usbd_status err; 2711 int s; 2712 2713 isread = req->bmRequestType & UT_READ; 2714 len = UGETW(req->wLength); 2715 2716 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2717 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2718 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2719 UGETW(req->wIndex), len, addr, 2720 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2721 2722 setup = ehci_alloc_sqtd(sc); 2723 if (setup == NULL) { 2724 err = USBD_NOMEM; 2725 goto bad1; 2726 } 2727 stat = ehci_alloc_sqtd(sc); 2728 if (stat == NULL) { 2729 err = USBD_NOMEM; 2730 goto bad2; 2731 } 2732 2733 sqh = epipe->sqh; 2734 epipe->u.ctl.length = len; 2735 2736 /* Update device address and length since they may have changed 2737 during the setup of the control pipe in usbd_new_device(). */ 2738 /* XXX This only needs to be done once, but it's too early in open. */ 2739 /* XXXX Should not touch ED here! */ 2740 sqh->qh.qh_endp = 2741 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2742 htole32( 2743 EHCI_QH_SET_ADDR(addr) | 2744 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2745 ); 2746 2747 /* Set up data transaction */ 2748 if (len != 0) { 2749 ehci_soft_qtd_t *end; 2750 2751 /* Start toggle at 1. */ 2752 epipe->nexttoggle = 1; 2753 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2754 &next, &end); 2755 if (err) 2756 goto bad3; 2757 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2758 end->nextqtd = stat; 2759 end->qtd.qtd_next = 2760 end->qtd.qtd_altnext = htole32(stat->physaddr); 2761 } else { 2762 next = stat; 2763 } 2764 2765 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2766 2767 /* Clear toggle */ 2768 setup->qtd.qtd_status = htole32( 2769 EHCI_QTD_ACTIVE | 2770 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2771 EHCI_QTD_SET_CERR(3) | 2772 EHCI_QTD_SET_TOGGLE(0) | 2773 EHCI_QTD_SET_BYTES(sizeof *req) 2774 ); 2775 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2776 setup->qtd.qtd_buffer_hi[0] = 0; 2777 setup->nextqtd = next; 2778 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2779 setup->xfer = xfer; 2780 setup->len = sizeof *req; 2781 2782 stat->qtd.qtd_status = htole32( 2783 EHCI_QTD_ACTIVE | 2784 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2785 EHCI_QTD_SET_CERR(3) | 2786 EHCI_QTD_SET_TOGGLE(1) | 2787 EHCI_QTD_IOC 2788 ); 2789 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2790 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2791 stat->nextqtd = NULL; 2792 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2793 stat->xfer = xfer; 2794 stat->len = 0; 2795 2796 #ifdef EHCI_DEBUG 2797 if (ehcidebug > 5) { 2798 DPRINTF(("ehci_device_request:\n")); 2799 ehci_dump_sqh(sqh); 2800 ehci_dump_sqtds(setup); 2801 } 2802 #endif 2803 2804 exfer->sqtdstart = setup; 2805 exfer->sqtdend = stat; 2806 #ifdef DIAGNOSTIC 2807 if (!exfer->isdone) { 2808 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2809 } 2810 exfer->isdone = 0; 2811 #endif 2812 2813 /* Insert qTD in QH list. */ 2814 s = splusb(); 2815 ehci_set_qh_qtd(sqh, setup); 2816 if (xfer->timeout && !sc->sc_bus.use_polling) { 2817 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2818 ehci_timeout, xfer); 2819 } 2820 ehci_add_intr_list(sc, exfer); 2821 xfer->status = USBD_IN_PROGRESS; 2822 splx(s); 2823 2824 #ifdef EHCI_DEBUG 2825 if (ehcidebug > 10) { 2826 DPRINTF(("ehci_device_request: status=%x\n", 2827 EOREAD4(sc, EHCI_USBSTS))); 2828 delay(10000); 2829 ehci_dump_regs(sc); 2830 ehci_dump_sqh(sc->sc_async_head); 2831 ehci_dump_sqh(sqh); 2832 ehci_dump_sqtds(setup); 2833 } 2834 #endif 2835 2836 return (USBD_NORMAL_COMPLETION); 2837 2838 bad3: 2839 ehci_free_sqtd(sc, stat); 2840 bad2: 2841 ehci_free_sqtd(sc, setup); 2842 bad1: 2843 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2844 xfer->status = err; 2845 usb_transfer_complete(xfer); 2846 return (err); 2847 #undef exfer 2848 } 2849 2850 /* 2851 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2852 * qTD status, or miss signalling occasionally under heavy load. If the host 2853 * machine is too fast, we we can miss transaction completion - when we scan 2854 * the active list the transaction still seems to be active. This generally 2855 * exhibits itself as a umass stall that never recovers. 2856 * 2857 * We work around this behaviour by setting up this callback after any softintr 2858 * that completes with transactions still pending, giving us another chance to 2859 * check for completion after the writeback has taken place. 2860 */ 2861 void 2862 ehci_intrlist_timeout(void *arg) 2863 { 2864 ehci_softc_t *sc = arg; 2865 int s = splusb(); 2866 2867 DPRINTF(("ehci_intrlist_timeout\n")); 2868 usb_schedsoftintr(&sc->sc_bus); 2869 2870 splx(s); 2871 } 2872 2873 /************************/ 2874 2875 Static usbd_status 2876 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2877 { 2878 usbd_status err; 2879 2880 /* Insert last in queue. */ 2881 err = usb_insert_transfer(xfer); 2882 if (err) 2883 return (err); 2884 2885 /* Pipe isn't running, start first */ 2886 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2887 } 2888 2889 usbd_status 2890 ehci_device_bulk_start(usbd_xfer_handle xfer) 2891 { 2892 #define exfer EXFER(xfer) 2893 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2894 usbd_device_handle dev = epipe->pipe.device; 2895 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2896 ehci_soft_qtd_t *data, *dataend; 2897 ehci_soft_qh_t *sqh; 2898 usbd_status err; 2899 int len, isread, endpt; 2900 int s; 2901 2902 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2903 xfer, xfer->length, xfer->flags)); 2904 2905 if (sc->sc_dying) 2906 return (USBD_IOERROR); 2907 2908 #ifdef DIAGNOSTIC 2909 if (xfer->rqflags & URQ_REQUEST) 2910 panic("ehci_device_bulk_start: a request"); 2911 #endif 2912 2913 len = xfer->length; 2914 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2915 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2916 sqh = epipe->sqh; 2917 2918 epipe->u.bulk.length = len; 2919 2920 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2921 &dataend); 2922 if (err) { 2923 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2924 xfer->status = err; 2925 usb_transfer_complete(xfer); 2926 return (err); 2927 } 2928 2929 #ifdef EHCI_DEBUG 2930 if (ehcidebug > 5) { 2931 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2932 ehci_dump_sqh(sqh); 2933 ehci_dump_sqtds(data); 2934 } 2935 #endif 2936 2937 /* Set up interrupt info. */ 2938 exfer->sqtdstart = data; 2939 exfer->sqtdend = dataend; 2940 #ifdef DIAGNOSTIC 2941 if (!exfer->isdone) { 2942 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2943 } 2944 exfer->isdone = 0; 2945 #endif 2946 2947 s = splusb(); 2948 ehci_set_qh_qtd(sqh, data); 2949 if (xfer->timeout && !sc->sc_bus.use_polling) { 2950 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2951 ehci_timeout, xfer); 2952 } 2953 ehci_add_intr_list(sc, exfer); 2954 xfer->status = USBD_IN_PROGRESS; 2955 splx(s); 2956 2957 #ifdef EHCI_DEBUG 2958 if (ehcidebug > 10) { 2959 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2960 delay(10000); 2961 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2962 ehci_dump_regs(sc); 2963 #if 0 2964 printf("async_head:\n"); 2965 ehci_dump_sqh(sc->sc_async_head); 2966 #endif 2967 printf("sqh:\n"); 2968 ehci_dump_sqh(sqh); 2969 ehci_dump_sqtds(data); 2970 } 2971 #endif 2972 2973 if (sc->sc_bus.use_polling) 2974 ehci_waitintr(sc, xfer); 2975 2976 return (USBD_IN_PROGRESS); 2977 #undef exfer 2978 } 2979 2980 Static void 2981 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2982 { 2983 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2984 ehci_abort_xfer(xfer, USBD_CANCELLED); 2985 } 2986 2987 /* 2988 * Close a device bulk pipe. 2989 */ 2990 Static void 2991 ehci_device_bulk_close(usbd_pipe_handle pipe) 2992 { 2993 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2994 2995 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2996 ehci_close_pipe(pipe, sc->sc_async_head); 2997 } 2998 2999 void 3000 ehci_device_bulk_done(usbd_xfer_handle xfer) 3001 { 3002 struct ehci_xfer *ex = EXFER(xfer); 3003 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3004 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3005 3006 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3007 xfer, xfer->actlen)); 3008 3009 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3010 ehci_del_intr_list(ex); /* remove from active list */ 3011 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3012 } 3013 3014 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3015 } 3016 3017 /************************/ 3018 3019 Static usbd_status 3020 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3021 { 3022 struct ehci_soft_islot *isp; 3023 int islot, lev; 3024 3025 /* Find a poll rate that is large enough. */ 3026 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3027 if (EHCI_ILEV_IVAL(lev) <= ival) 3028 break; 3029 3030 /* Pick an interrupt slot at the right level. */ 3031 /* XXX could do better than picking at random */ 3032 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3033 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3034 3035 sqh->islot = islot; 3036 isp = &sc->sc_islots[islot]; 3037 ehci_add_qh(sqh, isp->sqh); 3038 3039 return (USBD_NORMAL_COMPLETION); 3040 } 3041 3042 Static usbd_status 3043 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3044 { 3045 usbd_status err; 3046 3047 /* Insert last in queue. */ 3048 err = usb_insert_transfer(xfer); 3049 if (err) 3050 return (err); 3051 3052 /* 3053 * Pipe isn't running (otherwise err would be USBD_INPROG), 3054 * so start it first. 3055 */ 3056 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3057 } 3058 3059 Static usbd_status 3060 ehci_device_intr_start(usbd_xfer_handle xfer) 3061 { 3062 #define exfer EXFER(xfer) 3063 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3064 usbd_device_handle dev = xfer->pipe->device; 3065 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3066 ehci_soft_qtd_t *data, *dataend; 3067 ehci_soft_qh_t *sqh; 3068 usbd_status err; 3069 int len, isread, endpt; 3070 int s; 3071 3072 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3073 xfer, xfer->length, xfer->flags)); 3074 3075 if (sc->sc_dying) 3076 return (USBD_IOERROR); 3077 3078 #ifdef DIAGNOSTIC 3079 if (xfer->rqflags & URQ_REQUEST) 3080 panic("ehci_device_intr_start: a request"); 3081 #endif 3082 3083 len = xfer->length; 3084 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3085 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3086 sqh = epipe->sqh; 3087 3088 epipe->u.intr.length = len; 3089 3090 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3091 &dataend); 3092 if (err) { 3093 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3094 xfer->status = err; 3095 usb_transfer_complete(xfer); 3096 return (err); 3097 } 3098 3099 #ifdef EHCI_DEBUG 3100 if (ehcidebug > 5) { 3101 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3102 ehci_dump_sqh(sqh); 3103 ehci_dump_sqtds(data); 3104 } 3105 #endif 3106 3107 /* Set up interrupt info. */ 3108 exfer->sqtdstart = data; 3109 exfer->sqtdend = dataend; 3110 #ifdef DIAGNOSTIC 3111 if (!exfer->isdone) { 3112 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3113 } 3114 exfer->isdone = 0; 3115 #endif 3116 3117 s = splusb(); 3118 ehci_set_qh_qtd(sqh, data); 3119 if (xfer->timeout && !sc->sc_bus.use_polling) { 3120 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3121 ehci_timeout, xfer); 3122 } 3123 ehci_add_intr_list(sc, exfer); 3124 xfer->status = USBD_IN_PROGRESS; 3125 splx(s); 3126 3127 #ifdef EHCI_DEBUG 3128 if (ehcidebug > 10) { 3129 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3130 delay(10000); 3131 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3132 ehci_dump_regs(sc); 3133 printf("sqh:\n"); 3134 ehci_dump_sqh(sqh); 3135 ehci_dump_sqtds(data); 3136 } 3137 #endif 3138 3139 if (sc->sc_bus.use_polling) 3140 ehci_waitintr(sc, xfer); 3141 3142 return (USBD_IN_PROGRESS); 3143 #undef exfer 3144 } 3145 3146 Static void 3147 ehci_device_intr_abort(usbd_xfer_handle xfer) 3148 { 3149 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3150 if (xfer->pipe->intrxfer == xfer) { 3151 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3152 xfer->pipe->intrxfer = NULL; 3153 } 3154 ehci_abort_xfer(xfer, USBD_CANCELLED); 3155 } 3156 3157 Static void 3158 ehci_device_intr_close(usbd_pipe_handle pipe) 3159 { 3160 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3161 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3162 struct ehci_soft_islot *isp; 3163 3164 isp = &sc->sc_islots[epipe->sqh->islot]; 3165 ehci_close_pipe(pipe, isp->sqh); 3166 } 3167 3168 Static void 3169 ehci_device_intr_done(usbd_xfer_handle xfer) 3170 { 3171 #define exfer EXFER(xfer) 3172 struct ehci_xfer *ex = EXFER(xfer); 3173 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3174 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3175 ehci_soft_qtd_t *data, *dataend; 3176 ehci_soft_qh_t *sqh; 3177 usbd_status err; 3178 int len, isread, endpt, s; 3179 3180 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3181 xfer, xfer->actlen)); 3182 3183 if (xfer->pipe->repeat) { 3184 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3185 3186 len = epipe->u.intr.length; 3187 xfer->length = len; 3188 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3189 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3190 sqh = epipe->sqh; 3191 3192 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3193 &data, &dataend); 3194 if (err) { 3195 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3196 xfer->status = err; 3197 return; 3198 } 3199 3200 /* Set up interrupt info. */ 3201 exfer->sqtdstart = data; 3202 exfer->sqtdend = dataend; 3203 #ifdef DIAGNOSTIC 3204 if (!exfer->isdone) { 3205 printf("ehci_device_intr_done: not done, ex=%p\n", 3206 exfer); 3207 } 3208 exfer->isdone = 0; 3209 #endif 3210 3211 s = splusb(); 3212 ehci_set_qh_qtd(sqh, data); 3213 if (xfer->timeout && !sc->sc_bus.use_polling) { 3214 usb_callout(xfer->timeout_handle, 3215 mstohz(xfer->timeout), ehci_timeout, xfer); 3216 } 3217 splx(s); 3218 3219 xfer->status = USBD_IN_PROGRESS; 3220 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3221 ehci_del_intr_list(ex); /* remove from active list */ 3222 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3223 } 3224 #undef exfer 3225 } 3226 3227 /************************/ 3228 3229 Static usbd_status 3230 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3231 { 3232 return USBD_IOERROR; 3233 } 3234 Static usbd_status 3235 ehci_device_isoc_start(usbd_xfer_handle xfer) 3236 { 3237 return USBD_IOERROR; 3238 } 3239 Static void 3240 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3241 { 3242 } 3243 Static void 3244 ehci_device_isoc_close(usbd_pipe_handle pipe) 3245 { 3246 } 3247 Static void 3248 ehci_device_isoc_done(usbd_xfer_handle xfer) 3249 { 3250 } 3251
Indexes created Thu Oct 02 01:09:59 GMT 2025