ehci.c revision 1.126
1 /* $NetBSD: ehci.c,v 1.126 2007/12/05 07:15:53 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.126 2007/12/05 07:15:53 ad Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 91 #ifdef EHCI_DEBUG 92 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 93 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 94 int ehcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 struct ehci_pipe { 104 struct usbd_pipe pipe; 105 int nexttoggle; 106 107 ehci_soft_qh_t *sqh; 108 union { 109 ehci_soft_qtd_t *qtd; 110 /* ehci_soft_itd_t *itd; */ 111 } tail; 112 union { 113 /* Control pipe */ 114 struct { 115 usb_dma_t reqdma; 116 u_int length; 117 } ctl; 118 /* Interrupt pipe */ 119 struct { 120 u_int length; 121 } intr; 122 /* Bulk pipe */ 123 struct { 124 u_int length; 125 } bulk; 126 /* Iso pipe */ 127 /* XXX */ 128 } u; 129 }; 130 131 Static void ehci_shutdown(void *); 132 Static void ehci_power(int, void *); 133 134 Static usbd_status ehci_open(usbd_pipe_handle); 135 Static void ehci_poll(struct usbd_bus *); 136 Static void ehci_softintr(void *); 137 Static int ehci_intr1(ehci_softc_t *); 138 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 139 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 140 Static void ehci_idone(struct ehci_xfer *); 141 Static void ehci_timeout(void *); 142 Static void ehci_timeout_task(void *); 143 Static void ehci_intrlist_timeout(void *); 144 145 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 146 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 147 148 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 149 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 150 151 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 152 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 153 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 154 Static void ehci_root_ctrl_close(usbd_pipe_handle); 155 Static void ehci_root_ctrl_done(usbd_xfer_handle); 156 157 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 158 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 159 Static void ehci_root_intr_abort(usbd_xfer_handle); 160 Static void ehci_root_intr_close(usbd_pipe_handle); 161 Static void ehci_root_intr_done(usbd_xfer_handle); 162 163 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 164 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 165 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 166 Static void ehci_device_ctrl_close(usbd_pipe_handle); 167 Static void ehci_device_ctrl_done(usbd_xfer_handle); 168 169 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 170 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 171 Static void ehci_device_bulk_abort(usbd_xfer_handle); 172 Static void ehci_device_bulk_close(usbd_pipe_handle); 173 Static void ehci_device_bulk_done(usbd_xfer_handle); 174 175 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 177 Static void ehci_device_intr_abort(usbd_xfer_handle); 178 Static void ehci_device_intr_close(usbd_pipe_handle); 179 Static void ehci_device_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 182 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 183 Static void ehci_device_isoc_abort(usbd_xfer_handle); 184 Static void ehci_device_isoc_close(usbd_pipe_handle); 185 Static void ehci_device_isoc_done(usbd_xfer_handle); 186 187 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 188 Static void ehci_noop(usbd_pipe_handle pipe); 189 190 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 191 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 192 Static void ehci_disown(ehci_softc_t *, int, int); 193 194 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 195 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 196 197 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 198 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 199 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 200 ehci_softc_t *, int, int, usbd_xfer_handle, 201 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 202 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 203 ehci_soft_qtd_t *); 204 205 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 206 207 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 208 int ival); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static const struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 311 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 312 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 313 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 314 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 315 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 316 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 317 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 318 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 319 }; 320 321 usbd_status 322 ehci_init(ehci_softc_t *sc) 323 { 324 u_int32_t vers, sparams, cparams, hcr; 325 u_int i; 326 usbd_status err; 327 ehci_soft_qh_t *sqh; 328 u_int ncomp; 329 330 DPRINTF(("ehci_init: start\n")); 331 #ifdef EHCI_DEBUG 332 theehci = sc; 333 #endif 334 335 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 336 337 vers = EREAD2(sc, EHCI_HCIVERSION); 338 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 339 vers >> 8, vers & 0xff); 340 341 sparams = EREAD4(sc, EHCI_HCSPARAMS); 342 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 343 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 344 ncomp = EHCI_HCS_N_CC(sparams); 345 if (ncomp != sc->sc_ncomp) { 346 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 347 USBDEVNAME(sc->sc_bus.bdev), 348 ncomp, sc->sc_ncomp); 349 #if NOHCI == 0 || NUHCI == 0 350 aprint_error("%s: ohci or uhci probably not configured\n", 351 USBDEVNAME(sc->sc_bus.bdev)); 352 #endif 353 if (ncomp < sc->sc_ncomp) 354 sc->sc_ncomp = ncomp; 355 } 356 if (sc->sc_ncomp > 0) { 357 aprint_normal("%s: companion controller%s, %d port%s each:", 358 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 359 EHCI_HCS_N_PCC(sparams), 360 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 361 for (i = 0; i < sc->sc_ncomp; i++) 362 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 363 aprint_normal("\n"); 364 } 365 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 366 cparams = EREAD4(sc, EHCI_HCCPARAMS); 367 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 368 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 369 370 if (EHCI_HCC_64BIT(cparams)) { 371 /* MUST clear segment register if 64 bit capable. */ 372 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 373 } 374 375 sc->sc_bus.usbrev = USBREV_2_0; 376 377 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 378 USB_MEM_RESERVE); 379 380 /* Reset the controller */ 381 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 382 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 383 usb_delay_ms(&sc->sc_bus, 1); 384 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 385 for (i = 0; i < 100; i++) { 386 usb_delay_ms(&sc->sc_bus, 1); 387 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 388 if (!hcr) 389 break; 390 } 391 if (hcr) { 392 aprint_error("%s: reset timeout\n", 393 USBDEVNAME(sc->sc_bus.bdev)); 394 return (USBD_IOERROR); 395 } 396 397 /* XXX need proper intr scheduling */ 398 sc->sc_rand = 96; 399 400 /* frame list size at default, read back what we got and use that */ 401 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 402 case 0: sc->sc_flsize = 1024; break; 403 case 1: sc->sc_flsize = 512; break; 404 case 2: sc->sc_flsize = 256; break; 405 case 3: return (USBD_IOERROR); 406 } 407 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 408 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 409 if (err) 410 return (err); 411 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 412 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 413 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 414 415 /* Set up the bus struct. */ 416 sc->sc_bus.methods = &ehci_bus_methods; 417 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 418 419 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 420 ehci_power, sc); 421 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 422 423 sc->sc_eintrs = EHCI_NORMAL_INTRS; 424 425 /* 426 * Allocate the interrupt dummy QHs. These are arranged to give poll 427 * intervals that are powers of 2 times 1ms. 428 */ 429 for (i = 0; i < EHCI_INTRQHS; i++) { 430 sqh = ehci_alloc_sqh(sc); 431 if (sqh == NULL) { 432 err = USBD_NOMEM; 433 goto bad1; 434 } 435 sc->sc_islots[i].sqh = sqh; 436 } 437 for (i = 0; i < EHCI_INTRQHS; i++) { 438 sqh = sc->sc_islots[i].sqh; 439 if (i == 0) { 440 /* The last (1ms) QH terminates. */ 441 sqh->qh.qh_link = EHCI_NULL; 442 sqh->next = NULL; 443 } else { 444 /* Otherwise the next QH has half the poll interval */ 445 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 446 sqh->qh.qh_link = htole32(sqh->next->physaddr | 447 EHCI_LINK_QH); 448 } 449 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 450 sqh->qh.qh_curqtd = EHCI_NULL; 451 sqh->next = NULL; 452 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 453 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 454 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 455 sqh->sqtd = NULL; 456 } 457 /* Point the frame list at the last level (128ms). */ 458 for (i = 0; i < sc->sc_flsize; i++) { 459 int j; 460 461 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 462 revbits[i & (EHCI_MAX_POLLRATE-1)]; 463 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 464 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 465 i)].sqh->physaddr); 466 } 467 468 /* Allocate dummy QH that starts the async list. */ 469 sqh = ehci_alloc_sqh(sc); 470 if (sqh == NULL) { 471 err = USBD_NOMEM; 472 goto bad1; 473 } 474 /* Fill the QH */ 475 sqh->qh.qh_endp = 476 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 477 sqh->qh.qh_link = 478 htole32(sqh->physaddr | EHCI_LINK_QH); 479 sqh->qh.qh_curqtd = EHCI_NULL; 480 sqh->next = NULL; 481 /* Fill the overlay qTD */ 482 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 483 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 484 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 485 sqh->sqtd = NULL; 486 #ifdef EHCI_DEBUG 487 if (ehcidebug) { 488 ehci_dump_sqh(sqh); 489 } 490 #endif 491 492 /* Point to async list */ 493 sc->sc_async_head = sqh; 494 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 495 496 usb_callout_init(sc->sc_tmo_intrlist); 497 498 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 499 500 /* Turn on controller */ 501 EOWRITE4(sc, EHCI_USBCMD, 502 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 503 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 504 EHCI_CMD_ASE | 505 EHCI_CMD_PSE | 506 EHCI_CMD_RS); 507 508 /* Take over port ownership */ 509 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 510 511 for (i = 0; i < 100; i++) { 512 usb_delay_ms(&sc->sc_bus, 1); 513 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 514 if (!hcr) 515 break; 516 } 517 if (hcr) { 518 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 519 return (USBD_IOERROR); 520 } 521 522 /* Enable interrupts */ 523 DPRINTFN(1,("ehci_init: enabling\n")); 524 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 525 526 return (USBD_NORMAL_COMPLETION); 527 528 #if 0 529 bad2: 530 ehci_free_sqh(sc, sc->sc_async_head); 531 #endif 532 bad1: 533 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 534 return (err); 535 } 536 537 int 538 ehci_intr(void *v) 539 { 540 ehci_softc_t *sc = v; 541 542 if (sc == NULL || sc->sc_dying) 543 return (0); 544 545 /* If we get an interrupt while polling, then just ignore it. */ 546 if (sc->sc_bus.use_polling) { 547 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 548 549 if (intrs) 550 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 551 #ifdef DIAGNOSTIC 552 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 553 #endif 554 return (0); 555 } 556 557 return (ehci_intr1(sc)); 558 } 559 560 Static int 561 ehci_intr1(ehci_softc_t *sc) 562 { 563 u_int32_t intrs, eintrs; 564 565 DPRINTFN(20,("ehci_intr1: enter\n")); 566 567 /* In case the interrupt occurs before initialization has completed. */ 568 if (sc == NULL) { 569 #ifdef DIAGNOSTIC 570 printf("ehci_intr1: sc == NULL\n"); 571 #endif 572 return (0); 573 } 574 575 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 576 if (!intrs) 577 return (0); 578 579 eintrs = intrs & sc->sc_eintrs; 580 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 581 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 582 (u_int)eintrs)); 583 if (!eintrs) 584 return (0); 585 586 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 587 sc->sc_bus.intr_context++; 588 sc->sc_bus.no_intrs++; 589 if (eintrs & EHCI_STS_IAA) { 590 DPRINTF(("ehci_intr1: door bell\n")); 591 wakeup(&sc->sc_async_head); 592 eintrs &= ~EHCI_STS_IAA; 593 } 594 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 595 DPRINTFN(5,("ehci_intr1: %s %s\n", 596 eintrs & EHCI_STS_INT ? "INT" : "", 597 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 598 usb_schedsoftintr(&sc->sc_bus); 599 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 600 } 601 if (eintrs & EHCI_STS_HSE) { 602 printf("%s: unrecoverable error, controller halted\n", 603 USBDEVNAME(sc->sc_bus.bdev)); 604 /* XXX what else */ 605 } 606 if (eintrs & EHCI_STS_PCD) { 607 ehci_pcd(sc, sc->sc_intrxfer); 608 eintrs &= ~EHCI_STS_PCD; 609 } 610 611 sc->sc_bus.intr_context--; 612 613 if (eintrs != 0) { 614 /* Block unprocessed interrupts. */ 615 sc->sc_eintrs &= ~eintrs; 616 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 617 printf("%s: blocking intrs 0x%x\n", 618 USBDEVNAME(sc->sc_bus.bdev), eintrs); 619 } 620 621 return (1); 622 } 623 624 625 void 626 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 627 { 628 usbd_pipe_handle pipe; 629 u_char *p; 630 int i, m; 631 632 if (xfer == NULL) { 633 /* Just ignore the change. */ 634 return; 635 } 636 637 pipe = xfer->pipe; 638 639 p = KERNADDR(&xfer->dmabuf, 0); 640 m = min(sc->sc_noport, xfer->length * 8 - 1); 641 memset(p, 0, xfer->length); 642 for (i = 1; i <= m; i++) { 643 /* Pick out CHANGE bits from the status reg. */ 644 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 645 p[i/8] |= 1 << (i%8); 646 } 647 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 648 xfer->actlen = xfer->length; 649 xfer->status = USBD_NORMAL_COMPLETION; 650 651 usb_transfer_complete(xfer); 652 } 653 654 void 655 ehci_softintr(void *v) 656 { 657 ehci_softc_t *sc = v; 658 struct ehci_xfer *ex, *nextex; 659 660 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 661 sc->sc_bus.intr_context)); 662 663 sc->sc_bus.intr_context++; 664 665 /* 666 * The only explanation I can think of for why EHCI is as brain dead 667 * as UHCI interrupt-wise is that Intel was involved in both. 668 * An interrupt just tells us that something is done, we have no 669 * clue what, so we need to scan through all active transfers. :-( 670 */ 671 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 672 nextex = LIST_NEXT(ex, inext); 673 ehci_check_intr(sc, ex); 674 } 675 676 /* Schedule a callout to catch any dropped transactions. */ 677 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 678 !LIST_EMPTY(&sc->sc_intrhead)) 679 usb_callout(sc->sc_tmo_intrlist, hz, 680 ehci_intrlist_timeout, sc); 681 682 #ifdef USB_USE_SOFTINTR 683 if (sc->sc_softwake) { 684 sc->sc_softwake = 0; 685 wakeup(&sc->sc_softwake); 686 } 687 #endif /* USB_USE_SOFTINTR */ 688 689 sc->sc_bus.intr_context--; 690 } 691 692 /* Check for an interrupt. */ 693 void 694 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 695 { 696 ehci_soft_qtd_t *sqtd, *lsqtd; 697 u_int32_t status; 698 699 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 700 701 if (ex->sqtdstart == NULL) { 702 printf("ehci_check_intr: sqtdstart=NULL\n"); 703 return; 704 } 705 lsqtd = ex->sqtdend; 706 #ifdef DIAGNOSTIC 707 if (lsqtd == NULL) { 708 printf("ehci_check_intr: lsqtd==0\n"); 709 return; 710 } 711 #endif 712 /* 713 * If the last TD is still active we need to check whether there 714 * is a an error somewhere in the middle, or whether there was a 715 * short packet (SPD and not ACTIVE). 716 */ 717 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 718 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 719 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 720 status = le32toh(sqtd->qtd.qtd_status); 721 /* If there's an active QTD the xfer isn't done. */ 722 if (status & EHCI_QTD_ACTIVE) 723 break; 724 /* Any kind of error makes the xfer done. */ 725 if (status & EHCI_QTD_HALTED) 726 goto done; 727 /* We want short packets, and it is short: it's done */ 728 if (EHCI_QTD_GET_BYTES(status) != 0) 729 goto done; 730 } 731 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 732 ex, ex->sqtdstart)); 733 return; 734 } 735 done: 736 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 737 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 738 ehci_idone(ex); 739 } 740 741 void 742 ehci_idone(struct ehci_xfer *ex) 743 { 744 usbd_xfer_handle xfer = &ex->xfer; 745 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 746 ehci_soft_qtd_t *sqtd, *lsqtd; 747 u_int32_t status = 0, nstatus = 0; 748 int actlen; 749 750 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 751 #ifdef DIAGNOSTIC 752 { 753 int s = splhigh(); 754 if (ex->isdone) { 755 splx(s); 756 #ifdef EHCI_DEBUG 757 printf("ehci_idone: ex is done!\n "); 758 ehci_dump_exfer(ex); 759 #else 760 printf("ehci_idone: ex=%p is done!\n", ex); 761 #endif 762 return; 763 } 764 ex->isdone = 1; 765 splx(s); 766 } 767 #endif 768 769 if (xfer->status == USBD_CANCELLED || 770 xfer->status == USBD_TIMEOUT) { 771 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 772 return; 773 } 774 775 #ifdef EHCI_DEBUG 776 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 777 if (ehcidebug > 10) 778 ehci_dump_sqtds(ex->sqtdstart); 779 #endif 780 781 /* The transfer is done, compute actual length and status. */ 782 lsqtd = ex->sqtdend; 783 actlen = 0; 784 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 785 nstatus = le32toh(sqtd->qtd.qtd_status); 786 if (nstatus & EHCI_QTD_ACTIVE) 787 break; 788 789 status = nstatus; 790 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 791 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 792 } 793 794 /* 795 * If there are left over TDs we need to update the toggle. 796 * The default pipe doesn't need it since control transfers 797 * start the toggle at 0 every time. 798 * For a short transfer we need to update the toggle for the missing 799 * packets within the qTD. 800 */ 801 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 802 xfer->pipe->device->default_pipe != xfer->pipe) { 803 DPRINTFN(2, ("ehci_idone: need toggle update " 804 "status=%08x nstatus=%08x\n", status, nstatus)); 805 #if 0 806 ehci_dump_sqh(epipe->sqh); 807 ehci_dump_sqtds(ex->sqtdstart); 808 #endif 809 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 810 } 811 812 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 813 xfer->length, actlen, status)); 814 xfer->actlen = actlen; 815 if (status & EHCI_QTD_HALTED) { 816 #ifdef EHCI_DEBUG 817 char sbuf[128]; 818 819 bitmask_snprintf((u_int32_t)status, 820 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 821 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 822 823 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 824 "status 0x%s\n", 825 xfer->pipe->device->address, 826 xfer->pipe->endpoint->edesc->bEndpointAddress, 827 sbuf)); 828 if (ehcidebug > 2) { 829 ehci_dump_sqh(epipe->sqh); 830 ehci_dump_sqtds(ex->sqtdstart); 831 } 832 #endif 833 /* low&full speed has an extra error flag */ 834 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 835 EHCI_QH_SPEED_HIGH) 836 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 837 else 838 status &= EHCI_QTD_STATERRS; 839 if (status == 0) /* no other errors means a stall */ 840 xfer->status = USBD_STALLED; 841 else 842 xfer->status = USBD_IOERROR; /* more info XXX */ 843 /* XXX need to reset TT on missed microframe */ 844 if (status & EHCI_QTD_MISSEDMICRO) { 845 ehci_softc_t *sc = (ehci_softc_t *) 846 xfer->pipe->device->bus; 847 848 printf("%s: missed microframe, TT reset not " 849 "implemented, hub might be inoperational\n", 850 USBDEVNAME(sc->sc_bus.bdev)); 851 } 852 } else { 853 xfer->status = USBD_NORMAL_COMPLETION; 854 } 855 856 usb_transfer_complete(xfer); 857 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 858 } 859 860 /* 861 * Wait here until controller claims to have an interrupt. 862 * Then call ehci_intr and return. Use timeout to avoid waiting 863 * too long. 864 */ 865 void 866 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 867 { 868 int timo; 869 u_int32_t intrs; 870 871 xfer->status = USBD_IN_PROGRESS; 872 for (timo = xfer->timeout; timo >= 0; timo--) { 873 usb_delay_ms(&sc->sc_bus, 1); 874 if (sc->sc_dying) 875 break; 876 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 877 sc->sc_eintrs; 878 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 879 #ifdef EHCI_DEBUG 880 if (ehcidebug > 15) 881 ehci_dump_regs(sc); 882 #endif 883 if (intrs) { 884 ehci_intr1(sc); 885 if (xfer->status != USBD_IN_PROGRESS) 886 return; 887 } 888 } 889 890 /* Timeout */ 891 DPRINTF(("ehci_waitintr: timeout\n")); 892 xfer->status = USBD_TIMEOUT; 893 usb_transfer_complete(xfer); 894 /* XXX should free TD */ 895 } 896 897 void 898 ehci_poll(struct usbd_bus *bus) 899 { 900 ehci_softc_t *sc = (ehci_softc_t *)bus; 901 #ifdef EHCI_DEBUG 902 static int last; 903 int new; 904 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 905 if (new != last) { 906 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 907 last = new; 908 } 909 #endif 910 911 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 912 ehci_intr1(sc); 913 } 914 915 int 916 ehci_detach(struct ehci_softc *sc, int flags) 917 { 918 int rv = 0; 919 920 if (sc->sc_child != NULL) 921 rv = config_detach(sc->sc_child, flags); 922 923 if (rv != 0) 924 return (rv); 925 926 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 927 928 if (sc->sc_powerhook != NULL) 929 powerhook_disestablish(sc->sc_powerhook); 930 if (sc->sc_shutdownhook != NULL) 931 shutdownhook_disestablish(sc->sc_shutdownhook); 932 933 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 934 935 /* XXX free other data structures XXX */ 936 mutex_destroy(&sc->sc_doorbell_lock); 937 938 return (rv); 939 } 940 941 942 int 943 ehci_activate(device_ptr_t self, enum devact act) 944 { 945 struct ehci_softc *sc = (struct ehci_softc *)self; 946 int rv = 0; 947 948 switch (act) { 949 case DVACT_ACTIVATE: 950 return (EOPNOTSUPP); 951 952 case DVACT_DEACTIVATE: 953 sc->sc_dying = 1; 954 if (sc->sc_child != NULL) 955 rv = config_deactivate(sc->sc_child); 956 break; 957 } 958 return (rv); 959 } 960 961 /* 962 * Handle suspend/resume. 963 * 964 * We need to switch to polling mode here, because this routine is 965 * called from an interrupt context. This is all right since we 966 * are almost suspended anyway. 967 */ 968 void 969 ehci_power(int why, void *v) 970 { 971 ehci_softc_t *sc = v; 972 u_int32_t cmd, hcr; 973 int s, i; 974 975 #ifdef EHCI_DEBUG 976 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 977 if (ehcidebug > 0) 978 ehci_dump_regs(sc); 979 #endif 980 981 s = splhardusb(); 982 switch (why) { 983 case PWR_SUSPEND: 984 case PWR_STANDBY: 985 sc->sc_bus.use_polling++; 986 987 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 988 989 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 990 EOWRITE4(sc, EHCI_USBCMD, cmd); 991 992 for (i = 0; i < 100; i++) { 993 hcr = EOREAD4(sc, EHCI_USBSTS) & 994 (EHCI_STS_ASS | EHCI_STS_PSS); 995 if (hcr == 0) 996 break; 997 998 usb_delay_ms(&sc->sc_bus, 1); 999 } 1000 if (hcr != 0) { 1001 printf("%s: reset timeout\n", 1002 USBDEVNAME(sc->sc_bus.bdev)); 1003 } 1004 1005 cmd &= ~EHCI_CMD_RS; 1006 EOWRITE4(sc, EHCI_USBCMD, cmd); 1007 1008 for (i = 0; i < 100; i++) { 1009 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1010 if (hcr == EHCI_STS_HCH) 1011 break; 1012 1013 usb_delay_ms(&sc->sc_bus, 1); 1014 } 1015 if (hcr != EHCI_STS_HCH) { 1016 printf("%s: config timeout\n", 1017 USBDEVNAME(sc->sc_bus.bdev)); 1018 } 1019 1020 sc->sc_bus.use_polling--; 1021 break; 1022 1023 case PWR_RESUME: 1024 sc->sc_bus.use_polling++; 1025 1026 /* restore things in case the bios sucks */ 1027 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1028 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1029 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1030 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1031 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1032 1033 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1034 1035 for (i = 0; i < 100; i++) { 1036 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1037 if (hcr != EHCI_STS_HCH) 1038 break; 1039 1040 usb_delay_ms(&sc->sc_bus, 1); 1041 } 1042 if (hcr == EHCI_STS_HCH) { 1043 printf("%s: config timeout\n", 1044 USBDEVNAME(sc->sc_bus.bdev)); 1045 } 1046 1047 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1048 1049 sc->sc_bus.use_polling--; 1050 break; 1051 case PWR_SOFTSUSPEND: 1052 case PWR_SOFTSTANDBY: 1053 case PWR_SOFTRESUME: 1054 break; 1055 } 1056 splx(s); 1057 1058 #ifdef EHCI_DEBUG 1059 DPRINTF(("ehci_power: sc=%p\n", sc)); 1060 if (ehcidebug > 0) 1061 ehci_dump_regs(sc); 1062 #endif 1063 } 1064 1065 /* 1066 * Shut down the controller when the system is going down. 1067 */ 1068 void 1069 ehci_shutdown(void *v) 1070 { 1071 ehci_softc_t *sc = v; 1072 1073 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1074 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1075 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1076 } 1077 1078 usbd_status 1079 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1080 { 1081 struct ehci_softc *sc = (struct ehci_softc *)bus; 1082 usbd_status err; 1083 1084 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1085 if (err == USBD_NOMEM) 1086 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1087 #ifdef EHCI_DEBUG 1088 if (err) 1089 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1090 #endif 1091 return (err); 1092 } 1093 1094 void 1095 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1096 { 1097 struct ehci_softc *sc = (struct ehci_softc *)bus; 1098 1099 if (dma->block->flags & USB_DMA_RESERVE) { 1100 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1101 dma); 1102 return; 1103 } 1104 usb_freemem(&sc->sc_bus, dma); 1105 } 1106 1107 usbd_xfer_handle 1108 ehci_allocx(struct usbd_bus *bus) 1109 { 1110 struct ehci_softc *sc = (struct ehci_softc *)bus; 1111 usbd_xfer_handle xfer; 1112 1113 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1114 if (xfer != NULL) { 1115 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1116 #ifdef DIAGNOSTIC 1117 if (xfer->busy_free != XFER_FREE) { 1118 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1119 xfer->busy_free); 1120 } 1121 #endif 1122 } else { 1123 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1124 } 1125 if (xfer != NULL) { 1126 memset(xfer, 0, sizeof(struct ehci_xfer)); 1127 #ifdef DIAGNOSTIC 1128 EXFER(xfer)->isdone = 1; 1129 xfer->busy_free = XFER_BUSY; 1130 #endif 1131 } 1132 return (xfer); 1133 } 1134 1135 void 1136 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1137 { 1138 struct ehci_softc *sc = (struct ehci_softc *)bus; 1139 1140 #ifdef DIAGNOSTIC 1141 if (xfer->busy_free != XFER_BUSY) { 1142 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1143 xfer->busy_free); 1144 } 1145 xfer->busy_free = XFER_FREE; 1146 if (!EXFER(xfer)->isdone) { 1147 printf("ehci_freex: !isdone\n"); 1148 } 1149 #endif 1150 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1151 } 1152 1153 Static void 1154 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1155 { 1156 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1157 1158 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1159 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1160 #ifdef USB_DEBUG 1161 if (ehcidebug) 1162 usbd_dump_pipe(pipe); 1163 #endif 1164 epipe->nexttoggle = 0; 1165 } 1166 1167 Static void 1168 ehci_noop(usbd_pipe_handle pipe) 1169 { 1170 } 1171 1172 #ifdef EHCI_DEBUG 1173 void 1174 ehci_dump_regs(ehci_softc_t *sc) 1175 { 1176 int i; 1177 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1178 EOREAD4(sc, EHCI_USBCMD), 1179 EOREAD4(sc, EHCI_USBSTS), 1180 EOREAD4(sc, EHCI_USBINTR)); 1181 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1182 EOREAD4(sc, EHCI_FRINDEX), 1183 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1184 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1185 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1186 for (i = 1; i <= sc->sc_noport; i++) 1187 printf("port %d status=0x%08x\n", i, 1188 EOREAD4(sc, EHCI_PORTSC(i))); 1189 } 1190 1191 /* 1192 * Unused function - this is meant to be called from a kernel 1193 * debugger. 1194 */ 1195 void 1196 ehci_dump() 1197 { 1198 ehci_dump_regs(theehci); 1199 } 1200 1201 void 1202 ehci_dump_link(ehci_link_t link, int type) 1203 { 1204 link = le32toh(link); 1205 printf("0x%08x", link); 1206 if (link & EHCI_LINK_TERMINATE) 1207 printf("<T>"); 1208 else { 1209 printf("<"); 1210 if (type) { 1211 switch (EHCI_LINK_TYPE(link)) { 1212 case EHCI_LINK_ITD: printf("ITD"); break; 1213 case EHCI_LINK_QH: printf("QH"); break; 1214 case EHCI_LINK_SITD: printf("SITD"); break; 1215 case EHCI_LINK_FSTN: printf("FSTN"); break; 1216 } 1217 } 1218 printf(">"); 1219 } 1220 } 1221 1222 void 1223 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1224 { 1225 int i; 1226 u_int32_t stop; 1227 1228 stop = 0; 1229 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1230 ehci_dump_sqtd(sqtd); 1231 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1232 } 1233 if (sqtd) 1234 printf("dump aborted, too many TDs\n"); 1235 } 1236 1237 void 1238 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1239 { 1240 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1241 ehci_dump_qtd(&sqtd->qtd); 1242 } 1243 1244 void 1245 ehci_dump_qtd(ehci_qtd_t *qtd) 1246 { 1247 u_int32_t s; 1248 char sbuf[128]; 1249 1250 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1251 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1252 printf("\n"); 1253 s = le32toh(qtd->qtd_status); 1254 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1255 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1256 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1257 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1258 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1259 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1260 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1261 EHCI_QTD_GET_PID(s), sbuf); 1262 for (s = 0; s < 5; s++) 1263 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1264 } 1265 1266 void 1267 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1268 { 1269 ehci_qh_t *qh = &sqh->qh; 1270 u_int32_t endp, endphub; 1271 1272 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1273 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1274 endp = le32toh(qh->qh_endp); 1275 printf(" endp=0x%08x\n", endp); 1276 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1277 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1278 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1279 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1280 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1281 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1282 EHCI_QH_GET_NRL(endp)); 1283 endphub = le32toh(qh->qh_endphub); 1284 printf(" endphub=0x%08x\n", endphub); 1285 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1286 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1287 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1288 EHCI_QH_GET_MULT(endphub)); 1289 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1290 printf("Overlay qTD:\n"); 1291 ehci_dump_qtd(&qh->qh_qtd); 1292 } 1293 1294 #ifdef DIAGNOSTIC 1295 Static void 1296 ehci_dump_exfer(struct ehci_xfer *ex) 1297 { 1298 printf("ehci_dump_exfer: ex=%p\n", ex); 1299 } 1300 #endif 1301 #endif 1302 1303 usbd_status 1304 ehci_open(usbd_pipe_handle pipe) 1305 { 1306 usbd_device_handle dev = pipe->device; 1307 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1308 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1309 u_int8_t addr = dev->address; 1310 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1311 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1312 ehci_soft_qh_t *sqh; 1313 usbd_status err; 1314 int s; 1315 int ival, speed, naks; 1316 int hshubaddr, hshubport; 1317 1318 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1319 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1320 1321 if (dev->myhsport) { 1322 hshubaddr = dev->myhsport->parent->address; 1323 hshubport = dev->myhsport->portno; 1324 } else { 1325 hshubaddr = 0; 1326 hshubport = 0; 1327 } 1328 1329 if (sc->sc_dying) 1330 return (USBD_IOERROR); 1331 1332 epipe->nexttoggle = 0; 1333 1334 if (addr == sc->sc_addr) { 1335 switch (ed->bEndpointAddress) { 1336 case USB_CONTROL_ENDPOINT: 1337 pipe->methods = &ehci_root_ctrl_methods; 1338 break; 1339 case UE_DIR_IN | EHCI_INTR_ENDPT: 1340 pipe->methods = &ehci_root_intr_methods; 1341 break; 1342 default: 1343 return (USBD_INVAL); 1344 } 1345 return (USBD_NORMAL_COMPLETION); 1346 } 1347 1348 /* XXX All this stuff is only valid for async. */ 1349 switch (dev->speed) { 1350 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1351 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1352 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1353 default: panic("ehci_open: bad device speed %d", dev->speed); 1354 } 1355 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1356 printf("%s: *** WARNING: opening low/full speed isoc device, " 1357 "this does not work yet.\n", 1358 USBDEVNAME(sc->sc_bus.bdev)); 1359 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1360 hshubaddr, hshubport)); 1361 return USBD_INVAL; 1362 } 1363 1364 naks = 8; /* XXX */ 1365 sqh = ehci_alloc_sqh(sc); 1366 if (sqh == NULL) 1367 return (USBD_NOMEM); 1368 /* qh_link filled when the QH is added */ 1369 sqh->qh.qh_endp = htole32( 1370 EHCI_QH_SET_ADDR(addr) | 1371 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1372 EHCI_QH_SET_EPS(speed) | 1373 EHCI_QH_DTC | 1374 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1375 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1376 EHCI_QH_CTL : 0) | 1377 EHCI_QH_SET_NRL(naks) 1378 ); 1379 sqh->qh.qh_endphub = htole32( 1380 EHCI_QH_SET_MULT(1) | 1381 EHCI_QH_SET_HUBA(hshubaddr) | 1382 EHCI_QH_SET_PORT(hshubport) | 1383 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1384 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1385 ); 1386 sqh->qh.qh_curqtd = EHCI_NULL; 1387 /* Fill the overlay qTD */ 1388 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1389 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1390 sqh->qh.qh_qtd.qtd_status = htole32(0); 1391 1392 epipe->sqh = sqh; 1393 1394 switch (xfertype) { 1395 case UE_CONTROL: 1396 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1397 0, &epipe->u.ctl.reqdma); 1398 #ifdef EHCI_DEBUG 1399 if (err) 1400 printf("ehci_open: usb_allocmem()=%d\n", err); 1401 #endif 1402 if (err) 1403 goto bad; 1404 pipe->methods = &ehci_device_ctrl_methods; 1405 s = splusb(); 1406 ehci_add_qh(sqh, sc->sc_async_head); 1407 splx(s); 1408 break; 1409 case UE_BULK: 1410 pipe->methods = &ehci_device_bulk_methods; 1411 s = splusb(); 1412 ehci_add_qh(sqh, sc->sc_async_head); 1413 splx(s); 1414 break; 1415 case UE_INTERRUPT: 1416 pipe->methods = &ehci_device_intr_methods; 1417 ival = pipe->interval; 1418 if (ival == USBD_DEFAULT_INTERVAL) { 1419 if (speed == EHCI_QH_SPEED_HIGH) { 1420 if (ed->bInterval > 16) { 1421 /* 1422 * illegal with high-speed, but there 1423 * were documentation bugs in the spec, 1424 * so be generous 1425 */ 1426 ival = 256; 1427 } else 1428 ival = (1 << (ed->bInterval - 1)) / 8; 1429 } else 1430 ival = ed->bInterval; 1431 } 1432 err = ehci_device_setintr(sc, sqh, ival); 1433 if (err) 1434 goto bad; 1435 break; 1436 case UE_ISOCHRONOUS: 1437 pipe->methods = &ehci_device_isoc_methods; 1438 /* FALLTHROUGH */ 1439 default: 1440 err = USBD_INVAL; 1441 goto bad; 1442 } 1443 return (USBD_NORMAL_COMPLETION); 1444 1445 bad: 1446 ehci_free_sqh(sc, sqh); 1447 return (err); 1448 } 1449 1450 /* 1451 * Add an ED to the schedule. Called at splusb(). 1452 */ 1453 void 1454 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1455 { 1456 SPLUSBCHECK; 1457 1458 sqh->next = head->next; 1459 sqh->qh.qh_link = head->qh.qh_link; 1460 head->next = sqh; 1461 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1462 1463 #ifdef EHCI_DEBUG 1464 if (ehcidebug > 5) { 1465 printf("ehci_add_qh:\n"); 1466 ehci_dump_sqh(sqh); 1467 } 1468 #endif 1469 } 1470 1471 /* 1472 * Remove an ED from the schedule. Called at splusb(). 1473 */ 1474 void 1475 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1476 { 1477 ehci_soft_qh_t *p; 1478 1479 SPLUSBCHECK; 1480 /* XXX */ 1481 for (p = head; p != NULL && p->next != sqh; p = p->next) 1482 ; 1483 if (p == NULL) 1484 panic("ehci_rem_qh: ED not found"); 1485 p->next = sqh->next; 1486 p->qh.qh_link = sqh->qh.qh_link; 1487 1488 ehci_sync_hc(sc); 1489 } 1490 1491 void 1492 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1493 { 1494 int i; 1495 u_int32_t status; 1496 1497 /* Save toggle bit and ping status. */ 1498 status = sqh->qh.qh_qtd.qtd_status & 1499 htole32(EHCI_QTD_TOGGLE_MASK | 1500 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1501 /* Set HALTED to make hw leave it alone. */ 1502 sqh->qh.qh_qtd.qtd_status = 1503 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1504 sqh->qh.qh_curqtd = 0; 1505 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1506 sqh->qh.qh_qtd.qtd_altnext = 0; 1507 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1508 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1509 sqh->sqtd = sqtd; 1510 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1511 sqh->qh.qh_qtd.qtd_status = status; 1512 } 1513 1514 /* 1515 * Ensure that the HC has released all references to the QH. We do this 1516 * by asking for a Async Advance Doorbell interrupt and then we wait for 1517 * the interrupt. 1518 * To make this easier we first obtain exclusive use of the doorbell. 1519 */ 1520 void 1521 ehci_sync_hc(ehci_softc_t *sc) 1522 { 1523 int s, error; 1524 1525 if (sc->sc_dying) { 1526 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1527 return; 1528 } 1529 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1530 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1531 s = splhardusb(); 1532 /* ask for doorbell */ 1533 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1534 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1535 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1536 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1537 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1538 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1539 splx(s); 1540 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1541 #ifdef DIAGNOSTIC 1542 if (error) 1543 printf("ehci_sync_hc: tsleep() = %d\n", error); 1544 #endif 1545 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1546 } 1547 1548 /***********/ 1549 1550 /* 1551 * Data structures and routines to emulate the root hub. 1552 */ 1553 Static usb_device_descriptor_t ehci_devd = { 1554 USB_DEVICE_DESCRIPTOR_SIZE, 1555 UDESC_DEVICE, /* type */ 1556 {0x00, 0x02}, /* USB version */ 1557 UDCLASS_HUB, /* class */ 1558 UDSUBCLASS_HUB, /* subclass */ 1559 UDPROTO_HSHUBSTT, /* protocol */ 1560 64, /* max packet */ 1561 {0},{0},{0x00,0x01}, /* device id */ 1562 1,2,0, /* string indicies */ 1563 1 /* # of configurations */ 1564 }; 1565 1566 Static const usb_device_qualifier_t ehci_odevd = { 1567 USB_DEVICE_DESCRIPTOR_SIZE, 1568 UDESC_DEVICE_QUALIFIER, /* type */ 1569 {0x00, 0x02}, /* USB version */ 1570 UDCLASS_HUB, /* class */ 1571 UDSUBCLASS_HUB, /* subclass */ 1572 UDPROTO_FSHUB, /* protocol */ 1573 64, /* max packet */ 1574 1, /* # of configurations */ 1575 0 1576 }; 1577 1578 Static const usb_config_descriptor_t ehci_confd = { 1579 USB_CONFIG_DESCRIPTOR_SIZE, 1580 UDESC_CONFIG, 1581 {USB_CONFIG_DESCRIPTOR_SIZE + 1582 USB_INTERFACE_DESCRIPTOR_SIZE + 1583 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1584 1, 1585 1, 1586 0, 1587 UC_ATTR_MBO | UC_SELF_POWERED, 1588 0 /* max power */ 1589 }; 1590 1591 Static const usb_interface_descriptor_t ehci_ifcd = { 1592 USB_INTERFACE_DESCRIPTOR_SIZE, 1593 UDESC_INTERFACE, 1594 0, 1595 0, 1596 1, 1597 UICLASS_HUB, 1598 UISUBCLASS_HUB, 1599 UIPROTO_HSHUBSTT, 1600 0 1601 }; 1602 1603 Static const usb_endpoint_descriptor_t ehci_endpd = { 1604 USB_ENDPOINT_DESCRIPTOR_SIZE, 1605 UDESC_ENDPOINT, 1606 UE_DIR_IN | EHCI_INTR_ENDPT, 1607 UE_INTERRUPT, 1608 {8, 0}, /* max packet */ 1609 12 1610 }; 1611 1612 Static const usb_hub_descriptor_t ehci_hubd = { 1613 USB_HUB_DESCRIPTOR_SIZE, 1614 UDESC_HUB, 1615 0, 1616 {0,0}, 1617 0, 1618 0, 1619 {""}, 1620 {""}, 1621 }; 1622 1623 Static int 1624 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1625 { 1626 int i; 1627 1628 if (l == 0) 1629 return (0); 1630 p->bLength = 2 * strlen(s) + 2; 1631 if (l == 1) 1632 return (1); 1633 p->bDescriptorType = UDESC_STRING; 1634 l -= 2; 1635 for (i = 0; s[i] && l > 1; i++, l -= 2) 1636 USETW2(p->bString[i], 0, s[i]); 1637 return (2*i+2); 1638 } 1639 1640 /* 1641 * Simulate a hardware hub by handling all the necessary requests. 1642 */ 1643 Static usbd_status 1644 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1645 { 1646 usbd_status err; 1647 1648 /* Insert last in queue. */ 1649 err = usb_insert_transfer(xfer); 1650 if (err) 1651 return (err); 1652 1653 /* Pipe isn't running, start first */ 1654 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1655 } 1656 1657 Static usbd_status 1658 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1659 { 1660 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1661 usb_device_request_t *req; 1662 void *buf = NULL; 1663 int port, i; 1664 int s, len, value, index, l, totlen = 0; 1665 usb_port_status_t ps; 1666 usb_hub_descriptor_t hubd; 1667 usbd_status err; 1668 u_int32_t v; 1669 1670 if (sc->sc_dying) 1671 return (USBD_IOERROR); 1672 1673 #ifdef DIAGNOSTIC 1674 if (!(xfer->rqflags & URQ_REQUEST)) 1675 /* XXX panic */ 1676 return (USBD_INVAL); 1677 #endif 1678 req = &xfer->request; 1679 1680 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1681 req->bmRequestType, req->bRequest)); 1682 1683 len = UGETW(req->wLength); 1684 value = UGETW(req->wValue); 1685 index = UGETW(req->wIndex); 1686 1687 if (len != 0) 1688 buf = KERNADDR(&xfer->dmabuf, 0); 1689 1690 #define C(x,y) ((x) | ((y) << 8)) 1691 switch(C(req->bRequest, req->bmRequestType)) { 1692 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1693 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1694 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1695 /* 1696 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1697 * for the integrated root hub. 1698 */ 1699 break; 1700 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1701 if (len > 0) { 1702 *(u_int8_t *)buf = sc->sc_conf; 1703 totlen = 1; 1704 } 1705 break; 1706 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1707 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1708 if (len == 0) 1709 break; 1710 switch(value >> 8) { 1711 case UDESC_DEVICE: 1712 if ((value & 0xff) != 0) { 1713 err = USBD_IOERROR; 1714 goto ret; 1715 } 1716 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1717 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1718 memcpy(buf, &ehci_devd, l); 1719 break; 1720 /* 1721 * We can't really operate at another speed, but the spec says 1722 * we need this descriptor. 1723 */ 1724 case UDESC_DEVICE_QUALIFIER: 1725 if ((value & 0xff) != 0) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1730 memcpy(buf, &ehci_odevd, l); 1731 break; 1732 /* 1733 * We can't really operate at another speed, but the spec says 1734 * we need this descriptor. 1735 */ 1736 case UDESC_OTHER_SPEED_CONFIGURATION: 1737 case UDESC_CONFIG: 1738 if ((value & 0xff) != 0) { 1739 err = USBD_IOERROR; 1740 goto ret; 1741 } 1742 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1743 memcpy(buf, &ehci_confd, l); 1744 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1745 value >> 8; 1746 buf = (char *)buf + l; 1747 len -= l; 1748 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1749 totlen += l; 1750 memcpy(buf, &ehci_ifcd, l); 1751 buf = (char *)buf + l; 1752 len -= l; 1753 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1754 totlen += l; 1755 memcpy(buf, &ehci_endpd, l); 1756 break; 1757 case UDESC_STRING: 1758 *(u_int8_t *)buf = 0; 1759 totlen = 1; 1760 switch (value & 0xff) { 1761 case 0: /* Language table */ 1762 if (len > 0) 1763 *(u_int8_t *)buf = 4; 1764 if (len >= 4) { 1765 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1766 totlen = 4; 1767 } 1768 break; 1769 case 1: /* Vendor */ 1770 totlen = ehci_str(buf, len, sc->sc_vendor); 1771 break; 1772 case 2: /* Product */ 1773 totlen = ehci_str(buf, len, "EHCI root hub"); 1774 break; 1775 } 1776 break; 1777 default: 1778 err = USBD_IOERROR; 1779 goto ret; 1780 } 1781 break; 1782 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1783 if (len > 0) { 1784 *(u_int8_t *)buf = 0; 1785 totlen = 1; 1786 } 1787 break; 1788 case C(UR_GET_STATUS, UT_READ_DEVICE): 1789 if (len > 1) { 1790 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1791 totlen = 2; 1792 } 1793 break; 1794 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1795 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1796 if (len > 1) { 1797 USETW(((usb_status_t *)buf)->wStatus, 0); 1798 totlen = 2; 1799 } 1800 break; 1801 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1802 if (value >= USB_MAX_DEVICES) { 1803 err = USBD_IOERROR; 1804 goto ret; 1805 } 1806 sc->sc_addr = value; 1807 break; 1808 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1809 if (value != 0 && value != 1) { 1810 err = USBD_IOERROR; 1811 goto ret; 1812 } 1813 sc->sc_conf = value; 1814 break; 1815 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1816 break; 1817 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1818 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1819 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1820 err = USBD_IOERROR; 1821 goto ret; 1822 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1823 break; 1824 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1825 break; 1826 /* Hub requests */ 1827 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1828 break; 1829 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1830 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1831 "port=%d feature=%d\n", 1832 index, value)); 1833 if (index < 1 || index > sc->sc_noport) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 port = EHCI_PORTSC(index); 1838 v = EOREAD4(sc, port); 1839 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1840 v &= ~EHCI_PS_CLEAR; 1841 switch(value) { 1842 case UHF_PORT_ENABLE: 1843 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1844 break; 1845 case UHF_PORT_SUSPEND: 1846 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1847 break; 1848 case UHF_PORT_POWER: 1849 if (sc->sc_hasppc) 1850 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1851 break; 1852 case UHF_PORT_TEST: 1853 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1854 "%d\n", index)); 1855 break; 1856 case UHF_PORT_INDICATOR: 1857 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1858 "%d\n", index)); 1859 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1860 break; 1861 case UHF_C_PORT_CONNECTION: 1862 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1863 break; 1864 case UHF_C_PORT_ENABLE: 1865 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1866 break; 1867 case UHF_C_PORT_SUSPEND: 1868 /* how? */ 1869 break; 1870 case UHF_C_PORT_OVER_CURRENT: 1871 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1872 break; 1873 case UHF_C_PORT_RESET: 1874 sc->sc_isreset[index] = 0; 1875 break; 1876 default: 1877 err = USBD_IOERROR; 1878 goto ret; 1879 } 1880 #if 0 1881 switch(value) { 1882 case UHF_C_PORT_CONNECTION: 1883 case UHF_C_PORT_ENABLE: 1884 case UHF_C_PORT_SUSPEND: 1885 case UHF_C_PORT_OVER_CURRENT: 1886 case UHF_C_PORT_RESET: 1887 default: 1888 break; 1889 } 1890 #endif 1891 break; 1892 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1893 if (len == 0) 1894 break; 1895 if ((value & 0xff) != 0) { 1896 err = USBD_IOERROR; 1897 goto ret; 1898 } 1899 hubd = ehci_hubd; 1900 hubd.bNbrPorts = sc->sc_noport; 1901 v = EOREAD4(sc, EHCI_HCSPARAMS); 1902 USETW(hubd.wHubCharacteristics, 1903 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1904 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1905 ? UHD_PORT_IND : 0); 1906 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1907 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1908 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1909 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1910 l = min(len, hubd.bDescLength); 1911 totlen = l; 1912 memcpy(buf, &hubd, l); 1913 break; 1914 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1915 if (len != 4) { 1916 err = USBD_IOERROR; 1917 goto ret; 1918 } 1919 memset(buf, 0, len); /* ? XXX */ 1920 totlen = len; 1921 break; 1922 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1923 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1924 index)); 1925 if (index < 1 || index > sc->sc_noport) { 1926 err = USBD_IOERROR; 1927 goto ret; 1928 } 1929 if (len != 4) { 1930 err = USBD_IOERROR; 1931 goto ret; 1932 } 1933 v = EOREAD4(sc, EHCI_PORTSC(index)); 1934 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1935 v)); 1936 i = UPS_HIGH_SPEED; 1937 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1938 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1939 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1940 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1941 if (v & EHCI_PS_PR) i |= UPS_RESET; 1942 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1943 USETW(ps.wPortStatus, i); 1944 i = 0; 1945 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1946 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1947 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1948 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1949 USETW(ps.wPortChange, i); 1950 l = min(len, sizeof ps); 1951 memcpy(buf, &ps, l); 1952 totlen = l; 1953 break; 1954 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1955 err = USBD_IOERROR; 1956 goto ret; 1957 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1958 break; 1959 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1960 if (index < 1 || index > sc->sc_noport) { 1961 err = USBD_IOERROR; 1962 goto ret; 1963 } 1964 port = EHCI_PORTSC(index); 1965 v = EOREAD4(sc, port); 1966 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1967 v &= ~EHCI_PS_CLEAR; 1968 switch(value) { 1969 case UHF_PORT_ENABLE: 1970 EOWRITE4(sc, port, v | EHCI_PS_PE); 1971 break; 1972 case UHF_PORT_SUSPEND: 1973 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1974 break; 1975 case UHF_PORT_RESET: 1976 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1977 index)); 1978 if (EHCI_PS_IS_LOWSPEED(v)) { 1979 /* Low speed device, give up ownership. */ 1980 ehci_disown(sc, index, 1); 1981 break; 1982 } 1983 /* Start reset sequence. */ 1984 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1985 EOWRITE4(sc, port, v | EHCI_PS_PR); 1986 /* Wait for reset to complete. */ 1987 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1988 if (sc->sc_dying) { 1989 err = USBD_IOERROR; 1990 goto ret; 1991 } 1992 /* Terminate reset sequence. */ 1993 EOWRITE4(sc, port, v); 1994 /* Wait for HC to complete reset. */ 1995 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1996 if (sc->sc_dying) { 1997 err = USBD_IOERROR; 1998 goto ret; 1999 } 2000 v = EOREAD4(sc, port); 2001 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2002 if (v & EHCI_PS_PR) { 2003 printf("%s: port reset timeout\n", 2004 USBDEVNAME(sc->sc_bus.bdev)); 2005 return (USBD_TIMEOUT); 2006 } 2007 if (!(v & EHCI_PS_PE)) { 2008 /* Not a high speed device, give up ownership.*/ 2009 ehci_disown(sc, index, 0); 2010 break; 2011 } 2012 sc->sc_isreset[index] = 1; 2013 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2014 index, v)); 2015 break; 2016 case UHF_PORT_POWER: 2017 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2018 "%d (has PPC = %d)\n", index, 2019 sc->sc_hasppc)); 2020 if (sc->sc_hasppc) 2021 EOWRITE4(sc, port, v | EHCI_PS_PP); 2022 break; 2023 case UHF_PORT_TEST: 2024 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2025 "%d\n", index)); 2026 break; 2027 case UHF_PORT_INDICATOR: 2028 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2029 "%d\n", index)); 2030 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2031 break; 2032 default: 2033 err = USBD_IOERROR; 2034 goto ret; 2035 } 2036 break; 2037 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2038 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2039 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2040 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2041 break; 2042 default: 2043 err = USBD_IOERROR; 2044 goto ret; 2045 } 2046 xfer->actlen = totlen; 2047 err = USBD_NORMAL_COMPLETION; 2048 ret: 2049 xfer->status = err; 2050 s = splusb(); 2051 usb_transfer_complete(xfer); 2052 splx(s); 2053 return (USBD_IN_PROGRESS); 2054 } 2055 2056 void 2057 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2058 { 2059 int port; 2060 u_int32_t v; 2061 2062 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2063 #ifdef DIAGNOSTIC 2064 if (sc->sc_npcomp != 0) { 2065 int i = (index-1) / sc->sc_npcomp; 2066 if (i >= sc->sc_ncomp) 2067 printf("%s: strange port\n", 2068 USBDEVNAME(sc->sc_bus.bdev)); 2069 else 2070 printf("%s: handing over %s speed device on " 2071 "port %d to %s\n", 2072 USBDEVNAME(sc->sc_bus.bdev), 2073 lowspeed ? "low" : "full", 2074 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2075 } else { 2076 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2077 } 2078 #endif 2079 port = EHCI_PORTSC(index); 2080 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2081 EOWRITE4(sc, port, v | EHCI_PS_PO); 2082 } 2083 2084 /* Abort a root control request. */ 2085 Static void 2086 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2087 { 2088 /* Nothing to do, all transfers are synchronous. */ 2089 } 2090 2091 /* Close the root pipe. */ 2092 Static void 2093 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2094 { 2095 DPRINTF(("ehci_root_ctrl_close\n")); 2096 /* Nothing to do. */ 2097 } 2098 2099 void 2100 ehci_root_intr_done(usbd_xfer_handle xfer) 2101 { 2102 xfer->hcpriv = NULL; 2103 } 2104 2105 Static usbd_status 2106 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2107 { 2108 usbd_status err; 2109 2110 /* Insert last in queue. */ 2111 err = usb_insert_transfer(xfer); 2112 if (err) 2113 return (err); 2114 2115 /* Pipe isn't running, start first */ 2116 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2117 } 2118 2119 Static usbd_status 2120 ehci_root_intr_start(usbd_xfer_handle xfer) 2121 { 2122 usbd_pipe_handle pipe = xfer->pipe; 2123 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2124 2125 if (sc->sc_dying) 2126 return (USBD_IOERROR); 2127 2128 sc->sc_intrxfer = xfer; 2129 2130 return (USBD_IN_PROGRESS); 2131 } 2132 2133 /* Abort a root interrupt request. */ 2134 Static void 2135 ehci_root_intr_abort(usbd_xfer_handle xfer) 2136 { 2137 int s; 2138 2139 if (xfer->pipe->intrxfer == xfer) { 2140 DPRINTF(("ehci_root_intr_abort: remove\n")); 2141 xfer->pipe->intrxfer = NULL; 2142 } 2143 xfer->status = USBD_CANCELLED; 2144 s = splusb(); 2145 usb_transfer_complete(xfer); 2146 splx(s); 2147 } 2148 2149 /* Close the root pipe. */ 2150 Static void 2151 ehci_root_intr_close(usbd_pipe_handle pipe) 2152 { 2153 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2154 2155 DPRINTF(("ehci_root_intr_close\n")); 2156 2157 sc->sc_intrxfer = NULL; 2158 } 2159 2160 void 2161 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2162 { 2163 xfer->hcpriv = NULL; 2164 } 2165 2166 /************************/ 2167 2168 ehci_soft_qh_t * 2169 ehci_alloc_sqh(ehci_softc_t *sc) 2170 { 2171 ehci_soft_qh_t *sqh; 2172 usbd_status err; 2173 int i, offs; 2174 usb_dma_t dma; 2175 2176 if (sc->sc_freeqhs == NULL) { 2177 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2178 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2179 EHCI_PAGE_SIZE, &dma); 2180 #ifdef EHCI_DEBUG 2181 if (err) 2182 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2183 #endif 2184 if (err) 2185 return (NULL); 2186 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2187 offs = i * EHCI_SQH_SIZE; 2188 sqh = KERNADDR(&dma, offs); 2189 sqh->physaddr = DMAADDR(&dma, offs); 2190 sqh->next = sc->sc_freeqhs; 2191 sc->sc_freeqhs = sqh; 2192 } 2193 } 2194 sqh = sc->sc_freeqhs; 2195 sc->sc_freeqhs = sqh->next; 2196 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2197 sqh->next = NULL; 2198 return (sqh); 2199 } 2200 2201 void 2202 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2203 { 2204 sqh->next = sc->sc_freeqhs; 2205 sc->sc_freeqhs = sqh; 2206 } 2207 2208 ehci_soft_qtd_t * 2209 ehci_alloc_sqtd(ehci_softc_t *sc) 2210 { 2211 ehci_soft_qtd_t *sqtd; 2212 usbd_status err; 2213 int i, offs; 2214 usb_dma_t dma; 2215 int s; 2216 2217 if (sc->sc_freeqtds == NULL) { 2218 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2219 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2220 EHCI_PAGE_SIZE, &dma); 2221 #ifdef EHCI_DEBUG 2222 if (err) 2223 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2224 #endif 2225 if (err) 2226 return (NULL); 2227 s = splusb(); 2228 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2229 offs = i * EHCI_SQTD_SIZE; 2230 sqtd = KERNADDR(&dma, offs); 2231 sqtd->physaddr = DMAADDR(&dma, offs); 2232 sqtd->nextqtd = sc->sc_freeqtds; 2233 sc->sc_freeqtds = sqtd; 2234 } 2235 splx(s); 2236 } 2237 2238 s = splusb(); 2239 sqtd = sc->sc_freeqtds; 2240 sc->sc_freeqtds = sqtd->nextqtd; 2241 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2242 sqtd->nextqtd = NULL; 2243 sqtd->xfer = NULL; 2244 splx(s); 2245 2246 return (sqtd); 2247 } 2248 2249 void 2250 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2251 { 2252 int s; 2253 2254 s = splusb(); 2255 sqtd->nextqtd = sc->sc_freeqtds; 2256 sc->sc_freeqtds = sqtd; 2257 splx(s); 2258 } 2259 2260 usbd_status 2261 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2262 int alen, int rd, usbd_xfer_handle xfer, 2263 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2264 { 2265 ehci_soft_qtd_t *next, *cur; 2266 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2267 u_int32_t qtdstatus; 2268 int len, curlen, mps; 2269 int i, tog; 2270 usb_dma_t *dma = &xfer->dmabuf; 2271 u_int16_t flags = xfer->flags; 2272 2273 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2274 2275 len = alen; 2276 dataphys = DMAADDR(dma, 0); 2277 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2278 qtdstatus = EHCI_QTD_ACTIVE | 2279 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2280 EHCI_QTD_SET_CERR(3) 2281 /* IOC set below */ 2282 /* BYTES set below */ 2283 ; 2284 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2285 tog = epipe->nexttoggle; 2286 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2287 2288 cur = ehci_alloc_sqtd(sc); 2289 *sp = cur; 2290 if (cur == NULL) 2291 goto nomem; 2292 for (;;) { 2293 dataphyspage = EHCI_PAGE(dataphys); 2294 /* The EHCI hardware can handle at most 5 pages. */ 2295 if (dataphyslastpage - dataphyspage < 2296 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2297 /* we can handle it in this QTD */ 2298 curlen = len; 2299 } else { 2300 /* must use multiple TDs, fill as much as possible. */ 2301 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2302 EHCI_PAGE_OFFSET(dataphys); 2303 #ifdef DIAGNOSTIC 2304 if (curlen > len) { 2305 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2306 "len=0x%x offs=0x%x\n", curlen, len, 2307 EHCI_PAGE_OFFSET(dataphys)); 2308 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2309 dataphyslastpage, dataphyspage, 2310 dataphys); 2311 curlen = len; 2312 } 2313 #endif 2314 /* the length must be a multiple of the max size */ 2315 curlen -= curlen % mps; 2316 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2317 "curlen=%d\n", curlen)); 2318 #ifdef DIAGNOSTIC 2319 if (curlen == 0) 2320 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2321 #endif 2322 } 2323 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2324 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2325 dataphys, dataphyslastpage, 2326 len, curlen)); 2327 len -= curlen; 2328 2329 /* 2330 * Allocate another transfer if there's more data left, 2331 * or if force last short transfer flag is set and we're 2332 * allocating a multiple of the max packet size. 2333 */ 2334 if (len != 0 || 2335 ((curlen % mps) == 0 && !rd && curlen != 0 && 2336 (flags & USBD_FORCE_SHORT_XFER))) { 2337 next = ehci_alloc_sqtd(sc); 2338 if (next == NULL) 2339 goto nomem; 2340 nextphys = htole32(next->physaddr); 2341 } else { 2342 next = NULL; 2343 nextphys = EHCI_NULL; 2344 } 2345 2346 for (i = 0; i * EHCI_PAGE_SIZE < 2347 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2348 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2349 if (i != 0) /* use offset only in first buffer */ 2350 a = EHCI_PAGE(a); 2351 cur->qtd.qtd_buffer[i] = htole32(a); 2352 cur->qtd.qtd_buffer_hi[i] = 0; 2353 #ifdef DIAGNOSTIC 2354 if (i >= EHCI_QTD_NBUFFERS) { 2355 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2356 goto nomem; 2357 } 2358 #endif 2359 } 2360 cur->nextqtd = next; 2361 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2362 cur->qtd.qtd_status = 2363 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2364 cur->xfer = xfer; 2365 cur->len = curlen; 2366 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2367 dataphys, dataphys + curlen)); 2368 /* adjust the toggle based on the number of packets in this 2369 qtd */ 2370 if (((curlen + mps - 1) / mps) & 1) { 2371 tog ^= 1; 2372 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2373 } 2374 if (next == NULL) 2375 break; 2376 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2377 dataphys += curlen; 2378 cur = next; 2379 } 2380 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2381 *ep = cur; 2382 epipe->nexttoggle = tog; 2383 2384 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2385 *sp, *ep)); 2386 2387 return (USBD_NORMAL_COMPLETION); 2388 2389 nomem: 2390 /* XXX free chain */ 2391 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2392 return (USBD_NOMEM); 2393 } 2394 2395 Static void 2396 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2397 ehci_soft_qtd_t *sqtdend) 2398 { 2399 ehci_soft_qtd_t *p; 2400 int i; 2401 2402 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2403 sqtd, sqtdend)); 2404 2405 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2406 p = sqtd->nextqtd; 2407 ehci_free_sqtd(sc, sqtd); 2408 } 2409 } 2410 2411 /****************/ 2412 2413 /* 2414 * Close a reqular pipe. 2415 * Assumes that there are no pending transactions. 2416 */ 2417 void 2418 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2419 { 2420 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2421 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2422 ehci_soft_qh_t *sqh = epipe->sqh; 2423 int s; 2424 2425 s = splusb(); 2426 ehci_rem_qh(sc, sqh, head); 2427 splx(s); 2428 ehci_free_sqh(sc, epipe->sqh); 2429 } 2430 2431 /* 2432 * Abort a device request. 2433 * If this routine is called at splusb() it guarantees that the request 2434 * will be removed from the hardware scheduling and that the callback 2435 * for it will be called with USBD_CANCELLED status. 2436 * It's impossible to guarantee that the requested transfer will not 2437 * have happened since the hardware runs concurrently. 2438 * If the transaction has already happened we rely on the ordinary 2439 * interrupt processing to process it. 2440 * XXX This is most probably wrong. 2441 */ 2442 void 2443 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2444 { 2445 #define exfer EXFER(xfer) 2446 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2447 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2448 ehci_soft_qh_t *sqh = epipe->sqh; 2449 ehci_soft_qtd_t *sqtd; 2450 ehci_physaddr_t cur; 2451 u_int32_t qhstatus; 2452 int s; 2453 int hit; 2454 int wake; 2455 2456 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2457 2458 if (sc->sc_dying) { 2459 /* If we're dying, just do the software part. */ 2460 s = splusb(); 2461 xfer->status = status; /* make software ignore it */ 2462 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2463 usb_transfer_complete(xfer); 2464 splx(s); 2465 return; 2466 } 2467 2468 if (xfer->device->bus->intr_context || !curproc) 2469 panic("ehci_abort_xfer: not in process context"); 2470 2471 /* 2472 * If an abort is already in progress then just wait for it to 2473 * complete and return. 2474 */ 2475 if (xfer->hcflags & UXFER_ABORTING) { 2476 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2477 #ifdef DIAGNOSTIC 2478 if (status == USBD_TIMEOUT) 2479 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2480 #endif 2481 /* Override the status which might be USBD_TIMEOUT. */ 2482 xfer->status = status; 2483 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2484 xfer->hcflags |= UXFER_ABORTWAIT; 2485 while (xfer->hcflags & UXFER_ABORTING) 2486 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2487 return; 2488 } 2489 xfer->hcflags |= UXFER_ABORTING; 2490 2491 /* 2492 * Step 1: Make interrupt routine and hardware ignore xfer. 2493 */ 2494 s = splusb(); 2495 xfer->status = status; /* make software ignore it */ 2496 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2497 qhstatus = sqh->qh.qh_qtd.qtd_status; 2498 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2499 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2500 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2501 if (sqtd == exfer->sqtdend) 2502 break; 2503 } 2504 splx(s); 2505 2506 /* 2507 * Step 2: Wait until we know hardware has finished any possible 2508 * use of the xfer. Also make sure the soft interrupt routine 2509 * has run. 2510 */ 2511 ehci_sync_hc(sc); 2512 s = splusb(); 2513 #ifdef USB_USE_SOFTINTR 2514 sc->sc_softwake = 1; 2515 #endif /* USB_USE_SOFTINTR */ 2516 usb_schedsoftintr(&sc->sc_bus); 2517 #ifdef USB_USE_SOFTINTR 2518 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2519 #endif /* USB_USE_SOFTINTR */ 2520 splx(s); 2521 2522 /* 2523 * Step 3: Remove any vestiges of the xfer from the hardware. 2524 * The complication here is that the hardware may have executed 2525 * beyond the xfer we're trying to abort. So as we're scanning 2526 * the TDs of this xfer we check if the hardware points to 2527 * any of them. 2528 */ 2529 s = splusb(); /* XXX why? */ 2530 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2531 hit = 0; 2532 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2533 hit |= cur == sqtd->physaddr; 2534 if (sqtd == exfer->sqtdend) 2535 break; 2536 } 2537 sqtd = sqtd->nextqtd; 2538 /* Zap curqtd register if hardware pointed inside the xfer. */ 2539 if (hit && sqtd != NULL) { 2540 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2541 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2542 sqh->qh.qh_qtd.qtd_status = qhstatus; 2543 } else { 2544 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2545 } 2546 2547 /* 2548 * Step 4: Execute callback. 2549 */ 2550 #ifdef DIAGNOSTIC 2551 exfer->isdone = 1; 2552 #endif 2553 wake = xfer->hcflags & UXFER_ABORTWAIT; 2554 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2555 usb_transfer_complete(xfer); 2556 if (wake) 2557 wakeup(&xfer->hcflags); 2558 2559 splx(s); 2560 #undef exfer 2561 } 2562 2563 void 2564 ehci_timeout(void *addr) 2565 { 2566 struct ehci_xfer *exfer = addr; 2567 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2568 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2569 2570 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2571 #ifdef USB_DEBUG 2572 if (ehcidebug > 1) 2573 usbd_dump_pipe(exfer->xfer.pipe); 2574 #endif 2575 2576 if (sc->sc_dying) { 2577 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2578 return; 2579 } 2580 2581 /* Execute the abort in a process context. */ 2582 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2583 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2584 USB_TASKQ_HC); 2585 } 2586 2587 void 2588 ehci_timeout_task(void *addr) 2589 { 2590 usbd_xfer_handle xfer = addr; 2591 int s; 2592 2593 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2594 2595 s = splusb(); 2596 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2597 splx(s); 2598 } 2599 2600 /************************/ 2601 2602 Static usbd_status 2603 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2604 { 2605 usbd_status err; 2606 2607 /* Insert last in queue. */ 2608 err = usb_insert_transfer(xfer); 2609 if (err) 2610 return (err); 2611 2612 /* Pipe isn't running, start first */ 2613 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2614 } 2615 2616 Static usbd_status 2617 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2618 { 2619 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2620 usbd_status err; 2621 2622 if (sc->sc_dying) 2623 return (USBD_IOERROR); 2624 2625 #ifdef DIAGNOSTIC 2626 if (!(xfer->rqflags & URQ_REQUEST)) { 2627 /* XXX panic */ 2628 printf("ehci_device_ctrl_transfer: not a request\n"); 2629 return (USBD_INVAL); 2630 } 2631 #endif 2632 2633 err = ehci_device_request(xfer); 2634 if (err) 2635 return (err); 2636 2637 if (sc->sc_bus.use_polling) 2638 ehci_waitintr(sc, xfer); 2639 return (USBD_IN_PROGRESS); 2640 } 2641 2642 void 2643 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2644 { 2645 struct ehci_xfer *ex = EXFER(xfer); 2646 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2647 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2648 2649 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2650 2651 #ifdef DIAGNOSTIC 2652 if (!(xfer->rqflags & URQ_REQUEST)) { 2653 panic("ehci_ctrl_done: not a request"); 2654 } 2655 #endif 2656 2657 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2658 ehci_del_intr_list(ex); /* remove from active list */ 2659 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2660 } 2661 2662 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2663 } 2664 2665 /* Abort a device control request. */ 2666 Static void 2667 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2668 { 2669 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2670 ehci_abort_xfer(xfer, USBD_CANCELLED); 2671 } 2672 2673 /* Close a device control pipe. */ 2674 Static void 2675 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2676 { 2677 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2678 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2679 2680 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2681 ehci_close_pipe(pipe, sc->sc_async_head); 2682 } 2683 2684 usbd_status 2685 ehci_device_request(usbd_xfer_handle xfer) 2686 { 2687 #define exfer EXFER(xfer) 2688 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2689 usb_device_request_t *req = &xfer->request; 2690 usbd_device_handle dev = epipe->pipe.device; 2691 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2692 int addr = dev->address; 2693 ehci_soft_qtd_t *setup, *stat, *next; 2694 ehci_soft_qh_t *sqh; 2695 int isread; 2696 int len; 2697 usbd_status err; 2698 int s; 2699 2700 isread = req->bmRequestType & UT_READ; 2701 len = UGETW(req->wLength); 2702 2703 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2704 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2705 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2706 UGETW(req->wIndex), len, addr, 2707 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2708 2709 setup = ehci_alloc_sqtd(sc); 2710 if (setup == NULL) { 2711 err = USBD_NOMEM; 2712 goto bad1; 2713 } 2714 stat = ehci_alloc_sqtd(sc); 2715 if (stat == NULL) { 2716 err = USBD_NOMEM; 2717 goto bad2; 2718 } 2719 2720 sqh = epipe->sqh; 2721 epipe->u.ctl.length = len; 2722 2723 /* Update device address and length since they may have changed 2724 during the setup of the control pipe in usbd_new_device(). */ 2725 /* XXX This only needs to be done once, but it's too early in open. */ 2726 /* XXXX Should not touch ED here! */ 2727 sqh->qh.qh_endp = 2728 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2729 htole32( 2730 EHCI_QH_SET_ADDR(addr) | 2731 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2732 ); 2733 2734 /* Set up data transaction */ 2735 if (len != 0) { 2736 ehci_soft_qtd_t *end; 2737 2738 /* Start toggle at 1. */ 2739 epipe->nexttoggle = 1; 2740 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2741 &next, &end); 2742 if (err) 2743 goto bad3; 2744 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2745 end->nextqtd = stat; 2746 end->qtd.qtd_next = 2747 end->qtd.qtd_altnext = htole32(stat->physaddr); 2748 } else { 2749 next = stat; 2750 } 2751 2752 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2753 2754 /* Clear toggle */ 2755 setup->qtd.qtd_status = htole32( 2756 EHCI_QTD_ACTIVE | 2757 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2758 EHCI_QTD_SET_CERR(3) | 2759 EHCI_QTD_SET_TOGGLE(0) | 2760 EHCI_QTD_SET_BYTES(sizeof *req) 2761 ); 2762 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2763 setup->qtd.qtd_buffer_hi[0] = 0; 2764 setup->nextqtd = next; 2765 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2766 setup->xfer = xfer; 2767 setup->len = sizeof *req; 2768 2769 stat->qtd.qtd_status = htole32( 2770 EHCI_QTD_ACTIVE | 2771 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2772 EHCI_QTD_SET_CERR(3) | 2773 EHCI_QTD_SET_TOGGLE(1) | 2774 EHCI_QTD_IOC 2775 ); 2776 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2777 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2778 stat->nextqtd = NULL; 2779 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2780 stat->xfer = xfer; 2781 stat->len = 0; 2782 2783 #ifdef EHCI_DEBUG 2784 if (ehcidebug > 5) { 2785 DPRINTF(("ehci_device_request:\n")); 2786 ehci_dump_sqh(sqh); 2787 ehci_dump_sqtds(setup); 2788 } 2789 #endif 2790 2791 exfer->sqtdstart = setup; 2792 exfer->sqtdend = stat; 2793 #ifdef DIAGNOSTIC 2794 if (!exfer->isdone) { 2795 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2796 } 2797 exfer->isdone = 0; 2798 #endif 2799 2800 /* Insert qTD in QH list. */ 2801 s = splusb(); 2802 ehci_set_qh_qtd(sqh, setup); 2803 if (xfer->timeout && !sc->sc_bus.use_polling) { 2804 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2805 ehci_timeout, xfer); 2806 } 2807 ehci_add_intr_list(sc, exfer); 2808 xfer->status = USBD_IN_PROGRESS; 2809 splx(s); 2810 2811 #ifdef EHCI_DEBUG 2812 if (ehcidebug > 10) { 2813 DPRINTF(("ehci_device_request: status=%x\n", 2814 EOREAD4(sc, EHCI_USBSTS))); 2815 delay(10000); 2816 ehci_dump_regs(sc); 2817 ehci_dump_sqh(sc->sc_async_head); 2818 ehci_dump_sqh(sqh); 2819 ehci_dump_sqtds(setup); 2820 } 2821 #endif 2822 2823 return (USBD_NORMAL_COMPLETION); 2824 2825 bad3: 2826 ehci_free_sqtd(sc, stat); 2827 bad2: 2828 ehci_free_sqtd(sc, setup); 2829 bad1: 2830 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2831 xfer->status = err; 2832 usb_transfer_complete(xfer); 2833 return (err); 2834 #undef exfer 2835 } 2836 2837 /* 2838 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2839 * qTD status, or miss signalling occasionally under heavy load. If the host 2840 * machine is too fast, we we can miss transaction completion - when we scan 2841 * the active list the transaction still seems to be active. This generally 2842 * exhibits itself as a umass stall that never recovers. 2843 * 2844 * We work around this behaviour by setting up this callback after any softintr 2845 * that completes with transactions still pending, giving us another chance to 2846 * check for completion after the writeback has taken place. 2847 */ 2848 void 2849 ehci_intrlist_timeout(void *arg) 2850 { 2851 ehci_softc_t *sc = arg; 2852 int s = splusb(); 2853 2854 DPRINTF(("ehci_intrlist_timeout\n")); 2855 usb_schedsoftintr(&sc->sc_bus); 2856 2857 splx(s); 2858 } 2859 2860 /************************/ 2861 2862 Static usbd_status 2863 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2864 { 2865 usbd_status err; 2866 2867 /* Insert last in queue. */ 2868 err = usb_insert_transfer(xfer); 2869 if (err) 2870 return (err); 2871 2872 /* Pipe isn't running, start first */ 2873 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2874 } 2875 2876 usbd_status 2877 ehci_device_bulk_start(usbd_xfer_handle xfer) 2878 { 2879 #define exfer EXFER(xfer) 2880 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2881 usbd_device_handle dev = epipe->pipe.device; 2882 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2883 ehci_soft_qtd_t *data, *dataend; 2884 ehci_soft_qh_t *sqh; 2885 usbd_status err; 2886 int len, isread, endpt; 2887 int s; 2888 2889 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2890 xfer, xfer->length, xfer->flags)); 2891 2892 if (sc->sc_dying) 2893 return (USBD_IOERROR); 2894 2895 #ifdef DIAGNOSTIC 2896 if (xfer->rqflags & URQ_REQUEST) 2897 panic("ehci_device_bulk_start: a request"); 2898 #endif 2899 2900 len = xfer->length; 2901 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2902 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2903 sqh = epipe->sqh; 2904 2905 epipe->u.bulk.length = len; 2906 2907 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2908 &dataend); 2909 if (err) { 2910 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2911 xfer->status = err; 2912 usb_transfer_complete(xfer); 2913 return (err); 2914 } 2915 2916 #ifdef EHCI_DEBUG 2917 if (ehcidebug > 5) { 2918 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2919 ehci_dump_sqh(sqh); 2920 ehci_dump_sqtds(data); 2921 } 2922 #endif 2923 2924 /* Set up interrupt info. */ 2925 exfer->sqtdstart = data; 2926 exfer->sqtdend = dataend; 2927 #ifdef DIAGNOSTIC 2928 if (!exfer->isdone) { 2929 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2930 } 2931 exfer->isdone = 0; 2932 #endif 2933 2934 s = splusb(); 2935 ehci_set_qh_qtd(sqh, data); 2936 if (xfer->timeout && !sc->sc_bus.use_polling) { 2937 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2938 ehci_timeout, xfer); 2939 } 2940 ehci_add_intr_list(sc, exfer); 2941 xfer->status = USBD_IN_PROGRESS; 2942 splx(s); 2943 2944 #ifdef EHCI_DEBUG 2945 if (ehcidebug > 10) { 2946 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2947 delay(10000); 2948 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2949 ehci_dump_regs(sc); 2950 #if 0 2951 printf("async_head:\n"); 2952 ehci_dump_sqh(sc->sc_async_head); 2953 #endif 2954 printf("sqh:\n"); 2955 ehci_dump_sqh(sqh); 2956 ehci_dump_sqtds(data); 2957 } 2958 #endif 2959 2960 if (sc->sc_bus.use_polling) 2961 ehci_waitintr(sc, xfer); 2962 2963 return (USBD_IN_PROGRESS); 2964 #undef exfer 2965 } 2966 2967 Static void 2968 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2969 { 2970 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2971 ehci_abort_xfer(xfer, USBD_CANCELLED); 2972 } 2973 2974 /* 2975 * Close a device bulk pipe. 2976 */ 2977 Static void 2978 ehci_device_bulk_close(usbd_pipe_handle pipe) 2979 { 2980 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2981 2982 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2983 ehci_close_pipe(pipe, sc->sc_async_head); 2984 } 2985 2986 void 2987 ehci_device_bulk_done(usbd_xfer_handle xfer) 2988 { 2989 struct ehci_xfer *ex = EXFER(xfer); 2990 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2991 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2992 2993 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2994 xfer, xfer->actlen)); 2995 2996 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2997 ehci_del_intr_list(ex); /* remove from active list */ 2998 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2999 } 3000 3001 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3002 } 3003 3004 /************************/ 3005 3006 Static usbd_status 3007 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3008 { 3009 struct ehci_soft_islot *isp; 3010 int islot, lev; 3011 3012 /* Find a poll rate that is large enough. */ 3013 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3014 if (EHCI_ILEV_IVAL(lev) <= ival) 3015 break; 3016 3017 /* Pick an interrupt slot at the right level. */ 3018 /* XXX could do better than picking at random */ 3019 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3020 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3021 3022 sqh->islot = islot; 3023 isp = &sc->sc_islots[islot]; 3024 ehci_add_qh(sqh, isp->sqh); 3025 3026 return (USBD_NORMAL_COMPLETION); 3027 } 3028 3029 Static usbd_status 3030 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3031 { 3032 usbd_status err; 3033 3034 /* Insert last in queue. */ 3035 err = usb_insert_transfer(xfer); 3036 if (err) 3037 return (err); 3038 3039 /* 3040 * Pipe isn't running (otherwise err would be USBD_INPROG), 3041 * so start it first. 3042 */ 3043 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3044 } 3045 3046 Static usbd_status 3047 ehci_device_intr_start(usbd_xfer_handle xfer) 3048 { 3049 #define exfer EXFER(xfer) 3050 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3051 usbd_device_handle dev = xfer->pipe->device; 3052 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3053 ehci_soft_qtd_t *data, *dataend; 3054 ehci_soft_qh_t *sqh; 3055 usbd_status err; 3056 int len, isread, endpt; 3057 int s; 3058 3059 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3060 xfer, xfer->length, xfer->flags)); 3061 3062 if (sc->sc_dying) 3063 return (USBD_IOERROR); 3064 3065 #ifdef DIAGNOSTIC 3066 if (xfer->rqflags & URQ_REQUEST) 3067 panic("ehci_device_intr_start: a request"); 3068 #endif 3069 3070 len = xfer->length; 3071 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3072 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3073 sqh = epipe->sqh; 3074 3075 epipe->u.intr.length = len; 3076 3077 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3078 &dataend); 3079 if (err) { 3080 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3081 xfer->status = err; 3082 usb_transfer_complete(xfer); 3083 return (err); 3084 } 3085 3086 #ifdef EHCI_DEBUG 3087 if (ehcidebug > 5) { 3088 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3089 ehci_dump_sqh(sqh); 3090 ehci_dump_sqtds(data); 3091 } 3092 #endif 3093 3094 /* Set up interrupt info. */ 3095 exfer->sqtdstart = data; 3096 exfer->sqtdend = dataend; 3097 #ifdef DIAGNOSTIC 3098 if (!exfer->isdone) { 3099 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3100 } 3101 exfer->isdone = 0; 3102 #endif 3103 3104 s = splusb(); 3105 ehci_set_qh_qtd(sqh, data); 3106 if (xfer->timeout && !sc->sc_bus.use_polling) { 3107 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3108 ehci_timeout, xfer); 3109 } 3110 ehci_add_intr_list(sc, exfer); 3111 xfer->status = USBD_IN_PROGRESS; 3112 splx(s); 3113 3114 #ifdef EHCI_DEBUG 3115 if (ehcidebug > 10) { 3116 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3117 delay(10000); 3118 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3119 ehci_dump_regs(sc); 3120 printf("sqh:\n"); 3121 ehci_dump_sqh(sqh); 3122 ehci_dump_sqtds(data); 3123 } 3124 #endif 3125 3126 if (sc->sc_bus.use_polling) 3127 ehci_waitintr(sc, xfer); 3128 3129 return (USBD_IN_PROGRESS); 3130 #undef exfer 3131 } 3132 3133 Static void 3134 ehci_device_intr_abort(usbd_xfer_handle xfer) 3135 { 3136 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3137 if (xfer->pipe->intrxfer == xfer) { 3138 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3139 xfer->pipe->intrxfer = NULL; 3140 } 3141 ehci_abort_xfer(xfer, USBD_CANCELLED); 3142 } 3143 3144 Static void 3145 ehci_device_intr_close(usbd_pipe_handle pipe) 3146 { 3147 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3148 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3149 struct ehci_soft_islot *isp; 3150 3151 isp = &sc->sc_islots[epipe->sqh->islot]; 3152 ehci_close_pipe(pipe, isp->sqh); 3153 } 3154 3155 Static void 3156 ehci_device_intr_done(usbd_xfer_handle xfer) 3157 { 3158 #define exfer EXFER(xfer) 3159 struct ehci_xfer *ex = EXFER(xfer); 3160 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3161 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3162 ehci_soft_qtd_t *data, *dataend; 3163 ehci_soft_qh_t *sqh; 3164 usbd_status err; 3165 int len, isread, endpt, s; 3166 3167 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3168 xfer, xfer->actlen)); 3169 3170 if (xfer->pipe->repeat) { 3171 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3172 3173 len = epipe->u.intr.length; 3174 xfer->length = len; 3175 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3176 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3177 sqh = epipe->sqh; 3178 3179 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3180 &data, &dataend); 3181 if (err) { 3182 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3183 xfer->status = err; 3184 return; 3185 } 3186 3187 /* Set up interrupt info. */ 3188 exfer->sqtdstart = data; 3189 exfer->sqtdend = dataend; 3190 #ifdef DIAGNOSTIC 3191 if (!exfer->isdone) { 3192 printf("ehci_device_intr_done: not done, ex=%p\n", 3193 exfer); 3194 } 3195 exfer->isdone = 0; 3196 #endif 3197 3198 s = splusb(); 3199 ehci_set_qh_qtd(sqh, data); 3200 if (xfer->timeout && !sc->sc_bus.use_polling) { 3201 usb_callout(xfer->timeout_handle, 3202 mstohz(xfer->timeout), ehci_timeout, xfer); 3203 } 3204 splx(s); 3205 3206 xfer->status = USBD_IN_PROGRESS; 3207 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3208 ehci_del_intr_list(ex); /* remove from active list */ 3209 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3210 } 3211 #undef exfer 3212 } 3213 3214 /************************/ 3215 3216 Static usbd_status 3217 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3218 { 3219 return USBD_IOERROR; 3220 } 3221 Static usbd_status 3222 ehci_device_isoc_start(usbd_xfer_handle xfer) 3223 { 3224 return USBD_IOERROR; 3225 } 3226 Static void 3227 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3228 { 3229 } 3230 Static void 3231 ehci_device_isoc_close(usbd_pipe_handle pipe) 3232 { 3233 } 3234 Static void 3235 ehci_device_isoc_done(usbd_xfer_handle xfer) 3236 { 3237 } 3238
Indexes created Mon Sep 22 21:09:42 GMT 2025