ehci.c revision 1.127
1 /* $NetBSD: ehci.c,v 1.127 2007/12/09 20:28:23 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.127 2007/12/09 20:28:23 jmcneill Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 91 #ifdef EHCI_DEBUG 92 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 93 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 94 int ehcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 struct ehci_pipe { 104 struct usbd_pipe pipe; 105 int nexttoggle; 106 107 ehci_soft_qh_t *sqh; 108 union { 109 ehci_soft_qtd_t *qtd; 110 /* ehci_soft_itd_t *itd; */ 111 } tail; 112 union { 113 /* Control pipe */ 114 struct { 115 usb_dma_t reqdma; 116 u_int length; 117 } ctl; 118 /* Interrupt pipe */ 119 struct { 120 u_int length; 121 } intr; 122 /* Bulk pipe */ 123 struct { 124 u_int length; 125 } bulk; 126 /* Iso pipe */ 127 /* XXX */ 128 } u; 129 }; 130 131 Static void ehci_shutdown(void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_disown(ehci_softc_t *, int, int); 192 193 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 194 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 195 196 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 197 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 198 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 199 ehci_softc_t *, int, int, usbd_xfer_handle, 200 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 201 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 202 ehci_soft_qtd_t *); 203 204 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 205 206 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 207 int ival); 208 209 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 210 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 211 ehci_soft_qh_t *); 212 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 213 Static void ehci_sync_hc(ehci_softc_t *); 214 215 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 216 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 217 218 #ifdef EHCI_DEBUG 219 Static void ehci_dump_regs(ehci_softc_t *); 220 void ehci_dump(void); 221 Static ehci_softc_t *theehci; 222 Static void ehci_dump_link(ehci_link_t, int); 223 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 224 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 225 Static void ehci_dump_qtd(ehci_qtd_t *); 226 Static void ehci_dump_sqh(ehci_soft_qh_t *); 227 #ifdef DIAGNOSTIC 228 Static void ehci_dump_exfer(struct ehci_xfer *); 229 #endif 230 #endif 231 232 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 233 234 #define EHCI_INTR_ENDPT 1 235 236 #define ehci_add_intr_list(sc, ex) \ 237 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 238 #define ehci_del_intr_list(ex) \ 239 do { \ 240 LIST_REMOVE((ex), inext); \ 241 (ex)->inext.le_prev = NULL; \ 242 } while (0) 243 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 244 245 Static const struct usbd_bus_methods ehci_bus_methods = { 246 ehci_open, 247 ehci_softintr, 248 ehci_poll, 249 ehci_allocm, 250 ehci_freem, 251 ehci_allocx, 252 ehci_freex, 253 }; 254 255 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 256 ehci_root_ctrl_transfer, 257 ehci_root_ctrl_start, 258 ehci_root_ctrl_abort, 259 ehci_root_ctrl_close, 260 ehci_noop, 261 ehci_root_ctrl_done, 262 }; 263 264 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 265 ehci_root_intr_transfer, 266 ehci_root_intr_start, 267 ehci_root_intr_abort, 268 ehci_root_intr_close, 269 ehci_noop, 270 ehci_root_intr_done, 271 }; 272 273 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 274 ehci_device_ctrl_transfer, 275 ehci_device_ctrl_start, 276 ehci_device_ctrl_abort, 277 ehci_device_ctrl_close, 278 ehci_noop, 279 ehci_device_ctrl_done, 280 }; 281 282 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 283 ehci_device_intr_transfer, 284 ehci_device_intr_start, 285 ehci_device_intr_abort, 286 ehci_device_intr_close, 287 ehci_device_clear_toggle, 288 ehci_device_intr_done, 289 }; 290 291 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 292 ehci_device_bulk_transfer, 293 ehci_device_bulk_start, 294 ehci_device_bulk_abort, 295 ehci_device_bulk_close, 296 ehci_device_clear_toggle, 297 ehci_device_bulk_done, 298 }; 299 300 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 301 ehci_device_isoc_transfer, 302 ehci_device_isoc_start, 303 ehci_device_isoc_abort, 304 ehci_device_isoc_close, 305 ehci_noop, 306 ehci_device_isoc_done, 307 }; 308 309 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 310 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 311 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 312 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 313 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 314 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 315 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 316 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 317 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 318 }; 319 320 usbd_status 321 ehci_init(ehci_softc_t *sc) 322 { 323 u_int32_t vers, sparams, cparams, hcr; 324 u_int i; 325 usbd_status err; 326 ehci_soft_qh_t *sqh; 327 u_int ncomp; 328 329 DPRINTF(("ehci_init: start\n")); 330 #ifdef EHCI_DEBUG 331 theehci = sc; 332 #endif 333 334 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 335 336 vers = EREAD2(sc, EHCI_HCIVERSION); 337 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 338 vers >> 8, vers & 0xff); 339 340 sparams = EREAD4(sc, EHCI_HCSPARAMS); 341 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 342 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 343 ncomp = EHCI_HCS_N_CC(sparams); 344 if (ncomp != sc->sc_ncomp) { 345 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 346 USBDEVNAME(sc->sc_bus.bdev), 347 ncomp, sc->sc_ncomp); 348 #if NOHCI == 0 || NUHCI == 0 349 aprint_error("%s: ohci or uhci probably not configured\n", 350 USBDEVNAME(sc->sc_bus.bdev)); 351 #endif 352 if (ncomp < sc->sc_ncomp) 353 sc->sc_ncomp = ncomp; 354 } 355 if (sc->sc_ncomp > 0) { 356 aprint_normal("%s: companion controller%s, %d port%s each:", 357 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 358 EHCI_HCS_N_PCC(sparams), 359 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 360 for (i = 0; i < sc->sc_ncomp; i++) 361 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 362 aprint_normal("\n"); 363 } 364 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 365 cparams = EREAD4(sc, EHCI_HCCPARAMS); 366 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 367 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 368 369 if (EHCI_HCC_64BIT(cparams)) { 370 /* MUST clear segment register if 64 bit capable. */ 371 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 372 } 373 374 sc->sc_bus.usbrev = USBREV_2_0; 375 376 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 377 USB_MEM_RESERVE); 378 379 /* Reset the controller */ 380 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 381 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 382 usb_delay_ms(&sc->sc_bus, 1); 383 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 384 for (i = 0; i < 100; i++) { 385 usb_delay_ms(&sc->sc_bus, 1); 386 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 387 if (!hcr) 388 break; 389 } 390 if (hcr) { 391 aprint_error("%s: reset timeout\n", 392 USBDEVNAME(sc->sc_bus.bdev)); 393 return (USBD_IOERROR); 394 } 395 396 /* XXX need proper intr scheduling */ 397 sc->sc_rand = 96; 398 399 /* frame list size at default, read back what we got and use that */ 400 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 401 case 0: sc->sc_flsize = 1024; break; 402 case 1: sc->sc_flsize = 512; break; 403 case 2: sc->sc_flsize = 256; break; 404 case 3: return (USBD_IOERROR); 405 } 406 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 407 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 408 if (err) 409 return (err); 410 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 411 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 412 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 413 414 /* Set up the bus struct. */ 415 sc->sc_bus.methods = &ehci_bus_methods; 416 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 417 418 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 419 420 sc->sc_eintrs = EHCI_NORMAL_INTRS; 421 422 /* 423 * Allocate the interrupt dummy QHs. These are arranged to give poll 424 * intervals that are powers of 2 times 1ms. 425 */ 426 for (i = 0; i < EHCI_INTRQHS; i++) { 427 sqh = ehci_alloc_sqh(sc); 428 if (sqh == NULL) { 429 err = USBD_NOMEM; 430 goto bad1; 431 } 432 sc->sc_islots[i].sqh = sqh; 433 } 434 for (i = 0; i < EHCI_INTRQHS; i++) { 435 sqh = sc->sc_islots[i].sqh; 436 if (i == 0) { 437 /* The last (1ms) QH terminates. */ 438 sqh->qh.qh_link = EHCI_NULL; 439 sqh->next = NULL; 440 } else { 441 /* Otherwise the next QH has half the poll interval */ 442 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 443 sqh->qh.qh_link = htole32(sqh->next->physaddr | 444 EHCI_LINK_QH); 445 } 446 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 447 sqh->qh.qh_curqtd = EHCI_NULL; 448 sqh->next = NULL; 449 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 451 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 452 sqh->sqtd = NULL; 453 } 454 /* Point the frame list at the last level (128ms). */ 455 for (i = 0; i < sc->sc_flsize; i++) { 456 int j; 457 458 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 459 revbits[i & (EHCI_MAX_POLLRATE-1)]; 460 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 461 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 462 i)].sqh->physaddr); 463 } 464 465 /* Allocate dummy QH that starts the async list. */ 466 sqh = ehci_alloc_sqh(sc); 467 if (sqh == NULL) { 468 err = USBD_NOMEM; 469 goto bad1; 470 } 471 /* Fill the QH */ 472 sqh->qh.qh_endp = 473 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 474 sqh->qh.qh_link = 475 htole32(sqh->physaddr | EHCI_LINK_QH); 476 sqh->qh.qh_curqtd = EHCI_NULL; 477 sqh->next = NULL; 478 /* Fill the overlay qTD */ 479 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 481 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 482 sqh->sqtd = NULL; 483 #ifdef EHCI_DEBUG 484 if (ehcidebug) { 485 ehci_dump_sqh(sqh); 486 } 487 #endif 488 489 /* Point to async list */ 490 sc->sc_async_head = sqh; 491 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 492 493 usb_callout_init(sc->sc_tmo_intrlist); 494 495 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 496 497 /* Turn on controller */ 498 EOWRITE4(sc, EHCI_USBCMD, 499 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 500 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 501 EHCI_CMD_ASE | 502 EHCI_CMD_PSE | 503 EHCI_CMD_RS); 504 505 /* Take over port ownership */ 506 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 507 508 for (i = 0; i < 100; i++) { 509 usb_delay_ms(&sc->sc_bus, 1); 510 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 511 if (!hcr) 512 break; 513 } 514 if (hcr) { 515 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 516 return (USBD_IOERROR); 517 } 518 519 /* Enable interrupts */ 520 DPRINTFN(1,("ehci_init: enabling\n")); 521 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 522 523 return (USBD_NORMAL_COMPLETION); 524 525 #if 0 526 bad2: 527 ehci_free_sqh(sc, sc->sc_async_head); 528 #endif 529 bad1: 530 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 531 return (err); 532 } 533 534 int 535 ehci_intr(void *v) 536 { 537 ehci_softc_t *sc = v; 538 539 if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 540 return (0); 541 542 /* If we get an interrupt while polling, then just ignore it. */ 543 if (sc->sc_bus.use_polling) { 544 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 545 546 if (intrs) 547 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 548 #ifdef DIAGNOSTIC 549 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 550 #endif 551 return (0); 552 } 553 554 return (ehci_intr1(sc)); 555 } 556 557 Static int 558 ehci_intr1(ehci_softc_t *sc) 559 { 560 u_int32_t intrs, eintrs; 561 562 DPRINTFN(20,("ehci_intr1: enter\n")); 563 564 /* In case the interrupt occurs before initialization has completed. */ 565 if (sc == NULL) { 566 #ifdef DIAGNOSTIC 567 printf("ehci_intr1: sc == NULL\n"); 568 #endif 569 return (0); 570 } 571 572 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 573 if (!intrs) 574 return (0); 575 576 eintrs = intrs & sc->sc_eintrs; 577 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 578 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 579 (u_int)eintrs)); 580 if (!eintrs) 581 return (0); 582 583 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 584 sc->sc_bus.intr_context++; 585 sc->sc_bus.no_intrs++; 586 if (eintrs & EHCI_STS_IAA) { 587 DPRINTF(("ehci_intr1: door bell\n")); 588 wakeup(&sc->sc_async_head); 589 eintrs &= ~EHCI_STS_IAA; 590 } 591 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 592 DPRINTFN(5,("ehci_intr1: %s %s\n", 593 eintrs & EHCI_STS_INT ? "INT" : "", 594 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 595 usb_schedsoftintr(&sc->sc_bus); 596 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 597 } 598 if (eintrs & EHCI_STS_HSE) { 599 printf("%s: unrecoverable error, controller halted\n", 600 USBDEVNAME(sc->sc_bus.bdev)); 601 /* XXX what else */ 602 } 603 if (eintrs & EHCI_STS_PCD) { 604 ehci_pcd(sc, sc->sc_intrxfer); 605 eintrs &= ~EHCI_STS_PCD; 606 } 607 608 sc->sc_bus.intr_context--; 609 610 if (eintrs != 0) { 611 /* Block unprocessed interrupts. */ 612 sc->sc_eintrs &= ~eintrs; 613 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 614 printf("%s: blocking intrs 0x%x\n", 615 USBDEVNAME(sc->sc_bus.bdev), eintrs); 616 } 617 618 return (1); 619 } 620 621 622 void 623 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 624 { 625 usbd_pipe_handle pipe; 626 u_char *p; 627 int i, m; 628 629 if (xfer == NULL) { 630 /* Just ignore the change. */ 631 return; 632 } 633 634 pipe = xfer->pipe; 635 636 p = KERNADDR(&xfer->dmabuf, 0); 637 m = min(sc->sc_noport, xfer->length * 8 - 1); 638 memset(p, 0, xfer->length); 639 for (i = 1; i <= m; i++) { 640 /* Pick out CHANGE bits from the status reg. */ 641 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 642 p[i/8] |= 1 << (i%8); 643 } 644 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 645 xfer->actlen = xfer->length; 646 xfer->status = USBD_NORMAL_COMPLETION; 647 648 usb_transfer_complete(xfer); 649 } 650 651 void 652 ehci_softintr(void *v) 653 { 654 ehci_softc_t *sc = v; 655 struct ehci_xfer *ex, *nextex; 656 657 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 658 sc->sc_bus.intr_context)); 659 660 sc->sc_bus.intr_context++; 661 662 /* 663 * The only explanation I can think of for why EHCI is as brain dead 664 * as UHCI interrupt-wise is that Intel was involved in both. 665 * An interrupt just tells us that something is done, we have no 666 * clue what, so we need to scan through all active transfers. :-( 667 */ 668 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 669 nextex = LIST_NEXT(ex, inext); 670 ehci_check_intr(sc, ex); 671 } 672 673 /* Schedule a callout to catch any dropped transactions. */ 674 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 675 !LIST_EMPTY(&sc->sc_intrhead)) 676 usb_callout(sc->sc_tmo_intrlist, hz, 677 ehci_intrlist_timeout, sc); 678 679 #ifdef USB_USE_SOFTINTR 680 if (sc->sc_softwake) { 681 sc->sc_softwake = 0; 682 wakeup(&sc->sc_softwake); 683 } 684 #endif /* USB_USE_SOFTINTR */ 685 686 sc->sc_bus.intr_context--; 687 } 688 689 /* Check for an interrupt. */ 690 void 691 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 692 { 693 ehci_soft_qtd_t *sqtd, *lsqtd; 694 u_int32_t status; 695 696 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 697 698 if (ex->sqtdstart == NULL) { 699 printf("ehci_check_intr: sqtdstart=NULL\n"); 700 return; 701 } 702 lsqtd = ex->sqtdend; 703 #ifdef DIAGNOSTIC 704 if (lsqtd == NULL) { 705 printf("ehci_check_intr: lsqtd==0\n"); 706 return; 707 } 708 #endif 709 /* 710 * If the last TD is still active we need to check whether there 711 * is a an error somewhere in the middle, or whether there was a 712 * short packet (SPD and not ACTIVE). 713 */ 714 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 715 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 716 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 717 status = le32toh(sqtd->qtd.qtd_status); 718 /* If there's an active QTD the xfer isn't done. */ 719 if (status & EHCI_QTD_ACTIVE) 720 break; 721 /* Any kind of error makes the xfer done. */ 722 if (status & EHCI_QTD_HALTED) 723 goto done; 724 /* We want short packets, and it is short: it's done */ 725 if (EHCI_QTD_GET_BYTES(status) != 0) 726 goto done; 727 } 728 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 729 ex, ex->sqtdstart)); 730 return; 731 } 732 done: 733 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 734 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 735 ehci_idone(ex); 736 } 737 738 void 739 ehci_idone(struct ehci_xfer *ex) 740 { 741 usbd_xfer_handle xfer = &ex->xfer; 742 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 743 ehci_soft_qtd_t *sqtd, *lsqtd; 744 u_int32_t status = 0, nstatus = 0; 745 int actlen; 746 747 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 748 #ifdef DIAGNOSTIC 749 { 750 int s = splhigh(); 751 if (ex->isdone) { 752 splx(s); 753 #ifdef EHCI_DEBUG 754 printf("ehci_idone: ex is done!\n "); 755 ehci_dump_exfer(ex); 756 #else 757 printf("ehci_idone: ex=%p is done!\n", ex); 758 #endif 759 return; 760 } 761 ex->isdone = 1; 762 splx(s); 763 } 764 #endif 765 766 if (xfer->status == USBD_CANCELLED || 767 xfer->status == USBD_TIMEOUT) { 768 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 769 return; 770 } 771 772 #ifdef EHCI_DEBUG 773 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 774 if (ehcidebug > 10) 775 ehci_dump_sqtds(ex->sqtdstart); 776 #endif 777 778 /* The transfer is done, compute actual length and status. */ 779 lsqtd = ex->sqtdend; 780 actlen = 0; 781 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 782 nstatus = le32toh(sqtd->qtd.qtd_status); 783 if (nstatus & EHCI_QTD_ACTIVE) 784 break; 785 786 status = nstatus; 787 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 788 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 789 } 790 791 /* 792 * If there are left over TDs we need to update the toggle. 793 * The default pipe doesn't need it since control transfers 794 * start the toggle at 0 every time. 795 * For a short transfer we need to update the toggle for the missing 796 * packets within the qTD. 797 */ 798 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 799 xfer->pipe->device->default_pipe != xfer->pipe) { 800 DPRINTFN(2, ("ehci_idone: need toggle update " 801 "status=%08x nstatus=%08x\n", status, nstatus)); 802 #if 0 803 ehci_dump_sqh(epipe->sqh); 804 ehci_dump_sqtds(ex->sqtdstart); 805 #endif 806 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 807 } 808 809 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 810 xfer->length, actlen, status)); 811 xfer->actlen = actlen; 812 if (status & EHCI_QTD_HALTED) { 813 #ifdef EHCI_DEBUG 814 char sbuf[128]; 815 816 bitmask_snprintf((u_int32_t)status, 817 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 818 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 819 820 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 821 "status 0x%s\n", 822 xfer->pipe->device->address, 823 xfer->pipe->endpoint->edesc->bEndpointAddress, 824 sbuf)); 825 if (ehcidebug > 2) { 826 ehci_dump_sqh(epipe->sqh); 827 ehci_dump_sqtds(ex->sqtdstart); 828 } 829 #endif 830 /* low&full speed has an extra error flag */ 831 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 832 EHCI_QH_SPEED_HIGH) 833 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 834 else 835 status &= EHCI_QTD_STATERRS; 836 if (status == 0) /* no other errors means a stall */ 837 xfer->status = USBD_STALLED; 838 else 839 xfer->status = USBD_IOERROR; /* more info XXX */ 840 /* XXX need to reset TT on missed microframe */ 841 if (status & EHCI_QTD_MISSEDMICRO) { 842 ehci_softc_t *sc = (ehci_softc_t *) 843 xfer->pipe->device->bus; 844 845 printf("%s: missed microframe, TT reset not " 846 "implemented, hub might be inoperational\n", 847 USBDEVNAME(sc->sc_bus.bdev)); 848 } 849 } else { 850 xfer->status = USBD_NORMAL_COMPLETION; 851 } 852 853 usb_transfer_complete(xfer); 854 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 855 } 856 857 /* 858 * Wait here until controller claims to have an interrupt. 859 * Then call ehci_intr and return. Use timeout to avoid waiting 860 * too long. 861 */ 862 void 863 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 864 { 865 int timo; 866 u_int32_t intrs; 867 868 xfer->status = USBD_IN_PROGRESS; 869 for (timo = xfer->timeout; timo >= 0; timo--) { 870 usb_delay_ms(&sc->sc_bus, 1); 871 if (sc->sc_dying) 872 break; 873 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 874 sc->sc_eintrs; 875 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 876 #ifdef EHCI_DEBUG 877 if (ehcidebug > 15) 878 ehci_dump_regs(sc); 879 #endif 880 if (intrs) { 881 ehci_intr1(sc); 882 if (xfer->status != USBD_IN_PROGRESS) 883 return; 884 } 885 } 886 887 /* Timeout */ 888 DPRINTF(("ehci_waitintr: timeout\n")); 889 xfer->status = USBD_TIMEOUT; 890 usb_transfer_complete(xfer); 891 /* XXX should free TD */ 892 } 893 894 void 895 ehci_poll(struct usbd_bus *bus) 896 { 897 ehci_softc_t *sc = (ehci_softc_t *)bus; 898 #ifdef EHCI_DEBUG 899 static int last; 900 int new; 901 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 902 if (new != last) { 903 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 904 last = new; 905 } 906 #endif 907 908 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 909 ehci_intr1(sc); 910 } 911 912 int 913 ehci_detach(struct ehci_softc *sc, int flags) 914 { 915 int rv = 0; 916 917 if (sc->sc_child != NULL) 918 rv = config_detach(sc->sc_child, flags); 919 920 if (rv != 0) 921 return (rv); 922 923 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 924 925 if (sc->sc_shutdownhook != NULL) 926 shutdownhook_disestablish(sc->sc_shutdownhook); 927 928 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 929 930 /* XXX free other data structures XXX */ 931 mutex_destroy(&sc->sc_doorbell_lock); 932 933 return (rv); 934 } 935 936 937 int 938 ehci_activate(device_ptr_t self, enum devact act) 939 { 940 struct ehci_softc *sc = (struct ehci_softc *)self; 941 int rv = 0; 942 943 switch (act) { 944 case DVACT_ACTIVATE: 945 return (EOPNOTSUPP); 946 947 case DVACT_DEACTIVATE: 948 sc->sc_dying = 1; 949 if (sc->sc_child != NULL) 950 rv = config_deactivate(sc->sc_child); 951 break; 952 } 953 return (rv); 954 } 955 956 /* 957 * Handle suspend/resume. 958 * 959 * We need to switch to polling mode here, because this routine is 960 * called from an interrupt context. This is all right since we 961 * are almost suspended anyway. 962 * 963 * Note that this power handler isn't to be registered directly; the 964 * bus glue needs to call out to it. 965 */ 966 bool 967 ehci_suspend(device_t dv) 968 { 969 ehci_softc_t *sc = (ehci_softc_t *)dv; 970 int i, s; 971 uint32_t cmd, hcr; 972 973 s = splhardusb(); 974 975 sc->sc_bus.use_polling++; 976 977 for (i = 1; i <= sc->sc_noport; i++) { 978 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 979 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 980 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 981 } 982 983 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 984 985 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 986 EOWRITE4(sc, EHCI_USBCMD, cmd); 987 988 for (i = 0; i < 100; i++) { 989 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 990 if (hcr == 0) 991 break; 992 993 usb_delay_ms(&sc->sc_bus, 1); 994 } 995 if (hcr != 0) 996 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 997 998 cmd &= ~EHCI_CMD_RS; 999 EOWRITE4(sc, EHCI_USBCMD, cmd); 1000 1001 for (i = 0; i < 100; i++) { 1002 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1003 if (hcr == EHCI_STS_HCH) 1004 break; 1005 1006 usb_delay_ms(&sc->sc_bus, 1); 1007 } 1008 if (hcr != EHCI_STS_HCH) 1009 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1010 1011 sc->sc_bus.use_polling--; 1012 splx(s); 1013 1014 return true; 1015 } 1016 1017 bool 1018 ehci_resume(device_t dv) 1019 { 1020 ehci_softc_t *sc = (ehci_softc_t *)dv; 1021 int i, s; 1022 uint32_t cmd, hcr; 1023 1024 s = splhardusb(); 1025 1026 sc->sc_bus.use_polling++; 1027 1028 /* restore things in case the bios sucks */ 1029 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1030 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1031 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1032 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1033 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1034 1035 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1036 1037 hcr = 0; 1038 for (i = 1; i <= sc->sc_noport; i++) { 1039 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1040 if ((cmd & EHCI_PS_PO) == 0 && 1041 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1042 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1043 hcr = 1; 1044 } 1045 } 1046 1047 if (hcr) { 1048 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1049 1050 for (i = 1; i <= sc->sc_noport; i++) { 1051 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1052 if ((cmd & EHCI_PS_PO) == 0 && 1053 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1054 EOWRITE4(sc, EHCI_PORTSC(i), 1055 cmd & ~EHCI_PS_FPR); 1056 } 1057 } 1058 1059 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1060 1061 for (i = 0; i < 100; i++) { 1062 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1063 if (hcr != EHCI_STS_HCH) 1064 break; 1065 1066 usb_delay_ms(&sc->sc_bus, 1); 1067 } 1068 if (hcr == EHCI_STS_HCH) 1069 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1070 1071 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1072 1073 sc->sc_bus.use_polling--; 1074 1075 splx(s); 1076 1077 return true; 1078 } 1079 1080 /* 1081 * Shut down the controller when the system is going down. 1082 */ 1083 void 1084 ehci_shutdown(void *v) 1085 { 1086 ehci_softc_t *sc = v; 1087 1088 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1089 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1090 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1091 } 1092 1093 usbd_status 1094 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1095 { 1096 struct ehci_softc *sc = (struct ehci_softc *)bus; 1097 usbd_status err; 1098 1099 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1100 if (err == USBD_NOMEM) 1101 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1102 #ifdef EHCI_DEBUG 1103 if (err) 1104 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1105 #endif 1106 return (err); 1107 } 1108 1109 void 1110 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1111 { 1112 struct ehci_softc *sc = (struct ehci_softc *)bus; 1113 1114 if (dma->block->flags & USB_DMA_RESERVE) { 1115 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1116 dma); 1117 return; 1118 } 1119 usb_freemem(&sc->sc_bus, dma); 1120 } 1121 1122 usbd_xfer_handle 1123 ehci_allocx(struct usbd_bus *bus) 1124 { 1125 struct ehci_softc *sc = (struct ehci_softc *)bus; 1126 usbd_xfer_handle xfer; 1127 1128 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1129 if (xfer != NULL) { 1130 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1131 #ifdef DIAGNOSTIC 1132 if (xfer->busy_free != XFER_FREE) { 1133 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1134 xfer->busy_free); 1135 } 1136 #endif 1137 } else { 1138 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1139 } 1140 if (xfer != NULL) { 1141 memset(xfer, 0, sizeof(struct ehci_xfer)); 1142 #ifdef DIAGNOSTIC 1143 EXFER(xfer)->isdone = 1; 1144 xfer->busy_free = XFER_BUSY; 1145 #endif 1146 } 1147 return (xfer); 1148 } 1149 1150 void 1151 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1152 { 1153 struct ehci_softc *sc = (struct ehci_softc *)bus; 1154 1155 #ifdef DIAGNOSTIC 1156 if (xfer->busy_free != XFER_BUSY) { 1157 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1158 xfer->busy_free); 1159 } 1160 xfer->busy_free = XFER_FREE; 1161 if (!EXFER(xfer)->isdone) { 1162 printf("ehci_freex: !isdone\n"); 1163 } 1164 #endif 1165 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1166 } 1167 1168 Static void 1169 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1170 { 1171 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1172 1173 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1174 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1175 #ifdef USB_DEBUG 1176 if (ehcidebug) 1177 usbd_dump_pipe(pipe); 1178 #endif 1179 epipe->nexttoggle = 0; 1180 } 1181 1182 Static void 1183 ehci_noop(usbd_pipe_handle pipe) 1184 { 1185 } 1186 1187 #ifdef EHCI_DEBUG 1188 void 1189 ehci_dump_regs(ehci_softc_t *sc) 1190 { 1191 int i; 1192 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1193 EOREAD4(sc, EHCI_USBCMD), 1194 EOREAD4(sc, EHCI_USBSTS), 1195 EOREAD4(sc, EHCI_USBINTR)); 1196 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1197 EOREAD4(sc, EHCI_FRINDEX), 1198 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1199 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1200 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1201 for (i = 1; i <= sc->sc_noport; i++) 1202 printf("port %d status=0x%08x\n", i, 1203 EOREAD4(sc, EHCI_PORTSC(i))); 1204 } 1205 1206 /* 1207 * Unused function - this is meant to be called from a kernel 1208 * debugger. 1209 */ 1210 void 1211 ehci_dump() 1212 { 1213 ehci_dump_regs(theehci); 1214 } 1215 1216 void 1217 ehci_dump_link(ehci_link_t link, int type) 1218 { 1219 link = le32toh(link); 1220 printf("0x%08x", link); 1221 if (link & EHCI_LINK_TERMINATE) 1222 printf("<T>"); 1223 else { 1224 printf("<"); 1225 if (type) { 1226 switch (EHCI_LINK_TYPE(link)) { 1227 case EHCI_LINK_ITD: printf("ITD"); break; 1228 case EHCI_LINK_QH: printf("QH"); break; 1229 case EHCI_LINK_SITD: printf("SITD"); break; 1230 case EHCI_LINK_FSTN: printf("FSTN"); break; 1231 } 1232 } 1233 printf(">"); 1234 } 1235 } 1236 1237 void 1238 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1239 { 1240 int i; 1241 u_int32_t stop; 1242 1243 stop = 0; 1244 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1245 ehci_dump_sqtd(sqtd); 1246 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1247 } 1248 if (sqtd) 1249 printf("dump aborted, too many TDs\n"); 1250 } 1251 1252 void 1253 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1254 { 1255 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1256 ehci_dump_qtd(&sqtd->qtd); 1257 } 1258 1259 void 1260 ehci_dump_qtd(ehci_qtd_t *qtd) 1261 { 1262 u_int32_t s; 1263 char sbuf[128]; 1264 1265 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1266 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1267 printf("\n"); 1268 s = le32toh(qtd->qtd_status); 1269 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1270 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1271 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1272 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1273 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1274 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1275 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1276 EHCI_QTD_GET_PID(s), sbuf); 1277 for (s = 0; s < 5; s++) 1278 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1279 } 1280 1281 void 1282 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1283 { 1284 ehci_qh_t *qh = &sqh->qh; 1285 u_int32_t endp, endphub; 1286 1287 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1288 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1289 endp = le32toh(qh->qh_endp); 1290 printf(" endp=0x%08x\n", endp); 1291 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1292 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1293 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1294 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1295 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1296 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1297 EHCI_QH_GET_NRL(endp)); 1298 endphub = le32toh(qh->qh_endphub); 1299 printf(" endphub=0x%08x\n", endphub); 1300 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1301 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1302 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1303 EHCI_QH_GET_MULT(endphub)); 1304 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1305 printf("Overlay qTD:\n"); 1306 ehci_dump_qtd(&qh->qh_qtd); 1307 } 1308 1309 #ifdef DIAGNOSTIC 1310 Static void 1311 ehci_dump_exfer(struct ehci_xfer *ex) 1312 { 1313 printf("ehci_dump_exfer: ex=%p\n", ex); 1314 } 1315 #endif 1316 #endif 1317 1318 usbd_status 1319 ehci_open(usbd_pipe_handle pipe) 1320 { 1321 usbd_device_handle dev = pipe->device; 1322 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1323 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1324 u_int8_t addr = dev->address; 1325 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1326 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1327 ehci_soft_qh_t *sqh; 1328 usbd_status err; 1329 int s; 1330 int ival, speed, naks; 1331 int hshubaddr, hshubport; 1332 1333 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1334 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1335 1336 if (dev->myhsport) { 1337 hshubaddr = dev->myhsport->parent->address; 1338 hshubport = dev->myhsport->portno; 1339 } else { 1340 hshubaddr = 0; 1341 hshubport = 0; 1342 } 1343 1344 if (sc->sc_dying) 1345 return (USBD_IOERROR); 1346 1347 epipe->nexttoggle = 0; 1348 1349 if (addr == sc->sc_addr) { 1350 switch (ed->bEndpointAddress) { 1351 case USB_CONTROL_ENDPOINT: 1352 pipe->methods = &ehci_root_ctrl_methods; 1353 break; 1354 case UE_DIR_IN | EHCI_INTR_ENDPT: 1355 pipe->methods = &ehci_root_intr_methods; 1356 break; 1357 default: 1358 return (USBD_INVAL); 1359 } 1360 return (USBD_NORMAL_COMPLETION); 1361 } 1362 1363 /* XXX All this stuff is only valid for async. */ 1364 switch (dev->speed) { 1365 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1366 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1367 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1368 default: panic("ehci_open: bad device speed %d", dev->speed); 1369 } 1370 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1371 printf("%s: *** WARNING: opening low/full speed isoc device, " 1372 "this does not work yet.\n", 1373 USBDEVNAME(sc->sc_bus.bdev)); 1374 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1375 hshubaddr, hshubport)); 1376 return USBD_INVAL; 1377 } 1378 1379 naks = 8; /* XXX */ 1380 sqh = ehci_alloc_sqh(sc); 1381 if (sqh == NULL) 1382 return (USBD_NOMEM); 1383 /* qh_link filled when the QH is added */ 1384 sqh->qh.qh_endp = htole32( 1385 EHCI_QH_SET_ADDR(addr) | 1386 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1387 EHCI_QH_SET_EPS(speed) | 1388 EHCI_QH_DTC | 1389 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1390 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1391 EHCI_QH_CTL : 0) | 1392 EHCI_QH_SET_NRL(naks) 1393 ); 1394 sqh->qh.qh_endphub = htole32( 1395 EHCI_QH_SET_MULT(1) | 1396 EHCI_QH_SET_HUBA(hshubaddr) | 1397 EHCI_QH_SET_PORT(hshubport) | 1398 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1399 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1400 ); 1401 sqh->qh.qh_curqtd = EHCI_NULL; 1402 /* Fill the overlay qTD */ 1403 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1404 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1405 sqh->qh.qh_qtd.qtd_status = htole32(0); 1406 1407 epipe->sqh = sqh; 1408 1409 switch (xfertype) { 1410 case UE_CONTROL: 1411 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1412 0, &epipe->u.ctl.reqdma); 1413 #ifdef EHCI_DEBUG 1414 if (err) 1415 printf("ehci_open: usb_allocmem()=%d\n", err); 1416 #endif 1417 if (err) 1418 goto bad; 1419 pipe->methods = &ehci_device_ctrl_methods; 1420 s = splusb(); 1421 ehci_add_qh(sqh, sc->sc_async_head); 1422 splx(s); 1423 break; 1424 case UE_BULK: 1425 pipe->methods = &ehci_device_bulk_methods; 1426 s = splusb(); 1427 ehci_add_qh(sqh, sc->sc_async_head); 1428 splx(s); 1429 break; 1430 case UE_INTERRUPT: 1431 pipe->methods = &ehci_device_intr_methods; 1432 ival = pipe->interval; 1433 if (ival == USBD_DEFAULT_INTERVAL) { 1434 if (speed == EHCI_QH_SPEED_HIGH) { 1435 if (ed->bInterval > 16) { 1436 /* 1437 * illegal with high-speed, but there 1438 * were documentation bugs in the spec, 1439 * so be generous 1440 */ 1441 ival = 256; 1442 } else 1443 ival = (1 << (ed->bInterval - 1)) / 8; 1444 } else 1445 ival = ed->bInterval; 1446 } 1447 err = ehci_device_setintr(sc, sqh, ival); 1448 if (err) 1449 goto bad; 1450 break; 1451 case UE_ISOCHRONOUS: 1452 pipe->methods = &ehci_device_isoc_methods; 1453 /* FALLTHROUGH */ 1454 default: 1455 err = USBD_INVAL; 1456 goto bad; 1457 } 1458 return (USBD_NORMAL_COMPLETION); 1459 1460 bad: 1461 ehci_free_sqh(sc, sqh); 1462 return (err); 1463 } 1464 1465 /* 1466 * Add an ED to the schedule. Called at splusb(). 1467 */ 1468 void 1469 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1470 { 1471 SPLUSBCHECK; 1472 1473 sqh->next = head->next; 1474 sqh->qh.qh_link = head->qh.qh_link; 1475 head->next = sqh; 1476 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1477 1478 #ifdef EHCI_DEBUG 1479 if (ehcidebug > 5) { 1480 printf("ehci_add_qh:\n"); 1481 ehci_dump_sqh(sqh); 1482 } 1483 #endif 1484 } 1485 1486 /* 1487 * Remove an ED from the schedule. Called at splusb(). 1488 */ 1489 void 1490 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1491 { 1492 ehci_soft_qh_t *p; 1493 1494 SPLUSBCHECK; 1495 /* XXX */ 1496 for (p = head; p != NULL && p->next != sqh; p = p->next) 1497 ; 1498 if (p == NULL) 1499 panic("ehci_rem_qh: ED not found"); 1500 p->next = sqh->next; 1501 p->qh.qh_link = sqh->qh.qh_link; 1502 1503 ehci_sync_hc(sc); 1504 } 1505 1506 void 1507 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1508 { 1509 int i; 1510 u_int32_t status; 1511 1512 /* Save toggle bit and ping status. */ 1513 status = sqh->qh.qh_qtd.qtd_status & 1514 htole32(EHCI_QTD_TOGGLE_MASK | 1515 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1516 /* Set HALTED to make hw leave it alone. */ 1517 sqh->qh.qh_qtd.qtd_status = 1518 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1519 sqh->qh.qh_curqtd = 0; 1520 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1521 sqh->qh.qh_qtd.qtd_altnext = 0; 1522 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1523 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1524 sqh->sqtd = sqtd; 1525 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1526 sqh->qh.qh_qtd.qtd_status = status; 1527 } 1528 1529 /* 1530 * Ensure that the HC has released all references to the QH. We do this 1531 * by asking for a Async Advance Doorbell interrupt and then we wait for 1532 * the interrupt. 1533 * To make this easier we first obtain exclusive use of the doorbell. 1534 */ 1535 void 1536 ehci_sync_hc(ehci_softc_t *sc) 1537 { 1538 int s, error; 1539 1540 if (sc->sc_dying) { 1541 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1542 return; 1543 } 1544 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1545 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1546 s = splhardusb(); 1547 /* ask for doorbell */ 1548 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1549 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1550 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1551 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1552 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1553 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1554 splx(s); 1555 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1556 #ifdef DIAGNOSTIC 1557 if (error) 1558 printf("ehci_sync_hc: tsleep() = %d\n", error); 1559 #endif 1560 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1561 } 1562 1563 /***********/ 1564 1565 /* 1566 * Data structures and routines to emulate the root hub. 1567 */ 1568 Static usb_device_descriptor_t ehci_devd = { 1569 USB_DEVICE_DESCRIPTOR_SIZE, 1570 UDESC_DEVICE, /* type */ 1571 {0x00, 0x02}, /* USB version */ 1572 UDCLASS_HUB, /* class */ 1573 UDSUBCLASS_HUB, /* subclass */ 1574 UDPROTO_HSHUBSTT, /* protocol */ 1575 64, /* max packet */ 1576 {0},{0},{0x00,0x01}, /* device id */ 1577 1,2,0, /* string indicies */ 1578 1 /* # of configurations */ 1579 }; 1580 1581 Static const usb_device_qualifier_t ehci_odevd = { 1582 USB_DEVICE_DESCRIPTOR_SIZE, 1583 UDESC_DEVICE_QUALIFIER, /* type */ 1584 {0x00, 0x02}, /* USB version */ 1585 UDCLASS_HUB, /* class */ 1586 UDSUBCLASS_HUB, /* subclass */ 1587 UDPROTO_FSHUB, /* protocol */ 1588 64, /* max packet */ 1589 1, /* # of configurations */ 1590 0 1591 }; 1592 1593 Static const usb_config_descriptor_t ehci_confd = { 1594 USB_CONFIG_DESCRIPTOR_SIZE, 1595 UDESC_CONFIG, 1596 {USB_CONFIG_DESCRIPTOR_SIZE + 1597 USB_INTERFACE_DESCRIPTOR_SIZE + 1598 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1599 1, 1600 1, 1601 0, 1602 UC_ATTR_MBO | UC_SELF_POWERED, 1603 0 /* max power */ 1604 }; 1605 1606 Static const usb_interface_descriptor_t ehci_ifcd = { 1607 USB_INTERFACE_DESCRIPTOR_SIZE, 1608 UDESC_INTERFACE, 1609 0, 1610 0, 1611 1, 1612 UICLASS_HUB, 1613 UISUBCLASS_HUB, 1614 UIPROTO_HSHUBSTT, 1615 0 1616 }; 1617 1618 Static const usb_endpoint_descriptor_t ehci_endpd = { 1619 USB_ENDPOINT_DESCRIPTOR_SIZE, 1620 UDESC_ENDPOINT, 1621 UE_DIR_IN | EHCI_INTR_ENDPT, 1622 UE_INTERRUPT, 1623 {8, 0}, /* max packet */ 1624 12 1625 }; 1626 1627 Static const usb_hub_descriptor_t ehci_hubd = { 1628 USB_HUB_DESCRIPTOR_SIZE, 1629 UDESC_HUB, 1630 0, 1631 {0,0}, 1632 0, 1633 0, 1634 {""}, 1635 {""}, 1636 }; 1637 1638 Static int 1639 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1640 { 1641 int i; 1642 1643 if (l == 0) 1644 return (0); 1645 p->bLength = 2 * strlen(s) + 2; 1646 if (l == 1) 1647 return (1); 1648 p->bDescriptorType = UDESC_STRING; 1649 l -= 2; 1650 for (i = 0; s[i] && l > 1; i++, l -= 2) 1651 USETW2(p->bString[i], 0, s[i]); 1652 return (2*i+2); 1653 } 1654 1655 /* 1656 * Simulate a hardware hub by handling all the necessary requests. 1657 */ 1658 Static usbd_status 1659 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1660 { 1661 usbd_status err; 1662 1663 /* Insert last in queue. */ 1664 err = usb_insert_transfer(xfer); 1665 if (err) 1666 return (err); 1667 1668 /* Pipe isn't running, start first */ 1669 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1670 } 1671 1672 Static usbd_status 1673 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1674 { 1675 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1676 usb_device_request_t *req; 1677 void *buf = NULL; 1678 int port, i; 1679 int s, len, value, index, l, totlen = 0; 1680 usb_port_status_t ps; 1681 usb_hub_descriptor_t hubd; 1682 usbd_status err; 1683 u_int32_t v; 1684 1685 if (sc->sc_dying) 1686 return (USBD_IOERROR); 1687 1688 #ifdef DIAGNOSTIC 1689 if (!(xfer->rqflags & URQ_REQUEST)) 1690 /* XXX panic */ 1691 return (USBD_INVAL); 1692 #endif 1693 req = &xfer->request; 1694 1695 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1696 req->bmRequestType, req->bRequest)); 1697 1698 len = UGETW(req->wLength); 1699 value = UGETW(req->wValue); 1700 index = UGETW(req->wIndex); 1701 1702 if (len != 0) 1703 buf = KERNADDR(&xfer->dmabuf, 0); 1704 1705 #define C(x,y) ((x) | ((y) << 8)) 1706 switch(C(req->bRequest, req->bmRequestType)) { 1707 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1708 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1709 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1710 /* 1711 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1712 * for the integrated root hub. 1713 */ 1714 break; 1715 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1716 if (len > 0) { 1717 *(u_int8_t *)buf = sc->sc_conf; 1718 totlen = 1; 1719 } 1720 break; 1721 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1722 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1723 if (len == 0) 1724 break; 1725 switch(value >> 8) { 1726 case UDESC_DEVICE: 1727 if ((value & 0xff) != 0) { 1728 err = USBD_IOERROR; 1729 goto ret; 1730 } 1731 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1732 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1733 memcpy(buf, &ehci_devd, l); 1734 break; 1735 /* 1736 * We can't really operate at another speed, but the spec says 1737 * we need this descriptor. 1738 */ 1739 case UDESC_DEVICE_QUALIFIER: 1740 if ((value & 0xff) != 0) { 1741 err = USBD_IOERROR; 1742 goto ret; 1743 } 1744 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1745 memcpy(buf, &ehci_odevd, l); 1746 break; 1747 /* 1748 * We can't really operate at another speed, but the spec says 1749 * we need this descriptor. 1750 */ 1751 case UDESC_OTHER_SPEED_CONFIGURATION: 1752 case UDESC_CONFIG: 1753 if ((value & 0xff) != 0) { 1754 err = USBD_IOERROR; 1755 goto ret; 1756 } 1757 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1758 memcpy(buf, &ehci_confd, l); 1759 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1760 value >> 8; 1761 buf = (char *)buf + l; 1762 len -= l; 1763 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1764 totlen += l; 1765 memcpy(buf, &ehci_ifcd, l); 1766 buf = (char *)buf + l; 1767 len -= l; 1768 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1769 totlen += l; 1770 memcpy(buf, &ehci_endpd, l); 1771 break; 1772 case UDESC_STRING: 1773 *(u_int8_t *)buf = 0; 1774 totlen = 1; 1775 switch (value & 0xff) { 1776 case 0: /* Language table */ 1777 if (len > 0) 1778 *(u_int8_t *)buf = 4; 1779 if (len >= 4) { 1780 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1781 totlen = 4; 1782 } 1783 break; 1784 case 1: /* Vendor */ 1785 totlen = ehci_str(buf, len, sc->sc_vendor); 1786 break; 1787 case 2: /* Product */ 1788 totlen = ehci_str(buf, len, "EHCI root hub"); 1789 break; 1790 } 1791 break; 1792 default: 1793 err = USBD_IOERROR; 1794 goto ret; 1795 } 1796 break; 1797 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1798 if (len > 0) { 1799 *(u_int8_t *)buf = 0; 1800 totlen = 1; 1801 } 1802 break; 1803 case C(UR_GET_STATUS, UT_READ_DEVICE): 1804 if (len > 1) { 1805 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1806 totlen = 2; 1807 } 1808 break; 1809 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1810 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1811 if (len > 1) { 1812 USETW(((usb_status_t *)buf)->wStatus, 0); 1813 totlen = 2; 1814 } 1815 break; 1816 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1817 if (value >= USB_MAX_DEVICES) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 sc->sc_addr = value; 1822 break; 1823 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1824 if (value != 0 && value != 1) { 1825 err = USBD_IOERROR; 1826 goto ret; 1827 } 1828 sc->sc_conf = value; 1829 break; 1830 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1831 break; 1832 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1833 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1834 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1835 err = USBD_IOERROR; 1836 goto ret; 1837 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1838 break; 1839 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1840 break; 1841 /* Hub requests */ 1842 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1843 break; 1844 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1845 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1846 "port=%d feature=%d\n", 1847 index, value)); 1848 if (index < 1 || index > sc->sc_noport) { 1849 err = USBD_IOERROR; 1850 goto ret; 1851 } 1852 port = EHCI_PORTSC(index); 1853 v = EOREAD4(sc, port); 1854 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1855 v &= ~EHCI_PS_CLEAR; 1856 switch(value) { 1857 case UHF_PORT_ENABLE: 1858 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1859 break; 1860 case UHF_PORT_SUSPEND: 1861 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1862 break; 1863 case UHF_PORT_POWER: 1864 if (sc->sc_hasppc) 1865 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1866 break; 1867 case UHF_PORT_TEST: 1868 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1869 "%d\n", index)); 1870 break; 1871 case UHF_PORT_INDICATOR: 1872 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1873 "%d\n", index)); 1874 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1875 break; 1876 case UHF_C_PORT_CONNECTION: 1877 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1878 break; 1879 case UHF_C_PORT_ENABLE: 1880 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1881 break; 1882 case UHF_C_PORT_SUSPEND: 1883 /* how? */ 1884 break; 1885 case UHF_C_PORT_OVER_CURRENT: 1886 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1887 break; 1888 case UHF_C_PORT_RESET: 1889 sc->sc_isreset[index] = 0; 1890 break; 1891 default: 1892 err = USBD_IOERROR; 1893 goto ret; 1894 } 1895 #if 0 1896 switch(value) { 1897 case UHF_C_PORT_CONNECTION: 1898 case UHF_C_PORT_ENABLE: 1899 case UHF_C_PORT_SUSPEND: 1900 case UHF_C_PORT_OVER_CURRENT: 1901 case UHF_C_PORT_RESET: 1902 default: 1903 break; 1904 } 1905 #endif 1906 break; 1907 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1908 if (len == 0) 1909 break; 1910 if ((value & 0xff) != 0) { 1911 err = USBD_IOERROR; 1912 goto ret; 1913 } 1914 hubd = ehci_hubd; 1915 hubd.bNbrPorts = sc->sc_noport; 1916 v = EOREAD4(sc, EHCI_HCSPARAMS); 1917 USETW(hubd.wHubCharacteristics, 1918 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1919 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1920 ? UHD_PORT_IND : 0); 1921 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1922 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1923 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1924 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1925 l = min(len, hubd.bDescLength); 1926 totlen = l; 1927 memcpy(buf, &hubd, l); 1928 break; 1929 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1930 if (len != 4) { 1931 err = USBD_IOERROR; 1932 goto ret; 1933 } 1934 memset(buf, 0, len); /* ? XXX */ 1935 totlen = len; 1936 break; 1937 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1938 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1939 index)); 1940 if (index < 1 || index > sc->sc_noport) { 1941 err = USBD_IOERROR; 1942 goto ret; 1943 } 1944 if (len != 4) { 1945 err = USBD_IOERROR; 1946 goto ret; 1947 } 1948 v = EOREAD4(sc, EHCI_PORTSC(index)); 1949 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1950 v)); 1951 i = UPS_HIGH_SPEED; 1952 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1953 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1954 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1955 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1956 if (v & EHCI_PS_PR) i |= UPS_RESET; 1957 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1958 USETW(ps.wPortStatus, i); 1959 i = 0; 1960 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1961 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1962 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1963 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1964 USETW(ps.wPortChange, i); 1965 l = min(len, sizeof ps); 1966 memcpy(buf, &ps, l); 1967 totlen = l; 1968 break; 1969 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1970 err = USBD_IOERROR; 1971 goto ret; 1972 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1973 break; 1974 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1975 if (index < 1 || index > sc->sc_noport) { 1976 err = USBD_IOERROR; 1977 goto ret; 1978 } 1979 port = EHCI_PORTSC(index); 1980 v = EOREAD4(sc, port); 1981 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1982 v &= ~EHCI_PS_CLEAR; 1983 switch(value) { 1984 case UHF_PORT_ENABLE: 1985 EOWRITE4(sc, port, v | EHCI_PS_PE); 1986 break; 1987 case UHF_PORT_SUSPEND: 1988 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1989 break; 1990 case UHF_PORT_RESET: 1991 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1992 index)); 1993 if (EHCI_PS_IS_LOWSPEED(v)) { 1994 /* Low speed device, give up ownership. */ 1995 ehci_disown(sc, index, 1); 1996 break; 1997 } 1998 /* Start reset sequence. */ 1999 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2000 EOWRITE4(sc, port, v | EHCI_PS_PR); 2001 /* Wait for reset to complete. */ 2002 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2003 if (sc->sc_dying) { 2004 err = USBD_IOERROR; 2005 goto ret; 2006 } 2007 /* Terminate reset sequence. */ 2008 EOWRITE4(sc, port, v); 2009 /* Wait for HC to complete reset. */ 2010 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2011 if (sc->sc_dying) { 2012 err = USBD_IOERROR; 2013 goto ret; 2014 } 2015 v = EOREAD4(sc, port); 2016 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2017 if (v & EHCI_PS_PR) { 2018 printf("%s: port reset timeout\n", 2019 USBDEVNAME(sc->sc_bus.bdev)); 2020 return (USBD_TIMEOUT); 2021 } 2022 if (!(v & EHCI_PS_PE)) { 2023 /* Not a high speed device, give up ownership.*/ 2024 ehci_disown(sc, index, 0); 2025 break; 2026 } 2027 sc->sc_isreset[index] = 1; 2028 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2029 index, v)); 2030 break; 2031 case UHF_PORT_POWER: 2032 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2033 "%d (has PPC = %d)\n", index, 2034 sc->sc_hasppc)); 2035 if (sc->sc_hasppc) 2036 EOWRITE4(sc, port, v | EHCI_PS_PP); 2037 break; 2038 case UHF_PORT_TEST: 2039 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2040 "%d\n", index)); 2041 break; 2042 case UHF_PORT_INDICATOR: 2043 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2044 "%d\n", index)); 2045 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2046 break; 2047 default: 2048 err = USBD_IOERROR; 2049 goto ret; 2050 } 2051 break; 2052 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2053 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2054 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2055 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2056 break; 2057 default: 2058 err = USBD_IOERROR; 2059 goto ret; 2060 } 2061 xfer->actlen = totlen; 2062 err = USBD_NORMAL_COMPLETION; 2063 ret: 2064 xfer->status = err; 2065 s = splusb(); 2066 usb_transfer_complete(xfer); 2067 splx(s); 2068 return (USBD_IN_PROGRESS); 2069 } 2070 2071 void 2072 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2073 { 2074 int port; 2075 u_int32_t v; 2076 2077 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2078 #ifdef DIAGNOSTIC 2079 if (sc->sc_npcomp != 0) { 2080 int i = (index-1) / sc->sc_npcomp; 2081 if (i >= sc->sc_ncomp) 2082 printf("%s: strange port\n", 2083 USBDEVNAME(sc->sc_bus.bdev)); 2084 else 2085 printf("%s: handing over %s speed device on " 2086 "port %d to %s\n", 2087 USBDEVNAME(sc->sc_bus.bdev), 2088 lowspeed ? "low" : "full", 2089 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2090 } else { 2091 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2092 } 2093 #endif 2094 port = EHCI_PORTSC(index); 2095 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2096 EOWRITE4(sc, port, v | EHCI_PS_PO); 2097 } 2098 2099 /* Abort a root control request. */ 2100 Static void 2101 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2102 { 2103 /* Nothing to do, all transfers are synchronous. */ 2104 } 2105 2106 /* Close the root pipe. */ 2107 Static void 2108 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2109 { 2110 DPRINTF(("ehci_root_ctrl_close\n")); 2111 /* Nothing to do. */ 2112 } 2113 2114 void 2115 ehci_root_intr_done(usbd_xfer_handle xfer) 2116 { 2117 xfer->hcpriv = NULL; 2118 } 2119 2120 Static usbd_status 2121 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2122 { 2123 usbd_status err; 2124 2125 /* Insert last in queue. */ 2126 err = usb_insert_transfer(xfer); 2127 if (err) 2128 return (err); 2129 2130 /* Pipe isn't running, start first */ 2131 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2132 } 2133 2134 Static usbd_status 2135 ehci_root_intr_start(usbd_xfer_handle xfer) 2136 { 2137 usbd_pipe_handle pipe = xfer->pipe; 2138 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2139 2140 if (sc->sc_dying) 2141 return (USBD_IOERROR); 2142 2143 sc->sc_intrxfer = xfer; 2144 2145 return (USBD_IN_PROGRESS); 2146 } 2147 2148 /* Abort a root interrupt request. */ 2149 Static void 2150 ehci_root_intr_abort(usbd_xfer_handle xfer) 2151 { 2152 int s; 2153 2154 if (xfer->pipe->intrxfer == xfer) { 2155 DPRINTF(("ehci_root_intr_abort: remove\n")); 2156 xfer->pipe->intrxfer = NULL; 2157 } 2158 xfer->status = USBD_CANCELLED; 2159 s = splusb(); 2160 usb_transfer_complete(xfer); 2161 splx(s); 2162 } 2163 2164 /* Close the root pipe. */ 2165 Static void 2166 ehci_root_intr_close(usbd_pipe_handle pipe) 2167 { 2168 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2169 2170 DPRINTF(("ehci_root_intr_close\n")); 2171 2172 sc->sc_intrxfer = NULL; 2173 } 2174 2175 void 2176 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2177 { 2178 xfer->hcpriv = NULL; 2179 } 2180 2181 /************************/ 2182 2183 ehci_soft_qh_t * 2184 ehci_alloc_sqh(ehci_softc_t *sc) 2185 { 2186 ehci_soft_qh_t *sqh; 2187 usbd_status err; 2188 int i, offs; 2189 usb_dma_t dma; 2190 2191 if (sc->sc_freeqhs == NULL) { 2192 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2193 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2194 EHCI_PAGE_SIZE, &dma); 2195 #ifdef EHCI_DEBUG 2196 if (err) 2197 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2198 #endif 2199 if (err) 2200 return (NULL); 2201 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2202 offs = i * EHCI_SQH_SIZE; 2203 sqh = KERNADDR(&dma, offs); 2204 sqh->physaddr = DMAADDR(&dma, offs); 2205 sqh->next = sc->sc_freeqhs; 2206 sc->sc_freeqhs = sqh; 2207 } 2208 } 2209 sqh = sc->sc_freeqhs; 2210 sc->sc_freeqhs = sqh->next; 2211 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2212 sqh->next = NULL; 2213 return (sqh); 2214 } 2215 2216 void 2217 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2218 { 2219 sqh->next = sc->sc_freeqhs; 2220 sc->sc_freeqhs = sqh; 2221 } 2222 2223 ehci_soft_qtd_t * 2224 ehci_alloc_sqtd(ehci_softc_t *sc) 2225 { 2226 ehci_soft_qtd_t *sqtd; 2227 usbd_status err; 2228 int i, offs; 2229 usb_dma_t dma; 2230 int s; 2231 2232 if (sc->sc_freeqtds == NULL) { 2233 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2234 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2235 EHCI_PAGE_SIZE, &dma); 2236 #ifdef EHCI_DEBUG 2237 if (err) 2238 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2239 #endif 2240 if (err) 2241 return (NULL); 2242 s = splusb(); 2243 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2244 offs = i * EHCI_SQTD_SIZE; 2245 sqtd = KERNADDR(&dma, offs); 2246 sqtd->physaddr = DMAADDR(&dma, offs); 2247 sqtd->nextqtd = sc->sc_freeqtds; 2248 sc->sc_freeqtds = sqtd; 2249 } 2250 splx(s); 2251 } 2252 2253 s = splusb(); 2254 sqtd = sc->sc_freeqtds; 2255 sc->sc_freeqtds = sqtd->nextqtd; 2256 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2257 sqtd->nextqtd = NULL; 2258 sqtd->xfer = NULL; 2259 splx(s); 2260 2261 return (sqtd); 2262 } 2263 2264 void 2265 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2266 { 2267 int s; 2268 2269 s = splusb(); 2270 sqtd->nextqtd = sc->sc_freeqtds; 2271 sc->sc_freeqtds = sqtd; 2272 splx(s); 2273 } 2274 2275 usbd_status 2276 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2277 int alen, int rd, usbd_xfer_handle xfer, 2278 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2279 { 2280 ehci_soft_qtd_t *next, *cur; 2281 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2282 u_int32_t qtdstatus; 2283 int len, curlen, mps; 2284 int i, tog; 2285 usb_dma_t *dma = &xfer->dmabuf; 2286 u_int16_t flags = xfer->flags; 2287 2288 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2289 2290 len = alen; 2291 dataphys = DMAADDR(dma, 0); 2292 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2293 qtdstatus = EHCI_QTD_ACTIVE | 2294 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2295 EHCI_QTD_SET_CERR(3) 2296 /* IOC set below */ 2297 /* BYTES set below */ 2298 ; 2299 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2300 tog = epipe->nexttoggle; 2301 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2302 2303 cur = ehci_alloc_sqtd(sc); 2304 *sp = cur; 2305 if (cur == NULL) 2306 goto nomem; 2307 for (;;) { 2308 dataphyspage = EHCI_PAGE(dataphys); 2309 /* The EHCI hardware can handle at most 5 pages. */ 2310 if (dataphyslastpage - dataphyspage < 2311 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2312 /* we can handle it in this QTD */ 2313 curlen = len; 2314 } else { 2315 /* must use multiple TDs, fill as much as possible. */ 2316 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2317 EHCI_PAGE_OFFSET(dataphys); 2318 #ifdef DIAGNOSTIC 2319 if (curlen > len) { 2320 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2321 "len=0x%x offs=0x%x\n", curlen, len, 2322 EHCI_PAGE_OFFSET(dataphys)); 2323 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2324 dataphyslastpage, dataphyspage, 2325 dataphys); 2326 curlen = len; 2327 } 2328 #endif 2329 /* the length must be a multiple of the max size */ 2330 curlen -= curlen % mps; 2331 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2332 "curlen=%d\n", curlen)); 2333 #ifdef DIAGNOSTIC 2334 if (curlen == 0) 2335 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2336 #endif 2337 } 2338 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2339 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2340 dataphys, dataphyslastpage, 2341 len, curlen)); 2342 len -= curlen; 2343 2344 /* 2345 * Allocate another transfer if there's more data left, 2346 * or if force last short transfer flag is set and we're 2347 * allocating a multiple of the max packet size. 2348 */ 2349 if (len != 0 || 2350 ((curlen % mps) == 0 && !rd && curlen != 0 && 2351 (flags & USBD_FORCE_SHORT_XFER))) { 2352 next = ehci_alloc_sqtd(sc); 2353 if (next == NULL) 2354 goto nomem; 2355 nextphys = htole32(next->physaddr); 2356 } else { 2357 next = NULL; 2358 nextphys = EHCI_NULL; 2359 } 2360 2361 for (i = 0; i * EHCI_PAGE_SIZE < 2362 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2363 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2364 if (i != 0) /* use offset only in first buffer */ 2365 a = EHCI_PAGE(a); 2366 cur->qtd.qtd_buffer[i] = htole32(a); 2367 cur->qtd.qtd_buffer_hi[i] = 0; 2368 #ifdef DIAGNOSTIC 2369 if (i >= EHCI_QTD_NBUFFERS) { 2370 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2371 goto nomem; 2372 } 2373 #endif 2374 } 2375 cur->nextqtd = next; 2376 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2377 cur->qtd.qtd_status = 2378 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2379 cur->xfer = xfer; 2380 cur->len = curlen; 2381 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2382 dataphys, dataphys + curlen)); 2383 /* adjust the toggle based on the number of packets in this 2384 qtd */ 2385 if (((curlen + mps - 1) / mps) & 1) { 2386 tog ^= 1; 2387 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2388 } 2389 if (next == NULL) 2390 break; 2391 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2392 dataphys += curlen; 2393 cur = next; 2394 } 2395 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2396 *ep = cur; 2397 epipe->nexttoggle = tog; 2398 2399 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2400 *sp, *ep)); 2401 2402 return (USBD_NORMAL_COMPLETION); 2403 2404 nomem: 2405 /* XXX free chain */ 2406 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2407 return (USBD_NOMEM); 2408 } 2409 2410 Static void 2411 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2412 ehci_soft_qtd_t *sqtdend) 2413 { 2414 ehci_soft_qtd_t *p; 2415 int i; 2416 2417 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2418 sqtd, sqtdend)); 2419 2420 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2421 p = sqtd->nextqtd; 2422 ehci_free_sqtd(sc, sqtd); 2423 } 2424 } 2425 2426 /****************/ 2427 2428 /* 2429 * Close a reqular pipe. 2430 * Assumes that there are no pending transactions. 2431 */ 2432 void 2433 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2434 { 2435 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2436 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2437 ehci_soft_qh_t *sqh = epipe->sqh; 2438 int s; 2439 2440 s = splusb(); 2441 ehci_rem_qh(sc, sqh, head); 2442 splx(s); 2443 ehci_free_sqh(sc, epipe->sqh); 2444 } 2445 2446 /* 2447 * Abort a device request. 2448 * If this routine is called at splusb() it guarantees that the request 2449 * will be removed from the hardware scheduling and that the callback 2450 * for it will be called with USBD_CANCELLED status. 2451 * It's impossible to guarantee that the requested transfer will not 2452 * have happened since the hardware runs concurrently. 2453 * If the transaction has already happened we rely on the ordinary 2454 * interrupt processing to process it. 2455 * XXX This is most probably wrong. 2456 */ 2457 void 2458 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2459 { 2460 #define exfer EXFER(xfer) 2461 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2462 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2463 ehci_soft_qh_t *sqh = epipe->sqh; 2464 ehci_soft_qtd_t *sqtd; 2465 ehci_physaddr_t cur; 2466 u_int32_t qhstatus; 2467 int s; 2468 int hit; 2469 int wake; 2470 2471 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2472 2473 if (sc->sc_dying) { 2474 /* If we're dying, just do the software part. */ 2475 s = splusb(); 2476 xfer->status = status; /* make software ignore it */ 2477 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2478 usb_transfer_complete(xfer); 2479 splx(s); 2480 return; 2481 } 2482 2483 if (xfer->device->bus->intr_context || !curproc) 2484 panic("ehci_abort_xfer: not in process context"); 2485 2486 /* 2487 * If an abort is already in progress then just wait for it to 2488 * complete and return. 2489 */ 2490 if (xfer->hcflags & UXFER_ABORTING) { 2491 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2492 #ifdef DIAGNOSTIC 2493 if (status == USBD_TIMEOUT) 2494 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2495 #endif 2496 /* Override the status which might be USBD_TIMEOUT. */ 2497 xfer->status = status; 2498 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2499 xfer->hcflags |= UXFER_ABORTWAIT; 2500 while (xfer->hcflags & UXFER_ABORTING) 2501 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2502 return; 2503 } 2504 xfer->hcflags |= UXFER_ABORTING; 2505 2506 /* 2507 * Step 1: Make interrupt routine and hardware ignore xfer. 2508 */ 2509 s = splusb(); 2510 xfer->status = status; /* make software ignore it */ 2511 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2512 qhstatus = sqh->qh.qh_qtd.qtd_status; 2513 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2514 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2515 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2516 if (sqtd == exfer->sqtdend) 2517 break; 2518 } 2519 splx(s); 2520 2521 /* 2522 * Step 2: Wait until we know hardware has finished any possible 2523 * use of the xfer. Also make sure the soft interrupt routine 2524 * has run. 2525 */ 2526 ehci_sync_hc(sc); 2527 s = splusb(); 2528 #ifdef USB_USE_SOFTINTR 2529 sc->sc_softwake = 1; 2530 #endif /* USB_USE_SOFTINTR */ 2531 usb_schedsoftintr(&sc->sc_bus); 2532 #ifdef USB_USE_SOFTINTR 2533 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2534 #endif /* USB_USE_SOFTINTR */ 2535 splx(s); 2536 2537 /* 2538 * Step 3: Remove any vestiges of the xfer from the hardware. 2539 * The complication here is that the hardware may have executed 2540 * beyond the xfer we're trying to abort. So as we're scanning 2541 * the TDs of this xfer we check if the hardware points to 2542 * any of them. 2543 */ 2544 s = splusb(); /* XXX why? */ 2545 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2546 hit = 0; 2547 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2548 hit |= cur == sqtd->physaddr; 2549 if (sqtd == exfer->sqtdend) 2550 break; 2551 } 2552 sqtd = sqtd->nextqtd; 2553 /* Zap curqtd register if hardware pointed inside the xfer. */ 2554 if (hit && sqtd != NULL) { 2555 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2556 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2557 sqh->qh.qh_qtd.qtd_status = qhstatus; 2558 } else { 2559 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2560 } 2561 2562 /* 2563 * Step 4: Execute callback. 2564 */ 2565 #ifdef DIAGNOSTIC 2566 exfer->isdone = 1; 2567 #endif 2568 wake = xfer->hcflags & UXFER_ABORTWAIT; 2569 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2570 usb_transfer_complete(xfer); 2571 if (wake) 2572 wakeup(&xfer->hcflags); 2573 2574 splx(s); 2575 #undef exfer 2576 } 2577 2578 void 2579 ehci_timeout(void *addr) 2580 { 2581 struct ehci_xfer *exfer = addr; 2582 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2583 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2584 2585 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2586 #ifdef USB_DEBUG 2587 if (ehcidebug > 1) 2588 usbd_dump_pipe(exfer->xfer.pipe); 2589 #endif 2590 2591 if (sc->sc_dying) { 2592 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2593 return; 2594 } 2595 2596 /* Execute the abort in a process context. */ 2597 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2598 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2599 USB_TASKQ_HC); 2600 } 2601 2602 void 2603 ehci_timeout_task(void *addr) 2604 { 2605 usbd_xfer_handle xfer = addr; 2606 int s; 2607 2608 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2609 2610 s = splusb(); 2611 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2612 splx(s); 2613 } 2614 2615 /************************/ 2616 2617 Static usbd_status 2618 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2619 { 2620 usbd_status err; 2621 2622 /* Insert last in queue. */ 2623 err = usb_insert_transfer(xfer); 2624 if (err) 2625 return (err); 2626 2627 /* Pipe isn't running, start first */ 2628 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2629 } 2630 2631 Static usbd_status 2632 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2633 { 2634 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2635 usbd_status err; 2636 2637 if (sc->sc_dying) 2638 return (USBD_IOERROR); 2639 2640 #ifdef DIAGNOSTIC 2641 if (!(xfer->rqflags & URQ_REQUEST)) { 2642 /* XXX panic */ 2643 printf("ehci_device_ctrl_transfer: not a request\n"); 2644 return (USBD_INVAL); 2645 } 2646 #endif 2647 2648 err = ehci_device_request(xfer); 2649 if (err) 2650 return (err); 2651 2652 if (sc->sc_bus.use_polling) 2653 ehci_waitintr(sc, xfer); 2654 return (USBD_IN_PROGRESS); 2655 } 2656 2657 void 2658 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2659 { 2660 struct ehci_xfer *ex = EXFER(xfer); 2661 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2662 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2663 2664 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2665 2666 #ifdef DIAGNOSTIC 2667 if (!(xfer->rqflags & URQ_REQUEST)) { 2668 panic("ehci_ctrl_done: not a request"); 2669 } 2670 #endif 2671 2672 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2673 ehci_del_intr_list(ex); /* remove from active list */ 2674 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2675 } 2676 2677 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2678 } 2679 2680 /* Abort a device control request. */ 2681 Static void 2682 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2683 { 2684 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2685 ehci_abort_xfer(xfer, USBD_CANCELLED); 2686 } 2687 2688 /* Close a device control pipe. */ 2689 Static void 2690 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2691 { 2692 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2693 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2694 2695 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2696 ehci_close_pipe(pipe, sc->sc_async_head); 2697 } 2698 2699 usbd_status 2700 ehci_device_request(usbd_xfer_handle xfer) 2701 { 2702 #define exfer EXFER(xfer) 2703 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2704 usb_device_request_t *req = &xfer->request; 2705 usbd_device_handle dev = epipe->pipe.device; 2706 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2707 int addr = dev->address; 2708 ehci_soft_qtd_t *setup, *stat, *next; 2709 ehci_soft_qh_t *sqh; 2710 int isread; 2711 int len; 2712 usbd_status err; 2713 int s; 2714 2715 isread = req->bmRequestType & UT_READ; 2716 len = UGETW(req->wLength); 2717 2718 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2719 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2720 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2721 UGETW(req->wIndex), len, addr, 2722 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2723 2724 setup = ehci_alloc_sqtd(sc); 2725 if (setup == NULL) { 2726 err = USBD_NOMEM; 2727 goto bad1; 2728 } 2729 stat = ehci_alloc_sqtd(sc); 2730 if (stat == NULL) { 2731 err = USBD_NOMEM; 2732 goto bad2; 2733 } 2734 2735 sqh = epipe->sqh; 2736 epipe->u.ctl.length = len; 2737 2738 /* Update device address and length since they may have changed 2739 during the setup of the control pipe in usbd_new_device(). */ 2740 /* XXX This only needs to be done once, but it's too early in open. */ 2741 /* XXXX Should not touch ED here! */ 2742 sqh->qh.qh_endp = 2743 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2744 htole32( 2745 EHCI_QH_SET_ADDR(addr) | 2746 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2747 ); 2748 2749 /* Set up data transaction */ 2750 if (len != 0) { 2751 ehci_soft_qtd_t *end; 2752 2753 /* Start toggle at 1. */ 2754 epipe->nexttoggle = 1; 2755 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2756 &next, &end); 2757 if (err) 2758 goto bad3; 2759 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2760 end->nextqtd = stat; 2761 end->qtd.qtd_next = 2762 end->qtd.qtd_altnext = htole32(stat->physaddr); 2763 } else { 2764 next = stat; 2765 } 2766 2767 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2768 2769 /* Clear toggle */ 2770 setup->qtd.qtd_status = htole32( 2771 EHCI_QTD_ACTIVE | 2772 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2773 EHCI_QTD_SET_CERR(3) | 2774 EHCI_QTD_SET_TOGGLE(0) | 2775 EHCI_QTD_SET_BYTES(sizeof *req) 2776 ); 2777 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2778 setup->qtd.qtd_buffer_hi[0] = 0; 2779 setup->nextqtd = next; 2780 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2781 setup->xfer = xfer; 2782 setup->len = sizeof *req; 2783 2784 stat->qtd.qtd_status = htole32( 2785 EHCI_QTD_ACTIVE | 2786 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2787 EHCI_QTD_SET_CERR(3) | 2788 EHCI_QTD_SET_TOGGLE(1) | 2789 EHCI_QTD_IOC 2790 ); 2791 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2792 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2793 stat->nextqtd = NULL; 2794 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2795 stat->xfer = xfer; 2796 stat->len = 0; 2797 2798 #ifdef EHCI_DEBUG 2799 if (ehcidebug > 5) { 2800 DPRINTF(("ehci_device_request:\n")); 2801 ehci_dump_sqh(sqh); 2802 ehci_dump_sqtds(setup); 2803 } 2804 #endif 2805 2806 exfer->sqtdstart = setup; 2807 exfer->sqtdend = stat; 2808 #ifdef DIAGNOSTIC 2809 if (!exfer->isdone) { 2810 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2811 } 2812 exfer->isdone = 0; 2813 #endif 2814 2815 /* Insert qTD in QH list. */ 2816 s = splusb(); 2817 ehci_set_qh_qtd(sqh, setup); 2818 if (xfer->timeout && !sc->sc_bus.use_polling) { 2819 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2820 ehci_timeout, xfer); 2821 } 2822 ehci_add_intr_list(sc, exfer); 2823 xfer->status = USBD_IN_PROGRESS; 2824 splx(s); 2825 2826 #ifdef EHCI_DEBUG 2827 if (ehcidebug > 10) { 2828 DPRINTF(("ehci_device_request: status=%x\n", 2829 EOREAD4(sc, EHCI_USBSTS))); 2830 delay(10000); 2831 ehci_dump_regs(sc); 2832 ehci_dump_sqh(sc->sc_async_head); 2833 ehci_dump_sqh(sqh); 2834 ehci_dump_sqtds(setup); 2835 } 2836 #endif 2837 2838 return (USBD_NORMAL_COMPLETION); 2839 2840 bad3: 2841 ehci_free_sqtd(sc, stat); 2842 bad2: 2843 ehci_free_sqtd(sc, setup); 2844 bad1: 2845 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2846 xfer->status = err; 2847 usb_transfer_complete(xfer); 2848 return (err); 2849 #undef exfer 2850 } 2851 2852 /* 2853 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2854 * qTD status, or miss signalling occasionally under heavy load. If the host 2855 * machine is too fast, we we can miss transaction completion - when we scan 2856 * the active list the transaction still seems to be active. This generally 2857 * exhibits itself as a umass stall that never recovers. 2858 * 2859 * We work around this behaviour by setting up this callback after any softintr 2860 * that completes with transactions still pending, giving us another chance to 2861 * check for completion after the writeback has taken place. 2862 */ 2863 void 2864 ehci_intrlist_timeout(void *arg) 2865 { 2866 ehci_softc_t *sc = arg; 2867 int s = splusb(); 2868 2869 DPRINTF(("ehci_intrlist_timeout\n")); 2870 usb_schedsoftintr(&sc->sc_bus); 2871 2872 splx(s); 2873 } 2874 2875 /************************/ 2876 2877 Static usbd_status 2878 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2879 { 2880 usbd_status err; 2881 2882 /* Insert last in queue. */ 2883 err = usb_insert_transfer(xfer); 2884 if (err) 2885 return (err); 2886 2887 /* Pipe isn't running, start first */ 2888 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2889 } 2890 2891 usbd_status 2892 ehci_device_bulk_start(usbd_xfer_handle xfer) 2893 { 2894 #define exfer EXFER(xfer) 2895 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2896 usbd_device_handle dev = epipe->pipe.device; 2897 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2898 ehci_soft_qtd_t *data, *dataend; 2899 ehci_soft_qh_t *sqh; 2900 usbd_status err; 2901 int len, isread, endpt; 2902 int s; 2903 2904 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2905 xfer, xfer->length, xfer->flags)); 2906 2907 if (sc->sc_dying) 2908 return (USBD_IOERROR); 2909 2910 #ifdef DIAGNOSTIC 2911 if (xfer->rqflags & URQ_REQUEST) 2912 panic("ehci_device_bulk_start: a request"); 2913 #endif 2914 2915 len = xfer->length; 2916 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2917 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2918 sqh = epipe->sqh; 2919 2920 epipe->u.bulk.length = len; 2921 2922 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2923 &dataend); 2924 if (err) { 2925 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2926 xfer->status = err; 2927 usb_transfer_complete(xfer); 2928 return (err); 2929 } 2930 2931 #ifdef EHCI_DEBUG 2932 if (ehcidebug > 5) { 2933 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2934 ehci_dump_sqh(sqh); 2935 ehci_dump_sqtds(data); 2936 } 2937 #endif 2938 2939 /* Set up interrupt info. */ 2940 exfer->sqtdstart = data; 2941 exfer->sqtdend = dataend; 2942 #ifdef DIAGNOSTIC 2943 if (!exfer->isdone) { 2944 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2945 } 2946 exfer->isdone = 0; 2947 #endif 2948 2949 s = splusb(); 2950 ehci_set_qh_qtd(sqh, data); 2951 if (xfer->timeout && !sc->sc_bus.use_polling) { 2952 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2953 ehci_timeout, xfer); 2954 } 2955 ehci_add_intr_list(sc, exfer); 2956 xfer->status = USBD_IN_PROGRESS; 2957 splx(s); 2958 2959 #ifdef EHCI_DEBUG 2960 if (ehcidebug > 10) { 2961 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2962 delay(10000); 2963 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2964 ehci_dump_regs(sc); 2965 #if 0 2966 printf("async_head:\n"); 2967 ehci_dump_sqh(sc->sc_async_head); 2968 #endif 2969 printf("sqh:\n"); 2970 ehci_dump_sqh(sqh); 2971 ehci_dump_sqtds(data); 2972 } 2973 #endif 2974 2975 if (sc->sc_bus.use_polling) 2976 ehci_waitintr(sc, xfer); 2977 2978 return (USBD_IN_PROGRESS); 2979 #undef exfer 2980 } 2981 2982 Static void 2983 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2984 { 2985 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2986 ehci_abort_xfer(xfer, USBD_CANCELLED); 2987 } 2988 2989 /* 2990 * Close a device bulk pipe. 2991 */ 2992 Static void 2993 ehci_device_bulk_close(usbd_pipe_handle pipe) 2994 { 2995 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2996 2997 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2998 ehci_close_pipe(pipe, sc->sc_async_head); 2999 } 3000 3001 void 3002 ehci_device_bulk_done(usbd_xfer_handle xfer) 3003 { 3004 struct ehci_xfer *ex = EXFER(xfer); 3005 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3006 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3007 3008 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3009 xfer, xfer->actlen)); 3010 3011 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3012 ehci_del_intr_list(ex); /* remove from active list */ 3013 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3014 } 3015 3016 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3017 } 3018 3019 /************************/ 3020 3021 Static usbd_status 3022 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3023 { 3024 struct ehci_soft_islot *isp; 3025 int islot, lev; 3026 3027 /* Find a poll rate that is large enough. */ 3028 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3029 if (EHCI_ILEV_IVAL(lev) <= ival) 3030 break; 3031 3032 /* Pick an interrupt slot at the right level. */ 3033 /* XXX could do better than picking at random */ 3034 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3035 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3036 3037 sqh->islot = islot; 3038 isp = &sc->sc_islots[islot]; 3039 ehci_add_qh(sqh, isp->sqh); 3040 3041 return (USBD_NORMAL_COMPLETION); 3042 } 3043 3044 Static usbd_status 3045 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3046 { 3047 usbd_status err; 3048 3049 /* Insert last in queue. */ 3050 err = usb_insert_transfer(xfer); 3051 if (err) 3052 return (err); 3053 3054 /* 3055 * Pipe isn't running (otherwise err would be USBD_INPROG), 3056 * so start it first. 3057 */ 3058 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3059 } 3060 3061 Static usbd_status 3062 ehci_device_intr_start(usbd_xfer_handle xfer) 3063 { 3064 #define exfer EXFER(xfer) 3065 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3066 usbd_device_handle dev = xfer->pipe->device; 3067 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3068 ehci_soft_qtd_t *data, *dataend; 3069 ehci_soft_qh_t *sqh; 3070 usbd_status err; 3071 int len, isread, endpt; 3072 int s; 3073 3074 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3075 xfer, xfer->length, xfer->flags)); 3076 3077 if (sc->sc_dying) 3078 return (USBD_IOERROR); 3079 3080 #ifdef DIAGNOSTIC 3081 if (xfer->rqflags & URQ_REQUEST) 3082 panic("ehci_device_intr_start: a request"); 3083 #endif 3084 3085 len = xfer->length; 3086 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3087 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3088 sqh = epipe->sqh; 3089 3090 epipe->u.intr.length = len; 3091 3092 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3093 &dataend); 3094 if (err) { 3095 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3096 xfer->status = err; 3097 usb_transfer_complete(xfer); 3098 return (err); 3099 } 3100 3101 #ifdef EHCI_DEBUG 3102 if (ehcidebug > 5) { 3103 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3104 ehci_dump_sqh(sqh); 3105 ehci_dump_sqtds(data); 3106 } 3107 #endif 3108 3109 /* Set up interrupt info. */ 3110 exfer->sqtdstart = data; 3111 exfer->sqtdend = dataend; 3112 #ifdef DIAGNOSTIC 3113 if (!exfer->isdone) { 3114 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3115 } 3116 exfer->isdone = 0; 3117 #endif 3118 3119 s = splusb(); 3120 ehci_set_qh_qtd(sqh, data); 3121 if (xfer->timeout && !sc->sc_bus.use_polling) { 3122 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3123 ehci_timeout, xfer); 3124 } 3125 ehci_add_intr_list(sc, exfer); 3126 xfer->status = USBD_IN_PROGRESS; 3127 splx(s); 3128 3129 #ifdef EHCI_DEBUG 3130 if (ehcidebug > 10) { 3131 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3132 delay(10000); 3133 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3134 ehci_dump_regs(sc); 3135 printf("sqh:\n"); 3136 ehci_dump_sqh(sqh); 3137 ehci_dump_sqtds(data); 3138 } 3139 #endif 3140 3141 if (sc->sc_bus.use_polling) 3142 ehci_waitintr(sc, xfer); 3143 3144 return (USBD_IN_PROGRESS); 3145 #undef exfer 3146 } 3147 3148 Static void 3149 ehci_device_intr_abort(usbd_xfer_handle xfer) 3150 { 3151 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3152 if (xfer->pipe->intrxfer == xfer) { 3153 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3154 xfer->pipe->intrxfer = NULL; 3155 } 3156 ehci_abort_xfer(xfer, USBD_CANCELLED); 3157 } 3158 3159 Static void 3160 ehci_device_intr_close(usbd_pipe_handle pipe) 3161 { 3162 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3163 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3164 struct ehci_soft_islot *isp; 3165 3166 isp = &sc->sc_islots[epipe->sqh->islot]; 3167 ehci_close_pipe(pipe, isp->sqh); 3168 } 3169 3170 Static void 3171 ehci_device_intr_done(usbd_xfer_handle xfer) 3172 { 3173 #define exfer EXFER(xfer) 3174 struct ehci_xfer *ex = EXFER(xfer); 3175 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3176 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3177 ehci_soft_qtd_t *data, *dataend; 3178 ehci_soft_qh_t *sqh; 3179 usbd_status err; 3180 int len, isread, endpt, s; 3181 3182 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3183 xfer, xfer->actlen)); 3184 3185 if (xfer->pipe->repeat) { 3186 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3187 3188 len = epipe->u.intr.length; 3189 xfer->length = len; 3190 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3191 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3192 sqh = epipe->sqh; 3193 3194 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3195 &data, &dataend); 3196 if (err) { 3197 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3198 xfer->status = err; 3199 return; 3200 } 3201 3202 /* Set up interrupt info. */ 3203 exfer->sqtdstart = data; 3204 exfer->sqtdend = dataend; 3205 #ifdef DIAGNOSTIC 3206 if (!exfer->isdone) { 3207 printf("ehci_device_intr_done: not done, ex=%p\n", 3208 exfer); 3209 } 3210 exfer->isdone = 0; 3211 #endif 3212 3213 s = splusb(); 3214 ehci_set_qh_qtd(sqh, data); 3215 if (xfer->timeout && !sc->sc_bus.use_polling) { 3216 usb_callout(xfer->timeout_handle, 3217 mstohz(xfer->timeout), ehci_timeout, xfer); 3218 } 3219 splx(s); 3220 3221 xfer->status = USBD_IN_PROGRESS; 3222 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3223 ehci_del_intr_list(ex); /* remove from active list */ 3224 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3225 } 3226 #undef exfer 3227 } 3228 3229 /************************/ 3230 3231 Static usbd_status 3232 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3233 { 3234 return USBD_IOERROR; 3235 } 3236 Static usbd_status 3237 ehci_device_isoc_start(usbd_xfer_handle xfer) 3238 { 3239 return USBD_IOERROR; 3240 } 3241 Static void 3242 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3243 { 3244 } 3245 Static void 3246 ehci_device_isoc_close(usbd_pipe_handle pipe) 3247 { 3248 } 3249 Static void 3250 ehci_device_isoc_done(usbd_xfer_handle xfer) 3251 { 3252 } 3253
Indexes created Tue Sep 23 07:09:52 GMT 2025