ehci.c revision 1.128
1 /* $NetBSD: ehci.c,v 1.128 2008/01/28 00:47:05 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.128 2008/01/28 00:47:05 jmcneill Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 91 #ifdef EHCI_DEBUG 92 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 93 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 94 int ehcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 struct ehci_pipe { 104 struct usbd_pipe pipe; 105 int nexttoggle; 106 107 ehci_soft_qh_t *sqh; 108 union { 109 ehci_soft_qtd_t *qtd; 110 /* ehci_soft_itd_t *itd; */ 111 } tail; 112 union { 113 /* Control pipe */ 114 struct { 115 usb_dma_t reqdma; 116 u_int length; 117 } ctl; 118 /* Interrupt pipe */ 119 struct { 120 u_int length; 121 } intr; 122 /* Bulk pipe */ 123 struct { 124 u_int length; 125 } bulk; 126 /* Iso pipe */ 127 /* XXX */ 128 } u; 129 }; 130 131 Static void ehci_shutdown(void *); 132 133 Static usbd_status ehci_open(usbd_pipe_handle); 134 Static void ehci_poll(struct usbd_bus *); 135 Static void ehci_softintr(void *); 136 Static int ehci_intr1(ehci_softc_t *); 137 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 138 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 139 Static void ehci_idone(struct ehci_xfer *); 140 Static void ehci_timeout(void *); 141 Static void ehci_timeout_task(void *); 142 Static void ehci_intrlist_timeout(void *); 143 144 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 145 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 146 147 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 148 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 149 150 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 152 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 153 Static void ehci_root_ctrl_close(usbd_pipe_handle); 154 Static void ehci_root_ctrl_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 158 Static void ehci_root_intr_abort(usbd_xfer_handle); 159 Static void ehci_root_intr_close(usbd_pipe_handle); 160 Static void ehci_root_intr_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 164 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_device_ctrl_close(usbd_pipe_handle); 166 Static void ehci_device_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 170 Static void ehci_device_bulk_abort(usbd_xfer_handle); 171 Static void ehci_device_bulk_close(usbd_pipe_handle); 172 Static void ehci_device_bulk_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 176 Static void ehci_device_intr_abort(usbd_xfer_handle); 177 Static void ehci_device_intr_close(usbd_pipe_handle); 178 Static void ehci_device_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 182 Static void ehci_device_isoc_abort(usbd_xfer_handle); 183 Static void ehci_device_isoc_close(usbd_pipe_handle); 184 Static void ehci_device_isoc_done(usbd_xfer_handle); 185 186 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 187 Static void ehci_noop(usbd_pipe_handle pipe); 188 189 Static int ehci_str(usb_string_descriptor_t *, int, const char *); 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_disown(ehci_softc_t *, int, int); 192 193 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 194 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 195 196 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 197 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 198 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 199 ehci_softc_t *, int, int, usbd_xfer_handle, 200 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 201 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 202 ehci_soft_qtd_t *); 203 204 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 205 206 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 207 int ival); 208 209 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 210 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 211 ehci_soft_qh_t *); 212 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 213 Static void ehci_sync_hc(ehci_softc_t *); 214 215 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 216 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 217 218 #ifdef EHCI_DEBUG 219 Static void ehci_dump_regs(ehci_softc_t *); 220 void ehci_dump(void); 221 Static ehci_softc_t *theehci; 222 Static void ehci_dump_link(ehci_link_t, int); 223 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 224 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 225 Static void ehci_dump_qtd(ehci_qtd_t *); 226 Static void ehci_dump_sqh(ehci_soft_qh_t *); 227 #ifdef DIAGNOSTIC 228 Static void ehci_dump_exfer(struct ehci_xfer *); 229 #endif 230 #endif 231 232 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 233 234 #define EHCI_INTR_ENDPT 1 235 236 #define ehci_add_intr_list(sc, ex) \ 237 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 238 #define ehci_del_intr_list(ex) \ 239 do { \ 240 LIST_REMOVE((ex), inext); \ 241 (ex)->inext.le_prev = NULL; \ 242 } while (0) 243 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 244 245 Static const struct usbd_bus_methods ehci_bus_methods = { 246 ehci_open, 247 ehci_softintr, 248 ehci_poll, 249 ehci_allocm, 250 ehci_freem, 251 ehci_allocx, 252 ehci_freex, 253 }; 254 255 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 256 ehci_root_ctrl_transfer, 257 ehci_root_ctrl_start, 258 ehci_root_ctrl_abort, 259 ehci_root_ctrl_close, 260 ehci_noop, 261 ehci_root_ctrl_done, 262 }; 263 264 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 265 ehci_root_intr_transfer, 266 ehci_root_intr_start, 267 ehci_root_intr_abort, 268 ehci_root_intr_close, 269 ehci_noop, 270 ehci_root_intr_done, 271 }; 272 273 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 274 ehci_device_ctrl_transfer, 275 ehci_device_ctrl_start, 276 ehci_device_ctrl_abort, 277 ehci_device_ctrl_close, 278 ehci_noop, 279 ehci_device_ctrl_done, 280 }; 281 282 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 283 ehci_device_intr_transfer, 284 ehci_device_intr_start, 285 ehci_device_intr_abort, 286 ehci_device_intr_close, 287 ehci_device_clear_toggle, 288 ehci_device_intr_done, 289 }; 290 291 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 292 ehci_device_bulk_transfer, 293 ehci_device_bulk_start, 294 ehci_device_bulk_abort, 295 ehci_device_bulk_close, 296 ehci_device_clear_toggle, 297 ehci_device_bulk_done, 298 }; 299 300 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 301 ehci_device_isoc_transfer, 302 ehci_device_isoc_start, 303 ehci_device_isoc_abort, 304 ehci_device_isoc_close, 305 ehci_noop, 306 ehci_device_isoc_done, 307 }; 308 309 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 310 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 311 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 312 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 313 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 314 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 315 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 316 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 317 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 318 }; 319 320 usbd_status 321 ehci_init(ehci_softc_t *sc) 322 { 323 u_int32_t vers, sparams, cparams, hcr; 324 u_int i; 325 usbd_status err; 326 ehci_soft_qh_t *sqh; 327 u_int ncomp; 328 329 DPRINTF(("ehci_init: start\n")); 330 #ifdef EHCI_DEBUG 331 theehci = sc; 332 #endif 333 334 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 335 336 vers = EREAD2(sc, EHCI_HCIVERSION); 337 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 338 vers >> 8, vers & 0xff); 339 340 sparams = EREAD4(sc, EHCI_HCSPARAMS); 341 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 342 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 343 ncomp = EHCI_HCS_N_CC(sparams); 344 if (ncomp != sc->sc_ncomp) { 345 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 346 USBDEVNAME(sc->sc_bus.bdev), 347 ncomp, sc->sc_ncomp); 348 #if NOHCI == 0 || NUHCI == 0 349 aprint_error("%s: ohci or uhci probably not configured\n", 350 USBDEVNAME(sc->sc_bus.bdev)); 351 #endif 352 if (ncomp < sc->sc_ncomp) 353 sc->sc_ncomp = ncomp; 354 } 355 if (sc->sc_ncomp > 0) { 356 aprint_normal("%s: companion controller%s, %d port%s each:", 357 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 358 EHCI_HCS_N_PCC(sparams), 359 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 360 for (i = 0; i < sc->sc_ncomp; i++) 361 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 362 aprint_normal("\n"); 363 } 364 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 365 cparams = EREAD4(sc, EHCI_HCCPARAMS); 366 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 367 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 368 369 if (EHCI_HCC_64BIT(cparams)) { 370 /* MUST clear segment register if 64 bit capable. */ 371 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 372 } 373 374 sc->sc_bus.usbrev = USBREV_2_0; 375 376 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 377 USB_MEM_RESERVE); 378 379 /* Reset the controller */ 380 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 381 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 382 usb_delay_ms(&sc->sc_bus, 1); 383 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 384 for (i = 0; i < 100; i++) { 385 usb_delay_ms(&sc->sc_bus, 1); 386 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 387 if (!hcr) 388 break; 389 } 390 if (hcr) { 391 aprint_error("%s: reset timeout\n", 392 USBDEVNAME(sc->sc_bus.bdev)); 393 return (USBD_IOERROR); 394 } 395 396 /* XXX need proper intr scheduling */ 397 sc->sc_rand = 96; 398 399 /* frame list size at default, read back what we got and use that */ 400 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 401 case 0: sc->sc_flsize = 1024; break; 402 case 1: sc->sc_flsize = 512; break; 403 case 2: sc->sc_flsize = 256; break; 404 case 3: return (USBD_IOERROR); 405 } 406 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 407 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 408 if (err) 409 return (err); 410 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 411 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 412 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 413 414 /* Set up the bus struct. */ 415 sc->sc_bus.methods = &ehci_bus_methods; 416 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 417 418 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 419 420 sc->sc_eintrs = EHCI_NORMAL_INTRS; 421 422 /* 423 * Allocate the interrupt dummy QHs. These are arranged to give poll 424 * intervals that are powers of 2 times 1ms. 425 */ 426 for (i = 0; i < EHCI_INTRQHS; i++) { 427 sqh = ehci_alloc_sqh(sc); 428 if (sqh == NULL) { 429 err = USBD_NOMEM; 430 goto bad1; 431 } 432 sc->sc_islots[i].sqh = sqh; 433 } 434 for (i = 0; i < EHCI_INTRQHS; i++) { 435 sqh = sc->sc_islots[i].sqh; 436 if (i == 0) { 437 /* The last (1ms) QH terminates. */ 438 sqh->qh.qh_link = EHCI_NULL; 439 sqh->next = NULL; 440 } else { 441 /* Otherwise the next QH has half the poll interval */ 442 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 443 sqh->qh.qh_link = htole32(sqh->next->physaddr | 444 EHCI_LINK_QH); 445 } 446 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 447 sqh->qh.qh_curqtd = EHCI_NULL; 448 sqh->next = NULL; 449 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 451 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 452 sqh->sqtd = NULL; 453 } 454 /* Point the frame list at the last level (128ms). */ 455 for (i = 0; i < sc->sc_flsize; i++) { 456 int j; 457 458 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 459 revbits[i & (EHCI_MAX_POLLRATE-1)]; 460 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 461 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 462 i)].sqh->physaddr); 463 } 464 465 /* Allocate dummy QH that starts the async list. */ 466 sqh = ehci_alloc_sqh(sc); 467 if (sqh == NULL) { 468 err = USBD_NOMEM; 469 goto bad1; 470 } 471 /* Fill the QH */ 472 sqh->qh.qh_endp = 473 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 474 sqh->qh.qh_link = 475 htole32(sqh->physaddr | EHCI_LINK_QH); 476 sqh->qh.qh_curqtd = EHCI_NULL; 477 sqh->next = NULL; 478 /* Fill the overlay qTD */ 479 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 481 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 482 sqh->sqtd = NULL; 483 #ifdef EHCI_DEBUG 484 if (ehcidebug) { 485 ehci_dump_sqh(sqh); 486 } 487 #endif 488 489 /* Point to async list */ 490 sc->sc_async_head = sqh; 491 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 492 493 usb_callout_init(sc->sc_tmo_intrlist); 494 495 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 496 497 /* Turn on controller */ 498 EOWRITE4(sc, EHCI_USBCMD, 499 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 500 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 501 EHCI_CMD_ASE | 502 EHCI_CMD_PSE | 503 EHCI_CMD_RS); 504 505 /* Take over port ownership */ 506 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 507 508 for (i = 0; i < 100; i++) { 509 usb_delay_ms(&sc->sc_bus, 1); 510 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 511 if (!hcr) 512 break; 513 } 514 if (hcr) { 515 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 516 return (USBD_IOERROR); 517 } 518 519 /* Enable interrupts */ 520 DPRINTFN(1,("ehci_init: enabling\n")); 521 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 522 523 return (USBD_NORMAL_COMPLETION); 524 525 #if 0 526 bad2: 527 ehci_free_sqh(sc, sc->sc_async_head); 528 #endif 529 bad1: 530 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 531 return (err); 532 } 533 534 int 535 ehci_intr(void *v) 536 { 537 ehci_softc_t *sc = v; 538 539 if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 540 return (0); 541 542 /* If we get an interrupt while polling, then just ignore it. */ 543 if (sc->sc_bus.use_polling) { 544 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 545 546 if (intrs) 547 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 548 #ifdef DIAGNOSTIC 549 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 550 #endif 551 return (0); 552 } 553 554 return (ehci_intr1(sc)); 555 } 556 557 Static int 558 ehci_intr1(ehci_softc_t *sc) 559 { 560 u_int32_t intrs, eintrs; 561 562 DPRINTFN(20,("ehci_intr1: enter\n")); 563 564 /* In case the interrupt occurs before initialization has completed. */ 565 if (sc == NULL) { 566 #ifdef DIAGNOSTIC 567 printf("ehci_intr1: sc == NULL\n"); 568 #endif 569 return (0); 570 } 571 572 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 573 if (!intrs) 574 return (0); 575 576 eintrs = intrs & sc->sc_eintrs; 577 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 578 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 579 (u_int)eintrs)); 580 if (!eintrs) 581 return (0); 582 583 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 584 sc->sc_bus.intr_context++; 585 sc->sc_bus.no_intrs++; 586 if (eintrs & EHCI_STS_IAA) { 587 DPRINTF(("ehci_intr1: door bell\n")); 588 wakeup(&sc->sc_async_head); 589 eintrs &= ~EHCI_STS_IAA; 590 } 591 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 592 DPRINTFN(5,("ehci_intr1: %s %s\n", 593 eintrs & EHCI_STS_INT ? "INT" : "", 594 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 595 usb_schedsoftintr(&sc->sc_bus); 596 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 597 } 598 if (eintrs & EHCI_STS_HSE) { 599 printf("%s: unrecoverable error, controller halted\n", 600 USBDEVNAME(sc->sc_bus.bdev)); 601 /* XXX what else */ 602 } 603 if (eintrs & EHCI_STS_PCD) { 604 ehci_pcd(sc, sc->sc_intrxfer); 605 eintrs &= ~EHCI_STS_PCD; 606 } 607 608 sc->sc_bus.intr_context--; 609 610 if (eintrs != 0) { 611 /* Block unprocessed interrupts. */ 612 sc->sc_eintrs &= ~eintrs; 613 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 614 printf("%s: blocking intrs 0x%x\n", 615 USBDEVNAME(sc->sc_bus.bdev), eintrs); 616 } 617 618 return (1); 619 } 620 621 622 void 623 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 624 { 625 usbd_pipe_handle pipe; 626 u_char *p; 627 int i, m; 628 629 if (xfer == NULL) { 630 /* Just ignore the change. */ 631 return; 632 } 633 634 pipe = xfer->pipe; 635 636 p = KERNADDR(&xfer->dmabuf, 0); 637 m = min(sc->sc_noport, xfer->length * 8 - 1); 638 memset(p, 0, xfer->length); 639 for (i = 1; i <= m; i++) { 640 /* Pick out CHANGE bits from the status reg. */ 641 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 642 p[i/8] |= 1 << (i%8); 643 } 644 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 645 xfer->actlen = xfer->length; 646 xfer->status = USBD_NORMAL_COMPLETION; 647 648 usb_transfer_complete(xfer); 649 } 650 651 void 652 ehci_softintr(void *v) 653 { 654 ehci_softc_t *sc = v; 655 struct ehci_xfer *ex, *nextex; 656 657 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 658 sc->sc_bus.intr_context)); 659 660 sc->sc_bus.intr_context++; 661 662 /* 663 * The only explanation I can think of for why EHCI is as brain dead 664 * as UHCI interrupt-wise is that Intel was involved in both. 665 * An interrupt just tells us that something is done, we have no 666 * clue what, so we need to scan through all active transfers. :-( 667 */ 668 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 669 nextex = LIST_NEXT(ex, inext); 670 ehci_check_intr(sc, ex); 671 } 672 673 /* Schedule a callout to catch any dropped transactions. */ 674 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 675 !LIST_EMPTY(&sc->sc_intrhead)) 676 usb_callout(sc->sc_tmo_intrlist, hz, 677 ehci_intrlist_timeout, sc); 678 679 #ifdef USB_USE_SOFTINTR 680 if (sc->sc_softwake) { 681 sc->sc_softwake = 0; 682 wakeup(&sc->sc_softwake); 683 } 684 #endif /* USB_USE_SOFTINTR */ 685 686 sc->sc_bus.intr_context--; 687 } 688 689 /* Check for an interrupt. */ 690 void 691 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 692 { 693 ehci_soft_qtd_t *sqtd, *lsqtd; 694 u_int32_t status; 695 696 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 697 698 if (ex->sqtdstart == NULL) { 699 printf("ehci_check_intr: sqtdstart=NULL\n"); 700 return; 701 } 702 lsqtd = ex->sqtdend; 703 #ifdef DIAGNOSTIC 704 if (lsqtd == NULL) { 705 printf("ehci_check_intr: lsqtd==0\n"); 706 return; 707 } 708 #endif 709 /* 710 * If the last TD is still active we need to check whether there 711 * is a an error somewhere in the middle, or whether there was a 712 * short packet (SPD and not ACTIVE). 713 */ 714 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 715 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 716 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 717 status = le32toh(sqtd->qtd.qtd_status); 718 /* If there's an active QTD the xfer isn't done. */ 719 if (status & EHCI_QTD_ACTIVE) 720 break; 721 /* Any kind of error makes the xfer done. */ 722 if (status & EHCI_QTD_HALTED) 723 goto done; 724 /* We want short packets, and it is short: it's done */ 725 if (EHCI_QTD_GET_BYTES(status) != 0) 726 goto done; 727 } 728 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 729 ex, ex->sqtdstart)); 730 return; 731 } 732 done: 733 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 734 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 735 ehci_idone(ex); 736 } 737 738 void 739 ehci_idone(struct ehci_xfer *ex) 740 { 741 usbd_xfer_handle xfer = &ex->xfer; 742 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 743 ehci_soft_qtd_t *sqtd, *lsqtd; 744 u_int32_t status = 0, nstatus = 0; 745 int actlen; 746 747 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 748 #ifdef DIAGNOSTIC 749 { 750 int s = splhigh(); 751 if (ex->isdone) { 752 splx(s); 753 #ifdef EHCI_DEBUG 754 printf("ehci_idone: ex is done!\n "); 755 ehci_dump_exfer(ex); 756 #else 757 printf("ehci_idone: ex=%p is done!\n", ex); 758 #endif 759 return; 760 } 761 ex->isdone = 1; 762 splx(s); 763 } 764 #endif 765 766 if (xfer->status == USBD_CANCELLED || 767 xfer->status == USBD_TIMEOUT) { 768 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 769 return; 770 } 771 772 #ifdef EHCI_DEBUG 773 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 774 if (ehcidebug > 10) 775 ehci_dump_sqtds(ex->sqtdstart); 776 #endif 777 778 /* The transfer is done, compute actual length and status. */ 779 lsqtd = ex->sqtdend; 780 actlen = 0; 781 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 782 nstatus = le32toh(sqtd->qtd.qtd_status); 783 if (nstatus & EHCI_QTD_ACTIVE) 784 break; 785 786 status = nstatus; 787 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 788 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 789 } 790 791 /* 792 * If there are left over TDs we need to update the toggle. 793 * The default pipe doesn't need it since control transfers 794 * start the toggle at 0 every time. 795 * For a short transfer we need to update the toggle for the missing 796 * packets within the qTD. 797 */ 798 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 799 xfer->pipe->device->default_pipe != xfer->pipe) { 800 DPRINTFN(2, ("ehci_idone: need toggle update " 801 "status=%08x nstatus=%08x\n", status, nstatus)); 802 #if 0 803 ehci_dump_sqh(epipe->sqh); 804 ehci_dump_sqtds(ex->sqtdstart); 805 #endif 806 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 807 } 808 809 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 810 xfer->length, actlen, status)); 811 xfer->actlen = actlen; 812 if (status & EHCI_QTD_HALTED) { 813 #ifdef EHCI_DEBUG 814 char sbuf[128]; 815 816 bitmask_snprintf((u_int32_t)status, 817 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 818 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 819 820 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 821 "status 0x%s\n", 822 xfer->pipe->device->address, 823 xfer->pipe->endpoint->edesc->bEndpointAddress, 824 sbuf)); 825 if (ehcidebug > 2) { 826 ehci_dump_sqh(epipe->sqh); 827 ehci_dump_sqtds(ex->sqtdstart); 828 } 829 #endif 830 /* low&full speed has an extra error flag */ 831 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 832 EHCI_QH_SPEED_HIGH) 833 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 834 else 835 status &= EHCI_QTD_STATERRS; 836 if (status == 0) /* no other errors means a stall */ 837 xfer->status = USBD_STALLED; 838 else 839 xfer->status = USBD_IOERROR; /* more info XXX */ 840 /* XXX need to reset TT on missed microframe */ 841 if (status & EHCI_QTD_MISSEDMICRO) { 842 ehci_softc_t *sc = (ehci_softc_t *) 843 xfer->pipe->device->bus; 844 845 printf("%s: missed microframe, TT reset not " 846 "implemented, hub might be inoperational\n", 847 USBDEVNAME(sc->sc_bus.bdev)); 848 } 849 } else { 850 xfer->status = USBD_NORMAL_COMPLETION; 851 } 852 853 usb_transfer_complete(xfer); 854 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 855 } 856 857 /* 858 * Wait here until controller claims to have an interrupt. 859 * Then call ehci_intr and return. Use timeout to avoid waiting 860 * too long. 861 */ 862 void 863 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 864 { 865 int timo; 866 u_int32_t intrs; 867 868 xfer->status = USBD_IN_PROGRESS; 869 for (timo = xfer->timeout; timo >= 0; timo--) { 870 usb_delay_ms(&sc->sc_bus, 1); 871 if (sc->sc_dying) 872 break; 873 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 874 sc->sc_eintrs; 875 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 876 #ifdef EHCI_DEBUG 877 if (ehcidebug > 15) 878 ehci_dump_regs(sc); 879 #endif 880 if (intrs) { 881 ehci_intr1(sc); 882 if (xfer->status != USBD_IN_PROGRESS) 883 return; 884 } 885 } 886 887 /* Timeout */ 888 DPRINTF(("ehci_waitintr: timeout\n")); 889 xfer->status = USBD_TIMEOUT; 890 usb_transfer_complete(xfer); 891 /* XXX should free TD */ 892 } 893 894 void 895 ehci_poll(struct usbd_bus *bus) 896 { 897 ehci_softc_t *sc = (ehci_softc_t *)bus; 898 #ifdef EHCI_DEBUG 899 static int last; 900 int new; 901 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 902 if (new != last) { 903 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 904 last = new; 905 } 906 #endif 907 908 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 909 ehci_intr1(sc); 910 } 911 912 int 913 ehci_detach(struct ehci_softc *sc, int flags) 914 { 915 int rv = 0; 916 917 if (sc->sc_child != NULL) 918 rv = config_detach(sc->sc_child, flags); 919 920 if (rv != 0) 921 return (rv); 922 923 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 924 925 if (sc->sc_shutdownhook != NULL) 926 shutdownhook_disestablish(sc->sc_shutdownhook); 927 928 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 929 930 /* XXX free other data structures XXX */ 931 mutex_destroy(&sc->sc_doorbell_lock); 932 933 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 934 935 return (rv); 936 } 937 938 939 int 940 ehci_activate(device_ptr_t self, enum devact act) 941 { 942 struct ehci_softc *sc = (struct ehci_softc *)self; 943 int rv = 0; 944 945 switch (act) { 946 case DVACT_ACTIVATE: 947 return (EOPNOTSUPP); 948 949 case DVACT_DEACTIVATE: 950 sc->sc_dying = 1; 951 if (sc->sc_child != NULL) 952 rv = config_deactivate(sc->sc_child); 953 break; 954 } 955 return (rv); 956 } 957 958 /* 959 * Handle suspend/resume. 960 * 961 * We need to switch to polling mode here, because this routine is 962 * called from an interrupt context. This is all right since we 963 * are almost suspended anyway. 964 * 965 * Note that this power handler isn't to be registered directly; the 966 * bus glue needs to call out to it. 967 */ 968 bool 969 ehci_suspend(device_t dv) 970 { 971 ehci_softc_t *sc = (ehci_softc_t *)dv; 972 int i, s; 973 uint32_t cmd, hcr; 974 975 s = splhardusb(); 976 977 sc->sc_bus.use_polling++; 978 979 for (i = 1; i <= sc->sc_noport; i++) { 980 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 981 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 982 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 983 } 984 985 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 986 987 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 988 EOWRITE4(sc, EHCI_USBCMD, cmd); 989 990 for (i = 0; i < 100; i++) { 991 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 992 if (hcr == 0) 993 break; 994 995 usb_delay_ms(&sc->sc_bus, 1); 996 } 997 if (hcr != 0) 998 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 999 1000 cmd &= ~EHCI_CMD_RS; 1001 EOWRITE4(sc, EHCI_USBCMD, cmd); 1002 1003 for (i = 0; i < 100; i++) { 1004 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1005 if (hcr == EHCI_STS_HCH) 1006 break; 1007 1008 usb_delay_ms(&sc->sc_bus, 1); 1009 } 1010 if (hcr != EHCI_STS_HCH) 1011 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1012 1013 sc->sc_bus.use_polling--; 1014 splx(s); 1015 1016 return true; 1017 } 1018 1019 bool 1020 ehci_resume(device_t dv) 1021 { 1022 ehci_softc_t *sc = (ehci_softc_t *)dv; 1023 int i, s; 1024 uint32_t cmd, hcr; 1025 1026 s = splhardusb(); 1027 1028 sc->sc_bus.use_polling++; 1029 1030 /* restore things in case the bios sucks */ 1031 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1032 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1033 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1034 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1035 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1036 1037 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1038 1039 hcr = 0; 1040 for (i = 1; i <= sc->sc_noport; i++) { 1041 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1042 if ((cmd & EHCI_PS_PO) == 0 && 1043 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1044 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1045 hcr = 1; 1046 } 1047 } 1048 1049 if (hcr) { 1050 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1051 1052 for (i = 1; i <= sc->sc_noport; i++) { 1053 cmd = EOREAD4(sc, EHCI_PORTSC(i)); 1054 if ((cmd & EHCI_PS_PO) == 0 && 1055 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1056 EOWRITE4(sc, EHCI_PORTSC(i), 1057 cmd & ~EHCI_PS_FPR); 1058 } 1059 } 1060 1061 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1062 1063 for (i = 0; i < 100; i++) { 1064 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1065 if (hcr != EHCI_STS_HCH) 1066 break; 1067 1068 usb_delay_ms(&sc->sc_bus, 1); 1069 } 1070 if (hcr == EHCI_STS_HCH) 1071 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1072 1073 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1074 1075 sc->sc_bus.use_polling--; 1076 1077 splx(s); 1078 1079 return true; 1080 } 1081 1082 /* 1083 * Shut down the controller when the system is going down. 1084 */ 1085 void 1086 ehci_shutdown(void *v) 1087 { 1088 ehci_softc_t *sc = v; 1089 1090 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1091 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1092 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1093 } 1094 1095 usbd_status 1096 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1097 { 1098 struct ehci_softc *sc = (struct ehci_softc *)bus; 1099 usbd_status err; 1100 1101 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1102 if (err == USBD_NOMEM) 1103 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1104 #ifdef EHCI_DEBUG 1105 if (err) 1106 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1107 #endif 1108 return (err); 1109 } 1110 1111 void 1112 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 1116 if (dma->block->flags & USB_DMA_RESERVE) { 1117 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1118 dma); 1119 return; 1120 } 1121 usb_freemem(&sc->sc_bus, dma); 1122 } 1123 1124 usbd_xfer_handle 1125 ehci_allocx(struct usbd_bus *bus) 1126 { 1127 struct ehci_softc *sc = (struct ehci_softc *)bus; 1128 usbd_xfer_handle xfer; 1129 1130 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1131 if (xfer != NULL) { 1132 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1133 #ifdef DIAGNOSTIC 1134 if (xfer->busy_free != XFER_FREE) { 1135 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1136 xfer->busy_free); 1137 } 1138 #endif 1139 } else { 1140 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1141 } 1142 if (xfer != NULL) { 1143 memset(xfer, 0, sizeof(struct ehci_xfer)); 1144 #ifdef DIAGNOSTIC 1145 EXFER(xfer)->isdone = 1; 1146 xfer->busy_free = XFER_BUSY; 1147 #endif 1148 } 1149 return (xfer); 1150 } 1151 1152 void 1153 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1154 { 1155 struct ehci_softc *sc = (struct ehci_softc *)bus; 1156 1157 #ifdef DIAGNOSTIC 1158 if (xfer->busy_free != XFER_BUSY) { 1159 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1160 xfer->busy_free); 1161 } 1162 xfer->busy_free = XFER_FREE; 1163 if (!EXFER(xfer)->isdone) { 1164 printf("ehci_freex: !isdone\n"); 1165 } 1166 #endif 1167 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1168 } 1169 1170 Static void 1171 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1172 { 1173 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1174 1175 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1176 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1177 #ifdef USB_DEBUG 1178 if (ehcidebug) 1179 usbd_dump_pipe(pipe); 1180 #endif 1181 epipe->nexttoggle = 0; 1182 } 1183 1184 Static void 1185 ehci_noop(usbd_pipe_handle pipe) 1186 { 1187 } 1188 1189 #ifdef EHCI_DEBUG 1190 void 1191 ehci_dump_regs(ehci_softc_t *sc) 1192 { 1193 int i; 1194 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1195 EOREAD4(sc, EHCI_USBCMD), 1196 EOREAD4(sc, EHCI_USBSTS), 1197 EOREAD4(sc, EHCI_USBINTR)); 1198 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1199 EOREAD4(sc, EHCI_FRINDEX), 1200 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1201 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1202 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1203 for (i = 1; i <= sc->sc_noport; i++) 1204 printf("port %d status=0x%08x\n", i, 1205 EOREAD4(sc, EHCI_PORTSC(i))); 1206 } 1207 1208 /* 1209 * Unused function - this is meant to be called from a kernel 1210 * debugger. 1211 */ 1212 void 1213 ehci_dump() 1214 { 1215 ehci_dump_regs(theehci); 1216 } 1217 1218 void 1219 ehci_dump_link(ehci_link_t link, int type) 1220 { 1221 link = le32toh(link); 1222 printf("0x%08x", link); 1223 if (link & EHCI_LINK_TERMINATE) 1224 printf("<T>"); 1225 else { 1226 printf("<"); 1227 if (type) { 1228 switch (EHCI_LINK_TYPE(link)) { 1229 case EHCI_LINK_ITD: printf("ITD"); break; 1230 case EHCI_LINK_QH: printf("QH"); break; 1231 case EHCI_LINK_SITD: printf("SITD"); break; 1232 case EHCI_LINK_FSTN: printf("FSTN"); break; 1233 } 1234 } 1235 printf(">"); 1236 } 1237 } 1238 1239 void 1240 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1241 { 1242 int i; 1243 u_int32_t stop; 1244 1245 stop = 0; 1246 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1247 ehci_dump_sqtd(sqtd); 1248 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1249 } 1250 if (sqtd) 1251 printf("dump aborted, too many TDs\n"); 1252 } 1253 1254 void 1255 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1256 { 1257 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1258 ehci_dump_qtd(&sqtd->qtd); 1259 } 1260 1261 void 1262 ehci_dump_qtd(ehci_qtd_t *qtd) 1263 { 1264 u_int32_t s; 1265 char sbuf[128]; 1266 1267 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1268 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1269 printf("\n"); 1270 s = le32toh(qtd->qtd_status); 1271 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1272 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1273 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1274 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1275 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1276 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1277 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1278 EHCI_QTD_GET_PID(s), sbuf); 1279 for (s = 0; s < 5; s++) 1280 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1281 } 1282 1283 void 1284 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1285 { 1286 ehci_qh_t *qh = &sqh->qh; 1287 u_int32_t endp, endphub; 1288 1289 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1290 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1291 endp = le32toh(qh->qh_endp); 1292 printf(" endp=0x%08x\n", endp); 1293 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1294 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1295 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1296 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1297 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1298 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1299 EHCI_QH_GET_NRL(endp)); 1300 endphub = le32toh(qh->qh_endphub); 1301 printf(" endphub=0x%08x\n", endphub); 1302 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1303 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1304 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1305 EHCI_QH_GET_MULT(endphub)); 1306 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1307 printf("Overlay qTD:\n"); 1308 ehci_dump_qtd(&qh->qh_qtd); 1309 } 1310 1311 #ifdef DIAGNOSTIC 1312 Static void 1313 ehci_dump_exfer(struct ehci_xfer *ex) 1314 { 1315 printf("ehci_dump_exfer: ex=%p\n", ex); 1316 } 1317 #endif 1318 #endif 1319 1320 usbd_status 1321 ehci_open(usbd_pipe_handle pipe) 1322 { 1323 usbd_device_handle dev = pipe->device; 1324 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1325 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1326 u_int8_t addr = dev->address; 1327 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1328 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1329 ehci_soft_qh_t *sqh; 1330 usbd_status err; 1331 int s; 1332 int ival, speed, naks; 1333 int hshubaddr, hshubport; 1334 1335 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1336 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1337 1338 if (dev->myhsport) { 1339 hshubaddr = dev->myhsport->parent->address; 1340 hshubport = dev->myhsport->portno; 1341 } else { 1342 hshubaddr = 0; 1343 hshubport = 0; 1344 } 1345 1346 if (sc->sc_dying) 1347 return (USBD_IOERROR); 1348 1349 epipe->nexttoggle = 0; 1350 1351 if (addr == sc->sc_addr) { 1352 switch (ed->bEndpointAddress) { 1353 case USB_CONTROL_ENDPOINT: 1354 pipe->methods = &ehci_root_ctrl_methods; 1355 break; 1356 case UE_DIR_IN | EHCI_INTR_ENDPT: 1357 pipe->methods = &ehci_root_intr_methods; 1358 break; 1359 default: 1360 return (USBD_INVAL); 1361 } 1362 return (USBD_NORMAL_COMPLETION); 1363 } 1364 1365 /* XXX All this stuff is only valid for async. */ 1366 switch (dev->speed) { 1367 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1368 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1369 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1370 default: panic("ehci_open: bad device speed %d", dev->speed); 1371 } 1372 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1373 printf("%s: *** WARNING: opening low/full speed isoc device, " 1374 "this does not work yet.\n", 1375 USBDEVNAME(sc->sc_bus.bdev)); 1376 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1377 hshubaddr, hshubport)); 1378 return USBD_INVAL; 1379 } 1380 1381 naks = 8; /* XXX */ 1382 sqh = ehci_alloc_sqh(sc); 1383 if (sqh == NULL) 1384 return (USBD_NOMEM); 1385 /* qh_link filled when the QH is added */ 1386 sqh->qh.qh_endp = htole32( 1387 EHCI_QH_SET_ADDR(addr) | 1388 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1389 EHCI_QH_SET_EPS(speed) | 1390 EHCI_QH_DTC | 1391 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1392 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1393 EHCI_QH_CTL : 0) | 1394 EHCI_QH_SET_NRL(naks) 1395 ); 1396 sqh->qh.qh_endphub = htole32( 1397 EHCI_QH_SET_MULT(1) | 1398 EHCI_QH_SET_HUBA(hshubaddr) | 1399 EHCI_QH_SET_PORT(hshubport) | 1400 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1401 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1402 ); 1403 sqh->qh.qh_curqtd = EHCI_NULL; 1404 /* Fill the overlay qTD */ 1405 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1406 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1407 sqh->qh.qh_qtd.qtd_status = htole32(0); 1408 1409 epipe->sqh = sqh; 1410 1411 switch (xfertype) { 1412 case UE_CONTROL: 1413 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1414 0, &epipe->u.ctl.reqdma); 1415 #ifdef EHCI_DEBUG 1416 if (err) 1417 printf("ehci_open: usb_allocmem()=%d\n", err); 1418 #endif 1419 if (err) 1420 goto bad; 1421 pipe->methods = &ehci_device_ctrl_methods; 1422 s = splusb(); 1423 ehci_add_qh(sqh, sc->sc_async_head); 1424 splx(s); 1425 break; 1426 case UE_BULK: 1427 pipe->methods = &ehci_device_bulk_methods; 1428 s = splusb(); 1429 ehci_add_qh(sqh, sc->sc_async_head); 1430 splx(s); 1431 break; 1432 case UE_INTERRUPT: 1433 pipe->methods = &ehci_device_intr_methods; 1434 ival = pipe->interval; 1435 if (ival == USBD_DEFAULT_INTERVAL) { 1436 if (speed == EHCI_QH_SPEED_HIGH) { 1437 if (ed->bInterval > 16) { 1438 /* 1439 * illegal with high-speed, but there 1440 * were documentation bugs in the spec, 1441 * so be generous 1442 */ 1443 ival = 256; 1444 } else 1445 ival = (1 << (ed->bInterval - 1)) / 8; 1446 } else 1447 ival = ed->bInterval; 1448 } 1449 err = ehci_device_setintr(sc, sqh, ival); 1450 if (err) 1451 goto bad; 1452 break; 1453 case UE_ISOCHRONOUS: 1454 pipe->methods = &ehci_device_isoc_methods; 1455 /* FALLTHROUGH */ 1456 default: 1457 err = USBD_INVAL; 1458 goto bad; 1459 } 1460 return (USBD_NORMAL_COMPLETION); 1461 1462 bad: 1463 ehci_free_sqh(sc, sqh); 1464 return (err); 1465 } 1466 1467 /* 1468 * Add an ED to the schedule. Called at splusb(). 1469 */ 1470 void 1471 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1472 { 1473 SPLUSBCHECK; 1474 1475 sqh->next = head->next; 1476 sqh->qh.qh_link = head->qh.qh_link; 1477 head->next = sqh; 1478 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1479 1480 #ifdef EHCI_DEBUG 1481 if (ehcidebug > 5) { 1482 printf("ehci_add_qh:\n"); 1483 ehci_dump_sqh(sqh); 1484 } 1485 #endif 1486 } 1487 1488 /* 1489 * Remove an ED from the schedule. Called at splusb(). 1490 */ 1491 void 1492 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1493 { 1494 ehci_soft_qh_t *p; 1495 1496 SPLUSBCHECK; 1497 /* XXX */ 1498 for (p = head; p != NULL && p->next != sqh; p = p->next) 1499 ; 1500 if (p == NULL) 1501 panic("ehci_rem_qh: ED not found"); 1502 p->next = sqh->next; 1503 p->qh.qh_link = sqh->qh.qh_link; 1504 1505 ehci_sync_hc(sc); 1506 } 1507 1508 void 1509 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1510 { 1511 int i; 1512 u_int32_t status; 1513 1514 /* Save toggle bit and ping status. */ 1515 status = sqh->qh.qh_qtd.qtd_status & 1516 htole32(EHCI_QTD_TOGGLE_MASK | 1517 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1518 /* Set HALTED to make hw leave it alone. */ 1519 sqh->qh.qh_qtd.qtd_status = 1520 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1521 sqh->qh.qh_curqtd = 0; 1522 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1523 sqh->qh.qh_qtd.qtd_altnext = 0; 1524 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1525 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1526 sqh->sqtd = sqtd; 1527 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1528 sqh->qh.qh_qtd.qtd_status = status; 1529 } 1530 1531 /* 1532 * Ensure that the HC has released all references to the QH. We do this 1533 * by asking for a Async Advance Doorbell interrupt and then we wait for 1534 * the interrupt. 1535 * To make this easier we first obtain exclusive use of the doorbell. 1536 */ 1537 void 1538 ehci_sync_hc(ehci_softc_t *sc) 1539 { 1540 int s, error; 1541 1542 if (sc->sc_dying) { 1543 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1544 return; 1545 } 1546 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1547 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1548 s = splhardusb(); 1549 /* ask for doorbell */ 1550 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1551 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1552 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1553 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1554 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1555 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1556 splx(s); 1557 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1558 #ifdef DIAGNOSTIC 1559 if (error) 1560 printf("ehci_sync_hc: tsleep() = %d\n", error); 1561 #endif 1562 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1563 } 1564 1565 /***********/ 1566 1567 /* 1568 * Data structures and routines to emulate the root hub. 1569 */ 1570 Static usb_device_descriptor_t ehci_devd = { 1571 USB_DEVICE_DESCRIPTOR_SIZE, 1572 UDESC_DEVICE, /* type */ 1573 {0x00, 0x02}, /* USB version */ 1574 UDCLASS_HUB, /* class */ 1575 UDSUBCLASS_HUB, /* subclass */ 1576 UDPROTO_HSHUBSTT, /* protocol */ 1577 64, /* max packet */ 1578 {0},{0},{0x00,0x01}, /* device id */ 1579 1,2,0, /* string indicies */ 1580 1 /* # of configurations */ 1581 }; 1582 1583 Static const usb_device_qualifier_t ehci_odevd = { 1584 USB_DEVICE_DESCRIPTOR_SIZE, 1585 UDESC_DEVICE_QUALIFIER, /* type */ 1586 {0x00, 0x02}, /* USB version */ 1587 UDCLASS_HUB, /* class */ 1588 UDSUBCLASS_HUB, /* subclass */ 1589 UDPROTO_FSHUB, /* protocol */ 1590 64, /* max packet */ 1591 1, /* # of configurations */ 1592 0 1593 }; 1594 1595 Static const usb_config_descriptor_t ehci_confd = { 1596 USB_CONFIG_DESCRIPTOR_SIZE, 1597 UDESC_CONFIG, 1598 {USB_CONFIG_DESCRIPTOR_SIZE + 1599 USB_INTERFACE_DESCRIPTOR_SIZE + 1600 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1601 1, 1602 1, 1603 0, 1604 UC_ATTR_MBO | UC_SELF_POWERED, 1605 0 /* max power */ 1606 }; 1607 1608 Static const usb_interface_descriptor_t ehci_ifcd = { 1609 USB_INTERFACE_DESCRIPTOR_SIZE, 1610 UDESC_INTERFACE, 1611 0, 1612 0, 1613 1, 1614 UICLASS_HUB, 1615 UISUBCLASS_HUB, 1616 UIPROTO_HSHUBSTT, 1617 0 1618 }; 1619 1620 Static const usb_endpoint_descriptor_t ehci_endpd = { 1621 USB_ENDPOINT_DESCRIPTOR_SIZE, 1622 UDESC_ENDPOINT, 1623 UE_DIR_IN | EHCI_INTR_ENDPT, 1624 UE_INTERRUPT, 1625 {8, 0}, /* max packet */ 1626 12 1627 }; 1628 1629 Static const usb_hub_descriptor_t ehci_hubd = { 1630 USB_HUB_DESCRIPTOR_SIZE, 1631 UDESC_HUB, 1632 0, 1633 {0,0}, 1634 0, 1635 0, 1636 {""}, 1637 {""}, 1638 }; 1639 1640 Static int 1641 ehci_str(usb_string_descriptor_t *p, int l, const char *s) 1642 { 1643 int i; 1644 1645 if (l == 0) 1646 return (0); 1647 p->bLength = 2 * strlen(s) + 2; 1648 if (l == 1) 1649 return (1); 1650 p->bDescriptorType = UDESC_STRING; 1651 l -= 2; 1652 for (i = 0; s[i] && l > 1; i++, l -= 2) 1653 USETW2(p->bString[i], 0, s[i]); 1654 return (2*i+2); 1655 } 1656 1657 /* 1658 * Simulate a hardware hub by handling all the necessary requests. 1659 */ 1660 Static usbd_status 1661 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1662 { 1663 usbd_status err; 1664 1665 /* Insert last in queue. */ 1666 err = usb_insert_transfer(xfer); 1667 if (err) 1668 return (err); 1669 1670 /* Pipe isn't running, start first */ 1671 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1672 } 1673 1674 Static usbd_status 1675 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1676 { 1677 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1678 usb_device_request_t *req; 1679 void *buf = NULL; 1680 int port, i; 1681 int s, len, value, index, l, totlen = 0; 1682 usb_port_status_t ps; 1683 usb_hub_descriptor_t hubd; 1684 usbd_status err; 1685 u_int32_t v; 1686 1687 if (sc->sc_dying) 1688 return (USBD_IOERROR); 1689 1690 #ifdef DIAGNOSTIC 1691 if (!(xfer->rqflags & URQ_REQUEST)) 1692 /* XXX panic */ 1693 return (USBD_INVAL); 1694 #endif 1695 req = &xfer->request; 1696 1697 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1698 req->bmRequestType, req->bRequest)); 1699 1700 len = UGETW(req->wLength); 1701 value = UGETW(req->wValue); 1702 index = UGETW(req->wIndex); 1703 1704 if (len != 0) 1705 buf = KERNADDR(&xfer->dmabuf, 0); 1706 1707 #define C(x,y) ((x) | ((y) << 8)) 1708 switch(C(req->bRequest, req->bmRequestType)) { 1709 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1710 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1711 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1712 /* 1713 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1714 * for the integrated root hub. 1715 */ 1716 break; 1717 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1718 if (len > 0) { 1719 *(u_int8_t *)buf = sc->sc_conf; 1720 totlen = 1; 1721 } 1722 break; 1723 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1724 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1725 if (len == 0) 1726 break; 1727 switch(value >> 8) { 1728 case UDESC_DEVICE: 1729 if ((value & 0xff) != 0) { 1730 err = USBD_IOERROR; 1731 goto ret; 1732 } 1733 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1734 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1735 memcpy(buf, &ehci_devd, l); 1736 break; 1737 /* 1738 * We can't really operate at another speed, but the spec says 1739 * we need this descriptor. 1740 */ 1741 case UDESC_DEVICE_QUALIFIER: 1742 if ((value & 0xff) != 0) { 1743 err = USBD_IOERROR; 1744 goto ret; 1745 } 1746 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1747 memcpy(buf, &ehci_odevd, l); 1748 break; 1749 /* 1750 * We can't really operate at another speed, but the spec says 1751 * we need this descriptor. 1752 */ 1753 case UDESC_OTHER_SPEED_CONFIGURATION: 1754 case UDESC_CONFIG: 1755 if ((value & 0xff) != 0) { 1756 err = USBD_IOERROR; 1757 goto ret; 1758 } 1759 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1760 memcpy(buf, &ehci_confd, l); 1761 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1762 value >> 8; 1763 buf = (char *)buf + l; 1764 len -= l; 1765 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1766 totlen += l; 1767 memcpy(buf, &ehci_ifcd, l); 1768 buf = (char *)buf + l; 1769 len -= l; 1770 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1771 totlen += l; 1772 memcpy(buf, &ehci_endpd, l); 1773 break; 1774 case UDESC_STRING: 1775 *(u_int8_t *)buf = 0; 1776 totlen = 1; 1777 switch (value & 0xff) { 1778 case 0: /* Language table */ 1779 if (len > 0) 1780 *(u_int8_t *)buf = 4; 1781 if (len >= 4) { 1782 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 1783 totlen = 4; 1784 } 1785 break; 1786 case 1: /* Vendor */ 1787 totlen = ehci_str(buf, len, sc->sc_vendor); 1788 break; 1789 case 2: /* Product */ 1790 totlen = ehci_str(buf, len, "EHCI root hub"); 1791 break; 1792 } 1793 break; 1794 default: 1795 err = USBD_IOERROR; 1796 goto ret; 1797 } 1798 break; 1799 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1800 if (len > 0) { 1801 *(u_int8_t *)buf = 0; 1802 totlen = 1; 1803 } 1804 break; 1805 case C(UR_GET_STATUS, UT_READ_DEVICE): 1806 if (len > 1) { 1807 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1808 totlen = 2; 1809 } 1810 break; 1811 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1812 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1813 if (len > 1) { 1814 USETW(((usb_status_t *)buf)->wStatus, 0); 1815 totlen = 2; 1816 } 1817 break; 1818 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1819 if (value >= USB_MAX_DEVICES) { 1820 err = USBD_IOERROR; 1821 goto ret; 1822 } 1823 sc->sc_addr = value; 1824 break; 1825 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1826 if (value != 0 && value != 1) { 1827 err = USBD_IOERROR; 1828 goto ret; 1829 } 1830 sc->sc_conf = value; 1831 break; 1832 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1833 break; 1834 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1835 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1836 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1837 err = USBD_IOERROR; 1838 goto ret; 1839 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1840 break; 1841 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1842 break; 1843 /* Hub requests */ 1844 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1845 break; 1846 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1847 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1848 "port=%d feature=%d\n", 1849 index, value)); 1850 if (index < 1 || index > sc->sc_noport) { 1851 err = USBD_IOERROR; 1852 goto ret; 1853 } 1854 port = EHCI_PORTSC(index); 1855 v = EOREAD4(sc, port); 1856 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1857 v &= ~EHCI_PS_CLEAR; 1858 switch(value) { 1859 case UHF_PORT_ENABLE: 1860 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1861 break; 1862 case UHF_PORT_SUSPEND: 1863 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1864 break; 1865 case UHF_PORT_POWER: 1866 if (sc->sc_hasppc) 1867 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1868 break; 1869 case UHF_PORT_TEST: 1870 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1871 "%d\n", index)); 1872 break; 1873 case UHF_PORT_INDICATOR: 1874 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1875 "%d\n", index)); 1876 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1877 break; 1878 case UHF_C_PORT_CONNECTION: 1879 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1880 break; 1881 case UHF_C_PORT_ENABLE: 1882 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1883 break; 1884 case UHF_C_PORT_SUSPEND: 1885 /* how? */ 1886 break; 1887 case UHF_C_PORT_OVER_CURRENT: 1888 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1889 break; 1890 case UHF_C_PORT_RESET: 1891 sc->sc_isreset[index] = 0; 1892 break; 1893 default: 1894 err = USBD_IOERROR; 1895 goto ret; 1896 } 1897 #if 0 1898 switch(value) { 1899 case UHF_C_PORT_CONNECTION: 1900 case UHF_C_PORT_ENABLE: 1901 case UHF_C_PORT_SUSPEND: 1902 case UHF_C_PORT_OVER_CURRENT: 1903 case UHF_C_PORT_RESET: 1904 default: 1905 break; 1906 } 1907 #endif 1908 break; 1909 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1910 if (len == 0) 1911 break; 1912 if ((value & 0xff) != 0) { 1913 err = USBD_IOERROR; 1914 goto ret; 1915 } 1916 hubd = ehci_hubd; 1917 hubd.bNbrPorts = sc->sc_noport; 1918 v = EOREAD4(sc, EHCI_HCSPARAMS); 1919 USETW(hubd.wHubCharacteristics, 1920 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1921 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1922 ? UHD_PORT_IND : 0); 1923 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1924 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1925 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1926 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1927 l = min(len, hubd.bDescLength); 1928 totlen = l; 1929 memcpy(buf, &hubd, l); 1930 break; 1931 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1932 if (len != 4) { 1933 err = USBD_IOERROR; 1934 goto ret; 1935 } 1936 memset(buf, 0, len); /* ? XXX */ 1937 totlen = len; 1938 break; 1939 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1940 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1941 index)); 1942 if (index < 1 || index > sc->sc_noport) { 1943 err = USBD_IOERROR; 1944 goto ret; 1945 } 1946 if (len != 4) { 1947 err = USBD_IOERROR; 1948 goto ret; 1949 } 1950 v = EOREAD4(sc, EHCI_PORTSC(index)); 1951 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1952 v)); 1953 i = UPS_HIGH_SPEED; 1954 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1955 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1956 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1957 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1958 if (v & EHCI_PS_PR) i |= UPS_RESET; 1959 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1960 USETW(ps.wPortStatus, i); 1961 i = 0; 1962 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1963 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1964 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1965 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1966 USETW(ps.wPortChange, i); 1967 l = min(len, sizeof ps); 1968 memcpy(buf, &ps, l); 1969 totlen = l; 1970 break; 1971 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1972 err = USBD_IOERROR; 1973 goto ret; 1974 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1975 break; 1976 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1977 if (index < 1 || index > sc->sc_noport) { 1978 err = USBD_IOERROR; 1979 goto ret; 1980 } 1981 port = EHCI_PORTSC(index); 1982 v = EOREAD4(sc, port); 1983 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1984 v &= ~EHCI_PS_CLEAR; 1985 switch(value) { 1986 case UHF_PORT_ENABLE: 1987 EOWRITE4(sc, port, v | EHCI_PS_PE); 1988 break; 1989 case UHF_PORT_SUSPEND: 1990 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1991 break; 1992 case UHF_PORT_RESET: 1993 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1994 index)); 1995 if (EHCI_PS_IS_LOWSPEED(v)) { 1996 /* Low speed device, give up ownership. */ 1997 ehci_disown(sc, index, 1); 1998 break; 1999 } 2000 /* Start reset sequence. */ 2001 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2002 EOWRITE4(sc, port, v | EHCI_PS_PR); 2003 /* Wait for reset to complete. */ 2004 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2005 if (sc->sc_dying) { 2006 err = USBD_IOERROR; 2007 goto ret; 2008 } 2009 /* Terminate reset sequence. */ 2010 EOWRITE4(sc, port, v); 2011 /* Wait for HC to complete reset. */ 2012 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2013 if (sc->sc_dying) { 2014 err = USBD_IOERROR; 2015 goto ret; 2016 } 2017 v = EOREAD4(sc, port); 2018 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2019 if (v & EHCI_PS_PR) { 2020 printf("%s: port reset timeout\n", 2021 USBDEVNAME(sc->sc_bus.bdev)); 2022 return (USBD_TIMEOUT); 2023 } 2024 if (!(v & EHCI_PS_PE)) { 2025 /* Not a high speed device, give up ownership.*/ 2026 ehci_disown(sc, index, 0); 2027 break; 2028 } 2029 sc->sc_isreset[index] = 1; 2030 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2031 index, v)); 2032 break; 2033 case UHF_PORT_POWER: 2034 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2035 "%d (has PPC = %d)\n", index, 2036 sc->sc_hasppc)); 2037 if (sc->sc_hasppc) 2038 EOWRITE4(sc, port, v | EHCI_PS_PP); 2039 break; 2040 case UHF_PORT_TEST: 2041 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2042 "%d\n", index)); 2043 break; 2044 case UHF_PORT_INDICATOR: 2045 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2046 "%d\n", index)); 2047 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2048 break; 2049 default: 2050 err = USBD_IOERROR; 2051 goto ret; 2052 } 2053 break; 2054 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2055 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2056 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2057 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2058 break; 2059 default: 2060 err = USBD_IOERROR; 2061 goto ret; 2062 } 2063 xfer->actlen = totlen; 2064 err = USBD_NORMAL_COMPLETION; 2065 ret: 2066 xfer->status = err; 2067 s = splusb(); 2068 usb_transfer_complete(xfer); 2069 splx(s); 2070 return (USBD_IN_PROGRESS); 2071 } 2072 2073 void 2074 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2075 { 2076 int port; 2077 u_int32_t v; 2078 2079 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2080 #ifdef DIAGNOSTIC 2081 if (sc->sc_npcomp != 0) { 2082 int i = (index-1) / sc->sc_npcomp; 2083 if (i >= sc->sc_ncomp) 2084 printf("%s: strange port\n", 2085 USBDEVNAME(sc->sc_bus.bdev)); 2086 else 2087 printf("%s: handing over %s speed device on " 2088 "port %d to %s\n", 2089 USBDEVNAME(sc->sc_bus.bdev), 2090 lowspeed ? "low" : "full", 2091 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2092 } else { 2093 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2094 } 2095 #endif 2096 port = EHCI_PORTSC(index); 2097 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2098 EOWRITE4(sc, port, v | EHCI_PS_PO); 2099 } 2100 2101 /* Abort a root control request. */ 2102 Static void 2103 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2104 { 2105 /* Nothing to do, all transfers are synchronous. */ 2106 } 2107 2108 /* Close the root pipe. */ 2109 Static void 2110 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2111 { 2112 DPRINTF(("ehci_root_ctrl_close\n")); 2113 /* Nothing to do. */ 2114 } 2115 2116 void 2117 ehci_root_intr_done(usbd_xfer_handle xfer) 2118 { 2119 xfer->hcpriv = NULL; 2120 } 2121 2122 Static usbd_status 2123 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2124 { 2125 usbd_status err; 2126 2127 /* Insert last in queue. */ 2128 err = usb_insert_transfer(xfer); 2129 if (err) 2130 return (err); 2131 2132 /* Pipe isn't running, start first */ 2133 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2134 } 2135 2136 Static usbd_status 2137 ehci_root_intr_start(usbd_xfer_handle xfer) 2138 { 2139 usbd_pipe_handle pipe = xfer->pipe; 2140 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2141 2142 if (sc->sc_dying) 2143 return (USBD_IOERROR); 2144 2145 sc->sc_intrxfer = xfer; 2146 2147 return (USBD_IN_PROGRESS); 2148 } 2149 2150 /* Abort a root interrupt request. */ 2151 Static void 2152 ehci_root_intr_abort(usbd_xfer_handle xfer) 2153 { 2154 int s; 2155 2156 if (xfer->pipe->intrxfer == xfer) { 2157 DPRINTF(("ehci_root_intr_abort: remove\n")); 2158 xfer->pipe->intrxfer = NULL; 2159 } 2160 xfer->status = USBD_CANCELLED; 2161 s = splusb(); 2162 usb_transfer_complete(xfer); 2163 splx(s); 2164 } 2165 2166 /* Close the root pipe. */ 2167 Static void 2168 ehci_root_intr_close(usbd_pipe_handle pipe) 2169 { 2170 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2171 2172 DPRINTF(("ehci_root_intr_close\n")); 2173 2174 sc->sc_intrxfer = NULL; 2175 } 2176 2177 void 2178 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2179 { 2180 xfer->hcpriv = NULL; 2181 } 2182 2183 /************************/ 2184 2185 ehci_soft_qh_t * 2186 ehci_alloc_sqh(ehci_softc_t *sc) 2187 { 2188 ehci_soft_qh_t *sqh; 2189 usbd_status err; 2190 int i, offs; 2191 usb_dma_t dma; 2192 2193 if (sc->sc_freeqhs == NULL) { 2194 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2195 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2196 EHCI_PAGE_SIZE, &dma); 2197 #ifdef EHCI_DEBUG 2198 if (err) 2199 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2200 #endif 2201 if (err) 2202 return (NULL); 2203 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2204 offs = i * EHCI_SQH_SIZE; 2205 sqh = KERNADDR(&dma, offs); 2206 sqh->physaddr = DMAADDR(&dma, offs); 2207 sqh->next = sc->sc_freeqhs; 2208 sc->sc_freeqhs = sqh; 2209 } 2210 } 2211 sqh = sc->sc_freeqhs; 2212 sc->sc_freeqhs = sqh->next; 2213 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2214 sqh->next = NULL; 2215 return (sqh); 2216 } 2217 2218 void 2219 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2220 { 2221 sqh->next = sc->sc_freeqhs; 2222 sc->sc_freeqhs = sqh; 2223 } 2224 2225 ehci_soft_qtd_t * 2226 ehci_alloc_sqtd(ehci_softc_t *sc) 2227 { 2228 ehci_soft_qtd_t *sqtd; 2229 usbd_status err; 2230 int i, offs; 2231 usb_dma_t dma; 2232 int s; 2233 2234 if (sc->sc_freeqtds == NULL) { 2235 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2236 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2237 EHCI_PAGE_SIZE, &dma); 2238 #ifdef EHCI_DEBUG 2239 if (err) 2240 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2241 #endif 2242 if (err) 2243 return (NULL); 2244 s = splusb(); 2245 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2246 offs = i * EHCI_SQTD_SIZE; 2247 sqtd = KERNADDR(&dma, offs); 2248 sqtd->physaddr = DMAADDR(&dma, offs); 2249 sqtd->nextqtd = sc->sc_freeqtds; 2250 sc->sc_freeqtds = sqtd; 2251 } 2252 splx(s); 2253 } 2254 2255 s = splusb(); 2256 sqtd = sc->sc_freeqtds; 2257 sc->sc_freeqtds = sqtd->nextqtd; 2258 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2259 sqtd->nextqtd = NULL; 2260 sqtd->xfer = NULL; 2261 splx(s); 2262 2263 return (sqtd); 2264 } 2265 2266 void 2267 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2268 { 2269 int s; 2270 2271 s = splusb(); 2272 sqtd->nextqtd = sc->sc_freeqtds; 2273 sc->sc_freeqtds = sqtd; 2274 splx(s); 2275 } 2276 2277 usbd_status 2278 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2279 int alen, int rd, usbd_xfer_handle xfer, 2280 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2281 { 2282 ehci_soft_qtd_t *next, *cur; 2283 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2284 u_int32_t qtdstatus; 2285 int len, curlen, mps; 2286 int i, tog; 2287 usb_dma_t *dma = &xfer->dmabuf; 2288 u_int16_t flags = xfer->flags; 2289 2290 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2291 2292 len = alen; 2293 dataphys = DMAADDR(dma, 0); 2294 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2295 qtdstatus = EHCI_QTD_ACTIVE | 2296 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2297 EHCI_QTD_SET_CERR(3) 2298 /* IOC set below */ 2299 /* BYTES set below */ 2300 ; 2301 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2302 tog = epipe->nexttoggle; 2303 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2304 2305 cur = ehci_alloc_sqtd(sc); 2306 *sp = cur; 2307 if (cur == NULL) 2308 goto nomem; 2309 for (;;) { 2310 dataphyspage = EHCI_PAGE(dataphys); 2311 /* The EHCI hardware can handle at most 5 pages. */ 2312 if (dataphyslastpage - dataphyspage < 2313 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2314 /* we can handle it in this QTD */ 2315 curlen = len; 2316 } else { 2317 /* must use multiple TDs, fill as much as possible. */ 2318 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2319 EHCI_PAGE_OFFSET(dataphys); 2320 #ifdef DIAGNOSTIC 2321 if (curlen > len) { 2322 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2323 "len=0x%x offs=0x%x\n", curlen, len, 2324 EHCI_PAGE_OFFSET(dataphys)); 2325 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2326 dataphyslastpage, dataphyspage, 2327 dataphys); 2328 curlen = len; 2329 } 2330 #endif 2331 /* the length must be a multiple of the max size */ 2332 curlen -= curlen % mps; 2333 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2334 "curlen=%d\n", curlen)); 2335 #ifdef DIAGNOSTIC 2336 if (curlen == 0) 2337 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2338 #endif 2339 } 2340 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2341 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2342 dataphys, dataphyslastpage, 2343 len, curlen)); 2344 len -= curlen; 2345 2346 /* 2347 * Allocate another transfer if there's more data left, 2348 * or if force last short transfer flag is set and we're 2349 * allocating a multiple of the max packet size. 2350 */ 2351 if (len != 0 || 2352 ((curlen % mps) == 0 && !rd && curlen != 0 && 2353 (flags & USBD_FORCE_SHORT_XFER))) { 2354 next = ehci_alloc_sqtd(sc); 2355 if (next == NULL) 2356 goto nomem; 2357 nextphys = htole32(next->physaddr); 2358 } else { 2359 next = NULL; 2360 nextphys = EHCI_NULL; 2361 } 2362 2363 for (i = 0; i * EHCI_PAGE_SIZE < 2364 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2365 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2366 if (i != 0) /* use offset only in first buffer */ 2367 a = EHCI_PAGE(a); 2368 cur->qtd.qtd_buffer[i] = htole32(a); 2369 cur->qtd.qtd_buffer_hi[i] = 0; 2370 #ifdef DIAGNOSTIC 2371 if (i >= EHCI_QTD_NBUFFERS) { 2372 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2373 goto nomem; 2374 } 2375 #endif 2376 } 2377 cur->nextqtd = next; 2378 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2379 cur->qtd.qtd_status = 2380 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2381 cur->xfer = xfer; 2382 cur->len = curlen; 2383 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2384 dataphys, dataphys + curlen)); 2385 /* adjust the toggle based on the number of packets in this 2386 qtd */ 2387 if (((curlen + mps - 1) / mps) & 1) { 2388 tog ^= 1; 2389 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2390 } 2391 if (next == NULL) 2392 break; 2393 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2394 dataphys += curlen; 2395 cur = next; 2396 } 2397 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2398 *ep = cur; 2399 epipe->nexttoggle = tog; 2400 2401 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2402 *sp, *ep)); 2403 2404 return (USBD_NORMAL_COMPLETION); 2405 2406 nomem: 2407 /* XXX free chain */ 2408 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2409 return (USBD_NOMEM); 2410 } 2411 2412 Static void 2413 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2414 ehci_soft_qtd_t *sqtdend) 2415 { 2416 ehci_soft_qtd_t *p; 2417 int i; 2418 2419 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2420 sqtd, sqtdend)); 2421 2422 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2423 p = sqtd->nextqtd; 2424 ehci_free_sqtd(sc, sqtd); 2425 } 2426 } 2427 2428 /****************/ 2429 2430 /* 2431 * Close a reqular pipe. 2432 * Assumes that there are no pending transactions. 2433 */ 2434 void 2435 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2436 { 2437 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2438 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2439 ehci_soft_qh_t *sqh = epipe->sqh; 2440 int s; 2441 2442 s = splusb(); 2443 ehci_rem_qh(sc, sqh, head); 2444 splx(s); 2445 ehci_free_sqh(sc, epipe->sqh); 2446 } 2447 2448 /* 2449 * Abort a device request. 2450 * If this routine is called at splusb() it guarantees that the request 2451 * will be removed from the hardware scheduling and that the callback 2452 * for it will be called with USBD_CANCELLED status. 2453 * It's impossible to guarantee that the requested transfer will not 2454 * have happened since the hardware runs concurrently. 2455 * If the transaction has already happened we rely on the ordinary 2456 * interrupt processing to process it. 2457 * XXX This is most probably wrong. 2458 */ 2459 void 2460 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2461 { 2462 #define exfer EXFER(xfer) 2463 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2464 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2465 ehci_soft_qh_t *sqh = epipe->sqh; 2466 ehci_soft_qtd_t *sqtd; 2467 ehci_physaddr_t cur; 2468 u_int32_t qhstatus; 2469 int s; 2470 int hit; 2471 int wake; 2472 2473 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2474 2475 if (sc->sc_dying) { 2476 /* If we're dying, just do the software part. */ 2477 s = splusb(); 2478 xfer->status = status; /* make software ignore it */ 2479 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2480 usb_transfer_complete(xfer); 2481 splx(s); 2482 return; 2483 } 2484 2485 if (xfer->device->bus->intr_context || !curproc) 2486 panic("ehci_abort_xfer: not in process context"); 2487 2488 /* 2489 * If an abort is already in progress then just wait for it to 2490 * complete and return. 2491 */ 2492 if (xfer->hcflags & UXFER_ABORTING) { 2493 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2494 #ifdef DIAGNOSTIC 2495 if (status == USBD_TIMEOUT) 2496 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2497 #endif 2498 /* Override the status which might be USBD_TIMEOUT. */ 2499 xfer->status = status; 2500 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2501 xfer->hcflags |= UXFER_ABORTWAIT; 2502 while (xfer->hcflags & UXFER_ABORTING) 2503 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2504 return; 2505 } 2506 xfer->hcflags |= UXFER_ABORTING; 2507 2508 /* 2509 * Step 1: Make interrupt routine and hardware ignore xfer. 2510 */ 2511 s = splusb(); 2512 xfer->status = status; /* make software ignore it */ 2513 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2514 qhstatus = sqh->qh.qh_qtd.qtd_status; 2515 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2516 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2517 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2518 if (sqtd == exfer->sqtdend) 2519 break; 2520 } 2521 splx(s); 2522 2523 /* 2524 * Step 2: Wait until we know hardware has finished any possible 2525 * use of the xfer. Also make sure the soft interrupt routine 2526 * has run. 2527 */ 2528 ehci_sync_hc(sc); 2529 s = splusb(); 2530 #ifdef USB_USE_SOFTINTR 2531 sc->sc_softwake = 1; 2532 #endif /* USB_USE_SOFTINTR */ 2533 usb_schedsoftintr(&sc->sc_bus); 2534 #ifdef USB_USE_SOFTINTR 2535 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2536 #endif /* USB_USE_SOFTINTR */ 2537 splx(s); 2538 2539 /* 2540 * Step 3: Remove any vestiges of the xfer from the hardware. 2541 * The complication here is that the hardware may have executed 2542 * beyond the xfer we're trying to abort. So as we're scanning 2543 * the TDs of this xfer we check if the hardware points to 2544 * any of them. 2545 */ 2546 s = splusb(); /* XXX why? */ 2547 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2548 hit = 0; 2549 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2550 hit |= cur == sqtd->physaddr; 2551 if (sqtd == exfer->sqtdend) 2552 break; 2553 } 2554 sqtd = sqtd->nextqtd; 2555 /* Zap curqtd register if hardware pointed inside the xfer. */ 2556 if (hit && sqtd != NULL) { 2557 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2558 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2559 sqh->qh.qh_qtd.qtd_status = qhstatus; 2560 } else { 2561 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2562 } 2563 2564 /* 2565 * Step 4: Execute callback. 2566 */ 2567 #ifdef DIAGNOSTIC 2568 exfer->isdone = 1; 2569 #endif 2570 wake = xfer->hcflags & UXFER_ABORTWAIT; 2571 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2572 usb_transfer_complete(xfer); 2573 if (wake) 2574 wakeup(&xfer->hcflags); 2575 2576 splx(s); 2577 #undef exfer 2578 } 2579 2580 void 2581 ehci_timeout(void *addr) 2582 { 2583 struct ehci_xfer *exfer = addr; 2584 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2585 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2586 2587 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2588 #ifdef USB_DEBUG 2589 if (ehcidebug > 1) 2590 usbd_dump_pipe(exfer->xfer.pipe); 2591 #endif 2592 2593 if (sc->sc_dying) { 2594 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2595 return; 2596 } 2597 2598 /* Execute the abort in a process context. */ 2599 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2600 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2601 USB_TASKQ_HC); 2602 } 2603 2604 void 2605 ehci_timeout_task(void *addr) 2606 { 2607 usbd_xfer_handle xfer = addr; 2608 int s; 2609 2610 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2611 2612 s = splusb(); 2613 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2614 splx(s); 2615 } 2616 2617 /************************/ 2618 2619 Static usbd_status 2620 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2621 { 2622 usbd_status err; 2623 2624 /* Insert last in queue. */ 2625 err = usb_insert_transfer(xfer); 2626 if (err) 2627 return (err); 2628 2629 /* Pipe isn't running, start first */ 2630 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2631 } 2632 2633 Static usbd_status 2634 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2635 { 2636 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2637 usbd_status err; 2638 2639 if (sc->sc_dying) 2640 return (USBD_IOERROR); 2641 2642 #ifdef DIAGNOSTIC 2643 if (!(xfer->rqflags & URQ_REQUEST)) { 2644 /* XXX panic */ 2645 printf("ehci_device_ctrl_transfer: not a request\n"); 2646 return (USBD_INVAL); 2647 } 2648 #endif 2649 2650 err = ehci_device_request(xfer); 2651 if (err) 2652 return (err); 2653 2654 if (sc->sc_bus.use_polling) 2655 ehci_waitintr(sc, xfer); 2656 return (USBD_IN_PROGRESS); 2657 } 2658 2659 void 2660 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2661 { 2662 struct ehci_xfer *ex = EXFER(xfer); 2663 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2664 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2665 2666 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2667 2668 #ifdef DIAGNOSTIC 2669 if (!(xfer->rqflags & URQ_REQUEST)) { 2670 panic("ehci_ctrl_done: not a request"); 2671 } 2672 #endif 2673 2674 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2675 ehci_del_intr_list(ex); /* remove from active list */ 2676 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2677 } 2678 2679 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2680 } 2681 2682 /* Abort a device control request. */ 2683 Static void 2684 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2685 { 2686 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2687 ehci_abort_xfer(xfer, USBD_CANCELLED); 2688 } 2689 2690 /* Close a device control pipe. */ 2691 Static void 2692 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2693 { 2694 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2695 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2696 2697 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2698 ehci_close_pipe(pipe, sc->sc_async_head); 2699 } 2700 2701 usbd_status 2702 ehci_device_request(usbd_xfer_handle xfer) 2703 { 2704 #define exfer EXFER(xfer) 2705 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2706 usb_device_request_t *req = &xfer->request; 2707 usbd_device_handle dev = epipe->pipe.device; 2708 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2709 int addr = dev->address; 2710 ehci_soft_qtd_t *setup, *stat, *next; 2711 ehci_soft_qh_t *sqh; 2712 int isread; 2713 int len; 2714 usbd_status err; 2715 int s; 2716 2717 isread = req->bmRequestType & UT_READ; 2718 len = UGETW(req->wLength); 2719 2720 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2721 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2722 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2723 UGETW(req->wIndex), len, addr, 2724 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2725 2726 setup = ehci_alloc_sqtd(sc); 2727 if (setup == NULL) { 2728 err = USBD_NOMEM; 2729 goto bad1; 2730 } 2731 stat = ehci_alloc_sqtd(sc); 2732 if (stat == NULL) { 2733 err = USBD_NOMEM; 2734 goto bad2; 2735 } 2736 2737 sqh = epipe->sqh; 2738 epipe->u.ctl.length = len; 2739 2740 /* Update device address and length since they may have changed 2741 during the setup of the control pipe in usbd_new_device(). */ 2742 /* XXX This only needs to be done once, but it's too early in open. */ 2743 /* XXXX Should not touch ED here! */ 2744 sqh->qh.qh_endp = 2745 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2746 htole32( 2747 EHCI_QH_SET_ADDR(addr) | 2748 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2749 ); 2750 2751 /* Set up data transaction */ 2752 if (len != 0) { 2753 ehci_soft_qtd_t *end; 2754 2755 /* Start toggle at 1. */ 2756 epipe->nexttoggle = 1; 2757 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2758 &next, &end); 2759 if (err) 2760 goto bad3; 2761 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2762 end->nextqtd = stat; 2763 end->qtd.qtd_next = 2764 end->qtd.qtd_altnext = htole32(stat->physaddr); 2765 } else { 2766 next = stat; 2767 } 2768 2769 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2770 2771 /* Clear toggle */ 2772 setup->qtd.qtd_status = htole32( 2773 EHCI_QTD_ACTIVE | 2774 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2775 EHCI_QTD_SET_CERR(3) | 2776 EHCI_QTD_SET_TOGGLE(0) | 2777 EHCI_QTD_SET_BYTES(sizeof *req) 2778 ); 2779 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2780 setup->qtd.qtd_buffer_hi[0] = 0; 2781 setup->nextqtd = next; 2782 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2783 setup->xfer = xfer; 2784 setup->len = sizeof *req; 2785 2786 stat->qtd.qtd_status = htole32( 2787 EHCI_QTD_ACTIVE | 2788 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2789 EHCI_QTD_SET_CERR(3) | 2790 EHCI_QTD_SET_TOGGLE(1) | 2791 EHCI_QTD_IOC 2792 ); 2793 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2794 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2795 stat->nextqtd = NULL; 2796 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2797 stat->xfer = xfer; 2798 stat->len = 0; 2799 2800 #ifdef EHCI_DEBUG 2801 if (ehcidebug > 5) { 2802 DPRINTF(("ehci_device_request:\n")); 2803 ehci_dump_sqh(sqh); 2804 ehci_dump_sqtds(setup); 2805 } 2806 #endif 2807 2808 exfer->sqtdstart = setup; 2809 exfer->sqtdend = stat; 2810 #ifdef DIAGNOSTIC 2811 if (!exfer->isdone) { 2812 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2813 } 2814 exfer->isdone = 0; 2815 #endif 2816 2817 /* Insert qTD in QH list. */ 2818 s = splusb(); 2819 ehci_set_qh_qtd(sqh, setup); 2820 if (xfer->timeout && !sc->sc_bus.use_polling) { 2821 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2822 ehci_timeout, xfer); 2823 } 2824 ehci_add_intr_list(sc, exfer); 2825 xfer->status = USBD_IN_PROGRESS; 2826 splx(s); 2827 2828 #ifdef EHCI_DEBUG 2829 if (ehcidebug > 10) { 2830 DPRINTF(("ehci_device_request: status=%x\n", 2831 EOREAD4(sc, EHCI_USBSTS))); 2832 delay(10000); 2833 ehci_dump_regs(sc); 2834 ehci_dump_sqh(sc->sc_async_head); 2835 ehci_dump_sqh(sqh); 2836 ehci_dump_sqtds(setup); 2837 } 2838 #endif 2839 2840 return (USBD_NORMAL_COMPLETION); 2841 2842 bad3: 2843 ehci_free_sqtd(sc, stat); 2844 bad2: 2845 ehci_free_sqtd(sc, setup); 2846 bad1: 2847 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2848 xfer->status = err; 2849 usb_transfer_complete(xfer); 2850 return (err); 2851 #undef exfer 2852 } 2853 2854 /* 2855 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2856 * qTD status, or miss signalling occasionally under heavy load. If the host 2857 * machine is too fast, we we can miss transaction completion - when we scan 2858 * the active list the transaction still seems to be active. This generally 2859 * exhibits itself as a umass stall that never recovers. 2860 * 2861 * We work around this behaviour by setting up this callback after any softintr 2862 * that completes with transactions still pending, giving us another chance to 2863 * check for completion after the writeback has taken place. 2864 */ 2865 void 2866 ehci_intrlist_timeout(void *arg) 2867 { 2868 ehci_softc_t *sc = arg; 2869 int s = splusb(); 2870 2871 DPRINTF(("ehci_intrlist_timeout\n")); 2872 usb_schedsoftintr(&sc->sc_bus); 2873 2874 splx(s); 2875 } 2876 2877 /************************/ 2878 2879 Static usbd_status 2880 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2881 { 2882 usbd_status err; 2883 2884 /* Insert last in queue. */ 2885 err = usb_insert_transfer(xfer); 2886 if (err) 2887 return (err); 2888 2889 /* Pipe isn't running, start first */ 2890 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2891 } 2892 2893 usbd_status 2894 ehci_device_bulk_start(usbd_xfer_handle xfer) 2895 { 2896 #define exfer EXFER(xfer) 2897 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2898 usbd_device_handle dev = epipe->pipe.device; 2899 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2900 ehci_soft_qtd_t *data, *dataend; 2901 ehci_soft_qh_t *sqh; 2902 usbd_status err; 2903 int len, isread, endpt; 2904 int s; 2905 2906 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2907 xfer, xfer->length, xfer->flags)); 2908 2909 if (sc->sc_dying) 2910 return (USBD_IOERROR); 2911 2912 #ifdef DIAGNOSTIC 2913 if (xfer->rqflags & URQ_REQUEST) 2914 panic("ehci_device_bulk_start: a request"); 2915 #endif 2916 2917 len = xfer->length; 2918 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2919 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2920 sqh = epipe->sqh; 2921 2922 epipe->u.bulk.length = len; 2923 2924 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2925 &dataend); 2926 if (err) { 2927 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2928 xfer->status = err; 2929 usb_transfer_complete(xfer); 2930 return (err); 2931 } 2932 2933 #ifdef EHCI_DEBUG 2934 if (ehcidebug > 5) { 2935 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2936 ehci_dump_sqh(sqh); 2937 ehci_dump_sqtds(data); 2938 } 2939 #endif 2940 2941 /* Set up interrupt info. */ 2942 exfer->sqtdstart = data; 2943 exfer->sqtdend = dataend; 2944 #ifdef DIAGNOSTIC 2945 if (!exfer->isdone) { 2946 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2947 } 2948 exfer->isdone = 0; 2949 #endif 2950 2951 s = splusb(); 2952 ehci_set_qh_qtd(sqh, data); 2953 if (xfer->timeout && !sc->sc_bus.use_polling) { 2954 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2955 ehci_timeout, xfer); 2956 } 2957 ehci_add_intr_list(sc, exfer); 2958 xfer->status = USBD_IN_PROGRESS; 2959 splx(s); 2960 2961 #ifdef EHCI_DEBUG 2962 if (ehcidebug > 10) { 2963 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2964 delay(10000); 2965 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2966 ehci_dump_regs(sc); 2967 #if 0 2968 printf("async_head:\n"); 2969 ehci_dump_sqh(sc->sc_async_head); 2970 #endif 2971 printf("sqh:\n"); 2972 ehci_dump_sqh(sqh); 2973 ehci_dump_sqtds(data); 2974 } 2975 #endif 2976 2977 if (sc->sc_bus.use_polling) 2978 ehci_waitintr(sc, xfer); 2979 2980 return (USBD_IN_PROGRESS); 2981 #undef exfer 2982 } 2983 2984 Static void 2985 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2986 { 2987 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2988 ehci_abort_xfer(xfer, USBD_CANCELLED); 2989 } 2990 2991 /* 2992 * Close a device bulk pipe. 2993 */ 2994 Static void 2995 ehci_device_bulk_close(usbd_pipe_handle pipe) 2996 { 2997 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2998 2999 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3000 ehci_close_pipe(pipe, sc->sc_async_head); 3001 } 3002 3003 void 3004 ehci_device_bulk_done(usbd_xfer_handle xfer) 3005 { 3006 struct ehci_xfer *ex = EXFER(xfer); 3007 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3008 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 3009 3010 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3011 xfer, xfer->actlen)); 3012 3013 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3014 ehci_del_intr_list(ex); /* remove from active list */ 3015 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3016 } 3017 3018 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3019 } 3020 3021 /************************/ 3022 3023 Static usbd_status 3024 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3025 { 3026 struct ehci_soft_islot *isp; 3027 int islot, lev; 3028 3029 /* Find a poll rate that is large enough. */ 3030 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3031 if (EHCI_ILEV_IVAL(lev) <= ival) 3032 break; 3033 3034 /* Pick an interrupt slot at the right level. */ 3035 /* XXX could do better than picking at random */ 3036 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3037 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3038 3039 sqh->islot = islot; 3040 isp = &sc->sc_islots[islot]; 3041 ehci_add_qh(sqh, isp->sqh); 3042 3043 return (USBD_NORMAL_COMPLETION); 3044 } 3045 3046 Static usbd_status 3047 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3048 { 3049 usbd_status err; 3050 3051 /* Insert last in queue. */ 3052 err = usb_insert_transfer(xfer); 3053 if (err) 3054 return (err); 3055 3056 /* 3057 * Pipe isn't running (otherwise err would be USBD_INPROG), 3058 * so start it first. 3059 */ 3060 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3061 } 3062 3063 Static usbd_status 3064 ehci_device_intr_start(usbd_xfer_handle xfer) 3065 { 3066 #define exfer EXFER(xfer) 3067 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3068 usbd_device_handle dev = xfer->pipe->device; 3069 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3070 ehci_soft_qtd_t *data, *dataend; 3071 ehci_soft_qh_t *sqh; 3072 usbd_status err; 3073 int len, isread, endpt; 3074 int s; 3075 3076 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3077 xfer, xfer->length, xfer->flags)); 3078 3079 if (sc->sc_dying) 3080 return (USBD_IOERROR); 3081 3082 #ifdef DIAGNOSTIC 3083 if (xfer->rqflags & URQ_REQUEST) 3084 panic("ehci_device_intr_start: a request"); 3085 #endif 3086 3087 len = xfer->length; 3088 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3089 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3090 sqh = epipe->sqh; 3091 3092 epipe->u.intr.length = len; 3093 3094 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3095 &dataend); 3096 if (err) { 3097 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3098 xfer->status = err; 3099 usb_transfer_complete(xfer); 3100 return (err); 3101 } 3102 3103 #ifdef EHCI_DEBUG 3104 if (ehcidebug > 5) { 3105 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3106 ehci_dump_sqh(sqh); 3107 ehci_dump_sqtds(data); 3108 } 3109 #endif 3110 3111 /* Set up interrupt info. */ 3112 exfer->sqtdstart = data; 3113 exfer->sqtdend = dataend; 3114 #ifdef DIAGNOSTIC 3115 if (!exfer->isdone) { 3116 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3117 } 3118 exfer->isdone = 0; 3119 #endif 3120 3121 s = splusb(); 3122 ehci_set_qh_qtd(sqh, data); 3123 if (xfer->timeout && !sc->sc_bus.use_polling) { 3124 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3125 ehci_timeout, xfer); 3126 } 3127 ehci_add_intr_list(sc, exfer); 3128 xfer->status = USBD_IN_PROGRESS; 3129 splx(s); 3130 3131 #ifdef EHCI_DEBUG 3132 if (ehcidebug > 10) { 3133 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3134 delay(10000); 3135 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3136 ehci_dump_regs(sc); 3137 printf("sqh:\n"); 3138 ehci_dump_sqh(sqh); 3139 ehci_dump_sqtds(data); 3140 } 3141 #endif 3142 3143 if (sc->sc_bus.use_polling) 3144 ehci_waitintr(sc, xfer); 3145 3146 return (USBD_IN_PROGRESS); 3147 #undef exfer 3148 } 3149 3150 Static void 3151 ehci_device_intr_abort(usbd_xfer_handle xfer) 3152 { 3153 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3154 if (xfer->pipe->intrxfer == xfer) { 3155 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3156 xfer->pipe->intrxfer = NULL; 3157 } 3158 ehci_abort_xfer(xfer, USBD_CANCELLED); 3159 } 3160 3161 Static void 3162 ehci_device_intr_close(usbd_pipe_handle pipe) 3163 { 3164 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3166 struct ehci_soft_islot *isp; 3167 3168 isp = &sc->sc_islots[epipe->sqh->islot]; 3169 ehci_close_pipe(pipe, isp->sqh); 3170 } 3171 3172 Static void 3173 ehci_device_intr_done(usbd_xfer_handle xfer) 3174 { 3175 #define exfer EXFER(xfer) 3176 struct ehci_xfer *ex = EXFER(xfer); 3177 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3178 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3179 ehci_soft_qtd_t *data, *dataend; 3180 ehci_soft_qh_t *sqh; 3181 usbd_status err; 3182 int len, isread, endpt, s; 3183 3184 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3185 xfer, xfer->actlen)); 3186 3187 if (xfer->pipe->repeat) { 3188 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3189 3190 len = epipe->u.intr.length; 3191 xfer->length = len; 3192 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3193 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3194 sqh = epipe->sqh; 3195 3196 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3197 &data, &dataend); 3198 if (err) { 3199 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3200 xfer->status = err; 3201 return; 3202 } 3203 3204 /* Set up interrupt info. */ 3205 exfer->sqtdstart = data; 3206 exfer->sqtdend = dataend; 3207 #ifdef DIAGNOSTIC 3208 if (!exfer->isdone) { 3209 printf("ehci_device_intr_done: not done, ex=%p\n", 3210 exfer); 3211 } 3212 exfer->isdone = 0; 3213 #endif 3214 3215 s = splusb(); 3216 ehci_set_qh_qtd(sqh, data); 3217 if (xfer->timeout && !sc->sc_bus.use_polling) { 3218 usb_callout(xfer->timeout_handle, 3219 mstohz(xfer->timeout), ehci_timeout, xfer); 3220 } 3221 splx(s); 3222 3223 xfer->status = USBD_IN_PROGRESS; 3224 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3225 ehci_del_intr_list(ex); /* remove from active list */ 3226 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3227 } 3228 #undef exfer 3229 } 3230 3231 /************************/ 3232 3233 Static usbd_status 3234 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3235 { 3236 return USBD_IOERROR; 3237 } 3238 Static usbd_status 3239 ehci_device_isoc_start(usbd_xfer_handle xfer) 3240 { 3241 return USBD_IOERROR; 3242 } 3243 Static void 3244 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3245 { 3246 } 3247 Static void 3248 ehci_device_isoc_close(usbd_pipe_handle pipe) 3249 { 3250 } 3251 Static void 3252 ehci_device_isoc_done(usbd_xfer_handle xfer) 3253 { 3254 } 3255
Indexes created Mon Sep 22 05:09:51 GMT 2025