ehci.c revision 1.131
1 /* $NetBSD: ehci.c,v 1.131 2008/02/03 10:57:12 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.131 2008/02/03 10:57:12 drochner Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 #include <dev/usb/usbroothub_subr.h> 91 92 #ifdef EHCI_DEBUG 93 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 94 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 95 int ehcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 struct ehci_pipe { 105 struct usbd_pipe pipe; 106 int nexttoggle; 107 108 ehci_soft_qh_t *sqh; 109 union { 110 ehci_soft_qtd_t *qtd; 111 /* ehci_soft_itd_t *itd; */ 112 } tail; 113 union { 114 /* Control pipe */ 115 struct { 116 usb_dma_t reqdma; 117 u_int length; 118 } ctl; 119 /* Interrupt pipe */ 120 struct { 121 u_int length; 122 } intr; 123 /* Bulk pipe */ 124 struct { 125 u_int length; 126 } bulk; 127 /* Iso pipe */ 128 /* XXX */ 129 } u; 130 }; 131 132 Static void ehci_shutdown(void *); 133 134 Static usbd_status ehci_open(usbd_pipe_handle); 135 Static void ehci_poll(struct usbd_bus *); 136 Static void ehci_softintr(void *); 137 Static int ehci_intr1(ehci_softc_t *); 138 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 139 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 140 Static void ehci_idone(struct ehci_xfer *); 141 Static void ehci_timeout(void *); 142 Static void ehci_timeout_task(void *); 143 Static void ehci_intrlist_timeout(void *); 144 145 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 146 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 147 148 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 149 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 150 151 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 152 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 153 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 154 Static void ehci_root_ctrl_close(usbd_pipe_handle); 155 Static void ehci_root_ctrl_done(usbd_xfer_handle); 156 157 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 158 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 159 Static void ehci_root_intr_abort(usbd_xfer_handle); 160 Static void ehci_root_intr_close(usbd_pipe_handle); 161 Static void ehci_root_intr_done(usbd_xfer_handle); 162 163 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 164 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 165 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 166 Static void ehci_device_ctrl_close(usbd_pipe_handle); 167 Static void ehci_device_ctrl_done(usbd_xfer_handle); 168 169 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 170 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 171 Static void ehci_device_bulk_abort(usbd_xfer_handle); 172 Static void ehci_device_bulk_close(usbd_pipe_handle); 173 Static void ehci_device_bulk_done(usbd_xfer_handle); 174 175 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 177 Static void ehci_device_intr_abort(usbd_xfer_handle); 178 Static void ehci_device_intr_close(usbd_pipe_handle); 179 Static void ehci_device_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 182 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 183 Static void ehci_device_isoc_abort(usbd_xfer_handle); 184 Static void ehci_device_isoc_close(usbd_pipe_handle); 185 Static void ehci_device_isoc_done(usbd_xfer_handle); 186 187 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 188 Static void ehci_noop(usbd_pipe_handle pipe); 189 190 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 191 Static void ehci_disown(ehci_softc_t *, int, int); 192 193 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 194 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 195 196 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 197 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 198 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 199 ehci_softc_t *, int, int, usbd_xfer_handle, 200 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 201 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 202 ehci_soft_qtd_t *); 203 204 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 205 206 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 207 int ival); 208 209 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 210 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 211 ehci_soft_qh_t *); 212 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 213 Static void ehci_sync_hc(ehci_softc_t *); 214 215 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 216 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 217 218 #ifdef EHCI_DEBUG 219 Static void ehci_dump_regs(ehci_softc_t *); 220 void ehci_dump(void); 221 Static ehci_softc_t *theehci; 222 Static void ehci_dump_link(ehci_link_t, int); 223 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 224 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 225 Static void ehci_dump_qtd(ehci_qtd_t *); 226 Static void ehci_dump_sqh(ehci_soft_qh_t *); 227 #ifdef DIAGNOSTIC 228 Static void ehci_dump_exfer(struct ehci_xfer *); 229 #endif 230 #endif 231 232 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 233 234 #define EHCI_INTR_ENDPT 1 235 236 #define ehci_add_intr_list(sc, ex) \ 237 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 238 #define ehci_del_intr_list(ex) \ 239 do { \ 240 LIST_REMOVE((ex), inext); \ 241 (ex)->inext.le_prev = NULL; \ 242 } while (0) 243 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 244 245 Static const struct usbd_bus_methods ehci_bus_methods = { 246 ehci_open, 247 ehci_softintr, 248 ehci_poll, 249 ehci_allocm, 250 ehci_freem, 251 ehci_allocx, 252 ehci_freex, 253 }; 254 255 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 256 ehci_root_ctrl_transfer, 257 ehci_root_ctrl_start, 258 ehci_root_ctrl_abort, 259 ehci_root_ctrl_close, 260 ehci_noop, 261 ehci_root_ctrl_done, 262 }; 263 264 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 265 ehci_root_intr_transfer, 266 ehci_root_intr_start, 267 ehci_root_intr_abort, 268 ehci_root_intr_close, 269 ehci_noop, 270 ehci_root_intr_done, 271 }; 272 273 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 274 ehci_device_ctrl_transfer, 275 ehci_device_ctrl_start, 276 ehci_device_ctrl_abort, 277 ehci_device_ctrl_close, 278 ehci_noop, 279 ehci_device_ctrl_done, 280 }; 281 282 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 283 ehci_device_intr_transfer, 284 ehci_device_intr_start, 285 ehci_device_intr_abort, 286 ehci_device_intr_close, 287 ehci_device_clear_toggle, 288 ehci_device_intr_done, 289 }; 290 291 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 292 ehci_device_bulk_transfer, 293 ehci_device_bulk_start, 294 ehci_device_bulk_abort, 295 ehci_device_bulk_close, 296 ehci_device_clear_toggle, 297 ehci_device_bulk_done, 298 }; 299 300 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 301 ehci_device_isoc_transfer, 302 ehci_device_isoc_start, 303 ehci_device_isoc_abort, 304 ehci_device_isoc_close, 305 ehci_noop, 306 ehci_device_isoc_done, 307 }; 308 309 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 310 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 311 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 312 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 313 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 314 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 315 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 316 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 317 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 318 }; 319 320 usbd_status 321 ehci_init(ehci_softc_t *sc) 322 { 323 u_int32_t vers, sparams, cparams, hcr; 324 u_int i; 325 usbd_status err; 326 ehci_soft_qh_t *sqh; 327 u_int ncomp; 328 329 DPRINTF(("ehci_init: start\n")); 330 #ifdef EHCI_DEBUG 331 theehci = sc; 332 #endif 333 334 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 335 336 vers = EREAD2(sc, EHCI_HCIVERSION); 337 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 338 vers >> 8, vers & 0xff); 339 340 sparams = EREAD4(sc, EHCI_HCSPARAMS); 341 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 342 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 343 ncomp = EHCI_HCS_N_CC(sparams); 344 if (ncomp != sc->sc_ncomp) { 345 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 346 USBDEVNAME(sc->sc_bus.bdev), 347 ncomp, sc->sc_ncomp); 348 #if NOHCI == 0 || NUHCI == 0 349 aprint_error("%s: ohci or uhci probably not configured\n", 350 USBDEVNAME(sc->sc_bus.bdev)); 351 #endif 352 if (ncomp < sc->sc_ncomp) 353 sc->sc_ncomp = ncomp; 354 } 355 if (sc->sc_ncomp > 0) { 356 aprint_normal("%s: companion controller%s, %d port%s each:", 357 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 358 EHCI_HCS_N_PCC(sparams), 359 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 360 for (i = 0; i < sc->sc_ncomp; i++) 361 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 362 aprint_normal("\n"); 363 } 364 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 365 cparams = EREAD4(sc, EHCI_HCCPARAMS); 366 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 367 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 368 369 if (EHCI_HCC_64BIT(cparams)) { 370 /* MUST clear segment register if 64 bit capable. */ 371 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 372 } 373 374 sc->sc_bus.usbrev = USBREV_2_0; 375 376 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 377 USB_MEM_RESERVE); 378 379 /* Reset the controller */ 380 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 381 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 382 usb_delay_ms(&sc->sc_bus, 1); 383 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 384 for (i = 0; i < 100; i++) { 385 usb_delay_ms(&sc->sc_bus, 1); 386 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 387 if (!hcr) 388 break; 389 } 390 if (hcr) { 391 aprint_error("%s: reset timeout\n", 392 USBDEVNAME(sc->sc_bus.bdev)); 393 return (USBD_IOERROR); 394 } 395 396 /* XXX need proper intr scheduling */ 397 sc->sc_rand = 96; 398 399 /* frame list size at default, read back what we got and use that */ 400 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 401 case 0: sc->sc_flsize = 1024; break; 402 case 1: sc->sc_flsize = 512; break; 403 case 2: sc->sc_flsize = 256; break; 404 case 3: return (USBD_IOERROR); 405 } 406 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 407 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 408 if (err) 409 return (err); 410 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 411 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 412 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 413 414 /* Set up the bus struct. */ 415 sc->sc_bus.methods = &ehci_bus_methods; 416 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 417 418 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 419 420 sc->sc_eintrs = EHCI_NORMAL_INTRS; 421 422 /* 423 * Allocate the interrupt dummy QHs. These are arranged to give poll 424 * intervals that are powers of 2 times 1ms. 425 */ 426 for (i = 0; i < EHCI_INTRQHS; i++) { 427 sqh = ehci_alloc_sqh(sc); 428 if (sqh == NULL) { 429 err = USBD_NOMEM; 430 goto bad1; 431 } 432 sc->sc_islots[i].sqh = sqh; 433 } 434 for (i = 0; i < EHCI_INTRQHS; i++) { 435 sqh = sc->sc_islots[i].sqh; 436 if (i == 0) { 437 /* The last (1ms) QH terminates. */ 438 sqh->qh.qh_link = EHCI_NULL; 439 sqh->next = NULL; 440 } else { 441 /* Otherwise the next QH has half the poll interval */ 442 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 443 sqh->qh.qh_link = htole32(sqh->next->physaddr | 444 EHCI_LINK_QH); 445 } 446 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 447 sqh->qh.qh_curqtd = EHCI_NULL; 448 sqh->next = NULL; 449 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 450 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 451 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 452 sqh->sqtd = NULL; 453 } 454 /* Point the frame list at the last level (128ms). */ 455 for (i = 0; i < sc->sc_flsize; i++) { 456 int j; 457 458 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 459 revbits[i & (EHCI_MAX_POLLRATE-1)]; 460 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 461 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 462 i)].sqh->physaddr); 463 } 464 465 /* Allocate dummy QH that starts the async list. */ 466 sqh = ehci_alloc_sqh(sc); 467 if (sqh == NULL) { 468 err = USBD_NOMEM; 469 goto bad1; 470 } 471 /* Fill the QH */ 472 sqh->qh.qh_endp = 473 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 474 sqh->qh.qh_link = 475 htole32(sqh->physaddr | EHCI_LINK_QH); 476 sqh->qh.qh_curqtd = EHCI_NULL; 477 sqh->next = NULL; 478 /* Fill the overlay qTD */ 479 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 480 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 481 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 482 sqh->sqtd = NULL; 483 #ifdef EHCI_DEBUG 484 if (ehcidebug) { 485 ehci_dump_sqh(sqh); 486 } 487 #endif 488 489 /* Point to async list */ 490 sc->sc_async_head = sqh; 491 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 492 493 usb_callout_init(sc->sc_tmo_intrlist); 494 495 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 496 497 /* Turn on controller */ 498 EOWRITE4(sc, EHCI_USBCMD, 499 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 500 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 501 EHCI_CMD_ASE | 502 EHCI_CMD_PSE | 503 EHCI_CMD_RS); 504 505 /* Take over port ownership */ 506 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 507 508 for (i = 0; i < 100; i++) { 509 usb_delay_ms(&sc->sc_bus, 1); 510 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 511 if (!hcr) 512 break; 513 } 514 if (hcr) { 515 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 516 return (USBD_IOERROR); 517 } 518 519 /* Enable interrupts */ 520 DPRINTFN(1,("ehci_init: enabling\n")); 521 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 522 523 return (USBD_NORMAL_COMPLETION); 524 525 #if 0 526 bad2: 527 ehci_free_sqh(sc, sc->sc_async_head); 528 #endif 529 bad1: 530 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 531 return (err); 532 } 533 534 int 535 ehci_intr(void *v) 536 { 537 ehci_softc_t *sc = v; 538 539 if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 540 return (0); 541 542 /* If we get an interrupt while polling, then just ignore it. */ 543 if (sc->sc_bus.use_polling) { 544 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 545 546 if (intrs) 547 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 548 #ifdef DIAGNOSTIC 549 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 550 #endif 551 return (0); 552 } 553 554 return (ehci_intr1(sc)); 555 } 556 557 Static int 558 ehci_intr1(ehci_softc_t *sc) 559 { 560 u_int32_t intrs, eintrs; 561 562 DPRINTFN(20,("ehci_intr1: enter\n")); 563 564 /* In case the interrupt occurs before initialization has completed. */ 565 if (sc == NULL) { 566 #ifdef DIAGNOSTIC 567 printf("ehci_intr1: sc == NULL\n"); 568 #endif 569 return (0); 570 } 571 572 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 573 if (!intrs) 574 return (0); 575 576 eintrs = intrs & sc->sc_eintrs; 577 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 578 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 579 (u_int)eintrs)); 580 if (!eintrs) 581 return (0); 582 583 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 584 sc->sc_bus.intr_context++; 585 sc->sc_bus.no_intrs++; 586 if (eintrs & EHCI_STS_IAA) { 587 DPRINTF(("ehci_intr1: door bell\n")); 588 wakeup(&sc->sc_async_head); 589 eintrs &= ~EHCI_STS_IAA; 590 } 591 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 592 DPRINTFN(5,("ehci_intr1: %s %s\n", 593 eintrs & EHCI_STS_INT ? "INT" : "", 594 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 595 usb_schedsoftintr(&sc->sc_bus); 596 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 597 } 598 if (eintrs & EHCI_STS_HSE) { 599 printf("%s: unrecoverable error, controller halted\n", 600 USBDEVNAME(sc->sc_bus.bdev)); 601 /* XXX what else */ 602 } 603 if (eintrs & EHCI_STS_PCD) { 604 ehci_pcd(sc, sc->sc_intrxfer); 605 eintrs &= ~EHCI_STS_PCD; 606 } 607 608 sc->sc_bus.intr_context--; 609 610 if (eintrs != 0) { 611 /* Block unprocessed interrupts. */ 612 sc->sc_eintrs &= ~eintrs; 613 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 614 printf("%s: blocking intrs 0x%x\n", 615 USBDEVNAME(sc->sc_bus.bdev), eintrs); 616 } 617 618 return (1); 619 } 620 621 622 void 623 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 624 { 625 usbd_pipe_handle pipe; 626 u_char *p; 627 int i, m; 628 629 if (xfer == NULL) { 630 /* Just ignore the change. */ 631 return; 632 } 633 634 pipe = xfer->pipe; 635 636 p = KERNADDR(&xfer->dmabuf, 0); 637 m = min(sc->sc_noport, xfer->length * 8 - 1); 638 memset(p, 0, xfer->length); 639 for (i = 1; i <= m; i++) { 640 /* Pick out CHANGE bits from the status reg. */ 641 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 642 p[i/8] |= 1 << (i%8); 643 } 644 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 645 xfer->actlen = xfer->length; 646 xfer->status = USBD_NORMAL_COMPLETION; 647 648 usb_transfer_complete(xfer); 649 } 650 651 void 652 ehci_softintr(void *v) 653 { 654 ehci_softc_t *sc = v; 655 struct ehci_xfer *ex, *nextex; 656 657 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 658 sc->sc_bus.intr_context)); 659 660 sc->sc_bus.intr_context++; 661 662 /* 663 * The only explanation I can think of for why EHCI is as brain dead 664 * as UHCI interrupt-wise is that Intel was involved in both. 665 * An interrupt just tells us that something is done, we have no 666 * clue what, so we need to scan through all active transfers. :-( 667 */ 668 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 669 nextex = LIST_NEXT(ex, inext); 670 ehci_check_intr(sc, ex); 671 } 672 673 /* Schedule a callout to catch any dropped transactions. */ 674 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 675 !LIST_EMPTY(&sc->sc_intrhead)) 676 usb_callout(sc->sc_tmo_intrlist, hz, 677 ehci_intrlist_timeout, sc); 678 679 #ifdef USB_USE_SOFTINTR 680 if (sc->sc_softwake) { 681 sc->sc_softwake = 0; 682 wakeup(&sc->sc_softwake); 683 } 684 #endif /* USB_USE_SOFTINTR */ 685 686 sc->sc_bus.intr_context--; 687 } 688 689 /* Check for an interrupt. */ 690 void 691 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 692 { 693 ehci_soft_qtd_t *sqtd, *lsqtd; 694 u_int32_t status; 695 696 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 697 698 if (ex->sqtdstart == NULL) { 699 printf("ehci_check_intr: sqtdstart=NULL\n"); 700 return; 701 } 702 lsqtd = ex->sqtdend; 703 #ifdef DIAGNOSTIC 704 if (lsqtd == NULL) { 705 printf("ehci_check_intr: lsqtd==0\n"); 706 return; 707 } 708 #endif 709 /* 710 * If the last TD is still active we need to check whether there 711 * is a an error somewhere in the middle, or whether there was a 712 * short packet (SPD and not ACTIVE). 713 */ 714 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 715 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 716 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 717 status = le32toh(sqtd->qtd.qtd_status); 718 /* If there's an active QTD the xfer isn't done. */ 719 if (status & EHCI_QTD_ACTIVE) 720 break; 721 /* Any kind of error makes the xfer done. */ 722 if (status & EHCI_QTD_HALTED) 723 goto done; 724 /* We want short packets, and it is short: it's done */ 725 if (EHCI_QTD_GET_BYTES(status) != 0) 726 goto done; 727 } 728 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 729 ex, ex->sqtdstart)); 730 return; 731 } 732 done: 733 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 734 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 735 ehci_idone(ex); 736 } 737 738 void 739 ehci_idone(struct ehci_xfer *ex) 740 { 741 usbd_xfer_handle xfer = &ex->xfer; 742 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 743 ehci_soft_qtd_t *sqtd, *lsqtd; 744 u_int32_t status = 0, nstatus = 0; 745 int actlen; 746 747 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 748 #ifdef DIAGNOSTIC 749 { 750 int s = splhigh(); 751 if (ex->isdone) { 752 splx(s); 753 #ifdef EHCI_DEBUG 754 printf("ehci_idone: ex is done!\n "); 755 ehci_dump_exfer(ex); 756 #else 757 printf("ehci_idone: ex=%p is done!\n", ex); 758 #endif 759 return; 760 } 761 ex->isdone = 1; 762 splx(s); 763 } 764 #endif 765 766 if (xfer->status == USBD_CANCELLED || 767 xfer->status == USBD_TIMEOUT) { 768 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 769 return; 770 } 771 772 #ifdef EHCI_DEBUG 773 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 774 if (ehcidebug > 10) 775 ehci_dump_sqtds(ex->sqtdstart); 776 #endif 777 778 /* The transfer is done, compute actual length and status. */ 779 lsqtd = ex->sqtdend; 780 actlen = 0; 781 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 782 nstatus = le32toh(sqtd->qtd.qtd_status); 783 if (nstatus & EHCI_QTD_ACTIVE) 784 break; 785 786 status = nstatus; 787 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 788 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 789 } 790 791 /* 792 * If there are left over TDs we need to update the toggle. 793 * The default pipe doesn't need it since control transfers 794 * start the toggle at 0 every time. 795 * For a short transfer we need to update the toggle for the missing 796 * packets within the qTD. 797 */ 798 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 799 xfer->pipe->device->default_pipe != xfer->pipe) { 800 DPRINTFN(2, ("ehci_idone: need toggle update " 801 "status=%08x nstatus=%08x\n", status, nstatus)); 802 #if 0 803 ehci_dump_sqh(epipe->sqh); 804 ehci_dump_sqtds(ex->sqtdstart); 805 #endif 806 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 807 } 808 809 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 810 xfer->length, actlen, status)); 811 xfer->actlen = actlen; 812 if (status & EHCI_QTD_HALTED) { 813 #ifdef EHCI_DEBUG 814 char sbuf[128]; 815 816 bitmask_snprintf((u_int32_t)status, 817 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 818 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 819 820 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 821 "status 0x%s\n", 822 xfer->pipe->device->address, 823 xfer->pipe->endpoint->edesc->bEndpointAddress, 824 sbuf)); 825 if (ehcidebug > 2) { 826 ehci_dump_sqh(epipe->sqh); 827 ehci_dump_sqtds(ex->sqtdstart); 828 } 829 #endif 830 /* low&full speed has an extra error flag */ 831 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 832 EHCI_QH_SPEED_HIGH) 833 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 834 else 835 status &= EHCI_QTD_STATERRS; 836 if (status == 0) /* no other errors means a stall */ 837 xfer->status = USBD_STALLED; 838 else 839 xfer->status = USBD_IOERROR; /* more info XXX */ 840 /* XXX need to reset TT on missed microframe */ 841 if (status & EHCI_QTD_MISSEDMICRO) { 842 ehci_softc_t *sc = (ehci_softc_t *) 843 xfer->pipe->device->bus; 844 845 printf("%s: missed microframe, TT reset not " 846 "implemented, hub might be inoperational\n", 847 USBDEVNAME(sc->sc_bus.bdev)); 848 } 849 } else { 850 xfer->status = USBD_NORMAL_COMPLETION; 851 } 852 853 usb_transfer_complete(xfer); 854 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 855 } 856 857 /* 858 * Wait here until controller claims to have an interrupt. 859 * Then call ehci_intr and return. Use timeout to avoid waiting 860 * too long. 861 */ 862 void 863 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 864 { 865 int timo; 866 u_int32_t intrs; 867 868 xfer->status = USBD_IN_PROGRESS; 869 for (timo = xfer->timeout; timo >= 0; timo--) { 870 usb_delay_ms(&sc->sc_bus, 1); 871 if (sc->sc_dying) 872 break; 873 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 874 sc->sc_eintrs; 875 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 876 #ifdef EHCI_DEBUG 877 if (ehcidebug > 15) 878 ehci_dump_regs(sc); 879 #endif 880 if (intrs) { 881 ehci_intr1(sc); 882 if (xfer->status != USBD_IN_PROGRESS) 883 return; 884 } 885 } 886 887 /* Timeout */ 888 DPRINTF(("ehci_waitintr: timeout\n")); 889 xfer->status = USBD_TIMEOUT; 890 usb_transfer_complete(xfer); 891 /* XXX should free TD */ 892 } 893 894 void 895 ehci_poll(struct usbd_bus *bus) 896 { 897 ehci_softc_t *sc = (ehci_softc_t *)bus; 898 #ifdef EHCI_DEBUG 899 static int last; 900 int new; 901 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 902 if (new != last) { 903 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 904 last = new; 905 } 906 #endif 907 908 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 909 ehci_intr1(sc); 910 } 911 912 int 913 ehci_detach(struct ehci_softc *sc, int flags) 914 { 915 int rv = 0; 916 917 if (sc->sc_child != NULL) 918 rv = config_detach(sc->sc_child, flags); 919 920 if (rv != 0) 921 return (rv); 922 923 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 924 925 if (sc->sc_shutdownhook != NULL) 926 shutdownhook_disestablish(sc->sc_shutdownhook); 927 928 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 929 930 /* XXX free other data structures XXX */ 931 mutex_destroy(&sc->sc_doorbell_lock); 932 933 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 934 935 return (rv); 936 } 937 938 939 int 940 ehci_activate(device_ptr_t self, enum devact act) 941 { 942 struct ehci_softc *sc = (struct ehci_softc *)self; 943 int rv = 0; 944 945 switch (act) { 946 case DVACT_ACTIVATE: 947 return (EOPNOTSUPP); 948 949 case DVACT_DEACTIVATE: 950 sc->sc_dying = 1; 951 if (sc->sc_child != NULL) 952 rv = config_deactivate(sc->sc_child); 953 break; 954 } 955 return (rv); 956 } 957 958 /* 959 * Handle suspend/resume. 960 * 961 * We need to switch to polling mode here, because this routine is 962 * called from an interrupt context. This is all right since we 963 * are almost suspended anyway. 964 * 965 * Note that this power handler isn't to be registered directly; the 966 * bus glue needs to call out to it. 967 */ 968 bool 969 ehci_suspend(device_t dv) 970 { 971 ehci_softc_t *sc = (ehci_softc_t *)dv; 972 int i, s; 973 uint32_t cmd, hcr; 974 975 s = splhardusb(); 976 977 sc->sc_bus.use_polling++; 978 979 for (i = 1; i <= sc->sc_noport; i++) { 980 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 981 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 982 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 983 } 984 985 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 986 987 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 988 EOWRITE4(sc, EHCI_USBCMD, cmd); 989 990 for (i = 0; i < 100; i++) { 991 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 992 if (hcr == 0) 993 break; 994 995 usb_delay_ms(&sc->sc_bus, 1); 996 } 997 if (hcr != 0) 998 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 999 1000 cmd &= ~EHCI_CMD_RS; 1001 EOWRITE4(sc, EHCI_USBCMD, cmd); 1002 1003 for (i = 0; i < 100; i++) { 1004 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1005 if (hcr == EHCI_STS_HCH) 1006 break; 1007 1008 usb_delay_ms(&sc->sc_bus, 1); 1009 } 1010 if (hcr != EHCI_STS_HCH) 1011 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1012 1013 sc->sc_bus.use_polling--; 1014 splx(s); 1015 1016 return true; 1017 } 1018 1019 bool 1020 ehci_resume(device_t dv) 1021 { 1022 ehci_softc_t *sc = (ehci_softc_t *)dv; 1023 uint32_t cmd, hcr; 1024 int i; 1025 1026 /* restore things in case the bios sucks */ 1027 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1028 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1029 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1030 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1031 1032 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE); 1033 1034 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1035 1036 hcr = 0; 1037 for (i = 1; i <= sc->sc_noport; i++) { 1038 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1039 if ((cmd & EHCI_PS_PO) == 0 && 1040 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1041 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1042 hcr = 1; 1043 } 1044 } 1045 1046 if (hcr) { 1047 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1048 1049 for (i = 1; i <= sc->sc_noport; i++) { 1050 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1051 if ((cmd & EHCI_PS_PO) == 0 && 1052 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1053 EOWRITE4(sc, EHCI_PORTSC(i), 1054 cmd & ~EHCI_PS_FPR); 1055 } 1056 } 1057 1058 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1059 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1060 1061 for (i = 0; i < 100; i++) { 1062 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1063 if (hcr != EHCI_STS_HCH) 1064 break; 1065 1066 usb_delay_ms(&sc->sc_bus, 1); 1067 } 1068 if (hcr == EHCI_STS_HCH) 1069 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1070 1071 return true; 1072 } 1073 1074 /* 1075 * Shut down the controller when the system is going down. 1076 */ 1077 void 1078 ehci_shutdown(void *v) 1079 { 1080 ehci_softc_t *sc = v; 1081 1082 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1083 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1084 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1085 } 1086 1087 usbd_status 1088 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1089 { 1090 struct ehci_softc *sc = (struct ehci_softc *)bus; 1091 usbd_status err; 1092 1093 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1094 if (err == USBD_NOMEM) 1095 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1096 #ifdef EHCI_DEBUG 1097 if (err) 1098 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1099 #endif 1100 return (err); 1101 } 1102 1103 void 1104 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1105 { 1106 struct ehci_softc *sc = (struct ehci_softc *)bus; 1107 1108 if (dma->block->flags & USB_DMA_RESERVE) { 1109 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1110 dma); 1111 return; 1112 } 1113 usb_freemem(&sc->sc_bus, dma); 1114 } 1115 1116 usbd_xfer_handle 1117 ehci_allocx(struct usbd_bus *bus) 1118 { 1119 struct ehci_softc *sc = (struct ehci_softc *)bus; 1120 usbd_xfer_handle xfer; 1121 1122 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1123 if (xfer != NULL) { 1124 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1125 #ifdef DIAGNOSTIC 1126 if (xfer->busy_free != XFER_FREE) { 1127 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1128 xfer->busy_free); 1129 } 1130 #endif 1131 } else { 1132 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1133 } 1134 if (xfer != NULL) { 1135 memset(xfer, 0, sizeof(struct ehci_xfer)); 1136 #ifdef DIAGNOSTIC 1137 EXFER(xfer)->isdone = 1; 1138 xfer->busy_free = XFER_BUSY; 1139 #endif 1140 } 1141 return (xfer); 1142 } 1143 1144 void 1145 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1146 { 1147 struct ehci_softc *sc = (struct ehci_softc *)bus; 1148 1149 #ifdef DIAGNOSTIC 1150 if (xfer->busy_free != XFER_BUSY) { 1151 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1152 xfer->busy_free); 1153 } 1154 xfer->busy_free = XFER_FREE; 1155 if (!EXFER(xfer)->isdone) { 1156 printf("ehci_freex: !isdone\n"); 1157 } 1158 #endif 1159 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1160 } 1161 1162 Static void 1163 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1164 { 1165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1166 1167 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1168 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1169 #ifdef USB_DEBUG 1170 if (ehcidebug) 1171 usbd_dump_pipe(pipe); 1172 #endif 1173 epipe->nexttoggle = 0; 1174 } 1175 1176 Static void 1177 ehci_noop(usbd_pipe_handle pipe) 1178 { 1179 } 1180 1181 #ifdef EHCI_DEBUG 1182 void 1183 ehci_dump_regs(ehci_softc_t *sc) 1184 { 1185 int i; 1186 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1187 EOREAD4(sc, EHCI_USBCMD), 1188 EOREAD4(sc, EHCI_USBSTS), 1189 EOREAD4(sc, EHCI_USBINTR)); 1190 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1191 EOREAD4(sc, EHCI_FRINDEX), 1192 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1193 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1194 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1195 for (i = 1; i <= sc->sc_noport; i++) 1196 printf("port %d status=0x%08x\n", i, 1197 EOREAD4(sc, EHCI_PORTSC(i))); 1198 } 1199 1200 /* 1201 * Unused function - this is meant to be called from a kernel 1202 * debugger. 1203 */ 1204 void 1205 ehci_dump() 1206 { 1207 ehci_dump_regs(theehci); 1208 } 1209 1210 void 1211 ehci_dump_link(ehci_link_t link, int type) 1212 { 1213 link = le32toh(link); 1214 printf("0x%08x", link); 1215 if (link & EHCI_LINK_TERMINATE) 1216 printf("<T>"); 1217 else { 1218 printf("<"); 1219 if (type) { 1220 switch (EHCI_LINK_TYPE(link)) { 1221 case EHCI_LINK_ITD: printf("ITD"); break; 1222 case EHCI_LINK_QH: printf("QH"); break; 1223 case EHCI_LINK_SITD: printf("SITD"); break; 1224 case EHCI_LINK_FSTN: printf("FSTN"); break; 1225 } 1226 } 1227 printf(">"); 1228 } 1229 } 1230 1231 void 1232 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1233 { 1234 int i; 1235 u_int32_t stop; 1236 1237 stop = 0; 1238 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1239 ehci_dump_sqtd(sqtd); 1240 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1241 } 1242 if (sqtd) 1243 printf("dump aborted, too many TDs\n"); 1244 } 1245 1246 void 1247 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1248 { 1249 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1250 ehci_dump_qtd(&sqtd->qtd); 1251 } 1252 1253 void 1254 ehci_dump_qtd(ehci_qtd_t *qtd) 1255 { 1256 u_int32_t s; 1257 char sbuf[128]; 1258 1259 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1260 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1261 printf("\n"); 1262 s = le32toh(qtd->qtd_status); 1263 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1264 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1265 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1266 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1267 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1268 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1269 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1270 EHCI_QTD_GET_PID(s), sbuf); 1271 for (s = 0; s < 5; s++) 1272 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1273 } 1274 1275 void 1276 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1277 { 1278 ehci_qh_t *qh = &sqh->qh; 1279 u_int32_t endp, endphub; 1280 1281 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1282 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1283 endp = le32toh(qh->qh_endp); 1284 printf(" endp=0x%08x\n", endp); 1285 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1286 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1287 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1288 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1289 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1290 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1291 EHCI_QH_GET_NRL(endp)); 1292 endphub = le32toh(qh->qh_endphub); 1293 printf(" endphub=0x%08x\n", endphub); 1294 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1295 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1296 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1297 EHCI_QH_GET_MULT(endphub)); 1298 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1299 printf("Overlay qTD:\n"); 1300 ehci_dump_qtd(&qh->qh_qtd); 1301 } 1302 1303 #ifdef DIAGNOSTIC 1304 Static void 1305 ehci_dump_exfer(struct ehci_xfer *ex) 1306 { 1307 printf("ehci_dump_exfer: ex=%p\n", ex); 1308 } 1309 #endif 1310 #endif 1311 1312 usbd_status 1313 ehci_open(usbd_pipe_handle pipe) 1314 { 1315 usbd_device_handle dev = pipe->device; 1316 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1317 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1318 u_int8_t addr = dev->address; 1319 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1320 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1321 ehci_soft_qh_t *sqh; 1322 usbd_status err; 1323 int s; 1324 int ival, speed, naks; 1325 int hshubaddr, hshubport; 1326 1327 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1328 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1329 1330 if (dev->myhsport) { 1331 hshubaddr = dev->myhsport->parent->address; 1332 hshubport = dev->myhsport->portno; 1333 } else { 1334 hshubaddr = 0; 1335 hshubport = 0; 1336 } 1337 1338 if (sc->sc_dying) 1339 return (USBD_IOERROR); 1340 1341 epipe->nexttoggle = 0; 1342 1343 if (addr == sc->sc_addr) { 1344 switch (ed->bEndpointAddress) { 1345 case USB_CONTROL_ENDPOINT: 1346 pipe->methods = &ehci_root_ctrl_methods; 1347 break; 1348 case UE_DIR_IN | EHCI_INTR_ENDPT: 1349 pipe->methods = &ehci_root_intr_methods; 1350 break; 1351 default: 1352 return (USBD_INVAL); 1353 } 1354 return (USBD_NORMAL_COMPLETION); 1355 } 1356 1357 /* XXX All this stuff is only valid for async. */ 1358 switch (dev->speed) { 1359 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1360 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1361 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1362 default: panic("ehci_open: bad device speed %d", dev->speed); 1363 } 1364 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1365 printf("%s: *** WARNING: opening low/full speed isoc device, " 1366 "this does not work yet.\n", 1367 USBDEVNAME(sc->sc_bus.bdev)); 1368 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1369 hshubaddr, hshubport)); 1370 return USBD_INVAL; 1371 } 1372 1373 naks = 8; /* XXX */ 1374 sqh = ehci_alloc_sqh(sc); 1375 if (sqh == NULL) 1376 return (USBD_NOMEM); 1377 /* qh_link filled when the QH is added */ 1378 sqh->qh.qh_endp = htole32( 1379 EHCI_QH_SET_ADDR(addr) | 1380 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1381 EHCI_QH_SET_EPS(speed) | 1382 EHCI_QH_DTC | 1383 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1384 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1385 EHCI_QH_CTL : 0) | 1386 EHCI_QH_SET_NRL(naks) 1387 ); 1388 sqh->qh.qh_endphub = htole32( 1389 EHCI_QH_SET_MULT(1) | 1390 EHCI_QH_SET_HUBA(hshubaddr) | 1391 EHCI_QH_SET_PORT(hshubport) | 1392 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1393 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1394 ); 1395 sqh->qh.qh_curqtd = EHCI_NULL; 1396 /* Fill the overlay qTD */ 1397 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1398 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1399 sqh->qh.qh_qtd.qtd_status = htole32(0); 1400 1401 epipe->sqh = sqh; 1402 1403 switch (xfertype) { 1404 case UE_CONTROL: 1405 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1406 0, &epipe->u.ctl.reqdma); 1407 #ifdef EHCI_DEBUG 1408 if (err) 1409 printf("ehci_open: usb_allocmem()=%d\n", err); 1410 #endif 1411 if (err) 1412 goto bad; 1413 pipe->methods = &ehci_device_ctrl_methods; 1414 s = splusb(); 1415 ehci_add_qh(sqh, sc->sc_async_head); 1416 splx(s); 1417 break; 1418 case UE_BULK: 1419 pipe->methods = &ehci_device_bulk_methods; 1420 s = splusb(); 1421 ehci_add_qh(sqh, sc->sc_async_head); 1422 splx(s); 1423 break; 1424 case UE_INTERRUPT: 1425 pipe->methods = &ehci_device_intr_methods; 1426 ival = pipe->interval; 1427 if (ival == USBD_DEFAULT_INTERVAL) { 1428 if (speed == EHCI_QH_SPEED_HIGH) { 1429 if (ed->bInterval > 16) { 1430 /* 1431 * illegal with high-speed, but there 1432 * were documentation bugs in the spec, 1433 * so be generous 1434 */ 1435 ival = 256; 1436 } else 1437 ival = (1 << (ed->bInterval - 1)) / 8; 1438 } else 1439 ival = ed->bInterval; 1440 } 1441 err = ehci_device_setintr(sc, sqh, ival); 1442 if (err) 1443 goto bad; 1444 break; 1445 case UE_ISOCHRONOUS: 1446 pipe->methods = &ehci_device_isoc_methods; 1447 /* FALLTHROUGH */ 1448 default: 1449 err = USBD_INVAL; 1450 goto bad; 1451 } 1452 return (USBD_NORMAL_COMPLETION); 1453 1454 bad: 1455 ehci_free_sqh(sc, sqh); 1456 return (err); 1457 } 1458 1459 /* 1460 * Add an ED to the schedule. Called at splusb(). 1461 */ 1462 void 1463 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1464 { 1465 SPLUSBCHECK; 1466 1467 sqh->next = head->next; 1468 sqh->qh.qh_link = head->qh.qh_link; 1469 head->next = sqh; 1470 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1471 1472 #ifdef EHCI_DEBUG 1473 if (ehcidebug > 5) { 1474 printf("ehci_add_qh:\n"); 1475 ehci_dump_sqh(sqh); 1476 } 1477 #endif 1478 } 1479 1480 /* 1481 * Remove an ED from the schedule. Called at splusb(). 1482 */ 1483 void 1484 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1485 { 1486 ehci_soft_qh_t *p; 1487 1488 SPLUSBCHECK; 1489 /* XXX */ 1490 for (p = head; p != NULL && p->next != sqh; p = p->next) 1491 ; 1492 if (p == NULL) 1493 panic("ehci_rem_qh: ED not found"); 1494 p->next = sqh->next; 1495 p->qh.qh_link = sqh->qh.qh_link; 1496 1497 ehci_sync_hc(sc); 1498 } 1499 1500 void 1501 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1502 { 1503 int i; 1504 u_int32_t status; 1505 1506 /* Save toggle bit and ping status. */ 1507 status = sqh->qh.qh_qtd.qtd_status & 1508 htole32(EHCI_QTD_TOGGLE_MASK | 1509 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1510 /* Set HALTED to make hw leave it alone. */ 1511 sqh->qh.qh_qtd.qtd_status = 1512 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1513 sqh->qh.qh_curqtd = 0; 1514 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1515 sqh->qh.qh_qtd.qtd_altnext = 0; 1516 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1517 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1518 sqh->sqtd = sqtd; 1519 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1520 sqh->qh.qh_qtd.qtd_status = status; 1521 } 1522 1523 /* 1524 * Ensure that the HC has released all references to the QH. We do this 1525 * by asking for a Async Advance Doorbell interrupt and then we wait for 1526 * the interrupt. 1527 * To make this easier we first obtain exclusive use of the doorbell. 1528 */ 1529 void 1530 ehci_sync_hc(ehci_softc_t *sc) 1531 { 1532 int s, error; 1533 1534 if (sc->sc_dying) { 1535 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1536 return; 1537 } 1538 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1539 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1540 s = splhardusb(); 1541 /* ask for doorbell */ 1542 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1543 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1544 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1545 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1546 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1547 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1548 splx(s); 1549 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1550 #ifdef DIAGNOSTIC 1551 if (error) 1552 printf("ehci_sync_hc: tsleep() = %d\n", error); 1553 #endif 1554 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1555 } 1556 1557 /***********/ 1558 1559 /* 1560 * Data structures and routines to emulate the root hub. 1561 */ 1562 Static usb_device_descriptor_t ehci_devd = { 1563 USB_DEVICE_DESCRIPTOR_SIZE, 1564 UDESC_DEVICE, /* type */ 1565 {0x00, 0x02}, /* USB version */ 1566 UDCLASS_HUB, /* class */ 1567 UDSUBCLASS_HUB, /* subclass */ 1568 UDPROTO_HSHUBSTT, /* protocol */ 1569 64, /* max packet */ 1570 {0},{0},{0x00,0x01}, /* device id */ 1571 1,2,0, /* string indicies */ 1572 1 /* # of configurations */ 1573 }; 1574 1575 Static const usb_device_qualifier_t ehci_odevd = { 1576 USB_DEVICE_DESCRIPTOR_SIZE, 1577 UDESC_DEVICE_QUALIFIER, /* type */ 1578 {0x00, 0x02}, /* USB version */ 1579 UDCLASS_HUB, /* class */ 1580 UDSUBCLASS_HUB, /* subclass */ 1581 UDPROTO_FSHUB, /* protocol */ 1582 64, /* max packet */ 1583 1, /* # of configurations */ 1584 0 1585 }; 1586 1587 Static const usb_config_descriptor_t ehci_confd = { 1588 USB_CONFIG_DESCRIPTOR_SIZE, 1589 UDESC_CONFIG, 1590 {USB_CONFIG_DESCRIPTOR_SIZE + 1591 USB_INTERFACE_DESCRIPTOR_SIZE + 1592 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1593 1, 1594 1, 1595 0, 1596 UC_ATTR_MBO | UC_SELF_POWERED, 1597 0 /* max power */ 1598 }; 1599 1600 Static const usb_interface_descriptor_t ehci_ifcd = { 1601 USB_INTERFACE_DESCRIPTOR_SIZE, 1602 UDESC_INTERFACE, 1603 0, 1604 0, 1605 1, 1606 UICLASS_HUB, 1607 UISUBCLASS_HUB, 1608 UIPROTO_HSHUBSTT, 1609 0 1610 }; 1611 1612 Static const usb_endpoint_descriptor_t ehci_endpd = { 1613 USB_ENDPOINT_DESCRIPTOR_SIZE, 1614 UDESC_ENDPOINT, 1615 UE_DIR_IN | EHCI_INTR_ENDPT, 1616 UE_INTERRUPT, 1617 {8, 0}, /* max packet */ 1618 12 1619 }; 1620 1621 Static const usb_hub_descriptor_t ehci_hubd = { 1622 USB_HUB_DESCRIPTOR_SIZE, 1623 UDESC_HUB, 1624 0, 1625 {0,0}, 1626 0, 1627 0, 1628 {""}, 1629 {""}, 1630 }; 1631 1632 /* 1633 * Simulate a hardware hub by handling all the necessary requests. 1634 */ 1635 Static usbd_status 1636 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1637 { 1638 usbd_status err; 1639 1640 /* Insert last in queue. */ 1641 err = usb_insert_transfer(xfer); 1642 if (err) 1643 return (err); 1644 1645 /* Pipe isn't running, start first */ 1646 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1647 } 1648 1649 Static usbd_status 1650 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1651 { 1652 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1653 usb_device_request_t *req; 1654 void *buf = NULL; 1655 int port, i; 1656 int s, len, value, index, l, totlen = 0; 1657 usb_port_status_t ps; 1658 usb_hub_descriptor_t hubd; 1659 usbd_status err; 1660 u_int32_t v; 1661 1662 if (sc->sc_dying) 1663 return (USBD_IOERROR); 1664 1665 #ifdef DIAGNOSTIC 1666 if (!(xfer->rqflags & URQ_REQUEST)) 1667 /* XXX panic */ 1668 return (USBD_INVAL); 1669 #endif 1670 req = &xfer->request; 1671 1672 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1673 req->bmRequestType, req->bRequest)); 1674 1675 len = UGETW(req->wLength); 1676 value = UGETW(req->wValue); 1677 index = UGETW(req->wIndex); 1678 1679 if (len != 0) 1680 buf = KERNADDR(&xfer->dmabuf, 0); 1681 1682 #define C(x,y) ((x) | ((y) << 8)) 1683 switch(C(req->bRequest, req->bmRequestType)) { 1684 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1685 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1686 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1687 /* 1688 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1689 * for the integrated root hub. 1690 */ 1691 break; 1692 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1693 if (len > 0) { 1694 *(u_int8_t *)buf = sc->sc_conf; 1695 totlen = 1; 1696 } 1697 break; 1698 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1699 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1700 if (len == 0) 1701 break; 1702 switch(value >> 8) { 1703 case UDESC_DEVICE: 1704 if ((value & 0xff) != 0) { 1705 err = USBD_IOERROR; 1706 goto ret; 1707 } 1708 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1709 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1710 memcpy(buf, &ehci_devd, l); 1711 break; 1712 /* 1713 * We can't really operate at another speed, but the spec says 1714 * we need this descriptor. 1715 */ 1716 case UDESC_DEVICE_QUALIFIER: 1717 if ((value & 0xff) != 0) { 1718 err = USBD_IOERROR; 1719 goto ret; 1720 } 1721 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1722 memcpy(buf, &ehci_odevd, l); 1723 break; 1724 /* 1725 * We can't really operate at another speed, but the spec says 1726 * we need this descriptor. 1727 */ 1728 case UDESC_OTHER_SPEED_CONFIGURATION: 1729 case UDESC_CONFIG: 1730 if ((value & 0xff) != 0) { 1731 err = USBD_IOERROR; 1732 goto ret; 1733 } 1734 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1735 memcpy(buf, &ehci_confd, l); 1736 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1737 value >> 8; 1738 buf = (char *)buf + l; 1739 len -= l; 1740 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1741 totlen += l; 1742 memcpy(buf, &ehci_ifcd, l); 1743 buf = (char *)buf + l; 1744 len -= l; 1745 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1746 totlen += l; 1747 memcpy(buf, &ehci_endpd, l); 1748 break; 1749 case UDESC_STRING: 1750 #define sd ((usb_string_descriptor_t *)buf) 1751 switch (value & 0xff) { 1752 case 0: /* Language table */ 1753 totlen = usb_makelangtbl(sd, len); 1754 break; 1755 case 1: /* Vendor */ 1756 totlen = usb_makestrdesc(sd, len, 1757 sc->sc_vendor); 1758 break; 1759 case 2: /* Product */ 1760 totlen = usb_makestrdesc(sd, len, 1761 "EHCI root hub"); 1762 break; 1763 } 1764 #undef sd 1765 break; 1766 default: 1767 err = USBD_IOERROR; 1768 goto ret; 1769 } 1770 break; 1771 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1772 if (len > 0) { 1773 *(u_int8_t *)buf = 0; 1774 totlen = 1; 1775 } 1776 break; 1777 case C(UR_GET_STATUS, UT_READ_DEVICE): 1778 if (len > 1) { 1779 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1780 totlen = 2; 1781 } 1782 break; 1783 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1784 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1785 if (len > 1) { 1786 USETW(((usb_status_t *)buf)->wStatus, 0); 1787 totlen = 2; 1788 } 1789 break; 1790 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1791 if (value >= USB_MAX_DEVICES) { 1792 err = USBD_IOERROR; 1793 goto ret; 1794 } 1795 sc->sc_addr = value; 1796 break; 1797 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1798 if (value != 0 && value != 1) { 1799 err = USBD_IOERROR; 1800 goto ret; 1801 } 1802 sc->sc_conf = value; 1803 break; 1804 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1805 break; 1806 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1807 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1808 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1809 err = USBD_IOERROR; 1810 goto ret; 1811 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1812 break; 1813 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1814 break; 1815 /* Hub requests */ 1816 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1817 break; 1818 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1819 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1820 "port=%d feature=%d\n", 1821 index, value)); 1822 if (index < 1 || index > sc->sc_noport) { 1823 err = USBD_IOERROR; 1824 goto ret; 1825 } 1826 port = EHCI_PORTSC(index); 1827 v = EOREAD4(sc, port); 1828 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1829 v &= ~EHCI_PS_CLEAR; 1830 switch(value) { 1831 case UHF_PORT_ENABLE: 1832 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1833 break; 1834 case UHF_PORT_SUSPEND: 1835 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1836 break; 1837 case UHF_PORT_POWER: 1838 if (sc->sc_hasppc) 1839 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1840 break; 1841 case UHF_PORT_TEST: 1842 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1843 "%d\n", index)); 1844 break; 1845 case UHF_PORT_INDICATOR: 1846 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1847 "%d\n", index)); 1848 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1849 break; 1850 case UHF_C_PORT_CONNECTION: 1851 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1852 break; 1853 case UHF_C_PORT_ENABLE: 1854 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1855 break; 1856 case UHF_C_PORT_SUSPEND: 1857 /* how? */ 1858 break; 1859 case UHF_C_PORT_OVER_CURRENT: 1860 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1861 break; 1862 case UHF_C_PORT_RESET: 1863 sc->sc_isreset[index] = 0; 1864 break; 1865 default: 1866 err = USBD_IOERROR; 1867 goto ret; 1868 } 1869 #if 0 1870 switch(value) { 1871 case UHF_C_PORT_CONNECTION: 1872 case UHF_C_PORT_ENABLE: 1873 case UHF_C_PORT_SUSPEND: 1874 case UHF_C_PORT_OVER_CURRENT: 1875 case UHF_C_PORT_RESET: 1876 default: 1877 break; 1878 } 1879 #endif 1880 break; 1881 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1882 if (len == 0) 1883 break; 1884 if ((value & 0xff) != 0) { 1885 err = USBD_IOERROR; 1886 goto ret; 1887 } 1888 hubd = ehci_hubd; 1889 hubd.bNbrPorts = sc->sc_noport; 1890 v = EOREAD4(sc, EHCI_HCSPARAMS); 1891 USETW(hubd.wHubCharacteristics, 1892 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1893 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1894 ? UHD_PORT_IND : 0); 1895 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1896 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1897 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1898 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1899 l = min(len, hubd.bDescLength); 1900 totlen = l; 1901 memcpy(buf, &hubd, l); 1902 break; 1903 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1904 if (len != 4) { 1905 err = USBD_IOERROR; 1906 goto ret; 1907 } 1908 memset(buf, 0, len); /* ? XXX */ 1909 totlen = len; 1910 break; 1911 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1912 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1913 index)); 1914 if (index < 1 || index > sc->sc_noport) { 1915 err = USBD_IOERROR; 1916 goto ret; 1917 } 1918 if (len != 4) { 1919 err = USBD_IOERROR; 1920 goto ret; 1921 } 1922 v = EOREAD4(sc, EHCI_PORTSC(index)); 1923 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1924 v)); 1925 i = UPS_HIGH_SPEED; 1926 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1927 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1928 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1929 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1930 if (v & EHCI_PS_PR) i |= UPS_RESET; 1931 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1932 USETW(ps.wPortStatus, i); 1933 i = 0; 1934 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1935 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1936 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1937 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1938 USETW(ps.wPortChange, i); 1939 l = min(len, sizeof ps); 1940 memcpy(buf, &ps, l); 1941 totlen = l; 1942 break; 1943 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1944 err = USBD_IOERROR; 1945 goto ret; 1946 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1947 break; 1948 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1949 if (index < 1 || index > sc->sc_noport) { 1950 err = USBD_IOERROR; 1951 goto ret; 1952 } 1953 port = EHCI_PORTSC(index); 1954 v = EOREAD4(sc, port); 1955 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1956 v &= ~EHCI_PS_CLEAR; 1957 switch(value) { 1958 case UHF_PORT_ENABLE: 1959 EOWRITE4(sc, port, v | EHCI_PS_PE); 1960 break; 1961 case UHF_PORT_SUSPEND: 1962 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1963 break; 1964 case UHF_PORT_RESET: 1965 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1966 index)); 1967 if (EHCI_PS_IS_LOWSPEED(v)) { 1968 /* Low speed device, give up ownership. */ 1969 ehci_disown(sc, index, 1); 1970 break; 1971 } 1972 /* Start reset sequence. */ 1973 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1974 EOWRITE4(sc, port, v | EHCI_PS_PR); 1975 /* Wait for reset to complete. */ 1976 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1977 if (sc->sc_dying) { 1978 err = USBD_IOERROR; 1979 goto ret; 1980 } 1981 /* Terminate reset sequence. */ 1982 EOWRITE4(sc, port, v); 1983 /* Wait for HC to complete reset. */ 1984 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1985 if (sc->sc_dying) { 1986 err = USBD_IOERROR; 1987 goto ret; 1988 } 1989 v = EOREAD4(sc, port); 1990 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1991 if (v & EHCI_PS_PR) { 1992 printf("%s: port reset timeout\n", 1993 USBDEVNAME(sc->sc_bus.bdev)); 1994 return (USBD_TIMEOUT); 1995 } 1996 if (!(v & EHCI_PS_PE)) { 1997 /* Not a high speed device, give up ownership.*/ 1998 ehci_disown(sc, index, 0); 1999 break; 2000 } 2001 sc->sc_isreset[index] = 1; 2002 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2003 index, v)); 2004 break; 2005 case UHF_PORT_POWER: 2006 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2007 "%d (has PPC = %d)\n", index, 2008 sc->sc_hasppc)); 2009 if (sc->sc_hasppc) 2010 EOWRITE4(sc, port, v | EHCI_PS_PP); 2011 break; 2012 case UHF_PORT_TEST: 2013 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2014 "%d\n", index)); 2015 break; 2016 case UHF_PORT_INDICATOR: 2017 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2018 "%d\n", index)); 2019 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2020 break; 2021 default: 2022 err = USBD_IOERROR; 2023 goto ret; 2024 } 2025 break; 2026 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2027 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2028 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2029 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2030 break; 2031 default: 2032 err = USBD_IOERROR; 2033 goto ret; 2034 } 2035 xfer->actlen = totlen; 2036 err = USBD_NORMAL_COMPLETION; 2037 ret: 2038 xfer->status = err; 2039 s = splusb(); 2040 usb_transfer_complete(xfer); 2041 splx(s); 2042 return (USBD_IN_PROGRESS); 2043 } 2044 2045 void 2046 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2047 { 2048 int port; 2049 u_int32_t v; 2050 2051 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2052 #ifdef DIAGNOSTIC 2053 if (sc->sc_npcomp != 0) { 2054 int i = (index-1) / sc->sc_npcomp; 2055 if (i >= sc->sc_ncomp) 2056 printf("%s: strange port\n", 2057 USBDEVNAME(sc->sc_bus.bdev)); 2058 else 2059 printf("%s: handing over %s speed device on " 2060 "port %d to %s\n", 2061 USBDEVNAME(sc->sc_bus.bdev), 2062 lowspeed ? "low" : "full", 2063 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2064 } else { 2065 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2066 } 2067 #endif 2068 port = EHCI_PORTSC(index); 2069 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2070 EOWRITE4(sc, port, v | EHCI_PS_PO); 2071 } 2072 2073 /* Abort a root control request. */ 2074 Static void 2075 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2076 { 2077 /* Nothing to do, all transfers are synchronous. */ 2078 } 2079 2080 /* Close the root pipe. */ 2081 Static void 2082 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2083 { 2084 DPRINTF(("ehci_root_ctrl_close\n")); 2085 /* Nothing to do. */ 2086 } 2087 2088 void 2089 ehci_root_intr_done(usbd_xfer_handle xfer) 2090 { 2091 xfer->hcpriv = NULL; 2092 } 2093 2094 Static usbd_status 2095 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2096 { 2097 usbd_status err; 2098 2099 /* Insert last in queue. */ 2100 err = usb_insert_transfer(xfer); 2101 if (err) 2102 return (err); 2103 2104 /* Pipe isn't running, start first */ 2105 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2106 } 2107 2108 Static usbd_status 2109 ehci_root_intr_start(usbd_xfer_handle xfer) 2110 { 2111 usbd_pipe_handle pipe = xfer->pipe; 2112 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2113 2114 if (sc->sc_dying) 2115 return (USBD_IOERROR); 2116 2117 sc->sc_intrxfer = xfer; 2118 2119 return (USBD_IN_PROGRESS); 2120 } 2121 2122 /* Abort a root interrupt request. */ 2123 Static void 2124 ehci_root_intr_abort(usbd_xfer_handle xfer) 2125 { 2126 int s; 2127 2128 if (xfer->pipe->intrxfer == xfer) { 2129 DPRINTF(("ehci_root_intr_abort: remove\n")); 2130 xfer->pipe->intrxfer = NULL; 2131 } 2132 xfer->status = USBD_CANCELLED; 2133 s = splusb(); 2134 usb_transfer_complete(xfer); 2135 splx(s); 2136 } 2137 2138 /* Close the root pipe. */ 2139 Static void 2140 ehci_root_intr_close(usbd_pipe_handle pipe) 2141 { 2142 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2143 2144 DPRINTF(("ehci_root_intr_close\n")); 2145 2146 sc->sc_intrxfer = NULL; 2147 } 2148 2149 void 2150 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2151 { 2152 xfer->hcpriv = NULL; 2153 } 2154 2155 /************************/ 2156 2157 ehci_soft_qh_t * 2158 ehci_alloc_sqh(ehci_softc_t *sc) 2159 { 2160 ehci_soft_qh_t *sqh; 2161 usbd_status err; 2162 int i, offs; 2163 usb_dma_t dma; 2164 2165 if (sc->sc_freeqhs == NULL) { 2166 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2167 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2168 EHCI_PAGE_SIZE, &dma); 2169 #ifdef EHCI_DEBUG 2170 if (err) 2171 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2172 #endif 2173 if (err) 2174 return (NULL); 2175 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2176 offs = i * EHCI_SQH_SIZE; 2177 sqh = KERNADDR(&dma, offs); 2178 sqh->physaddr = DMAADDR(&dma, offs); 2179 sqh->next = sc->sc_freeqhs; 2180 sc->sc_freeqhs = sqh; 2181 } 2182 } 2183 sqh = sc->sc_freeqhs; 2184 sc->sc_freeqhs = sqh->next; 2185 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2186 sqh->next = NULL; 2187 return (sqh); 2188 } 2189 2190 void 2191 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2192 { 2193 sqh->next = sc->sc_freeqhs; 2194 sc->sc_freeqhs = sqh; 2195 } 2196 2197 ehci_soft_qtd_t * 2198 ehci_alloc_sqtd(ehci_softc_t *sc) 2199 { 2200 ehci_soft_qtd_t *sqtd; 2201 usbd_status err; 2202 int i, offs; 2203 usb_dma_t dma; 2204 int s; 2205 2206 if (sc->sc_freeqtds == NULL) { 2207 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2208 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2209 EHCI_PAGE_SIZE, &dma); 2210 #ifdef EHCI_DEBUG 2211 if (err) 2212 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2213 #endif 2214 if (err) 2215 return (NULL); 2216 s = splusb(); 2217 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2218 offs = i * EHCI_SQTD_SIZE; 2219 sqtd = KERNADDR(&dma, offs); 2220 sqtd->physaddr = DMAADDR(&dma, offs); 2221 sqtd->nextqtd = sc->sc_freeqtds; 2222 sc->sc_freeqtds = sqtd; 2223 } 2224 splx(s); 2225 } 2226 2227 s = splusb(); 2228 sqtd = sc->sc_freeqtds; 2229 sc->sc_freeqtds = sqtd->nextqtd; 2230 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2231 sqtd->nextqtd = NULL; 2232 sqtd->xfer = NULL; 2233 splx(s); 2234 2235 return (sqtd); 2236 } 2237 2238 void 2239 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2240 { 2241 int s; 2242 2243 s = splusb(); 2244 sqtd->nextqtd = sc->sc_freeqtds; 2245 sc->sc_freeqtds = sqtd; 2246 splx(s); 2247 } 2248 2249 usbd_status 2250 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2251 int alen, int rd, usbd_xfer_handle xfer, 2252 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2253 { 2254 ehci_soft_qtd_t *next, *cur; 2255 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2256 u_int32_t qtdstatus; 2257 int len, curlen, mps; 2258 int i, tog; 2259 usb_dma_t *dma = &xfer->dmabuf; 2260 u_int16_t flags = xfer->flags; 2261 2262 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2263 2264 len = alen; 2265 dataphys = DMAADDR(dma, 0); 2266 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2267 qtdstatus = EHCI_QTD_ACTIVE | 2268 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2269 EHCI_QTD_SET_CERR(3) 2270 /* IOC set below */ 2271 /* BYTES set below */ 2272 ; 2273 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2274 tog = epipe->nexttoggle; 2275 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2276 2277 cur = ehci_alloc_sqtd(sc); 2278 *sp = cur; 2279 if (cur == NULL) 2280 goto nomem; 2281 for (;;) { 2282 dataphyspage = EHCI_PAGE(dataphys); 2283 /* The EHCI hardware can handle at most 5 pages. */ 2284 if (dataphyslastpage - dataphyspage < 2285 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2286 /* we can handle it in this QTD */ 2287 curlen = len; 2288 } else { 2289 /* must use multiple TDs, fill as much as possible. */ 2290 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2291 EHCI_PAGE_OFFSET(dataphys); 2292 #ifdef DIAGNOSTIC 2293 if (curlen > len) { 2294 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2295 "len=0x%x offs=0x%x\n", curlen, len, 2296 EHCI_PAGE_OFFSET(dataphys)); 2297 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2298 dataphyslastpage, dataphyspage, 2299 dataphys); 2300 curlen = len; 2301 } 2302 #endif 2303 /* the length must be a multiple of the max size */ 2304 curlen -= curlen % mps; 2305 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2306 "curlen=%d\n", curlen)); 2307 #ifdef DIAGNOSTIC 2308 if (curlen == 0) 2309 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2310 #endif 2311 } 2312 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2313 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2314 dataphys, dataphyslastpage, 2315 len, curlen)); 2316 len -= curlen; 2317 2318 /* 2319 * Allocate another transfer if there's more data left, 2320 * or if force last short transfer flag is set and we're 2321 * allocating a multiple of the max packet size. 2322 */ 2323 if (len != 0 || 2324 ((curlen % mps) == 0 && !rd && curlen != 0 && 2325 (flags & USBD_FORCE_SHORT_XFER))) { 2326 next = ehci_alloc_sqtd(sc); 2327 if (next == NULL) 2328 goto nomem; 2329 nextphys = htole32(next->physaddr); 2330 } else { 2331 next = NULL; 2332 nextphys = EHCI_NULL; 2333 } 2334 2335 for (i = 0; i * EHCI_PAGE_SIZE < 2336 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2337 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2338 if (i != 0) /* use offset only in first buffer */ 2339 a = EHCI_PAGE(a); 2340 cur->qtd.qtd_buffer[i] = htole32(a); 2341 cur->qtd.qtd_buffer_hi[i] = 0; 2342 #ifdef DIAGNOSTIC 2343 if (i >= EHCI_QTD_NBUFFERS) { 2344 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2345 goto nomem; 2346 } 2347 #endif 2348 } 2349 cur->nextqtd = next; 2350 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2351 cur->qtd.qtd_status = 2352 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2353 cur->xfer = xfer; 2354 cur->len = curlen; 2355 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2356 dataphys, dataphys + curlen)); 2357 /* adjust the toggle based on the number of packets in this 2358 qtd */ 2359 if (((curlen + mps - 1) / mps) & 1) { 2360 tog ^= 1; 2361 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2362 } 2363 if (next == NULL) 2364 break; 2365 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2366 dataphys += curlen; 2367 cur = next; 2368 } 2369 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2370 *ep = cur; 2371 epipe->nexttoggle = tog; 2372 2373 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2374 *sp, *ep)); 2375 2376 return (USBD_NORMAL_COMPLETION); 2377 2378 nomem: 2379 /* XXX free chain */ 2380 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2381 return (USBD_NOMEM); 2382 } 2383 2384 Static void 2385 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2386 ehci_soft_qtd_t *sqtdend) 2387 { 2388 ehci_soft_qtd_t *p; 2389 int i; 2390 2391 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2392 sqtd, sqtdend)); 2393 2394 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2395 p = sqtd->nextqtd; 2396 ehci_free_sqtd(sc, sqtd); 2397 } 2398 } 2399 2400 /****************/ 2401 2402 /* 2403 * Close a reqular pipe. 2404 * Assumes that there are no pending transactions. 2405 */ 2406 void 2407 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2408 { 2409 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2410 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2411 ehci_soft_qh_t *sqh = epipe->sqh; 2412 int s; 2413 2414 s = splusb(); 2415 ehci_rem_qh(sc, sqh, head); 2416 splx(s); 2417 ehci_free_sqh(sc, epipe->sqh); 2418 } 2419 2420 /* 2421 * Abort a device request. 2422 * If this routine is called at splusb() it guarantees that the request 2423 * will be removed from the hardware scheduling and that the callback 2424 * for it will be called with USBD_CANCELLED status. 2425 * It's impossible to guarantee that the requested transfer will not 2426 * have happened since the hardware runs concurrently. 2427 * If the transaction has already happened we rely on the ordinary 2428 * interrupt processing to process it. 2429 * XXX This is most probably wrong. 2430 */ 2431 void 2432 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2433 { 2434 #define exfer EXFER(xfer) 2435 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2436 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2437 ehci_soft_qh_t *sqh = epipe->sqh; 2438 ehci_soft_qtd_t *sqtd; 2439 ehci_physaddr_t cur; 2440 u_int32_t qhstatus; 2441 int s; 2442 int hit; 2443 int wake; 2444 2445 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2446 2447 if (sc->sc_dying) { 2448 /* If we're dying, just do the software part. */ 2449 s = splusb(); 2450 xfer->status = status; /* make software ignore it */ 2451 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2452 usb_transfer_complete(xfer); 2453 splx(s); 2454 return; 2455 } 2456 2457 if (xfer->device->bus->intr_context || !curproc) 2458 panic("ehci_abort_xfer: not in process context"); 2459 2460 /* 2461 * If an abort is already in progress then just wait for it to 2462 * complete and return. 2463 */ 2464 if (xfer->hcflags & UXFER_ABORTING) { 2465 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2466 #ifdef DIAGNOSTIC 2467 if (status == USBD_TIMEOUT) 2468 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2469 #endif 2470 /* Override the status which might be USBD_TIMEOUT. */ 2471 xfer->status = status; 2472 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2473 xfer->hcflags |= UXFER_ABORTWAIT; 2474 while (xfer->hcflags & UXFER_ABORTING) 2475 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2476 return; 2477 } 2478 xfer->hcflags |= UXFER_ABORTING; 2479 2480 /* 2481 * Step 1: Make interrupt routine and hardware ignore xfer. 2482 */ 2483 s = splusb(); 2484 xfer->status = status; /* make software ignore it */ 2485 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2486 qhstatus = sqh->qh.qh_qtd.qtd_status; 2487 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2488 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2489 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2490 if (sqtd == exfer->sqtdend) 2491 break; 2492 } 2493 splx(s); 2494 2495 /* 2496 * Step 2: Wait until we know hardware has finished any possible 2497 * use of the xfer. Also make sure the soft interrupt routine 2498 * has run. 2499 */ 2500 ehci_sync_hc(sc); 2501 s = splusb(); 2502 #ifdef USB_USE_SOFTINTR 2503 sc->sc_softwake = 1; 2504 #endif /* USB_USE_SOFTINTR */ 2505 usb_schedsoftintr(&sc->sc_bus); 2506 #ifdef USB_USE_SOFTINTR 2507 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2508 #endif /* USB_USE_SOFTINTR */ 2509 splx(s); 2510 2511 /* 2512 * Step 3: Remove any vestiges of the xfer from the hardware. 2513 * The complication here is that the hardware may have executed 2514 * beyond the xfer we're trying to abort. So as we're scanning 2515 * the TDs of this xfer we check if the hardware points to 2516 * any of them. 2517 */ 2518 s = splusb(); /* XXX why? */ 2519 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2520 hit = 0; 2521 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2522 hit |= cur == sqtd->physaddr; 2523 if (sqtd == exfer->sqtdend) 2524 break; 2525 } 2526 sqtd = sqtd->nextqtd; 2527 /* Zap curqtd register if hardware pointed inside the xfer. */ 2528 if (hit && sqtd != NULL) { 2529 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2530 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2531 sqh->qh.qh_qtd.qtd_status = qhstatus; 2532 } else { 2533 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2534 } 2535 2536 /* 2537 * Step 4: Execute callback. 2538 */ 2539 #ifdef DIAGNOSTIC 2540 exfer->isdone = 1; 2541 #endif 2542 wake = xfer->hcflags & UXFER_ABORTWAIT; 2543 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2544 usb_transfer_complete(xfer); 2545 if (wake) 2546 wakeup(&xfer->hcflags); 2547 2548 splx(s); 2549 #undef exfer 2550 } 2551 2552 void 2553 ehci_timeout(void *addr) 2554 { 2555 struct ehci_xfer *exfer = addr; 2556 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2557 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2558 2559 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2560 #ifdef USB_DEBUG 2561 if (ehcidebug > 1) 2562 usbd_dump_pipe(exfer->xfer.pipe); 2563 #endif 2564 2565 if (sc->sc_dying) { 2566 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2567 return; 2568 } 2569 2570 /* Execute the abort in a process context. */ 2571 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2572 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2573 USB_TASKQ_HC); 2574 } 2575 2576 void 2577 ehci_timeout_task(void *addr) 2578 { 2579 usbd_xfer_handle xfer = addr; 2580 int s; 2581 2582 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2583 2584 s = splusb(); 2585 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2586 splx(s); 2587 } 2588 2589 /************************/ 2590 2591 Static usbd_status 2592 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2593 { 2594 usbd_status err; 2595 2596 /* Insert last in queue. */ 2597 err = usb_insert_transfer(xfer); 2598 if (err) 2599 return (err); 2600 2601 /* Pipe isn't running, start first */ 2602 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2603 } 2604 2605 Static usbd_status 2606 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2607 { 2608 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2609 usbd_status err; 2610 2611 if (sc->sc_dying) 2612 return (USBD_IOERROR); 2613 2614 #ifdef DIAGNOSTIC 2615 if (!(xfer->rqflags & URQ_REQUEST)) { 2616 /* XXX panic */ 2617 printf("ehci_device_ctrl_transfer: not a request\n"); 2618 return (USBD_INVAL); 2619 } 2620 #endif 2621 2622 err = ehci_device_request(xfer); 2623 if (err) 2624 return (err); 2625 2626 if (sc->sc_bus.use_polling) 2627 ehci_waitintr(sc, xfer); 2628 return (USBD_IN_PROGRESS); 2629 } 2630 2631 void 2632 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2633 { 2634 struct ehci_xfer *ex = EXFER(xfer); 2635 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2636 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2637 2638 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2639 2640 #ifdef DIAGNOSTIC 2641 if (!(xfer->rqflags & URQ_REQUEST)) { 2642 panic("ehci_ctrl_done: not a request"); 2643 } 2644 #endif 2645 2646 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2647 ehci_del_intr_list(ex); /* remove from active list */ 2648 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2649 } 2650 2651 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2652 } 2653 2654 /* Abort a device control request. */ 2655 Static void 2656 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2657 { 2658 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2659 ehci_abort_xfer(xfer, USBD_CANCELLED); 2660 } 2661 2662 /* Close a device control pipe. */ 2663 Static void 2664 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2665 { 2666 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2667 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2668 2669 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2670 ehci_close_pipe(pipe, sc->sc_async_head); 2671 } 2672 2673 usbd_status 2674 ehci_device_request(usbd_xfer_handle xfer) 2675 { 2676 #define exfer EXFER(xfer) 2677 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2678 usb_device_request_t *req = &xfer->request; 2679 usbd_device_handle dev = epipe->pipe.device; 2680 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2681 int addr = dev->address; 2682 ehci_soft_qtd_t *setup, *stat, *next; 2683 ehci_soft_qh_t *sqh; 2684 int isread; 2685 int len; 2686 usbd_status err; 2687 int s; 2688 2689 isread = req->bmRequestType & UT_READ; 2690 len = UGETW(req->wLength); 2691 2692 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2693 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2694 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2695 UGETW(req->wIndex), len, addr, 2696 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2697 2698 setup = ehci_alloc_sqtd(sc); 2699 if (setup == NULL) { 2700 err = USBD_NOMEM; 2701 goto bad1; 2702 } 2703 stat = ehci_alloc_sqtd(sc); 2704 if (stat == NULL) { 2705 err = USBD_NOMEM; 2706 goto bad2; 2707 } 2708 2709 sqh = epipe->sqh; 2710 epipe->u.ctl.length = len; 2711 2712 /* Update device address and length since they may have changed 2713 during the setup of the control pipe in usbd_new_device(). */ 2714 /* XXX This only needs to be done once, but it's too early in open. */ 2715 /* XXXX Should not touch ED here! */ 2716 sqh->qh.qh_endp = 2717 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2718 htole32( 2719 EHCI_QH_SET_ADDR(addr) | 2720 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2721 ); 2722 2723 /* Set up data transaction */ 2724 if (len != 0) { 2725 ehci_soft_qtd_t *end; 2726 2727 /* Start toggle at 1. */ 2728 epipe->nexttoggle = 1; 2729 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2730 &next, &end); 2731 if (err) 2732 goto bad3; 2733 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2734 end->nextqtd = stat; 2735 end->qtd.qtd_next = 2736 end->qtd.qtd_altnext = htole32(stat->physaddr); 2737 } else { 2738 next = stat; 2739 } 2740 2741 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2742 2743 /* Clear toggle */ 2744 setup->qtd.qtd_status = htole32( 2745 EHCI_QTD_ACTIVE | 2746 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2747 EHCI_QTD_SET_CERR(3) | 2748 EHCI_QTD_SET_TOGGLE(0) | 2749 EHCI_QTD_SET_BYTES(sizeof *req) 2750 ); 2751 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2752 setup->qtd.qtd_buffer_hi[0] = 0; 2753 setup->nextqtd = next; 2754 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2755 setup->xfer = xfer; 2756 setup->len = sizeof *req; 2757 2758 stat->qtd.qtd_status = htole32( 2759 EHCI_QTD_ACTIVE | 2760 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2761 EHCI_QTD_SET_CERR(3) | 2762 EHCI_QTD_SET_TOGGLE(1) | 2763 EHCI_QTD_IOC 2764 ); 2765 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2766 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2767 stat->nextqtd = NULL; 2768 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2769 stat->xfer = xfer; 2770 stat->len = 0; 2771 2772 #ifdef EHCI_DEBUG 2773 if (ehcidebug > 5) { 2774 DPRINTF(("ehci_device_request:\n")); 2775 ehci_dump_sqh(sqh); 2776 ehci_dump_sqtds(setup); 2777 } 2778 #endif 2779 2780 exfer->sqtdstart = setup; 2781 exfer->sqtdend = stat; 2782 #ifdef DIAGNOSTIC 2783 if (!exfer->isdone) { 2784 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2785 } 2786 exfer->isdone = 0; 2787 #endif 2788 2789 /* Insert qTD in QH list. */ 2790 s = splusb(); 2791 ehci_set_qh_qtd(sqh, setup); 2792 if (xfer->timeout && !sc->sc_bus.use_polling) { 2793 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2794 ehci_timeout, xfer); 2795 } 2796 ehci_add_intr_list(sc, exfer); 2797 xfer->status = USBD_IN_PROGRESS; 2798 splx(s); 2799 2800 #ifdef EHCI_DEBUG 2801 if (ehcidebug > 10) { 2802 DPRINTF(("ehci_device_request: status=%x\n", 2803 EOREAD4(sc, EHCI_USBSTS))); 2804 delay(10000); 2805 ehci_dump_regs(sc); 2806 ehci_dump_sqh(sc->sc_async_head); 2807 ehci_dump_sqh(sqh); 2808 ehci_dump_sqtds(setup); 2809 } 2810 #endif 2811 2812 return (USBD_NORMAL_COMPLETION); 2813 2814 bad3: 2815 ehci_free_sqtd(sc, stat); 2816 bad2: 2817 ehci_free_sqtd(sc, setup); 2818 bad1: 2819 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2820 xfer->status = err; 2821 usb_transfer_complete(xfer); 2822 return (err); 2823 #undef exfer 2824 } 2825 2826 /* 2827 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2828 * qTD status, or miss signalling occasionally under heavy load. If the host 2829 * machine is too fast, we we can miss transaction completion - when we scan 2830 * the active list the transaction still seems to be active. This generally 2831 * exhibits itself as a umass stall that never recovers. 2832 * 2833 * We work around this behaviour by setting up this callback after any softintr 2834 * that completes with transactions still pending, giving us another chance to 2835 * check for completion after the writeback has taken place. 2836 */ 2837 void 2838 ehci_intrlist_timeout(void *arg) 2839 { 2840 ehci_softc_t *sc = arg; 2841 int s = splusb(); 2842 2843 DPRINTF(("ehci_intrlist_timeout\n")); 2844 usb_schedsoftintr(&sc->sc_bus); 2845 2846 splx(s); 2847 } 2848 2849 /************************/ 2850 2851 Static usbd_status 2852 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2853 { 2854 usbd_status err; 2855 2856 /* Insert last in queue. */ 2857 err = usb_insert_transfer(xfer); 2858 if (err) 2859 return (err); 2860 2861 /* Pipe isn't running, start first */ 2862 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2863 } 2864 2865 usbd_status 2866 ehci_device_bulk_start(usbd_xfer_handle xfer) 2867 { 2868 #define exfer EXFER(xfer) 2869 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2870 usbd_device_handle dev = epipe->pipe.device; 2871 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2872 ehci_soft_qtd_t *data, *dataend; 2873 ehci_soft_qh_t *sqh; 2874 usbd_status err; 2875 int len, isread, endpt; 2876 int s; 2877 2878 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2879 xfer, xfer->length, xfer->flags)); 2880 2881 if (sc->sc_dying) 2882 return (USBD_IOERROR); 2883 2884 #ifdef DIAGNOSTIC 2885 if (xfer->rqflags & URQ_REQUEST) 2886 panic("ehci_device_bulk_start: a request"); 2887 #endif 2888 2889 len = xfer->length; 2890 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2891 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2892 sqh = epipe->sqh; 2893 2894 epipe->u.bulk.length = len; 2895 2896 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2897 &dataend); 2898 if (err) { 2899 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2900 xfer->status = err; 2901 usb_transfer_complete(xfer); 2902 return (err); 2903 } 2904 2905 #ifdef EHCI_DEBUG 2906 if (ehcidebug > 5) { 2907 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2908 ehci_dump_sqh(sqh); 2909 ehci_dump_sqtds(data); 2910 } 2911 #endif 2912 2913 /* Set up interrupt info. */ 2914 exfer->sqtdstart = data; 2915 exfer->sqtdend = dataend; 2916 #ifdef DIAGNOSTIC 2917 if (!exfer->isdone) { 2918 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2919 } 2920 exfer->isdone = 0; 2921 #endif 2922 2923 s = splusb(); 2924 ehci_set_qh_qtd(sqh, data); 2925 if (xfer->timeout && !sc->sc_bus.use_polling) { 2926 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2927 ehci_timeout, xfer); 2928 } 2929 ehci_add_intr_list(sc, exfer); 2930 xfer->status = USBD_IN_PROGRESS; 2931 splx(s); 2932 2933 #ifdef EHCI_DEBUG 2934 if (ehcidebug > 10) { 2935 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2936 delay(10000); 2937 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2938 ehci_dump_regs(sc); 2939 #if 0 2940 printf("async_head:\n"); 2941 ehci_dump_sqh(sc->sc_async_head); 2942 #endif 2943 printf("sqh:\n"); 2944 ehci_dump_sqh(sqh); 2945 ehci_dump_sqtds(data); 2946 } 2947 #endif 2948 2949 if (sc->sc_bus.use_polling) 2950 ehci_waitintr(sc, xfer); 2951 2952 return (USBD_IN_PROGRESS); 2953 #undef exfer 2954 } 2955 2956 Static void 2957 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2958 { 2959 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2960 ehci_abort_xfer(xfer, USBD_CANCELLED); 2961 } 2962 2963 /* 2964 * Close a device bulk pipe. 2965 */ 2966 Static void 2967 ehci_device_bulk_close(usbd_pipe_handle pipe) 2968 { 2969 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2970 2971 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2972 ehci_close_pipe(pipe, sc->sc_async_head); 2973 } 2974 2975 void 2976 ehci_device_bulk_done(usbd_xfer_handle xfer) 2977 { 2978 struct ehci_xfer *ex = EXFER(xfer); 2979 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2980 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2981 2982 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2983 xfer, xfer->actlen)); 2984 2985 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2986 ehci_del_intr_list(ex); /* remove from active list */ 2987 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2988 } 2989 2990 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2991 } 2992 2993 /************************/ 2994 2995 Static usbd_status 2996 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2997 { 2998 struct ehci_soft_islot *isp; 2999 int islot, lev; 3000 3001 /* Find a poll rate that is large enough. */ 3002 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3003 if (EHCI_ILEV_IVAL(lev) <= ival) 3004 break; 3005 3006 /* Pick an interrupt slot at the right level. */ 3007 /* XXX could do better than picking at random */ 3008 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3009 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3010 3011 sqh->islot = islot; 3012 isp = &sc->sc_islots[islot]; 3013 ehci_add_qh(sqh, isp->sqh); 3014 3015 return (USBD_NORMAL_COMPLETION); 3016 } 3017 3018 Static usbd_status 3019 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3020 { 3021 usbd_status err; 3022 3023 /* Insert last in queue. */ 3024 err = usb_insert_transfer(xfer); 3025 if (err) 3026 return (err); 3027 3028 /* 3029 * Pipe isn't running (otherwise err would be USBD_INPROG), 3030 * so start it first. 3031 */ 3032 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3033 } 3034 3035 Static usbd_status 3036 ehci_device_intr_start(usbd_xfer_handle xfer) 3037 { 3038 #define exfer EXFER(xfer) 3039 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3040 usbd_device_handle dev = xfer->pipe->device; 3041 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3042 ehci_soft_qtd_t *data, *dataend; 3043 ehci_soft_qh_t *sqh; 3044 usbd_status err; 3045 int len, isread, endpt; 3046 int s; 3047 3048 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3049 xfer, xfer->length, xfer->flags)); 3050 3051 if (sc->sc_dying) 3052 return (USBD_IOERROR); 3053 3054 #ifdef DIAGNOSTIC 3055 if (xfer->rqflags & URQ_REQUEST) 3056 panic("ehci_device_intr_start: a request"); 3057 #endif 3058 3059 len = xfer->length; 3060 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3061 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3062 sqh = epipe->sqh; 3063 3064 epipe->u.intr.length = len; 3065 3066 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3067 &dataend); 3068 if (err) { 3069 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3070 xfer->status = err; 3071 usb_transfer_complete(xfer); 3072 return (err); 3073 } 3074 3075 #ifdef EHCI_DEBUG 3076 if (ehcidebug > 5) { 3077 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3078 ehci_dump_sqh(sqh); 3079 ehci_dump_sqtds(data); 3080 } 3081 #endif 3082 3083 /* Set up interrupt info. */ 3084 exfer->sqtdstart = data; 3085 exfer->sqtdend = dataend; 3086 #ifdef DIAGNOSTIC 3087 if (!exfer->isdone) { 3088 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3089 } 3090 exfer->isdone = 0; 3091 #endif 3092 3093 s = splusb(); 3094 ehci_set_qh_qtd(sqh, data); 3095 if (xfer->timeout && !sc->sc_bus.use_polling) { 3096 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3097 ehci_timeout, xfer); 3098 } 3099 ehci_add_intr_list(sc, exfer); 3100 xfer->status = USBD_IN_PROGRESS; 3101 splx(s); 3102 3103 #ifdef EHCI_DEBUG 3104 if (ehcidebug > 10) { 3105 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3106 delay(10000); 3107 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3108 ehci_dump_regs(sc); 3109 printf("sqh:\n"); 3110 ehci_dump_sqh(sqh); 3111 ehci_dump_sqtds(data); 3112 } 3113 #endif 3114 3115 if (sc->sc_bus.use_polling) 3116 ehci_waitintr(sc, xfer); 3117 3118 return (USBD_IN_PROGRESS); 3119 #undef exfer 3120 } 3121 3122 Static void 3123 ehci_device_intr_abort(usbd_xfer_handle xfer) 3124 { 3125 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3126 if (xfer->pipe->intrxfer == xfer) { 3127 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3128 xfer->pipe->intrxfer = NULL; 3129 } 3130 ehci_abort_xfer(xfer, USBD_CANCELLED); 3131 } 3132 3133 Static void 3134 ehci_device_intr_close(usbd_pipe_handle pipe) 3135 { 3136 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3137 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3138 struct ehci_soft_islot *isp; 3139 3140 isp = &sc->sc_islots[epipe->sqh->islot]; 3141 ehci_close_pipe(pipe, isp->sqh); 3142 } 3143 3144 Static void 3145 ehci_device_intr_done(usbd_xfer_handle xfer) 3146 { 3147 #define exfer EXFER(xfer) 3148 struct ehci_xfer *ex = EXFER(xfer); 3149 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3150 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3151 ehci_soft_qtd_t *data, *dataend; 3152 ehci_soft_qh_t *sqh; 3153 usbd_status err; 3154 int len, isread, endpt, s; 3155 3156 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3157 xfer, xfer->actlen)); 3158 3159 if (xfer->pipe->repeat) { 3160 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3161 3162 len = epipe->u.intr.length; 3163 xfer->length = len; 3164 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3165 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3166 sqh = epipe->sqh; 3167 3168 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3169 &data, &dataend); 3170 if (err) { 3171 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3172 xfer->status = err; 3173 return; 3174 } 3175 3176 /* Set up interrupt info. */ 3177 exfer->sqtdstart = data; 3178 exfer->sqtdend = dataend; 3179 #ifdef DIAGNOSTIC 3180 if (!exfer->isdone) { 3181 printf("ehci_device_intr_done: not done, ex=%p\n", 3182 exfer); 3183 } 3184 exfer->isdone = 0; 3185 #endif 3186 3187 s = splusb(); 3188 ehci_set_qh_qtd(sqh, data); 3189 if (xfer->timeout && !sc->sc_bus.use_polling) { 3190 usb_callout(xfer->timeout_handle, 3191 mstohz(xfer->timeout), ehci_timeout, xfer); 3192 } 3193 splx(s); 3194 3195 xfer->status = USBD_IN_PROGRESS; 3196 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3197 ehci_del_intr_list(ex); /* remove from active list */ 3198 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3199 } 3200 #undef exfer 3201 } 3202 3203 /************************/ 3204 3205 Static usbd_status 3206 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3207 { 3208 return USBD_IOERROR; 3209 } 3210 Static usbd_status 3211 ehci_device_isoc_start(usbd_xfer_handle xfer) 3212 { 3213 return USBD_IOERROR; 3214 } 3215 Static void 3216 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3217 { 3218 } 3219 Static void 3220 ehci_device_isoc_close(usbd_pipe_handle pipe) 3221 { 3222 } 3223 Static void 3224 ehci_device_isoc_done(usbd_xfer_handle xfer) 3225 { 3226 } 3227
Indexes created Tue Sep 23 07:09:52 GMT 2025