ehci.c revision 1.133
1 /* $NetBSD: ehci.c,v 1.133 2008/03/07 22:32:52 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.133 2008/03/07 22:32:52 dyoung Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 #include <dev/usb/usbroothub_subr.h> 91 92 #ifdef EHCI_DEBUG 93 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 94 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 95 int ehcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 struct ehci_pipe { 105 struct usbd_pipe pipe; 106 int nexttoggle; 107 108 ehci_soft_qh_t *sqh; 109 union { 110 ehci_soft_qtd_t *qtd; 111 /* ehci_soft_itd_t *itd; */ 112 } tail; 113 union { 114 /* Control pipe */ 115 struct { 116 usb_dma_t reqdma; 117 u_int length; 118 } ctl; 119 /* Interrupt pipe */ 120 struct { 121 u_int length; 122 } intr; 123 /* Bulk pipe */ 124 struct { 125 u_int length; 126 } bulk; 127 /* Iso pipe */ 128 /* XXX */ 129 } u; 130 }; 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 189 Static void ehci_disown(ehci_softc_t *, int, int); 190 191 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 192 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 193 194 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 195 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 196 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 197 ehci_softc_t *, int, int, usbd_xfer_handle, 198 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 199 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 200 ehci_soft_qtd_t *); 201 202 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 203 204 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 205 int ival); 206 207 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 208 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 209 ehci_soft_qh_t *); 210 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 211 Static void ehci_sync_hc(ehci_softc_t *); 212 213 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 214 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 #ifdef EHCI_DEBUG 217 Static void ehci_dump_regs(ehci_softc_t *); 218 void ehci_dump(void); 219 Static ehci_softc_t *theehci; 220 Static void ehci_dump_link(ehci_link_t, int); 221 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 222 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 223 Static void ehci_dump_qtd(ehci_qtd_t *); 224 Static void ehci_dump_sqh(ehci_soft_qh_t *); 225 #ifdef DIAGNOSTIC 226 Static void ehci_dump_exfer(struct ehci_xfer *); 227 #endif 228 #endif 229 230 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 231 232 #define EHCI_INTR_ENDPT 1 233 234 #define ehci_add_intr_list(sc, ex) \ 235 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 236 #define ehci_del_intr_list(ex) \ 237 do { \ 238 LIST_REMOVE((ex), inext); \ 239 (ex)->inext.le_prev = NULL; \ 240 } while (0) 241 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 242 243 Static const struct usbd_bus_methods ehci_bus_methods = { 244 ehci_open, 245 ehci_softintr, 246 ehci_poll, 247 ehci_allocm, 248 ehci_freem, 249 ehci_allocx, 250 ehci_freex, 251 }; 252 253 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 254 ehci_root_ctrl_transfer, 255 ehci_root_ctrl_start, 256 ehci_root_ctrl_abort, 257 ehci_root_ctrl_close, 258 ehci_noop, 259 ehci_root_ctrl_done, 260 }; 261 262 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 263 ehci_root_intr_transfer, 264 ehci_root_intr_start, 265 ehci_root_intr_abort, 266 ehci_root_intr_close, 267 ehci_noop, 268 ehci_root_intr_done, 269 }; 270 271 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 272 ehci_device_ctrl_transfer, 273 ehci_device_ctrl_start, 274 ehci_device_ctrl_abort, 275 ehci_device_ctrl_close, 276 ehci_noop, 277 ehci_device_ctrl_done, 278 }; 279 280 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 281 ehci_device_intr_transfer, 282 ehci_device_intr_start, 283 ehci_device_intr_abort, 284 ehci_device_intr_close, 285 ehci_device_clear_toggle, 286 ehci_device_intr_done, 287 }; 288 289 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 290 ehci_device_bulk_transfer, 291 ehci_device_bulk_start, 292 ehci_device_bulk_abort, 293 ehci_device_bulk_close, 294 ehci_device_clear_toggle, 295 ehci_device_bulk_done, 296 }; 297 298 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 299 ehci_device_isoc_transfer, 300 ehci_device_isoc_start, 301 ehci_device_isoc_abort, 302 ehci_device_isoc_close, 303 ehci_noop, 304 ehci_device_isoc_done, 305 }; 306 307 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 308 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 309 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 310 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 311 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 312 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 313 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 314 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 315 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 316 }; 317 318 usbd_status 319 ehci_init(ehci_softc_t *sc) 320 { 321 u_int32_t vers, sparams, cparams, hcr; 322 u_int i; 323 usbd_status err; 324 ehci_soft_qh_t *sqh; 325 u_int ncomp; 326 327 DPRINTF(("ehci_init: start\n")); 328 #ifdef EHCI_DEBUG 329 theehci = sc; 330 #endif 331 332 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 333 334 vers = EREAD2(sc, EHCI_HCIVERSION); 335 aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 336 vers >> 8, vers & 0xff); 337 338 sparams = EREAD4(sc, EHCI_HCSPARAMS); 339 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 340 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 341 ncomp = EHCI_HCS_N_CC(sparams); 342 if (ncomp != sc->sc_ncomp) { 343 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 344 USBDEVNAME(sc->sc_bus.bdev), 345 ncomp, sc->sc_ncomp); 346 #if NOHCI == 0 || NUHCI == 0 347 aprint_error("%s: ohci or uhci probably not configured\n", 348 USBDEVNAME(sc->sc_bus.bdev)); 349 #endif 350 if (ncomp < sc->sc_ncomp) 351 sc->sc_ncomp = ncomp; 352 } 353 if (sc->sc_ncomp > 0) { 354 aprint_normal("%s: companion controller%s, %d port%s each:", 355 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 356 EHCI_HCS_N_PCC(sparams), 357 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 358 for (i = 0; i < sc->sc_ncomp; i++) 359 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 360 aprint_normal("\n"); 361 } 362 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 363 cparams = EREAD4(sc, EHCI_HCCPARAMS); 364 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 365 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 366 367 if (EHCI_HCC_64BIT(cparams)) { 368 /* MUST clear segment register if 64 bit capable. */ 369 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 370 } 371 372 sc->sc_bus.usbrev = USBREV_2_0; 373 374 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 375 USB_MEM_RESERVE); 376 377 /* Reset the controller */ 378 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 379 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 380 usb_delay_ms(&sc->sc_bus, 1); 381 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 382 for (i = 0; i < 100; i++) { 383 usb_delay_ms(&sc->sc_bus, 1); 384 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 385 if (!hcr) 386 break; 387 } 388 if (hcr) { 389 aprint_error("%s: reset timeout\n", 390 USBDEVNAME(sc->sc_bus.bdev)); 391 return (USBD_IOERROR); 392 } 393 394 /* XXX need proper intr scheduling */ 395 sc->sc_rand = 96; 396 397 /* frame list size at default, read back what we got and use that */ 398 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 399 case 0: sc->sc_flsize = 1024; break; 400 case 1: sc->sc_flsize = 512; break; 401 case 2: sc->sc_flsize = 256; break; 402 case 3: return (USBD_IOERROR); 403 } 404 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 405 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 406 if (err) 407 return (err); 408 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 409 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 410 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 411 412 /* Set up the bus struct. */ 413 sc->sc_bus.methods = &ehci_bus_methods; 414 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 415 416 sc->sc_eintrs = EHCI_NORMAL_INTRS; 417 418 /* 419 * Allocate the interrupt dummy QHs. These are arranged to give poll 420 * intervals that are powers of 2 times 1ms. 421 */ 422 for (i = 0; i < EHCI_INTRQHS; i++) { 423 sqh = ehci_alloc_sqh(sc); 424 if (sqh == NULL) { 425 err = USBD_NOMEM; 426 goto bad1; 427 } 428 sc->sc_islots[i].sqh = sqh; 429 } 430 for (i = 0; i < EHCI_INTRQHS; i++) { 431 sqh = sc->sc_islots[i].sqh; 432 if (i == 0) { 433 /* The last (1ms) QH terminates. */ 434 sqh->qh.qh_link = EHCI_NULL; 435 sqh->next = NULL; 436 } else { 437 /* Otherwise the next QH has half the poll interval */ 438 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 439 sqh->qh.qh_link = htole32(sqh->next->physaddr | 440 EHCI_LINK_QH); 441 } 442 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 443 sqh->qh.qh_curqtd = EHCI_NULL; 444 sqh->next = NULL; 445 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 446 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 447 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 448 sqh->sqtd = NULL; 449 } 450 /* Point the frame list at the last level (128ms). */ 451 for (i = 0; i < sc->sc_flsize; i++) { 452 int j; 453 454 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 455 revbits[i & (EHCI_MAX_POLLRATE-1)]; 456 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 457 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 458 i)].sqh->physaddr); 459 } 460 461 /* Allocate dummy QH that starts the async list. */ 462 sqh = ehci_alloc_sqh(sc); 463 if (sqh == NULL) { 464 err = USBD_NOMEM; 465 goto bad1; 466 } 467 /* Fill the QH */ 468 sqh->qh.qh_endp = 469 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 470 sqh->qh.qh_link = 471 htole32(sqh->physaddr | EHCI_LINK_QH); 472 sqh->qh.qh_curqtd = EHCI_NULL; 473 sqh->next = NULL; 474 /* Fill the overlay qTD */ 475 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 476 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 477 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 478 sqh->sqtd = NULL; 479 #ifdef EHCI_DEBUG 480 if (ehcidebug) { 481 ehci_dump_sqh(sqh); 482 } 483 #endif 484 485 /* Point to async list */ 486 sc->sc_async_head = sqh; 487 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 488 489 usb_callout_init(sc->sc_tmo_intrlist); 490 491 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 492 493 /* Turn on controller */ 494 EOWRITE4(sc, EHCI_USBCMD, 495 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 496 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 497 EHCI_CMD_ASE | 498 EHCI_CMD_PSE | 499 EHCI_CMD_RS); 500 501 /* Take over port ownership */ 502 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 503 504 for (i = 0; i < 100; i++) { 505 usb_delay_ms(&sc->sc_bus, 1); 506 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 507 if (!hcr) 508 break; 509 } 510 if (hcr) { 511 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 512 return (USBD_IOERROR); 513 } 514 515 /* Enable interrupts */ 516 DPRINTFN(1,("ehci_init: enabling\n")); 517 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 518 519 return (USBD_NORMAL_COMPLETION); 520 521 #if 0 522 bad2: 523 ehci_free_sqh(sc, sc->sc_async_head); 524 #endif 525 bad1: 526 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 527 return (err); 528 } 529 530 int 531 ehci_intr(void *v) 532 { 533 ehci_softc_t *sc = v; 534 535 if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 536 return (0); 537 538 /* If we get an interrupt while polling, then just ignore it. */ 539 if (sc->sc_bus.use_polling) { 540 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 541 542 if (intrs) 543 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 544 #ifdef DIAGNOSTIC 545 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 546 #endif 547 return (0); 548 } 549 550 return (ehci_intr1(sc)); 551 } 552 553 Static int 554 ehci_intr1(ehci_softc_t *sc) 555 { 556 u_int32_t intrs, eintrs; 557 558 DPRINTFN(20,("ehci_intr1: enter\n")); 559 560 /* In case the interrupt occurs before initialization has completed. */ 561 if (sc == NULL) { 562 #ifdef DIAGNOSTIC 563 printf("ehci_intr1: sc == NULL\n"); 564 #endif 565 return (0); 566 } 567 568 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 569 if (!intrs) 570 return (0); 571 572 eintrs = intrs & sc->sc_eintrs; 573 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 574 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 575 (u_int)eintrs)); 576 if (!eintrs) 577 return (0); 578 579 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 580 sc->sc_bus.intr_context++; 581 sc->sc_bus.no_intrs++; 582 if (eintrs & EHCI_STS_IAA) { 583 DPRINTF(("ehci_intr1: door bell\n")); 584 wakeup(&sc->sc_async_head); 585 eintrs &= ~EHCI_STS_IAA; 586 } 587 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 588 DPRINTFN(5,("ehci_intr1: %s %s\n", 589 eintrs & EHCI_STS_INT ? "INT" : "", 590 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 591 usb_schedsoftintr(&sc->sc_bus); 592 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 593 } 594 if (eintrs & EHCI_STS_HSE) { 595 printf("%s: unrecoverable error, controller halted\n", 596 USBDEVNAME(sc->sc_bus.bdev)); 597 /* XXX what else */ 598 } 599 if (eintrs & EHCI_STS_PCD) { 600 ehci_pcd(sc, sc->sc_intrxfer); 601 eintrs &= ~EHCI_STS_PCD; 602 } 603 604 sc->sc_bus.intr_context--; 605 606 if (eintrs != 0) { 607 /* Block unprocessed interrupts. */ 608 sc->sc_eintrs &= ~eintrs; 609 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 610 printf("%s: blocking intrs 0x%x\n", 611 USBDEVNAME(sc->sc_bus.bdev), eintrs); 612 } 613 614 return (1); 615 } 616 617 618 void 619 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 620 { 621 usbd_pipe_handle pipe; 622 u_char *p; 623 int i, m; 624 625 if (xfer == NULL) { 626 /* Just ignore the change. */ 627 return; 628 } 629 630 pipe = xfer->pipe; 631 632 p = KERNADDR(&xfer->dmabuf, 0); 633 m = min(sc->sc_noport, xfer->length * 8 - 1); 634 memset(p, 0, xfer->length); 635 for (i = 1; i <= m; i++) { 636 /* Pick out CHANGE bits from the status reg. */ 637 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 638 p[i/8] |= 1 << (i%8); 639 } 640 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 641 xfer->actlen = xfer->length; 642 xfer->status = USBD_NORMAL_COMPLETION; 643 644 usb_transfer_complete(xfer); 645 } 646 647 void 648 ehci_softintr(void *v) 649 { 650 ehci_softc_t *sc = v; 651 struct ehci_xfer *ex, *nextex; 652 653 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 654 sc->sc_bus.intr_context)); 655 656 sc->sc_bus.intr_context++; 657 658 /* 659 * The only explanation I can think of for why EHCI is as brain dead 660 * as UHCI interrupt-wise is that Intel was involved in both. 661 * An interrupt just tells us that something is done, we have no 662 * clue what, so we need to scan through all active transfers. :-( 663 */ 664 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 665 nextex = LIST_NEXT(ex, inext); 666 ehci_check_intr(sc, ex); 667 } 668 669 /* Schedule a callout to catch any dropped transactions. */ 670 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 671 !LIST_EMPTY(&sc->sc_intrhead)) 672 usb_callout(sc->sc_tmo_intrlist, hz, 673 ehci_intrlist_timeout, sc); 674 675 #ifdef USB_USE_SOFTINTR 676 if (sc->sc_softwake) { 677 sc->sc_softwake = 0; 678 wakeup(&sc->sc_softwake); 679 } 680 #endif /* USB_USE_SOFTINTR */ 681 682 sc->sc_bus.intr_context--; 683 } 684 685 /* Check for an interrupt. */ 686 void 687 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 688 { 689 ehci_soft_qtd_t *sqtd, *lsqtd; 690 u_int32_t status; 691 692 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 693 694 if (ex->sqtdstart == NULL) { 695 printf("ehci_check_intr: sqtdstart=NULL\n"); 696 return; 697 } 698 lsqtd = ex->sqtdend; 699 #ifdef DIAGNOSTIC 700 if (lsqtd == NULL) { 701 printf("ehci_check_intr: lsqtd==0\n"); 702 return; 703 } 704 #endif 705 /* 706 * If the last TD is still active we need to check whether there 707 * is a an error somewhere in the middle, or whether there was a 708 * short packet (SPD and not ACTIVE). 709 */ 710 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 711 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 712 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 713 status = le32toh(sqtd->qtd.qtd_status); 714 /* If there's an active QTD the xfer isn't done. */ 715 if (status & EHCI_QTD_ACTIVE) 716 break; 717 /* Any kind of error makes the xfer done. */ 718 if (status & EHCI_QTD_HALTED) 719 goto done; 720 /* We want short packets, and it is short: it's done */ 721 if (EHCI_QTD_GET_BYTES(status) != 0) 722 goto done; 723 } 724 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 725 ex, ex->sqtdstart)); 726 return; 727 } 728 done: 729 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 730 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 731 ehci_idone(ex); 732 } 733 734 void 735 ehci_idone(struct ehci_xfer *ex) 736 { 737 usbd_xfer_handle xfer = &ex->xfer; 738 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 739 ehci_soft_qtd_t *sqtd, *lsqtd; 740 u_int32_t status = 0, nstatus = 0; 741 int actlen; 742 743 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 744 #ifdef DIAGNOSTIC 745 { 746 int s = splhigh(); 747 if (ex->isdone) { 748 splx(s); 749 #ifdef EHCI_DEBUG 750 printf("ehci_idone: ex is done!\n "); 751 ehci_dump_exfer(ex); 752 #else 753 printf("ehci_idone: ex=%p is done!\n", ex); 754 #endif 755 return; 756 } 757 ex->isdone = 1; 758 splx(s); 759 } 760 #endif 761 762 if (xfer->status == USBD_CANCELLED || 763 xfer->status == USBD_TIMEOUT) { 764 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 765 return; 766 } 767 768 #ifdef EHCI_DEBUG 769 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 770 if (ehcidebug > 10) 771 ehci_dump_sqtds(ex->sqtdstart); 772 #endif 773 774 /* The transfer is done, compute actual length and status. */ 775 lsqtd = ex->sqtdend; 776 actlen = 0; 777 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 778 nstatus = le32toh(sqtd->qtd.qtd_status); 779 if (nstatus & EHCI_QTD_ACTIVE) 780 break; 781 782 status = nstatus; 783 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 784 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 785 } 786 787 /* 788 * If there are left over TDs we need to update the toggle. 789 * The default pipe doesn't need it since control transfers 790 * start the toggle at 0 every time. 791 * For a short transfer we need to update the toggle for the missing 792 * packets within the qTD. 793 */ 794 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 795 xfer->pipe->device->default_pipe != xfer->pipe) { 796 DPRINTFN(2, ("ehci_idone: need toggle update " 797 "status=%08x nstatus=%08x\n", status, nstatus)); 798 #if 0 799 ehci_dump_sqh(epipe->sqh); 800 ehci_dump_sqtds(ex->sqtdstart); 801 #endif 802 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 803 } 804 805 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 806 xfer->length, actlen, status)); 807 xfer->actlen = actlen; 808 if (status & EHCI_QTD_HALTED) { 809 #ifdef EHCI_DEBUG 810 char sbuf[128]; 811 812 bitmask_snprintf((u_int32_t)status, 813 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 814 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 815 816 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 817 "status 0x%s\n", 818 xfer->pipe->device->address, 819 xfer->pipe->endpoint->edesc->bEndpointAddress, 820 sbuf)); 821 if (ehcidebug > 2) { 822 ehci_dump_sqh(epipe->sqh); 823 ehci_dump_sqtds(ex->sqtdstart); 824 } 825 #endif 826 /* low&full speed has an extra error flag */ 827 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 828 EHCI_QH_SPEED_HIGH) 829 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 830 else 831 status &= EHCI_QTD_STATERRS; 832 if (status == 0) /* no other errors means a stall */ 833 xfer->status = USBD_STALLED; 834 else 835 xfer->status = USBD_IOERROR; /* more info XXX */ 836 /* XXX need to reset TT on missed microframe */ 837 if (status & EHCI_QTD_MISSEDMICRO) { 838 ehci_softc_t *sc = (ehci_softc_t *) 839 xfer->pipe->device->bus; 840 841 printf("%s: missed microframe, TT reset not " 842 "implemented, hub might be inoperational\n", 843 USBDEVNAME(sc->sc_bus.bdev)); 844 } 845 } else { 846 xfer->status = USBD_NORMAL_COMPLETION; 847 } 848 849 usb_transfer_complete(xfer); 850 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 851 } 852 853 /* 854 * Wait here until controller claims to have an interrupt. 855 * Then call ehci_intr and return. Use timeout to avoid waiting 856 * too long. 857 */ 858 void 859 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 860 { 861 int timo; 862 u_int32_t intrs; 863 864 xfer->status = USBD_IN_PROGRESS; 865 for (timo = xfer->timeout; timo >= 0; timo--) { 866 usb_delay_ms(&sc->sc_bus, 1); 867 if (sc->sc_dying) 868 break; 869 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 870 sc->sc_eintrs; 871 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 872 #ifdef EHCI_DEBUG 873 if (ehcidebug > 15) 874 ehci_dump_regs(sc); 875 #endif 876 if (intrs) { 877 ehci_intr1(sc); 878 if (xfer->status != USBD_IN_PROGRESS) 879 return; 880 } 881 } 882 883 /* Timeout */ 884 DPRINTF(("ehci_waitintr: timeout\n")); 885 xfer->status = USBD_TIMEOUT; 886 usb_transfer_complete(xfer); 887 /* XXX should free TD */ 888 } 889 890 void 891 ehci_poll(struct usbd_bus *bus) 892 { 893 ehci_softc_t *sc = (ehci_softc_t *)bus; 894 #ifdef EHCI_DEBUG 895 static int last; 896 int new; 897 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 898 if (new != last) { 899 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 900 last = new; 901 } 902 #endif 903 904 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 905 ehci_intr1(sc); 906 } 907 908 void 909 ehci_childdet(device_t self, device_t child) 910 { 911 struct ehci_softc *sc = device_private(self); 912 913 KASSERT(sc->sc_child == child); 914 sc->sc_child = NULL; 915 } 916 917 int 918 ehci_detach(struct ehci_softc *sc, int flags) 919 { 920 int rv = 0; 921 922 if (sc->sc_child != NULL) 923 rv = config_detach(sc->sc_child, flags); 924 925 if (rv != 0) 926 return (rv); 927 928 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 929 930 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 931 932 /* XXX free other data structures XXX */ 933 mutex_destroy(&sc->sc_doorbell_lock); 934 935 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 936 937 return (rv); 938 } 939 940 941 int 942 ehci_activate(device_t self, enum devact act) 943 { 944 struct ehci_softc *sc = device_private(self); 945 int rv = 0; 946 947 switch (act) { 948 case DVACT_ACTIVATE: 949 return (EOPNOTSUPP); 950 951 case DVACT_DEACTIVATE: 952 sc->sc_dying = 1; 953 if (sc->sc_child != NULL) 954 rv = config_deactivate(sc->sc_child); 955 break; 956 } 957 return (rv); 958 } 959 960 /* 961 * Handle suspend/resume. 962 * 963 * We need to switch to polling mode here, because this routine is 964 * called from an interrupt context. This is all right since we 965 * are almost suspended anyway. 966 * 967 * Note that this power handler isn't to be registered directly; the 968 * bus glue needs to call out to it. 969 */ 970 bool 971 ehci_suspend(device_t dv PMF_FN_ARGS) 972 { 973 ehci_softc_t *sc = device_private(dv); 974 int i, s; 975 uint32_t cmd, hcr; 976 977 s = splhardusb(); 978 979 sc->sc_bus.use_polling++; 980 981 for (i = 1; i <= sc->sc_noport; i++) { 982 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 983 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 984 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 985 } 986 987 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 988 989 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 990 EOWRITE4(sc, EHCI_USBCMD, cmd); 991 992 for (i = 0; i < 100; i++) { 993 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 994 if (hcr == 0) 995 break; 996 997 usb_delay_ms(&sc->sc_bus, 1); 998 } 999 if (hcr != 0) 1000 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1001 1002 cmd &= ~EHCI_CMD_RS; 1003 EOWRITE4(sc, EHCI_USBCMD, cmd); 1004 1005 for (i = 0; i < 100; i++) { 1006 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1007 if (hcr == EHCI_STS_HCH) 1008 break; 1009 1010 usb_delay_ms(&sc->sc_bus, 1); 1011 } 1012 if (hcr != EHCI_STS_HCH) 1013 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1014 1015 sc->sc_bus.use_polling--; 1016 splx(s); 1017 1018 return true; 1019 } 1020 1021 bool 1022 ehci_resume(device_t dv PMF_FN_ARGS) 1023 { 1024 ehci_softc_t *sc = device_private(dv); 1025 int i; 1026 uint32_t cmd, hcr; 1027 1028 /* restore things in case the bios sucks */ 1029 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1030 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1031 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1032 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1033 1034 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE); 1035 1036 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1037 1038 hcr = 0; 1039 for (i = 1; i <= sc->sc_noport; i++) { 1040 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1041 if ((cmd & EHCI_PS_PO) == 0 && 1042 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1043 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1044 hcr = 1; 1045 } 1046 } 1047 1048 if (hcr) { 1049 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1050 1051 for (i = 1; i <= sc->sc_noport; i++) { 1052 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1053 if ((cmd & EHCI_PS_PO) == 0 && 1054 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1055 EOWRITE4(sc, EHCI_PORTSC(i), 1056 cmd & ~EHCI_PS_FPR); 1057 } 1058 } 1059 1060 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1061 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1062 1063 for (i = 0; i < 100; i++) { 1064 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1065 if (hcr != EHCI_STS_HCH) 1066 break; 1067 1068 usb_delay_ms(&sc->sc_bus, 1); 1069 } 1070 if (hcr == EHCI_STS_HCH) 1071 printf("%s: config timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 1072 1073 return true; 1074 } 1075 1076 /* 1077 * Shut down the controller when the system is going down. 1078 */ 1079 bool 1080 ehci_shutdown(device_t self, int flags) 1081 { 1082 ehci_softc_t *sc = device_private(self); 1083 1084 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1085 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1086 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1087 return true; 1088 } 1089 1090 usbd_status 1091 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1092 { 1093 struct ehci_softc *sc = (struct ehci_softc *)bus; 1094 usbd_status err; 1095 1096 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1097 if (err == USBD_NOMEM) 1098 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1099 #ifdef EHCI_DEBUG 1100 if (err) 1101 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1102 #endif 1103 return (err); 1104 } 1105 1106 void 1107 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1108 { 1109 struct ehci_softc *sc = (struct ehci_softc *)bus; 1110 1111 if (dma->block->flags & USB_DMA_RESERVE) { 1112 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1113 dma); 1114 return; 1115 } 1116 usb_freemem(&sc->sc_bus, dma); 1117 } 1118 1119 usbd_xfer_handle 1120 ehci_allocx(struct usbd_bus *bus) 1121 { 1122 struct ehci_softc *sc = (struct ehci_softc *)bus; 1123 usbd_xfer_handle xfer; 1124 1125 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1126 if (xfer != NULL) { 1127 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1128 #ifdef DIAGNOSTIC 1129 if (xfer->busy_free != XFER_FREE) { 1130 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1131 xfer->busy_free); 1132 } 1133 #endif 1134 } else { 1135 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1136 } 1137 if (xfer != NULL) { 1138 memset(xfer, 0, sizeof(struct ehci_xfer)); 1139 #ifdef DIAGNOSTIC 1140 EXFER(xfer)->isdone = 1; 1141 xfer->busy_free = XFER_BUSY; 1142 #endif 1143 } 1144 return (xfer); 1145 } 1146 1147 void 1148 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1149 { 1150 struct ehci_softc *sc = (struct ehci_softc *)bus; 1151 1152 #ifdef DIAGNOSTIC 1153 if (xfer->busy_free != XFER_BUSY) { 1154 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1155 xfer->busy_free); 1156 } 1157 xfer->busy_free = XFER_FREE; 1158 if (!EXFER(xfer)->isdone) { 1159 printf("ehci_freex: !isdone\n"); 1160 } 1161 #endif 1162 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1163 } 1164 1165 Static void 1166 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1167 { 1168 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1169 1170 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1171 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1172 #ifdef USB_DEBUG 1173 if (ehcidebug) 1174 usbd_dump_pipe(pipe); 1175 #endif 1176 epipe->nexttoggle = 0; 1177 } 1178 1179 Static void 1180 ehci_noop(usbd_pipe_handle pipe) 1181 { 1182 } 1183 1184 #ifdef EHCI_DEBUG 1185 void 1186 ehci_dump_regs(ehci_softc_t *sc) 1187 { 1188 int i; 1189 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1190 EOREAD4(sc, EHCI_USBCMD), 1191 EOREAD4(sc, EHCI_USBSTS), 1192 EOREAD4(sc, EHCI_USBINTR)); 1193 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1194 EOREAD4(sc, EHCI_FRINDEX), 1195 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1196 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1197 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1198 for (i = 1; i <= sc->sc_noport; i++) 1199 printf("port %d status=0x%08x\n", i, 1200 EOREAD4(sc, EHCI_PORTSC(i))); 1201 } 1202 1203 /* 1204 * Unused function - this is meant to be called from a kernel 1205 * debugger. 1206 */ 1207 void 1208 ehci_dump() 1209 { 1210 ehci_dump_regs(theehci); 1211 } 1212 1213 void 1214 ehci_dump_link(ehci_link_t link, int type) 1215 { 1216 link = le32toh(link); 1217 printf("0x%08x", link); 1218 if (link & EHCI_LINK_TERMINATE) 1219 printf("<T>"); 1220 else { 1221 printf("<"); 1222 if (type) { 1223 switch (EHCI_LINK_TYPE(link)) { 1224 case EHCI_LINK_ITD: printf("ITD"); break; 1225 case EHCI_LINK_QH: printf("QH"); break; 1226 case EHCI_LINK_SITD: printf("SITD"); break; 1227 case EHCI_LINK_FSTN: printf("FSTN"); break; 1228 } 1229 } 1230 printf(">"); 1231 } 1232 } 1233 1234 void 1235 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1236 { 1237 int i; 1238 u_int32_t stop; 1239 1240 stop = 0; 1241 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1242 ehci_dump_sqtd(sqtd); 1243 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1244 } 1245 if (sqtd) 1246 printf("dump aborted, too many TDs\n"); 1247 } 1248 1249 void 1250 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1251 { 1252 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1253 ehci_dump_qtd(&sqtd->qtd); 1254 } 1255 1256 void 1257 ehci_dump_qtd(ehci_qtd_t *qtd) 1258 { 1259 u_int32_t s; 1260 char sbuf[128]; 1261 1262 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1263 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1264 printf("\n"); 1265 s = le32toh(qtd->qtd_status); 1266 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1267 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1268 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1269 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1270 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1271 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1272 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1273 EHCI_QTD_GET_PID(s), sbuf); 1274 for (s = 0; s < 5; s++) 1275 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1276 } 1277 1278 void 1279 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1280 { 1281 ehci_qh_t *qh = &sqh->qh; 1282 u_int32_t endp, endphub; 1283 1284 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1285 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1286 endp = le32toh(qh->qh_endp); 1287 printf(" endp=0x%08x\n", endp); 1288 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1289 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1290 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1291 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1292 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1293 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1294 EHCI_QH_GET_NRL(endp)); 1295 endphub = le32toh(qh->qh_endphub); 1296 printf(" endphub=0x%08x\n", endphub); 1297 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1298 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1299 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1300 EHCI_QH_GET_MULT(endphub)); 1301 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1302 printf("Overlay qTD:\n"); 1303 ehci_dump_qtd(&qh->qh_qtd); 1304 } 1305 1306 #ifdef DIAGNOSTIC 1307 Static void 1308 ehci_dump_exfer(struct ehci_xfer *ex) 1309 { 1310 printf("ehci_dump_exfer: ex=%p\n", ex); 1311 } 1312 #endif 1313 #endif 1314 1315 usbd_status 1316 ehci_open(usbd_pipe_handle pipe) 1317 { 1318 usbd_device_handle dev = pipe->device; 1319 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1320 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1321 u_int8_t addr = dev->address; 1322 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1323 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1324 ehci_soft_qh_t *sqh; 1325 usbd_status err; 1326 int s; 1327 int ival, speed, naks; 1328 int hshubaddr, hshubport; 1329 1330 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1331 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1332 1333 if (dev->myhsport) { 1334 hshubaddr = dev->myhsport->parent->address; 1335 hshubport = dev->myhsport->portno; 1336 } else { 1337 hshubaddr = 0; 1338 hshubport = 0; 1339 } 1340 1341 if (sc->sc_dying) 1342 return (USBD_IOERROR); 1343 1344 epipe->nexttoggle = 0; 1345 1346 if (addr == sc->sc_addr) { 1347 switch (ed->bEndpointAddress) { 1348 case USB_CONTROL_ENDPOINT: 1349 pipe->methods = &ehci_root_ctrl_methods; 1350 break; 1351 case UE_DIR_IN | EHCI_INTR_ENDPT: 1352 pipe->methods = &ehci_root_intr_methods; 1353 break; 1354 default: 1355 return (USBD_INVAL); 1356 } 1357 return (USBD_NORMAL_COMPLETION); 1358 } 1359 1360 /* XXX All this stuff is only valid for async. */ 1361 switch (dev->speed) { 1362 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1363 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1364 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1365 default: panic("ehci_open: bad device speed %d", dev->speed); 1366 } 1367 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1368 printf("%s: *** WARNING: opening low/full speed isoc device, " 1369 "this does not work yet.\n", 1370 USBDEVNAME(sc->sc_bus.bdev)); 1371 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1372 hshubaddr, hshubport)); 1373 return USBD_INVAL; 1374 } 1375 1376 naks = 8; /* XXX */ 1377 sqh = ehci_alloc_sqh(sc); 1378 if (sqh == NULL) 1379 return (USBD_NOMEM); 1380 /* qh_link filled when the QH is added */ 1381 sqh->qh.qh_endp = htole32( 1382 EHCI_QH_SET_ADDR(addr) | 1383 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1384 EHCI_QH_SET_EPS(speed) | 1385 EHCI_QH_DTC | 1386 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1387 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1388 EHCI_QH_CTL : 0) | 1389 EHCI_QH_SET_NRL(naks) 1390 ); 1391 sqh->qh.qh_endphub = htole32( 1392 EHCI_QH_SET_MULT(1) | 1393 EHCI_QH_SET_HUBA(hshubaddr) | 1394 EHCI_QH_SET_PORT(hshubport) | 1395 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1396 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1397 ); 1398 sqh->qh.qh_curqtd = EHCI_NULL; 1399 /* Fill the overlay qTD */ 1400 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1401 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1402 sqh->qh.qh_qtd.qtd_status = htole32(0); 1403 1404 epipe->sqh = sqh; 1405 1406 switch (xfertype) { 1407 case UE_CONTROL: 1408 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1409 0, &epipe->u.ctl.reqdma); 1410 #ifdef EHCI_DEBUG 1411 if (err) 1412 printf("ehci_open: usb_allocmem()=%d\n", err); 1413 #endif 1414 if (err) 1415 goto bad; 1416 pipe->methods = &ehci_device_ctrl_methods; 1417 s = splusb(); 1418 ehci_add_qh(sqh, sc->sc_async_head); 1419 splx(s); 1420 break; 1421 case UE_BULK: 1422 pipe->methods = &ehci_device_bulk_methods; 1423 s = splusb(); 1424 ehci_add_qh(sqh, sc->sc_async_head); 1425 splx(s); 1426 break; 1427 case UE_INTERRUPT: 1428 pipe->methods = &ehci_device_intr_methods; 1429 ival = pipe->interval; 1430 if (ival == USBD_DEFAULT_INTERVAL) { 1431 if (speed == EHCI_QH_SPEED_HIGH) { 1432 if (ed->bInterval > 16) { 1433 /* 1434 * illegal with high-speed, but there 1435 * were documentation bugs in the spec, 1436 * so be generous 1437 */ 1438 ival = 256; 1439 } else 1440 ival = (1 << (ed->bInterval - 1)) / 8; 1441 } else 1442 ival = ed->bInterval; 1443 } 1444 err = ehci_device_setintr(sc, sqh, ival); 1445 if (err) 1446 goto bad; 1447 break; 1448 case UE_ISOCHRONOUS: 1449 pipe->methods = &ehci_device_isoc_methods; 1450 /* FALLTHROUGH */ 1451 default: 1452 err = USBD_INVAL; 1453 goto bad; 1454 } 1455 return (USBD_NORMAL_COMPLETION); 1456 1457 bad: 1458 ehci_free_sqh(sc, sqh); 1459 return (err); 1460 } 1461 1462 /* 1463 * Add an ED to the schedule. Called at splusb(). 1464 */ 1465 void 1466 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1467 { 1468 SPLUSBCHECK; 1469 1470 sqh->next = head->next; 1471 sqh->qh.qh_link = head->qh.qh_link; 1472 head->next = sqh; 1473 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1474 1475 #ifdef EHCI_DEBUG 1476 if (ehcidebug > 5) { 1477 printf("ehci_add_qh:\n"); 1478 ehci_dump_sqh(sqh); 1479 } 1480 #endif 1481 } 1482 1483 /* 1484 * Remove an ED from the schedule. Called at splusb(). 1485 */ 1486 void 1487 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1488 { 1489 ehci_soft_qh_t *p; 1490 1491 SPLUSBCHECK; 1492 /* XXX */ 1493 for (p = head; p != NULL && p->next != sqh; p = p->next) 1494 ; 1495 if (p == NULL) 1496 panic("ehci_rem_qh: ED not found"); 1497 p->next = sqh->next; 1498 p->qh.qh_link = sqh->qh.qh_link; 1499 1500 ehci_sync_hc(sc); 1501 } 1502 1503 void 1504 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1505 { 1506 int i; 1507 u_int32_t status; 1508 1509 /* Save toggle bit and ping status. */ 1510 status = sqh->qh.qh_qtd.qtd_status & 1511 htole32(EHCI_QTD_TOGGLE_MASK | 1512 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1513 /* Set HALTED to make hw leave it alone. */ 1514 sqh->qh.qh_qtd.qtd_status = 1515 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1516 sqh->qh.qh_curqtd = 0; 1517 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1518 sqh->qh.qh_qtd.qtd_altnext = 0; 1519 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1520 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1521 sqh->sqtd = sqtd; 1522 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1523 sqh->qh.qh_qtd.qtd_status = status; 1524 } 1525 1526 /* 1527 * Ensure that the HC has released all references to the QH. We do this 1528 * by asking for a Async Advance Doorbell interrupt and then we wait for 1529 * the interrupt. 1530 * To make this easier we first obtain exclusive use of the doorbell. 1531 */ 1532 void 1533 ehci_sync_hc(ehci_softc_t *sc) 1534 { 1535 int s, error; 1536 1537 if (sc->sc_dying) { 1538 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1539 return; 1540 } 1541 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1542 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1543 s = splhardusb(); 1544 /* ask for doorbell */ 1545 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1546 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1547 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1548 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1549 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1550 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1551 splx(s); 1552 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1553 #ifdef DIAGNOSTIC 1554 if (error) 1555 printf("ehci_sync_hc: tsleep() = %d\n", error); 1556 #endif 1557 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1558 } 1559 1560 /***********/ 1561 1562 /* 1563 * Data structures and routines to emulate the root hub. 1564 */ 1565 Static usb_device_descriptor_t ehci_devd = { 1566 USB_DEVICE_DESCRIPTOR_SIZE, 1567 UDESC_DEVICE, /* type */ 1568 {0x00, 0x02}, /* USB version */ 1569 UDCLASS_HUB, /* class */ 1570 UDSUBCLASS_HUB, /* subclass */ 1571 UDPROTO_HSHUBSTT, /* protocol */ 1572 64, /* max packet */ 1573 {0},{0},{0x00,0x01}, /* device id */ 1574 1,2,0, /* string indicies */ 1575 1 /* # of configurations */ 1576 }; 1577 1578 Static const usb_device_qualifier_t ehci_odevd = { 1579 USB_DEVICE_DESCRIPTOR_SIZE, 1580 UDESC_DEVICE_QUALIFIER, /* type */ 1581 {0x00, 0x02}, /* USB version */ 1582 UDCLASS_HUB, /* class */ 1583 UDSUBCLASS_HUB, /* subclass */ 1584 UDPROTO_FSHUB, /* protocol */ 1585 64, /* max packet */ 1586 1, /* # of configurations */ 1587 0 1588 }; 1589 1590 Static const usb_config_descriptor_t ehci_confd = { 1591 USB_CONFIG_DESCRIPTOR_SIZE, 1592 UDESC_CONFIG, 1593 {USB_CONFIG_DESCRIPTOR_SIZE + 1594 USB_INTERFACE_DESCRIPTOR_SIZE + 1595 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1596 1, 1597 1, 1598 0, 1599 UC_ATTR_MBO | UC_SELF_POWERED, 1600 0 /* max power */ 1601 }; 1602 1603 Static const usb_interface_descriptor_t ehci_ifcd = { 1604 USB_INTERFACE_DESCRIPTOR_SIZE, 1605 UDESC_INTERFACE, 1606 0, 1607 0, 1608 1, 1609 UICLASS_HUB, 1610 UISUBCLASS_HUB, 1611 UIPROTO_HSHUBSTT, 1612 0 1613 }; 1614 1615 Static const usb_endpoint_descriptor_t ehci_endpd = { 1616 USB_ENDPOINT_DESCRIPTOR_SIZE, 1617 UDESC_ENDPOINT, 1618 UE_DIR_IN | EHCI_INTR_ENDPT, 1619 UE_INTERRUPT, 1620 {8, 0}, /* max packet */ 1621 12 1622 }; 1623 1624 Static const usb_hub_descriptor_t ehci_hubd = { 1625 USB_HUB_DESCRIPTOR_SIZE, 1626 UDESC_HUB, 1627 0, 1628 {0,0}, 1629 0, 1630 0, 1631 {""}, 1632 {""}, 1633 }; 1634 1635 /* 1636 * Simulate a hardware hub by handling all the necessary requests. 1637 */ 1638 Static usbd_status 1639 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1640 { 1641 usbd_status err; 1642 1643 /* Insert last in queue. */ 1644 err = usb_insert_transfer(xfer); 1645 if (err) 1646 return (err); 1647 1648 /* Pipe isn't running, start first */ 1649 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1650 } 1651 1652 Static usbd_status 1653 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1654 { 1655 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1656 usb_device_request_t *req; 1657 void *buf = NULL; 1658 int port, i; 1659 int s, len, value, index, l, totlen = 0; 1660 usb_port_status_t ps; 1661 usb_hub_descriptor_t hubd; 1662 usbd_status err; 1663 u_int32_t v; 1664 1665 if (sc->sc_dying) 1666 return (USBD_IOERROR); 1667 1668 #ifdef DIAGNOSTIC 1669 if (!(xfer->rqflags & URQ_REQUEST)) 1670 /* XXX panic */ 1671 return (USBD_INVAL); 1672 #endif 1673 req = &xfer->request; 1674 1675 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1676 req->bmRequestType, req->bRequest)); 1677 1678 len = UGETW(req->wLength); 1679 value = UGETW(req->wValue); 1680 index = UGETW(req->wIndex); 1681 1682 if (len != 0) 1683 buf = KERNADDR(&xfer->dmabuf, 0); 1684 1685 #define C(x,y) ((x) | ((y) << 8)) 1686 switch(C(req->bRequest, req->bmRequestType)) { 1687 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1688 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1689 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1690 /* 1691 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1692 * for the integrated root hub. 1693 */ 1694 break; 1695 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1696 if (len > 0) { 1697 *(u_int8_t *)buf = sc->sc_conf; 1698 totlen = 1; 1699 } 1700 break; 1701 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1702 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1703 if (len == 0) 1704 break; 1705 switch(value >> 8) { 1706 case UDESC_DEVICE: 1707 if ((value & 0xff) != 0) { 1708 err = USBD_IOERROR; 1709 goto ret; 1710 } 1711 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1712 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1713 memcpy(buf, &ehci_devd, l); 1714 break; 1715 /* 1716 * We can't really operate at another speed, but the spec says 1717 * we need this descriptor. 1718 */ 1719 case UDESC_DEVICE_QUALIFIER: 1720 if ((value & 0xff) != 0) { 1721 err = USBD_IOERROR; 1722 goto ret; 1723 } 1724 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1725 memcpy(buf, &ehci_odevd, l); 1726 break; 1727 /* 1728 * We can't really operate at another speed, but the spec says 1729 * we need this descriptor. 1730 */ 1731 case UDESC_OTHER_SPEED_CONFIGURATION: 1732 case UDESC_CONFIG: 1733 if ((value & 0xff) != 0) { 1734 err = USBD_IOERROR; 1735 goto ret; 1736 } 1737 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1738 memcpy(buf, &ehci_confd, l); 1739 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1740 value >> 8; 1741 buf = (char *)buf + l; 1742 len -= l; 1743 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1744 totlen += l; 1745 memcpy(buf, &ehci_ifcd, l); 1746 buf = (char *)buf + l; 1747 len -= l; 1748 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1749 totlen += l; 1750 memcpy(buf, &ehci_endpd, l); 1751 break; 1752 case UDESC_STRING: 1753 #define sd ((usb_string_descriptor_t *)buf) 1754 switch (value & 0xff) { 1755 case 0: /* Language table */ 1756 totlen = usb_makelangtbl(sd, len); 1757 break; 1758 case 1: /* Vendor */ 1759 totlen = usb_makestrdesc(sd, len, 1760 sc->sc_vendor); 1761 break; 1762 case 2: /* Product */ 1763 totlen = usb_makestrdesc(sd, len, 1764 "EHCI root hub"); 1765 break; 1766 } 1767 #undef sd 1768 break; 1769 default: 1770 err = USBD_IOERROR; 1771 goto ret; 1772 } 1773 break; 1774 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1775 if (len > 0) { 1776 *(u_int8_t *)buf = 0; 1777 totlen = 1; 1778 } 1779 break; 1780 case C(UR_GET_STATUS, UT_READ_DEVICE): 1781 if (len > 1) { 1782 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1783 totlen = 2; 1784 } 1785 break; 1786 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1787 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1788 if (len > 1) { 1789 USETW(((usb_status_t *)buf)->wStatus, 0); 1790 totlen = 2; 1791 } 1792 break; 1793 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1794 if (value >= USB_MAX_DEVICES) { 1795 err = USBD_IOERROR; 1796 goto ret; 1797 } 1798 sc->sc_addr = value; 1799 break; 1800 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1801 if (value != 0 && value != 1) { 1802 err = USBD_IOERROR; 1803 goto ret; 1804 } 1805 sc->sc_conf = value; 1806 break; 1807 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1808 break; 1809 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1810 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1811 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1812 err = USBD_IOERROR; 1813 goto ret; 1814 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1815 break; 1816 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1817 break; 1818 /* Hub requests */ 1819 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1820 break; 1821 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1822 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1823 "port=%d feature=%d\n", 1824 index, value)); 1825 if (index < 1 || index > sc->sc_noport) { 1826 err = USBD_IOERROR; 1827 goto ret; 1828 } 1829 port = EHCI_PORTSC(index); 1830 v = EOREAD4(sc, port); 1831 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1832 v &= ~EHCI_PS_CLEAR; 1833 switch(value) { 1834 case UHF_PORT_ENABLE: 1835 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1836 break; 1837 case UHF_PORT_SUSPEND: 1838 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1839 break; 1840 case UHF_PORT_POWER: 1841 if (sc->sc_hasppc) 1842 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1843 break; 1844 case UHF_PORT_TEST: 1845 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1846 "%d\n", index)); 1847 break; 1848 case UHF_PORT_INDICATOR: 1849 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1850 "%d\n", index)); 1851 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1852 break; 1853 case UHF_C_PORT_CONNECTION: 1854 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1855 break; 1856 case UHF_C_PORT_ENABLE: 1857 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1858 break; 1859 case UHF_C_PORT_SUSPEND: 1860 /* how? */ 1861 break; 1862 case UHF_C_PORT_OVER_CURRENT: 1863 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1864 break; 1865 case UHF_C_PORT_RESET: 1866 sc->sc_isreset[index] = 0; 1867 break; 1868 default: 1869 err = USBD_IOERROR; 1870 goto ret; 1871 } 1872 #if 0 1873 switch(value) { 1874 case UHF_C_PORT_CONNECTION: 1875 case UHF_C_PORT_ENABLE: 1876 case UHF_C_PORT_SUSPEND: 1877 case UHF_C_PORT_OVER_CURRENT: 1878 case UHF_C_PORT_RESET: 1879 default: 1880 break; 1881 } 1882 #endif 1883 break; 1884 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1885 if (len == 0) 1886 break; 1887 if ((value & 0xff) != 0) { 1888 err = USBD_IOERROR; 1889 goto ret; 1890 } 1891 hubd = ehci_hubd; 1892 hubd.bNbrPorts = sc->sc_noport; 1893 v = EOREAD4(sc, EHCI_HCSPARAMS); 1894 USETW(hubd.wHubCharacteristics, 1895 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1896 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1897 ? UHD_PORT_IND : 0); 1898 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1899 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1900 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1901 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1902 l = min(len, hubd.bDescLength); 1903 totlen = l; 1904 memcpy(buf, &hubd, l); 1905 break; 1906 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1907 if (len != 4) { 1908 err = USBD_IOERROR; 1909 goto ret; 1910 } 1911 memset(buf, 0, len); /* ? XXX */ 1912 totlen = len; 1913 break; 1914 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1915 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1916 index)); 1917 if (index < 1 || index > sc->sc_noport) { 1918 err = USBD_IOERROR; 1919 goto ret; 1920 } 1921 if (len != 4) { 1922 err = USBD_IOERROR; 1923 goto ret; 1924 } 1925 v = EOREAD4(sc, EHCI_PORTSC(index)); 1926 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1927 v)); 1928 i = UPS_HIGH_SPEED; 1929 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1930 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1931 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1932 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1933 if (v & EHCI_PS_PR) i |= UPS_RESET; 1934 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1935 USETW(ps.wPortStatus, i); 1936 i = 0; 1937 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1938 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1939 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1940 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1941 USETW(ps.wPortChange, i); 1942 l = min(len, sizeof ps); 1943 memcpy(buf, &ps, l); 1944 totlen = l; 1945 break; 1946 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1947 err = USBD_IOERROR; 1948 goto ret; 1949 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1950 break; 1951 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1952 if (index < 1 || index > sc->sc_noport) { 1953 err = USBD_IOERROR; 1954 goto ret; 1955 } 1956 port = EHCI_PORTSC(index); 1957 v = EOREAD4(sc, port); 1958 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1959 v &= ~EHCI_PS_CLEAR; 1960 switch(value) { 1961 case UHF_PORT_ENABLE: 1962 EOWRITE4(sc, port, v | EHCI_PS_PE); 1963 break; 1964 case UHF_PORT_SUSPEND: 1965 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1966 break; 1967 case UHF_PORT_RESET: 1968 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1969 index)); 1970 if (EHCI_PS_IS_LOWSPEED(v)) { 1971 /* Low speed device, give up ownership. */ 1972 ehci_disown(sc, index, 1); 1973 break; 1974 } 1975 /* Start reset sequence. */ 1976 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1977 EOWRITE4(sc, port, v | EHCI_PS_PR); 1978 /* Wait for reset to complete. */ 1979 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1980 if (sc->sc_dying) { 1981 err = USBD_IOERROR; 1982 goto ret; 1983 } 1984 /* Terminate reset sequence. */ 1985 EOWRITE4(sc, port, v); 1986 /* Wait for HC to complete reset. */ 1987 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1988 if (sc->sc_dying) { 1989 err = USBD_IOERROR; 1990 goto ret; 1991 } 1992 v = EOREAD4(sc, port); 1993 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1994 if (v & EHCI_PS_PR) { 1995 printf("%s: port reset timeout\n", 1996 USBDEVNAME(sc->sc_bus.bdev)); 1997 return (USBD_TIMEOUT); 1998 } 1999 if (!(v & EHCI_PS_PE)) { 2000 /* Not a high speed device, give up ownership.*/ 2001 ehci_disown(sc, index, 0); 2002 break; 2003 } 2004 sc->sc_isreset[index] = 1; 2005 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2006 index, v)); 2007 break; 2008 case UHF_PORT_POWER: 2009 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2010 "%d (has PPC = %d)\n", index, 2011 sc->sc_hasppc)); 2012 if (sc->sc_hasppc) 2013 EOWRITE4(sc, port, v | EHCI_PS_PP); 2014 break; 2015 case UHF_PORT_TEST: 2016 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2017 "%d\n", index)); 2018 break; 2019 case UHF_PORT_INDICATOR: 2020 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2021 "%d\n", index)); 2022 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2023 break; 2024 default: 2025 err = USBD_IOERROR; 2026 goto ret; 2027 } 2028 break; 2029 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2030 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2031 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2032 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2033 break; 2034 default: 2035 err = USBD_IOERROR; 2036 goto ret; 2037 } 2038 xfer->actlen = totlen; 2039 err = USBD_NORMAL_COMPLETION; 2040 ret: 2041 xfer->status = err; 2042 s = splusb(); 2043 usb_transfer_complete(xfer); 2044 splx(s); 2045 return (USBD_IN_PROGRESS); 2046 } 2047 2048 void 2049 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2050 { 2051 int port; 2052 u_int32_t v; 2053 2054 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2055 #ifdef DIAGNOSTIC 2056 if (sc->sc_npcomp != 0) { 2057 int i = (index-1) / sc->sc_npcomp; 2058 if (i >= sc->sc_ncomp) 2059 printf("%s: strange port\n", 2060 USBDEVNAME(sc->sc_bus.bdev)); 2061 else 2062 printf("%s: handing over %s speed device on " 2063 "port %d to %s\n", 2064 USBDEVNAME(sc->sc_bus.bdev), 2065 lowspeed ? "low" : "full", 2066 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2067 } else { 2068 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2069 } 2070 #endif 2071 port = EHCI_PORTSC(index); 2072 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2073 EOWRITE4(sc, port, v | EHCI_PS_PO); 2074 } 2075 2076 /* Abort a root control request. */ 2077 Static void 2078 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2079 { 2080 /* Nothing to do, all transfers are synchronous. */ 2081 } 2082 2083 /* Close the root pipe. */ 2084 Static void 2085 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2086 { 2087 DPRINTF(("ehci_root_ctrl_close\n")); 2088 /* Nothing to do. */ 2089 } 2090 2091 void 2092 ehci_root_intr_done(usbd_xfer_handle xfer) 2093 { 2094 xfer->hcpriv = NULL; 2095 } 2096 2097 Static usbd_status 2098 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2099 { 2100 usbd_status err; 2101 2102 /* Insert last in queue. */ 2103 err = usb_insert_transfer(xfer); 2104 if (err) 2105 return (err); 2106 2107 /* Pipe isn't running, start first */ 2108 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2109 } 2110 2111 Static usbd_status 2112 ehci_root_intr_start(usbd_xfer_handle xfer) 2113 { 2114 usbd_pipe_handle pipe = xfer->pipe; 2115 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2116 2117 if (sc->sc_dying) 2118 return (USBD_IOERROR); 2119 2120 sc->sc_intrxfer = xfer; 2121 2122 return (USBD_IN_PROGRESS); 2123 } 2124 2125 /* Abort a root interrupt request. */ 2126 Static void 2127 ehci_root_intr_abort(usbd_xfer_handle xfer) 2128 { 2129 int s; 2130 2131 if (xfer->pipe->intrxfer == xfer) { 2132 DPRINTF(("ehci_root_intr_abort: remove\n")); 2133 xfer->pipe->intrxfer = NULL; 2134 } 2135 xfer->status = USBD_CANCELLED; 2136 s = splusb(); 2137 usb_transfer_complete(xfer); 2138 splx(s); 2139 } 2140 2141 /* Close the root pipe. */ 2142 Static void 2143 ehci_root_intr_close(usbd_pipe_handle pipe) 2144 { 2145 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2146 2147 DPRINTF(("ehci_root_intr_close\n")); 2148 2149 sc->sc_intrxfer = NULL; 2150 } 2151 2152 void 2153 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2154 { 2155 xfer->hcpriv = NULL; 2156 } 2157 2158 /************************/ 2159 2160 ehci_soft_qh_t * 2161 ehci_alloc_sqh(ehci_softc_t *sc) 2162 { 2163 ehci_soft_qh_t *sqh; 2164 usbd_status err; 2165 int i, offs; 2166 usb_dma_t dma; 2167 2168 if (sc->sc_freeqhs == NULL) { 2169 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2170 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2171 EHCI_PAGE_SIZE, &dma); 2172 #ifdef EHCI_DEBUG 2173 if (err) 2174 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2175 #endif 2176 if (err) 2177 return (NULL); 2178 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2179 offs = i * EHCI_SQH_SIZE; 2180 sqh = KERNADDR(&dma, offs); 2181 sqh->physaddr = DMAADDR(&dma, offs); 2182 sqh->next = sc->sc_freeqhs; 2183 sc->sc_freeqhs = sqh; 2184 } 2185 } 2186 sqh = sc->sc_freeqhs; 2187 sc->sc_freeqhs = sqh->next; 2188 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2189 sqh->next = NULL; 2190 return (sqh); 2191 } 2192 2193 void 2194 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2195 { 2196 sqh->next = sc->sc_freeqhs; 2197 sc->sc_freeqhs = sqh; 2198 } 2199 2200 ehci_soft_qtd_t * 2201 ehci_alloc_sqtd(ehci_softc_t *sc) 2202 { 2203 ehci_soft_qtd_t *sqtd; 2204 usbd_status err; 2205 int i, offs; 2206 usb_dma_t dma; 2207 int s; 2208 2209 if (sc->sc_freeqtds == NULL) { 2210 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2211 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2212 EHCI_PAGE_SIZE, &dma); 2213 #ifdef EHCI_DEBUG 2214 if (err) 2215 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2216 #endif 2217 if (err) 2218 return (NULL); 2219 s = splusb(); 2220 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2221 offs = i * EHCI_SQTD_SIZE; 2222 sqtd = KERNADDR(&dma, offs); 2223 sqtd->physaddr = DMAADDR(&dma, offs); 2224 sqtd->nextqtd = sc->sc_freeqtds; 2225 sc->sc_freeqtds = sqtd; 2226 } 2227 splx(s); 2228 } 2229 2230 s = splusb(); 2231 sqtd = sc->sc_freeqtds; 2232 sc->sc_freeqtds = sqtd->nextqtd; 2233 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2234 sqtd->nextqtd = NULL; 2235 sqtd->xfer = NULL; 2236 splx(s); 2237 2238 return (sqtd); 2239 } 2240 2241 void 2242 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2243 { 2244 int s; 2245 2246 s = splusb(); 2247 sqtd->nextqtd = sc->sc_freeqtds; 2248 sc->sc_freeqtds = sqtd; 2249 splx(s); 2250 } 2251 2252 usbd_status 2253 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2254 int alen, int rd, usbd_xfer_handle xfer, 2255 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2256 { 2257 ehci_soft_qtd_t *next, *cur; 2258 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2259 u_int32_t qtdstatus; 2260 int len, curlen, mps; 2261 int i, tog; 2262 usb_dma_t *dma = &xfer->dmabuf; 2263 u_int16_t flags = xfer->flags; 2264 2265 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2266 2267 len = alen; 2268 dataphys = DMAADDR(dma, 0); 2269 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2270 qtdstatus = EHCI_QTD_ACTIVE | 2271 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2272 EHCI_QTD_SET_CERR(3) 2273 /* IOC set below */ 2274 /* BYTES set below */ 2275 ; 2276 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2277 tog = epipe->nexttoggle; 2278 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2279 2280 cur = ehci_alloc_sqtd(sc); 2281 *sp = cur; 2282 if (cur == NULL) 2283 goto nomem; 2284 for (;;) { 2285 dataphyspage = EHCI_PAGE(dataphys); 2286 /* The EHCI hardware can handle at most 5 pages. */ 2287 if (dataphyslastpage - dataphyspage < 2288 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2289 /* we can handle it in this QTD */ 2290 curlen = len; 2291 } else { 2292 /* must use multiple TDs, fill as much as possible. */ 2293 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2294 EHCI_PAGE_OFFSET(dataphys); 2295 #ifdef DIAGNOSTIC 2296 if (curlen > len) { 2297 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2298 "len=0x%x offs=0x%x\n", curlen, len, 2299 EHCI_PAGE_OFFSET(dataphys)); 2300 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2301 dataphyslastpage, dataphyspage, 2302 dataphys); 2303 curlen = len; 2304 } 2305 #endif 2306 /* the length must be a multiple of the max size */ 2307 curlen -= curlen % mps; 2308 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2309 "curlen=%d\n", curlen)); 2310 #ifdef DIAGNOSTIC 2311 if (curlen == 0) 2312 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2313 #endif 2314 } 2315 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2316 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2317 dataphys, dataphyslastpage, 2318 len, curlen)); 2319 len -= curlen; 2320 2321 /* 2322 * Allocate another transfer if there's more data left, 2323 * or if force last short transfer flag is set and we're 2324 * allocating a multiple of the max packet size. 2325 */ 2326 if (len != 0 || 2327 ((curlen % mps) == 0 && !rd && curlen != 0 && 2328 (flags & USBD_FORCE_SHORT_XFER))) { 2329 next = ehci_alloc_sqtd(sc); 2330 if (next == NULL) 2331 goto nomem; 2332 nextphys = htole32(next->physaddr); 2333 } else { 2334 next = NULL; 2335 nextphys = EHCI_NULL; 2336 } 2337 2338 for (i = 0; i * EHCI_PAGE_SIZE < 2339 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2340 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2341 if (i != 0) /* use offset only in first buffer */ 2342 a = EHCI_PAGE(a); 2343 cur->qtd.qtd_buffer[i] = htole32(a); 2344 cur->qtd.qtd_buffer_hi[i] = 0; 2345 #ifdef DIAGNOSTIC 2346 if (i >= EHCI_QTD_NBUFFERS) { 2347 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2348 goto nomem; 2349 } 2350 #endif 2351 } 2352 cur->nextqtd = next; 2353 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2354 cur->qtd.qtd_status = 2355 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2356 cur->xfer = xfer; 2357 cur->len = curlen; 2358 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2359 dataphys, dataphys + curlen)); 2360 /* adjust the toggle based on the number of packets in this 2361 qtd */ 2362 if (((curlen + mps - 1) / mps) & 1) { 2363 tog ^= 1; 2364 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2365 } 2366 if (next == NULL) 2367 break; 2368 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2369 dataphys += curlen; 2370 cur = next; 2371 } 2372 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2373 *ep = cur; 2374 epipe->nexttoggle = tog; 2375 2376 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2377 *sp, *ep)); 2378 2379 return (USBD_NORMAL_COMPLETION); 2380 2381 nomem: 2382 /* XXX free chain */ 2383 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2384 return (USBD_NOMEM); 2385 } 2386 2387 Static void 2388 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2389 ehci_soft_qtd_t *sqtdend) 2390 { 2391 ehci_soft_qtd_t *p; 2392 int i; 2393 2394 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2395 sqtd, sqtdend)); 2396 2397 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2398 p = sqtd->nextqtd; 2399 ehci_free_sqtd(sc, sqtd); 2400 } 2401 } 2402 2403 /****************/ 2404 2405 /* 2406 * Close a reqular pipe. 2407 * Assumes that there are no pending transactions. 2408 */ 2409 void 2410 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2411 { 2412 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2413 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2414 ehci_soft_qh_t *sqh = epipe->sqh; 2415 int s; 2416 2417 s = splusb(); 2418 ehci_rem_qh(sc, sqh, head); 2419 splx(s); 2420 ehci_free_sqh(sc, epipe->sqh); 2421 } 2422 2423 /* 2424 * Abort a device request. 2425 * If this routine is called at splusb() it guarantees that the request 2426 * will be removed from the hardware scheduling and that the callback 2427 * for it will be called with USBD_CANCELLED status. 2428 * It's impossible to guarantee that the requested transfer will not 2429 * have happened since the hardware runs concurrently. 2430 * If the transaction has already happened we rely on the ordinary 2431 * interrupt processing to process it. 2432 * XXX This is most probably wrong. 2433 */ 2434 void 2435 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2436 { 2437 #define exfer EXFER(xfer) 2438 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2439 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2440 ehci_soft_qh_t *sqh = epipe->sqh; 2441 ehci_soft_qtd_t *sqtd; 2442 ehci_physaddr_t cur; 2443 u_int32_t qhstatus; 2444 int s; 2445 int hit; 2446 int wake; 2447 2448 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2449 2450 if (sc->sc_dying) { 2451 /* If we're dying, just do the software part. */ 2452 s = splusb(); 2453 xfer->status = status; /* make software ignore it */ 2454 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2455 usb_transfer_complete(xfer); 2456 splx(s); 2457 return; 2458 } 2459 2460 if (xfer->device->bus->intr_context || !curproc) 2461 panic("ehci_abort_xfer: not in process context"); 2462 2463 /* 2464 * If an abort is already in progress then just wait for it to 2465 * complete and return. 2466 */ 2467 if (xfer->hcflags & UXFER_ABORTING) { 2468 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2469 #ifdef DIAGNOSTIC 2470 if (status == USBD_TIMEOUT) 2471 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2472 #endif 2473 /* Override the status which might be USBD_TIMEOUT. */ 2474 xfer->status = status; 2475 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2476 xfer->hcflags |= UXFER_ABORTWAIT; 2477 while (xfer->hcflags & UXFER_ABORTING) 2478 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2479 return; 2480 } 2481 xfer->hcflags |= UXFER_ABORTING; 2482 2483 /* 2484 * Step 1: Make interrupt routine and hardware ignore xfer. 2485 */ 2486 s = splusb(); 2487 xfer->status = status; /* make software ignore it */ 2488 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2489 qhstatus = sqh->qh.qh_qtd.qtd_status; 2490 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2491 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2492 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2493 if (sqtd == exfer->sqtdend) 2494 break; 2495 } 2496 splx(s); 2497 2498 /* 2499 * Step 2: Wait until we know hardware has finished any possible 2500 * use of the xfer. Also make sure the soft interrupt routine 2501 * has run. 2502 */ 2503 ehci_sync_hc(sc); 2504 s = splusb(); 2505 #ifdef USB_USE_SOFTINTR 2506 sc->sc_softwake = 1; 2507 #endif /* USB_USE_SOFTINTR */ 2508 usb_schedsoftintr(&sc->sc_bus); 2509 #ifdef USB_USE_SOFTINTR 2510 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2511 #endif /* USB_USE_SOFTINTR */ 2512 splx(s); 2513 2514 /* 2515 * Step 3: Remove any vestiges of the xfer from the hardware. 2516 * The complication here is that the hardware may have executed 2517 * beyond the xfer we're trying to abort. So as we're scanning 2518 * the TDs of this xfer we check if the hardware points to 2519 * any of them. 2520 */ 2521 s = splusb(); /* XXX why? */ 2522 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2523 hit = 0; 2524 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2525 hit |= cur == sqtd->physaddr; 2526 if (sqtd == exfer->sqtdend) 2527 break; 2528 } 2529 sqtd = sqtd->nextqtd; 2530 /* Zap curqtd register if hardware pointed inside the xfer. */ 2531 if (hit && sqtd != NULL) { 2532 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2533 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2534 sqh->qh.qh_qtd.qtd_status = qhstatus; 2535 } else { 2536 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2537 } 2538 2539 /* 2540 * Step 4: Execute callback. 2541 */ 2542 #ifdef DIAGNOSTIC 2543 exfer->isdone = 1; 2544 #endif 2545 wake = xfer->hcflags & UXFER_ABORTWAIT; 2546 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2547 usb_transfer_complete(xfer); 2548 if (wake) 2549 wakeup(&xfer->hcflags); 2550 2551 splx(s); 2552 #undef exfer 2553 } 2554 2555 void 2556 ehci_timeout(void *addr) 2557 { 2558 struct ehci_xfer *exfer = addr; 2559 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2560 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2561 2562 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2563 #ifdef USB_DEBUG 2564 if (ehcidebug > 1) 2565 usbd_dump_pipe(exfer->xfer.pipe); 2566 #endif 2567 2568 if (sc->sc_dying) { 2569 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2570 return; 2571 } 2572 2573 /* Execute the abort in a process context. */ 2574 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2575 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2576 USB_TASKQ_HC); 2577 } 2578 2579 void 2580 ehci_timeout_task(void *addr) 2581 { 2582 usbd_xfer_handle xfer = addr; 2583 int s; 2584 2585 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2586 2587 s = splusb(); 2588 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2589 splx(s); 2590 } 2591 2592 /************************/ 2593 2594 Static usbd_status 2595 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2596 { 2597 usbd_status err; 2598 2599 /* Insert last in queue. */ 2600 err = usb_insert_transfer(xfer); 2601 if (err) 2602 return (err); 2603 2604 /* Pipe isn't running, start first */ 2605 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2606 } 2607 2608 Static usbd_status 2609 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2610 { 2611 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2612 usbd_status err; 2613 2614 if (sc->sc_dying) 2615 return (USBD_IOERROR); 2616 2617 #ifdef DIAGNOSTIC 2618 if (!(xfer->rqflags & URQ_REQUEST)) { 2619 /* XXX panic */ 2620 printf("ehci_device_ctrl_transfer: not a request\n"); 2621 return (USBD_INVAL); 2622 } 2623 #endif 2624 2625 err = ehci_device_request(xfer); 2626 if (err) 2627 return (err); 2628 2629 if (sc->sc_bus.use_polling) 2630 ehci_waitintr(sc, xfer); 2631 return (USBD_IN_PROGRESS); 2632 } 2633 2634 void 2635 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2636 { 2637 struct ehci_xfer *ex = EXFER(xfer); 2638 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2639 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2640 2641 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2642 2643 #ifdef DIAGNOSTIC 2644 if (!(xfer->rqflags & URQ_REQUEST)) { 2645 panic("ehci_ctrl_done: not a request"); 2646 } 2647 #endif 2648 2649 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2650 ehci_del_intr_list(ex); /* remove from active list */ 2651 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2652 } 2653 2654 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2655 } 2656 2657 /* Abort a device control request. */ 2658 Static void 2659 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2660 { 2661 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2662 ehci_abort_xfer(xfer, USBD_CANCELLED); 2663 } 2664 2665 /* Close a device control pipe. */ 2666 Static void 2667 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2668 { 2669 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2670 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2671 2672 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2673 ehci_close_pipe(pipe, sc->sc_async_head); 2674 } 2675 2676 usbd_status 2677 ehci_device_request(usbd_xfer_handle xfer) 2678 { 2679 #define exfer EXFER(xfer) 2680 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2681 usb_device_request_t *req = &xfer->request; 2682 usbd_device_handle dev = epipe->pipe.device; 2683 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2684 int addr = dev->address; 2685 ehci_soft_qtd_t *setup, *stat, *next; 2686 ehci_soft_qh_t *sqh; 2687 int isread; 2688 int len; 2689 usbd_status err; 2690 int s; 2691 2692 isread = req->bmRequestType & UT_READ; 2693 len = UGETW(req->wLength); 2694 2695 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2696 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2697 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2698 UGETW(req->wIndex), len, addr, 2699 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2700 2701 setup = ehci_alloc_sqtd(sc); 2702 if (setup == NULL) { 2703 err = USBD_NOMEM; 2704 goto bad1; 2705 } 2706 stat = ehci_alloc_sqtd(sc); 2707 if (stat == NULL) { 2708 err = USBD_NOMEM; 2709 goto bad2; 2710 } 2711 2712 sqh = epipe->sqh; 2713 epipe->u.ctl.length = len; 2714 2715 /* Update device address and length since they may have changed 2716 during the setup of the control pipe in usbd_new_device(). */ 2717 /* XXX This only needs to be done once, but it's too early in open. */ 2718 /* XXXX Should not touch ED here! */ 2719 sqh->qh.qh_endp = 2720 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2721 htole32( 2722 EHCI_QH_SET_ADDR(addr) | 2723 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2724 ); 2725 2726 /* Set up data transaction */ 2727 if (len != 0) { 2728 ehci_soft_qtd_t *end; 2729 2730 /* Start toggle at 1. */ 2731 epipe->nexttoggle = 1; 2732 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2733 &next, &end); 2734 if (err) 2735 goto bad3; 2736 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2737 end->nextqtd = stat; 2738 end->qtd.qtd_next = 2739 end->qtd.qtd_altnext = htole32(stat->physaddr); 2740 } else { 2741 next = stat; 2742 } 2743 2744 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2745 2746 /* Clear toggle */ 2747 setup->qtd.qtd_status = htole32( 2748 EHCI_QTD_ACTIVE | 2749 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2750 EHCI_QTD_SET_CERR(3) | 2751 EHCI_QTD_SET_TOGGLE(0) | 2752 EHCI_QTD_SET_BYTES(sizeof *req) 2753 ); 2754 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2755 setup->qtd.qtd_buffer_hi[0] = 0; 2756 setup->nextqtd = next; 2757 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2758 setup->xfer = xfer; 2759 setup->len = sizeof *req; 2760 2761 stat->qtd.qtd_status = htole32( 2762 EHCI_QTD_ACTIVE | 2763 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2764 EHCI_QTD_SET_CERR(3) | 2765 EHCI_QTD_SET_TOGGLE(1) | 2766 EHCI_QTD_IOC 2767 ); 2768 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2769 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2770 stat->nextqtd = NULL; 2771 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2772 stat->xfer = xfer; 2773 stat->len = 0; 2774 2775 #ifdef EHCI_DEBUG 2776 if (ehcidebug > 5) { 2777 DPRINTF(("ehci_device_request:\n")); 2778 ehci_dump_sqh(sqh); 2779 ehci_dump_sqtds(setup); 2780 } 2781 #endif 2782 2783 exfer->sqtdstart = setup; 2784 exfer->sqtdend = stat; 2785 #ifdef DIAGNOSTIC 2786 if (!exfer->isdone) { 2787 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2788 } 2789 exfer->isdone = 0; 2790 #endif 2791 2792 /* Insert qTD in QH list. */ 2793 s = splusb(); 2794 ehci_set_qh_qtd(sqh, setup); 2795 if (xfer->timeout && !sc->sc_bus.use_polling) { 2796 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2797 ehci_timeout, xfer); 2798 } 2799 ehci_add_intr_list(sc, exfer); 2800 xfer->status = USBD_IN_PROGRESS; 2801 splx(s); 2802 2803 #ifdef EHCI_DEBUG 2804 if (ehcidebug > 10) { 2805 DPRINTF(("ehci_device_request: status=%x\n", 2806 EOREAD4(sc, EHCI_USBSTS))); 2807 delay(10000); 2808 ehci_dump_regs(sc); 2809 ehci_dump_sqh(sc->sc_async_head); 2810 ehci_dump_sqh(sqh); 2811 ehci_dump_sqtds(setup); 2812 } 2813 #endif 2814 2815 return (USBD_NORMAL_COMPLETION); 2816 2817 bad3: 2818 ehci_free_sqtd(sc, stat); 2819 bad2: 2820 ehci_free_sqtd(sc, setup); 2821 bad1: 2822 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2823 xfer->status = err; 2824 usb_transfer_complete(xfer); 2825 return (err); 2826 #undef exfer 2827 } 2828 2829 /* 2830 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2831 * qTD status, or miss signalling occasionally under heavy load. If the host 2832 * machine is too fast, we we can miss transaction completion - when we scan 2833 * the active list the transaction still seems to be active. This generally 2834 * exhibits itself as a umass stall that never recovers. 2835 * 2836 * We work around this behaviour by setting up this callback after any softintr 2837 * that completes with transactions still pending, giving us another chance to 2838 * check for completion after the writeback has taken place. 2839 */ 2840 void 2841 ehci_intrlist_timeout(void *arg) 2842 { 2843 ehci_softc_t *sc = arg; 2844 int s = splusb(); 2845 2846 DPRINTF(("ehci_intrlist_timeout\n")); 2847 usb_schedsoftintr(&sc->sc_bus); 2848 2849 splx(s); 2850 } 2851 2852 /************************/ 2853 2854 Static usbd_status 2855 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2856 { 2857 usbd_status err; 2858 2859 /* Insert last in queue. */ 2860 err = usb_insert_transfer(xfer); 2861 if (err) 2862 return (err); 2863 2864 /* Pipe isn't running, start first */ 2865 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2866 } 2867 2868 usbd_status 2869 ehci_device_bulk_start(usbd_xfer_handle xfer) 2870 { 2871 #define exfer EXFER(xfer) 2872 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2873 usbd_device_handle dev = epipe->pipe.device; 2874 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2875 ehci_soft_qtd_t *data, *dataend; 2876 ehci_soft_qh_t *sqh; 2877 usbd_status err; 2878 int len, isread, endpt; 2879 int s; 2880 2881 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2882 xfer, xfer->length, xfer->flags)); 2883 2884 if (sc->sc_dying) 2885 return (USBD_IOERROR); 2886 2887 #ifdef DIAGNOSTIC 2888 if (xfer->rqflags & URQ_REQUEST) 2889 panic("ehci_device_bulk_start: a request"); 2890 #endif 2891 2892 len = xfer->length; 2893 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2894 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2895 sqh = epipe->sqh; 2896 2897 epipe->u.bulk.length = len; 2898 2899 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2900 &dataend); 2901 if (err) { 2902 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2903 xfer->status = err; 2904 usb_transfer_complete(xfer); 2905 return (err); 2906 } 2907 2908 #ifdef EHCI_DEBUG 2909 if (ehcidebug > 5) { 2910 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2911 ehci_dump_sqh(sqh); 2912 ehci_dump_sqtds(data); 2913 } 2914 #endif 2915 2916 /* Set up interrupt info. */ 2917 exfer->sqtdstart = data; 2918 exfer->sqtdend = dataend; 2919 #ifdef DIAGNOSTIC 2920 if (!exfer->isdone) { 2921 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2922 } 2923 exfer->isdone = 0; 2924 #endif 2925 2926 s = splusb(); 2927 ehci_set_qh_qtd(sqh, data); 2928 if (xfer->timeout && !sc->sc_bus.use_polling) { 2929 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2930 ehci_timeout, xfer); 2931 } 2932 ehci_add_intr_list(sc, exfer); 2933 xfer->status = USBD_IN_PROGRESS; 2934 splx(s); 2935 2936 #ifdef EHCI_DEBUG 2937 if (ehcidebug > 10) { 2938 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2939 delay(10000); 2940 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2941 ehci_dump_regs(sc); 2942 #if 0 2943 printf("async_head:\n"); 2944 ehci_dump_sqh(sc->sc_async_head); 2945 #endif 2946 printf("sqh:\n"); 2947 ehci_dump_sqh(sqh); 2948 ehci_dump_sqtds(data); 2949 } 2950 #endif 2951 2952 if (sc->sc_bus.use_polling) 2953 ehci_waitintr(sc, xfer); 2954 2955 return (USBD_IN_PROGRESS); 2956 #undef exfer 2957 } 2958 2959 Static void 2960 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2961 { 2962 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2963 ehci_abort_xfer(xfer, USBD_CANCELLED); 2964 } 2965 2966 /* 2967 * Close a device bulk pipe. 2968 */ 2969 Static void 2970 ehci_device_bulk_close(usbd_pipe_handle pipe) 2971 { 2972 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2973 2974 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2975 ehci_close_pipe(pipe, sc->sc_async_head); 2976 } 2977 2978 void 2979 ehci_device_bulk_done(usbd_xfer_handle xfer) 2980 { 2981 struct ehci_xfer *ex = EXFER(xfer); 2982 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2983 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2984 2985 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2986 xfer, xfer->actlen)); 2987 2988 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2989 ehci_del_intr_list(ex); /* remove from active list */ 2990 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2991 } 2992 2993 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2994 } 2995 2996 /************************/ 2997 2998 Static usbd_status 2999 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3000 { 3001 struct ehci_soft_islot *isp; 3002 int islot, lev; 3003 3004 /* Find a poll rate that is large enough. */ 3005 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3006 if (EHCI_ILEV_IVAL(lev) <= ival) 3007 break; 3008 3009 /* Pick an interrupt slot at the right level. */ 3010 /* XXX could do better than picking at random */ 3011 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3012 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3013 3014 sqh->islot = islot; 3015 isp = &sc->sc_islots[islot]; 3016 ehci_add_qh(sqh, isp->sqh); 3017 3018 return (USBD_NORMAL_COMPLETION); 3019 } 3020 3021 Static usbd_status 3022 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3023 { 3024 usbd_status err; 3025 3026 /* Insert last in queue. */ 3027 err = usb_insert_transfer(xfer); 3028 if (err) 3029 return (err); 3030 3031 /* 3032 * Pipe isn't running (otherwise err would be USBD_INPROG), 3033 * so start it first. 3034 */ 3035 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3036 } 3037 3038 Static usbd_status 3039 ehci_device_intr_start(usbd_xfer_handle xfer) 3040 { 3041 #define exfer EXFER(xfer) 3042 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3043 usbd_device_handle dev = xfer->pipe->device; 3044 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3045 ehci_soft_qtd_t *data, *dataend; 3046 ehci_soft_qh_t *sqh; 3047 usbd_status err; 3048 int len, isread, endpt; 3049 int s; 3050 3051 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3052 xfer, xfer->length, xfer->flags)); 3053 3054 if (sc->sc_dying) 3055 return (USBD_IOERROR); 3056 3057 #ifdef DIAGNOSTIC 3058 if (xfer->rqflags & URQ_REQUEST) 3059 panic("ehci_device_intr_start: a request"); 3060 #endif 3061 3062 len = xfer->length; 3063 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3064 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3065 sqh = epipe->sqh; 3066 3067 epipe->u.intr.length = len; 3068 3069 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3070 &dataend); 3071 if (err) { 3072 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3073 xfer->status = err; 3074 usb_transfer_complete(xfer); 3075 return (err); 3076 } 3077 3078 #ifdef EHCI_DEBUG 3079 if (ehcidebug > 5) { 3080 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3081 ehci_dump_sqh(sqh); 3082 ehci_dump_sqtds(data); 3083 } 3084 #endif 3085 3086 /* Set up interrupt info. */ 3087 exfer->sqtdstart = data; 3088 exfer->sqtdend = dataend; 3089 #ifdef DIAGNOSTIC 3090 if (!exfer->isdone) { 3091 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3092 } 3093 exfer->isdone = 0; 3094 #endif 3095 3096 s = splusb(); 3097 ehci_set_qh_qtd(sqh, data); 3098 if (xfer->timeout && !sc->sc_bus.use_polling) { 3099 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3100 ehci_timeout, xfer); 3101 } 3102 ehci_add_intr_list(sc, exfer); 3103 xfer->status = USBD_IN_PROGRESS; 3104 splx(s); 3105 3106 #ifdef EHCI_DEBUG 3107 if (ehcidebug > 10) { 3108 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3109 delay(10000); 3110 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3111 ehci_dump_regs(sc); 3112 printf("sqh:\n"); 3113 ehci_dump_sqh(sqh); 3114 ehci_dump_sqtds(data); 3115 } 3116 #endif 3117 3118 if (sc->sc_bus.use_polling) 3119 ehci_waitintr(sc, xfer); 3120 3121 return (USBD_IN_PROGRESS); 3122 #undef exfer 3123 } 3124 3125 Static void 3126 ehci_device_intr_abort(usbd_xfer_handle xfer) 3127 { 3128 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3129 if (xfer->pipe->intrxfer == xfer) { 3130 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3131 xfer->pipe->intrxfer = NULL; 3132 } 3133 ehci_abort_xfer(xfer, USBD_CANCELLED); 3134 } 3135 3136 Static void 3137 ehci_device_intr_close(usbd_pipe_handle pipe) 3138 { 3139 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3140 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3141 struct ehci_soft_islot *isp; 3142 3143 isp = &sc->sc_islots[epipe->sqh->islot]; 3144 ehci_close_pipe(pipe, isp->sqh); 3145 } 3146 3147 Static void 3148 ehci_device_intr_done(usbd_xfer_handle xfer) 3149 { 3150 #define exfer EXFER(xfer) 3151 struct ehci_xfer *ex = EXFER(xfer); 3152 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3153 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3154 ehci_soft_qtd_t *data, *dataend; 3155 ehci_soft_qh_t *sqh; 3156 usbd_status err; 3157 int len, isread, endpt, s; 3158 3159 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3160 xfer, xfer->actlen)); 3161 3162 if (xfer->pipe->repeat) { 3163 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3164 3165 len = epipe->u.intr.length; 3166 xfer->length = len; 3167 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3168 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3169 sqh = epipe->sqh; 3170 3171 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3172 &data, &dataend); 3173 if (err) { 3174 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3175 xfer->status = err; 3176 return; 3177 } 3178 3179 /* Set up interrupt info. */ 3180 exfer->sqtdstart = data; 3181 exfer->sqtdend = dataend; 3182 #ifdef DIAGNOSTIC 3183 if (!exfer->isdone) { 3184 printf("ehci_device_intr_done: not done, ex=%p\n", 3185 exfer); 3186 } 3187 exfer->isdone = 0; 3188 #endif 3189 3190 s = splusb(); 3191 ehci_set_qh_qtd(sqh, data); 3192 if (xfer->timeout && !sc->sc_bus.use_polling) { 3193 usb_callout(xfer->timeout_handle, 3194 mstohz(xfer->timeout), ehci_timeout, xfer); 3195 } 3196 splx(s); 3197 3198 xfer->status = USBD_IN_PROGRESS; 3199 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3200 ehci_del_intr_list(ex); /* remove from active list */ 3201 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3202 } 3203 #undef exfer 3204 } 3205 3206 /************************/ 3207 3208 Static usbd_status 3209 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3210 { 3211 return USBD_IOERROR; 3212 } 3213 Static usbd_status 3214 ehci_device_isoc_start(usbd_xfer_handle xfer) 3215 { 3216 return USBD_IOERROR; 3217 } 3218 Static void 3219 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3220 { 3221 } 3222 Static void 3223 ehci_device_isoc_close(usbd_pipe_handle pipe) 3224 { 3225 } 3226 Static void 3227 ehci_device_isoc_done(usbd_xfer_handle xfer) 3228 { 3229 } 3230
Indexes created Thu Sep 25 16:09:42 GMT 2025