ehci.c revision 1.134
1 /* $NetBSD: ehci.c,v 1.134 2008/03/28 17:14:46 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for isochronous transfers, so 54 * devices using them don't work. 55 * 56 * 3) The hub driver needs to handle and schedule the transaction translator, 57 * to assign place in frame where different devices get to go. See chapter 58 * on hubs in USB 2.0 for details. 59 * 60 * 4) command failures are not recovered correctly 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.134 2008/03/28 17:14:46 drochner Exp $"); 65 66 #include "ohci.h" 67 #include "uhci.h" 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 #include <sys/select.h> 75 #include <sys/proc.h> 76 #include <sys/queue.h> 77 #include <sys/mutex.h> 78 #include <sys/bus.h> 79 80 #include <machine/endian.h> 81 82 #include <dev/usb/usb.h> 83 #include <dev/usb/usbdi.h> 84 #include <dev/usb/usbdivar.h> 85 #include <dev/usb/usb_mem.h> 86 #include <dev/usb/usb_quirks.h> 87 88 #include <dev/usb/ehcireg.h> 89 #include <dev/usb/ehcivar.h> 90 #include <dev/usb/usbroothub_subr.h> 91 92 #ifdef EHCI_DEBUG 93 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 94 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 95 int ehcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 struct ehci_pipe { 105 struct usbd_pipe pipe; 106 int nexttoggle; 107 108 ehci_soft_qh_t *sqh; 109 union { 110 ehci_soft_qtd_t *qtd; 111 /* ehci_soft_itd_t *itd; */ 112 } tail; 113 union { 114 /* Control pipe */ 115 struct { 116 usb_dma_t reqdma; 117 u_int length; 118 } ctl; 119 /* Interrupt pipe */ 120 struct { 121 u_int length; 122 } intr; 123 /* Bulk pipe */ 124 struct { 125 u_int length; 126 } bulk; 127 /* Iso pipe */ 128 /* XXX */ 129 } u; 130 }; 131 132 Static usbd_status ehci_open(usbd_pipe_handle); 133 Static void ehci_poll(struct usbd_bus *); 134 Static void ehci_softintr(void *); 135 Static int ehci_intr1(ehci_softc_t *); 136 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 137 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 138 Static void ehci_idone(struct ehci_xfer *); 139 Static void ehci_timeout(void *); 140 Static void ehci_timeout_task(void *); 141 Static void ehci_intrlist_timeout(void *); 142 143 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 144 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 145 146 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 147 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 148 149 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 151 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_root_ctrl_close(usbd_pipe_handle); 153 Static void ehci_root_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 157 Static void ehci_root_intr_abort(usbd_xfer_handle); 158 Static void ehci_root_intr_close(usbd_pipe_handle); 159 Static void ehci_root_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 163 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 164 Static void ehci_device_ctrl_close(usbd_pipe_handle); 165 Static void ehci_device_ctrl_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 169 Static void ehci_device_bulk_abort(usbd_xfer_handle); 170 Static void ehci_device_bulk_close(usbd_pipe_handle); 171 Static void ehci_device_bulk_done(usbd_xfer_handle); 172 173 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 175 Static void ehci_device_intr_abort(usbd_xfer_handle); 176 Static void ehci_device_intr_close(usbd_pipe_handle); 177 Static void ehci_device_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 180 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 181 Static void ehci_device_isoc_abort(usbd_xfer_handle); 182 Static void ehci_device_isoc_close(usbd_pipe_handle); 183 Static void ehci_device_isoc_done(usbd_xfer_handle); 184 185 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ehci_noop(usbd_pipe_handle pipe); 187 188 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 189 Static void ehci_disown(ehci_softc_t *, int, int); 190 191 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 192 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 193 194 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 195 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 196 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 197 ehci_softc_t *, int, int, usbd_xfer_handle, 198 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 199 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 200 ehci_soft_qtd_t *); 201 202 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 203 204 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 205 int ival); 206 207 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 208 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 209 ehci_soft_qh_t *); 210 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 211 Static void ehci_sync_hc(ehci_softc_t *); 212 213 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 214 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 #ifdef EHCI_DEBUG 217 Static void ehci_dump_regs(ehci_softc_t *); 218 void ehci_dump(void); 219 Static ehci_softc_t *theehci; 220 Static void ehci_dump_link(ehci_link_t, int); 221 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 222 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 223 Static void ehci_dump_qtd(ehci_qtd_t *); 224 Static void ehci_dump_sqh(ehci_soft_qh_t *); 225 #ifdef DIAGNOSTIC 226 Static void ehci_dump_exfer(struct ehci_xfer *); 227 #endif 228 #endif 229 230 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 231 232 #define EHCI_INTR_ENDPT 1 233 234 #define ehci_add_intr_list(sc, ex) \ 235 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 236 #define ehci_del_intr_list(ex) \ 237 do { \ 238 LIST_REMOVE((ex), inext); \ 239 (ex)->inext.le_prev = NULL; \ 240 } while (0) 241 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 242 243 Static const struct usbd_bus_methods ehci_bus_methods = { 244 ehci_open, 245 ehci_softintr, 246 ehci_poll, 247 ehci_allocm, 248 ehci_freem, 249 ehci_allocx, 250 ehci_freex, 251 }; 252 253 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 254 ehci_root_ctrl_transfer, 255 ehci_root_ctrl_start, 256 ehci_root_ctrl_abort, 257 ehci_root_ctrl_close, 258 ehci_noop, 259 ehci_root_ctrl_done, 260 }; 261 262 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 263 ehci_root_intr_transfer, 264 ehci_root_intr_start, 265 ehci_root_intr_abort, 266 ehci_root_intr_close, 267 ehci_noop, 268 ehci_root_intr_done, 269 }; 270 271 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 272 ehci_device_ctrl_transfer, 273 ehci_device_ctrl_start, 274 ehci_device_ctrl_abort, 275 ehci_device_ctrl_close, 276 ehci_noop, 277 ehci_device_ctrl_done, 278 }; 279 280 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 281 ehci_device_intr_transfer, 282 ehci_device_intr_start, 283 ehci_device_intr_abort, 284 ehci_device_intr_close, 285 ehci_device_clear_toggle, 286 ehci_device_intr_done, 287 }; 288 289 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 290 ehci_device_bulk_transfer, 291 ehci_device_bulk_start, 292 ehci_device_bulk_abort, 293 ehci_device_bulk_close, 294 ehci_device_clear_toggle, 295 ehci_device_bulk_done, 296 }; 297 298 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 299 ehci_device_isoc_transfer, 300 ehci_device_isoc_start, 301 ehci_device_isoc_abort, 302 ehci_device_isoc_close, 303 ehci_noop, 304 ehci_device_isoc_done, 305 }; 306 307 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 308 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 309 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 310 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 311 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 312 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 313 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 314 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 315 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 316 }; 317 318 usbd_status 319 ehci_init(ehci_softc_t *sc) 320 { 321 u_int32_t vers, sparams, cparams, hcr; 322 u_int i; 323 usbd_status err; 324 ehci_soft_qh_t *sqh; 325 u_int ncomp; 326 327 DPRINTF(("ehci_init: start\n")); 328 #ifdef EHCI_DEBUG 329 theehci = sc; 330 #endif 331 332 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 333 334 vers = EREAD2(sc, EHCI_HCIVERSION); 335 aprint_verbose("%s: EHCI version %x.%x\n", device_xname(sc->sc_dev), 336 vers >> 8, vers & 0xff); 337 338 sparams = EREAD4(sc, EHCI_HCSPARAMS); 339 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 340 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 341 ncomp = EHCI_HCS_N_CC(sparams); 342 if (ncomp != sc->sc_ncomp) { 343 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 344 device_xname(sc->sc_dev), ncomp, sc->sc_ncomp); 345 #if NOHCI == 0 || NUHCI == 0 346 aprint_error("%s: ohci or uhci probably not configured\n", 347 device_xname(sc->sc_dev)); 348 #endif 349 if (ncomp < sc->sc_ncomp) 350 sc->sc_ncomp = ncomp; 351 } 352 if (sc->sc_ncomp > 0) { 353 aprint_normal("%s: companion controller%s, %d port%s each:", 354 device_xname(sc->sc_dev), sc->sc_ncomp!=1 ? "s" : "", 355 EHCI_HCS_N_PCC(sparams), 356 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 357 for (i = 0; i < sc->sc_ncomp; i++) 358 aprint_normal(" %s", device_xname(sc->sc_comps[i])); 359 aprint_normal("\n"); 360 } 361 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 362 cparams = EREAD4(sc, EHCI_HCCPARAMS); 363 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 364 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 365 366 if (EHCI_HCC_64BIT(cparams)) { 367 /* MUST clear segment register if 64 bit capable. */ 368 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 369 } 370 371 sc->sc_bus.usbrev = USBREV_2_0; 372 373 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 374 USB_MEM_RESERVE); 375 376 /* Reset the controller */ 377 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 378 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 379 usb_delay_ms(&sc->sc_bus, 1); 380 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 381 for (i = 0; i < 100; i++) { 382 usb_delay_ms(&sc->sc_bus, 1); 383 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 384 if (!hcr) 385 break; 386 } 387 if (hcr) { 388 aprint_error("%s: reset timeout\n", device_xname(sc->sc_dev)); 389 return (USBD_IOERROR); 390 } 391 392 /* XXX need proper intr scheduling */ 393 sc->sc_rand = 96; 394 395 /* frame list size at default, read back what we got and use that */ 396 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 397 case 0: sc->sc_flsize = 1024; break; 398 case 1: sc->sc_flsize = 512; break; 399 case 2: sc->sc_flsize = 256; break; 400 case 3: return (USBD_IOERROR); 401 } 402 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 403 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 404 if (err) 405 return (err); 406 DPRINTF(("%s: flsize=%d\n", device_xname(sc->sc_dev),sc->sc_flsize)); 407 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 408 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 409 410 /* Set up the bus struct. */ 411 sc->sc_bus.methods = &ehci_bus_methods; 412 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 413 414 sc->sc_eintrs = EHCI_NORMAL_INTRS; 415 416 /* 417 * Allocate the interrupt dummy QHs. These are arranged to give poll 418 * intervals that are powers of 2 times 1ms. 419 */ 420 for (i = 0; i < EHCI_INTRQHS; i++) { 421 sqh = ehci_alloc_sqh(sc); 422 if (sqh == NULL) { 423 err = USBD_NOMEM; 424 goto bad1; 425 } 426 sc->sc_islots[i].sqh = sqh; 427 } 428 for (i = 0; i < EHCI_INTRQHS; i++) { 429 sqh = sc->sc_islots[i].sqh; 430 if (i == 0) { 431 /* The last (1ms) QH terminates. */ 432 sqh->qh.qh_link = EHCI_NULL; 433 sqh->next = NULL; 434 } else { 435 /* Otherwise the next QH has half the poll interval */ 436 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 437 sqh->qh.qh_link = htole32(sqh->next->physaddr | 438 EHCI_LINK_QH); 439 } 440 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 441 sqh->qh.qh_curqtd = EHCI_NULL; 442 sqh->next = NULL; 443 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 444 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 445 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 446 sqh->sqtd = NULL; 447 } 448 /* Point the frame list at the last level (128ms). */ 449 for (i = 0; i < sc->sc_flsize; i++) { 450 int j; 451 452 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 453 revbits[i & (EHCI_MAX_POLLRATE-1)]; 454 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 455 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 456 i)].sqh->physaddr); 457 } 458 459 /* Allocate dummy QH that starts the async list. */ 460 sqh = ehci_alloc_sqh(sc); 461 if (sqh == NULL) { 462 err = USBD_NOMEM; 463 goto bad1; 464 } 465 /* Fill the QH */ 466 sqh->qh.qh_endp = 467 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 468 sqh->qh.qh_link = 469 htole32(sqh->physaddr | EHCI_LINK_QH); 470 sqh->qh.qh_curqtd = EHCI_NULL; 471 sqh->next = NULL; 472 /* Fill the overlay qTD */ 473 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 474 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 475 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 476 sqh->sqtd = NULL; 477 #ifdef EHCI_DEBUG 478 if (ehcidebug) { 479 ehci_dump_sqh(sqh); 480 } 481 #endif 482 483 /* Point to async list */ 484 sc->sc_async_head = sqh; 485 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 486 487 usb_callout_init(sc->sc_tmo_intrlist); 488 489 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 490 491 /* Turn on controller */ 492 EOWRITE4(sc, EHCI_USBCMD, 493 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 494 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 495 EHCI_CMD_ASE | 496 EHCI_CMD_PSE | 497 EHCI_CMD_RS); 498 499 /* Take over port ownership */ 500 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 501 502 for (i = 0; i < 100; i++) { 503 usb_delay_ms(&sc->sc_bus, 1); 504 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 505 if (!hcr) 506 break; 507 } 508 if (hcr) { 509 aprint_error("%s: run timeout\n", device_xname(sc->sc_dev)); 510 return (USBD_IOERROR); 511 } 512 513 /* Enable interrupts */ 514 DPRINTFN(1,("ehci_init: enabling\n")); 515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 516 517 return (USBD_NORMAL_COMPLETION); 518 519 #if 0 520 bad2: 521 ehci_free_sqh(sc, sc->sc_async_head); 522 #endif 523 bad1: 524 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 525 return (err); 526 } 527 528 int 529 ehci_intr(void *v) 530 { 531 ehci_softc_t *sc = v; 532 533 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 534 return (0); 535 536 /* If we get an interrupt while polling, then just ignore it. */ 537 if (sc->sc_bus.use_polling) { 538 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 539 540 if (intrs) 541 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 542 #ifdef DIAGNOSTIC 543 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 544 #endif 545 return (0); 546 } 547 548 return (ehci_intr1(sc)); 549 } 550 551 Static int 552 ehci_intr1(ehci_softc_t *sc) 553 { 554 u_int32_t intrs, eintrs; 555 556 DPRINTFN(20,("ehci_intr1: enter\n")); 557 558 /* In case the interrupt occurs before initialization has completed. */ 559 if (sc == NULL) { 560 #ifdef DIAGNOSTIC 561 printf("ehci_intr1: sc == NULL\n"); 562 #endif 563 return (0); 564 } 565 566 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 567 if (!intrs) 568 return (0); 569 570 eintrs = intrs & sc->sc_eintrs; 571 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 572 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 573 (u_int)eintrs)); 574 if (!eintrs) 575 return (0); 576 577 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 578 sc->sc_bus.intr_context++; 579 sc->sc_bus.no_intrs++; 580 if (eintrs & EHCI_STS_IAA) { 581 DPRINTF(("ehci_intr1: door bell\n")); 582 wakeup(&sc->sc_async_head); 583 eintrs &= ~EHCI_STS_IAA; 584 } 585 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 586 DPRINTFN(5,("ehci_intr1: %s %s\n", 587 eintrs & EHCI_STS_INT ? "INT" : "", 588 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 589 usb_schedsoftintr(&sc->sc_bus); 590 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 591 } 592 if (eintrs & EHCI_STS_HSE) { 593 printf("%s: unrecoverable error, controller halted\n", 594 device_xname(sc->sc_dev)); 595 /* XXX what else */ 596 } 597 if (eintrs & EHCI_STS_PCD) { 598 ehci_pcd(sc, sc->sc_intrxfer); 599 eintrs &= ~EHCI_STS_PCD; 600 } 601 602 sc->sc_bus.intr_context--; 603 604 if (eintrs != 0) { 605 /* Block unprocessed interrupts. */ 606 sc->sc_eintrs &= ~eintrs; 607 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 608 printf("%s: blocking intrs 0x%x\n", 609 device_xname(sc->sc_dev), eintrs); 610 } 611 612 return (1); 613 } 614 615 616 void 617 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 618 { 619 usbd_pipe_handle pipe; 620 u_char *p; 621 int i, m; 622 623 if (xfer == NULL) { 624 /* Just ignore the change. */ 625 return; 626 } 627 628 pipe = xfer->pipe; 629 630 p = KERNADDR(&xfer->dmabuf, 0); 631 m = min(sc->sc_noport, xfer->length * 8 - 1); 632 memset(p, 0, xfer->length); 633 for (i = 1; i <= m; i++) { 634 /* Pick out CHANGE bits from the status reg. */ 635 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 636 p[i/8] |= 1 << (i%8); 637 } 638 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 639 xfer->actlen = xfer->length; 640 xfer->status = USBD_NORMAL_COMPLETION; 641 642 usb_transfer_complete(xfer); 643 } 644 645 void 646 ehci_softintr(void *v) 647 { 648 struct usbd_bus *bus = v; 649 ehci_softc_t *sc = bus->hci_private; 650 struct ehci_xfer *ex, *nextex; 651 652 DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_xname(sc->sc_dev), 653 sc->sc_bus.intr_context)); 654 655 sc->sc_bus.intr_context++; 656 657 /* 658 * The only explanation I can think of for why EHCI is as brain dead 659 * as UHCI interrupt-wise is that Intel was involved in both. 660 * An interrupt just tells us that something is done, we have no 661 * clue what, so we need to scan through all active transfers. :-( 662 */ 663 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 664 nextex = LIST_NEXT(ex, inext); 665 ehci_check_intr(sc, ex); 666 } 667 668 /* Schedule a callout to catch any dropped transactions. */ 669 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 670 !LIST_EMPTY(&sc->sc_intrhead)) 671 usb_callout(sc->sc_tmo_intrlist, hz, 672 ehci_intrlist_timeout, sc); 673 674 #ifdef USB_USE_SOFTINTR 675 if (sc->sc_softwake) { 676 sc->sc_softwake = 0; 677 wakeup(&sc->sc_softwake); 678 } 679 #endif /* USB_USE_SOFTINTR */ 680 681 sc->sc_bus.intr_context--; 682 } 683 684 /* Check for an interrupt. */ 685 void 686 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 687 { 688 ehci_soft_qtd_t *sqtd, *lsqtd; 689 u_int32_t status; 690 691 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 692 693 if (ex->sqtdstart == NULL) { 694 printf("ehci_check_intr: sqtdstart=NULL\n"); 695 return; 696 } 697 lsqtd = ex->sqtdend; 698 #ifdef DIAGNOSTIC 699 if (lsqtd == NULL) { 700 printf("ehci_check_intr: lsqtd==0\n"); 701 return; 702 } 703 #endif 704 /* 705 * If the last TD is still active we need to check whether there 706 * is a an error somewhere in the middle, or whether there was a 707 * short packet (SPD and not ACTIVE). 708 */ 709 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 710 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 711 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 712 status = le32toh(sqtd->qtd.qtd_status); 713 /* If there's an active QTD the xfer isn't done. */ 714 if (status & EHCI_QTD_ACTIVE) 715 break; 716 /* Any kind of error makes the xfer done. */ 717 if (status & EHCI_QTD_HALTED) 718 goto done; 719 /* We want short packets, and it is short: it's done */ 720 if (EHCI_QTD_GET_BYTES(status) != 0) 721 goto done; 722 } 723 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 724 ex, ex->sqtdstart)); 725 return; 726 } 727 done: 728 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 729 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 730 ehci_idone(ex); 731 } 732 733 void 734 ehci_idone(struct ehci_xfer *ex) 735 { 736 usbd_xfer_handle xfer = &ex->xfer; 737 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 738 ehci_soft_qtd_t *sqtd, *lsqtd; 739 u_int32_t status = 0, nstatus = 0; 740 int actlen; 741 742 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 743 #ifdef DIAGNOSTIC 744 { 745 int s = splhigh(); 746 if (ex->isdone) { 747 splx(s); 748 #ifdef EHCI_DEBUG 749 printf("ehci_idone: ex is done!\n "); 750 ehci_dump_exfer(ex); 751 #else 752 printf("ehci_idone: ex=%p is done!\n", ex); 753 #endif 754 return; 755 } 756 ex->isdone = 1; 757 splx(s); 758 } 759 #endif 760 761 if (xfer->status == USBD_CANCELLED || 762 xfer->status == USBD_TIMEOUT) { 763 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 764 return; 765 } 766 767 #ifdef EHCI_DEBUG 768 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 769 if (ehcidebug > 10) 770 ehci_dump_sqtds(ex->sqtdstart); 771 #endif 772 773 /* The transfer is done, compute actual length and status. */ 774 lsqtd = ex->sqtdend; 775 actlen = 0; 776 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 777 nstatus = le32toh(sqtd->qtd.qtd_status); 778 if (nstatus & EHCI_QTD_ACTIVE) 779 break; 780 781 status = nstatus; 782 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 783 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 784 } 785 786 /* 787 * If there are left over TDs we need to update the toggle. 788 * The default pipe doesn't need it since control transfers 789 * start the toggle at 0 every time. 790 * For a short transfer we need to update the toggle for the missing 791 * packets within the qTD. 792 */ 793 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 794 xfer->pipe->device->default_pipe != xfer->pipe) { 795 DPRINTFN(2, ("ehci_idone: need toggle update " 796 "status=%08x nstatus=%08x\n", status, nstatus)); 797 #if 0 798 ehci_dump_sqh(epipe->sqh); 799 ehci_dump_sqtds(ex->sqtdstart); 800 #endif 801 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 802 } 803 804 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 805 xfer->length, actlen, status)); 806 xfer->actlen = actlen; 807 if (status & EHCI_QTD_HALTED) { 808 #ifdef EHCI_DEBUG 809 char sbuf[128]; 810 811 bitmask_snprintf((u_int32_t)status, 812 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 813 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 814 815 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 816 "status 0x%s\n", 817 xfer->pipe->device->address, 818 xfer->pipe->endpoint->edesc->bEndpointAddress, 819 sbuf)); 820 if (ehcidebug > 2) { 821 ehci_dump_sqh(epipe->sqh); 822 ehci_dump_sqtds(ex->sqtdstart); 823 } 824 #endif 825 /* low&full speed has an extra error flag */ 826 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 827 EHCI_QH_SPEED_HIGH) 828 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 829 else 830 status &= EHCI_QTD_STATERRS; 831 if (status == 0) /* no other errors means a stall */ 832 xfer->status = USBD_STALLED; 833 else 834 xfer->status = USBD_IOERROR; /* more info XXX */ 835 /* XXX need to reset TT on missed microframe */ 836 if (status & EHCI_QTD_MISSEDMICRO) { 837 ehci_softc_t *sc = 838 xfer->pipe->device->bus->hci_private; 839 840 printf("%s: missed microframe, TT reset not " 841 "implemented, hub might be inoperational\n", 842 device_xname(sc->sc_dev)); 843 } 844 } else { 845 xfer->status = USBD_NORMAL_COMPLETION; 846 } 847 848 usb_transfer_complete(xfer); 849 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 850 } 851 852 /* 853 * Wait here until controller claims to have an interrupt. 854 * Then call ehci_intr and return. Use timeout to avoid waiting 855 * too long. 856 */ 857 void 858 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 859 { 860 int timo; 861 u_int32_t intrs; 862 863 xfer->status = USBD_IN_PROGRESS; 864 for (timo = xfer->timeout; timo >= 0; timo--) { 865 usb_delay_ms(&sc->sc_bus, 1); 866 if (sc->sc_dying) 867 break; 868 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 869 sc->sc_eintrs; 870 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 871 #ifdef EHCI_DEBUG 872 if (ehcidebug > 15) 873 ehci_dump_regs(sc); 874 #endif 875 if (intrs) { 876 ehci_intr1(sc); 877 if (xfer->status != USBD_IN_PROGRESS) 878 return; 879 } 880 } 881 882 /* Timeout */ 883 DPRINTF(("ehci_waitintr: timeout\n")); 884 xfer->status = USBD_TIMEOUT; 885 usb_transfer_complete(xfer); 886 /* XXX should free TD */ 887 } 888 889 void 890 ehci_poll(struct usbd_bus *bus) 891 { 892 ehci_softc_t *sc = bus->hci_private; 893 #ifdef EHCI_DEBUG 894 static int last; 895 int new; 896 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 897 if (new != last) { 898 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 899 last = new; 900 } 901 #endif 902 903 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 904 ehci_intr1(sc); 905 } 906 907 void 908 ehci_childdet(device_t self, device_t child) 909 { 910 struct ehci_softc *sc = device_private(self); 911 912 KASSERT(sc->sc_child == child); 913 sc->sc_child = NULL; 914 } 915 916 int 917 ehci_detach(struct ehci_softc *sc, int flags) 918 { 919 int rv = 0; 920 921 if (sc->sc_child != NULL) 922 rv = config_detach(sc->sc_child, flags); 923 924 if (rv != 0) 925 return (rv); 926 927 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 928 929 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 930 931 /* XXX free other data structures XXX */ 932 mutex_destroy(&sc->sc_doorbell_lock); 933 934 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 935 936 return (rv); 937 } 938 939 940 int 941 ehci_activate(device_t self, enum devact act) 942 { 943 struct ehci_softc *sc = device_private(self); 944 int rv = 0; 945 946 switch (act) { 947 case DVACT_ACTIVATE: 948 return (EOPNOTSUPP); 949 950 case DVACT_DEACTIVATE: 951 sc->sc_dying = 1; 952 if (sc->sc_child != NULL) 953 rv = config_deactivate(sc->sc_child); 954 break; 955 } 956 return (rv); 957 } 958 959 /* 960 * Handle suspend/resume. 961 * 962 * We need to switch to polling mode here, because this routine is 963 * called from an interrupt context. This is all right since we 964 * are almost suspended anyway. 965 * 966 * Note that this power handler isn't to be registered directly; the 967 * bus glue needs to call out to it. 968 */ 969 bool 970 ehci_suspend(device_t dv PMF_FN_ARGS) 971 { 972 ehci_softc_t *sc = device_private(dv); 973 int i, s; 974 uint32_t cmd, hcr; 975 976 s = splhardusb(); 977 978 sc->sc_bus.use_polling++; 979 980 for (i = 1; i <= sc->sc_noport; i++) { 981 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 982 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 983 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 984 } 985 986 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 987 988 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 989 EOWRITE4(sc, EHCI_USBCMD, cmd); 990 991 for (i = 0; i < 100; i++) { 992 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 993 if (hcr == 0) 994 break; 995 996 usb_delay_ms(&sc->sc_bus, 1); 997 } 998 if (hcr != 0) 999 printf("%s: reset timeout\n", device_xname(dv)); 1000 1001 cmd &= ~EHCI_CMD_RS; 1002 EOWRITE4(sc, EHCI_USBCMD, cmd); 1003 1004 for (i = 0; i < 100; i++) { 1005 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1006 if (hcr == EHCI_STS_HCH) 1007 break; 1008 1009 usb_delay_ms(&sc->sc_bus, 1); 1010 } 1011 if (hcr != EHCI_STS_HCH) 1012 printf("%s: config timeout\n", device_xname(dv)); 1013 1014 sc->sc_bus.use_polling--; 1015 splx(s); 1016 1017 return true; 1018 } 1019 1020 bool 1021 ehci_resume(device_t dv PMF_FN_ARGS) 1022 { 1023 ehci_softc_t *sc = device_private(dv); 1024 int i; 1025 uint32_t cmd, hcr; 1026 1027 /* restore things in case the bios sucks */ 1028 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1029 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1030 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1031 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1032 1033 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE); 1034 1035 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1036 1037 hcr = 0; 1038 for (i = 1; i <= sc->sc_noport; i++) { 1039 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1040 if ((cmd & EHCI_PS_PO) == 0 && 1041 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1042 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1043 hcr = 1; 1044 } 1045 } 1046 1047 if (hcr) { 1048 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1049 1050 for (i = 1; i <= sc->sc_noport; i++) { 1051 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1052 if ((cmd & EHCI_PS_PO) == 0 && 1053 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1054 EOWRITE4(sc, EHCI_PORTSC(i), 1055 cmd & ~EHCI_PS_FPR); 1056 } 1057 } 1058 1059 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1060 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1061 1062 for (i = 0; i < 100; i++) { 1063 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1064 if (hcr != EHCI_STS_HCH) 1065 break; 1066 1067 usb_delay_ms(&sc->sc_bus, 1); 1068 } 1069 if (hcr == EHCI_STS_HCH) 1070 printf("%s: config timeout\n", device_xname(dv)); 1071 1072 return true; 1073 } 1074 1075 /* 1076 * Shut down the controller when the system is going down. 1077 */ 1078 bool 1079 ehci_shutdown(device_t self, int flags) 1080 { 1081 ehci_softc_t *sc = device_private(self); 1082 1083 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1084 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1085 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1086 return true; 1087 } 1088 1089 usbd_status 1090 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1091 { 1092 struct ehci_softc *sc = bus->hci_private; 1093 usbd_status err; 1094 1095 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1096 if (err == USBD_NOMEM) 1097 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1098 #ifdef EHCI_DEBUG 1099 if (err) 1100 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1101 #endif 1102 return (err); 1103 } 1104 1105 void 1106 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1107 { 1108 struct ehci_softc *sc = bus->hci_private; 1109 1110 if (dma->block->flags & USB_DMA_RESERVE) { 1111 usb_reserve_freem(&sc->sc_dma_reserve, 1112 dma); 1113 return; 1114 } 1115 usb_freemem(&sc->sc_bus, dma); 1116 } 1117 1118 usbd_xfer_handle 1119 ehci_allocx(struct usbd_bus *bus) 1120 { 1121 struct ehci_softc *sc = bus->hci_private; 1122 usbd_xfer_handle xfer; 1123 1124 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1125 if (xfer != NULL) { 1126 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1127 #ifdef DIAGNOSTIC 1128 if (xfer->busy_free != XFER_FREE) { 1129 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1130 xfer->busy_free); 1131 } 1132 #endif 1133 } else { 1134 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1135 } 1136 if (xfer != NULL) { 1137 memset(xfer, 0, sizeof(struct ehci_xfer)); 1138 #ifdef DIAGNOSTIC 1139 EXFER(xfer)->isdone = 1; 1140 xfer->busy_free = XFER_BUSY; 1141 #endif 1142 } 1143 return (xfer); 1144 } 1145 1146 void 1147 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1148 { 1149 struct ehci_softc *sc = bus->hci_private; 1150 1151 #ifdef DIAGNOSTIC 1152 if (xfer->busy_free != XFER_BUSY) { 1153 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1154 xfer->busy_free); 1155 } 1156 xfer->busy_free = XFER_FREE; 1157 if (!EXFER(xfer)->isdone) { 1158 printf("ehci_freex: !isdone\n"); 1159 } 1160 #endif 1161 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1162 } 1163 1164 Static void 1165 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1166 { 1167 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1168 1169 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1170 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1171 #ifdef USB_DEBUG 1172 if (ehcidebug) 1173 usbd_dump_pipe(pipe); 1174 #endif 1175 epipe->nexttoggle = 0; 1176 } 1177 1178 Static void 1179 ehci_noop(usbd_pipe_handle pipe) 1180 { 1181 } 1182 1183 #ifdef EHCI_DEBUG 1184 void 1185 ehci_dump_regs(ehci_softc_t *sc) 1186 { 1187 int i; 1188 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1189 EOREAD4(sc, EHCI_USBCMD), 1190 EOREAD4(sc, EHCI_USBSTS), 1191 EOREAD4(sc, EHCI_USBINTR)); 1192 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1193 EOREAD4(sc, EHCI_FRINDEX), 1194 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1195 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1196 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1197 for (i = 1; i <= sc->sc_noport; i++) 1198 printf("port %d status=0x%08x\n", i, 1199 EOREAD4(sc, EHCI_PORTSC(i))); 1200 } 1201 1202 /* 1203 * Unused function - this is meant to be called from a kernel 1204 * debugger. 1205 */ 1206 void 1207 ehci_dump() 1208 { 1209 ehci_dump_regs(theehci); 1210 } 1211 1212 void 1213 ehci_dump_link(ehci_link_t link, int type) 1214 { 1215 link = le32toh(link); 1216 printf("0x%08x", link); 1217 if (link & EHCI_LINK_TERMINATE) 1218 printf("<T>"); 1219 else { 1220 printf("<"); 1221 if (type) { 1222 switch (EHCI_LINK_TYPE(link)) { 1223 case EHCI_LINK_ITD: printf("ITD"); break; 1224 case EHCI_LINK_QH: printf("QH"); break; 1225 case EHCI_LINK_SITD: printf("SITD"); break; 1226 case EHCI_LINK_FSTN: printf("FSTN"); break; 1227 } 1228 } 1229 printf(">"); 1230 } 1231 } 1232 1233 void 1234 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1235 { 1236 int i; 1237 u_int32_t stop; 1238 1239 stop = 0; 1240 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1241 ehci_dump_sqtd(sqtd); 1242 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1243 } 1244 if (sqtd) 1245 printf("dump aborted, too many TDs\n"); 1246 } 1247 1248 void 1249 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1250 { 1251 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1252 ehci_dump_qtd(&sqtd->qtd); 1253 } 1254 1255 void 1256 ehci_dump_qtd(ehci_qtd_t *qtd) 1257 { 1258 u_int32_t s; 1259 char sbuf[128]; 1260 1261 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1262 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1263 printf("\n"); 1264 s = le32toh(qtd->qtd_status); 1265 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1266 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1267 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1268 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1269 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1270 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1271 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1272 EHCI_QTD_GET_PID(s), sbuf); 1273 for (s = 0; s < 5; s++) 1274 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1275 } 1276 1277 void 1278 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1279 { 1280 ehci_qh_t *qh = &sqh->qh; 1281 u_int32_t endp, endphub; 1282 1283 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1284 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1285 endp = le32toh(qh->qh_endp); 1286 printf(" endp=0x%08x\n", endp); 1287 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1288 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1289 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1290 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1291 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1292 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1293 EHCI_QH_GET_NRL(endp)); 1294 endphub = le32toh(qh->qh_endphub); 1295 printf(" endphub=0x%08x\n", endphub); 1296 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1297 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1298 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1299 EHCI_QH_GET_MULT(endphub)); 1300 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1301 printf("Overlay qTD:\n"); 1302 ehci_dump_qtd(&qh->qh_qtd); 1303 } 1304 1305 #ifdef DIAGNOSTIC 1306 Static void 1307 ehci_dump_exfer(struct ehci_xfer *ex) 1308 { 1309 printf("ehci_dump_exfer: ex=%p\n", ex); 1310 } 1311 #endif 1312 #endif 1313 1314 usbd_status 1315 ehci_open(usbd_pipe_handle pipe) 1316 { 1317 usbd_device_handle dev = pipe->device; 1318 ehci_softc_t *sc = dev->bus->hci_private; 1319 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1320 u_int8_t addr = dev->address; 1321 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1322 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1323 ehci_soft_qh_t *sqh; 1324 usbd_status err; 1325 int s; 1326 int ival, speed, naks; 1327 int hshubaddr, hshubport; 1328 1329 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1330 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1331 1332 if (dev->myhsport) { 1333 hshubaddr = dev->myhsport->parent->address; 1334 hshubport = dev->myhsport->portno; 1335 } else { 1336 hshubaddr = 0; 1337 hshubport = 0; 1338 } 1339 1340 if (sc->sc_dying) 1341 return (USBD_IOERROR); 1342 1343 epipe->nexttoggle = 0; 1344 1345 if (addr == sc->sc_addr) { 1346 switch (ed->bEndpointAddress) { 1347 case USB_CONTROL_ENDPOINT: 1348 pipe->methods = &ehci_root_ctrl_methods; 1349 break; 1350 case UE_DIR_IN | EHCI_INTR_ENDPT: 1351 pipe->methods = &ehci_root_intr_methods; 1352 break; 1353 default: 1354 return (USBD_INVAL); 1355 } 1356 return (USBD_NORMAL_COMPLETION); 1357 } 1358 1359 /* XXX All this stuff is only valid for async. */ 1360 switch (dev->speed) { 1361 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1362 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1363 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1364 default: panic("ehci_open: bad device speed %d", dev->speed); 1365 } 1366 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1367 printf("%s: *** WARNING: opening low/full speed isoc device, " 1368 "this does not work yet.\n", 1369 device_xname(sc->sc_dev)); 1370 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1371 hshubaddr, hshubport)); 1372 return USBD_INVAL; 1373 } 1374 1375 naks = 8; /* XXX */ 1376 sqh = ehci_alloc_sqh(sc); 1377 if (sqh == NULL) 1378 return (USBD_NOMEM); 1379 /* qh_link filled when the QH is added */ 1380 sqh->qh.qh_endp = htole32( 1381 EHCI_QH_SET_ADDR(addr) | 1382 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1383 EHCI_QH_SET_EPS(speed) | 1384 EHCI_QH_DTC | 1385 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1386 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1387 EHCI_QH_CTL : 0) | 1388 EHCI_QH_SET_NRL(naks) 1389 ); 1390 sqh->qh.qh_endphub = htole32( 1391 EHCI_QH_SET_MULT(1) | 1392 EHCI_QH_SET_HUBA(hshubaddr) | 1393 EHCI_QH_SET_PORT(hshubport) | 1394 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1395 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1396 ); 1397 sqh->qh.qh_curqtd = EHCI_NULL; 1398 /* Fill the overlay qTD */ 1399 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1400 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1401 sqh->qh.qh_qtd.qtd_status = htole32(0); 1402 1403 epipe->sqh = sqh; 1404 1405 switch (xfertype) { 1406 case UE_CONTROL: 1407 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1408 0, &epipe->u.ctl.reqdma); 1409 #ifdef EHCI_DEBUG 1410 if (err) 1411 printf("ehci_open: usb_allocmem()=%d\n", err); 1412 #endif 1413 if (err) 1414 goto bad; 1415 pipe->methods = &ehci_device_ctrl_methods; 1416 s = splusb(); 1417 ehci_add_qh(sqh, sc->sc_async_head); 1418 splx(s); 1419 break; 1420 case UE_BULK: 1421 pipe->methods = &ehci_device_bulk_methods; 1422 s = splusb(); 1423 ehci_add_qh(sqh, sc->sc_async_head); 1424 splx(s); 1425 break; 1426 case UE_INTERRUPT: 1427 pipe->methods = &ehci_device_intr_methods; 1428 ival = pipe->interval; 1429 if (ival == USBD_DEFAULT_INTERVAL) { 1430 if (speed == EHCI_QH_SPEED_HIGH) { 1431 if (ed->bInterval > 16) { 1432 /* 1433 * illegal with high-speed, but there 1434 * were documentation bugs in the spec, 1435 * so be generous 1436 */ 1437 ival = 256; 1438 } else 1439 ival = (1 << (ed->bInterval - 1)) / 8; 1440 } else 1441 ival = ed->bInterval; 1442 } 1443 err = ehci_device_setintr(sc, sqh, ival); 1444 if (err) 1445 goto bad; 1446 break; 1447 case UE_ISOCHRONOUS: 1448 pipe->methods = &ehci_device_isoc_methods; 1449 /* FALLTHROUGH */ 1450 default: 1451 err = USBD_INVAL; 1452 goto bad; 1453 } 1454 return (USBD_NORMAL_COMPLETION); 1455 1456 bad: 1457 ehci_free_sqh(sc, sqh); 1458 return (err); 1459 } 1460 1461 /* 1462 * Add an ED to the schedule. Called at splusb(). 1463 */ 1464 void 1465 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1466 { 1467 SPLUSBCHECK; 1468 1469 sqh->next = head->next; 1470 sqh->qh.qh_link = head->qh.qh_link; 1471 head->next = sqh; 1472 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1473 1474 #ifdef EHCI_DEBUG 1475 if (ehcidebug > 5) { 1476 printf("ehci_add_qh:\n"); 1477 ehci_dump_sqh(sqh); 1478 } 1479 #endif 1480 } 1481 1482 /* 1483 * Remove an ED from the schedule. Called at splusb(). 1484 */ 1485 void 1486 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1487 { 1488 ehci_soft_qh_t *p; 1489 1490 SPLUSBCHECK; 1491 /* XXX */ 1492 for (p = head; p != NULL && p->next != sqh; p = p->next) 1493 ; 1494 if (p == NULL) 1495 panic("ehci_rem_qh: ED not found"); 1496 p->next = sqh->next; 1497 p->qh.qh_link = sqh->qh.qh_link; 1498 1499 ehci_sync_hc(sc); 1500 } 1501 1502 void 1503 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1504 { 1505 int i; 1506 u_int32_t status; 1507 1508 /* Save toggle bit and ping status. */ 1509 status = sqh->qh.qh_qtd.qtd_status & 1510 htole32(EHCI_QTD_TOGGLE_MASK | 1511 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1512 /* Set HALTED to make hw leave it alone. */ 1513 sqh->qh.qh_qtd.qtd_status = 1514 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1515 sqh->qh.qh_curqtd = 0; 1516 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1517 sqh->qh.qh_qtd.qtd_altnext = 0; 1518 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1519 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1520 sqh->sqtd = sqtd; 1521 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1522 sqh->qh.qh_qtd.qtd_status = status; 1523 } 1524 1525 /* 1526 * Ensure that the HC has released all references to the QH. We do this 1527 * by asking for a Async Advance Doorbell interrupt and then we wait for 1528 * the interrupt. 1529 * To make this easier we first obtain exclusive use of the doorbell. 1530 */ 1531 void 1532 ehci_sync_hc(ehci_softc_t *sc) 1533 { 1534 int s, error; 1535 1536 if (sc->sc_dying) { 1537 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1538 return; 1539 } 1540 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1541 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1542 s = splhardusb(); 1543 /* ask for doorbell */ 1544 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1545 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1546 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1547 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1548 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1549 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1550 splx(s); 1551 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1552 #ifdef DIAGNOSTIC 1553 if (error) 1554 printf("ehci_sync_hc: tsleep() = %d\n", error); 1555 #endif 1556 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1557 } 1558 1559 /***********/ 1560 1561 /* 1562 * Data structures and routines to emulate the root hub. 1563 */ 1564 Static usb_device_descriptor_t ehci_devd = { 1565 USB_DEVICE_DESCRIPTOR_SIZE, 1566 UDESC_DEVICE, /* type */ 1567 {0x00, 0x02}, /* USB version */ 1568 UDCLASS_HUB, /* class */ 1569 UDSUBCLASS_HUB, /* subclass */ 1570 UDPROTO_HSHUBSTT, /* protocol */ 1571 64, /* max packet */ 1572 {0},{0},{0x00,0x01}, /* device id */ 1573 1,2,0, /* string indicies */ 1574 1 /* # of configurations */ 1575 }; 1576 1577 Static const usb_device_qualifier_t ehci_odevd = { 1578 USB_DEVICE_DESCRIPTOR_SIZE, 1579 UDESC_DEVICE_QUALIFIER, /* type */ 1580 {0x00, 0x02}, /* USB version */ 1581 UDCLASS_HUB, /* class */ 1582 UDSUBCLASS_HUB, /* subclass */ 1583 UDPROTO_FSHUB, /* protocol */ 1584 64, /* max packet */ 1585 1, /* # of configurations */ 1586 0 1587 }; 1588 1589 Static const usb_config_descriptor_t ehci_confd = { 1590 USB_CONFIG_DESCRIPTOR_SIZE, 1591 UDESC_CONFIG, 1592 {USB_CONFIG_DESCRIPTOR_SIZE + 1593 USB_INTERFACE_DESCRIPTOR_SIZE + 1594 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1595 1, 1596 1, 1597 0, 1598 UC_ATTR_MBO | UC_SELF_POWERED, 1599 0 /* max power */ 1600 }; 1601 1602 Static const usb_interface_descriptor_t ehci_ifcd = { 1603 USB_INTERFACE_DESCRIPTOR_SIZE, 1604 UDESC_INTERFACE, 1605 0, 1606 0, 1607 1, 1608 UICLASS_HUB, 1609 UISUBCLASS_HUB, 1610 UIPROTO_HSHUBSTT, 1611 0 1612 }; 1613 1614 Static const usb_endpoint_descriptor_t ehci_endpd = { 1615 USB_ENDPOINT_DESCRIPTOR_SIZE, 1616 UDESC_ENDPOINT, 1617 UE_DIR_IN | EHCI_INTR_ENDPT, 1618 UE_INTERRUPT, 1619 {8, 0}, /* max packet */ 1620 12 1621 }; 1622 1623 Static const usb_hub_descriptor_t ehci_hubd = { 1624 USB_HUB_DESCRIPTOR_SIZE, 1625 UDESC_HUB, 1626 0, 1627 {0,0}, 1628 0, 1629 0, 1630 {""}, 1631 {""}, 1632 }; 1633 1634 /* 1635 * Simulate a hardware hub by handling all the necessary requests. 1636 */ 1637 Static usbd_status 1638 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1639 { 1640 usbd_status err; 1641 1642 /* Insert last in queue. */ 1643 err = usb_insert_transfer(xfer); 1644 if (err) 1645 return (err); 1646 1647 /* Pipe isn't running, start first */ 1648 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1649 } 1650 1651 Static usbd_status 1652 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1653 { 1654 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1655 usb_device_request_t *req; 1656 void *buf = NULL; 1657 int port, i; 1658 int s, len, value, index, l, totlen = 0; 1659 usb_port_status_t ps; 1660 usb_hub_descriptor_t hubd; 1661 usbd_status err; 1662 u_int32_t v; 1663 1664 if (sc->sc_dying) 1665 return (USBD_IOERROR); 1666 1667 #ifdef DIAGNOSTIC 1668 if (!(xfer->rqflags & URQ_REQUEST)) 1669 /* XXX panic */ 1670 return (USBD_INVAL); 1671 #endif 1672 req = &xfer->request; 1673 1674 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1675 req->bmRequestType, req->bRequest)); 1676 1677 len = UGETW(req->wLength); 1678 value = UGETW(req->wValue); 1679 index = UGETW(req->wIndex); 1680 1681 if (len != 0) 1682 buf = KERNADDR(&xfer->dmabuf, 0); 1683 1684 #define C(x,y) ((x) | ((y) << 8)) 1685 switch(C(req->bRequest, req->bmRequestType)) { 1686 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1687 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1688 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1689 /* 1690 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1691 * for the integrated root hub. 1692 */ 1693 break; 1694 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1695 if (len > 0) { 1696 *(u_int8_t *)buf = sc->sc_conf; 1697 totlen = 1; 1698 } 1699 break; 1700 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1701 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1702 if (len == 0) 1703 break; 1704 switch(value >> 8) { 1705 case UDESC_DEVICE: 1706 if ((value & 0xff) != 0) { 1707 err = USBD_IOERROR; 1708 goto ret; 1709 } 1710 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1711 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1712 memcpy(buf, &ehci_devd, l); 1713 break; 1714 /* 1715 * We can't really operate at another speed, but the spec says 1716 * we need this descriptor. 1717 */ 1718 case UDESC_DEVICE_QUALIFIER: 1719 if ((value & 0xff) != 0) { 1720 err = USBD_IOERROR; 1721 goto ret; 1722 } 1723 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1724 memcpy(buf, &ehci_odevd, l); 1725 break; 1726 /* 1727 * We can't really operate at another speed, but the spec says 1728 * we need this descriptor. 1729 */ 1730 case UDESC_OTHER_SPEED_CONFIGURATION: 1731 case UDESC_CONFIG: 1732 if ((value & 0xff) != 0) { 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1737 memcpy(buf, &ehci_confd, l); 1738 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1739 value >> 8; 1740 buf = (char *)buf + l; 1741 len -= l; 1742 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1743 totlen += l; 1744 memcpy(buf, &ehci_ifcd, l); 1745 buf = (char *)buf + l; 1746 len -= l; 1747 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1748 totlen += l; 1749 memcpy(buf, &ehci_endpd, l); 1750 break; 1751 case UDESC_STRING: 1752 #define sd ((usb_string_descriptor_t *)buf) 1753 switch (value & 0xff) { 1754 case 0: /* Language table */ 1755 totlen = usb_makelangtbl(sd, len); 1756 break; 1757 case 1: /* Vendor */ 1758 totlen = usb_makestrdesc(sd, len, 1759 sc->sc_vendor); 1760 break; 1761 case 2: /* Product */ 1762 totlen = usb_makestrdesc(sd, len, 1763 "EHCI root hub"); 1764 break; 1765 } 1766 #undef sd 1767 break; 1768 default: 1769 err = USBD_IOERROR; 1770 goto ret; 1771 } 1772 break; 1773 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1774 if (len > 0) { 1775 *(u_int8_t *)buf = 0; 1776 totlen = 1; 1777 } 1778 break; 1779 case C(UR_GET_STATUS, UT_READ_DEVICE): 1780 if (len > 1) { 1781 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1782 totlen = 2; 1783 } 1784 break; 1785 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1786 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1787 if (len > 1) { 1788 USETW(((usb_status_t *)buf)->wStatus, 0); 1789 totlen = 2; 1790 } 1791 break; 1792 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1793 if (value >= USB_MAX_DEVICES) { 1794 err = USBD_IOERROR; 1795 goto ret; 1796 } 1797 sc->sc_addr = value; 1798 break; 1799 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1800 if (value != 0 && value != 1) { 1801 err = USBD_IOERROR; 1802 goto ret; 1803 } 1804 sc->sc_conf = value; 1805 break; 1806 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1807 break; 1808 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1809 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1810 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1811 err = USBD_IOERROR; 1812 goto ret; 1813 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1814 break; 1815 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1816 break; 1817 /* Hub requests */ 1818 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1819 break; 1820 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1821 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1822 "port=%d feature=%d\n", 1823 index, value)); 1824 if (index < 1 || index > sc->sc_noport) { 1825 err = USBD_IOERROR; 1826 goto ret; 1827 } 1828 port = EHCI_PORTSC(index); 1829 v = EOREAD4(sc, port); 1830 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1831 v &= ~EHCI_PS_CLEAR; 1832 switch(value) { 1833 case UHF_PORT_ENABLE: 1834 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1835 break; 1836 case UHF_PORT_SUSPEND: 1837 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1838 break; 1839 case UHF_PORT_POWER: 1840 if (sc->sc_hasppc) 1841 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1842 break; 1843 case UHF_PORT_TEST: 1844 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1845 "%d\n", index)); 1846 break; 1847 case UHF_PORT_INDICATOR: 1848 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1849 "%d\n", index)); 1850 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1851 break; 1852 case UHF_C_PORT_CONNECTION: 1853 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1854 break; 1855 case UHF_C_PORT_ENABLE: 1856 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1857 break; 1858 case UHF_C_PORT_SUSPEND: 1859 /* how? */ 1860 break; 1861 case UHF_C_PORT_OVER_CURRENT: 1862 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1863 break; 1864 case UHF_C_PORT_RESET: 1865 sc->sc_isreset[index] = 0; 1866 break; 1867 default: 1868 err = USBD_IOERROR; 1869 goto ret; 1870 } 1871 #if 0 1872 switch(value) { 1873 case UHF_C_PORT_CONNECTION: 1874 case UHF_C_PORT_ENABLE: 1875 case UHF_C_PORT_SUSPEND: 1876 case UHF_C_PORT_OVER_CURRENT: 1877 case UHF_C_PORT_RESET: 1878 default: 1879 break; 1880 } 1881 #endif 1882 break; 1883 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1884 if (len == 0) 1885 break; 1886 if ((value & 0xff) != 0) { 1887 err = USBD_IOERROR; 1888 goto ret; 1889 } 1890 hubd = ehci_hubd; 1891 hubd.bNbrPorts = sc->sc_noport; 1892 v = EOREAD4(sc, EHCI_HCSPARAMS); 1893 USETW(hubd.wHubCharacteristics, 1894 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1895 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1896 ? UHD_PORT_IND : 0); 1897 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1898 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1899 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1900 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1901 l = min(len, hubd.bDescLength); 1902 totlen = l; 1903 memcpy(buf, &hubd, l); 1904 break; 1905 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1906 if (len != 4) { 1907 err = USBD_IOERROR; 1908 goto ret; 1909 } 1910 memset(buf, 0, len); /* ? XXX */ 1911 totlen = len; 1912 break; 1913 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1914 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1915 index)); 1916 if (index < 1 || index > sc->sc_noport) { 1917 err = USBD_IOERROR; 1918 goto ret; 1919 } 1920 if (len != 4) { 1921 err = USBD_IOERROR; 1922 goto ret; 1923 } 1924 v = EOREAD4(sc, EHCI_PORTSC(index)); 1925 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1926 v)); 1927 i = UPS_HIGH_SPEED; 1928 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1929 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1930 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1931 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1932 if (v & EHCI_PS_PR) i |= UPS_RESET; 1933 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1934 USETW(ps.wPortStatus, i); 1935 i = 0; 1936 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1937 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1938 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1939 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1940 USETW(ps.wPortChange, i); 1941 l = min(len, sizeof ps); 1942 memcpy(buf, &ps, l); 1943 totlen = l; 1944 break; 1945 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1946 err = USBD_IOERROR; 1947 goto ret; 1948 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1949 break; 1950 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1951 if (index < 1 || index > sc->sc_noport) { 1952 err = USBD_IOERROR; 1953 goto ret; 1954 } 1955 port = EHCI_PORTSC(index); 1956 v = EOREAD4(sc, port); 1957 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1958 v &= ~EHCI_PS_CLEAR; 1959 switch(value) { 1960 case UHF_PORT_ENABLE: 1961 EOWRITE4(sc, port, v | EHCI_PS_PE); 1962 break; 1963 case UHF_PORT_SUSPEND: 1964 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1965 break; 1966 case UHF_PORT_RESET: 1967 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1968 index)); 1969 if (EHCI_PS_IS_LOWSPEED(v)) { 1970 /* Low speed device, give up ownership. */ 1971 ehci_disown(sc, index, 1); 1972 break; 1973 } 1974 /* Start reset sequence. */ 1975 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1976 EOWRITE4(sc, port, v | EHCI_PS_PR); 1977 /* Wait for reset to complete. */ 1978 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1979 if (sc->sc_dying) { 1980 err = USBD_IOERROR; 1981 goto ret; 1982 } 1983 /* Terminate reset sequence. */ 1984 EOWRITE4(sc, port, v); 1985 /* Wait for HC to complete reset. */ 1986 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1987 if (sc->sc_dying) { 1988 err = USBD_IOERROR; 1989 goto ret; 1990 } 1991 v = EOREAD4(sc, port); 1992 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1993 if (v & EHCI_PS_PR) { 1994 printf("%s: port reset timeout\n", 1995 device_xname(sc->sc_dev)); 1996 return (USBD_TIMEOUT); 1997 } 1998 if (!(v & EHCI_PS_PE)) { 1999 /* Not a high speed device, give up ownership.*/ 2000 ehci_disown(sc, index, 0); 2001 break; 2002 } 2003 sc->sc_isreset[index] = 1; 2004 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2005 index, v)); 2006 break; 2007 case UHF_PORT_POWER: 2008 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2009 "%d (has PPC = %d)\n", index, 2010 sc->sc_hasppc)); 2011 if (sc->sc_hasppc) 2012 EOWRITE4(sc, port, v | EHCI_PS_PP); 2013 break; 2014 case UHF_PORT_TEST: 2015 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2016 "%d\n", index)); 2017 break; 2018 case UHF_PORT_INDICATOR: 2019 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2020 "%d\n", index)); 2021 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2022 break; 2023 default: 2024 err = USBD_IOERROR; 2025 goto ret; 2026 } 2027 break; 2028 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2029 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2030 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2031 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2032 break; 2033 default: 2034 err = USBD_IOERROR; 2035 goto ret; 2036 } 2037 xfer->actlen = totlen; 2038 err = USBD_NORMAL_COMPLETION; 2039 ret: 2040 xfer->status = err; 2041 s = splusb(); 2042 usb_transfer_complete(xfer); 2043 splx(s); 2044 return (USBD_IN_PROGRESS); 2045 } 2046 2047 void 2048 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2049 { 2050 int port; 2051 u_int32_t v; 2052 2053 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2054 #ifdef DIAGNOSTIC 2055 if (sc->sc_npcomp != 0) { 2056 int i = (index-1) / sc->sc_npcomp; 2057 if (i >= sc->sc_ncomp) 2058 printf("%s: strange port\n", 2059 device_xname(sc->sc_dev)); 2060 else 2061 printf("%s: handing over %s speed device on " 2062 "port %d to %s\n", 2063 device_xname(sc->sc_dev), 2064 lowspeed ? "low" : "full", 2065 index, device_xname(sc->sc_comps[i])); 2066 } else { 2067 printf("%s: npcomp == 0\n", device_xname(sc->sc_dev)); 2068 } 2069 #endif 2070 port = EHCI_PORTSC(index); 2071 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2072 EOWRITE4(sc, port, v | EHCI_PS_PO); 2073 } 2074 2075 /* Abort a root control request. */ 2076 Static void 2077 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2078 { 2079 /* Nothing to do, all transfers are synchronous. */ 2080 } 2081 2082 /* Close the root pipe. */ 2083 Static void 2084 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2085 { 2086 DPRINTF(("ehci_root_ctrl_close\n")); 2087 /* Nothing to do. */ 2088 } 2089 2090 void 2091 ehci_root_intr_done(usbd_xfer_handle xfer) 2092 { 2093 xfer->hcpriv = NULL; 2094 } 2095 2096 Static usbd_status 2097 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2098 { 2099 usbd_status err; 2100 2101 /* Insert last in queue. */ 2102 err = usb_insert_transfer(xfer); 2103 if (err) 2104 return (err); 2105 2106 /* Pipe isn't running, start first */ 2107 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2108 } 2109 2110 Static usbd_status 2111 ehci_root_intr_start(usbd_xfer_handle xfer) 2112 { 2113 usbd_pipe_handle pipe = xfer->pipe; 2114 ehci_softc_t *sc = pipe->device->bus->hci_private; 2115 2116 if (sc->sc_dying) 2117 return (USBD_IOERROR); 2118 2119 sc->sc_intrxfer = xfer; 2120 2121 return (USBD_IN_PROGRESS); 2122 } 2123 2124 /* Abort a root interrupt request. */ 2125 Static void 2126 ehci_root_intr_abort(usbd_xfer_handle xfer) 2127 { 2128 int s; 2129 2130 if (xfer->pipe->intrxfer == xfer) { 2131 DPRINTF(("ehci_root_intr_abort: remove\n")); 2132 xfer->pipe->intrxfer = NULL; 2133 } 2134 xfer->status = USBD_CANCELLED; 2135 s = splusb(); 2136 usb_transfer_complete(xfer); 2137 splx(s); 2138 } 2139 2140 /* Close the root pipe. */ 2141 Static void 2142 ehci_root_intr_close(usbd_pipe_handle pipe) 2143 { 2144 ehci_softc_t *sc = pipe->device->bus->hci_private; 2145 2146 DPRINTF(("ehci_root_intr_close\n")); 2147 2148 sc->sc_intrxfer = NULL; 2149 } 2150 2151 void 2152 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2153 { 2154 xfer->hcpriv = NULL; 2155 } 2156 2157 /************************/ 2158 2159 ehci_soft_qh_t * 2160 ehci_alloc_sqh(ehci_softc_t *sc) 2161 { 2162 ehci_soft_qh_t *sqh; 2163 usbd_status err; 2164 int i, offs; 2165 usb_dma_t dma; 2166 2167 if (sc->sc_freeqhs == NULL) { 2168 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2169 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2170 EHCI_PAGE_SIZE, &dma); 2171 #ifdef EHCI_DEBUG 2172 if (err) 2173 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2174 #endif 2175 if (err) 2176 return (NULL); 2177 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2178 offs = i * EHCI_SQH_SIZE; 2179 sqh = KERNADDR(&dma, offs); 2180 sqh->physaddr = DMAADDR(&dma, offs); 2181 sqh->next = sc->sc_freeqhs; 2182 sc->sc_freeqhs = sqh; 2183 } 2184 } 2185 sqh = sc->sc_freeqhs; 2186 sc->sc_freeqhs = sqh->next; 2187 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2188 sqh->next = NULL; 2189 return (sqh); 2190 } 2191 2192 void 2193 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2194 { 2195 sqh->next = sc->sc_freeqhs; 2196 sc->sc_freeqhs = sqh; 2197 } 2198 2199 ehci_soft_qtd_t * 2200 ehci_alloc_sqtd(ehci_softc_t *sc) 2201 { 2202 ehci_soft_qtd_t *sqtd; 2203 usbd_status err; 2204 int i, offs; 2205 usb_dma_t dma; 2206 int s; 2207 2208 if (sc->sc_freeqtds == NULL) { 2209 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2210 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2211 EHCI_PAGE_SIZE, &dma); 2212 #ifdef EHCI_DEBUG 2213 if (err) 2214 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2215 #endif 2216 if (err) 2217 return (NULL); 2218 s = splusb(); 2219 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2220 offs = i * EHCI_SQTD_SIZE; 2221 sqtd = KERNADDR(&dma, offs); 2222 sqtd->physaddr = DMAADDR(&dma, offs); 2223 sqtd->nextqtd = sc->sc_freeqtds; 2224 sc->sc_freeqtds = sqtd; 2225 } 2226 splx(s); 2227 } 2228 2229 s = splusb(); 2230 sqtd = sc->sc_freeqtds; 2231 sc->sc_freeqtds = sqtd->nextqtd; 2232 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2233 sqtd->nextqtd = NULL; 2234 sqtd->xfer = NULL; 2235 splx(s); 2236 2237 return (sqtd); 2238 } 2239 2240 void 2241 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2242 { 2243 int s; 2244 2245 s = splusb(); 2246 sqtd->nextqtd = sc->sc_freeqtds; 2247 sc->sc_freeqtds = sqtd; 2248 splx(s); 2249 } 2250 2251 usbd_status 2252 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2253 int alen, int rd, usbd_xfer_handle xfer, 2254 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2255 { 2256 ehci_soft_qtd_t *next, *cur; 2257 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2258 u_int32_t qtdstatus; 2259 int len, curlen, mps; 2260 int i, tog; 2261 usb_dma_t *dma = &xfer->dmabuf; 2262 u_int16_t flags = xfer->flags; 2263 2264 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2265 2266 len = alen; 2267 dataphys = DMAADDR(dma, 0); 2268 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2269 qtdstatus = EHCI_QTD_ACTIVE | 2270 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2271 EHCI_QTD_SET_CERR(3) 2272 /* IOC set below */ 2273 /* BYTES set below */ 2274 ; 2275 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2276 tog = epipe->nexttoggle; 2277 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2278 2279 cur = ehci_alloc_sqtd(sc); 2280 *sp = cur; 2281 if (cur == NULL) 2282 goto nomem; 2283 for (;;) { 2284 dataphyspage = EHCI_PAGE(dataphys); 2285 /* The EHCI hardware can handle at most 5 pages. */ 2286 if (dataphyslastpage - dataphyspage < 2287 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2288 /* we can handle it in this QTD */ 2289 curlen = len; 2290 } else { 2291 /* must use multiple TDs, fill as much as possible. */ 2292 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2293 EHCI_PAGE_OFFSET(dataphys); 2294 #ifdef DIAGNOSTIC 2295 if (curlen > len) { 2296 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2297 "len=0x%x offs=0x%x\n", curlen, len, 2298 EHCI_PAGE_OFFSET(dataphys)); 2299 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2300 dataphyslastpage, dataphyspage, 2301 dataphys); 2302 curlen = len; 2303 } 2304 #endif 2305 /* the length must be a multiple of the max size */ 2306 curlen -= curlen % mps; 2307 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2308 "curlen=%d\n", curlen)); 2309 #ifdef DIAGNOSTIC 2310 if (curlen == 0) 2311 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2312 #endif 2313 } 2314 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2315 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2316 dataphys, dataphyslastpage, 2317 len, curlen)); 2318 len -= curlen; 2319 2320 /* 2321 * Allocate another transfer if there's more data left, 2322 * or if force last short transfer flag is set and we're 2323 * allocating a multiple of the max packet size. 2324 */ 2325 if (len != 0 || 2326 ((curlen % mps) == 0 && !rd && curlen != 0 && 2327 (flags & USBD_FORCE_SHORT_XFER))) { 2328 next = ehci_alloc_sqtd(sc); 2329 if (next == NULL) 2330 goto nomem; 2331 nextphys = htole32(next->physaddr); 2332 } else { 2333 next = NULL; 2334 nextphys = EHCI_NULL; 2335 } 2336 2337 for (i = 0; i * EHCI_PAGE_SIZE < 2338 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2339 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2340 if (i != 0) /* use offset only in first buffer */ 2341 a = EHCI_PAGE(a); 2342 cur->qtd.qtd_buffer[i] = htole32(a); 2343 cur->qtd.qtd_buffer_hi[i] = 0; 2344 #ifdef DIAGNOSTIC 2345 if (i >= EHCI_QTD_NBUFFERS) { 2346 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2347 goto nomem; 2348 } 2349 #endif 2350 } 2351 cur->nextqtd = next; 2352 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2353 cur->qtd.qtd_status = 2354 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2355 cur->xfer = xfer; 2356 cur->len = curlen; 2357 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2358 dataphys, dataphys + curlen)); 2359 /* adjust the toggle based on the number of packets in this 2360 qtd */ 2361 if (((curlen + mps - 1) / mps) & 1) { 2362 tog ^= 1; 2363 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2364 } 2365 if (next == NULL) 2366 break; 2367 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2368 dataphys += curlen; 2369 cur = next; 2370 } 2371 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2372 *ep = cur; 2373 epipe->nexttoggle = tog; 2374 2375 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2376 *sp, *ep)); 2377 2378 return (USBD_NORMAL_COMPLETION); 2379 2380 nomem: 2381 /* XXX free chain */ 2382 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2383 return (USBD_NOMEM); 2384 } 2385 2386 Static void 2387 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2388 ehci_soft_qtd_t *sqtdend) 2389 { 2390 ehci_soft_qtd_t *p; 2391 int i; 2392 2393 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2394 sqtd, sqtdend)); 2395 2396 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2397 p = sqtd->nextqtd; 2398 ehci_free_sqtd(sc, sqtd); 2399 } 2400 } 2401 2402 /****************/ 2403 2404 /* 2405 * Close a reqular pipe. 2406 * Assumes that there are no pending transactions. 2407 */ 2408 void 2409 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2410 { 2411 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2412 ehci_softc_t *sc = pipe->device->bus->hci_private; 2413 ehci_soft_qh_t *sqh = epipe->sqh; 2414 int s; 2415 2416 s = splusb(); 2417 ehci_rem_qh(sc, sqh, head); 2418 splx(s); 2419 ehci_free_sqh(sc, epipe->sqh); 2420 } 2421 2422 /* 2423 * Abort a device request. 2424 * If this routine is called at splusb() it guarantees that the request 2425 * will be removed from the hardware scheduling and that the callback 2426 * for it will be called with USBD_CANCELLED status. 2427 * It's impossible to guarantee that the requested transfer will not 2428 * have happened since the hardware runs concurrently. 2429 * If the transaction has already happened we rely on the ordinary 2430 * interrupt processing to process it. 2431 * XXX This is most probably wrong. 2432 */ 2433 void 2434 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2435 { 2436 #define exfer EXFER(xfer) 2437 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2438 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2439 ehci_soft_qh_t *sqh = epipe->sqh; 2440 ehci_soft_qtd_t *sqtd; 2441 ehci_physaddr_t cur; 2442 u_int32_t qhstatus; 2443 int s; 2444 int hit; 2445 int wake; 2446 2447 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2448 2449 if (sc->sc_dying) { 2450 /* If we're dying, just do the software part. */ 2451 s = splusb(); 2452 xfer->status = status; /* make software ignore it */ 2453 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2454 usb_transfer_complete(xfer); 2455 splx(s); 2456 return; 2457 } 2458 2459 if (xfer->device->bus->intr_context || !curproc) 2460 panic("ehci_abort_xfer: not in process context"); 2461 2462 /* 2463 * If an abort is already in progress then just wait for it to 2464 * complete and return. 2465 */ 2466 if (xfer->hcflags & UXFER_ABORTING) { 2467 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2468 #ifdef DIAGNOSTIC 2469 if (status == USBD_TIMEOUT) 2470 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2471 #endif 2472 /* Override the status which might be USBD_TIMEOUT. */ 2473 xfer->status = status; 2474 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2475 xfer->hcflags |= UXFER_ABORTWAIT; 2476 while (xfer->hcflags & UXFER_ABORTING) 2477 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2478 return; 2479 } 2480 xfer->hcflags |= UXFER_ABORTING; 2481 2482 /* 2483 * Step 1: Make interrupt routine and hardware ignore xfer. 2484 */ 2485 s = splusb(); 2486 xfer->status = status; /* make software ignore it */ 2487 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2488 qhstatus = sqh->qh.qh_qtd.qtd_status; 2489 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2490 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2491 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2492 if (sqtd == exfer->sqtdend) 2493 break; 2494 } 2495 splx(s); 2496 2497 /* 2498 * Step 2: Wait until we know hardware has finished any possible 2499 * use of the xfer. Also make sure the soft interrupt routine 2500 * has run. 2501 */ 2502 ehci_sync_hc(sc); 2503 s = splusb(); 2504 #ifdef USB_USE_SOFTINTR 2505 sc->sc_softwake = 1; 2506 #endif /* USB_USE_SOFTINTR */ 2507 usb_schedsoftintr(&sc->sc_bus); 2508 #ifdef USB_USE_SOFTINTR 2509 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2510 #endif /* USB_USE_SOFTINTR */ 2511 splx(s); 2512 2513 /* 2514 * Step 3: Remove any vestiges of the xfer from the hardware. 2515 * The complication here is that the hardware may have executed 2516 * beyond the xfer we're trying to abort. So as we're scanning 2517 * the TDs of this xfer we check if the hardware points to 2518 * any of them. 2519 */ 2520 s = splusb(); /* XXX why? */ 2521 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2522 hit = 0; 2523 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2524 hit |= cur == sqtd->physaddr; 2525 if (sqtd == exfer->sqtdend) 2526 break; 2527 } 2528 sqtd = sqtd->nextqtd; 2529 /* Zap curqtd register if hardware pointed inside the xfer. */ 2530 if (hit && sqtd != NULL) { 2531 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2532 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2533 sqh->qh.qh_qtd.qtd_status = qhstatus; 2534 } else { 2535 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2536 } 2537 2538 /* 2539 * Step 4: Execute callback. 2540 */ 2541 #ifdef DIAGNOSTIC 2542 exfer->isdone = 1; 2543 #endif 2544 wake = xfer->hcflags & UXFER_ABORTWAIT; 2545 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2546 usb_transfer_complete(xfer); 2547 if (wake) 2548 wakeup(&xfer->hcflags); 2549 2550 splx(s); 2551 #undef exfer 2552 } 2553 2554 void 2555 ehci_timeout(void *addr) 2556 { 2557 struct ehci_xfer *exfer = addr; 2558 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2559 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2560 2561 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2562 #ifdef USB_DEBUG 2563 if (ehcidebug > 1) 2564 usbd_dump_pipe(exfer->xfer.pipe); 2565 #endif 2566 2567 if (sc->sc_dying) { 2568 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2569 return; 2570 } 2571 2572 /* Execute the abort in a process context. */ 2573 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2574 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2575 USB_TASKQ_HC); 2576 } 2577 2578 void 2579 ehci_timeout_task(void *addr) 2580 { 2581 usbd_xfer_handle xfer = addr; 2582 int s; 2583 2584 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2585 2586 s = splusb(); 2587 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2588 splx(s); 2589 } 2590 2591 /************************/ 2592 2593 Static usbd_status 2594 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2595 { 2596 usbd_status err; 2597 2598 /* Insert last in queue. */ 2599 err = usb_insert_transfer(xfer); 2600 if (err) 2601 return (err); 2602 2603 /* Pipe isn't running, start first */ 2604 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2605 } 2606 2607 Static usbd_status 2608 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2609 { 2610 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2611 usbd_status err; 2612 2613 if (sc->sc_dying) 2614 return (USBD_IOERROR); 2615 2616 #ifdef DIAGNOSTIC 2617 if (!(xfer->rqflags & URQ_REQUEST)) { 2618 /* XXX panic */ 2619 printf("ehci_device_ctrl_transfer: not a request\n"); 2620 return (USBD_INVAL); 2621 } 2622 #endif 2623 2624 err = ehci_device_request(xfer); 2625 if (err) 2626 return (err); 2627 2628 if (sc->sc_bus.use_polling) 2629 ehci_waitintr(sc, xfer); 2630 return (USBD_IN_PROGRESS); 2631 } 2632 2633 void 2634 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2635 { 2636 struct ehci_xfer *ex = EXFER(xfer); 2637 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2638 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2639 2640 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2641 2642 #ifdef DIAGNOSTIC 2643 if (!(xfer->rqflags & URQ_REQUEST)) { 2644 panic("ehci_ctrl_done: not a request"); 2645 } 2646 #endif 2647 2648 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2649 ehci_del_intr_list(ex); /* remove from active list */ 2650 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2651 } 2652 2653 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2654 } 2655 2656 /* Abort a device control request. */ 2657 Static void 2658 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2659 { 2660 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2661 ehci_abort_xfer(xfer, USBD_CANCELLED); 2662 } 2663 2664 /* Close a device control pipe. */ 2665 Static void 2666 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2667 { 2668 ehci_softc_t *sc = pipe->device->bus->hci_private; 2669 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2670 2671 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2672 ehci_close_pipe(pipe, sc->sc_async_head); 2673 } 2674 2675 usbd_status 2676 ehci_device_request(usbd_xfer_handle xfer) 2677 { 2678 #define exfer EXFER(xfer) 2679 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2680 usb_device_request_t *req = &xfer->request; 2681 usbd_device_handle dev = epipe->pipe.device; 2682 ehci_softc_t *sc = dev->bus->hci_private; 2683 int addr = dev->address; 2684 ehci_soft_qtd_t *setup, *stat, *next; 2685 ehci_soft_qh_t *sqh; 2686 int isread; 2687 int len; 2688 usbd_status err; 2689 int s; 2690 2691 isread = req->bmRequestType & UT_READ; 2692 len = UGETW(req->wLength); 2693 2694 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2695 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2696 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2697 UGETW(req->wIndex), len, addr, 2698 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2699 2700 setup = ehci_alloc_sqtd(sc); 2701 if (setup == NULL) { 2702 err = USBD_NOMEM; 2703 goto bad1; 2704 } 2705 stat = ehci_alloc_sqtd(sc); 2706 if (stat == NULL) { 2707 err = USBD_NOMEM; 2708 goto bad2; 2709 } 2710 2711 sqh = epipe->sqh; 2712 epipe->u.ctl.length = len; 2713 2714 /* Update device address and length since they may have changed 2715 during the setup of the control pipe in usbd_new_device(). */ 2716 /* XXX This only needs to be done once, but it's too early in open. */ 2717 /* XXXX Should not touch ED here! */ 2718 sqh->qh.qh_endp = 2719 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2720 htole32( 2721 EHCI_QH_SET_ADDR(addr) | 2722 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2723 ); 2724 2725 /* Set up data transaction */ 2726 if (len != 0) { 2727 ehci_soft_qtd_t *end; 2728 2729 /* Start toggle at 1. */ 2730 epipe->nexttoggle = 1; 2731 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2732 &next, &end); 2733 if (err) 2734 goto bad3; 2735 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2736 end->nextqtd = stat; 2737 end->qtd.qtd_next = 2738 end->qtd.qtd_altnext = htole32(stat->physaddr); 2739 } else { 2740 next = stat; 2741 } 2742 2743 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2744 2745 /* Clear toggle */ 2746 setup->qtd.qtd_status = htole32( 2747 EHCI_QTD_ACTIVE | 2748 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2749 EHCI_QTD_SET_CERR(3) | 2750 EHCI_QTD_SET_TOGGLE(0) | 2751 EHCI_QTD_SET_BYTES(sizeof *req) 2752 ); 2753 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2754 setup->qtd.qtd_buffer_hi[0] = 0; 2755 setup->nextqtd = next; 2756 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2757 setup->xfer = xfer; 2758 setup->len = sizeof *req; 2759 2760 stat->qtd.qtd_status = htole32( 2761 EHCI_QTD_ACTIVE | 2762 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2763 EHCI_QTD_SET_CERR(3) | 2764 EHCI_QTD_SET_TOGGLE(1) | 2765 EHCI_QTD_IOC 2766 ); 2767 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2768 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2769 stat->nextqtd = NULL; 2770 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2771 stat->xfer = xfer; 2772 stat->len = 0; 2773 2774 #ifdef EHCI_DEBUG 2775 if (ehcidebug > 5) { 2776 DPRINTF(("ehci_device_request:\n")); 2777 ehci_dump_sqh(sqh); 2778 ehci_dump_sqtds(setup); 2779 } 2780 #endif 2781 2782 exfer->sqtdstart = setup; 2783 exfer->sqtdend = stat; 2784 #ifdef DIAGNOSTIC 2785 if (!exfer->isdone) { 2786 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2787 } 2788 exfer->isdone = 0; 2789 #endif 2790 2791 /* Insert qTD in QH list. */ 2792 s = splusb(); 2793 ehci_set_qh_qtd(sqh, setup); 2794 if (xfer->timeout && !sc->sc_bus.use_polling) { 2795 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2796 ehci_timeout, xfer); 2797 } 2798 ehci_add_intr_list(sc, exfer); 2799 xfer->status = USBD_IN_PROGRESS; 2800 splx(s); 2801 2802 #ifdef EHCI_DEBUG 2803 if (ehcidebug > 10) { 2804 DPRINTF(("ehci_device_request: status=%x\n", 2805 EOREAD4(sc, EHCI_USBSTS))); 2806 delay(10000); 2807 ehci_dump_regs(sc); 2808 ehci_dump_sqh(sc->sc_async_head); 2809 ehci_dump_sqh(sqh); 2810 ehci_dump_sqtds(setup); 2811 } 2812 #endif 2813 2814 return (USBD_NORMAL_COMPLETION); 2815 2816 bad3: 2817 ehci_free_sqtd(sc, stat); 2818 bad2: 2819 ehci_free_sqtd(sc, setup); 2820 bad1: 2821 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2822 xfer->status = err; 2823 usb_transfer_complete(xfer); 2824 return (err); 2825 #undef exfer 2826 } 2827 2828 /* 2829 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2830 * qTD status, or miss signalling occasionally under heavy load. If the host 2831 * machine is too fast, we we can miss transaction completion - when we scan 2832 * the active list the transaction still seems to be active. This generally 2833 * exhibits itself as a umass stall that never recovers. 2834 * 2835 * We work around this behaviour by setting up this callback after any softintr 2836 * that completes with transactions still pending, giving us another chance to 2837 * check for completion after the writeback has taken place. 2838 */ 2839 void 2840 ehci_intrlist_timeout(void *arg) 2841 { 2842 ehci_softc_t *sc = arg; 2843 int s = splusb(); 2844 2845 DPRINTF(("ehci_intrlist_timeout\n")); 2846 usb_schedsoftintr(&sc->sc_bus); 2847 2848 splx(s); 2849 } 2850 2851 /************************/ 2852 2853 Static usbd_status 2854 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2855 { 2856 usbd_status err; 2857 2858 /* Insert last in queue. */ 2859 err = usb_insert_transfer(xfer); 2860 if (err) 2861 return (err); 2862 2863 /* Pipe isn't running, start first */ 2864 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2865 } 2866 2867 usbd_status 2868 ehci_device_bulk_start(usbd_xfer_handle xfer) 2869 { 2870 #define exfer EXFER(xfer) 2871 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2872 usbd_device_handle dev = epipe->pipe.device; 2873 ehci_softc_t *sc = dev->bus->hci_private; 2874 ehci_soft_qtd_t *data, *dataend; 2875 ehci_soft_qh_t *sqh; 2876 usbd_status err; 2877 int len, isread, endpt; 2878 int s; 2879 2880 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2881 xfer, xfer->length, xfer->flags)); 2882 2883 if (sc->sc_dying) 2884 return (USBD_IOERROR); 2885 2886 #ifdef DIAGNOSTIC 2887 if (xfer->rqflags & URQ_REQUEST) 2888 panic("ehci_device_bulk_start: a request"); 2889 #endif 2890 2891 len = xfer->length; 2892 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2893 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2894 sqh = epipe->sqh; 2895 2896 epipe->u.bulk.length = len; 2897 2898 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2899 &dataend); 2900 if (err) { 2901 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2902 xfer->status = err; 2903 usb_transfer_complete(xfer); 2904 return (err); 2905 } 2906 2907 #ifdef EHCI_DEBUG 2908 if (ehcidebug > 5) { 2909 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2910 ehci_dump_sqh(sqh); 2911 ehci_dump_sqtds(data); 2912 } 2913 #endif 2914 2915 /* Set up interrupt info. */ 2916 exfer->sqtdstart = data; 2917 exfer->sqtdend = dataend; 2918 #ifdef DIAGNOSTIC 2919 if (!exfer->isdone) { 2920 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2921 } 2922 exfer->isdone = 0; 2923 #endif 2924 2925 s = splusb(); 2926 ehci_set_qh_qtd(sqh, data); 2927 if (xfer->timeout && !sc->sc_bus.use_polling) { 2928 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2929 ehci_timeout, xfer); 2930 } 2931 ehci_add_intr_list(sc, exfer); 2932 xfer->status = USBD_IN_PROGRESS; 2933 splx(s); 2934 2935 #ifdef EHCI_DEBUG 2936 if (ehcidebug > 10) { 2937 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2938 delay(10000); 2939 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2940 ehci_dump_regs(sc); 2941 #if 0 2942 printf("async_head:\n"); 2943 ehci_dump_sqh(sc->sc_async_head); 2944 #endif 2945 printf("sqh:\n"); 2946 ehci_dump_sqh(sqh); 2947 ehci_dump_sqtds(data); 2948 } 2949 #endif 2950 2951 if (sc->sc_bus.use_polling) 2952 ehci_waitintr(sc, xfer); 2953 2954 return (USBD_IN_PROGRESS); 2955 #undef exfer 2956 } 2957 2958 Static void 2959 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2960 { 2961 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2962 ehci_abort_xfer(xfer, USBD_CANCELLED); 2963 } 2964 2965 /* 2966 * Close a device bulk pipe. 2967 */ 2968 Static void 2969 ehci_device_bulk_close(usbd_pipe_handle pipe) 2970 { 2971 ehci_softc_t *sc = pipe->device->bus->hci_private; 2972 2973 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2974 ehci_close_pipe(pipe, sc->sc_async_head); 2975 } 2976 2977 void 2978 ehci_device_bulk_done(usbd_xfer_handle xfer) 2979 { 2980 struct ehci_xfer *ex = EXFER(xfer); 2981 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2982 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2983 2984 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2985 xfer, xfer->actlen)); 2986 2987 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2988 ehci_del_intr_list(ex); /* remove from active list */ 2989 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2990 } 2991 2992 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2993 } 2994 2995 /************************/ 2996 2997 Static usbd_status 2998 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2999 { 3000 struct ehci_soft_islot *isp; 3001 int islot, lev; 3002 3003 /* Find a poll rate that is large enough. */ 3004 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3005 if (EHCI_ILEV_IVAL(lev) <= ival) 3006 break; 3007 3008 /* Pick an interrupt slot at the right level. */ 3009 /* XXX could do better than picking at random */ 3010 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3011 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3012 3013 sqh->islot = islot; 3014 isp = &sc->sc_islots[islot]; 3015 ehci_add_qh(sqh, isp->sqh); 3016 3017 return (USBD_NORMAL_COMPLETION); 3018 } 3019 3020 Static usbd_status 3021 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3022 { 3023 usbd_status err; 3024 3025 /* Insert last in queue. */ 3026 err = usb_insert_transfer(xfer); 3027 if (err) 3028 return (err); 3029 3030 /* 3031 * Pipe isn't running (otherwise err would be USBD_INPROG), 3032 * so start it first. 3033 */ 3034 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3035 } 3036 3037 Static usbd_status 3038 ehci_device_intr_start(usbd_xfer_handle xfer) 3039 { 3040 #define exfer EXFER(xfer) 3041 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3042 usbd_device_handle dev = xfer->pipe->device; 3043 ehci_softc_t *sc = dev->bus->hci_private; 3044 ehci_soft_qtd_t *data, *dataend; 3045 ehci_soft_qh_t *sqh; 3046 usbd_status err; 3047 int len, isread, endpt; 3048 int s; 3049 3050 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3051 xfer, xfer->length, xfer->flags)); 3052 3053 if (sc->sc_dying) 3054 return (USBD_IOERROR); 3055 3056 #ifdef DIAGNOSTIC 3057 if (xfer->rqflags & URQ_REQUEST) 3058 panic("ehci_device_intr_start: a request"); 3059 #endif 3060 3061 len = xfer->length; 3062 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3063 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3064 sqh = epipe->sqh; 3065 3066 epipe->u.intr.length = len; 3067 3068 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3069 &dataend); 3070 if (err) { 3071 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3072 xfer->status = err; 3073 usb_transfer_complete(xfer); 3074 return (err); 3075 } 3076 3077 #ifdef EHCI_DEBUG 3078 if (ehcidebug > 5) { 3079 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3080 ehci_dump_sqh(sqh); 3081 ehci_dump_sqtds(data); 3082 } 3083 #endif 3084 3085 /* Set up interrupt info. */ 3086 exfer->sqtdstart = data; 3087 exfer->sqtdend = dataend; 3088 #ifdef DIAGNOSTIC 3089 if (!exfer->isdone) { 3090 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3091 } 3092 exfer->isdone = 0; 3093 #endif 3094 3095 s = splusb(); 3096 ehci_set_qh_qtd(sqh, data); 3097 if (xfer->timeout && !sc->sc_bus.use_polling) { 3098 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3099 ehci_timeout, xfer); 3100 } 3101 ehci_add_intr_list(sc, exfer); 3102 xfer->status = USBD_IN_PROGRESS; 3103 splx(s); 3104 3105 #ifdef EHCI_DEBUG 3106 if (ehcidebug > 10) { 3107 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3108 delay(10000); 3109 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3110 ehci_dump_regs(sc); 3111 printf("sqh:\n"); 3112 ehci_dump_sqh(sqh); 3113 ehci_dump_sqtds(data); 3114 } 3115 #endif 3116 3117 if (sc->sc_bus.use_polling) 3118 ehci_waitintr(sc, xfer); 3119 3120 return (USBD_IN_PROGRESS); 3121 #undef exfer 3122 } 3123 3124 Static void 3125 ehci_device_intr_abort(usbd_xfer_handle xfer) 3126 { 3127 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3128 if (xfer->pipe->intrxfer == xfer) { 3129 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3130 xfer->pipe->intrxfer = NULL; 3131 } 3132 ehci_abort_xfer(xfer, USBD_CANCELLED); 3133 } 3134 3135 Static void 3136 ehci_device_intr_close(usbd_pipe_handle pipe) 3137 { 3138 ehci_softc_t *sc = pipe->device->bus->hci_private; 3139 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3140 struct ehci_soft_islot *isp; 3141 3142 isp = &sc->sc_islots[epipe->sqh->islot]; 3143 ehci_close_pipe(pipe, isp->sqh); 3144 } 3145 3146 Static void 3147 ehci_device_intr_done(usbd_xfer_handle xfer) 3148 { 3149 #define exfer EXFER(xfer) 3150 struct ehci_xfer *ex = EXFER(xfer); 3151 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3152 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3153 ehci_soft_qtd_t *data, *dataend; 3154 ehci_soft_qh_t *sqh; 3155 usbd_status err; 3156 int len, isread, endpt, s; 3157 3158 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3159 xfer, xfer->actlen)); 3160 3161 if (xfer->pipe->repeat) { 3162 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3163 3164 len = epipe->u.intr.length; 3165 xfer->length = len; 3166 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3167 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3168 sqh = epipe->sqh; 3169 3170 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3171 &data, &dataend); 3172 if (err) { 3173 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3174 xfer->status = err; 3175 return; 3176 } 3177 3178 /* Set up interrupt info. */ 3179 exfer->sqtdstart = data; 3180 exfer->sqtdend = dataend; 3181 #ifdef DIAGNOSTIC 3182 if (!exfer->isdone) { 3183 printf("ehci_device_intr_done: not done, ex=%p\n", 3184 exfer); 3185 } 3186 exfer->isdone = 0; 3187 #endif 3188 3189 s = splusb(); 3190 ehci_set_qh_qtd(sqh, data); 3191 if (xfer->timeout && !sc->sc_bus.use_polling) { 3192 usb_callout(xfer->timeout_handle, 3193 mstohz(xfer->timeout), ehci_timeout, xfer); 3194 } 3195 splx(s); 3196 3197 xfer->status = USBD_IN_PROGRESS; 3198 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3199 ehci_del_intr_list(ex); /* remove from active list */ 3200 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3201 } 3202 #undef exfer 3203 } 3204 3205 /************************/ 3206 3207 Static usbd_status 3208 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3209 { 3210 return USBD_IOERROR; 3211 } 3212 Static usbd_status 3213 ehci_device_isoc_start(usbd_xfer_handle xfer) 3214 { 3215 return USBD_IOERROR; 3216 } 3217 Static void 3218 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3219 { 3220 } 3221 Static void 3222 ehci_device_isoc_close(usbd_pipe_handle pipe) 3223 { 3224 } 3225 Static void 3226 ehci_device_isoc_done(usbd_xfer_handle xfer) 3227 { 3228 } 3229
Indexes created Thu Sep 25 16:09:42 GMT 2025