ehci.c revision 1.137
1 /* $NetBSD: ehci.c,v 1.137 2008/06/16 10:29:41 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 34 * 35 * The EHCI 1.0 spec can be found at 36 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 37 * and the USB 2.0 spec at 38 * http://www.usb.org/developers/docs/usb_20.zip 39 * 40 */ 41 42 /* 43 * TODO: 44 * 1) hold off explorations by companion controllers until ehci has started. 45 * 46 * 2) The EHCI driver lacks support for isochronous transfers, so 47 * devices using them don't work. 48 * 49 * 3) The hub driver needs to handle and schedule the transaction translator, 50 * to assign place in frame where different devices get to go. See chapter 51 * on hubs in USB 2.0 for details. 52 * 53 * 4) command failures are not recovered correctly 54 */ 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.137 2008/06/16 10:29:41 drochner Exp $"); 58 59 #include "ohci.h" 60 #include "uhci.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/kernel.h> 65 #include <sys/malloc.h> 66 #include <sys/device.h> 67 #include <sys/select.h> 68 #include <sys/proc.h> 69 #include <sys/queue.h> 70 #include <sys/mutex.h> 71 #include <sys/bus.h> 72 73 #include <machine/endian.h> 74 75 #include <dev/usb/usb.h> 76 #include <dev/usb/usbdi.h> 77 #include <dev/usb/usbdivar.h> 78 #include <dev/usb/usb_mem.h> 79 #include <dev/usb/usb_quirks.h> 80 81 #include <dev/usb/ehcireg.h> 82 #include <dev/usb/ehcivar.h> 83 #include <dev/usb/usbroothub_subr.h> 84 85 #ifdef EHCI_DEBUG 86 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 87 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 88 int ehcidebug = 0; 89 #ifndef __NetBSD__ 90 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 91 #endif 92 #else 93 #define DPRINTF(x) 94 #define DPRINTFN(n,x) 95 #endif 96 97 struct ehci_pipe { 98 struct usbd_pipe pipe; 99 int nexttoggle; 100 101 ehci_soft_qh_t *sqh; 102 union { 103 ehci_soft_qtd_t *qtd; 104 /* ehci_soft_itd_t *itd; */ 105 } tail; 106 union { 107 /* Control pipe */ 108 struct { 109 usb_dma_t reqdma; 110 u_int length; 111 } ctl; 112 /* Interrupt pipe */ 113 struct { 114 u_int length; 115 } intr; 116 /* Bulk pipe */ 117 struct { 118 u_int length; 119 } bulk; 120 /* Iso pipe */ 121 /* XXX */ 122 } u; 123 }; 124 125 Static usbd_status ehci_open(usbd_pipe_handle); 126 Static void ehci_poll(struct usbd_bus *); 127 Static void ehci_softintr(void *); 128 Static int ehci_intr1(ehci_softc_t *); 129 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 130 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 131 Static void ehci_idone(struct ehci_xfer *); 132 Static void ehci_timeout(void *); 133 Static void ehci_timeout_task(void *); 134 Static void ehci_intrlist_timeout(void *); 135 136 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 137 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 138 139 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 140 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 141 142 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 143 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 144 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 145 Static void ehci_root_ctrl_close(usbd_pipe_handle); 146 Static void ehci_root_ctrl_done(usbd_xfer_handle); 147 148 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 149 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 150 Static void ehci_root_intr_abort(usbd_xfer_handle); 151 Static void ehci_root_intr_close(usbd_pipe_handle); 152 Static void ehci_root_intr_done(usbd_xfer_handle); 153 154 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 156 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_device_ctrl_close(usbd_pipe_handle); 158 Static void ehci_device_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 162 Static void ehci_device_bulk_abort(usbd_xfer_handle); 163 Static void ehci_device_bulk_close(usbd_pipe_handle); 164 Static void ehci_device_bulk_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 168 Static void ehci_device_intr_abort(usbd_xfer_handle); 169 Static void ehci_device_intr_close(usbd_pipe_handle); 170 Static void ehci_device_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 174 Static void ehci_device_isoc_abort(usbd_xfer_handle); 175 Static void ehci_device_isoc_close(usbd_pipe_handle); 176 Static void ehci_device_isoc_done(usbd_xfer_handle); 177 178 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 179 Static void ehci_noop(usbd_pipe_handle pipe); 180 181 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 182 Static void ehci_disown(ehci_softc_t *, int, int); 183 184 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 185 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 186 187 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 188 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 189 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 190 ehci_softc_t *, int, int, usbd_xfer_handle, 191 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 192 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 193 ehci_soft_qtd_t *); 194 195 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 196 197 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 198 int ival); 199 200 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 201 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 202 ehci_soft_qh_t *); 203 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 204 Static void ehci_sync_hc(ehci_softc_t *); 205 206 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 207 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 208 209 #ifdef EHCI_DEBUG 210 Static void ehci_dump_regs(ehci_softc_t *); 211 void ehci_dump(void); 212 Static ehci_softc_t *theehci; 213 Static void ehci_dump_link(ehci_link_t, int); 214 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 215 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 216 Static void ehci_dump_qtd(ehci_qtd_t *); 217 Static void ehci_dump_sqh(ehci_soft_qh_t *); 218 #ifdef DIAGNOSTIC 219 Static void ehci_dump_exfer(struct ehci_xfer *); 220 #endif 221 #endif 222 223 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 224 225 #define EHCI_INTR_ENDPT 1 226 227 #define ehci_add_intr_list(sc, ex) \ 228 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 229 #define ehci_del_intr_list(ex) \ 230 do { \ 231 LIST_REMOVE((ex), inext); \ 232 (ex)->inext.le_prev = NULL; \ 233 } while (0) 234 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 235 236 Static const struct usbd_bus_methods ehci_bus_methods = { 237 ehci_open, 238 ehci_softintr, 239 ehci_poll, 240 ehci_allocm, 241 ehci_freem, 242 ehci_allocx, 243 ehci_freex, 244 }; 245 246 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 247 ehci_root_ctrl_transfer, 248 ehci_root_ctrl_start, 249 ehci_root_ctrl_abort, 250 ehci_root_ctrl_close, 251 ehci_noop, 252 ehci_root_ctrl_done, 253 }; 254 255 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 256 ehci_root_intr_transfer, 257 ehci_root_intr_start, 258 ehci_root_intr_abort, 259 ehci_root_intr_close, 260 ehci_noop, 261 ehci_root_intr_done, 262 }; 263 264 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 265 ehci_device_ctrl_transfer, 266 ehci_device_ctrl_start, 267 ehci_device_ctrl_abort, 268 ehci_device_ctrl_close, 269 ehci_noop, 270 ehci_device_ctrl_done, 271 }; 272 273 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 274 ehci_device_intr_transfer, 275 ehci_device_intr_start, 276 ehci_device_intr_abort, 277 ehci_device_intr_close, 278 ehci_device_clear_toggle, 279 ehci_device_intr_done, 280 }; 281 282 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 283 ehci_device_bulk_transfer, 284 ehci_device_bulk_start, 285 ehci_device_bulk_abort, 286 ehci_device_bulk_close, 287 ehci_device_clear_toggle, 288 ehci_device_bulk_done, 289 }; 290 291 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 292 ehci_device_isoc_transfer, 293 ehci_device_isoc_start, 294 ehci_device_isoc_abort, 295 ehci_device_isoc_close, 296 ehci_noop, 297 ehci_device_isoc_done, 298 }; 299 300 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 301 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 302 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 303 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 304 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 305 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 306 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 307 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 308 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 309 }; 310 311 usbd_status 312 ehci_init(ehci_softc_t *sc) 313 { 314 u_int32_t vers, sparams, cparams, hcr; 315 u_int i; 316 usbd_status err; 317 ehci_soft_qh_t *sqh; 318 u_int ncomp; 319 320 DPRINTF(("ehci_init: start\n")); 321 #ifdef EHCI_DEBUG 322 theehci = sc; 323 #endif 324 325 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 326 327 vers = EREAD2(sc, EHCI_HCIVERSION); 328 aprint_verbose("%s: EHCI version %x.%x\n", device_xname(sc->sc_dev), 329 vers >> 8, vers & 0xff); 330 331 sparams = EREAD4(sc, EHCI_HCSPARAMS); 332 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 333 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 334 ncomp = EHCI_HCS_N_CC(sparams); 335 if (ncomp != sc->sc_ncomp) { 336 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 337 device_xname(sc->sc_dev), ncomp, sc->sc_ncomp); 338 #if NOHCI == 0 || NUHCI == 0 339 aprint_error("%s: ohci or uhci probably not configured\n", 340 device_xname(sc->sc_dev)); 341 #endif 342 if (ncomp < sc->sc_ncomp) 343 sc->sc_ncomp = ncomp; 344 } 345 if (sc->sc_ncomp > 0) { 346 aprint_normal("%s: companion controller%s, %d port%s each:", 347 device_xname(sc->sc_dev), sc->sc_ncomp!=1 ? "s" : "", 348 EHCI_HCS_N_PCC(sparams), 349 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 350 for (i = 0; i < sc->sc_ncomp; i++) 351 aprint_normal(" %s", device_xname(sc->sc_comps[i])); 352 aprint_normal("\n"); 353 } 354 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 355 cparams = EREAD4(sc, EHCI_HCCPARAMS); 356 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 357 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 358 359 if (EHCI_HCC_64BIT(cparams)) { 360 /* MUST clear segment register if 64 bit capable. */ 361 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 362 } 363 364 sc->sc_bus.usbrev = USBREV_2_0; 365 366 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 367 USB_MEM_RESERVE); 368 369 /* Reset the controller */ 370 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 371 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 372 usb_delay_ms(&sc->sc_bus, 1); 373 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 374 for (i = 0; i < 100; i++) { 375 usb_delay_ms(&sc->sc_bus, 1); 376 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 377 if (!hcr) 378 break; 379 } 380 if (hcr) { 381 aprint_error("%s: reset timeout\n", device_xname(sc->sc_dev)); 382 return (USBD_IOERROR); 383 } 384 385 /* XXX need proper intr scheduling */ 386 sc->sc_rand = 96; 387 388 /* frame list size at default, read back what we got and use that */ 389 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 390 case 0: sc->sc_flsize = 1024; break; 391 case 1: sc->sc_flsize = 512; break; 392 case 2: sc->sc_flsize = 256; break; 393 case 3: return (USBD_IOERROR); 394 } 395 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 396 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 397 if (err) 398 return (err); 399 DPRINTF(("%s: flsize=%d\n", device_xname(sc->sc_dev),sc->sc_flsize)); 400 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 401 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 402 403 /* Set up the bus struct. */ 404 sc->sc_bus.methods = &ehci_bus_methods; 405 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 406 407 sc->sc_eintrs = EHCI_NORMAL_INTRS; 408 409 /* 410 * Allocate the interrupt dummy QHs. These are arranged to give poll 411 * intervals that are powers of 2 times 1ms. 412 */ 413 for (i = 0; i < EHCI_INTRQHS; i++) { 414 sqh = ehci_alloc_sqh(sc); 415 if (sqh == NULL) { 416 err = USBD_NOMEM; 417 goto bad1; 418 } 419 sc->sc_islots[i].sqh = sqh; 420 } 421 for (i = 0; i < EHCI_INTRQHS; i++) { 422 sqh = sc->sc_islots[i].sqh; 423 if (i == 0) { 424 /* The last (1ms) QH terminates. */ 425 sqh->qh.qh_link = EHCI_NULL; 426 sqh->next = NULL; 427 } else { 428 /* Otherwise the next QH has half the poll interval */ 429 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 430 sqh->qh.qh_link = htole32(sqh->next->physaddr | 431 EHCI_LINK_QH); 432 } 433 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 434 sqh->qh.qh_curqtd = EHCI_NULL; 435 sqh->next = NULL; 436 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 437 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 438 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 439 sqh->sqtd = NULL; 440 } 441 /* Point the frame list at the last level (128ms). */ 442 for (i = 0; i < sc->sc_flsize; i++) { 443 int j; 444 445 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 446 revbits[i & (EHCI_MAX_POLLRATE-1)]; 447 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 448 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 449 i)].sqh->physaddr); 450 } 451 452 /* Allocate dummy QH that starts the async list. */ 453 sqh = ehci_alloc_sqh(sc); 454 if (sqh == NULL) { 455 err = USBD_NOMEM; 456 goto bad1; 457 } 458 /* Fill the QH */ 459 sqh->qh.qh_endp = 460 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 461 sqh->qh.qh_link = 462 htole32(sqh->physaddr | EHCI_LINK_QH); 463 sqh->qh.qh_curqtd = EHCI_NULL; 464 sqh->next = NULL; 465 /* Fill the overlay qTD */ 466 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 467 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 468 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 469 sqh->sqtd = NULL; 470 #ifdef EHCI_DEBUG 471 if (ehcidebug) { 472 ehci_dump_sqh(sqh); 473 } 474 #endif 475 476 /* Point to async list */ 477 sc->sc_async_head = sqh; 478 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 479 480 usb_callout_init(sc->sc_tmo_intrlist); 481 482 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 483 484 /* Turn on controller */ 485 EOWRITE4(sc, EHCI_USBCMD, 486 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 487 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 488 EHCI_CMD_ASE | 489 EHCI_CMD_PSE | 490 EHCI_CMD_RS); 491 492 /* Take over port ownership */ 493 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 494 495 for (i = 0; i < 100; i++) { 496 usb_delay_ms(&sc->sc_bus, 1); 497 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 498 if (!hcr) 499 break; 500 } 501 if (hcr) { 502 aprint_error("%s: run timeout\n", device_xname(sc->sc_dev)); 503 return (USBD_IOERROR); 504 } 505 506 /* Enable interrupts */ 507 DPRINTFN(1,("ehci_init: enabling\n")); 508 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 509 510 return (USBD_NORMAL_COMPLETION); 511 512 #if 0 513 bad2: 514 ehci_free_sqh(sc, sc->sc_async_head); 515 #endif 516 bad1: 517 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 518 return (err); 519 } 520 521 int 522 ehci_intr(void *v) 523 { 524 ehci_softc_t *sc = v; 525 526 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 527 return (0); 528 529 /* If we get an interrupt while polling, then just ignore it. */ 530 if (sc->sc_bus.use_polling) { 531 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 532 533 if (intrs) 534 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 535 #ifdef DIAGNOSTIC 536 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 537 #endif 538 return (0); 539 } 540 541 return (ehci_intr1(sc)); 542 } 543 544 Static int 545 ehci_intr1(ehci_softc_t *sc) 546 { 547 u_int32_t intrs, eintrs; 548 549 DPRINTFN(20,("ehci_intr1: enter\n")); 550 551 /* In case the interrupt occurs before initialization has completed. */ 552 if (sc == NULL) { 553 #ifdef DIAGNOSTIC 554 printf("ehci_intr1: sc == NULL\n"); 555 #endif 556 return (0); 557 } 558 559 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 560 if (!intrs) 561 return (0); 562 563 eintrs = intrs & sc->sc_eintrs; 564 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 565 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 566 (u_int)eintrs)); 567 if (!eintrs) 568 return (0); 569 570 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 571 sc->sc_bus.intr_context++; 572 sc->sc_bus.no_intrs++; 573 if (eintrs & EHCI_STS_IAA) { 574 DPRINTF(("ehci_intr1: door bell\n")); 575 wakeup(&sc->sc_async_head); 576 eintrs &= ~EHCI_STS_IAA; 577 } 578 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 579 DPRINTFN(5,("ehci_intr1: %s %s\n", 580 eintrs & EHCI_STS_INT ? "INT" : "", 581 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 582 usb_schedsoftintr(&sc->sc_bus); 583 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 584 } 585 if (eintrs & EHCI_STS_HSE) { 586 printf("%s: unrecoverable error, controller halted\n", 587 device_xname(sc->sc_dev)); 588 /* XXX what else */ 589 } 590 if (eintrs & EHCI_STS_PCD) { 591 ehci_pcd(sc, sc->sc_intrxfer); 592 eintrs &= ~EHCI_STS_PCD; 593 } 594 595 sc->sc_bus.intr_context--; 596 597 if (eintrs != 0) { 598 /* Block unprocessed interrupts. */ 599 sc->sc_eintrs &= ~eintrs; 600 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 601 printf("%s: blocking intrs 0x%x\n", 602 device_xname(sc->sc_dev), eintrs); 603 } 604 605 return (1); 606 } 607 608 609 void 610 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 611 { 612 usbd_pipe_handle pipe; 613 u_char *p; 614 int i, m; 615 616 if (xfer == NULL) { 617 /* Just ignore the change. */ 618 return; 619 } 620 621 pipe = xfer->pipe; 622 623 p = KERNADDR(&xfer->dmabuf, 0); 624 m = min(sc->sc_noport, xfer->length * 8 - 1); 625 memset(p, 0, xfer->length); 626 for (i = 1; i <= m; i++) { 627 /* Pick out CHANGE bits from the status reg. */ 628 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 629 p[i/8] |= 1 << (i%8); 630 } 631 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 632 xfer->actlen = xfer->length; 633 xfer->status = USBD_NORMAL_COMPLETION; 634 635 usb_transfer_complete(xfer); 636 } 637 638 void 639 ehci_softintr(void *v) 640 { 641 struct usbd_bus *bus = v; 642 ehci_softc_t *sc = bus->hci_private; 643 struct ehci_xfer *ex, *nextex; 644 645 DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_xname(sc->sc_dev), 646 sc->sc_bus.intr_context)); 647 648 sc->sc_bus.intr_context++; 649 650 /* 651 * The only explanation I can think of for why EHCI is as brain dead 652 * as UHCI interrupt-wise is that Intel was involved in both. 653 * An interrupt just tells us that something is done, we have no 654 * clue what, so we need to scan through all active transfers. :-( 655 */ 656 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 657 nextex = LIST_NEXT(ex, inext); 658 ehci_check_intr(sc, ex); 659 } 660 661 /* Schedule a callout to catch any dropped transactions. */ 662 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 663 !LIST_EMPTY(&sc->sc_intrhead)) 664 usb_callout(sc->sc_tmo_intrlist, hz, 665 ehci_intrlist_timeout, sc); 666 667 #ifdef USB_USE_SOFTINTR 668 if (sc->sc_softwake) { 669 sc->sc_softwake = 0; 670 wakeup(&sc->sc_softwake); 671 } 672 #endif /* USB_USE_SOFTINTR */ 673 674 sc->sc_bus.intr_context--; 675 } 676 677 /* Check for an interrupt. */ 678 void 679 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 680 { 681 ehci_soft_qtd_t *sqtd, *lsqtd; 682 u_int32_t status; 683 684 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 685 686 if (ex->sqtdstart == NULL) { 687 printf("ehci_check_intr: sqtdstart=NULL\n"); 688 return; 689 } 690 lsqtd = ex->sqtdend; 691 #ifdef DIAGNOSTIC 692 if (lsqtd == NULL) { 693 printf("ehci_check_intr: lsqtd==0\n"); 694 return; 695 } 696 #endif 697 /* 698 * If the last TD is still active we need to check whether there 699 * is a an error somewhere in the middle, or whether there was a 700 * short packet (SPD and not ACTIVE). 701 */ 702 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 703 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 704 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 705 status = le32toh(sqtd->qtd.qtd_status); 706 /* If there's an active QTD the xfer isn't done. */ 707 if (status & EHCI_QTD_ACTIVE) 708 break; 709 /* Any kind of error makes the xfer done. */ 710 if (status & EHCI_QTD_HALTED) 711 goto done; 712 /* We want short packets, and it is short: it's done */ 713 if (EHCI_QTD_GET_BYTES(status) != 0) 714 goto done; 715 } 716 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 717 ex, ex->sqtdstart)); 718 return; 719 } 720 done: 721 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 722 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 723 ehci_idone(ex); 724 } 725 726 void 727 ehci_idone(struct ehci_xfer *ex) 728 { 729 usbd_xfer_handle xfer = &ex->xfer; 730 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 731 ehci_soft_qtd_t *sqtd, *lsqtd; 732 u_int32_t status = 0, nstatus = 0; 733 int actlen; 734 735 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 736 #ifdef DIAGNOSTIC 737 { 738 int s = splhigh(); 739 if (ex->isdone) { 740 splx(s); 741 #ifdef EHCI_DEBUG 742 printf("ehci_idone: ex is done!\n "); 743 ehci_dump_exfer(ex); 744 #else 745 printf("ehci_idone: ex=%p is done!\n", ex); 746 #endif 747 return; 748 } 749 ex->isdone = 1; 750 splx(s); 751 } 752 #endif 753 754 if (xfer->status == USBD_CANCELLED || 755 xfer->status == USBD_TIMEOUT) { 756 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 757 return; 758 } 759 760 #ifdef EHCI_DEBUG 761 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 762 if (ehcidebug > 10) 763 ehci_dump_sqtds(ex->sqtdstart); 764 #endif 765 766 /* The transfer is done, compute actual length and status. */ 767 lsqtd = ex->sqtdend; 768 actlen = 0; 769 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 770 nstatus = le32toh(sqtd->qtd.qtd_status); 771 if (nstatus & EHCI_QTD_ACTIVE) 772 break; 773 774 status = nstatus; 775 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 776 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 777 } 778 779 /* 780 * If there are left over TDs we need to update the toggle. 781 * The default pipe doesn't need it since control transfers 782 * start the toggle at 0 every time. 783 * For a short transfer we need to update the toggle for the missing 784 * packets within the qTD. 785 */ 786 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 787 xfer->pipe->device->default_pipe != xfer->pipe) { 788 DPRINTFN(2, ("ehci_idone: need toggle update " 789 "status=%08x nstatus=%08x\n", status, nstatus)); 790 #if 0 791 ehci_dump_sqh(epipe->sqh); 792 ehci_dump_sqtds(ex->sqtdstart); 793 #endif 794 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 795 } 796 797 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 798 xfer->length, actlen, status)); 799 xfer->actlen = actlen; 800 if (status & EHCI_QTD_HALTED) { 801 #ifdef EHCI_DEBUG 802 char sbuf[128]; 803 804 bitmask_snprintf((u_int32_t)status, 805 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 806 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 807 808 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 809 "status 0x%s\n", 810 xfer->pipe->device->address, 811 xfer->pipe->endpoint->edesc->bEndpointAddress, 812 sbuf)); 813 if (ehcidebug > 2) { 814 ehci_dump_sqh(epipe->sqh); 815 ehci_dump_sqtds(ex->sqtdstart); 816 } 817 #endif 818 /* low&full speed has an extra error flag */ 819 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 820 EHCI_QH_SPEED_HIGH) 821 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 822 else 823 status &= EHCI_QTD_STATERRS; 824 if (status == 0) /* no other errors means a stall */ 825 xfer->status = USBD_STALLED; 826 else 827 xfer->status = USBD_IOERROR; /* more info XXX */ 828 /* XXX need to reset TT on missed microframe */ 829 if (status & EHCI_QTD_MISSEDMICRO) { 830 ehci_softc_t *sc = 831 xfer->pipe->device->bus->hci_private; 832 833 printf("%s: missed microframe, TT reset not " 834 "implemented, hub might be inoperational\n", 835 device_xname(sc->sc_dev)); 836 } 837 } else { 838 xfer->status = USBD_NORMAL_COMPLETION; 839 } 840 841 usb_transfer_complete(xfer); 842 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 843 } 844 845 /* 846 * Wait here until controller claims to have an interrupt. 847 * Then call ehci_intr and return. Use timeout to avoid waiting 848 * too long. 849 */ 850 void 851 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 852 { 853 int timo; 854 u_int32_t intrs; 855 856 xfer->status = USBD_IN_PROGRESS; 857 for (timo = xfer->timeout; timo >= 0; timo--) { 858 usb_delay_ms(&sc->sc_bus, 1); 859 if (sc->sc_dying) 860 break; 861 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 862 sc->sc_eintrs; 863 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 864 #ifdef EHCI_DEBUG 865 if (ehcidebug > 15) 866 ehci_dump_regs(sc); 867 #endif 868 if (intrs) { 869 ehci_intr1(sc); 870 if (xfer->status != USBD_IN_PROGRESS) 871 return; 872 } 873 } 874 875 /* Timeout */ 876 DPRINTF(("ehci_waitintr: timeout\n")); 877 xfer->status = USBD_TIMEOUT; 878 usb_transfer_complete(xfer); 879 /* XXX should free TD */ 880 } 881 882 void 883 ehci_poll(struct usbd_bus *bus) 884 { 885 ehci_softc_t *sc = bus->hci_private; 886 #ifdef EHCI_DEBUG 887 static int last; 888 int new; 889 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 890 if (new != last) { 891 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 892 last = new; 893 } 894 #endif 895 896 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 897 ehci_intr1(sc); 898 } 899 900 void 901 ehci_childdet(device_t self, device_t child) 902 { 903 struct ehci_softc *sc = device_private(self); 904 905 KASSERT(sc->sc_child == child); 906 sc->sc_child = NULL; 907 } 908 909 int 910 ehci_detach(struct ehci_softc *sc, int flags) 911 { 912 int rv = 0; 913 914 if (sc->sc_child != NULL) 915 rv = config_detach(sc->sc_child, flags); 916 917 if (rv != 0) 918 return (rv); 919 920 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 921 922 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 923 924 /* XXX free other data structures XXX */ 925 mutex_destroy(&sc->sc_doorbell_lock); 926 927 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 928 929 return (rv); 930 } 931 932 933 int 934 ehci_activate(device_t self, enum devact act) 935 { 936 struct ehci_softc *sc = device_private(self); 937 int rv = 0; 938 939 switch (act) { 940 case DVACT_ACTIVATE: 941 return (EOPNOTSUPP); 942 943 case DVACT_DEACTIVATE: 944 sc->sc_dying = 1; 945 if (sc->sc_child != NULL) 946 rv = config_deactivate(sc->sc_child); 947 break; 948 } 949 return (rv); 950 } 951 952 /* 953 * Handle suspend/resume. 954 * 955 * We need to switch to polling mode here, because this routine is 956 * called from an interrupt context. This is all right since we 957 * are almost suspended anyway. 958 * 959 * Note that this power handler isn't to be registered directly; the 960 * bus glue needs to call out to it. 961 */ 962 bool 963 ehci_suspend(device_t dv PMF_FN_ARGS) 964 { 965 ehci_softc_t *sc = device_private(dv); 966 int i, s; 967 uint32_t cmd, hcr; 968 969 s = splhardusb(); 970 971 sc->sc_bus.use_polling++; 972 973 for (i = 1; i <= sc->sc_noport; i++) { 974 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 975 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 976 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 977 } 978 979 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 980 981 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 982 EOWRITE4(sc, EHCI_USBCMD, cmd); 983 984 for (i = 0; i < 100; i++) { 985 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 986 if (hcr == 0) 987 break; 988 989 usb_delay_ms(&sc->sc_bus, 1); 990 } 991 if (hcr != 0) 992 printf("%s: reset timeout\n", device_xname(dv)); 993 994 cmd &= ~EHCI_CMD_RS; 995 EOWRITE4(sc, EHCI_USBCMD, cmd); 996 997 for (i = 0; i < 100; i++) { 998 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 999 if (hcr == EHCI_STS_HCH) 1000 break; 1001 1002 usb_delay_ms(&sc->sc_bus, 1); 1003 } 1004 if (hcr != EHCI_STS_HCH) 1005 printf("%s: config timeout\n", device_xname(dv)); 1006 1007 sc->sc_bus.use_polling--; 1008 splx(s); 1009 1010 return true; 1011 } 1012 1013 bool 1014 ehci_resume(device_t dv PMF_FN_ARGS) 1015 { 1016 ehci_softc_t *sc = device_private(dv); 1017 int i; 1018 uint32_t cmd, hcr; 1019 1020 /* restore things in case the bios sucks */ 1021 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1022 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1023 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1024 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1025 1026 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE); 1027 1028 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1029 1030 hcr = 0; 1031 for (i = 1; i <= sc->sc_noport; i++) { 1032 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1033 if ((cmd & EHCI_PS_PO) == 0 && 1034 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1035 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1036 hcr = 1; 1037 } 1038 } 1039 1040 if (hcr) { 1041 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1042 1043 for (i = 1; i <= sc->sc_noport; i++) { 1044 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1045 if ((cmd & EHCI_PS_PO) == 0 && 1046 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1047 EOWRITE4(sc, EHCI_PORTSC(i), 1048 cmd & ~EHCI_PS_FPR); 1049 } 1050 } 1051 1052 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1053 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1054 1055 for (i = 0; i < 100; i++) { 1056 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1057 if (hcr != EHCI_STS_HCH) 1058 break; 1059 1060 usb_delay_ms(&sc->sc_bus, 1); 1061 } 1062 if (hcr == EHCI_STS_HCH) 1063 printf("%s: config timeout\n", device_xname(dv)); 1064 1065 return true; 1066 } 1067 1068 /* 1069 * Shut down the controller when the system is going down. 1070 */ 1071 bool 1072 ehci_shutdown(device_t self, int flags) 1073 { 1074 ehci_softc_t *sc = device_private(self); 1075 1076 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1077 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1078 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1079 return true; 1080 } 1081 1082 usbd_status 1083 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1084 { 1085 struct ehci_softc *sc = bus->hci_private; 1086 usbd_status err; 1087 1088 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1089 if (err == USBD_NOMEM) 1090 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1091 #ifdef EHCI_DEBUG 1092 if (err) 1093 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1094 #endif 1095 return (err); 1096 } 1097 1098 void 1099 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1100 { 1101 struct ehci_softc *sc = bus->hci_private; 1102 1103 if (dma->block->flags & USB_DMA_RESERVE) { 1104 usb_reserve_freem(&sc->sc_dma_reserve, 1105 dma); 1106 return; 1107 } 1108 usb_freemem(&sc->sc_bus, dma); 1109 } 1110 1111 usbd_xfer_handle 1112 ehci_allocx(struct usbd_bus *bus) 1113 { 1114 struct ehci_softc *sc = bus->hci_private; 1115 usbd_xfer_handle xfer; 1116 1117 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1118 if (xfer != NULL) { 1119 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1120 #ifdef DIAGNOSTIC 1121 if (xfer->busy_free != XFER_FREE) { 1122 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1123 xfer->busy_free); 1124 } 1125 #endif 1126 } else { 1127 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1128 } 1129 if (xfer != NULL) { 1130 memset(xfer, 0, sizeof(struct ehci_xfer)); 1131 #ifdef DIAGNOSTIC 1132 EXFER(xfer)->isdone = 1; 1133 xfer->busy_free = XFER_BUSY; 1134 #endif 1135 } 1136 return (xfer); 1137 } 1138 1139 void 1140 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1141 { 1142 struct ehci_softc *sc = bus->hci_private; 1143 1144 #ifdef DIAGNOSTIC 1145 if (xfer->busy_free != XFER_BUSY) { 1146 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1147 xfer->busy_free); 1148 } 1149 xfer->busy_free = XFER_FREE; 1150 if (!EXFER(xfer)->isdone) { 1151 printf("ehci_freex: !isdone\n"); 1152 } 1153 #endif 1154 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1155 } 1156 1157 Static void 1158 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1159 { 1160 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1161 1162 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1163 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1164 #ifdef USB_DEBUG 1165 if (ehcidebug) 1166 usbd_dump_pipe(pipe); 1167 #endif 1168 epipe->nexttoggle = 0; 1169 } 1170 1171 Static void 1172 ehci_noop(usbd_pipe_handle pipe) 1173 { 1174 } 1175 1176 #ifdef EHCI_DEBUG 1177 void 1178 ehci_dump_regs(ehci_softc_t *sc) 1179 { 1180 int i; 1181 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1182 EOREAD4(sc, EHCI_USBCMD), 1183 EOREAD4(sc, EHCI_USBSTS), 1184 EOREAD4(sc, EHCI_USBINTR)); 1185 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1186 EOREAD4(sc, EHCI_FRINDEX), 1187 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1188 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1189 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1190 for (i = 1; i <= sc->sc_noport; i++) 1191 printf("port %d status=0x%08x\n", i, 1192 EOREAD4(sc, EHCI_PORTSC(i))); 1193 } 1194 1195 /* 1196 * Unused function - this is meant to be called from a kernel 1197 * debugger. 1198 */ 1199 void 1200 ehci_dump() 1201 { 1202 ehci_dump_regs(theehci); 1203 } 1204 1205 void 1206 ehci_dump_link(ehci_link_t link, int type) 1207 { 1208 link = le32toh(link); 1209 printf("0x%08x", link); 1210 if (link & EHCI_LINK_TERMINATE) 1211 printf("<T>"); 1212 else { 1213 printf("<"); 1214 if (type) { 1215 switch (EHCI_LINK_TYPE(link)) { 1216 case EHCI_LINK_ITD: printf("ITD"); break; 1217 case EHCI_LINK_QH: printf("QH"); break; 1218 case EHCI_LINK_SITD: printf("SITD"); break; 1219 case EHCI_LINK_FSTN: printf("FSTN"); break; 1220 } 1221 } 1222 printf(">"); 1223 } 1224 } 1225 1226 void 1227 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1228 { 1229 int i; 1230 u_int32_t stop; 1231 1232 stop = 0; 1233 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1234 ehci_dump_sqtd(sqtd); 1235 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1236 } 1237 if (sqtd) 1238 printf("dump aborted, too many TDs\n"); 1239 } 1240 1241 void 1242 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1243 { 1244 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1245 ehci_dump_qtd(&sqtd->qtd); 1246 } 1247 1248 void 1249 ehci_dump_qtd(ehci_qtd_t *qtd) 1250 { 1251 u_int32_t s; 1252 char sbuf[128]; 1253 1254 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1255 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1256 printf("\n"); 1257 s = le32toh(qtd->qtd_status); 1258 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1259 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1260 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1261 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1262 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1263 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1264 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1265 EHCI_QTD_GET_PID(s), sbuf); 1266 for (s = 0; s < 5; s++) 1267 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1268 } 1269 1270 void 1271 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1272 { 1273 ehci_qh_t *qh = &sqh->qh; 1274 u_int32_t endp, endphub; 1275 1276 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1277 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1278 endp = le32toh(qh->qh_endp); 1279 printf(" endp=0x%08x\n", endp); 1280 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1281 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1282 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1283 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1284 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1285 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1286 EHCI_QH_GET_NRL(endp)); 1287 endphub = le32toh(qh->qh_endphub); 1288 printf(" endphub=0x%08x\n", endphub); 1289 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1290 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1291 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1292 EHCI_QH_GET_MULT(endphub)); 1293 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1294 printf("Overlay qTD:\n"); 1295 ehci_dump_qtd(&qh->qh_qtd); 1296 } 1297 1298 #ifdef DIAGNOSTIC 1299 Static void 1300 ehci_dump_exfer(struct ehci_xfer *ex) 1301 { 1302 printf("ehci_dump_exfer: ex=%p\n", ex); 1303 } 1304 #endif 1305 #endif 1306 1307 usbd_status 1308 ehci_open(usbd_pipe_handle pipe) 1309 { 1310 usbd_device_handle dev = pipe->device; 1311 ehci_softc_t *sc = dev->bus->hci_private; 1312 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1313 u_int8_t addr = dev->address; 1314 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1315 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1316 ehci_soft_qh_t *sqh; 1317 usbd_status err; 1318 int s; 1319 int ival, speed, naks; 1320 int hshubaddr, hshubport; 1321 1322 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1323 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1324 1325 if (dev->myhsport) { 1326 hshubaddr = dev->myhsport->parent->address; 1327 hshubport = dev->myhsport->portno; 1328 } else { 1329 hshubaddr = 0; 1330 hshubport = 0; 1331 } 1332 1333 if (sc->sc_dying) 1334 return (USBD_IOERROR); 1335 1336 epipe->nexttoggle = 0; 1337 1338 if (addr == sc->sc_addr) { 1339 switch (ed->bEndpointAddress) { 1340 case USB_CONTROL_ENDPOINT: 1341 pipe->methods = &ehci_root_ctrl_methods; 1342 break; 1343 case UE_DIR_IN | EHCI_INTR_ENDPT: 1344 pipe->methods = &ehci_root_intr_methods; 1345 break; 1346 default: 1347 return (USBD_INVAL); 1348 } 1349 return (USBD_NORMAL_COMPLETION); 1350 } 1351 1352 /* XXX All this stuff is only valid for async. */ 1353 switch (dev->speed) { 1354 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1355 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1356 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1357 default: panic("ehci_open: bad device speed %d", dev->speed); 1358 } 1359 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1360 printf("%s: *** WARNING: opening low/full speed isoc device, " 1361 "this does not work yet.\n", 1362 device_xname(sc->sc_dev)); 1363 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1364 hshubaddr, hshubport)); 1365 return USBD_INVAL; 1366 } 1367 1368 naks = 8; /* XXX */ 1369 sqh = ehci_alloc_sqh(sc); 1370 if (sqh == NULL) 1371 return (USBD_NOMEM); 1372 /* qh_link filled when the QH is added */ 1373 sqh->qh.qh_endp = htole32( 1374 EHCI_QH_SET_ADDR(addr) | 1375 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1376 EHCI_QH_SET_EPS(speed) | 1377 EHCI_QH_DTC | 1378 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1379 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1380 EHCI_QH_CTL : 0) | 1381 EHCI_QH_SET_NRL(naks) 1382 ); 1383 sqh->qh.qh_endphub = htole32( 1384 EHCI_QH_SET_MULT(1) | 1385 EHCI_QH_SET_HUBA(hshubaddr) | 1386 EHCI_QH_SET_PORT(hshubport) | 1387 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1388 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1389 ); 1390 sqh->qh.qh_curqtd = EHCI_NULL; 1391 /* Fill the overlay qTD */ 1392 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1393 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1394 sqh->qh.qh_qtd.qtd_status = htole32(0); 1395 1396 epipe->sqh = sqh; 1397 1398 switch (xfertype) { 1399 case UE_CONTROL: 1400 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1401 0, &epipe->u.ctl.reqdma); 1402 #ifdef EHCI_DEBUG 1403 if (err) 1404 printf("ehci_open: usb_allocmem()=%d\n", err); 1405 #endif 1406 if (err) 1407 goto bad; 1408 pipe->methods = &ehci_device_ctrl_methods; 1409 s = splusb(); 1410 ehci_add_qh(sqh, sc->sc_async_head); 1411 splx(s); 1412 break; 1413 case UE_BULK: 1414 pipe->methods = &ehci_device_bulk_methods; 1415 s = splusb(); 1416 ehci_add_qh(sqh, sc->sc_async_head); 1417 splx(s); 1418 break; 1419 case UE_INTERRUPT: 1420 pipe->methods = &ehci_device_intr_methods; 1421 ival = pipe->interval; 1422 if (ival == USBD_DEFAULT_INTERVAL) { 1423 if (speed == EHCI_QH_SPEED_HIGH) { 1424 if (ed->bInterval > 16) { 1425 /* 1426 * illegal with high-speed, but there 1427 * were documentation bugs in the spec, 1428 * so be generous 1429 */ 1430 ival = 256; 1431 } else 1432 ival = (1 << (ed->bInterval - 1)) / 8; 1433 } else 1434 ival = ed->bInterval; 1435 } 1436 err = ehci_device_setintr(sc, sqh, ival); 1437 if (err) 1438 goto bad; 1439 break; 1440 case UE_ISOCHRONOUS: 1441 pipe->methods = &ehci_device_isoc_methods; 1442 /* FALLTHROUGH */ 1443 default: 1444 err = USBD_INVAL; 1445 goto bad; 1446 } 1447 return (USBD_NORMAL_COMPLETION); 1448 1449 bad: 1450 ehci_free_sqh(sc, sqh); 1451 return (err); 1452 } 1453 1454 /* 1455 * Add an ED to the schedule. Called at splusb(). 1456 */ 1457 void 1458 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1459 { 1460 SPLUSBCHECK; 1461 1462 sqh->next = head->next; 1463 sqh->qh.qh_link = head->qh.qh_link; 1464 head->next = sqh; 1465 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1466 1467 #ifdef EHCI_DEBUG 1468 if (ehcidebug > 5) { 1469 printf("ehci_add_qh:\n"); 1470 ehci_dump_sqh(sqh); 1471 } 1472 #endif 1473 } 1474 1475 /* 1476 * Remove an ED from the schedule. Called at splusb(). 1477 */ 1478 void 1479 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1480 { 1481 ehci_soft_qh_t *p; 1482 1483 SPLUSBCHECK; 1484 /* XXX */ 1485 for (p = head; p != NULL && p->next != sqh; p = p->next) 1486 ; 1487 if (p == NULL) 1488 panic("ehci_rem_qh: ED not found"); 1489 p->next = sqh->next; 1490 p->qh.qh_link = sqh->qh.qh_link; 1491 1492 ehci_sync_hc(sc); 1493 } 1494 1495 void 1496 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1497 { 1498 int i; 1499 u_int32_t status; 1500 1501 /* Save toggle bit and ping status. */ 1502 status = sqh->qh.qh_qtd.qtd_status & 1503 htole32(EHCI_QTD_TOGGLE_MASK | 1504 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1505 /* Set HALTED to make hw leave it alone. */ 1506 sqh->qh.qh_qtd.qtd_status = 1507 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1508 sqh->qh.qh_curqtd = 0; 1509 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1510 sqh->qh.qh_qtd.qtd_altnext = 0; 1511 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1512 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1513 sqh->sqtd = sqtd; 1514 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1515 sqh->qh.qh_qtd.qtd_status = status; 1516 } 1517 1518 /* 1519 * Ensure that the HC has released all references to the QH. We do this 1520 * by asking for a Async Advance Doorbell interrupt and then we wait for 1521 * the interrupt. 1522 * To make this easier we first obtain exclusive use of the doorbell. 1523 */ 1524 void 1525 ehci_sync_hc(ehci_softc_t *sc) 1526 { 1527 int s, error; 1528 1529 if (sc->sc_dying) { 1530 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1531 return; 1532 } 1533 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1534 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1535 s = splhardusb(); 1536 /* ask for doorbell */ 1537 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1538 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1539 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1540 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1541 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1542 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1543 splx(s); 1544 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1545 #ifdef DIAGNOSTIC 1546 if (error) 1547 printf("ehci_sync_hc: tsleep() = %d\n", error); 1548 #endif 1549 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1550 } 1551 1552 /***********/ 1553 1554 /* 1555 * Data structures and routines to emulate the root hub. 1556 */ 1557 Static usb_device_descriptor_t ehci_devd = { 1558 USB_DEVICE_DESCRIPTOR_SIZE, 1559 UDESC_DEVICE, /* type */ 1560 {0x00, 0x02}, /* USB version */ 1561 UDCLASS_HUB, /* class */ 1562 UDSUBCLASS_HUB, /* subclass */ 1563 UDPROTO_HSHUBSTT, /* protocol */ 1564 64, /* max packet */ 1565 {0},{0},{0x00,0x01}, /* device id */ 1566 1,2,0, /* string indicies */ 1567 1 /* # of configurations */ 1568 }; 1569 1570 Static const usb_device_qualifier_t ehci_odevd = { 1571 USB_DEVICE_DESCRIPTOR_SIZE, 1572 UDESC_DEVICE_QUALIFIER, /* type */ 1573 {0x00, 0x02}, /* USB version */ 1574 UDCLASS_HUB, /* class */ 1575 UDSUBCLASS_HUB, /* subclass */ 1576 UDPROTO_FSHUB, /* protocol */ 1577 64, /* max packet */ 1578 1, /* # of configurations */ 1579 0 1580 }; 1581 1582 Static const usb_config_descriptor_t ehci_confd = { 1583 USB_CONFIG_DESCRIPTOR_SIZE, 1584 UDESC_CONFIG, 1585 {USB_CONFIG_DESCRIPTOR_SIZE + 1586 USB_INTERFACE_DESCRIPTOR_SIZE + 1587 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1588 1, 1589 1, 1590 0, 1591 UC_ATTR_MBO | UC_SELF_POWERED, 1592 0 /* max power */ 1593 }; 1594 1595 Static const usb_interface_descriptor_t ehci_ifcd = { 1596 USB_INTERFACE_DESCRIPTOR_SIZE, 1597 UDESC_INTERFACE, 1598 0, 1599 0, 1600 1, 1601 UICLASS_HUB, 1602 UISUBCLASS_HUB, 1603 UIPROTO_HSHUBSTT, 1604 0 1605 }; 1606 1607 Static const usb_endpoint_descriptor_t ehci_endpd = { 1608 USB_ENDPOINT_DESCRIPTOR_SIZE, 1609 UDESC_ENDPOINT, 1610 UE_DIR_IN | EHCI_INTR_ENDPT, 1611 UE_INTERRUPT, 1612 {8, 0}, /* max packet */ 1613 12 1614 }; 1615 1616 Static const usb_hub_descriptor_t ehci_hubd = { 1617 USB_HUB_DESCRIPTOR_SIZE, 1618 UDESC_HUB, 1619 0, 1620 {0,0}, 1621 0, 1622 0, 1623 {""}, 1624 {""}, 1625 }; 1626 1627 /* 1628 * Simulate a hardware hub by handling all the necessary requests. 1629 */ 1630 Static usbd_status 1631 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1632 { 1633 usbd_status err; 1634 1635 /* Insert last in queue. */ 1636 err = usb_insert_transfer(xfer); 1637 if (err) 1638 return (err); 1639 1640 /* Pipe isn't running, start first */ 1641 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1642 } 1643 1644 Static usbd_status 1645 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1646 { 1647 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1648 usb_device_request_t *req; 1649 void *buf = NULL; 1650 int port, i; 1651 int s, len, value, index, l, totlen = 0; 1652 usb_port_status_t ps; 1653 usb_hub_descriptor_t hubd; 1654 usbd_status err; 1655 u_int32_t v; 1656 1657 if (sc->sc_dying) 1658 return (USBD_IOERROR); 1659 1660 #ifdef DIAGNOSTIC 1661 if (!(xfer->rqflags & URQ_REQUEST)) 1662 /* XXX panic */ 1663 return (USBD_INVAL); 1664 #endif 1665 req = &xfer->request; 1666 1667 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1668 req->bmRequestType, req->bRequest)); 1669 1670 len = UGETW(req->wLength); 1671 value = UGETW(req->wValue); 1672 index = UGETW(req->wIndex); 1673 1674 if (len != 0) 1675 buf = KERNADDR(&xfer->dmabuf, 0); 1676 1677 #define C(x,y) ((x) | ((y) << 8)) 1678 switch(C(req->bRequest, req->bmRequestType)) { 1679 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1680 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1681 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1682 /* 1683 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1684 * for the integrated root hub. 1685 */ 1686 break; 1687 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1688 if (len > 0) { 1689 *(u_int8_t *)buf = sc->sc_conf; 1690 totlen = 1; 1691 } 1692 break; 1693 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1694 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1695 if (len == 0) 1696 break; 1697 switch(value >> 8) { 1698 case UDESC_DEVICE: 1699 if ((value & 0xff) != 0) { 1700 err = USBD_IOERROR; 1701 goto ret; 1702 } 1703 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1704 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1705 memcpy(buf, &ehci_devd, l); 1706 break; 1707 /* 1708 * We can't really operate at another speed, but the spec says 1709 * we need this descriptor. 1710 */ 1711 case UDESC_DEVICE_QUALIFIER: 1712 if ((value & 0xff) != 0) { 1713 err = USBD_IOERROR; 1714 goto ret; 1715 } 1716 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1717 memcpy(buf, &ehci_odevd, l); 1718 break; 1719 /* 1720 * We can't really operate at another speed, but the spec says 1721 * we need this descriptor. 1722 */ 1723 case UDESC_OTHER_SPEED_CONFIGURATION: 1724 case UDESC_CONFIG: 1725 if ((value & 0xff) != 0) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1730 memcpy(buf, &ehci_confd, l); 1731 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1732 value >> 8; 1733 buf = (char *)buf + l; 1734 len -= l; 1735 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1736 totlen += l; 1737 memcpy(buf, &ehci_ifcd, l); 1738 buf = (char *)buf + l; 1739 len -= l; 1740 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1741 totlen += l; 1742 memcpy(buf, &ehci_endpd, l); 1743 break; 1744 case UDESC_STRING: 1745 #define sd ((usb_string_descriptor_t *)buf) 1746 switch (value & 0xff) { 1747 case 0: /* Language table */ 1748 totlen = usb_makelangtbl(sd, len); 1749 break; 1750 case 1: /* Vendor */ 1751 totlen = usb_makestrdesc(sd, len, 1752 sc->sc_vendor); 1753 break; 1754 case 2: /* Product */ 1755 totlen = usb_makestrdesc(sd, len, 1756 "EHCI root hub"); 1757 break; 1758 } 1759 #undef sd 1760 break; 1761 default: 1762 err = USBD_IOERROR; 1763 goto ret; 1764 } 1765 break; 1766 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1767 if (len > 0) { 1768 *(u_int8_t *)buf = 0; 1769 totlen = 1; 1770 } 1771 break; 1772 case C(UR_GET_STATUS, UT_READ_DEVICE): 1773 if (len > 1) { 1774 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1775 totlen = 2; 1776 } 1777 break; 1778 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1779 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1780 if (len > 1) { 1781 USETW(((usb_status_t *)buf)->wStatus, 0); 1782 totlen = 2; 1783 } 1784 break; 1785 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1786 if (value >= USB_MAX_DEVICES) { 1787 err = USBD_IOERROR; 1788 goto ret; 1789 } 1790 sc->sc_addr = value; 1791 break; 1792 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1793 if (value != 0 && value != 1) { 1794 err = USBD_IOERROR; 1795 goto ret; 1796 } 1797 sc->sc_conf = value; 1798 break; 1799 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1800 break; 1801 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1802 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1803 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1804 err = USBD_IOERROR; 1805 goto ret; 1806 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1807 break; 1808 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1809 break; 1810 /* Hub requests */ 1811 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1812 break; 1813 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1814 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1815 "port=%d feature=%d\n", 1816 index, value)); 1817 if (index < 1 || index > sc->sc_noport) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 port = EHCI_PORTSC(index); 1822 v = EOREAD4(sc, port); 1823 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1824 v &= ~EHCI_PS_CLEAR; 1825 switch(value) { 1826 case UHF_PORT_ENABLE: 1827 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1828 break; 1829 case UHF_PORT_SUSPEND: 1830 if (!(v & EHCI_PS_SUSP)) /* not suspended */ 1831 break; 1832 v &= ~EHCI_PS_SUSP; 1833 EOWRITE4(sc, port, v | EHCI_PS_FPR); 1834 /* see USB2 spec ch. 7.1.7.7 */ 1835 usb_delay_ms(&sc->sc_bus, 20); 1836 EOWRITE4(sc, port, v); 1837 usb_delay_ms(&sc->sc_bus, 2); 1838 #ifdef DEBUG 1839 v = EOREAD4(sc, port); 1840 if (v & (EHCI_PS_FPR | EHCI_PS_SUSP)) 1841 printf("ehci: resume failed: %x\n", v); 1842 #endif 1843 break; 1844 case UHF_PORT_POWER: 1845 if (sc->sc_hasppc) 1846 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1847 break; 1848 case UHF_PORT_TEST: 1849 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1850 "%d\n", index)); 1851 break; 1852 case UHF_PORT_INDICATOR: 1853 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1854 "%d\n", index)); 1855 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1856 break; 1857 case UHF_C_PORT_CONNECTION: 1858 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1859 break; 1860 case UHF_C_PORT_ENABLE: 1861 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1862 break; 1863 case UHF_C_PORT_SUSPEND: 1864 /* how? */ 1865 break; 1866 case UHF_C_PORT_OVER_CURRENT: 1867 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1868 break; 1869 case UHF_C_PORT_RESET: 1870 sc->sc_isreset[index] = 0; 1871 break; 1872 default: 1873 err = USBD_IOERROR; 1874 goto ret; 1875 } 1876 #if 0 1877 switch(value) { 1878 case UHF_C_PORT_CONNECTION: 1879 case UHF_C_PORT_ENABLE: 1880 case UHF_C_PORT_SUSPEND: 1881 case UHF_C_PORT_OVER_CURRENT: 1882 case UHF_C_PORT_RESET: 1883 default: 1884 break; 1885 } 1886 #endif 1887 break; 1888 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1889 if (len == 0) 1890 break; 1891 if ((value & 0xff) != 0) { 1892 err = USBD_IOERROR; 1893 goto ret; 1894 } 1895 hubd = ehci_hubd; 1896 hubd.bNbrPorts = sc->sc_noport; 1897 v = EOREAD4(sc, EHCI_HCSPARAMS); 1898 USETW(hubd.wHubCharacteristics, 1899 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1900 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1901 ? UHD_PORT_IND : 0); 1902 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1903 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1904 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1905 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1906 l = min(len, hubd.bDescLength); 1907 totlen = l; 1908 memcpy(buf, &hubd, l); 1909 break; 1910 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1911 if (len != 4) { 1912 err = USBD_IOERROR; 1913 goto ret; 1914 } 1915 memset(buf, 0, len); /* ? XXX */ 1916 totlen = len; 1917 break; 1918 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1919 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1920 index)); 1921 if (index < 1 || index > sc->sc_noport) { 1922 err = USBD_IOERROR; 1923 goto ret; 1924 } 1925 if (len != 4) { 1926 err = USBD_IOERROR; 1927 goto ret; 1928 } 1929 v = EOREAD4(sc, EHCI_PORTSC(index)); 1930 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1931 v)); 1932 i = UPS_HIGH_SPEED; 1933 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1934 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1935 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1936 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1937 if (v & EHCI_PS_PR) i |= UPS_RESET; 1938 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1939 USETW(ps.wPortStatus, i); 1940 i = 0; 1941 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1942 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1943 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1944 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 1945 USETW(ps.wPortChange, i); 1946 l = min(len, sizeof ps); 1947 memcpy(buf, &ps, l); 1948 totlen = l; 1949 break; 1950 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1951 err = USBD_IOERROR; 1952 goto ret; 1953 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1954 break; 1955 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1956 if (index < 1 || index > sc->sc_noport) { 1957 err = USBD_IOERROR; 1958 goto ret; 1959 } 1960 port = EHCI_PORTSC(index); 1961 v = EOREAD4(sc, port); 1962 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1963 v &= ~EHCI_PS_CLEAR; 1964 switch(value) { 1965 case UHF_PORT_ENABLE: 1966 EOWRITE4(sc, port, v | EHCI_PS_PE); 1967 break; 1968 case UHF_PORT_SUSPEND: 1969 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1970 break; 1971 case UHF_PORT_RESET: 1972 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1973 index)); 1974 if (EHCI_PS_IS_LOWSPEED(v)) { 1975 /* Low speed device, give up ownership. */ 1976 ehci_disown(sc, index, 1); 1977 break; 1978 } 1979 /* Start reset sequence. */ 1980 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1981 EOWRITE4(sc, port, v | EHCI_PS_PR); 1982 /* Wait for reset to complete. */ 1983 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1984 if (sc->sc_dying) { 1985 err = USBD_IOERROR; 1986 goto ret; 1987 } 1988 /* Terminate reset sequence. */ 1989 EOWRITE4(sc, port, v); 1990 /* Wait for HC to complete reset. */ 1991 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1992 if (sc->sc_dying) { 1993 err = USBD_IOERROR; 1994 goto ret; 1995 } 1996 v = EOREAD4(sc, port); 1997 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1998 if (v & EHCI_PS_PR) { 1999 printf("%s: port reset timeout\n", 2000 device_xname(sc->sc_dev)); 2001 return (USBD_TIMEOUT); 2002 } 2003 if (!(v & EHCI_PS_PE)) { 2004 /* Not a high speed device, give up ownership.*/ 2005 ehci_disown(sc, index, 0); 2006 break; 2007 } 2008 sc->sc_isreset[index] = 1; 2009 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2010 index, v)); 2011 break; 2012 case UHF_PORT_POWER: 2013 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2014 "%d (has PPC = %d)\n", index, 2015 sc->sc_hasppc)); 2016 if (sc->sc_hasppc) 2017 EOWRITE4(sc, port, v | EHCI_PS_PP); 2018 break; 2019 case UHF_PORT_TEST: 2020 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2021 "%d\n", index)); 2022 break; 2023 case UHF_PORT_INDICATOR: 2024 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2025 "%d\n", index)); 2026 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2027 break; 2028 default: 2029 err = USBD_IOERROR; 2030 goto ret; 2031 } 2032 break; 2033 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2034 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2035 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2036 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2037 break; 2038 default: 2039 err = USBD_IOERROR; 2040 goto ret; 2041 } 2042 xfer->actlen = totlen; 2043 err = USBD_NORMAL_COMPLETION; 2044 ret: 2045 xfer->status = err; 2046 s = splusb(); 2047 usb_transfer_complete(xfer); 2048 splx(s); 2049 return (USBD_IN_PROGRESS); 2050 } 2051 2052 void 2053 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2054 { 2055 int port; 2056 u_int32_t v; 2057 2058 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2059 #ifdef DIAGNOSTIC 2060 if (sc->sc_npcomp != 0) { 2061 int i = (index-1) / sc->sc_npcomp; 2062 if (i >= sc->sc_ncomp) 2063 printf("%s: strange port\n", 2064 device_xname(sc->sc_dev)); 2065 else 2066 printf("%s: handing over %s speed device on " 2067 "port %d to %s\n", 2068 device_xname(sc->sc_dev), 2069 lowspeed ? "low" : "full", 2070 index, device_xname(sc->sc_comps[i])); 2071 } else { 2072 printf("%s: npcomp == 0\n", device_xname(sc->sc_dev)); 2073 } 2074 #endif 2075 port = EHCI_PORTSC(index); 2076 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2077 EOWRITE4(sc, port, v | EHCI_PS_PO); 2078 } 2079 2080 /* Abort a root control request. */ 2081 Static void 2082 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2083 { 2084 /* Nothing to do, all transfers are synchronous. */ 2085 } 2086 2087 /* Close the root pipe. */ 2088 Static void 2089 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2090 { 2091 DPRINTF(("ehci_root_ctrl_close\n")); 2092 /* Nothing to do. */ 2093 } 2094 2095 void 2096 ehci_root_intr_done(usbd_xfer_handle xfer) 2097 { 2098 xfer->hcpriv = NULL; 2099 } 2100 2101 Static usbd_status 2102 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2103 { 2104 usbd_status err; 2105 2106 /* Insert last in queue. */ 2107 err = usb_insert_transfer(xfer); 2108 if (err) 2109 return (err); 2110 2111 /* Pipe isn't running, start first */ 2112 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2113 } 2114 2115 Static usbd_status 2116 ehci_root_intr_start(usbd_xfer_handle xfer) 2117 { 2118 usbd_pipe_handle pipe = xfer->pipe; 2119 ehci_softc_t *sc = pipe->device->bus->hci_private; 2120 2121 if (sc->sc_dying) 2122 return (USBD_IOERROR); 2123 2124 sc->sc_intrxfer = xfer; 2125 2126 return (USBD_IN_PROGRESS); 2127 } 2128 2129 /* Abort a root interrupt request. */ 2130 Static void 2131 ehci_root_intr_abort(usbd_xfer_handle xfer) 2132 { 2133 int s; 2134 2135 if (xfer->pipe->intrxfer == xfer) { 2136 DPRINTF(("ehci_root_intr_abort: remove\n")); 2137 xfer->pipe->intrxfer = NULL; 2138 } 2139 xfer->status = USBD_CANCELLED; 2140 s = splusb(); 2141 usb_transfer_complete(xfer); 2142 splx(s); 2143 } 2144 2145 /* Close the root pipe. */ 2146 Static void 2147 ehci_root_intr_close(usbd_pipe_handle pipe) 2148 { 2149 ehci_softc_t *sc = pipe->device->bus->hci_private; 2150 2151 DPRINTF(("ehci_root_intr_close\n")); 2152 2153 sc->sc_intrxfer = NULL; 2154 } 2155 2156 void 2157 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2158 { 2159 xfer->hcpriv = NULL; 2160 } 2161 2162 /************************/ 2163 2164 ehci_soft_qh_t * 2165 ehci_alloc_sqh(ehci_softc_t *sc) 2166 { 2167 ehci_soft_qh_t *sqh; 2168 usbd_status err; 2169 int i, offs; 2170 usb_dma_t dma; 2171 2172 if (sc->sc_freeqhs == NULL) { 2173 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2174 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2175 EHCI_PAGE_SIZE, &dma); 2176 #ifdef EHCI_DEBUG 2177 if (err) 2178 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2179 #endif 2180 if (err) 2181 return (NULL); 2182 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2183 offs = i * EHCI_SQH_SIZE; 2184 sqh = KERNADDR(&dma, offs); 2185 sqh->physaddr = DMAADDR(&dma, offs); 2186 sqh->next = sc->sc_freeqhs; 2187 sc->sc_freeqhs = sqh; 2188 } 2189 } 2190 sqh = sc->sc_freeqhs; 2191 sc->sc_freeqhs = sqh->next; 2192 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2193 sqh->next = NULL; 2194 return (sqh); 2195 } 2196 2197 void 2198 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2199 { 2200 sqh->next = sc->sc_freeqhs; 2201 sc->sc_freeqhs = sqh; 2202 } 2203 2204 ehci_soft_qtd_t * 2205 ehci_alloc_sqtd(ehci_softc_t *sc) 2206 { 2207 ehci_soft_qtd_t *sqtd; 2208 usbd_status err; 2209 int i, offs; 2210 usb_dma_t dma; 2211 int s; 2212 2213 if (sc->sc_freeqtds == NULL) { 2214 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2215 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2216 EHCI_PAGE_SIZE, &dma); 2217 #ifdef EHCI_DEBUG 2218 if (err) 2219 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2220 #endif 2221 if (err) 2222 return (NULL); 2223 s = splusb(); 2224 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2225 offs = i * EHCI_SQTD_SIZE; 2226 sqtd = KERNADDR(&dma, offs); 2227 sqtd->physaddr = DMAADDR(&dma, offs); 2228 sqtd->nextqtd = sc->sc_freeqtds; 2229 sc->sc_freeqtds = sqtd; 2230 } 2231 splx(s); 2232 } 2233 2234 s = splusb(); 2235 sqtd = sc->sc_freeqtds; 2236 sc->sc_freeqtds = sqtd->nextqtd; 2237 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2238 sqtd->nextqtd = NULL; 2239 sqtd->xfer = NULL; 2240 splx(s); 2241 2242 return (sqtd); 2243 } 2244 2245 void 2246 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2247 { 2248 int s; 2249 2250 s = splusb(); 2251 sqtd->nextqtd = sc->sc_freeqtds; 2252 sc->sc_freeqtds = sqtd; 2253 splx(s); 2254 } 2255 2256 usbd_status 2257 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2258 int alen, int rd, usbd_xfer_handle xfer, 2259 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2260 { 2261 ehci_soft_qtd_t *next, *cur; 2262 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2263 u_int32_t qtdstatus; 2264 int len, curlen, mps; 2265 int i, tog; 2266 usb_dma_t *dma = &xfer->dmabuf; 2267 u_int16_t flags = xfer->flags; 2268 2269 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2270 2271 len = alen; 2272 dataphys = DMAADDR(dma, 0); 2273 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2274 qtdstatus = EHCI_QTD_ACTIVE | 2275 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2276 EHCI_QTD_SET_CERR(3) 2277 /* IOC set below */ 2278 /* BYTES set below */ 2279 ; 2280 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2281 tog = epipe->nexttoggle; 2282 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2283 2284 cur = ehci_alloc_sqtd(sc); 2285 *sp = cur; 2286 if (cur == NULL) 2287 goto nomem; 2288 for (;;) { 2289 dataphyspage = EHCI_PAGE(dataphys); 2290 /* The EHCI hardware can handle at most 5 pages. */ 2291 if (dataphyslastpage - dataphyspage < 2292 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2293 /* we can handle it in this QTD */ 2294 curlen = len; 2295 } else { 2296 /* must use multiple TDs, fill as much as possible. */ 2297 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2298 EHCI_PAGE_OFFSET(dataphys); 2299 #ifdef DIAGNOSTIC 2300 if (curlen > len) { 2301 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2302 "len=0x%x offs=0x%x\n", curlen, len, 2303 EHCI_PAGE_OFFSET(dataphys)); 2304 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2305 dataphyslastpage, dataphyspage, 2306 dataphys); 2307 curlen = len; 2308 } 2309 #endif 2310 /* the length must be a multiple of the max size */ 2311 curlen -= curlen % mps; 2312 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2313 "curlen=%d\n", curlen)); 2314 #ifdef DIAGNOSTIC 2315 if (curlen == 0) 2316 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2317 #endif 2318 } 2319 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2320 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2321 dataphys, dataphyslastpage, 2322 len, curlen)); 2323 len -= curlen; 2324 2325 /* 2326 * Allocate another transfer if there's more data left, 2327 * or if force last short transfer flag is set and we're 2328 * allocating a multiple of the max packet size. 2329 */ 2330 if (len != 0 || 2331 ((curlen % mps) == 0 && !rd && curlen != 0 && 2332 (flags & USBD_FORCE_SHORT_XFER))) { 2333 next = ehci_alloc_sqtd(sc); 2334 if (next == NULL) 2335 goto nomem; 2336 nextphys = htole32(next->physaddr); 2337 } else { 2338 next = NULL; 2339 nextphys = EHCI_NULL; 2340 } 2341 2342 for (i = 0; i * EHCI_PAGE_SIZE < 2343 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2344 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2345 if (i != 0) /* use offset only in first buffer */ 2346 a = EHCI_PAGE(a); 2347 cur->qtd.qtd_buffer[i] = htole32(a); 2348 cur->qtd.qtd_buffer_hi[i] = 0; 2349 #ifdef DIAGNOSTIC 2350 if (i >= EHCI_QTD_NBUFFERS) { 2351 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2352 goto nomem; 2353 } 2354 #endif 2355 } 2356 cur->nextqtd = next; 2357 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2358 cur->qtd.qtd_status = 2359 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2360 cur->xfer = xfer; 2361 cur->len = curlen; 2362 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2363 dataphys, dataphys + curlen)); 2364 /* adjust the toggle based on the number of packets in this 2365 qtd */ 2366 if (((curlen + mps - 1) / mps) & 1) { 2367 tog ^= 1; 2368 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2369 } 2370 if (next == NULL) 2371 break; 2372 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2373 dataphys += curlen; 2374 cur = next; 2375 } 2376 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2377 *ep = cur; 2378 epipe->nexttoggle = tog; 2379 2380 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2381 *sp, *ep)); 2382 2383 return (USBD_NORMAL_COMPLETION); 2384 2385 nomem: 2386 /* XXX free chain */ 2387 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2388 return (USBD_NOMEM); 2389 } 2390 2391 Static void 2392 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2393 ehci_soft_qtd_t *sqtdend) 2394 { 2395 ehci_soft_qtd_t *p; 2396 int i; 2397 2398 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2399 sqtd, sqtdend)); 2400 2401 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2402 p = sqtd->nextqtd; 2403 ehci_free_sqtd(sc, sqtd); 2404 } 2405 } 2406 2407 /****************/ 2408 2409 /* 2410 * Close a reqular pipe. 2411 * Assumes that there are no pending transactions. 2412 */ 2413 void 2414 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2415 { 2416 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2417 ehci_softc_t *sc = pipe->device->bus->hci_private; 2418 ehci_soft_qh_t *sqh = epipe->sqh; 2419 int s; 2420 2421 s = splusb(); 2422 ehci_rem_qh(sc, sqh, head); 2423 splx(s); 2424 ehci_free_sqh(sc, epipe->sqh); 2425 } 2426 2427 /* 2428 * Abort a device request. 2429 * If this routine is called at splusb() it guarantees that the request 2430 * will be removed from the hardware scheduling and that the callback 2431 * for it will be called with USBD_CANCELLED status. 2432 * It's impossible to guarantee that the requested transfer will not 2433 * have happened since the hardware runs concurrently. 2434 * If the transaction has already happened we rely on the ordinary 2435 * interrupt processing to process it. 2436 * XXX This is most probably wrong. 2437 */ 2438 void 2439 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2440 { 2441 #define exfer EXFER(xfer) 2442 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2443 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2444 ehci_soft_qh_t *sqh = epipe->sqh; 2445 ehci_soft_qtd_t *sqtd; 2446 ehci_physaddr_t cur; 2447 u_int32_t qhstatus; 2448 int s; 2449 int hit; 2450 int wake; 2451 2452 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2453 2454 if (sc->sc_dying) { 2455 /* If we're dying, just do the software part. */ 2456 s = splusb(); 2457 xfer->status = status; /* make software ignore it */ 2458 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2459 usb_transfer_complete(xfer); 2460 splx(s); 2461 return; 2462 } 2463 2464 if (xfer->device->bus->intr_context || !curproc) 2465 panic("ehci_abort_xfer: not in process context"); 2466 2467 /* 2468 * If an abort is already in progress then just wait for it to 2469 * complete and return. 2470 */ 2471 if (xfer->hcflags & UXFER_ABORTING) { 2472 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2473 #ifdef DIAGNOSTIC 2474 if (status == USBD_TIMEOUT) 2475 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2476 #endif 2477 /* Override the status which might be USBD_TIMEOUT. */ 2478 xfer->status = status; 2479 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2480 xfer->hcflags |= UXFER_ABORTWAIT; 2481 while (xfer->hcflags & UXFER_ABORTING) 2482 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2483 return; 2484 } 2485 xfer->hcflags |= UXFER_ABORTING; 2486 2487 /* 2488 * Step 1: Make interrupt routine and hardware ignore xfer. 2489 */ 2490 s = splusb(); 2491 xfer->status = status; /* make software ignore it */ 2492 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2493 qhstatus = sqh->qh.qh_qtd.qtd_status; 2494 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2495 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2496 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2497 if (sqtd == exfer->sqtdend) 2498 break; 2499 } 2500 splx(s); 2501 2502 /* 2503 * Step 2: Wait until we know hardware has finished any possible 2504 * use of the xfer. Also make sure the soft interrupt routine 2505 * has run. 2506 */ 2507 ehci_sync_hc(sc); 2508 s = splusb(); 2509 #ifdef USB_USE_SOFTINTR 2510 sc->sc_softwake = 1; 2511 #endif /* USB_USE_SOFTINTR */ 2512 usb_schedsoftintr(&sc->sc_bus); 2513 #ifdef USB_USE_SOFTINTR 2514 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2515 #endif /* USB_USE_SOFTINTR */ 2516 splx(s); 2517 2518 /* 2519 * Step 3: Remove any vestiges of the xfer from the hardware. 2520 * The complication here is that the hardware may have executed 2521 * beyond the xfer we're trying to abort. So as we're scanning 2522 * the TDs of this xfer we check if the hardware points to 2523 * any of them. 2524 */ 2525 s = splusb(); /* XXX why? */ 2526 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2527 hit = 0; 2528 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2529 hit |= cur == sqtd->physaddr; 2530 if (sqtd == exfer->sqtdend) 2531 break; 2532 } 2533 sqtd = sqtd->nextqtd; 2534 /* Zap curqtd register if hardware pointed inside the xfer. */ 2535 if (hit && sqtd != NULL) { 2536 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2537 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2538 sqh->qh.qh_qtd.qtd_status = qhstatus; 2539 } else { 2540 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2541 } 2542 2543 /* 2544 * Step 4: Execute callback. 2545 */ 2546 #ifdef DIAGNOSTIC 2547 exfer->isdone = 1; 2548 #endif 2549 wake = xfer->hcflags & UXFER_ABORTWAIT; 2550 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2551 usb_transfer_complete(xfer); 2552 if (wake) 2553 wakeup(&xfer->hcflags); 2554 2555 splx(s); 2556 #undef exfer 2557 } 2558 2559 void 2560 ehci_timeout(void *addr) 2561 { 2562 struct ehci_xfer *exfer = addr; 2563 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2564 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2565 2566 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2567 #ifdef USB_DEBUG 2568 if (ehcidebug > 1) 2569 usbd_dump_pipe(exfer->xfer.pipe); 2570 #endif 2571 2572 if (sc->sc_dying) { 2573 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2574 return; 2575 } 2576 2577 /* Execute the abort in a process context. */ 2578 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2579 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2580 USB_TASKQ_HC); 2581 } 2582 2583 void 2584 ehci_timeout_task(void *addr) 2585 { 2586 usbd_xfer_handle xfer = addr; 2587 int s; 2588 2589 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2590 2591 s = splusb(); 2592 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2593 splx(s); 2594 } 2595 2596 /************************/ 2597 2598 Static usbd_status 2599 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2600 { 2601 usbd_status err; 2602 2603 /* Insert last in queue. */ 2604 err = usb_insert_transfer(xfer); 2605 if (err) 2606 return (err); 2607 2608 /* Pipe isn't running, start first */ 2609 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2610 } 2611 2612 Static usbd_status 2613 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2614 { 2615 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2616 usbd_status err; 2617 2618 if (sc->sc_dying) 2619 return (USBD_IOERROR); 2620 2621 #ifdef DIAGNOSTIC 2622 if (!(xfer->rqflags & URQ_REQUEST)) { 2623 /* XXX panic */ 2624 printf("ehci_device_ctrl_transfer: not a request\n"); 2625 return (USBD_INVAL); 2626 } 2627 #endif 2628 2629 err = ehci_device_request(xfer); 2630 if (err) 2631 return (err); 2632 2633 if (sc->sc_bus.use_polling) 2634 ehci_waitintr(sc, xfer); 2635 return (USBD_IN_PROGRESS); 2636 } 2637 2638 void 2639 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2640 { 2641 struct ehci_xfer *ex = EXFER(xfer); 2642 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2643 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2644 2645 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2646 2647 #ifdef DIAGNOSTIC 2648 if (!(xfer->rqflags & URQ_REQUEST)) { 2649 panic("ehci_ctrl_done: not a request"); 2650 } 2651 #endif 2652 2653 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2654 ehci_del_intr_list(ex); /* remove from active list */ 2655 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2656 } 2657 2658 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2659 } 2660 2661 /* Abort a device control request. */ 2662 Static void 2663 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2664 { 2665 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2666 ehci_abort_xfer(xfer, USBD_CANCELLED); 2667 } 2668 2669 /* Close a device control pipe. */ 2670 Static void 2671 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2672 { 2673 ehci_softc_t *sc = pipe->device->bus->hci_private; 2674 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2675 2676 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2677 ehci_close_pipe(pipe, sc->sc_async_head); 2678 } 2679 2680 usbd_status 2681 ehci_device_request(usbd_xfer_handle xfer) 2682 { 2683 #define exfer EXFER(xfer) 2684 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2685 usb_device_request_t *req = &xfer->request; 2686 usbd_device_handle dev = epipe->pipe.device; 2687 ehci_softc_t *sc = dev->bus->hci_private; 2688 int addr = dev->address; 2689 ehci_soft_qtd_t *setup, *stat, *next; 2690 ehci_soft_qh_t *sqh; 2691 int isread; 2692 int len; 2693 usbd_status err; 2694 int s; 2695 2696 isread = req->bmRequestType & UT_READ; 2697 len = UGETW(req->wLength); 2698 2699 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2700 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2701 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2702 UGETW(req->wIndex), len, addr, 2703 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2704 2705 setup = ehci_alloc_sqtd(sc); 2706 if (setup == NULL) { 2707 err = USBD_NOMEM; 2708 goto bad1; 2709 } 2710 stat = ehci_alloc_sqtd(sc); 2711 if (stat == NULL) { 2712 err = USBD_NOMEM; 2713 goto bad2; 2714 } 2715 2716 sqh = epipe->sqh; 2717 epipe->u.ctl.length = len; 2718 2719 /* Update device address and length since they may have changed 2720 during the setup of the control pipe in usbd_new_device(). */ 2721 /* XXX This only needs to be done once, but it's too early in open. */ 2722 /* XXXX Should not touch ED here! */ 2723 sqh->qh.qh_endp = 2724 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2725 htole32( 2726 EHCI_QH_SET_ADDR(addr) | 2727 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2728 ); 2729 2730 /* Set up data transaction */ 2731 if (len != 0) { 2732 ehci_soft_qtd_t *end; 2733 2734 /* Start toggle at 1. */ 2735 epipe->nexttoggle = 1; 2736 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2737 &next, &end); 2738 if (err) 2739 goto bad3; 2740 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2741 end->nextqtd = stat; 2742 end->qtd.qtd_next = 2743 end->qtd.qtd_altnext = htole32(stat->physaddr); 2744 } else { 2745 next = stat; 2746 } 2747 2748 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2749 2750 /* Clear toggle */ 2751 setup->qtd.qtd_status = htole32( 2752 EHCI_QTD_ACTIVE | 2753 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2754 EHCI_QTD_SET_CERR(3) | 2755 EHCI_QTD_SET_TOGGLE(0) | 2756 EHCI_QTD_SET_BYTES(sizeof *req) 2757 ); 2758 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2759 setup->qtd.qtd_buffer_hi[0] = 0; 2760 setup->nextqtd = next; 2761 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2762 setup->xfer = xfer; 2763 setup->len = sizeof *req; 2764 2765 stat->qtd.qtd_status = htole32( 2766 EHCI_QTD_ACTIVE | 2767 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2768 EHCI_QTD_SET_CERR(3) | 2769 EHCI_QTD_SET_TOGGLE(1) | 2770 EHCI_QTD_IOC 2771 ); 2772 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2773 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2774 stat->nextqtd = NULL; 2775 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2776 stat->xfer = xfer; 2777 stat->len = 0; 2778 2779 #ifdef EHCI_DEBUG 2780 if (ehcidebug > 5) { 2781 DPRINTF(("ehci_device_request:\n")); 2782 ehci_dump_sqh(sqh); 2783 ehci_dump_sqtds(setup); 2784 } 2785 #endif 2786 2787 exfer->sqtdstart = setup; 2788 exfer->sqtdend = stat; 2789 #ifdef DIAGNOSTIC 2790 if (!exfer->isdone) { 2791 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2792 } 2793 exfer->isdone = 0; 2794 #endif 2795 2796 /* Insert qTD in QH list. */ 2797 s = splusb(); 2798 ehci_set_qh_qtd(sqh, setup); 2799 if (xfer->timeout && !sc->sc_bus.use_polling) { 2800 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2801 ehci_timeout, xfer); 2802 } 2803 ehci_add_intr_list(sc, exfer); 2804 xfer->status = USBD_IN_PROGRESS; 2805 splx(s); 2806 2807 #ifdef EHCI_DEBUG 2808 if (ehcidebug > 10) { 2809 DPRINTF(("ehci_device_request: status=%x\n", 2810 EOREAD4(sc, EHCI_USBSTS))); 2811 delay(10000); 2812 ehci_dump_regs(sc); 2813 ehci_dump_sqh(sc->sc_async_head); 2814 ehci_dump_sqh(sqh); 2815 ehci_dump_sqtds(setup); 2816 } 2817 #endif 2818 2819 return (USBD_NORMAL_COMPLETION); 2820 2821 bad3: 2822 ehci_free_sqtd(sc, stat); 2823 bad2: 2824 ehci_free_sqtd(sc, setup); 2825 bad1: 2826 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2827 xfer->status = err; 2828 usb_transfer_complete(xfer); 2829 return (err); 2830 #undef exfer 2831 } 2832 2833 /* 2834 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2835 * qTD status, or miss signalling occasionally under heavy load. If the host 2836 * machine is too fast, we we can miss transaction completion - when we scan 2837 * the active list the transaction still seems to be active. This generally 2838 * exhibits itself as a umass stall that never recovers. 2839 * 2840 * We work around this behaviour by setting up this callback after any softintr 2841 * that completes with transactions still pending, giving us another chance to 2842 * check for completion after the writeback has taken place. 2843 */ 2844 void 2845 ehci_intrlist_timeout(void *arg) 2846 { 2847 ehci_softc_t *sc = arg; 2848 int s = splusb(); 2849 2850 DPRINTF(("ehci_intrlist_timeout\n")); 2851 usb_schedsoftintr(&sc->sc_bus); 2852 2853 splx(s); 2854 } 2855 2856 /************************/ 2857 2858 Static usbd_status 2859 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2860 { 2861 usbd_status err; 2862 2863 /* Insert last in queue. */ 2864 err = usb_insert_transfer(xfer); 2865 if (err) 2866 return (err); 2867 2868 /* Pipe isn't running, start first */ 2869 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2870 } 2871 2872 usbd_status 2873 ehci_device_bulk_start(usbd_xfer_handle xfer) 2874 { 2875 #define exfer EXFER(xfer) 2876 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2877 usbd_device_handle dev = epipe->pipe.device; 2878 ehci_softc_t *sc = dev->bus->hci_private; 2879 ehci_soft_qtd_t *data, *dataend; 2880 ehci_soft_qh_t *sqh; 2881 usbd_status err; 2882 int len, isread, endpt; 2883 int s; 2884 2885 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2886 xfer, xfer->length, xfer->flags)); 2887 2888 if (sc->sc_dying) 2889 return (USBD_IOERROR); 2890 2891 #ifdef DIAGNOSTIC 2892 if (xfer->rqflags & URQ_REQUEST) 2893 panic("ehci_device_bulk_start: a request"); 2894 #endif 2895 2896 len = xfer->length; 2897 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2898 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2899 sqh = epipe->sqh; 2900 2901 epipe->u.bulk.length = len; 2902 2903 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2904 &dataend); 2905 if (err) { 2906 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2907 xfer->status = err; 2908 usb_transfer_complete(xfer); 2909 return (err); 2910 } 2911 2912 #ifdef EHCI_DEBUG 2913 if (ehcidebug > 5) { 2914 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2915 ehci_dump_sqh(sqh); 2916 ehci_dump_sqtds(data); 2917 } 2918 #endif 2919 2920 /* Set up interrupt info. */ 2921 exfer->sqtdstart = data; 2922 exfer->sqtdend = dataend; 2923 #ifdef DIAGNOSTIC 2924 if (!exfer->isdone) { 2925 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2926 } 2927 exfer->isdone = 0; 2928 #endif 2929 2930 s = splusb(); 2931 ehci_set_qh_qtd(sqh, data); 2932 if (xfer->timeout && !sc->sc_bus.use_polling) { 2933 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2934 ehci_timeout, xfer); 2935 } 2936 ehci_add_intr_list(sc, exfer); 2937 xfer->status = USBD_IN_PROGRESS; 2938 splx(s); 2939 2940 #ifdef EHCI_DEBUG 2941 if (ehcidebug > 10) { 2942 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2943 delay(10000); 2944 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2945 ehci_dump_regs(sc); 2946 #if 0 2947 printf("async_head:\n"); 2948 ehci_dump_sqh(sc->sc_async_head); 2949 #endif 2950 printf("sqh:\n"); 2951 ehci_dump_sqh(sqh); 2952 ehci_dump_sqtds(data); 2953 } 2954 #endif 2955 2956 if (sc->sc_bus.use_polling) 2957 ehci_waitintr(sc, xfer); 2958 2959 return (USBD_IN_PROGRESS); 2960 #undef exfer 2961 } 2962 2963 Static void 2964 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2965 { 2966 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2967 ehci_abort_xfer(xfer, USBD_CANCELLED); 2968 } 2969 2970 /* 2971 * Close a device bulk pipe. 2972 */ 2973 Static void 2974 ehci_device_bulk_close(usbd_pipe_handle pipe) 2975 { 2976 ehci_softc_t *sc = pipe->device->bus->hci_private; 2977 2978 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2979 ehci_close_pipe(pipe, sc->sc_async_head); 2980 } 2981 2982 void 2983 ehci_device_bulk_done(usbd_xfer_handle xfer) 2984 { 2985 struct ehci_xfer *ex = EXFER(xfer); 2986 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2987 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2988 2989 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2990 xfer, xfer->actlen)); 2991 2992 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2993 ehci_del_intr_list(ex); /* remove from active list */ 2994 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2995 } 2996 2997 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2998 } 2999 3000 /************************/ 3001 3002 Static usbd_status 3003 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3004 { 3005 struct ehci_soft_islot *isp; 3006 int islot, lev; 3007 3008 /* Find a poll rate that is large enough. */ 3009 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3010 if (EHCI_ILEV_IVAL(lev) <= ival) 3011 break; 3012 3013 /* Pick an interrupt slot at the right level. */ 3014 /* XXX could do better than picking at random */ 3015 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3016 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3017 3018 sqh->islot = islot; 3019 isp = &sc->sc_islots[islot]; 3020 ehci_add_qh(sqh, isp->sqh); 3021 3022 return (USBD_NORMAL_COMPLETION); 3023 } 3024 3025 Static usbd_status 3026 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3027 { 3028 usbd_status err; 3029 3030 /* Insert last in queue. */ 3031 err = usb_insert_transfer(xfer); 3032 if (err) 3033 return (err); 3034 3035 /* 3036 * Pipe isn't running (otherwise err would be USBD_INPROG), 3037 * so start it first. 3038 */ 3039 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3040 } 3041 3042 Static usbd_status 3043 ehci_device_intr_start(usbd_xfer_handle xfer) 3044 { 3045 #define exfer EXFER(xfer) 3046 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3047 usbd_device_handle dev = xfer->pipe->device; 3048 ehci_softc_t *sc = dev->bus->hci_private; 3049 ehci_soft_qtd_t *data, *dataend; 3050 ehci_soft_qh_t *sqh; 3051 usbd_status err; 3052 int len, isread, endpt; 3053 int s; 3054 3055 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3056 xfer, xfer->length, xfer->flags)); 3057 3058 if (sc->sc_dying) 3059 return (USBD_IOERROR); 3060 3061 #ifdef DIAGNOSTIC 3062 if (xfer->rqflags & URQ_REQUEST) 3063 panic("ehci_device_intr_start: a request"); 3064 #endif 3065 3066 len = xfer->length; 3067 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3068 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3069 sqh = epipe->sqh; 3070 3071 epipe->u.intr.length = len; 3072 3073 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3074 &dataend); 3075 if (err) { 3076 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3077 xfer->status = err; 3078 usb_transfer_complete(xfer); 3079 return (err); 3080 } 3081 3082 #ifdef EHCI_DEBUG 3083 if (ehcidebug > 5) { 3084 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3085 ehci_dump_sqh(sqh); 3086 ehci_dump_sqtds(data); 3087 } 3088 #endif 3089 3090 /* Set up interrupt info. */ 3091 exfer->sqtdstart = data; 3092 exfer->sqtdend = dataend; 3093 #ifdef DIAGNOSTIC 3094 if (!exfer->isdone) { 3095 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3096 } 3097 exfer->isdone = 0; 3098 #endif 3099 3100 s = splusb(); 3101 ehci_set_qh_qtd(sqh, data); 3102 if (xfer->timeout && !sc->sc_bus.use_polling) { 3103 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3104 ehci_timeout, xfer); 3105 } 3106 ehci_add_intr_list(sc, exfer); 3107 xfer->status = USBD_IN_PROGRESS; 3108 splx(s); 3109 3110 #ifdef EHCI_DEBUG 3111 if (ehcidebug > 10) { 3112 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3113 delay(10000); 3114 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3115 ehci_dump_regs(sc); 3116 printf("sqh:\n"); 3117 ehci_dump_sqh(sqh); 3118 ehci_dump_sqtds(data); 3119 } 3120 #endif 3121 3122 if (sc->sc_bus.use_polling) 3123 ehci_waitintr(sc, xfer); 3124 3125 return (USBD_IN_PROGRESS); 3126 #undef exfer 3127 } 3128 3129 Static void 3130 ehci_device_intr_abort(usbd_xfer_handle xfer) 3131 { 3132 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3133 if (xfer->pipe->intrxfer == xfer) { 3134 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3135 xfer->pipe->intrxfer = NULL; 3136 } 3137 ehci_abort_xfer(xfer, USBD_CANCELLED); 3138 } 3139 3140 Static void 3141 ehci_device_intr_close(usbd_pipe_handle pipe) 3142 { 3143 ehci_softc_t *sc = pipe->device->bus->hci_private; 3144 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3145 struct ehci_soft_islot *isp; 3146 3147 isp = &sc->sc_islots[epipe->sqh->islot]; 3148 ehci_close_pipe(pipe, isp->sqh); 3149 } 3150 3151 Static void 3152 ehci_device_intr_done(usbd_xfer_handle xfer) 3153 { 3154 #define exfer EXFER(xfer) 3155 struct ehci_xfer *ex = EXFER(xfer); 3156 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3157 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3158 ehci_soft_qtd_t *data, *dataend; 3159 ehci_soft_qh_t *sqh; 3160 usbd_status err; 3161 int len, isread, endpt, s; 3162 3163 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3164 xfer, xfer->actlen)); 3165 3166 if (xfer->pipe->repeat) { 3167 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3168 3169 len = epipe->u.intr.length; 3170 xfer->length = len; 3171 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3172 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3173 sqh = epipe->sqh; 3174 3175 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3176 &data, &dataend); 3177 if (err) { 3178 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3179 xfer->status = err; 3180 return; 3181 } 3182 3183 /* Set up interrupt info. */ 3184 exfer->sqtdstart = data; 3185 exfer->sqtdend = dataend; 3186 #ifdef DIAGNOSTIC 3187 if (!exfer->isdone) { 3188 printf("ehci_device_intr_done: not done, ex=%p\n", 3189 exfer); 3190 } 3191 exfer->isdone = 0; 3192 #endif 3193 3194 s = splusb(); 3195 ehci_set_qh_qtd(sqh, data); 3196 if (xfer->timeout && !sc->sc_bus.use_polling) { 3197 usb_callout(xfer->timeout_handle, 3198 mstohz(xfer->timeout), ehci_timeout, xfer); 3199 } 3200 splx(s); 3201 3202 xfer->status = USBD_IN_PROGRESS; 3203 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3204 ehci_del_intr_list(ex); /* remove from active list */ 3205 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3206 } 3207 #undef exfer 3208 } 3209 3210 /************************/ 3211 3212 Static usbd_status 3213 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3214 { 3215 return USBD_IOERROR; 3216 } 3217 Static usbd_status 3218 ehci_device_isoc_start(usbd_xfer_handle xfer) 3219 { 3220 return USBD_IOERROR; 3221 } 3222 Static void 3223 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3224 { 3225 } 3226 Static void 3227 ehci_device_isoc_close(usbd_pipe_handle pipe) 3228 { 3229 } 3230 Static void 3231 ehci_device_isoc_done(usbd_xfer_handle xfer) 3232 { 3233 } 3234
Indexes created Thu Sep 25 08:09:54 GMT 2025