ehci.c revision 1.138
1 /* $NetBSD: ehci.c,v 1.138 2008/06/28 17:42:53 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2004,2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 34 * 35 * The EHCI 1.0 spec can be found at 36 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 37 * and the USB 2.0 spec at 38 * http://www.usb.org/developers/docs/usb_20.zip 39 * 40 */ 41 42 /* 43 * TODO: 44 * 1) hold off explorations by companion controllers until ehci has started. 45 * 46 * 2) The EHCI driver lacks support for isochronous transfers, so 47 * devices using them don't work. 48 * 49 * 3) The hub driver needs to handle and schedule the transaction translator, 50 * to assign place in frame where different devices get to go. See chapter 51 * on hubs in USB 2.0 for details. 52 * 53 * 4) command failures are not recovered correctly 54 */ 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.138 2008/06/28 17:42:53 bouyer Exp $"); 58 59 #include "ohci.h" 60 #include "uhci.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/kernel.h> 65 #include <sys/malloc.h> 66 #include <sys/device.h> 67 #include <sys/select.h> 68 #include <sys/proc.h> 69 #include <sys/queue.h> 70 #include <sys/mutex.h> 71 #include <sys/bus.h> 72 73 #include <machine/endian.h> 74 75 #include <dev/usb/usb.h> 76 #include <dev/usb/usbdi.h> 77 #include <dev/usb/usbdivar.h> 78 #include <dev/usb/usb_mem.h> 79 #include <dev/usb/usb_quirks.h> 80 81 #include <dev/usb/ehcireg.h> 82 #include <dev/usb/ehcivar.h> 83 #include <dev/usb/usbroothub_subr.h> 84 85 #ifdef EHCI_DEBUG 86 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 87 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 88 int ehcidebug = 0; 89 #ifndef __NetBSD__ 90 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 91 #endif 92 #else 93 #define DPRINTF(x) 94 #define DPRINTFN(n,x) 95 #endif 96 97 struct ehci_pipe { 98 struct usbd_pipe pipe; 99 int nexttoggle; 100 101 ehci_soft_qh_t *sqh; 102 union { 103 ehci_soft_qtd_t *qtd; 104 /* ehci_soft_itd_t *itd; */ 105 } tail; 106 union { 107 /* Control pipe */ 108 struct { 109 usb_dma_t reqdma; 110 u_int length; 111 } ctl; 112 /* Interrupt pipe */ 113 struct { 114 u_int length; 115 } intr; 116 /* Bulk pipe */ 117 struct { 118 u_int length; 119 } bulk; 120 /* Iso pipe */ 121 /* XXX */ 122 } u; 123 }; 124 125 Static usbd_status ehci_open(usbd_pipe_handle); 126 Static void ehci_poll(struct usbd_bus *); 127 Static void ehci_softintr(void *); 128 Static int ehci_intr1(ehci_softc_t *); 129 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 130 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 131 Static void ehci_idone(struct ehci_xfer *); 132 Static void ehci_timeout(void *); 133 Static void ehci_timeout_task(void *); 134 Static void ehci_intrlist_timeout(void *); 135 136 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 137 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 138 139 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 140 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 141 142 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 143 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 144 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 145 Static void ehci_root_ctrl_close(usbd_pipe_handle); 146 Static void ehci_root_ctrl_done(usbd_xfer_handle); 147 148 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 149 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 150 Static void ehci_root_intr_abort(usbd_xfer_handle); 151 Static void ehci_root_intr_close(usbd_pipe_handle); 152 Static void ehci_root_intr_done(usbd_xfer_handle); 153 154 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 156 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_device_ctrl_close(usbd_pipe_handle); 158 Static void ehci_device_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 162 Static void ehci_device_bulk_abort(usbd_xfer_handle); 163 Static void ehci_device_bulk_close(usbd_pipe_handle); 164 Static void ehci_device_bulk_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 168 Static void ehci_device_intr_abort(usbd_xfer_handle); 169 Static void ehci_device_intr_close(usbd_pipe_handle); 170 Static void ehci_device_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 174 Static void ehci_device_isoc_abort(usbd_xfer_handle); 175 Static void ehci_device_isoc_close(usbd_pipe_handle); 176 Static void ehci_device_isoc_done(usbd_xfer_handle); 177 178 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 179 Static void ehci_noop(usbd_pipe_handle pipe); 180 181 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 182 Static void ehci_disown(ehci_softc_t *, int, int); 183 184 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 185 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 186 187 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 188 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 189 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 190 ehci_softc_t *, int, int, usbd_xfer_handle, 191 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 192 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 193 ehci_soft_qtd_t *); 194 195 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 196 197 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 198 int ival); 199 200 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 201 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 202 ehci_soft_qh_t *); 203 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 204 Static void ehci_sync_hc(ehci_softc_t *); 205 206 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 207 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 208 209 #ifdef EHCI_DEBUG 210 Static void ehci_dump_regs(ehci_softc_t *); 211 void ehci_dump(void); 212 Static ehci_softc_t *theehci; 213 Static void ehci_dump_link(ehci_link_t, int); 214 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 215 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 216 Static void ehci_dump_qtd(ehci_qtd_t *); 217 Static void ehci_dump_sqh(ehci_soft_qh_t *); 218 #ifdef DIAGNOSTIC 219 Static void ehci_dump_exfer(struct ehci_xfer *); 220 #endif 221 #endif 222 223 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 224 225 #define EHCI_INTR_ENDPT 1 226 227 #define ehci_add_intr_list(sc, ex) \ 228 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 229 #define ehci_del_intr_list(ex) \ 230 do { \ 231 LIST_REMOVE((ex), inext); \ 232 (ex)->inext.le_prev = NULL; \ 233 } while (0) 234 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 235 236 Static const struct usbd_bus_methods ehci_bus_methods = { 237 ehci_open, 238 ehci_softintr, 239 ehci_poll, 240 ehci_allocm, 241 ehci_freem, 242 ehci_allocx, 243 ehci_freex, 244 }; 245 246 Static const struct usbd_pipe_methods ehci_root_ctrl_methods = { 247 ehci_root_ctrl_transfer, 248 ehci_root_ctrl_start, 249 ehci_root_ctrl_abort, 250 ehci_root_ctrl_close, 251 ehci_noop, 252 ehci_root_ctrl_done, 253 }; 254 255 Static const struct usbd_pipe_methods ehci_root_intr_methods = { 256 ehci_root_intr_transfer, 257 ehci_root_intr_start, 258 ehci_root_intr_abort, 259 ehci_root_intr_close, 260 ehci_noop, 261 ehci_root_intr_done, 262 }; 263 264 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = { 265 ehci_device_ctrl_transfer, 266 ehci_device_ctrl_start, 267 ehci_device_ctrl_abort, 268 ehci_device_ctrl_close, 269 ehci_noop, 270 ehci_device_ctrl_done, 271 }; 272 273 Static const struct usbd_pipe_methods ehci_device_intr_methods = { 274 ehci_device_intr_transfer, 275 ehci_device_intr_start, 276 ehci_device_intr_abort, 277 ehci_device_intr_close, 278 ehci_device_clear_toggle, 279 ehci_device_intr_done, 280 }; 281 282 Static const struct usbd_pipe_methods ehci_device_bulk_methods = { 283 ehci_device_bulk_transfer, 284 ehci_device_bulk_start, 285 ehci_device_bulk_abort, 286 ehci_device_bulk_close, 287 ehci_device_clear_toggle, 288 ehci_device_bulk_done, 289 }; 290 291 Static const struct usbd_pipe_methods ehci_device_isoc_methods = { 292 ehci_device_isoc_transfer, 293 ehci_device_isoc_start, 294 ehci_device_isoc_abort, 295 ehci_device_isoc_close, 296 ehci_noop, 297 ehci_device_isoc_done, 298 }; 299 300 static const uint8_t revbits[EHCI_MAX_POLLRATE] = { 301 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 302 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 303 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 304 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 305 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 306 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 307 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 308 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 309 }; 310 311 usbd_status 312 ehci_init(ehci_softc_t *sc) 313 { 314 u_int32_t vers, sparams, cparams, hcr; 315 u_int i; 316 usbd_status err; 317 ehci_soft_qh_t *sqh; 318 u_int ncomp; 319 320 DPRINTF(("ehci_init: start\n")); 321 #ifdef EHCI_DEBUG 322 theehci = sc; 323 #endif 324 325 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 326 327 vers = EREAD2(sc, EHCI_HCIVERSION); 328 aprint_verbose("%s: EHCI version %x.%x\n", device_xname(sc->sc_dev), 329 vers >> 8, vers & 0xff); 330 331 sparams = EREAD4(sc, EHCI_HCSPARAMS); 332 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 333 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 334 ncomp = EHCI_HCS_N_CC(sparams); 335 if (ncomp != sc->sc_ncomp) { 336 aprint_verbose("%s: wrong number of companions (%d != %d)\n", 337 device_xname(sc->sc_dev), ncomp, sc->sc_ncomp); 338 #if NOHCI == 0 || NUHCI == 0 339 aprint_error("%s: ohci or uhci probably not configured\n", 340 device_xname(sc->sc_dev)); 341 #endif 342 if (ncomp < sc->sc_ncomp) 343 sc->sc_ncomp = ncomp; 344 } 345 if (sc->sc_ncomp > 0) { 346 aprint_normal("%s: companion controller%s, %d port%s each:", 347 device_xname(sc->sc_dev), sc->sc_ncomp!=1 ? "s" : "", 348 EHCI_HCS_N_PCC(sparams), 349 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 350 for (i = 0; i < sc->sc_ncomp; i++) 351 aprint_normal(" %s", device_xname(sc->sc_comps[i])); 352 aprint_normal("\n"); 353 } 354 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 355 cparams = EREAD4(sc, EHCI_HCCPARAMS); 356 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 357 sc->sc_hasppc = EHCI_HCS_PPC(sparams); 358 359 if (EHCI_HCC_64BIT(cparams)) { 360 /* MUST clear segment register if 64 bit capable. */ 361 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 362 } 363 364 sc->sc_bus.usbrev = USBREV_2_0; 365 366 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 367 USB_MEM_RESERVE); 368 369 /* Reset the controller */ 370 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 371 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 372 usb_delay_ms(&sc->sc_bus, 1); 373 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 374 for (i = 0; i < 100; i++) { 375 usb_delay_ms(&sc->sc_bus, 1); 376 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 377 if (!hcr) 378 break; 379 } 380 if (hcr) { 381 aprint_error("%s: reset timeout\n", device_xname(sc->sc_dev)); 382 return (USBD_IOERROR); 383 } 384 385 /* XXX need proper intr scheduling */ 386 sc->sc_rand = 96; 387 388 /* frame list size at default, read back what we got and use that */ 389 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 390 case 0: sc->sc_flsize = 1024; break; 391 case 1: sc->sc_flsize = 512; break; 392 case 2: sc->sc_flsize = 256; break; 393 case 3: return (USBD_IOERROR); 394 } 395 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 396 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 397 if (err) 398 return (err); 399 DPRINTF(("%s: flsize=%d\n", device_xname(sc->sc_dev),sc->sc_flsize)); 400 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 401 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 402 403 /* Set up the bus struct. */ 404 sc->sc_bus.methods = &ehci_bus_methods; 405 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 406 407 sc->sc_eintrs = EHCI_NORMAL_INTRS; 408 409 /* 410 * Allocate the interrupt dummy QHs. These are arranged to give poll 411 * intervals that are powers of 2 times 1ms. 412 */ 413 for (i = 0; i < EHCI_INTRQHS; i++) { 414 sqh = ehci_alloc_sqh(sc); 415 if (sqh == NULL) { 416 err = USBD_NOMEM; 417 goto bad1; 418 } 419 sc->sc_islots[i].sqh = sqh; 420 } 421 for (i = 0; i < EHCI_INTRQHS; i++) { 422 sqh = sc->sc_islots[i].sqh; 423 if (i == 0) { 424 /* The last (1ms) QH terminates. */ 425 sqh->qh.qh_link = EHCI_NULL; 426 sqh->next = NULL; 427 } else { 428 /* Otherwise the next QH has half the poll interval */ 429 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 430 sqh->qh.qh_link = htole32(sqh->next->physaddr | 431 EHCI_LINK_QH); 432 } 433 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 434 sqh->qh.qh_curqtd = EHCI_NULL; 435 sqh->next = NULL; 436 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 437 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 438 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 439 sqh->sqtd = NULL; 440 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 441 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 442 } 443 /* Point the frame list at the last level (128ms). */ 444 for (i = 0; i < sc->sc_flsize; i++) { 445 int j; 446 447 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 448 revbits[i & (EHCI_MAX_POLLRATE-1)]; 449 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 450 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 451 i)].sqh->physaddr); 452 } 453 usb_syncmem(&sc->sc_fldma, 0, sc->sc_flsize * sizeof(ehci_link_t), 454 BUS_DMASYNC_PREWRITE); 455 456 /* Allocate dummy QH that starts the async list. */ 457 sqh = ehci_alloc_sqh(sc); 458 if (sqh == NULL) { 459 err = USBD_NOMEM; 460 goto bad1; 461 } 462 /* Fill the QH */ 463 sqh->qh.qh_endp = 464 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 465 sqh->qh.qh_link = 466 htole32(sqh->physaddr | EHCI_LINK_QH); 467 sqh->qh.qh_curqtd = EHCI_NULL; 468 sqh->next = NULL; 469 /* Fill the overlay qTD */ 470 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 471 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 472 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 473 sqh->sqtd = NULL; 474 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 475 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 476 #ifdef EHCI_DEBUG 477 if (ehcidebug) { 478 ehci_dump_sqh(sqh); 479 } 480 #endif 481 482 /* Point to async list */ 483 sc->sc_async_head = sqh; 484 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 485 486 usb_callout_init(sc->sc_tmo_intrlist); 487 488 mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE); 489 490 /* Turn on controller */ 491 EOWRITE4(sc, EHCI_USBCMD, 492 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 493 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 494 EHCI_CMD_ASE | 495 EHCI_CMD_PSE | 496 EHCI_CMD_RS); 497 498 /* Take over port ownership */ 499 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 500 501 for (i = 0; i < 100; i++) { 502 usb_delay_ms(&sc->sc_bus, 1); 503 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 504 if (!hcr) 505 break; 506 } 507 if (hcr) { 508 aprint_error("%s: run timeout\n", device_xname(sc->sc_dev)); 509 return (USBD_IOERROR); 510 } 511 512 /* Enable interrupts */ 513 DPRINTFN(1,("ehci_init: enabling\n")); 514 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 515 516 return (USBD_NORMAL_COMPLETION); 517 518 #if 0 519 bad2: 520 ehci_free_sqh(sc, sc->sc_async_head); 521 #endif 522 bad1: 523 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 524 return (err); 525 } 526 527 int 528 ehci_intr(void *v) 529 { 530 ehci_softc_t *sc = v; 531 532 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 533 return (0); 534 535 /* If we get an interrupt while polling, then just ignore it. */ 536 if (sc->sc_bus.use_polling) { 537 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 538 539 if (intrs) 540 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 541 #ifdef DIAGNOSTIC 542 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 543 #endif 544 return (0); 545 } 546 547 return (ehci_intr1(sc)); 548 } 549 550 Static int 551 ehci_intr1(ehci_softc_t *sc) 552 { 553 u_int32_t intrs, eintrs; 554 555 DPRINTFN(20,("ehci_intr1: enter\n")); 556 557 /* In case the interrupt occurs before initialization has completed. */ 558 if (sc == NULL) { 559 #ifdef DIAGNOSTIC 560 printf("ehci_intr1: sc == NULL\n"); 561 #endif 562 return (0); 563 } 564 565 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 566 if (!intrs) 567 return (0); 568 569 eintrs = intrs & sc->sc_eintrs; 570 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 571 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 572 (u_int)eintrs)); 573 if (!eintrs) 574 return (0); 575 576 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 577 sc->sc_bus.intr_context++; 578 sc->sc_bus.no_intrs++; 579 if (eintrs & EHCI_STS_IAA) { 580 DPRINTF(("ehci_intr1: door bell\n")); 581 wakeup(&sc->sc_async_head); 582 eintrs &= ~EHCI_STS_IAA; 583 } 584 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 585 DPRINTFN(5,("ehci_intr1: %s %s\n", 586 eintrs & EHCI_STS_INT ? "INT" : "", 587 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 588 usb_schedsoftintr(&sc->sc_bus); 589 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 590 } 591 if (eintrs & EHCI_STS_HSE) { 592 printf("%s: unrecoverable error, controller halted\n", 593 device_xname(sc->sc_dev)); 594 /* XXX what else */ 595 } 596 if (eintrs & EHCI_STS_PCD) { 597 ehci_pcd(sc, sc->sc_intrxfer); 598 eintrs &= ~EHCI_STS_PCD; 599 } 600 601 sc->sc_bus.intr_context--; 602 603 if (eintrs != 0) { 604 /* Block unprocessed interrupts. */ 605 sc->sc_eintrs &= ~eintrs; 606 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 607 printf("%s: blocking intrs 0x%x\n", 608 device_xname(sc->sc_dev), eintrs); 609 } 610 611 return (1); 612 } 613 614 615 void 616 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 617 { 618 usbd_pipe_handle pipe; 619 u_char *p; 620 int i, m; 621 622 if (xfer == NULL) { 623 /* Just ignore the change. */ 624 return; 625 } 626 627 pipe = xfer->pipe; 628 629 p = KERNADDR(&xfer->dmabuf, 0); 630 m = min(sc->sc_noport, xfer->length * 8 - 1); 631 memset(p, 0, xfer->length); 632 for (i = 1; i <= m; i++) { 633 /* Pick out CHANGE bits from the status reg. */ 634 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 635 p[i/8] |= 1 << (i%8); 636 } 637 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 638 xfer->actlen = xfer->length; 639 xfer->status = USBD_NORMAL_COMPLETION; 640 641 usb_transfer_complete(xfer); 642 } 643 644 void 645 ehci_softintr(void *v) 646 { 647 struct usbd_bus *bus = v; 648 ehci_softc_t *sc = bus->hci_private; 649 struct ehci_xfer *ex, *nextex; 650 651 DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_xname(sc->sc_dev), 652 sc->sc_bus.intr_context)); 653 654 sc->sc_bus.intr_context++; 655 656 /* 657 * The only explanation I can think of for why EHCI is as brain dead 658 * as UHCI interrupt-wise is that Intel was involved in both. 659 * An interrupt just tells us that something is done, we have no 660 * clue what, so we need to scan through all active transfers. :-( 661 */ 662 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 663 nextex = LIST_NEXT(ex, inext); 664 ehci_check_intr(sc, ex); 665 } 666 667 /* Schedule a callout to catch any dropped transactions. */ 668 if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) && 669 !LIST_EMPTY(&sc->sc_intrhead)) 670 usb_callout(sc->sc_tmo_intrlist, hz, 671 ehci_intrlist_timeout, sc); 672 673 #ifdef USB_USE_SOFTINTR 674 if (sc->sc_softwake) { 675 sc->sc_softwake = 0; 676 wakeup(&sc->sc_softwake); 677 } 678 #endif /* USB_USE_SOFTINTR */ 679 680 sc->sc_bus.intr_context--; 681 } 682 683 /* Check for an interrupt. */ 684 void 685 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 686 { 687 ehci_soft_qtd_t *sqtd, *lsqtd; 688 u_int32_t status; 689 690 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 691 692 if (ex->sqtdstart == NULL) { 693 printf("ehci_check_intr: sqtdstart=NULL\n"); 694 return; 695 } 696 lsqtd = ex->sqtdend; 697 #ifdef DIAGNOSTIC 698 if (lsqtd == NULL) { 699 printf("ehci_check_intr: lsqtd==0\n"); 700 return; 701 } 702 #endif 703 /* 704 * If the last TD is still active we need to check whether there 705 * is a an error somewhere in the middle, or whether there was a 706 * short packet (SPD and not ACTIVE). 707 */ 708 usb_syncmem(&lsqtd->dma, 709 lsqtd->offs + offsetof(ehci_qtd_t, qtd_status), 710 sizeof(lsqtd->qtd.qtd_status), 711 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 712 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 713 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 714 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 715 usb_syncmem(&sqtd->dma, 716 sqtd->offs + offsetof(ehci_qtd_t, qtd_status), 717 sizeof(sqtd->qtd.qtd_status), 718 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 719 status = le32toh(sqtd->qtd.qtd_status); 720 usb_syncmem(&sqtd->dma, 721 sqtd->offs + offsetof(ehci_qtd_t, qtd_status), 722 sizeof(sqtd->qtd.qtd_status), BUS_DMASYNC_PREREAD); 723 /* If there's an active QTD the xfer isn't done. */ 724 if (status & EHCI_QTD_ACTIVE) 725 break; 726 /* Any kind of error makes the xfer done. */ 727 if (status & EHCI_QTD_HALTED) 728 goto done; 729 /* We want short packets, and it is short: it's done */ 730 if (EHCI_QTD_GET_BYTES(status) != 0) 731 goto done; 732 } 733 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 734 ex, ex->sqtdstart)); 735 usb_syncmem(&lsqtd->dma, 736 lsqtd->offs + offsetof(ehci_qtd_t, qtd_status), 737 sizeof(lsqtd->qtd.qtd_status), BUS_DMASYNC_PREREAD); 738 return; 739 } 740 done: 741 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 742 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 743 ehci_idone(ex); 744 } 745 746 void 747 ehci_idone(struct ehci_xfer *ex) 748 { 749 usbd_xfer_handle xfer = &ex->xfer; 750 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 751 ehci_soft_qtd_t *sqtd, *lsqtd; 752 u_int32_t status = 0, nstatus = 0; 753 int actlen; 754 755 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 756 #ifdef DIAGNOSTIC 757 { 758 int s = splhigh(); 759 if (ex->isdone) { 760 splx(s); 761 #ifdef EHCI_DEBUG 762 printf("ehci_idone: ex is done!\n "); 763 ehci_dump_exfer(ex); 764 #else 765 printf("ehci_idone: ex=%p is done!\n", ex); 766 #endif 767 return; 768 } 769 ex->isdone = 1; 770 splx(s); 771 } 772 #endif 773 774 if (xfer->status == USBD_CANCELLED || 775 xfer->status == USBD_TIMEOUT) { 776 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 777 return; 778 } 779 780 #ifdef EHCI_DEBUG 781 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 782 if (ehcidebug > 10) 783 ehci_dump_sqtds(ex->sqtdstart); 784 #endif 785 786 /* The transfer is done, compute actual length and status. */ 787 lsqtd = ex->sqtdend; 788 actlen = 0; 789 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 790 usb_syncmem(&sqtd->dma, sqtd->offs, sizeof(sqtd->qtd), 791 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 792 nstatus = le32toh(sqtd->qtd.qtd_status); 793 if (nstatus & EHCI_QTD_ACTIVE) 794 break; 795 796 status = nstatus; 797 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 798 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 799 } 800 801 /* 802 * If there are left over TDs we need to update the toggle. 803 * The default pipe doesn't need it since control transfers 804 * start the toggle at 0 every time. 805 * For a short transfer we need to update the toggle for the missing 806 * packets within the qTD. 807 */ 808 if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) && 809 xfer->pipe->device->default_pipe != xfer->pipe) { 810 DPRINTFN(2, ("ehci_idone: need toggle update " 811 "status=%08x nstatus=%08x\n", status, nstatus)); 812 #if 0 813 ehci_dump_sqh(epipe->sqh); 814 ehci_dump_sqtds(ex->sqtdstart); 815 #endif 816 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 817 } 818 819 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 820 xfer->length, actlen, status)); 821 xfer->actlen = actlen; 822 if (status & EHCI_QTD_HALTED) { 823 #ifdef EHCI_DEBUG 824 char sbuf[128]; 825 826 bitmask_snprintf((u_int32_t)status, 827 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 828 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 829 830 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 831 "status 0x%s\n", 832 xfer->pipe->device->address, 833 xfer->pipe->endpoint->edesc->bEndpointAddress, 834 sbuf)); 835 if (ehcidebug > 2) { 836 ehci_dump_sqh(epipe->sqh); 837 ehci_dump_sqtds(ex->sqtdstart); 838 } 839 #endif 840 /* low&full speed has an extra error flag */ 841 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 842 EHCI_QH_SPEED_HIGH) 843 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 844 else 845 status &= EHCI_QTD_STATERRS; 846 if (status == 0) /* no other errors means a stall */ 847 xfer->status = USBD_STALLED; 848 else 849 xfer->status = USBD_IOERROR; /* more info XXX */ 850 /* XXX need to reset TT on missed microframe */ 851 if (status & EHCI_QTD_MISSEDMICRO) { 852 ehci_softc_t *sc = 853 xfer->pipe->device->bus->hci_private; 854 855 printf("%s: missed microframe, TT reset not " 856 "implemented, hub might be inoperational\n", 857 device_xname(sc->sc_dev)); 858 } 859 } else { 860 xfer->status = USBD_NORMAL_COMPLETION; 861 } 862 863 usb_transfer_complete(xfer); 864 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 865 } 866 867 /* 868 * Wait here until controller claims to have an interrupt. 869 * Then call ehci_intr and return. Use timeout to avoid waiting 870 * too long. 871 */ 872 void 873 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 874 { 875 int timo; 876 u_int32_t intrs; 877 878 xfer->status = USBD_IN_PROGRESS; 879 for (timo = xfer->timeout; timo >= 0; timo--) { 880 usb_delay_ms(&sc->sc_bus, 1); 881 if (sc->sc_dying) 882 break; 883 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 884 sc->sc_eintrs; 885 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 886 #ifdef EHCI_DEBUG 887 if (ehcidebug > 15) 888 ehci_dump_regs(sc); 889 #endif 890 if (intrs) { 891 ehci_intr1(sc); 892 if (xfer->status != USBD_IN_PROGRESS) 893 return; 894 } 895 } 896 897 /* Timeout */ 898 DPRINTF(("ehci_waitintr: timeout\n")); 899 xfer->status = USBD_TIMEOUT; 900 usb_transfer_complete(xfer); 901 /* XXX should free TD */ 902 } 903 904 void 905 ehci_poll(struct usbd_bus *bus) 906 { 907 ehci_softc_t *sc = bus->hci_private; 908 #ifdef EHCI_DEBUG 909 static int last; 910 int new; 911 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 912 if (new != last) { 913 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 914 last = new; 915 } 916 #endif 917 918 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 919 ehci_intr1(sc); 920 } 921 922 void 923 ehci_childdet(device_t self, device_t child) 924 { 925 struct ehci_softc *sc = device_private(self); 926 927 KASSERT(sc->sc_child == child); 928 sc->sc_child = NULL; 929 } 930 931 int 932 ehci_detach(struct ehci_softc *sc, int flags) 933 { 934 int rv = 0; 935 936 if (sc->sc_child != NULL) 937 rv = config_detach(sc->sc_child, flags); 938 939 if (rv != 0) 940 return (rv); 941 942 usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc); 943 944 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 945 946 /* XXX free other data structures XXX */ 947 mutex_destroy(&sc->sc_doorbell_lock); 948 949 EOWRITE4(sc, EHCI_CONFIGFLAG, 0); 950 951 return (rv); 952 } 953 954 955 int 956 ehci_activate(device_t self, enum devact act) 957 { 958 struct ehci_softc *sc = device_private(self); 959 int rv = 0; 960 961 switch (act) { 962 case DVACT_ACTIVATE: 963 return (EOPNOTSUPP); 964 965 case DVACT_DEACTIVATE: 966 sc->sc_dying = 1; 967 if (sc->sc_child != NULL) 968 rv = config_deactivate(sc->sc_child); 969 break; 970 } 971 return (rv); 972 } 973 974 /* 975 * Handle suspend/resume. 976 * 977 * We need to switch to polling mode here, because this routine is 978 * called from an interrupt context. This is all right since we 979 * are almost suspended anyway. 980 * 981 * Note that this power handler isn't to be registered directly; the 982 * bus glue needs to call out to it. 983 */ 984 bool 985 ehci_suspend(device_t dv PMF_FN_ARGS) 986 { 987 ehci_softc_t *sc = device_private(dv); 988 int i, s; 989 uint32_t cmd, hcr; 990 991 s = splhardusb(); 992 993 sc->sc_bus.use_polling++; 994 995 for (i = 1; i <= sc->sc_noport; i++) { 996 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 997 if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE) 998 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP); 999 } 1000 1001 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1002 1003 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1004 EOWRITE4(sc, EHCI_USBCMD, cmd); 1005 1006 for (i = 0; i < 100; i++) { 1007 hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS); 1008 if (hcr == 0) 1009 break; 1010 1011 usb_delay_ms(&sc->sc_bus, 1); 1012 } 1013 if (hcr != 0) 1014 printf("%s: reset timeout\n", device_xname(dv)); 1015 1016 cmd &= ~EHCI_CMD_RS; 1017 EOWRITE4(sc, EHCI_USBCMD, cmd); 1018 1019 for (i = 0; i < 100; i++) { 1020 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1021 if (hcr == EHCI_STS_HCH) 1022 break; 1023 1024 usb_delay_ms(&sc->sc_bus, 1); 1025 } 1026 if (hcr != EHCI_STS_HCH) 1027 printf("%s: config timeout\n", device_xname(dv)); 1028 1029 sc->sc_bus.use_polling--; 1030 splx(s); 1031 1032 return true; 1033 } 1034 1035 bool 1036 ehci_resume(device_t dv PMF_FN_ARGS) 1037 { 1038 ehci_softc_t *sc = device_private(dv); 1039 int i; 1040 uint32_t cmd, hcr; 1041 1042 /* restore things in case the bios sucks */ 1043 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1044 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1045 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1046 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1047 1048 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE); 1049 1050 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1051 1052 hcr = 0; 1053 for (i = 1; i <= sc->sc_noport; i++) { 1054 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1055 if ((cmd & EHCI_PS_PO) == 0 && 1056 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) { 1057 EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR); 1058 hcr = 1; 1059 } 1060 } 1061 1062 if (hcr) { 1063 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1064 1065 for (i = 1; i <= sc->sc_noport; i++) { 1066 cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR; 1067 if ((cmd & EHCI_PS_PO) == 0 && 1068 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) 1069 EOWRITE4(sc, EHCI_PORTSC(i), 1070 cmd & ~EHCI_PS_FPR); 1071 } 1072 } 1073 1074 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1075 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1076 1077 for (i = 0; i < 100; i++) { 1078 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1079 if (hcr != EHCI_STS_HCH) 1080 break; 1081 1082 usb_delay_ms(&sc->sc_bus, 1); 1083 } 1084 if (hcr == EHCI_STS_HCH) 1085 printf("%s: config timeout\n", device_xname(dv)); 1086 1087 return true; 1088 } 1089 1090 /* 1091 * Shut down the controller when the system is going down. 1092 */ 1093 bool 1094 ehci_shutdown(device_t self, int flags) 1095 { 1096 ehci_softc_t *sc = device_private(self); 1097 1098 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1099 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1100 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1101 return true; 1102 } 1103 1104 usbd_status 1105 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1106 { 1107 struct ehci_softc *sc = bus->hci_private; 1108 usbd_status err; 1109 1110 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1111 if (err == USBD_NOMEM) 1112 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1113 #ifdef EHCI_DEBUG 1114 if (err) 1115 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1116 #endif 1117 return (err); 1118 } 1119 1120 void 1121 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1122 { 1123 struct ehci_softc *sc = bus->hci_private; 1124 1125 if (dma->block->flags & USB_DMA_RESERVE) { 1126 usb_reserve_freem(&sc->sc_dma_reserve, 1127 dma); 1128 return; 1129 } 1130 usb_freemem(&sc->sc_bus, dma); 1131 } 1132 1133 usbd_xfer_handle 1134 ehci_allocx(struct usbd_bus *bus) 1135 { 1136 struct ehci_softc *sc = bus->hci_private; 1137 usbd_xfer_handle xfer; 1138 1139 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1140 if (xfer != NULL) { 1141 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1142 #ifdef DIAGNOSTIC 1143 if (xfer->busy_free != XFER_FREE) { 1144 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1145 xfer->busy_free); 1146 } 1147 #endif 1148 } else { 1149 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1150 } 1151 if (xfer != NULL) { 1152 memset(xfer, 0, sizeof(struct ehci_xfer)); 1153 #ifdef DIAGNOSTIC 1154 EXFER(xfer)->isdone = 1; 1155 xfer->busy_free = XFER_BUSY; 1156 #endif 1157 } 1158 return (xfer); 1159 } 1160 1161 void 1162 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1163 { 1164 struct ehci_softc *sc = bus->hci_private; 1165 1166 #ifdef DIAGNOSTIC 1167 if (xfer->busy_free != XFER_BUSY) { 1168 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1169 xfer->busy_free); 1170 } 1171 xfer->busy_free = XFER_FREE; 1172 if (!EXFER(xfer)->isdone) { 1173 printf("ehci_freex: !isdone\n"); 1174 } 1175 #endif 1176 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1177 } 1178 1179 Static void 1180 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1181 { 1182 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1183 1184 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1185 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1186 #ifdef USB_DEBUG 1187 if (ehcidebug) 1188 usbd_dump_pipe(pipe); 1189 #endif 1190 epipe->nexttoggle = 0; 1191 } 1192 1193 Static void 1194 ehci_noop(usbd_pipe_handle pipe) 1195 { 1196 } 1197 1198 #ifdef EHCI_DEBUG 1199 void 1200 ehci_dump_regs(ehci_softc_t *sc) 1201 { 1202 int i; 1203 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1204 EOREAD4(sc, EHCI_USBCMD), 1205 EOREAD4(sc, EHCI_USBSTS), 1206 EOREAD4(sc, EHCI_USBINTR)); 1207 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1208 EOREAD4(sc, EHCI_FRINDEX), 1209 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1210 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1211 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1212 for (i = 1; i <= sc->sc_noport; i++) 1213 printf("port %d status=0x%08x\n", i, 1214 EOREAD4(sc, EHCI_PORTSC(i))); 1215 } 1216 1217 /* 1218 * Unused function - this is meant to be called from a kernel 1219 * debugger. 1220 */ 1221 void 1222 ehci_dump() 1223 { 1224 ehci_dump_regs(theehci); 1225 } 1226 1227 void 1228 ehci_dump_link(ehci_link_t link, int type) 1229 { 1230 link = le32toh(link); 1231 printf("0x%08x", link); 1232 if (link & EHCI_LINK_TERMINATE) 1233 printf("<T>"); 1234 else { 1235 printf("<"); 1236 if (type) { 1237 switch (EHCI_LINK_TYPE(link)) { 1238 case EHCI_LINK_ITD: printf("ITD"); break; 1239 case EHCI_LINK_QH: printf("QH"); break; 1240 case EHCI_LINK_SITD: printf("SITD"); break; 1241 case EHCI_LINK_FSTN: printf("FSTN"); break; 1242 } 1243 } 1244 printf(">"); 1245 } 1246 } 1247 1248 void 1249 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1250 { 1251 int i; 1252 u_int32_t stop; 1253 1254 stop = 0; 1255 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1256 ehci_dump_sqtd(sqtd); 1257 usb_syncmem(&sqtd->dma, 1258 sqtd->offs + offsetof(ehci_qtd_t, qtd_next), 1259 sizeof(sqtd->qtd), 1260 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1261 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1262 usb_syncmem(&sqtd->dma, 1263 sqtd->offs + offsetof(ehci_qtd_t, qtd_next), 1264 sizeof(sqtd->qtd), BUS_DMASYNC_PREREAD); 1265 } 1266 if (sqtd) 1267 printf("dump aborted, too many TDs\n"); 1268 } 1269 1270 void 1271 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1272 { 1273 usb_syncmem(&sqtd->dma, sqtd->offs, 1274 sizeof(sqtd->qtd), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1275 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1276 ehci_dump_qtd(&sqtd->qtd); 1277 usb_syncmem(&sqtd->dma, sqtd->offs, 1278 sizeof(sqtd->qtd), BUS_DMASYNC_PREREAD); 1279 } 1280 1281 void 1282 ehci_dump_qtd(ehci_qtd_t *qtd) 1283 { 1284 u_int32_t s; 1285 char sbuf[128]; 1286 1287 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1288 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1289 printf("\n"); 1290 s = le32toh(qtd->qtd_status); 1291 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1292 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1293 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1294 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1295 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1296 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1297 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1298 EHCI_QTD_GET_PID(s), sbuf); 1299 for (s = 0; s < 5; s++) 1300 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1301 } 1302 1303 void 1304 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1305 { 1306 ehci_qh_t *qh = &sqh->qh; 1307 u_int32_t endp, endphub; 1308 1309 usb_syncmem(&sqh->dma, sqh->offs, 1310 sizeof(sqh->qh), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1311 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1312 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1313 endp = le32toh(qh->qh_endp); 1314 printf(" endp=0x%08x\n", endp); 1315 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1316 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1317 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1318 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1319 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1320 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1321 EHCI_QH_GET_NRL(endp)); 1322 endphub = le32toh(qh->qh_endphub); 1323 printf(" endphub=0x%08x\n", endphub); 1324 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1325 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1326 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1327 EHCI_QH_GET_MULT(endphub)); 1328 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1329 printf("Overlay qTD:\n"); 1330 ehci_dump_qtd(&qh->qh_qtd); 1331 usb_syncmem(&sqh->dma, sqh->offs, 1332 sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 1333 } 1334 1335 #ifdef DIAGNOSTIC 1336 Static void 1337 ehci_dump_exfer(struct ehci_xfer *ex) 1338 { 1339 printf("ehci_dump_exfer: ex=%p\n", ex); 1340 } 1341 #endif 1342 #endif 1343 1344 usbd_status 1345 ehci_open(usbd_pipe_handle pipe) 1346 { 1347 usbd_device_handle dev = pipe->device; 1348 ehci_softc_t *sc = dev->bus->hci_private; 1349 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1350 u_int8_t addr = dev->address; 1351 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1352 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1353 ehci_soft_qh_t *sqh; 1354 usbd_status err; 1355 int s; 1356 int ival, speed, naks; 1357 int hshubaddr, hshubport; 1358 1359 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1360 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1361 1362 if (dev->myhsport) { 1363 hshubaddr = dev->myhsport->parent->address; 1364 hshubport = dev->myhsport->portno; 1365 } else { 1366 hshubaddr = 0; 1367 hshubport = 0; 1368 } 1369 1370 if (sc->sc_dying) 1371 return (USBD_IOERROR); 1372 1373 epipe->nexttoggle = 0; 1374 1375 if (addr == sc->sc_addr) { 1376 switch (ed->bEndpointAddress) { 1377 case USB_CONTROL_ENDPOINT: 1378 pipe->methods = &ehci_root_ctrl_methods; 1379 break; 1380 case UE_DIR_IN | EHCI_INTR_ENDPT: 1381 pipe->methods = &ehci_root_intr_methods; 1382 break; 1383 default: 1384 return (USBD_INVAL); 1385 } 1386 return (USBD_NORMAL_COMPLETION); 1387 } 1388 1389 /* XXX All this stuff is only valid for async. */ 1390 switch (dev->speed) { 1391 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1392 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1393 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1394 default: panic("ehci_open: bad device speed %d", dev->speed); 1395 } 1396 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) { 1397 printf("%s: *** WARNING: opening low/full speed isoc device, " 1398 "this does not work yet.\n", 1399 device_xname(sc->sc_dev)); 1400 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1401 hshubaddr, hshubport)); 1402 return USBD_INVAL; 1403 } 1404 1405 naks = 8; /* XXX */ 1406 sqh = ehci_alloc_sqh(sc); 1407 if (sqh == NULL) 1408 return (USBD_NOMEM); 1409 /* qh_link filled when the QH is added */ 1410 sqh->qh.qh_endp = htole32( 1411 EHCI_QH_SET_ADDR(addr) | 1412 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1413 EHCI_QH_SET_EPS(speed) | 1414 EHCI_QH_DTC | 1415 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1416 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1417 EHCI_QH_CTL : 0) | 1418 EHCI_QH_SET_NRL(naks) 1419 ); 1420 sqh->qh.qh_endphub = htole32( 1421 EHCI_QH_SET_MULT(1) | 1422 EHCI_QH_SET_HUBA(hshubaddr) | 1423 EHCI_QH_SET_PORT(hshubport) | 1424 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1425 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1426 ); 1427 sqh->qh.qh_curqtd = EHCI_NULL; 1428 /* Fill the overlay qTD */ 1429 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1430 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1431 sqh->qh.qh_qtd.qtd_status = htole32(0); 1432 1433 usb_syncmem(&sqh->dma, sqh->offs, 1434 sizeof(sqh->qh), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1435 epipe->sqh = sqh; 1436 1437 switch (xfertype) { 1438 case UE_CONTROL: 1439 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1440 0, &epipe->u.ctl.reqdma); 1441 #ifdef EHCI_DEBUG 1442 if (err) 1443 printf("ehci_open: usb_allocmem()=%d\n", err); 1444 #endif 1445 if (err) 1446 goto bad; 1447 pipe->methods = &ehci_device_ctrl_methods; 1448 s = splusb(); 1449 ehci_add_qh(sqh, sc->sc_async_head); 1450 splx(s); 1451 break; 1452 case UE_BULK: 1453 pipe->methods = &ehci_device_bulk_methods; 1454 s = splusb(); 1455 ehci_add_qh(sqh, sc->sc_async_head); 1456 splx(s); 1457 break; 1458 case UE_INTERRUPT: 1459 pipe->methods = &ehci_device_intr_methods; 1460 ival = pipe->interval; 1461 if (ival == USBD_DEFAULT_INTERVAL) { 1462 if (speed == EHCI_QH_SPEED_HIGH) { 1463 if (ed->bInterval > 16) { 1464 /* 1465 * illegal with high-speed, but there 1466 * were documentation bugs in the spec, 1467 * so be generous 1468 */ 1469 ival = 256; 1470 } else 1471 ival = (1 << (ed->bInterval - 1)) / 8; 1472 } else 1473 ival = ed->bInterval; 1474 } 1475 err = ehci_device_setintr(sc, sqh, ival); 1476 if (err) 1477 goto bad; 1478 break; 1479 case UE_ISOCHRONOUS: 1480 pipe->methods = &ehci_device_isoc_methods; 1481 /* FALLTHROUGH */ 1482 default: 1483 err = USBD_INVAL; 1484 goto bad; 1485 } 1486 return (USBD_NORMAL_COMPLETION); 1487 1488 bad: 1489 ehci_free_sqh(sc, sqh); 1490 return (err); 1491 } 1492 1493 /* 1494 * Add an ED to the schedule. Called at splusb(). 1495 */ 1496 void 1497 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1498 { 1499 SPLUSBCHECK; 1500 1501 usb_syncmem(&head->dma, head->offs + offsetof(ehci_qh_t, qh_link), 1502 sizeof(head->qh.qh_link), BUS_DMASYNC_POSTWRITE); 1503 sqh->next = head->next; 1504 sqh->qh.qh_link = head->qh.qh_link; 1505 usb_syncmem(&sqh->dma, sqh->offs + offsetof(ehci_qh_t, qh_link), 1506 sizeof(sqh->qh.qh_link), BUS_DMASYNC_PREWRITE); 1507 head->next = sqh; 1508 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1509 usb_syncmem(&head->dma, head->offs + offsetof(ehci_qh_t, qh_link), 1510 sizeof(head->qh.qh_link), BUS_DMASYNC_PREWRITE); 1511 1512 #ifdef EHCI_DEBUG 1513 if (ehcidebug > 5) { 1514 printf("ehci_add_qh:\n"); 1515 ehci_dump_sqh(sqh); 1516 } 1517 #endif 1518 } 1519 1520 /* 1521 * Remove an ED from the schedule. Called at splusb(). 1522 */ 1523 void 1524 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1525 { 1526 ehci_soft_qh_t *p; 1527 1528 SPLUSBCHECK; 1529 /* XXX */ 1530 for (p = head; p != NULL && p->next != sqh; p = p->next) 1531 ; 1532 if (p == NULL) 1533 panic("ehci_rem_qh: ED not found"); 1534 usb_syncmem(&sqh->dma, sqh->offs + offsetof(ehci_qh_t, qh_link), 1535 sizeof(sqh->qh.qh_link), BUS_DMASYNC_POSTWRITE); 1536 p->next = sqh->next; 1537 p->qh.qh_link = sqh->qh.qh_link; 1538 usb_syncmem(&p->dma, p->offs + offsetof(ehci_qh_t, qh_link), 1539 sizeof(p->qh.qh_link), BUS_DMASYNC_PREWRITE); 1540 1541 ehci_sync_hc(sc); 1542 } 1543 1544 void 1545 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1546 { 1547 int i; 1548 u_int32_t status; 1549 1550 /* Save toggle bit and ping status. */ 1551 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1552 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1553 status = sqh->qh.qh_qtd.qtd_status & 1554 htole32(EHCI_QTD_TOGGLE_MASK | 1555 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1556 /* Set HALTED to make hw leave it alone. */ 1557 sqh->qh.qh_qtd.qtd_status = 1558 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1559 usb_syncmem(&sqh->dma, 1560 sqh->offs + offsetof(ehci_qh_t, qh_qtd.qtd_status), 1561 sizeof(sqh->qh.qh_qtd.qtd_status), 1562 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1563 sqh->qh.qh_curqtd = 0; 1564 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1565 sqh->qh.qh_qtd.qtd_altnext = 0; 1566 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1567 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1568 sqh->sqtd = sqtd; 1569 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1570 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1571 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1572 sqh->qh.qh_qtd.qtd_status = status; 1573 usb_syncmem(&sqh->dma, 1574 sqh->offs + offsetof(ehci_qh_t, qh_qtd.qtd_status), 1575 sizeof(sqh->qh.qh_qtd.qtd_status), 1576 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1577 } 1578 1579 /* 1580 * Ensure that the HC has released all references to the QH. We do this 1581 * by asking for a Async Advance Doorbell interrupt and then we wait for 1582 * the interrupt. 1583 * To make this easier we first obtain exclusive use of the doorbell. 1584 */ 1585 void 1586 ehci_sync_hc(ehci_softc_t *sc) 1587 { 1588 int s, error; 1589 1590 if (sc->sc_dying) { 1591 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1592 return; 1593 } 1594 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1595 mutex_enter(&sc->sc_doorbell_lock); /* get doorbell */ 1596 s = splhardusb(); 1597 /* ask for doorbell */ 1598 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1599 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1600 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1601 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1602 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1603 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1604 splx(s); 1605 mutex_exit(&sc->sc_doorbell_lock); /* release doorbell */ 1606 #ifdef DIAGNOSTIC 1607 if (error) 1608 printf("ehci_sync_hc: tsleep() = %d\n", error); 1609 #endif 1610 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1611 } 1612 1613 /***********/ 1614 1615 /* 1616 * Data structures and routines to emulate the root hub. 1617 */ 1618 Static usb_device_descriptor_t ehci_devd = { 1619 USB_DEVICE_DESCRIPTOR_SIZE, 1620 UDESC_DEVICE, /* type */ 1621 {0x00, 0x02}, /* USB version */ 1622 UDCLASS_HUB, /* class */ 1623 UDSUBCLASS_HUB, /* subclass */ 1624 UDPROTO_HSHUBSTT, /* protocol */ 1625 64, /* max packet */ 1626 {0},{0},{0x00,0x01}, /* device id */ 1627 1,2,0, /* string indicies */ 1628 1 /* # of configurations */ 1629 }; 1630 1631 Static const usb_device_qualifier_t ehci_odevd = { 1632 USB_DEVICE_DESCRIPTOR_SIZE, 1633 UDESC_DEVICE_QUALIFIER, /* type */ 1634 {0x00, 0x02}, /* USB version */ 1635 UDCLASS_HUB, /* class */ 1636 UDSUBCLASS_HUB, /* subclass */ 1637 UDPROTO_FSHUB, /* protocol */ 1638 64, /* max packet */ 1639 1, /* # of configurations */ 1640 0 1641 }; 1642 1643 Static const usb_config_descriptor_t ehci_confd = { 1644 USB_CONFIG_DESCRIPTOR_SIZE, 1645 UDESC_CONFIG, 1646 {USB_CONFIG_DESCRIPTOR_SIZE + 1647 USB_INTERFACE_DESCRIPTOR_SIZE + 1648 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1649 1, 1650 1, 1651 0, 1652 UC_ATTR_MBO | UC_SELF_POWERED, 1653 0 /* max power */ 1654 }; 1655 1656 Static const usb_interface_descriptor_t ehci_ifcd = { 1657 USB_INTERFACE_DESCRIPTOR_SIZE, 1658 UDESC_INTERFACE, 1659 0, 1660 0, 1661 1, 1662 UICLASS_HUB, 1663 UISUBCLASS_HUB, 1664 UIPROTO_HSHUBSTT, 1665 0 1666 }; 1667 1668 Static const usb_endpoint_descriptor_t ehci_endpd = { 1669 USB_ENDPOINT_DESCRIPTOR_SIZE, 1670 UDESC_ENDPOINT, 1671 UE_DIR_IN | EHCI_INTR_ENDPT, 1672 UE_INTERRUPT, 1673 {8, 0}, /* max packet */ 1674 12 1675 }; 1676 1677 Static const usb_hub_descriptor_t ehci_hubd = { 1678 USB_HUB_DESCRIPTOR_SIZE, 1679 UDESC_HUB, 1680 0, 1681 {0,0}, 1682 0, 1683 0, 1684 {""}, 1685 {""}, 1686 }; 1687 1688 /* 1689 * Simulate a hardware hub by handling all the necessary requests. 1690 */ 1691 Static usbd_status 1692 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1693 { 1694 usbd_status err; 1695 1696 /* Insert last in queue. */ 1697 err = usb_insert_transfer(xfer); 1698 if (err) 1699 return (err); 1700 1701 /* Pipe isn't running, start first */ 1702 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1703 } 1704 1705 Static usbd_status 1706 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1707 { 1708 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1709 usb_device_request_t *req; 1710 void *buf = NULL; 1711 int port, i; 1712 int s, len, value, index, l, totlen = 0; 1713 usb_port_status_t ps; 1714 usb_hub_descriptor_t hubd; 1715 usbd_status err; 1716 u_int32_t v; 1717 1718 if (sc->sc_dying) 1719 return (USBD_IOERROR); 1720 1721 #ifdef DIAGNOSTIC 1722 if (!(xfer->rqflags & URQ_REQUEST)) 1723 /* XXX panic */ 1724 return (USBD_INVAL); 1725 #endif 1726 req = &xfer->request; 1727 1728 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1729 req->bmRequestType, req->bRequest)); 1730 1731 len = UGETW(req->wLength); 1732 value = UGETW(req->wValue); 1733 index = UGETW(req->wIndex); 1734 1735 if (len != 0) 1736 buf = KERNADDR(&xfer->dmabuf, 0); 1737 1738 #define C(x,y) ((x) | ((y) << 8)) 1739 switch(C(req->bRequest, req->bmRequestType)) { 1740 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1741 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1742 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1743 /* 1744 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1745 * for the integrated root hub. 1746 */ 1747 break; 1748 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1749 if (len > 0) { 1750 *(u_int8_t *)buf = sc->sc_conf; 1751 totlen = 1; 1752 } 1753 break; 1754 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1755 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1756 if (len == 0) 1757 break; 1758 switch(value >> 8) { 1759 case UDESC_DEVICE: 1760 if ((value & 0xff) != 0) { 1761 err = USBD_IOERROR; 1762 goto ret; 1763 } 1764 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1765 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1766 memcpy(buf, &ehci_devd, l); 1767 break; 1768 /* 1769 * We can't really operate at another speed, but the spec says 1770 * we need this descriptor. 1771 */ 1772 case UDESC_DEVICE_QUALIFIER: 1773 if ((value & 0xff) != 0) { 1774 err = USBD_IOERROR; 1775 goto ret; 1776 } 1777 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1778 memcpy(buf, &ehci_odevd, l); 1779 break; 1780 /* 1781 * We can't really operate at another speed, but the spec says 1782 * we need this descriptor. 1783 */ 1784 case UDESC_OTHER_SPEED_CONFIGURATION: 1785 case UDESC_CONFIG: 1786 if ((value & 0xff) != 0) { 1787 err = USBD_IOERROR; 1788 goto ret; 1789 } 1790 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1791 memcpy(buf, &ehci_confd, l); 1792 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1793 value >> 8; 1794 buf = (char *)buf + l; 1795 len -= l; 1796 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1797 totlen += l; 1798 memcpy(buf, &ehci_ifcd, l); 1799 buf = (char *)buf + l; 1800 len -= l; 1801 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1802 totlen += l; 1803 memcpy(buf, &ehci_endpd, l); 1804 break; 1805 case UDESC_STRING: 1806 #define sd ((usb_string_descriptor_t *)buf) 1807 switch (value & 0xff) { 1808 case 0: /* Language table */ 1809 totlen = usb_makelangtbl(sd, len); 1810 break; 1811 case 1: /* Vendor */ 1812 totlen = usb_makestrdesc(sd, len, 1813 sc->sc_vendor); 1814 break; 1815 case 2: /* Product */ 1816 totlen = usb_makestrdesc(sd, len, 1817 "EHCI root hub"); 1818 break; 1819 } 1820 #undef sd 1821 break; 1822 default: 1823 err = USBD_IOERROR; 1824 goto ret; 1825 } 1826 break; 1827 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1828 if (len > 0) { 1829 *(u_int8_t *)buf = 0; 1830 totlen = 1; 1831 } 1832 break; 1833 case C(UR_GET_STATUS, UT_READ_DEVICE): 1834 if (len > 1) { 1835 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1836 totlen = 2; 1837 } 1838 break; 1839 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1840 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1841 if (len > 1) { 1842 USETW(((usb_status_t *)buf)->wStatus, 0); 1843 totlen = 2; 1844 } 1845 break; 1846 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1847 if (value >= USB_MAX_DEVICES) { 1848 err = USBD_IOERROR; 1849 goto ret; 1850 } 1851 sc->sc_addr = value; 1852 break; 1853 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1854 if (value != 0 && value != 1) { 1855 err = USBD_IOERROR; 1856 goto ret; 1857 } 1858 sc->sc_conf = value; 1859 break; 1860 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1861 break; 1862 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1863 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1864 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1865 err = USBD_IOERROR; 1866 goto ret; 1867 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1868 break; 1869 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1870 break; 1871 /* Hub requests */ 1872 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1873 break; 1874 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1875 DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1876 "port=%d feature=%d\n", 1877 index, value)); 1878 if (index < 1 || index > sc->sc_noport) { 1879 err = USBD_IOERROR; 1880 goto ret; 1881 } 1882 port = EHCI_PORTSC(index); 1883 v = EOREAD4(sc, port); 1884 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 1885 v &= ~EHCI_PS_CLEAR; 1886 switch(value) { 1887 case UHF_PORT_ENABLE: 1888 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1889 break; 1890 case UHF_PORT_SUSPEND: 1891 if (!(v & EHCI_PS_SUSP)) /* not suspended */ 1892 break; 1893 v &= ~EHCI_PS_SUSP; 1894 EOWRITE4(sc, port, v | EHCI_PS_FPR); 1895 /* see USB2 spec ch. 7.1.7.7 */ 1896 usb_delay_ms(&sc->sc_bus, 20); 1897 EOWRITE4(sc, port, v); 1898 usb_delay_ms(&sc->sc_bus, 2); 1899 #ifdef DEBUG 1900 v = EOREAD4(sc, port); 1901 if (v & (EHCI_PS_FPR | EHCI_PS_SUSP)) 1902 printf("ehci: resume failed: %x\n", v); 1903 #endif 1904 break; 1905 case UHF_PORT_POWER: 1906 if (sc->sc_hasppc) 1907 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1908 break; 1909 case UHF_PORT_TEST: 1910 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1911 "%d\n", index)); 1912 break; 1913 case UHF_PORT_INDICATOR: 1914 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1915 "%d\n", index)); 1916 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1917 break; 1918 case UHF_C_PORT_CONNECTION: 1919 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1920 break; 1921 case UHF_C_PORT_ENABLE: 1922 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1923 break; 1924 case UHF_C_PORT_SUSPEND: 1925 /* how? */ 1926 break; 1927 case UHF_C_PORT_OVER_CURRENT: 1928 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1929 break; 1930 case UHF_C_PORT_RESET: 1931 sc->sc_isreset[index] = 0; 1932 break; 1933 default: 1934 err = USBD_IOERROR; 1935 goto ret; 1936 } 1937 #if 0 1938 switch(value) { 1939 case UHF_C_PORT_CONNECTION: 1940 case UHF_C_PORT_ENABLE: 1941 case UHF_C_PORT_SUSPEND: 1942 case UHF_C_PORT_OVER_CURRENT: 1943 case UHF_C_PORT_RESET: 1944 default: 1945 break; 1946 } 1947 #endif 1948 break; 1949 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1950 if (len == 0) 1951 break; 1952 if ((value & 0xff) != 0) { 1953 err = USBD_IOERROR; 1954 goto ret; 1955 } 1956 hubd = ehci_hubd; 1957 hubd.bNbrPorts = sc->sc_noport; 1958 v = EOREAD4(sc, EHCI_HCSPARAMS); 1959 USETW(hubd.wHubCharacteristics, 1960 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1961 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1962 ? UHD_PORT_IND : 0); 1963 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1964 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1965 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1966 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1967 l = min(len, hubd.bDescLength); 1968 totlen = l; 1969 memcpy(buf, &hubd, l); 1970 break; 1971 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1972 if (len != 4) { 1973 err = USBD_IOERROR; 1974 goto ret; 1975 } 1976 memset(buf, 0, len); /* ? XXX */ 1977 totlen = len; 1978 break; 1979 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1980 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1981 index)); 1982 if (index < 1 || index > sc->sc_noport) { 1983 err = USBD_IOERROR; 1984 goto ret; 1985 } 1986 if (len != 4) { 1987 err = USBD_IOERROR; 1988 goto ret; 1989 } 1990 v = EOREAD4(sc, EHCI_PORTSC(index)); 1991 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1992 v)); 1993 i = UPS_HIGH_SPEED; 1994 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1995 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1996 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1997 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1998 if (v & EHCI_PS_PR) i |= UPS_RESET; 1999 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 2000 USETW(ps.wPortStatus, i); 2001 i = 0; 2002 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 2003 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 2004 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 2005 if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET; 2006 USETW(ps.wPortChange, i); 2007 l = min(len, sizeof ps); 2008 memcpy(buf, &ps, l); 2009 totlen = l; 2010 break; 2011 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2012 err = USBD_IOERROR; 2013 goto ret; 2014 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2015 break; 2016 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2017 if (index < 1 || index > sc->sc_noport) { 2018 err = USBD_IOERROR; 2019 goto ret; 2020 } 2021 port = EHCI_PORTSC(index); 2022 v = EOREAD4(sc, port); 2023 DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v)); 2024 v &= ~EHCI_PS_CLEAR; 2025 switch(value) { 2026 case UHF_PORT_ENABLE: 2027 EOWRITE4(sc, port, v | EHCI_PS_PE); 2028 break; 2029 case UHF_PORT_SUSPEND: 2030 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 2031 break; 2032 case UHF_PORT_RESET: 2033 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 2034 index)); 2035 if (EHCI_PS_IS_LOWSPEED(v)) { 2036 /* Low speed device, give up ownership. */ 2037 ehci_disown(sc, index, 1); 2038 break; 2039 } 2040 /* Start reset sequence. */ 2041 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 2042 EOWRITE4(sc, port, v | EHCI_PS_PR); 2043 /* Wait for reset to complete. */ 2044 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2045 if (sc->sc_dying) { 2046 err = USBD_IOERROR; 2047 goto ret; 2048 } 2049 /* Terminate reset sequence. */ 2050 EOWRITE4(sc, port, v); 2051 /* Wait for HC to complete reset. */ 2052 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2053 if (sc->sc_dying) { 2054 err = USBD_IOERROR; 2055 goto ret; 2056 } 2057 v = EOREAD4(sc, port); 2058 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2059 if (v & EHCI_PS_PR) { 2060 printf("%s: port reset timeout\n", 2061 device_xname(sc->sc_dev)); 2062 return (USBD_TIMEOUT); 2063 } 2064 if (!(v & EHCI_PS_PE)) { 2065 /* Not a high speed device, give up ownership.*/ 2066 ehci_disown(sc, index, 0); 2067 break; 2068 } 2069 sc->sc_isreset[index] = 1; 2070 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2071 index, v)); 2072 break; 2073 case UHF_PORT_POWER: 2074 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2075 "%d (has PPC = %d)\n", index, 2076 sc->sc_hasppc)); 2077 if (sc->sc_hasppc) 2078 EOWRITE4(sc, port, v | EHCI_PS_PP); 2079 break; 2080 case UHF_PORT_TEST: 2081 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2082 "%d\n", index)); 2083 break; 2084 case UHF_PORT_INDICATOR: 2085 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2086 "%d\n", index)); 2087 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2088 break; 2089 default: 2090 err = USBD_IOERROR; 2091 goto ret; 2092 } 2093 break; 2094 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2095 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2096 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2097 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2098 break; 2099 default: 2100 err = USBD_IOERROR; 2101 goto ret; 2102 } 2103 xfer->actlen = totlen; 2104 err = USBD_NORMAL_COMPLETION; 2105 ret: 2106 xfer->status = err; 2107 s = splusb(); 2108 usb_transfer_complete(xfer); 2109 splx(s); 2110 return (USBD_IN_PROGRESS); 2111 } 2112 2113 void 2114 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2115 { 2116 int port; 2117 u_int32_t v; 2118 2119 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2120 #ifdef DIAGNOSTIC 2121 if (sc->sc_npcomp != 0) { 2122 int i = (index-1) / sc->sc_npcomp; 2123 if (i >= sc->sc_ncomp) 2124 printf("%s: strange port\n", 2125 device_xname(sc->sc_dev)); 2126 else 2127 printf("%s: handing over %s speed device on " 2128 "port %d to %s\n", 2129 device_xname(sc->sc_dev), 2130 lowspeed ? "low" : "full", 2131 index, device_xname(sc->sc_comps[i])); 2132 } else { 2133 printf("%s: npcomp == 0\n", device_xname(sc->sc_dev)); 2134 } 2135 #endif 2136 port = EHCI_PORTSC(index); 2137 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2138 EOWRITE4(sc, port, v | EHCI_PS_PO); 2139 } 2140 2141 /* Abort a root control request. */ 2142 Static void 2143 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2144 { 2145 /* Nothing to do, all transfers are synchronous. */ 2146 } 2147 2148 /* Close the root pipe. */ 2149 Static void 2150 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2151 { 2152 DPRINTF(("ehci_root_ctrl_close\n")); 2153 /* Nothing to do. */ 2154 } 2155 2156 void 2157 ehci_root_intr_done(usbd_xfer_handle xfer) 2158 { 2159 xfer->hcpriv = NULL; 2160 } 2161 2162 Static usbd_status 2163 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2164 { 2165 usbd_status err; 2166 2167 /* Insert last in queue. */ 2168 err = usb_insert_transfer(xfer); 2169 if (err) 2170 return (err); 2171 2172 /* Pipe isn't running, start first */ 2173 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2174 } 2175 2176 Static usbd_status 2177 ehci_root_intr_start(usbd_xfer_handle xfer) 2178 { 2179 usbd_pipe_handle pipe = xfer->pipe; 2180 ehci_softc_t *sc = pipe->device->bus->hci_private; 2181 2182 if (sc->sc_dying) 2183 return (USBD_IOERROR); 2184 2185 sc->sc_intrxfer = xfer; 2186 2187 return (USBD_IN_PROGRESS); 2188 } 2189 2190 /* Abort a root interrupt request. */ 2191 Static void 2192 ehci_root_intr_abort(usbd_xfer_handle xfer) 2193 { 2194 int s; 2195 2196 if (xfer->pipe->intrxfer == xfer) { 2197 DPRINTF(("ehci_root_intr_abort: remove\n")); 2198 xfer->pipe->intrxfer = NULL; 2199 } 2200 xfer->status = USBD_CANCELLED; 2201 s = splusb(); 2202 usb_transfer_complete(xfer); 2203 splx(s); 2204 } 2205 2206 /* Close the root pipe. */ 2207 Static void 2208 ehci_root_intr_close(usbd_pipe_handle pipe) 2209 { 2210 ehci_softc_t *sc = pipe->device->bus->hci_private; 2211 2212 DPRINTF(("ehci_root_intr_close\n")); 2213 2214 sc->sc_intrxfer = NULL; 2215 } 2216 2217 void 2218 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2219 { 2220 xfer->hcpriv = NULL; 2221 } 2222 2223 /************************/ 2224 2225 ehci_soft_qh_t * 2226 ehci_alloc_sqh(ehci_softc_t *sc) 2227 { 2228 ehci_soft_qh_t *sqh; 2229 usbd_status err; 2230 int i, offs; 2231 usb_dma_t dma; 2232 2233 if (sc->sc_freeqhs == NULL) { 2234 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2235 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2236 EHCI_PAGE_SIZE, &dma); 2237 #ifdef EHCI_DEBUG 2238 if (err) 2239 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2240 #endif 2241 if (err) 2242 return (NULL); 2243 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2244 offs = i * EHCI_SQH_SIZE; 2245 sqh = KERNADDR(&dma, offs); 2246 sqh->physaddr = DMAADDR(&dma, offs); 2247 sqh->dma = dma; 2248 sqh->offs = offs; 2249 sqh->next = sc->sc_freeqhs; 2250 sc->sc_freeqhs = sqh; 2251 } 2252 } 2253 sqh = sc->sc_freeqhs; 2254 sc->sc_freeqhs = sqh->next; 2255 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2256 sqh->next = NULL; 2257 return (sqh); 2258 } 2259 2260 void 2261 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2262 { 2263 sqh->next = sc->sc_freeqhs; 2264 sc->sc_freeqhs = sqh; 2265 } 2266 2267 ehci_soft_qtd_t * 2268 ehci_alloc_sqtd(ehci_softc_t *sc) 2269 { 2270 ehci_soft_qtd_t *sqtd; 2271 usbd_status err; 2272 int i, offs; 2273 usb_dma_t dma; 2274 int s; 2275 2276 if (sc->sc_freeqtds == NULL) { 2277 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2278 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2279 EHCI_PAGE_SIZE, &dma); 2280 #ifdef EHCI_DEBUG 2281 if (err) 2282 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2283 #endif 2284 if (err) 2285 return (NULL); 2286 s = splusb(); 2287 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2288 offs = i * EHCI_SQTD_SIZE; 2289 sqtd = KERNADDR(&dma, offs); 2290 sqtd->physaddr = DMAADDR(&dma, offs); 2291 sqtd->dma = dma; 2292 sqtd->offs = offs; 2293 sqtd->nextqtd = sc->sc_freeqtds; 2294 sc->sc_freeqtds = sqtd; 2295 } 2296 splx(s); 2297 } 2298 2299 s = splusb(); 2300 sqtd = sc->sc_freeqtds; 2301 sc->sc_freeqtds = sqtd->nextqtd; 2302 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2303 sqtd->nextqtd = NULL; 2304 sqtd->xfer = NULL; 2305 splx(s); 2306 2307 return (sqtd); 2308 } 2309 2310 void 2311 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2312 { 2313 int s; 2314 2315 s = splusb(); 2316 sqtd->nextqtd = sc->sc_freeqtds; 2317 sc->sc_freeqtds = sqtd; 2318 splx(s); 2319 } 2320 2321 usbd_status 2322 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2323 int alen, int rd, usbd_xfer_handle xfer, 2324 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2325 { 2326 ehci_soft_qtd_t *next, *cur; 2327 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2328 u_int32_t qtdstatus; 2329 int len, curlen, mps; 2330 int i, tog; 2331 usb_dma_t *dma = &xfer->dmabuf; 2332 u_int16_t flags = xfer->flags; 2333 2334 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2335 2336 len = alen; 2337 dataphys = DMAADDR(dma, 0); 2338 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2339 qtdstatus = EHCI_QTD_ACTIVE | 2340 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2341 EHCI_QTD_SET_CERR(3) 2342 /* IOC set below */ 2343 /* BYTES set below */ 2344 ; 2345 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2346 tog = epipe->nexttoggle; 2347 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2348 2349 cur = ehci_alloc_sqtd(sc); 2350 *sp = cur; 2351 if (cur == NULL) 2352 goto nomem; 2353 2354 usb_syncmem(dma, 0, alen, 2355 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2356 for (;;) { 2357 dataphyspage = EHCI_PAGE(dataphys); 2358 /* The EHCI hardware can handle at most 5 pages. */ 2359 if (dataphyslastpage - dataphyspage < 2360 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2361 /* we can handle it in this QTD */ 2362 curlen = len; 2363 } else { 2364 /* must use multiple TDs, fill as much as possible. */ 2365 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2366 EHCI_PAGE_OFFSET(dataphys); 2367 #ifdef DIAGNOSTIC 2368 if (curlen > len) { 2369 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2370 "len=0x%x offs=0x%x\n", curlen, len, 2371 EHCI_PAGE_OFFSET(dataphys)); 2372 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2373 dataphyslastpage, dataphyspage, 2374 dataphys); 2375 curlen = len; 2376 } 2377 #endif 2378 /* the length must be a multiple of the max size */ 2379 curlen -= curlen % mps; 2380 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2381 "curlen=%d\n", curlen)); 2382 #ifdef DIAGNOSTIC 2383 if (curlen == 0) 2384 panic("ehci_alloc_sqtd_chain: curlen == 0"); 2385 #endif 2386 } 2387 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2388 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2389 dataphys, dataphyslastpage, 2390 len, curlen)); 2391 len -= curlen; 2392 2393 /* 2394 * Allocate another transfer if there's more data left, 2395 * or if force last short transfer flag is set and we're 2396 * allocating a multiple of the max packet size. 2397 */ 2398 if (len != 0 || 2399 ((curlen % mps) == 0 && !rd && curlen != 0 && 2400 (flags & USBD_FORCE_SHORT_XFER))) { 2401 next = ehci_alloc_sqtd(sc); 2402 if (next == NULL) 2403 goto nomem; 2404 nextphys = htole32(next->physaddr); 2405 } else { 2406 next = NULL; 2407 nextphys = EHCI_NULL; 2408 } 2409 2410 for (i = 0; i * EHCI_PAGE_SIZE < 2411 curlen + EHCI_PAGE_OFFSET(dataphys); i++) { 2412 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2413 if (i != 0) /* use offset only in first buffer */ 2414 a = EHCI_PAGE(a); 2415 cur->qtd.qtd_buffer[i] = htole32(a); 2416 cur->qtd.qtd_buffer_hi[i] = 0; 2417 #ifdef DIAGNOSTIC 2418 if (i >= EHCI_QTD_NBUFFERS) { 2419 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2420 goto nomem; 2421 } 2422 #endif 2423 } 2424 cur->nextqtd = next; 2425 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2426 cur->qtd.qtd_status = 2427 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2428 cur->xfer = xfer; 2429 cur->len = curlen; 2430 2431 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2432 dataphys, dataphys + curlen)); 2433 /* adjust the toggle based on the number of packets in this 2434 qtd */ 2435 if (((curlen + mps - 1) / mps) & 1) { 2436 tog ^= 1; 2437 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2438 } 2439 if (next == NULL) 2440 break; 2441 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->qtd), 2442 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2443 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2444 dataphys += curlen; 2445 cur = next; 2446 } 2447 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2448 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->qtd), 2449 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2450 *ep = cur; 2451 epipe->nexttoggle = tog; 2452 2453 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2454 *sp, *ep)); 2455 2456 return (USBD_NORMAL_COMPLETION); 2457 2458 nomem: 2459 /* XXX free chain */ 2460 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2461 return (USBD_NOMEM); 2462 } 2463 2464 Static void 2465 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2466 ehci_soft_qtd_t *sqtdend) 2467 { 2468 ehci_soft_qtd_t *p; 2469 int i; 2470 2471 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2472 sqtd, sqtdend)); 2473 2474 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2475 p = sqtd->nextqtd; 2476 ehci_free_sqtd(sc, sqtd); 2477 } 2478 } 2479 2480 /****************/ 2481 2482 /* 2483 * Close a reqular pipe. 2484 * Assumes that there are no pending transactions. 2485 */ 2486 void 2487 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2488 { 2489 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2490 ehci_softc_t *sc = pipe->device->bus->hci_private; 2491 ehci_soft_qh_t *sqh = epipe->sqh; 2492 int s; 2493 2494 s = splusb(); 2495 ehci_rem_qh(sc, sqh, head); 2496 splx(s); 2497 ehci_free_sqh(sc, epipe->sqh); 2498 } 2499 2500 /* 2501 * Abort a device request. 2502 * If this routine is called at splusb() it guarantees that the request 2503 * will be removed from the hardware scheduling and that the callback 2504 * for it will be called with USBD_CANCELLED status. 2505 * It's impossible to guarantee that the requested transfer will not 2506 * have happened since the hardware runs concurrently. 2507 * If the transaction has already happened we rely on the ordinary 2508 * interrupt processing to process it. 2509 * XXX This is most probably wrong. 2510 */ 2511 void 2512 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2513 { 2514 #define exfer EXFER(xfer) 2515 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2516 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2517 ehci_soft_qh_t *sqh = epipe->sqh; 2518 ehci_soft_qtd_t *sqtd; 2519 ehci_physaddr_t cur; 2520 u_int32_t qhstatus; 2521 int s; 2522 int hit; 2523 int wake; 2524 2525 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2526 2527 if (sc->sc_dying) { 2528 /* If we're dying, just do the software part. */ 2529 s = splusb(); 2530 xfer->status = status; /* make software ignore it */ 2531 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2532 usb_transfer_complete(xfer); 2533 splx(s); 2534 return; 2535 } 2536 2537 if (xfer->device->bus->intr_context || !curproc) 2538 panic("ehci_abort_xfer: not in process context"); 2539 2540 /* 2541 * If an abort is already in progress then just wait for it to 2542 * complete and return. 2543 */ 2544 if (xfer->hcflags & UXFER_ABORTING) { 2545 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2546 #ifdef DIAGNOSTIC 2547 if (status == USBD_TIMEOUT) 2548 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2549 #endif 2550 /* Override the status which might be USBD_TIMEOUT. */ 2551 xfer->status = status; 2552 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2553 xfer->hcflags |= UXFER_ABORTWAIT; 2554 while (xfer->hcflags & UXFER_ABORTING) 2555 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2556 return; 2557 } 2558 xfer->hcflags |= UXFER_ABORTING; 2559 2560 /* 2561 * Step 1: Make interrupt routine and hardware ignore xfer. 2562 */ 2563 s = splusb(); 2564 xfer->status = status; /* make software ignore it */ 2565 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2566 2567 usb_syncmem(&sqh->dma, 2568 sqh->offs + offsetof(ehci_qh_t, qh_qtd.qtd_status), 2569 sizeof(sqh->qh.qh_qtd.qtd_status), 2570 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2571 qhstatus = sqh->qh.qh_qtd.qtd_status; 2572 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2573 usb_syncmem(&sqh->dma, 2574 sqh->offs + offsetof(ehci_qh_t, qh_qtd.qtd_status), 2575 sizeof(sqh->qh.qh_qtd.qtd_status), 2576 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2577 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2578 usb_syncmem(&sqtd->dma, 2579 sqtd->offs + offsetof(ehci_qtd_t, qtd_status), 2580 sizeof(sqtd->qtd.qtd_status), 2581 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2582 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2583 usb_syncmem(&sqtd->dma, 2584 sqtd->offs + offsetof(ehci_qtd_t, qtd_status), 2585 sizeof(sqtd->qtd.qtd_status), 2586 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2587 if (sqtd == exfer->sqtdend) 2588 break; 2589 } 2590 splx(s); 2591 2592 /* 2593 * Step 2: Wait until we know hardware has finished any possible 2594 * use of the xfer. Also make sure the soft interrupt routine 2595 * has run. 2596 */ 2597 ehci_sync_hc(sc); 2598 s = splusb(); 2599 #ifdef USB_USE_SOFTINTR 2600 sc->sc_softwake = 1; 2601 #endif /* USB_USE_SOFTINTR */ 2602 usb_schedsoftintr(&sc->sc_bus); 2603 #ifdef USB_USE_SOFTINTR 2604 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2605 #endif /* USB_USE_SOFTINTR */ 2606 splx(s); 2607 2608 /* 2609 * Step 3: Remove any vestiges of the xfer from the hardware. 2610 * The complication here is that the hardware may have executed 2611 * beyond the xfer we're trying to abort. So as we're scanning 2612 * the TDs of this xfer we check if the hardware points to 2613 * any of them. 2614 */ 2615 s = splusb(); /* XXX why? */ 2616 2617 usb_syncmem(&sqh->dma, 2618 sqh->offs + offsetof(ehci_qh_t, qh_curqtd), 2619 sizeof(sqh->qh.qh_curqtd), 2620 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2621 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2622 hit = 0; 2623 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2624 hit |= cur == sqtd->physaddr; 2625 if (sqtd == exfer->sqtdend) 2626 break; 2627 } 2628 sqtd = sqtd->nextqtd; 2629 /* Zap curqtd register if hardware pointed inside the xfer. */ 2630 if (hit && sqtd != NULL) { 2631 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2632 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2633 usb_syncmem(&sqh->dma, 2634 sqh->offs + offsetof(ehci_qh_t, qh_curqtd), 2635 sizeof(sqh->qh.qh_curqtd), 2636 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2637 sqh->qh.qh_qtd.qtd_status = qhstatus; 2638 usb_syncmem(&sqh->dma, 2639 sqh->offs + offsetof(ehci_qh_t, qh_qtd.qtd_status), 2640 sizeof(sqh->qh.qh_qtd.qtd_status), 2641 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2642 } else { 2643 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2644 } 2645 2646 /* 2647 * Step 4: Execute callback. 2648 */ 2649 #ifdef DIAGNOSTIC 2650 exfer->isdone = 1; 2651 #endif 2652 wake = xfer->hcflags & UXFER_ABORTWAIT; 2653 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2654 usb_transfer_complete(xfer); 2655 if (wake) 2656 wakeup(&xfer->hcflags); 2657 2658 splx(s); 2659 #undef exfer 2660 } 2661 2662 void 2663 ehci_timeout(void *addr) 2664 { 2665 struct ehci_xfer *exfer = addr; 2666 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2667 ehci_softc_t *sc = epipe->pipe.device->bus->hci_private; 2668 2669 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2670 #ifdef USB_DEBUG 2671 if (ehcidebug > 1) 2672 usbd_dump_pipe(exfer->xfer.pipe); 2673 #endif 2674 2675 if (sc->sc_dying) { 2676 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2677 return; 2678 } 2679 2680 /* Execute the abort in a process context. */ 2681 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2682 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task, 2683 USB_TASKQ_HC); 2684 } 2685 2686 void 2687 ehci_timeout_task(void *addr) 2688 { 2689 usbd_xfer_handle xfer = addr; 2690 int s; 2691 2692 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2693 2694 s = splusb(); 2695 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2696 splx(s); 2697 } 2698 2699 /************************/ 2700 2701 Static usbd_status 2702 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2703 { 2704 usbd_status err; 2705 2706 /* Insert last in queue. */ 2707 err = usb_insert_transfer(xfer); 2708 if (err) 2709 return (err); 2710 2711 /* Pipe isn't running, start first */ 2712 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2713 } 2714 2715 Static usbd_status 2716 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2717 { 2718 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2719 usbd_status err; 2720 2721 if (sc->sc_dying) 2722 return (USBD_IOERROR); 2723 2724 #ifdef DIAGNOSTIC 2725 if (!(xfer->rqflags & URQ_REQUEST)) { 2726 /* XXX panic */ 2727 printf("ehci_device_ctrl_transfer: not a request\n"); 2728 return (USBD_INVAL); 2729 } 2730 #endif 2731 2732 err = ehci_device_request(xfer); 2733 if (err) 2734 return (err); 2735 2736 if (sc->sc_bus.use_polling) 2737 ehci_waitintr(sc, xfer); 2738 return (USBD_IN_PROGRESS); 2739 } 2740 2741 void 2742 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2743 { 2744 struct ehci_xfer *ex = EXFER(xfer); 2745 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2746 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2747 usb_device_request_t *req = &xfer->request; 2748 int len = UGETW(req->wLength); 2749 int rd = req->bmRequestType & UT_READ; 2750 2751 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2752 2753 #ifdef DIAGNOSTIC 2754 if (!(xfer->rqflags & URQ_REQUEST)) { 2755 panic("ehci_ctrl_done: not a request"); 2756 } 2757 #endif 2758 2759 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2760 ehci_del_intr_list(ex); /* remove from active list */ 2761 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2762 usb_syncmem(&epipe->u.ctl.reqdma, 0, sizeof *req, 2763 BUS_DMASYNC_POSTWRITE); 2764 if (len) 2765 usb_syncmem(&xfer->dmabuf, 0, len, 2766 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2767 } 2768 2769 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2770 } 2771 2772 /* Abort a device control request. */ 2773 Static void 2774 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2775 { 2776 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2777 ehci_abort_xfer(xfer, USBD_CANCELLED); 2778 } 2779 2780 /* Close a device control pipe. */ 2781 Static void 2782 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2783 { 2784 ehci_softc_t *sc = pipe->device->bus->hci_private; 2785 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2786 2787 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2788 ehci_close_pipe(pipe, sc->sc_async_head); 2789 } 2790 2791 usbd_status 2792 ehci_device_request(usbd_xfer_handle xfer) 2793 { 2794 #define exfer EXFER(xfer) 2795 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2796 usb_device_request_t *req = &xfer->request; 2797 usbd_device_handle dev = epipe->pipe.device; 2798 ehci_softc_t *sc = dev->bus->hci_private; 2799 int addr = dev->address; 2800 ehci_soft_qtd_t *setup, *stat, *next; 2801 ehci_soft_qh_t *sqh; 2802 int isread; 2803 int len; 2804 usbd_status err; 2805 int s; 2806 2807 isread = req->bmRequestType & UT_READ; 2808 len = UGETW(req->wLength); 2809 2810 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2811 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2812 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2813 UGETW(req->wIndex), len, addr, 2814 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2815 2816 setup = ehci_alloc_sqtd(sc); 2817 if (setup == NULL) { 2818 err = USBD_NOMEM; 2819 goto bad1; 2820 } 2821 stat = ehci_alloc_sqtd(sc); 2822 if (stat == NULL) { 2823 err = USBD_NOMEM; 2824 goto bad2; 2825 } 2826 2827 sqh = epipe->sqh; 2828 epipe->u.ctl.length = len; 2829 2830 /* Update device address and length since they may have changed 2831 during the setup of the control pipe in usbd_new_device(). */ 2832 /* XXX This only needs to be done once, but it's too early in open. */ 2833 /* XXXX Should not touch ED here! */ 2834 sqh->qh.qh_endp = 2835 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2836 htole32( 2837 EHCI_QH_SET_ADDR(addr) | 2838 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2839 ); 2840 2841 /* Set up data transaction */ 2842 if (len != 0) { 2843 ehci_soft_qtd_t *end; 2844 2845 /* Start toggle at 1. */ 2846 epipe->nexttoggle = 1; 2847 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2848 &next, &end); 2849 if (err) 2850 goto bad3; 2851 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2852 end->nextqtd = stat; 2853 end->qtd.qtd_next = 2854 end->qtd.qtd_altnext = htole32(stat->physaddr); 2855 usb_syncmem(&end->dma, end->offs, sizeof(end->qtd), 2856 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2857 } else { 2858 next = stat; 2859 } 2860 2861 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2862 usb_syncmem(&epipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2863 2864 /* Clear toggle */ 2865 setup->qtd.qtd_status = htole32( 2866 EHCI_QTD_ACTIVE | 2867 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2868 EHCI_QTD_SET_CERR(3) | 2869 EHCI_QTD_SET_TOGGLE(0) | 2870 EHCI_QTD_SET_BYTES(sizeof *req) 2871 ); 2872 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2873 setup->qtd.qtd_buffer_hi[0] = 0; 2874 setup->nextqtd = next; 2875 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2876 setup->xfer = xfer; 2877 setup->len = sizeof *req; 2878 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->qtd), 2879 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2880 2881 stat->qtd.qtd_status = htole32( 2882 EHCI_QTD_ACTIVE | 2883 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2884 EHCI_QTD_SET_CERR(3) | 2885 EHCI_QTD_SET_TOGGLE(1) | 2886 EHCI_QTD_IOC 2887 ); 2888 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2889 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2890 stat->nextqtd = NULL; 2891 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2892 stat->xfer = xfer; 2893 stat->len = 0; 2894 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->qtd), 2895 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2896 2897 #ifdef EHCI_DEBUG 2898 if (ehcidebug > 5) { 2899 DPRINTF(("ehci_device_request:\n")); 2900 ehci_dump_sqh(sqh); 2901 ehci_dump_sqtds(setup); 2902 } 2903 #endif 2904 2905 exfer->sqtdstart = setup; 2906 exfer->sqtdend = stat; 2907 #ifdef DIAGNOSTIC 2908 if (!exfer->isdone) { 2909 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2910 } 2911 exfer->isdone = 0; 2912 #endif 2913 2914 /* Insert qTD in QH list. */ 2915 s = splusb(); 2916 ehci_set_qh_qtd(sqh, setup); /* also does usb_syncmem(sqh) */ 2917 if (xfer->timeout && !sc->sc_bus.use_polling) { 2918 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2919 ehci_timeout, xfer); 2920 } 2921 ehci_add_intr_list(sc, exfer); 2922 xfer->status = USBD_IN_PROGRESS; 2923 splx(s); 2924 2925 #ifdef EHCI_DEBUG 2926 if (ehcidebug > 10) { 2927 DPRINTF(("ehci_device_request: status=%x\n", 2928 EOREAD4(sc, EHCI_USBSTS))); 2929 delay(10000); 2930 ehci_dump_regs(sc); 2931 ehci_dump_sqh(sc->sc_async_head); 2932 ehci_dump_sqh(sqh); 2933 ehci_dump_sqtds(setup); 2934 } 2935 #endif 2936 2937 return (USBD_NORMAL_COMPLETION); 2938 2939 bad3: 2940 ehci_free_sqtd(sc, stat); 2941 bad2: 2942 ehci_free_sqtd(sc, setup); 2943 bad1: 2944 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2945 xfer->status = err; 2946 usb_transfer_complete(xfer); 2947 return (err); 2948 #undef exfer 2949 } 2950 2951 /* 2952 * Some EHCI chips from VIA seem to trigger interrupts before writing back the 2953 * qTD status, or miss signalling occasionally under heavy load. If the host 2954 * machine is too fast, we we can miss transaction completion - when we scan 2955 * the active list the transaction still seems to be active. This generally 2956 * exhibits itself as a umass stall that never recovers. 2957 * 2958 * We work around this behaviour by setting up this callback after any softintr 2959 * that completes with transactions still pending, giving us another chance to 2960 * check for completion after the writeback has taken place. 2961 */ 2962 void 2963 ehci_intrlist_timeout(void *arg) 2964 { 2965 ehci_softc_t *sc = arg; 2966 int s = splusb(); 2967 2968 DPRINTF(("ehci_intrlist_timeout\n")); 2969 usb_schedsoftintr(&sc->sc_bus); 2970 2971 splx(s); 2972 } 2973 2974 /************************/ 2975 2976 Static usbd_status 2977 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2978 { 2979 usbd_status err; 2980 2981 /* Insert last in queue. */ 2982 err = usb_insert_transfer(xfer); 2983 if (err) 2984 return (err); 2985 2986 /* Pipe isn't running, start first */ 2987 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2988 } 2989 2990 usbd_status 2991 ehci_device_bulk_start(usbd_xfer_handle xfer) 2992 { 2993 #define exfer EXFER(xfer) 2994 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2995 usbd_device_handle dev = epipe->pipe.device; 2996 ehci_softc_t *sc = dev->bus->hci_private; 2997 ehci_soft_qtd_t *data, *dataend; 2998 ehci_soft_qh_t *sqh; 2999 usbd_status err; 3000 int len, isread, endpt; 3001 int s; 3002 3003 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 3004 xfer, xfer->length, xfer->flags)); 3005 3006 if (sc->sc_dying) 3007 return (USBD_IOERROR); 3008 3009 #ifdef DIAGNOSTIC 3010 if (xfer->rqflags & URQ_REQUEST) 3011 panic("ehci_device_bulk_start: a request"); 3012 #endif 3013 3014 len = xfer->length; 3015 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3016 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3017 sqh = epipe->sqh; 3018 3019 epipe->u.bulk.length = len; 3020 3021 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3022 &dataend); 3023 if (err) { 3024 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 3025 xfer->status = err; 3026 usb_transfer_complete(xfer); 3027 return (err); 3028 } 3029 3030 #ifdef EHCI_DEBUG 3031 if (ehcidebug > 5) { 3032 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 3033 ehci_dump_sqh(sqh); 3034 ehci_dump_sqtds(data); 3035 } 3036 #endif 3037 3038 /* Set up interrupt info. */ 3039 exfer->sqtdstart = data; 3040 exfer->sqtdend = dataend; 3041 #ifdef DIAGNOSTIC 3042 if (!exfer->isdone) { 3043 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 3044 } 3045 exfer->isdone = 0; 3046 #endif 3047 3048 s = splusb(); 3049 ehci_set_qh_qtd(sqh, data); /* also does usb_syncmem(sqh) */ 3050 if (xfer->timeout && !sc->sc_bus.use_polling) { 3051 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3052 ehci_timeout, xfer); 3053 } 3054 ehci_add_intr_list(sc, exfer); 3055 xfer->status = USBD_IN_PROGRESS; 3056 splx(s); 3057 3058 #ifdef EHCI_DEBUG 3059 if (ehcidebug > 10) { 3060 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 3061 delay(10000); 3062 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 3063 ehci_dump_regs(sc); 3064 #if 0 3065 printf("async_head:\n"); 3066 ehci_dump_sqh(sc->sc_async_head); 3067 #endif 3068 printf("sqh:\n"); 3069 ehci_dump_sqh(sqh); 3070 ehci_dump_sqtds(data); 3071 } 3072 #endif 3073 3074 if (sc->sc_bus.use_polling) 3075 ehci_waitintr(sc, xfer); 3076 3077 return (USBD_IN_PROGRESS); 3078 #undef exfer 3079 } 3080 3081 Static void 3082 ehci_device_bulk_abort(usbd_xfer_handle xfer) 3083 { 3084 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 3085 ehci_abort_xfer(xfer, USBD_CANCELLED); 3086 } 3087 3088 /* 3089 * Close a device bulk pipe. 3090 */ 3091 Static void 3092 ehci_device_bulk_close(usbd_pipe_handle pipe) 3093 { 3094 ehci_softc_t *sc = pipe->device->bus->hci_private; 3095 3096 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 3097 ehci_close_pipe(pipe, sc->sc_async_head); 3098 } 3099 3100 void 3101 ehci_device_bulk_done(usbd_xfer_handle xfer) 3102 { 3103 struct ehci_xfer *ex = EXFER(xfer); 3104 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3105 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3106 int endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3107 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 3108 3109 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 3110 xfer, xfer->actlen)); 3111 3112 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3113 ehci_del_intr_list(ex); /* remove from active list */ 3114 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3115 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3116 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3117 } 3118 3119 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 3120 } 3121 3122 /************************/ 3123 3124 Static usbd_status 3125 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 3126 { 3127 struct ehci_soft_islot *isp; 3128 int islot, lev; 3129 3130 /* Find a poll rate that is large enough. */ 3131 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 3132 if (EHCI_ILEV_IVAL(lev) <= ival) 3133 break; 3134 3135 /* Pick an interrupt slot at the right level. */ 3136 /* XXX could do better than picking at random */ 3137 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 3138 islot = EHCI_IQHIDX(lev, sc->sc_rand); 3139 3140 sqh->islot = islot; 3141 isp = &sc->sc_islots[islot]; 3142 ehci_add_qh(sqh, isp->sqh); 3143 3144 return (USBD_NORMAL_COMPLETION); 3145 } 3146 3147 Static usbd_status 3148 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3149 { 3150 usbd_status err; 3151 3152 /* Insert last in queue. */ 3153 err = usb_insert_transfer(xfer); 3154 if (err) 3155 return (err); 3156 3157 /* 3158 * Pipe isn't running (otherwise err would be USBD_INPROG), 3159 * so start it first. 3160 */ 3161 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3162 } 3163 3164 Static usbd_status 3165 ehci_device_intr_start(usbd_xfer_handle xfer) 3166 { 3167 #define exfer EXFER(xfer) 3168 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3169 usbd_device_handle dev = xfer->pipe->device; 3170 ehci_softc_t *sc = dev->bus->hci_private; 3171 ehci_soft_qtd_t *data, *dataend; 3172 ehci_soft_qh_t *sqh; 3173 usbd_status err; 3174 int len, isread, endpt; 3175 int s; 3176 3177 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3178 xfer, xfer->length, xfer->flags)); 3179 3180 if (sc->sc_dying) 3181 return (USBD_IOERROR); 3182 3183 #ifdef DIAGNOSTIC 3184 if (xfer->rqflags & URQ_REQUEST) 3185 panic("ehci_device_intr_start: a request"); 3186 #endif 3187 3188 len = xfer->length; 3189 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3190 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3191 sqh = epipe->sqh; 3192 3193 epipe->u.intr.length = len; 3194 3195 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3196 &dataend); 3197 if (err) { 3198 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3199 xfer->status = err; 3200 usb_transfer_complete(xfer); 3201 return (err); 3202 } 3203 3204 #ifdef EHCI_DEBUG 3205 if (ehcidebug > 5) { 3206 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3207 ehci_dump_sqh(sqh); 3208 ehci_dump_sqtds(data); 3209 } 3210 #endif 3211 3212 /* Set up interrupt info. */ 3213 exfer->sqtdstart = data; 3214 exfer->sqtdend = dataend; 3215 #ifdef DIAGNOSTIC 3216 if (!exfer->isdone) { 3217 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3218 } 3219 exfer->isdone = 0; 3220 #endif 3221 3222 s = splusb(); 3223 ehci_set_qh_qtd(sqh, data); /* also does usb_syncmem(sqh) */ 3224 if (xfer->timeout && !sc->sc_bus.use_polling) { 3225 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3226 ehci_timeout, xfer); 3227 } 3228 ehci_add_intr_list(sc, exfer); 3229 xfer->status = USBD_IN_PROGRESS; 3230 splx(s); 3231 3232 #ifdef EHCI_DEBUG 3233 if (ehcidebug > 10) { 3234 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3235 delay(10000); 3236 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3237 ehci_dump_regs(sc); 3238 printf("sqh:\n"); 3239 ehci_dump_sqh(sqh); 3240 ehci_dump_sqtds(data); 3241 } 3242 #endif 3243 3244 if (sc->sc_bus.use_polling) 3245 ehci_waitintr(sc, xfer); 3246 3247 return (USBD_IN_PROGRESS); 3248 #undef exfer 3249 } 3250 3251 Static void 3252 ehci_device_intr_abort(usbd_xfer_handle xfer) 3253 { 3254 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3255 if (xfer->pipe->intrxfer == xfer) { 3256 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3257 xfer->pipe->intrxfer = NULL; 3258 } 3259 ehci_abort_xfer(xfer, USBD_CANCELLED); 3260 } 3261 3262 Static void 3263 ehci_device_intr_close(usbd_pipe_handle pipe) 3264 { 3265 ehci_softc_t *sc = pipe->device->bus->hci_private; 3266 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3267 struct ehci_soft_islot *isp; 3268 3269 isp = &sc->sc_islots[epipe->sqh->islot]; 3270 ehci_close_pipe(pipe, isp->sqh); 3271 } 3272 3273 Static void 3274 ehci_device_intr_done(usbd_xfer_handle xfer) 3275 { 3276 #define exfer EXFER(xfer) 3277 struct ehci_xfer *ex = EXFER(xfer); 3278 ehci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3279 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3280 ehci_soft_qtd_t *data, *dataend; 3281 ehci_soft_qh_t *sqh; 3282 usbd_status err; 3283 int len, isread, endpt, s; 3284 3285 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3286 xfer, xfer->actlen)); 3287 3288 if (xfer->pipe->repeat) { 3289 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3290 3291 len = epipe->u.intr.length; 3292 xfer->length = len; 3293 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3294 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3295 usb_syncmem(&xfer->dmabuf, 0, len, 3296 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3297 sqh = epipe->sqh; 3298 3299 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3300 &data, &dataend); 3301 if (err) { 3302 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3303 xfer->status = err; 3304 return; 3305 } 3306 3307 /* Set up interrupt info. */ 3308 exfer->sqtdstart = data; 3309 exfer->sqtdend = dataend; 3310 #ifdef DIAGNOSTIC 3311 if (!exfer->isdone) { 3312 printf("ehci_device_intr_done: not done, ex=%p\n", 3313 exfer); 3314 } 3315 exfer->isdone = 0; 3316 #endif 3317 3318 s = splusb(); 3319 ehci_set_qh_qtd(sqh, data); /* also does usb_syncmem(sqh) */ 3320 if (xfer->timeout && !sc->sc_bus.use_polling) { 3321 usb_callout(xfer->timeout_handle, 3322 mstohz(xfer->timeout), ehci_timeout, xfer); 3323 } 3324 splx(s); 3325 3326 xfer->status = USBD_IN_PROGRESS; 3327 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3328 ehci_del_intr_list(ex); /* remove from active list */ 3329 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3330 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3331 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3332 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3333 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3334 } 3335 #undef exfer 3336 } 3337 3338 /************************/ 3339 3340 Static usbd_status 3341 ehci_device_isoc_transfer(usbd_xfer_handle xfer) 3342 { 3343 return USBD_IOERROR; 3344 } 3345 Static usbd_status 3346 ehci_device_isoc_start(usbd_xfer_handle xfer) 3347 { 3348 return USBD_IOERROR; 3349 } 3350 Static void 3351 ehci_device_isoc_abort(usbd_xfer_handle xfer) 3352 { 3353 } 3354 Static void 3355 ehci_device_isoc_close(usbd_pipe_handle pipe) 3356 { 3357 } 3358 Static void 3359 ehci_device_isoc_done(usbd_xfer_handle xfer) 3360 { 3361 } 3362
Indexes created Mon Sep 22 21:09:42 GMT 2025