ehci.c revision 1.14
1 /* TODO 2 Add intrinfo. 3 Indicator light bit. 4 */ 5 /* $NetBSD: ehci.c,v 1.14 2001/11/20 16:25:35 augustss Exp $ */ 6 7 /* 8 * Copyright (c) 2001 The NetBSD Foundation, Inc. 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Lennart Augustsson (lennart (at) augustsson.net). 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 45 * 46 * The EHCI 0.96 spec can be found at 47 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 48 * and the USB 2.0 spec at 49 * http://www.usb.org/developers/data/usb_20.zip 50 * 51 */ 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.14 2001/11/20 16:25:35 augustss Exp $"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/device.h> 61 #include <sys/select.h> 62 #include <sys/proc.h> 63 #include <sys/queue.h> 64 65 #include <machine/bus.h> 66 #include <machine/endian.h> 67 68 #include <dev/usb/usb.h> 69 #include <dev/usb/usbdi.h> 70 #include <dev/usb/usbdivar.h> 71 #include <dev/usb/usb_mem.h> 72 #include <dev/usb/usb_quirks.h> 73 74 #include <dev/usb/ehcireg.h> 75 #include <dev/usb/ehcivar.h> 76 77 #ifdef EHCI_DEBUG 78 #define DPRINTF(x) if (ehcidebug) printf x 79 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 80 int ehcidebug = 0; 81 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n,x) 85 #endif 86 87 struct ehci_pipe { 88 struct usbd_pipe pipe; 89 ehci_soft_qh_t *sqh; 90 union { 91 ehci_soft_qtd_t *qtd; 92 /* ehci_soft_itd_t *itd; */ 93 } tail; 94 union { 95 /* Control pipe */ 96 struct { 97 usb_dma_t reqdma; 98 u_int length; 99 ehci_soft_qtd_t *setup, *data, *stat; 100 } ctl; 101 /* Interrupt pipe */ 102 /* Bulk pipe */ 103 struct { 104 u_int length; 105 int isread; 106 } bulk; 107 /* Iso pipe */ 108 } u; 109 }; 110 111 Static void ehci_shutdown(void *); 112 Static void ehci_power(int, void *); 113 114 Static usbd_status ehci_open(usbd_pipe_handle); 115 Static void ehci_poll(struct usbd_bus *); 116 Static void ehci_softintr(void *); 117 Static int ehci_intr1(ehci_softc_t *); 118 119 120 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 121 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 122 123 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 124 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 125 126 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 127 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 128 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 129 Static void ehci_root_ctrl_close(usbd_pipe_handle); 130 Static void ehci_root_ctrl_done(usbd_xfer_handle); 131 132 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 133 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 134 Static void ehci_root_intr_abort(usbd_xfer_handle); 135 Static void ehci_root_intr_close(usbd_pipe_handle); 136 Static void ehci_root_intr_done(usbd_xfer_handle); 137 138 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 139 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 140 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 141 Static void ehci_device_ctrl_close(usbd_pipe_handle); 142 Static void ehci_device_ctrl_done(usbd_xfer_handle); 143 144 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 145 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 146 Static void ehci_device_bulk_abort(usbd_xfer_handle); 147 Static void ehci_device_bulk_close(usbd_pipe_handle); 148 Static void ehci_device_bulk_done(usbd_xfer_handle); 149 150 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 151 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 152 Static void ehci_device_intr_abort(usbd_xfer_handle); 153 Static void ehci_device_intr_close(usbd_pipe_handle); 154 Static void ehci_device_intr_done(usbd_xfer_handle); 155 156 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 158 Static void ehci_device_isoc_abort(usbd_xfer_handle); 159 Static void ehci_device_isoc_close(usbd_pipe_handle); 160 Static void ehci_device_isoc_done(usbd_xfer_handle); 161 162 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 163 Static void ehci_noop(usbd_pipe_handle pipe); 164 165 Static int ehci_str(usb_string_descriptor_t *, int, char *); 166 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 167 Static void ehci_pcd_able(ehci_softc_t *, int); 168 Static void ehci_pcd_enable(void *); 169 Static void ehci_disown(ehci_softc_t *, int, int); 170 171 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 172 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 173 174 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 175 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 176 177 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 178 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 179 ehci_soft_qh_t *); 180 Static void ehci_sync_hc(ehci_softc_t *); 181 182 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 183 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 184 185 #ifdef EHCI_DEBUG 186 Static void ehci_dumpregs(ehci_softc_t *); 187 Static void ehci_dump(void); 188 Static ehci_softc_t *theehci; 189 Static void ehci_dump_link(ehci_link_t); 190 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 191 Static void ehci_dump_qtd(ehci_qtd_t *); 192 Static void ehci_dump_sqh(ehci_soft_qh_t *); 193 #endif 194 195 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 196 197 #define EHCI_INTR_ENDPT 1 198 199 Static struct usbd_bus_methods ehci_bus_methods = { 200 ehci_open, 201 ehci_softintr, 202 ehci_poll, 203 ehci_allocm, 204 ehci_freem, 205 ehci_allocx, 206 ehci_freex, 207 }; 208 209 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 210 ehci_root_ctrl_transfer, 211 ehci_root_ctrl_start, 212 ehci_root_ctrl_abort, 213 ehci_root_ctrl_close, 214 ehci_noop, 215 ehci_root_ctrl_done, 216 }; 217 218 Static struct usbd_pipe_methods ehci_root_intr_methods = { 219 ehci_root_intr_transfer, 220 ehci_root_intr_start, 221 ehci_root_intr_abort, 222 ehci_root_intr_close, 223 ehci_noop, 224 ehci_root_intr_done, 225 }; 226 227 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 228 ehci_device_ctrl_transfer, 229 ehci_device_ctrl_start, 230 ehci_device_ctrl_abort, 231 ehci_device_ctrl_close, 232 ehci_noop, 233 ehci_device_ctrl_done, 234 }; 235 236 Static struct usbd_pipe_methods ehci_device_intr_methods = { 237 ehci_device_intr_transfer, 238 ehci_device_intr_start, 239 ehci_device_intr_abort, 240 ehci_device_intr_close, 241 ehci_device_clear_toggle, 242 ehci_device_intr_done, 243 }; 244 245 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 246 ehci_device_bulk_transfer, 247 ehci_device_bulk_start, 248 ehci_device_bulk_abort, 249 ehci_device_bulk_close, 250 ehci_device_clear_toggle, 251 ehci_device_bulk_done, 252 }; 253 254 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 255 ehci_device_isoc_transfer, 256 ehci_device_isoc_start, 257 ehci_device_isoc_abort, 258 ehci_device_isoc_close, 259 ehci_noop, 260 ehci_device_isoc_done, 261 }; 262 263 usbd_status 264 ehci_init(ehci_softc_t *sc) 265 { 266 u_int32_t version, sparams, cparams, hcr; 267 u_int i; 268 usbd_status err; 269 ehci_soft_qh_t *sqh; 270 271 DPRINTF(("ehci_init: start\n")); 272 #ifdef EHCI_DEBUG 273 theehci = sc; 274 #endif 275 276 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 277 278 version = EREAD2(sc, EHCI_HCIVERSION); 279 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 280 version >> 8, version & 0xff); 281 282 sparams = EREAD4(sc, EHCI_HCSPARAMS); 283 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 284 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 285 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 286 printf("%s: wrong number of companions (%d != %d)\n", 287 USBDEVNAME(sc->sc_bus.bdev), 288 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 289 return (USBD_IOERROR); 290 } 291 if (sc->sc_ncomp > 0) { 292 printf("%s: companion controller%s, %d port%s each:", 293 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 294 EHCI_HCS_N_PCC(sparams), 295 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 296 for (i = 0; i < sc->sc_ncomp; i++) 297 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 298 printf("\n"); 299 } 300 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 301 cparams = EREAD4(sc, EHCI_HCCPARAMS); 302 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 303 304 sc->sc_bus.usbrev = USBREV_2_0; 305 306 /* Reset the controller */ 307 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 308 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 309 usb_delay_ms(&sc->sc_bus, 1); 310 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 311 for (i = 0; i < 100; i++) { 312 delay(10); 313 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 314 if (!hcr) 315 break; 316 } 317 if (hcr) { 318 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 319 return (USBD_IOERROR); 320 } 321 322 /* frame list size at default, read back what we got and use that */ 323 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 324 case 0: sc->sc_flsize = 1024*4; break; 325 case 1: sc->sc_flsize = 512*4; break; 326 case 2: sc->sc_flsize = 256*4; break; 327 case 3: return (USBD_IOERROR); 328 } 329 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 330 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 331 if (err) 332 return (err); 333 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 334 335 /* Set up the bus struct. */ 336 sc->sc_bus.methods = &ehci_bus_methods; 337 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 338 339 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 340 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 341 342 sc->sc_eintrs = EHCI_NORMAL_INTRS; 343 344 /* Allocate dummy QH that starts the async list. */ 345 sqh = ehci_alloc_sqh(sc); 346 if (sqh == NULL) { 347 err = USBD_NOMEM; 348 goto bad1; 349 } 350 /* Fill the QH */ 351 sqh->qh.qh_endp = 352 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 353 sqh->qh.qh_link = 354 htole32(sqh->physaddr | EHCI_LINK_QH); 355 sqh->qh.qh_curqtd = EHCI_NULL; 356 sqh->next = NULL; 357 /* Fill the overlay qTD */ 358 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 359 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 360 sqh->qh.qh_qtd.qtd_status = 361 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 362 sqh->sqtd = NULL; 363 #ifdef EHCI_DEBUG 364 if (ehcidebug) { 365 ehci_dump_sqh(sc->sc_async_head); 366 } 367 #endif 368 369 /* Point to async list */ 370 sc->sc_async_head = sqh; 371 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 372 373 usb_callout_init(sc->sc_tmo_pcd); 374 375 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 376 377 /* Enable interrupts */ 378 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 379 380 /* Turn on controller */ 381 EOWRITE4(sc, EHCI_USBCMD, 382 EHCI_CMD_ITC_8 | /* 8 microframes */ 383 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 384 EHCI_CMD_ASE | 385 /* EHCI_CMD_PSE | */ 386 EHCI_CMD_RS); 387 388 /* Take over port ownership */ 389 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 390 391 for (i = 0; i < 100; i++) { 392 delay(10); 393 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 394 if (!hcr) 395 break; 396 } 397 if (hcr) { 398 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 399 return (USBD_IOERROR); 400 } 401 402 return (USBD_NORMAL_COMPLETION); 403 404 #if 0 405 bad3: 406 ehci_free_sqh(sc, sc->sc_ctrl_head); 407 bad2: 408 ehci_free_sqtd(sc, sc->sc_bulk_head->sqtd); 409 #endif 410 bad1: 411 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 412 return (err); 413 } 414 415 int 416 ehci_intr(void *v) 417 { 418 ehci_softc_t *sc = v; 419 420 /* If we get an interrupt while polling, then just ignore it. */ 421 if (sc->sc_bus.use_polling) { 422 #ifdef DIAGNOSTIC 423 printf("ehci_intr: ignored interrupt while polling\n"); 424 #endif 425 return (0); 426 } 427 428 return (ehci_intr1(sc)); 429 } 430 431 Static int 432 ehci_intr1(ehci_softc_t *sc) 433 { 434 u_int32_t intrs, eintrs; 435 436 DPRINTFN(20,("ehci_intr1: enter\n")); 437 438 /* In case the interrupt occurs before initialization has completed. */ 439 if (sc == NULL) { 440 #ifdef DIAGNOSTIC 441 printf("ehci_intr: sc == NULL\n"); 442 #endif 443 return (0); 444 } 445 446 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 447 448 if (!intrs) 449 return (0); 450 451 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 452 eintrs = intrs & sc->sc_eintrs; 453 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 454 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 455 (u_int)eintrs)); 456 if (!eintrs) 457 return (0); 458 459 sc->sc_bus.intr_context++; 460 sc->sc_bus.no_intrs++; 461 if (eintrs & EHCI_STS_IAA) { 462 DPRINTF(("ehci_intr1: door bell\n")); 463 wakeup(&sc->sc_async_head); 464 eintrs &= ~EHCI_STS_INT; 465 } 466 if (eintrs & EHCI_STS_INT) { 467 DPRINTF(("ehci_intr1: something is done\n")); 468 eintrs &= ~EHCI_STS_INT; 469 } 470 if (eintrs & EHCI_STS_ERRINT) { 471 DPRINTF(("ehci_intr1: some error\n")); 472 eintrs &= ~EHCI_STS_HSE; 473 } 474 if (eintrs & EHCI_STS_HSE) { 475 printf("%s: unrecoverable error, controller halted\n", 476 USBDEVNAME(sc->sc_bus.bdev)); 477 /* XXX what else */ 478 } 479 if (eintrs & EHCI_STS_PCD) { 480 ehci_pcd(sc, sc->sc_intrxfer); 481 /* 482 * Disable PCD interrupt for now, because it will be 483 * on until the port has been reset. 484 */ 485 ehci_pcd_able(sc, 0); 486 /* Do not allow RHSC interrupts > 1 per second */ 487 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 488 eintrs &= ~EHCI_STS_PCD; 489 } 490 491 sc->sc_bus.intr_context--; 492 493 if (eintrs != 0) { 494 /* Block unprocessed interrupts. */ 495 sc->sc_eintrs &= ~eintrs; 496 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 497 printf("%s: blocking intrs 0x%x\n", 498 USBDEVNAME(sc->sc_bus.bdev), eintrs); 499 } 500 501 return (1); 502 } 503 504 void 505 ehci_pcd_able(ehci_softc_t *sc, int on) 506 { 507 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 508 if (on) 509 sc->sc_eintrs |= EHCI_STS_PCD; 510 else 511 sc->sc_eintrs &= ~EHCI_STS_PCD; 512 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 513 } 514 515 void 516 ehci_pcd_enable(void *v_sc) 517 { 518 ehci_softc_t *sc = v_sc; 519 520 ehci_pcd_able(sc, 1); 521 } 522 523 void 524 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 525 { 526 usbd_pipe_handle pipe; 527 struct ehci_pipe *opipe; 528 u_char *p; 529 int i, m; 530 531 if (xfer == NULL) { 532 /* Just ignore the change. */ 533 return; 534 } 535 536 pipe = xfer->pipe; 537 opipe = (struct ehci_pipe *)pipe; 538 539 p = KERNADDR(&xfer->dmabuf); 540 m = min(sc->sc_noport, xfer->length * 8 - 1); 541 memset(p, 0, xfer->length); 542 for (i = 1; i <= m; i++) { 543 /* Pick out CHANGE bits from the status reg. */ 544 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 545 p[i/8] |= 1 << (i%8); 546 } 547 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 548 xfer->actlen = xfer->length; 549 xfer->status = USBD_NORMAL_COMPLETION; 550 551 usb_transfer_complete(xfer); 552 } 553 554 void 555 ehci_softintr(void *v) 556 { 557 //ehci_softc_t *sc = v; 558 } 559 560 void 561 ehci_poll(struct usbd_bus *bus) 562 { 563 ehci_softc_t *sc = (ehci_softc_t *)bus; 564 #ifdef EHCI_DEBUG 565 static int last; 566 int new; 567 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 568 if (new != last) { 569 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 570 last = new; 571 } 572 #endif 573 574 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 575 ehci_intr1(sc); 576 } 577 578 int 579 ehci_detach(struct ehci_softc *sc, int flags) 580 { 581 int rv = 0; 582 583 if (sc->sc_child != NULL) 584 rv = config_detach(sc->sc_child, flags); 585 586 if (rv != 0) 587 return (rv); 588 589 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 590 591 if (sc->sc_powerhook != NULL) 592 powerhook_disestablish(sc->sc_powerhook); 593 if (sc->sc_shutdownhook != NULL) 594 shutdownhook_disestablish(sc->sc_shutdownhook); 595 596 /* XXX free other data structures XXX */ 597 598 return (rv); 599 } 600 601 602 int 603 ehci_activate(device_ptr_t self, enum devact act) 604 { 605 struct ehci_softc *sc = (struct ehci_softc *)self; 606 int rv = 0; 607 608 switch (act) { 609 case DVACT_ACTIVATE: 610 return (EOPNOTSUPP); 611 break; 612 613 case DVACT_DEACTIVATE: 614 if (sc->sc_child != NULL) 615 rv = config_deactivate(sc->sc_child); 616 sc->sc_dying = 1; 617 break; 618 } 619 return (rv); 620 } 621 622 /* 623 * Handle suspend/resume. 624 * 625 * We need to switch to polling mode here, because this routine is 626 * called from an intterupt context. This is all right since we 627 * are almost suspended anyway. 628 */ 629 void 630 ehci_power(int why, void *v) 631 { 632 ehci_softc_t *sc = v; 633 //u_int32_t ctl; 634 int s; 635 636 #ifdef EHCI_DEBUG 637 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 638 ehci_dumpregs(sc); 639 #endif 640 641 s = splhardusb(); 642 switch (why) { 643 case PWR_SUSPEND: 644 case PWR_STANDBY: 645 sc->sc_bus.use_polling++; 646 #if 0 647 OOO 648 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 649 if (sc->sc_control == 0) { 650 /* 651 * Preserve register values, in case that APM BIOS 652 * does not recover them. 653 */ 654 sc->sc_control = ctl; 655 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 656 } 657 ctl |= EHCI_HCFS_SUSPEND; 658 OWRITE4(sc, EHCI_CONTROL, ctl); 659 #endif 660 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 661 sc->sc_bus.use_polling--; 662 break; 663 case PWR_RESUME: 664 sc->sc_bus.use_polling++; 665 #if 0 666 OOO 667 /* Some broken BIOSes do not recover these values */ 668 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 669 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 670 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 671 if (sc->sc_intre) 672 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 673 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 674 if (sc->sc_control) 675 ctl = sc->sc_control; 676 else 677 ctl = OREAD4(sc, EHCI_CONTROL); 678 ctl |= EHCI_HCFS_RESUME; 679 OWRITE4(sc, EHCI_CONTROL, ctl); 680 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 681 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 682 OWRITE4(sc, EHCI_CONTROL, ctl); 683 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 684 sc->sc_control = sc->sc_intre = 0; 685 #endif 686 sc->sc_bus.use_polling--; 687 break; 688 case PWR_SOFTSUSPEND: 689 case PWR_SOFTSTANDBY: 690 case PWR_SOFTRESUME: 691 break; 692 } 693 splx(s); 694 } 695 696 /* 697 * Shut down the controller when the system is going down. 698 */ 699 void 700 ehci_shutdown(void *v) 701 { 702 ehci_softc_t *sc = v; 703 704 DPRINTF(("ehci_shutdown: stopping the HC\n")); 705 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 706 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 707 } 708 709 usbd_status 710 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 711 { 712 struct ehci_softc *sc = (struct ehci_softc *)bus; 713 714 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 715 } 716 717 void 718 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 719 { 720 struct ehci_softc *sc = (struct ehci_softc *)bus; 721 722 usb_freemem(&sc->sc_bus, dma); 723 } 724 725 usbd_xfer_handle 726 ehci_allocx(struct usbd_bus *bus) 727 { 728 struct ehci_softc *sc = (struct ehci_softc *)bus; 729 usbd_xfer_handle xfer; 730 731 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 732 if (xfer != NULL) 733 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 734 else 735 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 736 if (xfer != NULL) 737 memset(xfer, 0, sizeof *xfer); 738 return (xfer); 739 } 740 741 void 742 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 743 { 744 struct ehci_softc *sc = (struct ehci_softc *)bus; 745 746 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 747 } 748 749 Static void 750 ehci_device_clear_toggle(usbd_pipe_handle pipe) 751 { 752 #if 0 753 OOO 754 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 755 756 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 757 #endif 758 } 759 760 Static void 761 ehci_noop(usbd_pipe_handle pipe) 762 { 763 } 764 765 #ifdef EHCI_DEBUG 766 void 767 ehci_dumpregs(ehci_softc_t *sc) 768 { 769 int i; 770 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 771 EOREAD4(sc, EHCI_USBCMD), 772 EOREAD4(sc, EHCI_USBSTS), 773 EOREAD4(sc, EHCI_USBINTR)); 774 for (i = 1; i <= sc->sc_noport; i++) 775 printf("port %d status=0x%08x\n", i, 776 EOREAD4(sc, EHCI_PORTSC(i))); 777 } 778 779 void 780 ehci_dump() 781 { 782 ehci_dumpregs(theehci); 783 } 784 785 void 786 ehci_dump_link(ehci_link_t link) 787 { 788 printf("0x%08x<", link); 789 switch (EHCI_LINK_TYPE(link)) { 790 case EHCI_LINK_ITD: printf("ITD"); break; 791 case EHCI_LINK_QH: printf("QH"); break; 792 case EHCI_LINK_SITD: printf("SITD"); break; 793 case EHCI_LINK_FSTN: printf("FSTN"); break; 794 } 795 if (link & EHCI_LINK_TERMINATE) 796 printf(",T>"); 797 else 798 printf(">"); 799 } 800 801 void 802 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 803 { 804 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 805 ehci_dump_qtd(&sqtd->qtd); 806 } 807 808 void 809 ehci_dump_qtd(ehci_qtd_t *qtd) 810 { 811 u_int32_t s; 812 813 printf(" next="); ehci_dump_link(qtd->qtd_next); 814 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext); 815 printf("\n"); 816 s = qtd->qtd_status; 817 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 818 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 819 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 820 printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s), 821 EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s)); 822 for (s = 0; s < 5; s++) 823 printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]); 824 } 825 826 void 827 ehci_dump_sqh(ehci_soft_qh_t *sqh) 828 { 829 ehci_qh_t *qh = &sqh->qh; 830 831 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 832 printf(" link="); ehci_dump_link(qh->qh_link); printf("\n"); 833 printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub); 834 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n"); 835 printf("Overlay qTD:\n"); 836 ehci_dump_qtd(&qh->qh_qtd); 837 } 838 839 #endif 840 841 usbd_status 842 ehci_open(usbd_pipe_handle pipe) 843 { 844 usbd_device_handle dev = pipe->device; 845 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 846 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 847 u_int8_t addr = dev->address; 848 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 849 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 850 ehci_soft_qh_t *sqh; 851 usbd_status err; 852 #if 0 853 ehci_soft_itd_t *sitd; 854 ehci_physaddr_t tdphys; 855 u_int32_t fmt; 856 int ival; 857 #endif 858 int s; 859 int speed, naks; 860 861 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 862 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 863 864 if (addr == sc->sc_addr) { 865 switch (ed->bEndpointAddress) { 866 case USB_CONTROL_ENDPOINT: 867 pipe->methods = &ehci_root_ctrl_methods; 868 break; 869 case UE_DIR_IN | EHCI_INTR_ENDPT: 870 pipe->methods = &ehci_root_intr_methods; 871 break; 872 default: 873 return (USBD_INVAL); 874 } 875 return (USBD_NORMAL_COMPLETION); 876 } 877 878 switch (dev->speed) { 879 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 880 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 881 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 882 default: panic("ehci_open: bad device speed %d\n", dev->speed); 883 } 884 naks = 8; /* XXX */ 885 sqh = ehci_alloc_sqh(sc); 886 if (sqh == NULL) 887 goto bad0; 888 /* qh_link filled when the QH is added */ 889 sqh->qh.qh_endp = htole32( 890 EHCI_QH_SET_ADDR(addr) | 891 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 892 EHCI_QH_SET_EPS(speed) | /* XXX */ 893 /* XXX EHCI_QH_DTC ? */ 894 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 895 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 896 EHCI_QH_CTL : 0) | 897 EHCI_QH_SET_NRL(naks) 898 ); 899 sqh->qh.qh_endphub = htole32( 900 EHCI_QH_SET_MULT(1) 901 /* XXX TT stuff */ 902 /* XXX interrupt mask */ 903 ); 904 sqh->qh.qh_curqtd = EHCI_NULL; 905 /* Fill the overlay qTD */ 906 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 907 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 908 sqh->qh.qh_qtd.qtd_status = 909 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 910 911 epipe->sqh = sqh; 912 913 switch (xfertype) { 914 case UE_CONTROL: 915 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 916 0, &epipe->u.ctl.reqdma); 917 if (err) 918 goto bad1; 919 pipe->methods = &ehci_device_ctrl_methods; 920 s = splusb(); 921 ehci_add_qh(sqh, sc->sc_async_head); 922 splx(s); 923 break; 924 case UE_BULK: 925 pipe->methods = &ehci_device_bulk_methods; 926 s = splusb(); 927 ehci_add_qh(sqh, sc->sc_async_head); 928 splx(s); 929 break; 930 default: 931 return (USBD_INVAL); 932 } 933 return (USBD_NORMAL_COMPLETION); 934 935 bad1: 936 ehci_free_sqh(sc, sqh); 937 bad0: 938 return (USBD_NOMEM); 939 } 940 941 /* 942 * Add an ED to the schedule. Called at splusb(). 943 */ 944 void 945 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 946 { 947 SPLUSBCHECK; 948 949 sqh->next = head->next; 950 sqh->qh.qh_link = head->qh.qh_link; 951 head->next = sqh; 952 head->qh.qh_link = htole32(sqh->physaddr); 953 954 #ifdef EHCI_DEBUG 955 if (ehcidebug > 0) { 956 printf("ehci_add_qh:\n"); 957 ehci_dump_sqh(sqh); 958 } 959 #endif 960 } 961 962 /* 963 * Remove an ED from the schedule. Called at splusb(). 964 */ 965 void 966 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 967 { 968 ehci_soft_qh_t *p; 969 970 SPLUSBCHECK; 971 /* XXX */ 972 for (p = head; p == NULL && p->next != sqh; p = p->next) 973 ; 974 if (p == NULL) 975 panic("ehci_rem_qh: ED not found\n"); 976 p->next = sqh->next; 977 p->qh.qh_link = sqh->qh.qh_link; 978 979 ehci_sync_hc(sc); 980 } 981 982 /* 983 * Ensure that the HC has released all references to the QH. We do this 984 * by asking for a Async Advance Doorbell interrupt and then we wait for 985 * the interrupt. 986 * To make this easier we first obtain exclusive use of the doorbell. 987 */ 988 void 989 ehci_sync_hc(ehci_softc_t *sc) 990 { 991 int s; 992 993 if (sc->sc_dying) { 994 DPRINTFN(2,("ehci_sync_hc: dying\n")); 995 return; 996 } 997 DPRINTFN(2,("ehci_sync_hc: enter\n")); 998 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 999 s = splhardusb(); 1000 /* ask for doorbell */ 1001 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1002 tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* wait for doorbell */ 1003 splx(s); 1004 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1005 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1006 } 1007 1008 /***********/ 1009 1010 /* 1011 * Data structures and routines to emulate the root hub. 1012 */ 1013 Static usb_device_descriptor_t ehci_devd = { 1014 USB_DEVICE_DESCRIPTOR_SIZE, 1015 UDESC_DEVICE, /* type */ 1016 {0x00, 0x02}, /* USB version */ 1017 UDCLASS_HUB, /* class */ 1018 UDSUBCLASS_HUB, /* subclass */ 1019 UDPROTO_HSHUBSTT, /* protocol */ 1020 64, /* max packet */ 1021 {0},{0},{0x00,0x01}, /* device id */ 1022 1,2,0, /* string indicies */ 1023 1 /* # of configurations */ 1024 }; 1025 1026 Static usb_device_qualifier_t ehci_odevd = { 1027 USB_DEVICE_DESCRIPTOR_SIZE, 1028 UDESC_DEVICE_QUALIFIER, /* type */ 1029 {0x00, 0x02}, /* USB version */ 1030 UDCLASS_HUB, /* class */ 1031 UDSUBCLASS_HUB, /* subclass */ 1032 UDPROTO_FSHUB, /* protocol */ 1033 64, /* max packet */ 1034 1, /* # of configurations */ 1035 0 1036 }; 1037 1038 Static usb_config_descriptor_t ehci_confd = { 1039 USB_CONFIG_DESCRIPTOR_SIZE, 1040 UDESC_CONFIG, 1041 {USB_CONFIG_DESCRIPTOR_SIZE + 1042 USB_INTERFACE_DESCRIPTOR_SIZE + 1043 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1044 1, 1045 1, 1046 0, 1047 UC_SELF_POWERED, 1048 0 /* max power */ 1049 }; 1050 1051 Static usb_interface_descriptor_t ehci_ifcd = { 1052 USB_INTERFACE_DESCRIPTOR_SIZE, 1053 UDESC_INTERFACE, 1054 0, 1055 0, 1056 1, 1057 UICLASS_HUB, 1058 UISUBCLASS_HUB, 1059 UIPROTO_HSHUBSTT, 1060 0 1061 }; 1062 1063 Static usb_endpoint_descriptor_t ehci_endpd = { 1064 USB_ENDPOINT_DESCRIPTOR_SIZE, 1065 UDESC_ENDPOINT, 1066 UE_DIR_IN | EHCI_INTR_ENDPT, 1067 UE_INTERRUPT, 1068 {8, 0}, /* max packet */ 1069 255 1070 }; 1071 1072 Static usb_hub_descriptor_t ehci_hubd = { 1073 USB_HUB_DESCRIPTOR_SIZE, 1074 UDESC_HUB, 1075 0, 1076 {0,0}, 1077 0, 1078 0, 1079 {0}, 1080 }; 1081 1082 Static int 1083 ehci_str(p, l, s) 1084 usb_string_descriptor_t *p; 1085 int l; 1086 char *s; 1087 { 1088 int i; 1089 1090 if (l == 0) 1091 return (0); 1092 p->bLength = 2 * strlen(s) + 2; 1093 if (l == 1) 1094 return (1); 1095 p->bDescriptorType = UDESC_STRING; 1096 l -= 2; 1097 for (i = 0; s[i] && l > 1; i++, l -= 2) 1098 USETW2(p->bString[i], 0, s[i]); 1099 return (2*i+2); 1100 } 1101 1102 /* 1103 * Simulate a hardware hub by handling all the necessary requests. 1104 */ 1105 Static usbd_status 1106 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1107 { 1108 usbd_status err; 1109 1110 /* Insert last in queue. */ 1111 err = usb_insert_transfer(xfer); 1112 if (err) 1113 return (err); 1114 1115 /* Pipe isn't running, start first */ 1116 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1117 } 1118 1119 Static usbd_status 1120 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1121 { 1122 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1123 usb_device_request_t *req; 1124 void *buf = NULL; 1125 int port, i; 1126 int s, len, value, index, l, totlen = 0; 1127 usb_port_status_t ps; 1128 usb_hub_descriptor_t hubd; 1129 usbd_status err; 1130 u_int32_t v; 1131 1132 if (sc->sc_dying) 1133 return (USBD_IOERROR); 1134 1135 #ifdef DIAGNOSTIC 1136 if (!(xfer->rqflags & URQ_REQUEST)) 1137 /* XXX panic */ 1138 return (USBD_INVAL); 1139 #endif 1140 req = &xfer->request; 1141 1142 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1143 req->bmRequestType, req->bRequest)); 1144 1145 len = UGETW(req->wLength); 1146 value = UGETW(req->wValue); 1147 index = UGETW(req->wIndex); 1148 1149 if (len != 0) 1150 buf = KERNADDR(&xfer->dmabuf); 1151 1152 #define C(x,y) ((x) | ((y) << 8)) 1153 switch(C(req->bRequest, req->bmRequestType)) { 1154 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1155 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1156 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1157 /* 1158 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1159 * for the integrated root hub. 1160 */ 1161 break; 1162 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1163 if (len > 0) { 1164 *(u_int8_t *)buf = sc->sc_conf; 1165 totlen = 1; 1166 } 1167 break; 1168 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1169 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1170 switch(value >> 8) { 1171 case UDESC_DEVICE: 1172 if ((value & 0xff) != 0) { 1173 err = USBD_IOERROR; 1174 goto ret; 1175 } 1176 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1177 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1178 memcpy(buf, &ehci_devd, l); 1179 break; 1180 /* 1181 * We can't really operate at another speed, but the spec says 1182 * we need this descriptor. 1183 */ 1184 case UDESC_DEVICE_QUALIFIER: 1185 if ((value & 0xff) != 0) { 1186 err = USBD_IOERROR; 1187 goto ret; 1188 } 1189 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1190 memcpy(buf, &ehci_odevd, l); 1191 break; 1192 /* 1193 * We can't really operate at another speed, but the spec says 1194 * we need this descriptor. 1195 */ 1196 case UDESC_OTHER_SPEED_CONFIGURATION: 1197 case UDESC_CONFIG: 1198 if ((value & 0xff) != 0) { 1199 err = USBD_IOERROR; 1200 goto ret; 1201 } 1202 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1203 memcpy(buf, &ehci_confd, l); 1204 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1205 value >> 8; 1206 buf = (char *)buf + l; 1207 len -= l; 1208 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1209 totlen += l; 1210 memcpy(buf, &ehci_ifcd, l); 1211 buf = (char *)buf + l; 1212 len -= l; 1213 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1214 totlen += l; 1215 memcpy(buf, &ehci_endpd, l); 1216 break; 1217 case UDESC_STRING: 1218 if (len == 0) 1219 break; 1220 *(u_int8_t *)buf = 0; 1221 totlen = 1; 1222 switch (value & 0xff) { 1223 case 1: /* Vendor */ 1224 totlen = ehci_str(buf, len, sc->sc_vendor); 1225 break; 1226 case 2: /* Product */ 1227 totlen = ehci_str(buf, len, "EHCI root hub"); 1228 break; 1229 } 1230 break; 1231 default: 1232 err = USBD_IOERROR; 1233 goto ret; 1234 } 1235 break; 1236 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1237 if (len > 0) { 1238 *(u_int8_t *)buf = 0; 1239 totlen = 1; 1240 } 1241 break; 1242 case C(UR_GET_STATUS, UT_READ_DEVICE): 1243 if (len > 1) { 1244 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1245 totlen = 2; 1246 } 1247 break; 1248 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1249 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1250 if (len > 1) { 1251 USETW(((usb_status_t *)buf)->wStatus, 0); 1252 totlen = 2; 1253 } 1254 break; 1255 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1256 if (value >= USB_MAX_DEVICES) { 1257 err = USBD_IOERROR; 1258 goto ret; 1259 } 1260 sc->sc_addr = value; 1261 break; 1262 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1263 if (value != 0 && value != 1) { 1264 err = USBD_IOERROR; 1265 goto ret; 1266 } 1267 sc->sc_conf = value; 1268 break; 1269 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1270 break; 1271 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1272 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1273 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1274 err = USBD_IOERROR; 1275 goto ret; 1276 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1277 break; 1278 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1279 break; 1280 /* Hub requests */ 1281 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1282 break; 1283 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1284 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1285 "port=%d feature=%d\n", 1286 index, value)); 1287 if (index < 1 || index > sc->sc_noport) { 1288 err = USBD_IOERROR; 1289 goto ret; 1290 } 1291 port = EHCI_PORTSC(index); 1292 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1293 switch(value) { 1294 case UHF_PORT_ENABLE: 1295 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1296 break; 1297 case UHF_PORT_SUSPEND: 1298 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1299 break; 1300 case UHF_PORT_POWER: 1301 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1302 break; 1303 case UHF_PORT_TEST: 1304 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1305 "%d\n", index)); 1306 break; 1307 case UHF_PORT_INDICATOR: 1308 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1309 "%d\n", index)); 1310 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1311 break; 1312 case UHF_C_PORT_CONNECTION: 1313 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1314 break; 1315 case UHF_C_PORT_ENABLE: 1316 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1317 break; 1318 case UHF_C_PORT_SUSPEND: 1319 /* how? */ 1320 break; 1321 case UHF_C_PORT_OVER_CURRENT: 1322 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1323 break; 1324 case UHF_C_PORT_RESET: 1325 sc->sc_isreset = 0; 1326 break; 1327 default: 1328 err = USBD_IOERROR; 1329 goto ret; 1330 } 1331 #if 0 1332 switch(value) { 1333 case UHF_C_PORT_CONNECTION: 1334 case UHF_C_PORT_ENABLE: 1335 case UHF_C_PORT_SUSPEND: 1336 case UHF_C_PORT_OVER_CURRENT: 1337 case UHF_C_PORT_RESET: 1338 /* Enable RHSC interrupt if condition is cleared. */ 1339 if ((OREAD4(sc, port) >> 16) == 0) 1340 ehci_pcd_able(sc, 1); 1341 break; 1342 default: 1343 break; 1344 } 1345 #endif 1346 break; 1347 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1348 if (value != 0) { 1349 err = USBD_IOERROR; 1350 goto ret; 1351 } 1352 hubd = ehci_hubd; 1353 hubd.bNbrPorts = sc->sc_noport; 1354 v = EOREAD4(sc, EHCI_HCSPARAMS); 1355 USETW(hubd.wHubCharacteristics, 1356 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1357 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1358 ? UHD_PORT_IND : 0); 1359 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1360 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1361 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1362 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1363 l = min(len, hubd.bDescLength); 1364 totlen = l; 1365 memcpy(buf, &hubd, l); 1366 break; 1367 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1368 if (len != 4) { 1369 err = USBD_IOERROR; 1370 goto ret; 1371 } 1372 memset(buf, 0, len); /* ? XXX */ 1373 totlen = len; 1374 break; 1375 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1376 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1377 index)); 1378 if (index < 1 || index > sc->sc_noport) { 1379 err = USBD_IOERROR; 1380 goto ret; 1381 } 1382 if (len != 4) { 1383 err = USBD_IOERROR; 1384 goto ret; 1385 } 1386 v = EOREAD4(sc, EHCI_PORTSC(index)); 1387 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1388 v)); 1389 i = UPS_HIGH_SPEED; 1390 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1391 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1392 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1393 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1394 if (v & EHCI_PS_PR) i |= UPS_RESET; 1395 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1396 USETW(ps.wPortStatus, i); 1397 i = 0; 1398 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1399 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1400 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1401 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1402 USETW(ps.wPortChange, i); 1403 l = min(len, sizeof ps); 1404 memcpy(buf, &ps, l); 1405 totlen = l; 1406 break; 1407 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1408 err = USBD_IOERROR; 1409 goto ret; 1410 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1411 break; 1412 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1413 if (index < 1 || index > sc->sc_noport) { 1414 err = USBD_IOERROR; 1415 goto ret; 1416 } 1417 port = EHCI_PORTSC(index); 1418 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1419 switch(value) { 1420 case UHF_PORT_ENABLE: 1421 EOWRITE4(sc, port, v | EHCI_PS_PE); 1422 break; 1423 case UHF_PORT_SUSPEND: 1424 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1425 break; 1426 case UHF_PORT_RESET: 1427 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1428 index)); 1429 if (EHCI_PS_IS_LOWSPEED(v)) { 1430 /* Low speed device, give up ownership. */ 1431 ehci_disown(sc, index, 1); 1432 break; 1433 } 1434 /* Start reset sequence. */ 1435 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1436 EOWRITE4(sc, port, v | EHCI_PS_PR); 1437 /* Wait for reset to complete. */ 1438 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1439 /* Terminate reset sequence. */ 1440 EOWRITE4(sc, port, v); 1441 /* Wait for HC to complete reset. */ 1442 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1443 v = EOREAD4(sc, port); 1444 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1445 if (v & EHCI_PS_PR) { 1446 printf("%s: port reset timeout\n", 1447 USBDEVNAME(sc->sc_bus.bdev)); 1448 return (USBD_TIMEOUT); 1449 } 1450 if (!(v & EHCI_PS_PE)) { 1451 /* Not a high speed device, give up ownership.*/ 1452 ehci_disown(sc, index, 0); 1453 break; 1454 } 1455 sc->sc_isreset = 1; 1456 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1457 index, v)); 1458 break; 1459 case UHF_PORT_POWER: 1460 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1461 "%d\n", index)); 1462 EOWRITE4(sc, port, v | EHCI_PS_PP); 1463 break; 1464 case UHF_PORT_TEST: 1465 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1466 "%d\n", index)); 1467 break; 1468 case UHF_PORT_INDICATOR: 1469 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1470 "%d\n", index)); 1471 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1472 break; 1473 default: 1474 err = USBD_IOERROR; 1475 goto ret; 1476 } 1477 break; 1478 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1479 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1480 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1481 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1482 break; 1483 default: 1484 err = USBD_IOERROR; 1485 goto ret; 1486 } 1487 xfer->actlen = totlen; 1488 err = USBD_NORMAL_COMPLETION; 1489 ret: 1490 xfer->status = err; 1491 s = splusb(); 1492 usb_transfer_complete(xfer); 1493 splx(s); 1494 return (USBD_IN_PROGRESS); 1495 } 1496 1497 void 1498 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1499 { 1500 int i, port; 1501 u_int32_t v; 1502 1503 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1504 #ifdef DIAGNOSTIC 1505 if (sc->sc_npcomp != 0) { 1506 i = (index-1) / sc->sc_npcomp; 1507 if (i >= sc->sc_ncomp) 1508 printf("%s: strange port\n", 1509 USBDEVNAME(sc->sc_bus.bdev)); 1510 else 1511 printf("%s: handing over %s speed device on " 1512 "port %d to %s\n", 1513 USBDEVNAME(sc->sc_bus.bdev), 1514 lowspeed ? "low" : "full", 1515 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1516 } else { 1517 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1518 } 1519 #endif 1520 port = EHCI_PORTSC(index); 1521 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1522 EOWRITE4(sc, port, v | EHCI_PS_PO); 1523 } 1524 1525 /* Abort a root control request. */ 1526 Static void 1527 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1528 { 1529 /* Nothing to do, all transfers are synchronous. */ 1530 } 1531 1532 /* Close the root pipe. */ 1533 Static void 1534 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1535 { 1536 DPRINTF(("ehci_root_ctrl_close\n")); 1537 /* Nothing to do. */ 1538 } 1539 1540 void 1541 ehci_root_intr_done(usbd_xfer_handle xfer) 1542 { 1543 xfer->hcpriv = NULL; 1544 } 1545 1546 Static usbd_status 1547 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1548 { 1549 usbd_status err; 1550 1551 /* Insert last in queue. */ 1552 err = usb_insert_transfer(xfer); 1553 if (err) 1554 return (err); 1555 1556 /* Pipe isn't running, start first */ 1557 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1558 } 1559 1560 Static usbd_status 1561 ehci_root_intr_start(usbd_xfer_handle xfer) 1562 { 1563 usbd_pipe_handle pipe = xfer->pipe; 1564 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1565 1566 if (sc->sc_dying) 1567 return (USBD_IOERROR); 1568 1569 sc->sc_intrxfer = xfer; 1570 1571 return (USBD_IN_PROGRESS); 1572 } 1573 1574 /* Abort a root interrupt request. */ 1575 Static void 1576 ehci_root_intr_abort(usbd_xfer_handle xfer) 1577 { 1578 int s; 1579 1580 if (xfer->pipe->intrxfer == xfer) { 1581 DPRINTF(("ehci_root_intr_abort: remove\n")); 1582 xfer->pipe->intrxfer = NULL; 1583 } 1584 xfer->status = USBD_CANCELLED; 1585 s = splusb(); 1586 usb_transfer_complete(xfer); 1587 splx(s); 1588 } 1589 1590 /* Close the root pipe. */ 1591 Static void 1592 ehci_root_intr_close(usbd_pipe_handle pipe) 1593 { 1594 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1595 1596 DPRINTF(("ehci_root_intr_close\n")); 1597 1598 sc->sc_intrxfer = NULL; 1599 } 1600 1601 void 1602 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1603 { 1604 xfer->hcpriv = NULL; 1605 } 1606 1607 /************************/ 1608 1609 ehci_soft_qh_t * 1610 ehci_alloc_sqh(ehci_softc_t *sc) 1611 { 1612 ehci_soft_qh_t *sqh; 1613 usbd_status err; 1614 int i, offs; 1615 usb_dma_t dma; 1616 1617 if (sc->sc_freeqhs == NULL) { 1618 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1619 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1620 EHCI_PAGE_SIZE, &dma); 1621 if (err) 1622 return (NULL); 1623 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1624 offs = i * EHCI_SQH_SIZE; 1625 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1626 sqh->physaddr = DMAADDR(&dma) + offs; 1627 sqh->next = sc->sc_freeqhs; 1628 sc->sc_freeqhs = sqh; 1629 } 1630 } 1631 sqh = sc->sc_freeqhs; 1632 sc->sc_freeqhs = sqh->next; 1633 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1634 sqh->next = NULL; 1635 return (sqh); 1636 } 1637 1638 void 1639 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1640 { 1641 sqh->next = sc->sc_freeqhs; 1642 sc->sc_freeqhs = sqh; 1643 } 1644 1645 ehci_soft_qtd_t * 1646 ehci_alloc_sqtd(ehci_softc_t *sc) 1647 { 1648 ehci_soft_qtd_t *sqtd; 1649 usbd_status err; 1650 int i, offs; 1651 usb_dma_t dma; 1652 int s; 1653 1654 if (sc->sc_freeqtds == NULL) { 1655 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1656 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1657 EHCI_PAGE_SIZE, &dma); 1658 if (err) 1659 return (NULL); 1660 s = splusb(); 1661 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1662 offs = i * EHCI_SQTD_SIZE; 1663 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1664 sqtd->physaddr = DMAADDR(&dma) + offs; 1665 sqtd->nextqtd = sc->sc_freeqtds; 1666 sc->sc_freeqtds = sqtd; 1667 } 1668 splx(s); 1669 } 1670 1671 s = splusb(); 1672 sqtd = sc->sc_freeqtds; 1673 sc->sc_freeqtds = sqtd->nextqtd; 1674 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1675 sqtd->nextqtd = NULL; 1676 sqtd->xfer = NULL; 1677 splx(s); 1678 1679 return (sqtd); 1680 } 1681 1682 void 1683 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1684 { 1685 int s; 1686 1687 s = splusb(); 1688 sqtd->nextqtd = sc->sc_freeqtds; 1689 sc->sc_freeqtds = sqtd; 1690 splx(s); 1691 } 1692 1693 /* 1694 * Close a reqular pipe. 1695 * Assumes that there are no pending transactions. 1696 */ 1697 void 1698 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 1699 { 1700 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1701 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1702 ehci_soft_qh_t *sqh = epipe->sqh; 1703 int s; 1704 1705 s = splusb(); 1706 ehci_rem_qh(sc, sqh, head); 1707 splx(s); 1708 ehci_free_sqh(sc, epipe->sqh); 1709 } 1710 1711 /* 1712 * Abort a device request. 1713 * If this routine is called at splusb() it guarantees that the request 1714 * will be removed from the hardware scheduling and that the callback 1715 * for it will be called with USBD_CANCELLED status. 1716 * It's impossible to guarantee that the requested transfer will not 1717 * have happened since the hardware runs concurrently. 1718 * If the transaction has already happened we rely on the ordinary 1719 * interrupt processing to process it. 1720 */ 1721 void 1722 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1723 { 1724 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 1725 ehci_soft_qh_t *sqh = epipe->sqh; 1726 #if 0 1727 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 1728 ehci_soft_td_t *p, *n; 1729 ehci_physaddr_t headp; 1730 int hit; 1731 #endif 1732 int s; 1733 1734 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 1735 1736 if (xfer->device->bus->intr_context || !curproc) 1737 panic("ehci_abort_xfer: not in process context\n"); 1738 1739 /* 1740 * Step 1: Make interrupt routine and hardware ignore xfer. 1741 */ 1742 s = splusb(); 1743 xfer->status = status; /* make software ignore it */ 1744 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1745 splx(s); 1746 /* XXX */ 1747 1748 /* 1749 * Step 2: Wait until we know hardware has finished any possible 1750 * use of the xfer. Also make sure the soft interrupt routine 1751 * has run. 1752 */ 1753 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 1754 /* XXX should have some communication with softintr() to know 1755 when it's done */ 1756 usb_delay_ms(epipe->pipe.device->bus, 250); 1757 1758 /* 1759 * Step 3: Remove any vestiges of the xfer from the hardware. 1760 * The complication here is that the hardware may have executed 1761 * beyond the xfer we're trying to abort. So as we're scanning 1762 * the TDs of this xfer we check if the hardware points to 1763 * any of them. 1764 */ 1765 s = splusb(); /* XXX why? */ 1766 /* XXX */ 1767 1768 /* 1769 * Step 4: Turn on hardware again. 1770 */ 1771 /* XXX */ 1772 1773 /* 1774 * Step 5: Execute callback. 1775 */ 1776 usb_transfer_complete(xfer); 1777 1778 splx(s); 1779 } 1780 1781 /************************/ 1782 1783 Static usbd_status 1784 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 1785 { 1786 usbd_status err; 1787 1788 return USBD_IOERROR; 1789 1790 /* Insert last in queue. */ 1791 err = usb_insert_transfer(xfer); 1792 if (err) 1793 return (err); 1794 1795 /* Pipe isn't running, start first */ 1796 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1797 } 1798 1799 Static usbd_status 1800 ehci_device_ctrl_start(usbd_xfer_handle xfer) 1801 { 1802 /* Not implemented */ 1803 return USBD_IOERROR; 1804 } 1805 1806 void 1807 ehci_device_ctrl_done(usbd_xfer_handle xfer) 1808 { 1809 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 1810 1811 #ifdef DIAGNOSTIC 1812 if (!(xfer->rqflags & URQ_REQUEST)) { 1813 panic("ehci_ctrl_done: not a request\n"); 1814 } 1815 #endif 1816 xfer->hcpriv = NULL; 1817 } 1818 1819 /* Abort a device control request. */ 1820 Static void 1821 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 1822 { 1823 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 1824 ehci_abort_xfer(xfer, USBD_CANCELLED); 1825 } 1826 1827 /* Close a device control pipe. */ 1828 Static void 1829 ehci_device_ctrl_close(usbd_pipe_handle pipe) 1830 { 1831 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1832 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 1833 1834 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 1835 ehci_close_pipe(pipe, sc->sc_async_head); 1836 /*ehci_free_std(sc, epipe->tail.td);*/ 1837 } 1838 1839 /************************/ 1840 1841 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1842 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1843 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 1844 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 1845 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 1846 1847 /************************/ 1848 1849 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1850 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1851 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 1852 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 1853 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 1854 1855 /************************/ 1856 1857 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1858 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 1859 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 1860 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 1861 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 1862
Indexes created Mon Sep 22 13:09:51 GMT 2025