ehci.c revision 1.15
1 /* TODO 2 Add intrinfo. 3 */ 4 /* $NetBSD: ehci.c,v 1.15 2001/11/21 02:44:30 augustss Exp $ */ 5 6 /* 7 * Copyright (c) 2001 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by Lennart Augustsson (lennart (at) augustsson.net). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 44 * 45 * The EHCI 0.96 spec can be found at 46 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 47 * and the USB 2.0 spec at 48 * http://www.usb.org/developers/data/usb_20.zip 49 * 50 */ 51 52 #include <sys/cdefs.h> 53 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.15 2001/11/21 02:44:30 augustss Exp $"); 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/kernel.h> 58 #include <sys/malloc.h> 59 #include <sys/device.h> 60 #include <sys/select.h> 61 #include <sys/proc.h> 62 #include <sys/queue.h> 63 64 #include <machine/bus.h> 65 #include <machine/endian.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 #include <dev/usb/usbdivar.h> 70 #include <dev/usb/usb_mem.h> 71 #include <dev/usb/usb_quirks.h> 72 73 #include <dev/usb/ehcireg.h> 74 #include <dev/usb/ehcivar.h> 75 76 #ifdef EHCI_DEBUG 77 #define DPRINTF(x) if (ehcidebug) printf x 78 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 79 int ehcidebug = 0; 80 #ifndef __NetBSD__ 81 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 82 #endif 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n,x) 86 #endif 87 88 struct ehci_pipe { 89 struct usbd_pipe pipe; 90 ehci_soft_qh_t *sqh; 91 union { 92 ehci_soft_qtd_t *qtd; 93 /* ehci_soft_itd_t *itd; */ 94 } tail; 95 union { 96 /* Control pipe */ 97 struct { 98 usb_dma_t reqdma; 99 u_int length; 100 ehci_soft_qtd_t *setup, *data, *stat; 101 } ctl; 102 /* Interrupt pipe */ 103 /* XXX */ 104 /* Bulk pipe */ 105 struct { 106 u_int length; 107 int isread; 108 } bulk; 109 /* Iso pipe */ 110 /* XXX */ 111 } u; 112 }; 113 114 Static void ehci_shutdown(void *); 115 Static void ehci_power(int, void *); 116 117 Static usbd_status ehci_open(usbd_pipe_handle); 118 Static void ehci_poll(struct usbd_bus *); 119 Static void ehci_softintr(void *); 120 Static int ehci_intr1(ehci_softc_t *); 121 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 122 Static void ehci_timeout(void *); 123 Static void ehci_timeout_task(void *); 124 125 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 126 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 127 128 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 129 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 130 131 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 132 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 133 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 134 Static void ehci_root_ctrl_close(usbd_pipe_handle); 135 Static void ehci_root_ctrl_done(usbd_xfer_handle); 136 137 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 138 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 139 Static void ehci_root_intr_abort(usbd_xfer_handle); 140 Static void ehci_root_intr_close(usbd_pipe_handle); 141 Static void ehci_root_intr_done(usbd_xfer_handle); 142 143 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 144 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 145 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 146 Static void ehci_device_ctrl_close(usbd_pipe_handle); 147 Static void ehci_device_ctrl_done(usbd_xfer_handle); 148 149 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 151 Static void ehci_device_bulk_abort(usbd_xfer_handle); 152 Static void ehci_device_bulk_close(usbd_pipe_handle); 153 Static void ehci_device_bulk_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 157 Static void ehci_device_intr_abort(usbd_xfer_handle); 158 Static void ehci_device_intr_close(usbd_pipe_handle); 159 Static void ehci_device_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 163 Static void ehci_device_isoc_abort(usbd_xfer_handle); 164 Static void ehci_device_isoc_close(usbd_pipe_handle); 165 Static void ehci_device_isoc_done(usbd_xfer_handle); 166 167 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 168 Static void ehci_noop(usbd_pipe_handle pipe); 169 170 Static int ehci_str(usb_string_descriptor_t *, int, char *); 171 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 172 Static void ehci_pcd_able(ehci_softc_t *, int); 173 Static void ehci_pcd_enable(void *); 174 Static void ehci_disown(ehci_softc_t *, int, int); 175 176 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 177 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 178 179 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 180 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 181 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *, 182 ehci_softc_t *, int, int, usbd_xfer_handle, 183 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 184 185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 186 187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 189 ehci_soft_qh_t *); 190 Static void ehci_sync_hc(ehci_softc_t *); 191 192 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 193 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 194 195 #ifdef EHCI_DEBUG 196 Static void ehci_dumpregs(ehci_softc_t *); 197 Static void ehci_dump(void); 198 Static ehci_softc_t *theehci; 199 Static void ehci_dump_link(ehci_link_t, int); 200 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 201 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 202 Static void ehci_dump_qtd(ehci_qtd_t *); 203 Static void ehci_dump_sqh(ehci_soft_qh_t *); 204 #endif 205 206 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 207 208 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 209 210 #define EHCI_INTR_ENDPT 1 211 212 Static struct usbd_bus_methods ehci_bus_methods = { 213 ehci_open, 214 ehci_softintr, 215 ehci_poll, 216 ehci_allocm, 217 ehci_freem, 218 ehci_allocx, 219 ehci_freex, 220 }; 221 222 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 223 ehci_root_ctrl_transfer, 224 ehci_root_ctrl_start, 225 ehci_root_ctrl_abort, 226 ehci_root_ctrl_close, 227 ehci_noop, 228 ehci_root_ctrl_done, 229 }; 230 231 Static struct usbd_pipe_methods ehci_root_intr_methods = { 232 ehci_root_intr_transfer, 233 ehci_root_intr_start, 234 ehci_root_intr_abort, 235 ehci_root_intr_close, 236 ehci_noop, 237 ehci_root_intr_done, 238 }; 239 240 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 241 ehci_device_ctrl_transfer, 242 ehci_device_ctrl_start, 243 ehci_device_ctrl_abort, 244 ehci_device_ctrl_close, 245 ehci_noop, 246 ehci_device_ctrl_done, 247 }; 248 249 Static struct usbd_pipe_methods ehci_device_intr_methods = { 250 ehci_device_intr_transfer, 251 ehci_device_intr_start, 252 ehci_device_intr_abort, 253 ehci_device_intr_close, 254 ehci_device_clear_toggle, 255 ehci_device_intr_done, 256 }; 257 258 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 259 ehci_device_bulk_transfer, 260 ehci_device_bulk_start, 261 ehci_device_bulk_abort, 262 ehci_device_bulk_close, 263 ehci_device_clear_toggle, 264 ehci_device_bulk_done, 265 }; 266 267 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 268 ehci_device_isoc_transfer, 269 ehci_device_isoc_start, 270 ehci_device_isoc_abort, 271 ehci_device_isoc_close, 272 ehci_noop, 273 ehci_device_isoc_done, 274 }; 275 276 int ehcidisable = 0; 277 278 usbd_status 279 ehci_init(ehci_softc_t *sc) 280 { 281 u_int32_t version, sparams, cparams, hcr; 282 u_int i; 283 usbd_status err; 284 ehci_soft_qh_t *sqh; 285 286 if (ehcidisable) 287 return (USBD_INVAL); 288 289 DPRINTF(("ehci_init: start\n")); 290 #ifdef EHCI_DEBUG 291 theehci = sc; 292 #endif 293 294 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 295 296 version = EREAD2(sc, EHCI_HCIVERSION); 297 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 298 version >> 8, version & 0xff); 299 300 sparams = EREAD4(sc, EHCI_HCSPARAMS); 301 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 302 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 303 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 304 printf("%s: wrong number of companions (%d != %d)\n", 305 USBDEVNAME(sc->sc_bus.bdev), 306 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 307 return (USBD_IOERROR); 308 } 309 if (sc->sc_ncomp > 0) { 310 printf("%s: companion controller%s, %d port%s each:", 311 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 312 EHCI_HCS_N_PCC(sparams), 313 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 314 for (i = 0; i < sc->sc_ncomp; i++) 315 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 316 printf("\n"); 317 } 318 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 319 cparams = EREAD4(sc, EHCI_HCCPARAMS); 320 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 321 322 sc->sc_bus.usbrev = USBREV_2_0; 323 324 /* Reset the controller */ 325 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 326 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 327 usb_delay_ms(&sc->sc_bus, 1); 328 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 329 for (i = 0; i < 100; i++) { 330 delay(10); 331 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 332 if (!hcr) 333 break; 334 } 335 if (hcr) { 336 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 337 return (USBD_IOERROR); 338 } 339 340 /* frame list size at default, read back what we got and use that */ 341 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 342 case 0: sc->sc_flsize = 1024*4; break; 343 case 1: sc->sc_flsize = 512*4; break; 344 case 2: sc->sc_flsize = 256*4; break; 345 case 3: return (USBD_IOERROR); 346 } 347 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 348 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 349 if (err) 350 return (err); 351 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 352 353 /* Set up the bus struct. */ 354 sc->sc_bus.methods = &ehci_bus_methods; 355 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 356 357 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 358 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 359 360 sc->sc_eintrs = EHCI_NORMAL_INTRS; 361 362 /* Allocate dummy QH that starts the async list. */ 363 sqh = ehci_alloc_sqh(sc); 364 if (sqh == NULL) { 365 err = USBD_NOMEM; 366 goto bad1; 367 } 368 /* Fill the QH */ 369 sqh->qh.qh_endp = 370 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 371 sqh->qh.qh_link = 372 htole32(sqh->physaddr | EHCI_LINK_QH); 373 sqh->qh.qh_curqtd = EHCI_NULL; 374 sqh->next = NULL; 375 /* Fill the overlay qTD */ 376 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 377 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 378 sqh->qh.qh_qtd.qtd_status = 379 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 380 sqh->sqtd = NULL; 381 #ifdef EHCI_DEBUG 382 if (ehcidebug) { 383 ehci_dump_sqh(sc->sc_async_head); 384 } 385 #endif 386 387 /* Point to async list */ 388 sc->sc_async_head = sqh; 389 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 390 391 usb_callout_init(sc->sc_tmo_pcd); 392 393 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 394 395 /* Enable interrupts */ 396 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 397 398 /* Turn on controller */ 399 EOWRITE4(sc, EHCI_USBCMD, 400 EHCI_CMD_ITC_8 | /* 8 microframes */ 401 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 402 EHCI_CMD_ASE | 403 /* EHCI_CMD_PSE | */ 404 EHCI_CMD_RS); 405 406 /* Take over port ownership */ 407 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 408 409 for (i = 0; i < 100; i++) { 410 delay(10); 411 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 412 if (!hcr) 413 break; 414 } 415 if (hcr) { 416 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 417 return (USBD_IOERROR); 418 } 419 420 return (USBD_NORMAL_COMPLETION); 421 422 #if 0 423 bad2: 424 ehci_free_sqh(sc, sc->sc_async_head); 425 #endif 426 bad1: 427 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 428 return (err); 429 } 430 431 int 432 ehci_intr(void *v) 433 { 434 ehci_softc_t *sc = v; 435 436 if (sc == NULL || sc->sc_dying || ehcidisable) 437 return (0); 438 439 /* If we get an interrupt while polling, then just ignore it. */ 440 if (sc->sc_bus.use_polling) { 441 #ifdef DIAGNOSTIC 442 printf("ehci_intr: ignored interrupt while polling\n"); 443 #endif 444 return (0); 445 } 446 447 return (ehci_intr1(sc)); 448 } 449 450 Static int 451 ehci_intr1(ehci_softc_t *sc) 452 { 453 u_int32_t intrs, eintrs; 454 455 DPRINTFN(20,("ehci_intr1: enter\n")); 456 457 /* In case the interrupt occurs before initialization has completed. */ 458 if (sc == NULL) { 459 #ifdef DIAGNOSTIC 460 printf("ehci_intr: sc == NULL\n"); 461 #endif 462 return (0); 463 } 464 465 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 466 467 if (!intrs) 468 return (0); 469 470 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 471 eintrs = intrs & sc->sc_eintrs; 472 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 473 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 474 (u_int)eintrs)); 475 if (!eintrs) 476 return (0); 477 478 sc->sc_bus.intr_context++; 479 sc->sc_bus.no_intrs++; 480 if (eintrs & EHCI_STS_IAA) { 481 DPRINTF(("ehci_intr1: door bell\n")); 482 wakeup(&sc->sc_async_head); 483 eintrs &= ~EHCI_STS_INT; 484 } 485 if (eintrs & EHCI_STS_INT) { 486 DPRINTF(("ehci_intr1: something is done\n")); 487 eintrs &= ~EHCI_STS_INT; 488 } 489 if (eintrs & EHCI_STS_ERRINT) { 490 DPRINTF(("ehci_intr1: some error\n")); 491 eintrs &= ~EHCI_STS_HSE; 492 } 493 if (eintrs & EHCI_STS_HSE) { 494 printf("%s: unrecoverable error, controller halted\n", 495 USBDEVNAME(sc->sc_bus.bdev)); 496 /* XXX what else */ 497 } 498 if (eintrs & EHCI_STS_PCD) { 499 ehci_pcd(sc, sc->sc_intrxfer); 500 /* 501 * Disable PCD interrupt for now, because it will be 502 * on until the port has been reset. 503 */ 504 ehci_pcd_able(sc, 0); 505 /* Do not allow RHSC interrupts > 1 per second */ 506 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 507 eintrs &= ~EHCI_STS_PCD; 508 } 509 510 sc->sc_bus.intr_context--; 511 512 if (eintrs != 0) { 513 /* Block unprocessed interrupts. */ 514 sc->sc_eintrs &= ~eintrs; 515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 516 printf("%s: blocking intrs 0x%x\n", 517 USBDEVNAME(sc->sc_bus.bdev), eintrs); 518 } 519 520 return (1); 521 } 522 523 void 524 ehci_pcd_able(ehci_softc_t *sc, int on) 525 { 526 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 527 if (on) 528 sc->sc_eintrs |= EHCI_STS_PCD; 529 else 530 sc->sc_eintrs &= ~EHCI_STS_PCD; 531 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 532 } 533 534 void 535 ehci_pcd_enable(void *v_sc) 536 { 537 ehci_softc_t *sc = v_sc; 538 539 ehci_pcd_able(sc, 1); 540 } 541 542 void 543 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 544 { 545 usbd_pipe_handle pipe; 546 struct ehci_pipe *epipe; 547 u_char *p; 548 int i, m; 549 550 if (xfer == NULL) { 551 /* Just ignore the change. */ 552 return; 553 } 554 555 pipe = xfer->pipe; 556 epipe = (struct ehci_pipe *)pipe; 557 558 p = KERNADDR(&xfer->dmabuf); 559 m = min(sc->sc_noport, xfer->length * 8 - 1); 560 memset(p, 0, xfer->length); 561 for (i = 1; i <= m; i++) { 562 /* Pick out CHANGE bits from the status reg. */ 563 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 564 p[i/8] |= 1 << (i%8); 565 } 566 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 567 xfer->actlen = xfer->length; 568 xfer->status = USBD_NORMAL_COMPLETION; 569 570 usb_transfer_complete(xfer); 571 } 572 573 void 574 ehci_softintr(void *v) 575 { 576 //ehci_softc_t *sc = v; 577 } 578 579 /* 580 * Wait here until controller claims to have an interrupt. 581 * Then call ohci_intr and return. Use timeout to avoid waiting 582 * too long. 583 */ 584 void 585 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 586 { 587 int timo = xfer->timeout; 588 int usecs; 589 u_int32_t intrs; 590 591 xfer->status = USBD_IN_PROGRESS; 592 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 593 usb_delay_ms(&sc->sc_bus, 1); 594 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 595 sc->sc_eintrs; 596 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 597 #ifdef OHCI_DEBUG 598 if (ehcidebug > 15) 599 ehci_dumpregs(sc); 600 #endif 601 if (intrs) { 602 ehci_intr1(sc); 603 if (xfer->status != USBD_IN_PROGRESS) 604 return; 605 } 606 } 607 608 /* Timeout */ 609 DPRINTF(("ehci_waitintr: timeout\n")); 610 xfer->status = USBD_TIMEOUT; 611 usb_transfer_complete(xfer); 612 /* XXX should free TD */ 613 } 614 615 void 616 ehci_poll(struct usbd_bus *bus) 617 { 618 ehci_softc_t *sc = (ehci_softc_t *)bus; 619 #ifdef EHCI_DEBUG 620 static int last; 621 int new; 622 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 623 if (new != last) { 624 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 625 last = new; 626 } 627 #endif 628 629 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 630 ehci_intr1(sc); 631 } 632 633 int 634 ehci_detach(struct ehci_softc *sc, int flags) 635 { 636 int rv = 0; 637 638 if (sc->sc_child != NULL) 639 rv = config_detach(sc->sc_child, flags); 640 641 if (rv != 0) 642 return (rv); 643 644 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 645 646 if (sc->sc_powerhook != NULL) 647 powerhook_disestablish(sc->sc_powerhook); 648 if (sc->sc_shutdownhook != NULL) 649 shutdownhook_disestablish(sc->sc_shutdownhook); 650 651 usb_delay_ms(&sc->sc_bus, 1000); /* XXX let stray task complete */ 652 653 /* XXX free other data structures XXX */ 654 655 return (rv); 656 } 657 658 659 int 660 ehci_activate(device_ptr_t self, enum devact act) 661 { 662 struct ehci_softc *sc = (struct ehci_softc *)self; 663 int rv = 0; 664 665 switch (act) { 666 case DVACT_ACTIVATE: 667 return (EOPNOTSUPP); 668 break; 669 670 case DVACT_DEACTIVATE: 671 if (sc->sc_child != NULL) 672 rv = config_deactivate(sc->sc_child); 673 sc->sc_dying = 1; 674 break; 675 } 676 return (rv); 677 } 678 679 /* 680 * Handle suspend/resume. 681 * 682 * We need to switch to polling mode here, because this routine is 683 * called from an intterupt context. This is all right since we 684 * are almost suspended anyway. 685 */ 686 void 687 ehci_power(int why, void *v) 688 { 689 ehci_softc_t *sc = v; 690 //u_int32_t ctl; 691 int s; 692 693 #ifdef EHCI_DEBUG 694 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 695 ehci_dumpregs(sc); 696 #endif 697 698 s = splhardusb(); 699 switch (why) { 700 case PWR_SUSPEND: 701 case PWR_STANDBY: 702 sc->sc_bus.use_polling++; 703 #if 0 704 OOO 705 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 706 if (sc->sc_control == 0) { 707 /* 708 * Preserve register values, in case that APM BIOS 709 * does not recover them. 710 */ 711 sc->sc_control = ctl; 712 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 713 } 714 ctl |= EHCI_HCFS_SUSPEND; 715 OWRITE4(sc, EHCI_CONTROL, ctl); 716 #endif 717 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 718 sc->sc_bus.use_polling--; 719 break; 720 case PWR_RESUME: 721 sc->sc_bus.use_polling++; 722 #if 0 723 OOO 724 /* Some broken BIOSes do not recover these values */ 725 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 726 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 727 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 728 if (sc->sc_intre) 729 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 730 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 731 if (sc->sc_control) 732 ctl = sc->sc_control; 733 else 734 ctl = OREAD4(sc, EHCI_CONTROL); 735 ctl |= EHCI_HCFS_RESUME; 736 OWRITE4(sc, EHCI_CONTROL, ctl); 737 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 738 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 739 OWRITE4(sc, EHCI_CONTROL, ctl); 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 741 sc->sc_control = sc->sc_intre = 0; 742 #endif 743 sc->sc_bus.use_polling--; 744 break; 745 case PWR_SOFTSUSPEND: 746 case PWR_SOFTSTANDBY: 747 case PWR_SOFTRESUME: 748 break; 749 } 750 splx(s); 751 } 752 753 /* 754 * Shut down the controller when the system is going down. 755 */ 756 void 757 ehci_shutdown(void *v) 758 { 759 ehci_softc_t *sc = v; 760 761 DPRINTF(("ehci_shutdown: stopping the HC\n")); 762 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 763 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 764 } 765 766 usbd_status 767 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 768 { 769 struct ehci_softc *sc = (struct ehci_softc *)bus; 770 771 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 772 } 773 774 void 775 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 776 { 777 struct ehci_softc *sc = (struct ehci_softc *)bus; 778 779 usb_freemem(&sc->sc_bus, dma); 780 } 781 782 usbd_xfer_handle 783 ehci_allocx(struct usbd_bus *bus) 784 { 785 struct ehci_softc *sc = (struct ehci_softc *)bus; 786 usbd_xfer_handle xfer; 787 788 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 789 if (xfer != NULL) 790 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 791 else 792 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 793 if (xfer != NULL) 794 memset(xfer, 0, sizeof (struct ehci_xfer)); 795 return (xfer); 796 } 797 798 void 799 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 800 { 801 struct ehci_softc *sc = (struct ehci_softc *)bus; 802 803 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 804 } 805 806 Static void 807 ehci_device_clear_toggle(usbd_pipe_handle pipe) 808 { 809 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 810 811 printf("ehci_device_clear_toggle: epipe=%p\n", epipe); 812 #if 0 813 OOO 814 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 815 #endif 816 } 817 818 Static void 819 ehci_noop(usbd_pipe_handle pipe) 820 { 821 } 822 823 #ifdef EHCI_DEBUG 824 void 825 ehci_dumpregs(ehci_softc_t *sc) 826 { 827 int i; 828 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 829 EOREAD4(sc, EHCI_USBCMD), 830 EOREAD4(sc, EHCI_USBSTS), 831 EOREAD4(sc, EHCI_USBINTR)); 832 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 833 EOREAD4(sc, EHCI_FRINDEX), 834 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 835 EOREAD4(sc, EHCI_PERIODICLISTBASE), 836 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 837 for (i = 1; i <= sc->sc_noport; i++) 838 printf("port %d status=0x%08x\n", i, 839 EOREAD4(sc, EHCI_PORTSC(i))); 840 } 841 842 void 843 ehci_dump() 844 { 845 ehci_dumpregs(theehci); 846 } 847 848 void 849 ehci_dump_link(ehci_link_t link, int type) 850 { 851 link = le32toh(link); 852 printf("0x%08x", link); 853 if (link & EHCI_LINK_TERMINATE) 854 printf("<T>"); 855 else { 856 printf("<"); 857 if (type) { 858 switch (EHCI_LINK_TYPE(link)) { 859 case EHCI_LINK_ITD: printf("ITD"); break; 860 case EHCI_LINK_QH: printf("QH"); break; 861 case EHCI_LINK_SITD: printf("SITD"); break; 862 case EHCI_LINK_FSTN: printf("FSTN"); break; 863 } 864 printf(">"); 865 } 866 } 867 868 void 869 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 870 { 871 for (; sqtd; sqtd = sqtd->nextqtd) 872 ehci_dump_sqtd(sqtd); 873 } 874 875 void 876 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 877 { 878 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 879 ehci_dump_qtd(&sqtd->qtd); 880 } 881 882 void 883 ehci_dump_qtd(ehci_qtd_t *qtd) 884 { 885 u_int32_t s; 886 char sbuf[128]; 887 888 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 889 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 890 printf("\n"); 891 s = le32toh(qtd->qtd_status); 892 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 893 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 894 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 895 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 896 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 897 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 898 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 899 EHCI_QTD_GET_PID(s), sbuf); 900 for (s = 0; s < 5; s++) 901 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 902 } 903 904 void 905 ehci_dump_sqh(ehci_soft_qh_t *sqh) 906 { 907 ehci_qh_t *qh = &sqh->qh; 908 u_int32_t endp, endphub; 909 910 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 911 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 912 endp = le32toh(qh->qh_endp); 913 printf(" endp=0x%08x\n", endp); 914 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 915 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 916 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 917 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 918 printf(" mpl=0x%x ctl=%d nrl=%d\n", 919 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 920 EHCI_QH_GET_NRL(endp)); 921 endphub = le32toh(qh->qh_endphub); 922 printf(" endphub=0x%08x\n", endphub); 923 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 924 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 925 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 926 EHCI_QH_GET_MULT(endphub)); 927 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 928 printf("Overlay qTD:\n"); 929 ehci_dump_qtd(&qh->qh_qtd); 930 } 931 932 #endif 933 934 usbd_status 935 ehci_open(usbd_pipe_handle pipe) 936 { 937 usbd_device_handle dev = pipe->device; 938 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 939 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 940 u_int8_t addr = dev->address; 941 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 942 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 943 ehci_soft_qh_t *sqh; 944 usbd_status err; 945 #if 0 946 ehci_soft_itd_t *sitd; 947 ehci_physaddr_t tdphys; 948 u_int32_t fmt; 949 int ival; 950 #endif 951 int s; 952 int speed, naks; 953 954 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 955 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 956 957 if (addr == sc->sc_addr) { 958 switch (ed->bEndpointAddress) { 959 case USB_CONTROL_ENDPOINT: 960 pipe->methods = &ehci_root_ctrl_methods; 961 break; 962 case UE_DIR_IN | EHCI_INTR_ENDPT: 963 pipe->methods = &ehci_root_intr_methods; 964 break; 965 default: 966 return (USBD_INVAL); 967 } 968 return (USBD_NORMAL_COMPLETION); 969 } 970 971 switch (dev->speed) { 972 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 973 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 974 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 975 default: panic("ehci_open: bad device speed %d\n", dev->speed); 976 } 977 naks = 8; /* XXX */ 978 sqh = ehci_alloc_sqh(sc); 979 if (sqh == NULL) 980 goto bad0; 981 /* qh_link filled when the QH is added */ 982 sqh->qh.qh_endp = htole32( 983 EHCI_QH_SET_ADDR(addr) | 984 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 985 EHCI_QH_SET_EPS(speed) | /* XXX */ 986 /* XXX EHCI_QH_DTC ? */ 987 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 988 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 989 EHCI_QH_CTL : 0) | 990 EHCI_QH_SET_NRL(naks) 991 ); 992 sqh->qh.qh_endphub = htole32( 993 EHCI_QH_SET_MULT(1) 994 /* XXX TT stuff */ 995 /* XXX interrupt mask */ 996 ); 997 sqh->qh.qh_curqtd = EHCI_NULL; 998 /* Fill the overlay qTD */ 999 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1000 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1001 sqh->qh.qh_qtd.qtd_status = htole32(0); 1002 1003 epipe->sqh = sqh; 1004 1005 switch (xfertype) { 1006 case UE_CONTROL: 1007 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1008 0, &epipe->u.ctl.reqdma); 1009 if (err) 1010 goto bad1; 1011 pipe->methods = &ehci_device_ctrl_methods; 1012 s = splusb(); 1013 ehci_add_qh(sqh, sc->sc_async_head); 1014 splx(s); 1015 break; 1016 case UE_BULK: 1017 pipe->methods = &ehci_device_bulk_methods; 1018 s = splusb(); 1019 ehci_add_qh(sqh, sc->sc_async_head); 1020 splx(s); 1021 break; 1022 default: 1023 return (USBD_INVAL); 1024 } 1025 return (USBD_NORMAL_COMPLETION); 1026 1027 bad1: 1028 ehci_free_sqh(sc, sqh); 1029 bad0: 1030 return (USBD_NOMEM); 1031 } 1032 1033 /* 1034 * Add an ED to the schedule. Called at splusb(). 1035 */ 1036 void 1037 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1038 { 1039 SPLUSBCHECK; 1040 1041 sqh->next = head->next; 1042 sqh->qh.qh_link = head->qh.qh_link; 1043 head->next = sqh; 1044 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1045 1046 #ifdef EHCI_DEBUG 1047 if (ehcidebug > 0) { 1048 printf("ehci_add_qh:\n"); 1049 ehci_dump_sqh(sqh); 1050 } 1051 #endif 1052 } 1053 1054 /* 1055 * Remove an ED from the schedule. Called at splusb(). 1056 */ 1057 void 1058 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1059 { 1060 ehci_soft_qh_t *p; 1061 1062 SPLUSBCHECK; 1063 /* XXX */ 1064 for (p = head; p == NULL && p->next != sqh; p = p->next) 1065 ; 1066 if (p == NULL) 1067 panic("ehci_rem_qh: ED not found\n"); 1068 p->next = sqh->next; 1069 p->qh.qh_link = sqh->qh.qh_link; 1070 1071 ehci_sync_hc(sc); 1072 } 1073 1074 /* 1075 * Ensure that the HC has released all references to the QH. We do this 1076 * by asking for a Async Advance Doorbell interrupt and then we wait for 1077 * the interrupt. 1078 * To make this easier we first obtain exclusive use of the doorbell. 1079 */ 1080 void 1081 ehci_sync_hc(ehci_softc_t *sc) 1082 { 1083 int s, error; 1084 1085 if (sc->sc_dying) { 1086 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1087 return; 1088 } 1089 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1090 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1091 s = splhardusb(); 1092 /* ask for doorbell */ 1093 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1094 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1095 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1096 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1097 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1098 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1099 splx(s); 1100 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1101 #ifdef DIAGNOSTIC 1102 if (error) 1103 printf("ehci_sync_hc: tsleep() = %d\n", error); 1104 #endif 1105 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1106 } 1107 1108 /***********/ 1109 1110 /* 1111 * Data structures and routines to emulate the root hub. 1112 */ 1113 Static usb_device_descriptor_t ehci_devd = { 1114 USB_DEVICE_DESCRIPTOR_SIZE, 1115 UDESC_DEVICE, /* type */ 1116 {0x00, 0x02}, /* USB version */ 1117 UDCLASS_HUB, /* class */ 1118 UDSUBCLASS_HUB, /* subclass */ 1119 UDPROTO_HSHUBSTT, /* protocol */ 1120 64, /* max packet */ 1121 {0},{0},{0x00,0x01}, /* device id */ 1122 1,2,0, /* string indicies */ 1123 1 /* # of configurations */ 1124 }; 1125 1126 Static usb_device_qualifier_t ehci_odevd = { 1127 USB_DEVICE_DESCRIPTOR_SIZE, 1128 UDESC_DEVICE_QUALIFIER, /* type */ 1129 {0x00, 0x02}, /* USB version */ 1130 UDCLASS_HUB, /* class */ 1131 UDSUBCLASS_HUB, /* subclass */ 1132 UDPROTO_FSHUB, /* protocol */ 1133 64, /* max packet */ 1134 1, /* # of configurations */ 1135 0 1136 }; 1137 1138 Static usb_config_descriptor_t ehci_confd = { 1139 USB_CONFIG_DESCRIPTOR_SIZE, 1140 UDESC_CONFIG, 1141 {USB_CONFIG_DESCRIPTOR_SIZE + 1142 USB_INTERFACE_DESCRIPTOR_SIZE + 1143 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1144 1, 1145 1, 1146 0, 1147 UC_SELF_POWERED, 1148 0 /* max power */ 1149 }; 1150 1151 Static usb_interface_descriptor_t ehci_ifcd = { 1152 USB_INTERFACE_DESCRIPTOR_SIZE, 1153 UDESC_INTERFACE, 1154 0, 1155 0, 1156 1, 1157 UICLASS_HUB, 1158 UISUBCLASS_HUB, 1159 UIPROTO_HSHUBSTT, 1160 0 1161 }; 1162 1163 Static usb_endpoint_descriptor_t ehci_endpd = { 1164 USB_ENDPOINT_DESCRIPTOR_SIZE, 1165 UDESC_ENDPOINT, 1166 UE_DIR_IN | EHCI_INTR_ENDPT, 1167 UE_INTERRUPT, 1168 {8, 0}, /* max packet */ 1169 255 1170 }; 1171 1172 Static usb_hub_descriptor_t ehci_hubd = { 1173 USB_HUB_DESCRIPTOR_SIZE, 1174 UDESC_HUB, 1175 0, 1176 {0,0}, 1177 0, 1178 0, 1179 {0}, 1180 }; 1181 1182 Static int 1183 ehci_str(p, l, s) 1184 usb_string_descriptor_t *p; 1185 int l; 1186 char *s; 1187 { 1188 int i; 1189 1190 if (l == 0) 1191 return (0); 1192 p->bLength = 2 * strlen(s) + 2; 1193 if (l == 1) 1194 return (1); 1195 p->bDescriptorType = UDESC_STRING; 1196 l -= 2; 1197 for (i = 0; s[i] && l > 1; i++, l -= 2) 1198 USETW2(p->bString[i], 0, s[i]); 1199 return (2*i+2); 1200 } 1201 1202 /* 1203 * Simulate a hardware hub by handling all the necessary requests. 1204 */ 1205 Static usbd_status 1206 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1207 { 1208 usbd_status err; 1209 1210 /* Insert last in queue. */ 1211 err = usb_insert_transfer(xfer); 1212 if (err) 1213 return (err); 1214 1215 /* Pipe isn't running, start first */ 1216 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1217 } 1218 1219 Static usbd_status 1220 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1221 { 1222 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1223 usb_device_request_t *req; 1224 void *buf = NULL; 1225 int port, i; 1226 int s, len, value, index, l, totlen = 0; 1227 usb_port_status_t ps; 1228 usb_hub_descriptor_t hubd; 1229 usbd_status err; 1230 u_int32_t v; 1231 1232 if (sc->sc_dying) 1233 return (USBD_IOERROR); 1234 1235 #ifdef DIAGNOSTIC 1236 if (!(xfer->rqflags & URQ_REQUEST)) 1237 /* XXX panic */ 1238 return (USBD_INVAL); 1239 #endif 1240 req = &xfer->request; 1241 1242 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1243 req->bmRequestType, req->bRequest)); 1244 1245 len = UGETW(req->wLength); 1246 value = UGETW(req->wValue); 1247 index = UGETW(req->wIndex); 1248 1249 if (len != 0) 1250 buf = KERNADDR(&xfer->dmabuf); 1251 1252 #define C(x,y) ((x) | ((y) << 8)) 1253 switch(C(req->bRequest, req->bmRequestType)) { 1254 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1255 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1256 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1257 /* 1258 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1259 * for the integrated root hub. 1260 */ 1261 break; 1262 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1263 if (len > 0) { 1264 *(u_int8_t *)buf = sc->sc_conf; 1265 totlen = 1; 1266 } 1267 break; 1268 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1269 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1270 switch(value >> 8) { 1271 case UDESC_DEVICE: 1272 if ((value & 0xff) != 0) { 1273 err = USBD_IOERROR; 1274 goto ret; 1275 } 1276 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1277 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1278 memcpy(buf, &ehci_devd, l); 1279 break; 1280 /* 1281 * We can't really operate at another speed, but the spec says 1282 * we need this descriptor. 1283 */ 1284 case UDESC_DEVICE_QUALIFIER: 1285 if ((value & 0xff) != 0) { 1286 err = USBD_IOERROR; 1287 goto ret; 1288 } 1289 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1290 memcpy(buf, &ehci_odevd, l); 1291 break; 1292 /* 1293 * We can't really operate at another speed, but the spec says 1294 * we need this descriptor. 1295 */ 1296 case UDESC_OTHER_SPEED_CONFIGURATION: 1297 case UDESC_CONFIG: 1298 if ((value & 0xff) != 0) { 1299 err = USBD_IOERROR; 1300 goto ret; 1301 } 1302 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1303 memcpy(buf, &ehci_confd, l); 1304 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1305 value >> 8; 1306 buf = (char *)buf + l; 1307 len -= l; 1308 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1309 totlen += l; 1310 memcpy(buf, &ehci_ifcd, l); 1311 buf = (char *)buf + l; 1312 len -= l; 1313 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1314 totlen += l; 1315 memcpy(buf, &ehci_endpd, l); 1316 break; 1317 case UDESC_STRING: 1318 if (len == 0) 1319 break; 1320 *(u_int8_t *)buf = 0; 1321 totlen = 1; 1322 switch (value & 0xff) { 1323 case 1: /* Vendor */ 1324 totlen = ehci_str(buf, len, sc->sc_vendor); 1325 break; 1326 case 2: /* Product */ 1327 totlen = ehci_str(buf, len, "EHCI root hub"); 1328 break; 1329 } 1330 break; 1331 default: 1332 err = USBD_IOERROR; 1333 goto ret; 1334 } 1335 break; 1336 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1337 if (len > 0) { 1338 *(u_int8_t *)buf = 0; 1339 totlen = 1; 1340 } 1341 break; 1342 case C(UR_GET_STATUS, UT_READ_DEVICE): 1343 if (len > 1) { 1344 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1345 totlen = 2; 1346 } 1347 break; 1348 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1349 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1350 if (len > 1) { 1351 USETW(((usb_status_t *)buf)->wStatus, 0); 1352 totlen = 2; 1353 } 1354 break; 1355 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1356 if (value >= USB_MAX_DEVICES) { 1357 err = USBD_IOERROR; 1358 goto ret; 1359 } 1360 sc->sc_addr = value; 1361 break; 1362 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1363 if (value != 0 && value != 1) { 1364 err = USBD_IOERROR; 1365 goto ret; 1366 } 1367 sc->sc_conf = value; 1368 break; 1369 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1370 break; 1371 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1372 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1373 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1374 err = USBD_IOERROR; 1375 goto ret; 1376 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1377 break; 1378 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1379 break; 1380 /* Hub requests */ 1381 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1382 break; 1383 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1384 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1385 "port=%d feature=%d\n", 1386 index, value)); 1387 if (index < 1 || index > sc->sc_noport) { 1388 err = USBD_IOERROR; 1389 goto ret; 1390 } 1391 port = EHCI_PORTSC(index); 1392 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1393 switch(value) { 1394 case UHF_PORT_ENABLE: 1395 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1396 break; 1397 case UHF_PORT_SUSPEND: 1398 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1399 break; 1400 case UHF_PORT_POWER: 1401 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1402 break; 1403 case UHF_PORT_TEST: 1404 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1405 "%d\n", index)); 1406 break; 1407 case UHF_PORT_INDICATOR: 1408 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1409 "%d\n", index)); 1410 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1411 break; 1412 case UHF_C_PORT_CONNECTION: 1413 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1414 break; 1415 case UHF_C_PORT_ENABLE: 1416 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1417 break; 1418 case UHF_C_PORT_SUSPEND: 1419 /* how? */ 1420 break; 1421 case UHF_C_PORT_OVER_CURRENT: 1422 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1423 break; 1424 case UHF_C_PORT_RESET: 1425 sc->sc_isreset = 0; 1426 break; 1427 default: 1428 err = USBD_IOERROR; 1429 goto ret; 1430 } 1431 #if 0 1432 switch(value) { 1433 case UHF_C_PORT_CONNECTION: 1434 case UHF_C_PORT_ENABLE: 1435 case UHF_C_PORT_SUSPEND: 1436 case UHF_C_PORT_OVER_CURRENT: 1437 case UHF_C_PORT_RESET: 1438 /* Enable RHSC interrupt if condition is cleared. */ 1439 if ((OREAD4(sc, port) >> 16) == 0) 1440 ehci_pcd_able(sc, 1); 1441 break; 1442 default: 1443 break; 1444 } 1445 #endif 1446 break; 1447 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1448 if (value != 0) { 1449 err = USBD_IOERROR; 1450 goto ret; 1451 } 1452 hubd = ehci_hubd; 1453 hubd.bNbrPorts = sc->sc_noport; 1454 v = EOREAD4(sc, EHCI_HCSPARAMS); 1455 USETW(hubd.wHubCharacteristics, 1456 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1457 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1458 ? UHD_PORT_IND : 0); 1459 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1460 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1461 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1462 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1463 l = min(len, hubd.bDescLength); 1464 totlen = l; 1465 memcpy(buf, &hubd, l); 1466 break; 1467 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1468 if (len != 4) { 1469 err = USBD_IOERROR; 1470 goto ret; 1471 } 1472 memset(buf, 0, len); /* ? XXX */ 1473 totlen = len; 1474 break; 1475 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1476 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1477 index)); 1478 if (index < 1 || index > sc->sc_noport) { 1479 err = USBD_IOERROR; 1480 goto ret; 1481 } 1482 if (len != 4) { 1483 err = USBD_IOERROR; 1484 goto ret; 1485 } 1486 v = EOREAD4(sc, EHCI_PORTSC(index)); 1487 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1488 v)); 1489 i = UPS_HIGH_SPEED; 1490 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1491 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1492 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1493 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1494 if (v & EHCI_PS_PR) i |= UPS_RESET; 1495 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1496 USETW(ps.wPortStatus, i); 1497 i = 0; 1498 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1499 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1500 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1501 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1502 USETW(ps.wPortChange, i); 1503 l = min(len, sizeof ps); 1504 memcpy(buf, &ps, l); 1505 totlen = l; 1506 break; 1507 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1508 err = USBD_IOERROR; 1509 goto ret; 1510 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1511 break; 1512 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1513 if (index < 1 || index > sc->sc_noport) { 1514 err = USBD_IOERROR; 1515 goto ret; 1516 } 1517 port = EHCI_PORTSC(index); 1518 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1519 switch(value) { 1520 case UHF_PORT_ENABLE: 1521 EOWRITE4(sc, port, v | EHCI_PS_PE); 1522 break; 1523 case UHF_PORT_SUSPEND: 1524 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1525 break; 1526 case UHF_PORT_RESET: 1527 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1528 index)); 1529 if (EHCI_PS_IS_LOWSPEED(v)) { 1530 /* Low speed device, give up ownership. */ 1531 ehci_disown(sc, index, 1); 1532 break; 1533 } 1534 /* Start reset sequence. */ 1535 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1536 EOWRITE4(sc, port, v | EHCI_PS_PR); 1537 /* Wait for reset to complete. */ 1538 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1539 /* Terminate reset sequence. */ 1540 EOWRITE4(sc, port, v); 1541 /* Wait for HC to complete reset. */ 1542 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1543 v = EOREAD4(sc, port); 1544 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1545 if (v & EHCI_PS_PR) { 1546 printf("%s: port reset timeout\n", 1547 USBDEVNAME(sc->sc_bus.bdev)); 1548 return (USBD_TIMEOUT); 1549 } 1550 if (!(v & EHCI_PS_PE)) { 1551 /* Not a high speed device, give up ownership.*/ 1552 ehci_disown(sc, index, 0); 1553 break; 1554 } 1555 sc->sc_isreset = 1; 1556 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1557 index, v)); 1558 break; 1559 case UHF_PORT_POWER: 1560 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1561 "%d\n", index)); 1562 EOWRITE4(sc, port, v | EHCI_PS_PP); 1563 break; 1564 case UHF_PORT_TEST: 1565 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1566 "%d\n", index)); 1567 break; 1568 case UHF_PORT_INDICATOR: 1569 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1570 "%d\n", index)); 1571 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1572 break; 1573 default: 1574 err = USBD_IOERROR; 1575 goto ret; 1576 } 1577 break; 1578 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1579 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1580 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1581 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1582 break; 1583 default: 1584 err = USBD_IOERROR; 1585 goto ret; 1586 } 1587 xfer->actlen = totlen; 1588 err = USBD_NORMAL_COMPLETION; 1589 ret: 1590 xfer->status = err; 1591 s = splusb(); 1592 usb_transfer_complete(xfer); 1593 splx(s); 1594 return (USBD_IN_PROGRESS); 1595 } 1596 1597 void 1598 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1599 { 1600 int i, port; 1601 u_int32_t v; 1602 1603 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1604 #ifdef DIAGNOSTIC 1605 if (sc->sc_npcomp != 0) { 1606 i = (index-1) / sc->sc_npcomp; 1607 if (i >= sc->sc_ncomp) 1608 printf("%s: strange port\n", 1609 USBDEVNAME(sc->sc_bus.bdev)); 1610 else 1611 printf("%s: handing over %s speed device on " 1612 "port %d to %s\n", 1613 USBDEVNAME(sc->sc_bus.bdev), 1614 lowspeed ? "low" : "full", 1615 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1616 } else { 1617 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1618 } 1619 #endif 1620 port = EHCI_PORTSC(index); 1621 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1622 EOWRITE4(sc, port, v | EHCI_PS_PO); 1623 } 1624 1625 /* Abort a root control request. */ 1626 Static void 1627 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1628 { 1629 /* Nothing to do, all transfers are synchronous. */ 1630 } 1631 1632 /* Close the root pipe. */ 1633 Static void 1634 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1635 { 1636 DPRINTF(("ehci_root_ctrl_close\n")); 1637 /* Nothing to do. */ 1638 } 1639 1640 void 1641 ehci_root_intr_done(usbd_xfer_handle xfer) 1642 { 1643 xfer->hcpriv = NULL; 1644 } 1645 1646 Static usbd_status 1647 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1648 { 1649 usbd_status err; 1650 1651 /* Insert last in queue. */ 1652 err = usb_insert_transfer(xfer); 1653 if (err) 1654 return (err); 1655 1656 /* Pipe isn't running, start first */ 1657 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1658 } 1659 1660 Static usbd_status 1661 ehci_root_intr_start(usbd_xfer_handle xfer) 1662 { 1663 usbd_pipe_handle pipe = xfer->pipe; 1664 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1665 1666 if (sc->sc_dying) 1667 return (USBD_IOERROR); 1668 1669 sc->sc_intrxfer = xfer; 1670 1671 return (USBD_IN_PROGRESS); 1672 } 1673 1674 /* Abort a root interrupt request. */ 1675 Static void 1676 ehci_root_intr_abort(usbd_xfer_handle xfer) 1677 { 1678 int s; 1679 1680 if (xfer->pipe->intrxfer == xfer) { 1681 DPRINTF(("ehci_root_intr_abort: remove\n")); 1682 xfer->pipe->intrxfer = NULL; 1683 } 1684 xfer->status = USBD_CANCELLED; 1685 s = splusb(); 1686 usb_transfer_complete(xfer); 1687 splx(s); 1688 } 1689 1690 /* Close the root pipe. */ 1691 Static void 1692 ehci_root_intr_close(usbd_pipe_handle pipe) 1693 { 1694 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1695 1696 DPRINTF(("ehci_root_intr_close\n")); 1697 1698 sc->sc_intrxfer = NULL; 1699 } 1700 1701 void 1702 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1703 { 1704 xfer->hcpriv = NULL; 1705 } 1706 1707 /************************/ 1708 1709 ehci_soft_qh_t * 1710 ehci_alloc_sqh(ehci_softc_t *sc) 1711 { 1712 ehci_soft_qh_t *sqh; 1713 usbd_status err; 1714 int i, offs; 1715 usb_dma_t dma; 1716 1717 if (sc->sc_freeqhs == NULL) { 1718 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1719 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1720 EHCI_PAGE_SIZE, &dma); 1721 if (err) 1722 return (NULL); 1723 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1724 offs = i * EHCI_SQH_SIZE; 1725 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1726 sqh->physaddr = DMAADDR(&dma) + offs; 1727 sqh->next = sc->sc_freeqhs; 1728 sc->sc_freeqhs = sqh; 1729 } 1730 } 1731 sqh = sc->sc_freeqhs; 1732 sc->sc_freeqhs = sqh->next; 1733 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1734 sqh->next = NULL; 1735 return (sqh); 1736 } 1737 1738 void 1739 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1740 { 1741 sqh->next = sc->sc_freeqhs; 1742 sc->sc_freeqhs = sqh; 1743 } 1744 1745 ehci_soft_qtd_t * 1746 ehci_alloc_sqtd(ehci_softc_t *sc) 1747 { 1748 ehci_soft_qtd_t *sqtd; 1749 usbd_status err; 1750 int i, offs; 1751 usb_dma_t dma; 1752 int s; 1753 1754 if (sc->sc_freeqtds == NULL) { 1755 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1756 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1757 EHCI_PAGE_SIZE, &dma); 1758 if (err) 1759 return (NULL); 1760 s = splusb(); 1761 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1762 offs = i * EHCI_SQTD_SIZE; 1763 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1764 sqtd->physaddr = DMAADDR(&dma) + offs; 1765 sqtd->nextqtd = sc->sc_freeqtds; 1766 sc->sc_freeqtds = sqtd; 1767 } 1768 splx(s); 1769 } 1770 1771 s = splusb(); 1772 sqtd = sc->sc_freeqtds; 1773 sc->sc_freeqtds = sqtd->nextqtd; 1774 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1775 sqtd->nextqtd = NULL; 1776 sqtd->xfer = NULL; 1777 splx(s); 1778 1779 return (sqtd); 1780 } 1781 1782 void 1783 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1784 { 1785 int s; 1786 1787 s = splusb(); 1788 sqtd->nextqtd = sc->sc_freeqtds; 1789 sc->sc_freeqtds = sqtd; 1790 splx(s); 1791 } 1792 1793 usbd_status 1794 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 1795 int alen, int rd, usbd_xfer_handle xfer, 1796 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 1797 { 1798 ehci_soft_qtd_t *next, *cur; 1799 ehci_physaddr_t dataphys, dataphysend, nextphys; 1800 u_int32_t qtdstatus; 1801 int len, curlen; 1802 int i; 1803 usb_dma_t *dma = &xfer->dmabuf; 1804 1805 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen)); 1806 1807 len = alen; 1808 dataphys = DMAADDR(dma); 1809 dataphysend = EHCI_PAGE(dataphys + len - 1); 1810 qtdstatus = htole32( 1811 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 1812 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 1813 EHCI_QTD_SET_CERR(3) 1814 /* IOC set below */ 1815 /* BYTES set below */ 1816 /* XXX Data toggle */ 1817 ); 1818 1819 cur = ehci_alloc_sqtd(sc); 1820 if (cur == NULL) 1821 goto nomem; 1822 *sp = cur; 1823 for (;;) { 1824 /* The EHCI hardware can handle at most 4 page crossings. */ 1825 if (EHCI_PAGE(dataphys) == dataphysend || 1826 EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE 1827 == dataphysend) { 1828 /* we can handle it in this QTD */ 1829 curlen = len; 1830 } else { 1831 #if 0 1832 /* must use multiple TDs, fill as much as possible. */ 1833 curlen = 2 * EHCI_PAGE_SIZE - 1834 (dataphys & (EHCI_PAGE_SIZE-1)); 1835 /* the length must be a multiple of the max size */ 1836 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 1837 #ifdef DIAGNOSTIC 1838 if (curlen == 0) 1839 panic("ehci_alloc_std: curlen == 0\n"); 1840 #endif 1841 #else 1842 printf("ehci_alloc_std_chain: multiple QTDs\n"); 1843 return (USBD_NOMEM); 1844 #endif 1845 } 1846 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x " 1847 "dataphysend=0x%08x len=%d curlen=%d\n", 1848 dataphys, dataphysend, 1849 len, curlen)); 1850 len -= curlen; 1851 1852 if (len != 0) { 1853 next = ehci_alloc_sqtd(sc); 1854 if (next == NULL) 1855 goto nomem; 1856 nextphys = next->physaddr; 1857 } else { 1858 next = NULL; 1859 nextphys = EHCI_NULL; 1860 } 1861 1862 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 1863 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 1864 if (i != 0) /* use offset only in first buffer */ 1865 a = EHCI_PAGE(a); 1866 cur->qtd.qtd_buffer[i] = htole32(a); 1867 } 1868 cur->nextqtd = next; 1869 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 1870 cur->qtd.qtd_status = 1871 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 1872 cur->xfer = xfer; 1873 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 1874 dataphys, dataphys + curlen - 1)); 1875 if (len == 0) 1876 break; 1877 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n")); 1878 dataphys += curlen; 1879 cur = next; 1880 } 1881 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 1882 *ep = cur; 1883 1884 return (USBD_NORMAL_COMPLETION); 1885 1886 nomem: 1887 /* XXX free chain */ 1888 return (USBD_NOMEM); 1889 } 1890 1891 /****************/ 1892 1893 /* 1894 * Close a reqular pipe. 1895 * Assumes that there are no pending transactions. 1896 */ 1897 void 1898 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 1899 { 1900 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1901 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1902 ehci_soft_qh_t *sqh = epipe->sqh; 1903 int s; 1904 1905 s = splusb(); 1906 ehci_rem_qh(sc, sqh, head); 1907 splx(s); 1908 ehci_free_sqh(sc, epipe->sqh); 1909 } 1910 1911 /* 1912 * Abort a device request. 1913 * If this routine is called at splusb() it guarantees that the request 1914 * will be removed from the hardware scheduling and that the callback 1915 * for it will be called with USBD_CANCELLED status. 1916 * It's impossible to guarantee that the requested transfer will not 1917 * have happened since the hardware runs concurrently. 1918 * If the transaction has already happened we rely on the ordinary 1919 * interrupt processing to process it. 1920 */ 1921 void 1922 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1923 { 1924 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 1925 ehci_soft_qh_t *sqh = epipe->sqh; 1926 #if 0 1927 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 1928 ehci_soft_td_t *p, *n; 1929 ehci_physaddr_t headp; 1930 int hit; 1931 #endif 1932 int s; 1933 1934 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 1935 1936 if (xfer->device->bus->intr_context || !curproc) 1937 panic("ehci_abort_xfer: not in process context\n"); 1938 1939 /* 1940 * Step 1: Make interrupt routine and hardware ignore xfer. 1941 */ 1942 s = splusb(); 1943 xfer->status = status; /* make software ignore it */ 1944 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 1945 splx(s); 1946 /* XXX */ 1947 1948 /* 1949 * Step 2: Wait until we know hardware has finished any possible 1950 * use of the xfer. Also make sure the soft interrupt routine 1951 * has run. 1952 */ 1953 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 1954 /* XXX should have some communication with softintr() to know 1955 when it's done */ 1956 usb_delay_ms(epipe->pipe.device->bus, 250); 1957 1958 /* 1959 * Step 3: Remove any vestiges of the xfer from the hardware. 1960 * The complication here is that the hardware may have executed 1961 * beyond the xfer we're trying to abort. So as we're scanning 1962 * the TDs of this xfer we check if the hardware points to 1963 * any of them. 1964 */ 1965 s = splusb(); /* XXX why? */ 1966 /* XXX */ 1967 1968 /* 1969 * Step 4: Turn on hardware again. 1970 */ 1971 /* XXX */ 1972 1973 /* 1974 * Step 5: Execute callback. 1975 */ 1976 usb_transfer_complete(xfer); 1977 1978 splx(s); 1979 } 1980 1981 void 1982 ehci_timeout(void *addr) 1983 { 1984 struct ehci_xfer *exfer = addr; 1985 1986 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 1987 1988 /* Execute the abort in a process context. */ 1989 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 1990 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 1991 } 1992 1993 void 1994 ehci_timeout_task(void *addr) 1995 { 1996 usbd_xfer_handle xfer = addr; 1997 int s; 1998 1999 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2000 2001 s = splusb(); 2002 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2003 splx(s); 2004 } 2005 2006 /************************/ 2007 2008 Static usbd_status 2009 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2010 { 2011 usbd_status err; 2012 2013 /* Insert last in queue. */ 2014 err = usb_insert_transfer(xfer); 2015 if (err) 2016 return (err); 2017 2018 /* Pipe isn't running, start first */ 2019 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2020 } 2021 2022 Static usbd_status 2023 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2024 { 2025 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2026 usbd_status err; 2027 2028 if (sc->sc_dying) 2029 return (USBD_IOERROR); 2030 2031 #ifdef DIAGNOSTIC 2032 if (!(xfer->rqflags & URQ_REQUEST)) { 2033 /* XXX panic */ 2034 printf("ehci_device_ctrl_transfer: not a request\n"); 2035 return (USBD_INVAL); 2036 } 2037 #endif 2038 2039 err = ehci_device_request(xfer); 2040 if (err) 2041 return (err); 2042 2043 if (sc->sc_bus.use_polling) 2044 ehci_waitintr(sc, xfer); 2045 return (USBD_IN_PROGRESS); 2046 } 2047 2048 void 2049 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2050 { 2051 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2052 2053 #ifdef DIAGNOSTIC 2054 if (!(xfer->rqflags & URQ_REQUEST)) { 2055 panic("ehci_ctrl_done: not a request\n"); 2056 } 2057 #endif 2058 xfer->hcpriv = NULL; 2059 } 2060 2061 /* Abort a device control request. */ 2062 Static void 2063 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2064 { 2065 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2066 ehci_abort_xfer(xfer, USBD_CANCELLED); 2067 } 2068 2069 /* Close a device control pipe. */ 2070 Static void 2071 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2072 { 2073 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2074 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2075 2076 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2077 ehci_close_pipe(pipe, sc->sc_async_head); 2078 /*ehci_free_std(sc, epipe->tail.td);*/ 2079 } 2080 2081 usbd_status 2082 ehci_device_request(usbd_xfer_handle xfer) 2083 { 2084 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2085 usb_device_request_t *req = &xfer->request; 2086 usbd_device_handle dev = epipe->pipe.device; 2087 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2088 int addr = dev->address; 2089 ehci_soft_qtd_t *setup, *stat, *next; 2090 ehci_soft_qh_t *sqh; 2091 int isread; 2092 int len; 2093 usbd_status err; 2094 int s; 2095 2096 isread = req->bmRequestType & UT_READ; 2097 len = UGETW(req->wLength); 2098 2099 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2100 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2101 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2102 UGETW(req->wIndex), len, addr, 2103 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2104 2105 setup = ehci_alloc_sqtd(sc); 2106 if (setup == NULL) { 2107 err = USBD_NOMEM; 2108 goto bad1; 2109 } 2110 stat = ehci_alloc_sqtd(sc); 2111 if (stat == NULL) { 2112 err = USBD_NOMEM; 2113 goto bad2; 2114 } 2115 2116 sqh = epipe->sqh; 2117 epipe->u.ctl.length = len; 2118 2119 /* XXX 2120 * Since we're messing with the QH we must know the HC is in sync. 2121 * This needs to go away since it slows down control transfers. 2122 * Removing it entails: 2123 * - fill the QH only once with addr & wMaxPacketSize 2124 * - put the correct data toggles in the qtds and set DTC 2125 */ 2126 /* ehci_sync_hc(sc); */ 2127 /* Update device address and length since they may have changed. */ 2128 /* XXX This only needs to be done once, but it's too early in open. */ 2129 /* XXXX Should not touch ED here! */ 2130 sqh->qh.qh_endp = 2131 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2132 htole32( 2133 EHCI_QH_SET_ADDR(addr) | 2134 /* EHCI_QH_DTC | */ 2135 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2136 ); 2137 /* Clear toggle */ 2138 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2139 2140 /* Set up data transaction */ 2141 if (len != 0) { 2142 ehci_soft_qtd_t *end; 2143 2144 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, 2145 &next, &end); 2146 if (err) 2147 goto bad3; 2148 end->nextqtd = stat; 2149 end->qtd.qtd_next = 2150 end->qtd.qtd_altnext = htole32(stat->physaddr); 2151 /* Start toggle at 1. */ 2152 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2153 } else { 2154 next = stat; 2155 } 2156 2157 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req); 2158 2159 setup->qtd.qtd_status = htole32( 2160 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2161 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2162 EHCI_QTD_SET_CERR(3) | 2163 EHCI_QTD_SET_BYTES(sizeof *req) 2164 ); 2165 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma)); 2166 setup->nextqtd = next; 2167 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2168 setup->xfer = xfer; 2169 2170 stat->qtd.qtd_status = htole32( 2171 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2172 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2173 EHCI_QTD_SET_CERR(3) | 2174 EHCI_QTD_IOC 2175 ); 2176 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2177 stat->nextqtd = NULL; 2178 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2179 stat->xfer = xfer; 2180 2181 #ifdef EHCI_DEBUG 2182 if (ehcidebug > 2) { 2183 DPRINTF(("ehci_device_request:\n")); 2184 ehci_dump_sqh(sqh); 2185 ehci_dump_sqtds(setup); 2186 } 2187 #endif 2188 2189 /* Insert qTD in QH list. */ 2190 s = splusb(); 2191 sqh->qh.qh_curqtd = 0; 2192 sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr); 2193 sqh->sqtd = setup; 2194 if (xfer->timeout && !sc->sc_bus.use_polling) { 2195 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2196 ehci_timeout, xfer); 2197 } 2198 splx(s); 2199 2200 #if 1 2201 if (ehcidebug > 10) { 2202 delay(10000); 2203 DPRINTF(("ehci_device_request: status=%x\n", 2204 EOREAD4(sc, EHCI_USBSTS))); 2205 ehci_dumpregs(sc); 2206 ehci_dump_sqh(sc->sc_async_head); 2207 ehci_dump_sqh(sqh); 2208 ehci_dump_sqtds(setup); 2209 } 2210 #endif 2211 2212 return (USBD_NORMAL_COMPLETION); 2213 2214 bad3: 2215 ehci_free_sqtd(sc, stat); 2216 bad2: 2217 ehci_free_sqtd(sc, setup); 2218 bad1: 2219 return (err); 2220 } 2221 2222 /************************/ 2223 2224 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2225 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2226 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 2227 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 2228 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 2229 2230 /************************/ 2231 2232 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2233 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2234 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2235 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2236 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2237 2238 /************************/ 2239 2240 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2241 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2242 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2243 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2244 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2245
Indexes created Tue Sep 23 23:09:58 GMT 2025