ehci.c revision 1.16
1 /* TODO 2 Add intrinfo. 3 */ 4 /* $NetBSD: ehci.c,v 1.16 2001/11/21 02:47:07 augustss Exp $ */ 5 6 /* 7 * Copyright (c) 2001 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by Lennart Augustsson (lennart (at) augustsson.net). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 44 * 45 * The EHCI 0.96 spec can be found at 46 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 47 * and the USB 2.0 spec at 48 * http://www.usb.org/developers/data/usb_20.zip 49 * 50 */ 51 52 #include <sys/cdefs.h> 53 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.16 2001/11/21 02:47:07 augustss Exp $"); 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/kernel.h> 58 #include <sys/malloc.h> 59 #include <sys/device.h> 60 #include <sys/select.h> 61 #include <sys/proc.h> 62 #include <sys/queue.h> 63 64 #include <machine/bus.h> 65 #include <machine/endian.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 #include <dev/usb/usbdivar.h> 70 #include <dev/usb/usb_mem.h> 71 #include <dev/usb/usb_quirks.h> 72 73 #include <dev/usb/ehcireg.h> 74 #include <dev/usb/ehcivar.h> 75 76 #ifdef EHCI_DEBUG 77 #define DPRINTF(x) if (ehcidebug) printf x 78 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 79 int ehcidebug = 0; 80 #ifndef __NetBSD__ 81 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 82 #endif 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n,x) 86 #endif 87 88 struct ehci_pipe { 89 struct usbd_pipe pipe; 90 ehci_soft_qh_t *sqh; 91 union { 92 ehci_soft_qtd_t *qtd; 93 /* ehci_soft_itd_t *itd; */ 94 } tail; 95 union { 96 /* Control pipe */ 97 struct { 98 usb_dma_t reqdma; 99 u_int length; 100 ehci_soft_qtd_t *setup, *data, *stat; 101 } ctl; 102 /* Interrupt pipe */ 103 /* XXX */ 104 /* Bulk pipe */ 105 struct { 106 u_int length; 107 int isread; 108 } bulk; 109 /* Iso pipe */ 110 /* XXX */ 111 } u; 112 }; 113 114 Static void ehci_shutdown(void *); 115 Static void ehci_power(int, void *); 116 117 Static usbd_status ehci_open(usbd_pipe_handle); 118 Static void ehci_poll(struct usbd_bus *); 119 Static void ehci_softintr(void *); 120 Static int ehci_intr1(ehci_softc_t *); 121 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 122 Static void ehci_timeout(void *); 123 Static void ehci_timeout_task(void *); 124 125 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 126 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 127 128 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 129 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 130 131 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 132 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 133 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 134 Static void ehci_root_ctrl_close(usbd_pipe_handle); 135 Static void ehci_root_ctrl_done(usbd_xfer_handle); 136 137 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 138 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 139 Static void ehci_root_intr_abort(usbd_xfer_handle); 140 Static void ehci_root_intr_close(usbd_pipe_handle); 141 Static void ehci_root_intr_done(usbd_xfer_handle); 142 143 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 144 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 145 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 146 Static void ehci_device_ctrl_close(usbd_pipe_handle); 147 Static void ehci_device_ctrl_done(usbd_xfer_handle); 148 149 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 151 Static void ehci_device_bulk_abort(usbd_xfer_handle); 152 Static void ehci_device_bulk_close(usbd_pipe_handle); 153 Static void ehci_device_bulk_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 157 Static void ehci_device_intr_abort(usbd_xfer_handle); 158 Static void ehci_device_intr_close(usbd_pipe_handle); 159 Static void ehci_device_intr_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 163 Static void ehci_device_isoc_abort(usbd_xfer_handle); 164 Static void ehci_device_isoc_close(usbd_pipe_handle); 165 Static void ehci_device_isoc_done(usbd_xfer_handle); 166 167 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 168 Static void ehci_noop(usbd_pipe_handle pipe); 169 170 Static int ehci_str(usb_string_descriptor_t *, int, char *); 171 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 172 Static void ehci_pcd_able(ehci_softc_t *, int); 173 Static void ehci_pcd_enable(void *); 174 Static void ehci_disown(ehci_softc_t *, int, int); 175 176 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 177 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 178 179 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 180 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 181 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *, 182 ehci_softc_t *, int, int, usbd_xfer_handle, 183 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 184 185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 186 187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 189 ehci_soft_qh_t *); 190 Static void ehci_sync_hc(ehci_softc_t *); 191 192 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 193 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 194 195 #ifdef EHCI_DEBUG 196 Static void ehci_dumpregs(ehci_softc_t *); 197 Static void ehci_dump(void); 198 Static ehci_softc_t *theehci; 199 Static void ehci_dump_link(ehci_link_t, int); 200 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 201 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 202 Static void ehci_dump_qtd(ehci_qtd_t *); 203 Static void ehci_dump_sqh(ehci_soft_qh_t *); 204 #endif 205 206 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 207 208 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 209 210 #define EHCI_INTR_ENDPT 1 211 212 Static struct usbd_bus_methods ehci_bus_methods = { 213 ehci_open, 214 ehci_softintr, 215 ehci_poll, 216 ehci_allocm, 217 ehci_freem, 218 ehci_allocx, 219 ehci_freex, 220 }; 221 222 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 223 ehci_root_ctrl_transfer, 224 ehci_root_ctrl_start, 225 ehci_root_ctrl_abort, 226 ehci_root_ctrl_close, 227 ehci_noop, 228 ehci_root_ctrl_done, 229 }; 230 231 Static struct usbd_pipe_methods ehci_root_intr_methods = { 232 ehci_root_intr_transfer, 233 ehci_root_intr_start, 234 ehci_root_intr_abort, 235 ehci_root_intr_close, 236 ehci_noop, 237 ehci_root_intr_done, 238 }; 239 240 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 241 ehci_device_ctrl_transfer, 242 ehci_device_ctrl_start, 243 ehci_device_ctrl_abort, 244 ehci_device_ctrl_close, 245 ehci_noop, 246 ehci_device_ctrl_done, 247 }; 248 249 Static struct usbd_pipe_methods ehci_device_intr_methods = { 250 ehci_device_intr_transfer, 251 ehci_device_intr_start, 252 ehci_device_intr_abort, 253 ehci_device_intr_close, 254 ehci_device_clear_toggle, 255 ehci_device_intr_done, 256 }; 257 258 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 259 ehci_device_bulk_transfer, 260 ehci_device_bulk_start, 261 ehci_device_bulk_abort, 262 ehci_device_bulk_close, 263 ehci_device_clear_toggle, 264 ehci_device_bulk_done, 265 }; 266 267 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 268 ehci_device_isoc_transfer, 269 ehci_device_isoc_start, 270 ehci_device_isoc_abort, 271 ehci_device_isoc_close, 272 ehci_noop, 273 ehci_device_isoc_done, 274 }; 275 276 int ehcidisable = 0; 277 278 usbd_status 279 ehci_init(ehci_softc_t *sc) 280 { 281 u_int32_t version, sparams, cparams, hcr; 282 u_int i; 283 usbd_status err; 284 ehci_soft_qh_t *sqh; 285 286 if (ehcidisable) 287 return (USBD_INVAL); 288 289 DPRINTF(("ehci_init: start\n")); 290 #ifdef EHCI_DEBUG 291 theehci = sc; 292 #endif 293 294 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 295 296 version = EREAD2(sc, EHCI_HCIVERSION); 297 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 298 version >> 8, version & 0xff); 299 300 sparams = EREAD4(sc, EHCI_HCSPARAMS); 301 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 302 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 303 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 304 printf("%s: wrong number of companions (%d != %d)\n", 305 USBDEVNAME(sc->sc_bus.bdev), 306 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 307 return (USBD_IOERROR); 308 } 309 if (sc->sc_ncomp > 0) { 310 printf("%s: companion controller%s, %d port%s each:", 311 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 312 EHCI_HCS_N_PCC(sparams), 313 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 314 for (i = 0; i < sc->sc_ncomp; i++) 315 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 316 printf("\n"); 317 } 318 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 319 cparams = EREAD4(sc, EHCI_HCCPARAMS); 320 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 321 322 sc->sc_bus.usbrev = USBREV_2_0; 323 324 /* Reset the controller */ 325 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 326 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 327 usb_delay_ms(&sc->sc_bus, 1); 328 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 329 for (i = 0; i < 100; i++) { 330 delay(10); 331 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 332 if (!hcr) 333 break; 334 } 335 if (hcr) { 336 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 337 return (USBD_IOERROR); 338 } 339 340 /* frame list size at default, read back what we got and use that */ 341 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 342 case 0: sc->sc_flsize = 1024*4; break; 343 case 1: sc->sc_flsize = 512*4; break; 344 case 2: sc->sc_flsize = 256*4; break; 345 case 3: return (USBD_IOERROR); 346 } 347 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 348 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 349 if (err) 350 return (err); 351 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 352 353 /* Set up the bus struct. */ 354 sc->sc_bus.methods = &ehci_bus_methods; 355 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 356 357 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 358 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 359 360 sc->sc_eintrs = EHCI_NORMAL_INTRS; 361 362 /* Allocate dummy QH that starts the async list. */ 363 sqh = ehci_alloc_sqh(sc); 364 if (sqh == NULL) { 365 err = USBD_NOMEM; 366 goto bad1; 367 } 368 /* Fill the QH */ 369 sqh->qh.qh_endp = 370 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 371 sqh->qh.qh_link = 372 htole32(sqh->physaddr | EHCI_LINK_QH); 373 sqh->qh.qh_curqtd = EHCI_NULL; 374 sqh->next = NULL; 375 /* Fill the overlay qTD */ 376 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 377 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 378 sqh->qh.qh_qtd.qtd_status = 379 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 380 sqh->sqtd = NULL; 381 #ifdef EHCI_DEBUG 382 if (ehcidebug) { 383 ehci_dump_sqh(sc->sc_async_head); 384 } 385 #endif 386 387 /* Point to async list */ 388 sc->sc_async_head = sqh; 389 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 390 391 usb_callout_init(sc->sc_tmo_pcd); 392 393 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 394 395 /* Enable interrupts */ 396 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 397 398 /* Turn on controller */ 399 EOWRITE4(sc, EHCI_USBCMD, 400 EHCI_CMD_ITC_8 | /* 8 microframes */ 401 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 402 EHCI_CMD_ASE | 403 /* EHCI_CMD_PSE | */ 404 EHCI_CMD_RS); 405 406 /* Take over port ownership */ 407 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 408 409 for (i = 0; i < 100; i++) { 410 delay(10); 411 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 412 if (!hcr) 413 break; 414 } 415 if (hcr) { 416 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 417 return (USBD_IOERROR); 418 } 419 420 return (USBD_NORMAL_COMPLETION); 421 422 #if 0 423 bad2: 424 ehci_free_sqh(sc, sc->sc_async_head); 425 #endif 426 bad1: 427 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 428 return (err); 429 } 430 431 int 432 ehci_intr(void *v) 433 { 434 ehci_softc_t *sc = v; 435 436 if (sc == NULL || sc->sc_dying || ehcidisable) 437 return (0); 438 439 /* If we get an interrupt while polling, then just ignore it. */ 440 if (sc->sc_bus.use_polling) { 441 #ifdef DIAGNOSTIC 442 printf("ehci_intr: ignored interrupt while polling\n"); 443 #endif 444 return (0); 445 } 446 447 return (ehci_intr1(sc)); 448 } 449 450 Static int 451 ehci_intr1(ehci_softc_t *sc) 452 { 453 u_int32_t intrs, eintrs; 454 455 DPRINTFN(20,("ehci_intr1: enter\n")); 456 457 /* In case the interrupt occurs before initialization has completed. */ 458 if (sc == NULL) { 459 #ifdef DIAGNOSTIC 460 printf("ehci_intr: sc == NULL\n"); 461 #endif 462 return (0); 463 } 464 465 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 466 467 if (!intrs) 468 return (0); 469 470 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 471 eintrs = intrs & sc->sc_eintrs; 472 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 473 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 474 (u_int)eintrs)); 475 if (!eintrs) 476 return (0); 477 478 sc->sc_bus.intr_context++; 479 sc->sc_bus.no_intrs++; 480 if (eintrs & EHCI_STS_IAA) { 481 DPRINTF(("ehci_intr1: door bell\n")); 482 wakeup(&sc->sc_async_head); 483 eintrs &= ~EHCI_STS_INT; 484 } 485 if (eintrs & EHCI_STS_INT) { 486 DPRINTF(("ehci_intr1: something is done\n")); 487 eintrs &= ~EHCI_STS_INT; 488 } 489 if (eintrs & EHCI_STS_ERRINT) { 490 DPRINTF(("ehci_intr1: some error\n")); 491 eintrs &= ~EHCI_STS_HSE; 492 } 493 if (eintrs & EHCI_STS_HSE) { 494 printf("%s: unrecoverable error, controller halted\n", 495 USBDEVNAME(sc->sc_bus.bdev)); 496 /* XXX what else */ 497 } 498 if (eintrs & EHCI_STS_PCD) { 499 ehci_pcd(sc, sc->sc_intrxfer); 500 /* 501 * Disable PCD interrupt for now, because it will be 502 * on until the port has been reset. 503 */ 504 ehci_pcd_able(sc, 0); 505 /* Do not allow RHSC interrupts > 1 per second */ 506 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 507 eintrs &= ~EHCI_STS_PCD; 508 } 509 510 sc->sc_bus.intr_context--; 511 512 if (eintrs != 0) { 513 /* Block unprocessed interrupts. */ 514 sc->sc_eintrs &= ~eintrs; 515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 516 printf("%s: blocking intrs 0x%x\n", 517 USBDEVNAME(sc->sc_bus.bdev), eintrs); 518 } 519 520 return (1); 521 } 522 523 void 524 ehci_pcd_able(ehci_softc_t *sc, int on) 525 { 526 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 527 if (on) 528 sc->sc_eintrs |= EHCI_STS_PCD; 529 else 530 sc->sc_eintrs &= ~EHCI_STS_PCD; 531 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 532 } 533 534 void 535 ehci_pcd_enable(void *v_sc) 536 { 537 ehci_softc_t *sc = v_sc; 538 539 ehci_pcd_able(sc, 1); 540 } 541 542 void 543 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 544 { 545 usbd_pipe_handle pipe; 546 struct ehci_pipe *epipe; 547 u_char *p; 548 int i, m; 549 550 if (xfer == NULL) { 551 /* Just ignore the change. */ 552 return; 553 } 554 555 pipe = xfer->pipe; 556 epipe = (struct ehci_pipe *)pipe; 557 558 p = KERNADDR(&xfer->dmabuf); 559 m = min(sc->sc_noport, xfer->length * 8 - 1); 560 memset(p, 0, xfer->length); 561 for (i = 1; i <= m; i++) { 562 /* Pick out CHANGE bits from the status reg. */ 563 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 564 p[i/8] |= 1 << (i%8); 565 } 566 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 567 xfer->actlen = xfer->length; 568 xfer->status = USBD_NORMAL_COMPLETION; 569 570 usb_transfer_complete(xfer); 571 } 572 573 void 574 ehci_softintr(void *v) 575 { 576 //ehci_softc_t *sc = v; 577 } 578 579 /* 580 * Wait here until controller claims to have an interrupt. 581 * Then call ohci_intr and return. Use timeout to avoid waiting 582 * too long. 583 */ 584 void 585 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 586 { 587 int timo = xfer->timeout; 588 int usecs; 589 u_int32_t intrs; 590 591 xfer->status = USBD_IN_PROGRESS; 592 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 593 usb_delay_ms(&sc->sc_bus, 1); 594 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 595 sc->sc_eintrs; 596 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 597 #ifdef OHCI_DEBUG 598 if (ehcidebug > 15) 599 ehci_dumpregs(sc); 600 #endif 601 if (intrs) { 602 ehci_intr1(sc); 603 if (xfer->status != USBD_IN_PROGRESS) 604 return; 605 } 606 } 607 608 /* Timeout */ 609 DPRINTF(("ehci_waitintr: timeout\n")); 610 xfer->status = USBD_TIMEOUT; 611 usb_transfer_complete(xfer); 612 /* XXX should free TD */ 613 } 614 615 void 616 ehci_poll(struct usbd_bus *bus) 617 { 618 ehci_softc_t *sc = (ehci_softc_t *)bus; 619 #ifdef EHCI_DEBUG 620 static int last; 621 int new; 622 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 623 if (new != last) { 624 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 625 last = new; 626 } 627 #endif 628 629 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 630 ehci_intr1(sc); 631 } 632 633 int 634 ehci_detach(struct ehci_softc *sc, int flags) 635 { 636 int rv = 0; 637 638 if (sc->sc_child != NULL) 639 rv = config_detach(sc->sc_child, flags); 640 641 if (rv != 0) 642 return (rv); 643 644 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 645 646 if (sc->sc_powerhook != NULL) 647 powerhook_disestablish(sc->sc_powerhook); 648 if (sc->sc_shutdownhook != NULL) 649 shutdownhook_disestablish(sc->sc_shutdownhook); 650 651 usb_delay_ms(&sc->sc_bus, 1000); /* XXX let stray task complete */ 652 653 /* XXX free other data structures XXX */ 654 655 return (rv); 656 } 657 658 659 int 660 ehci_activate(device_ptr_t self, enum devact act) 661 { 662 struct ehci_softc *sc = (struct ehci_softc *)self; 663 int rv = 0; 664 665 switch (act) { 666 case DVACT_ACTIVATE: 667 return (EOPNOTSUPP); 668 break; 669 670 case DVACT_DEACTIVATE: 671 if (sc->sc_child != NULL) 672 rv = config_deactivate(sc->sc_child); 673 sc->sc_dying = 1; 674 break; 675 } 676 return (rv); 677 } 678 679 /* 680 * Handle suspend/resume. 681 * 682 * We need to switch to polling mode here, because this routine is 683 * called from an intterupt context. This is all right since we 684 * are almost suspended anyway. 685 */ 686 void 687 ehci_power(int why, void *v) 688 { 689 ehci_softc_t *sc = v; 690 //u_int32_t ctl; 691 int s; 692 693 #ifdef EHCI_DEBUG 694 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 695 ehci_dumpregs(sc); 696 #endif 697 698 s = splhardusb(); 699 switch (why) { 700 case PWR_SUSPEND: 701 case PWR_STANDBY: 702 sc->sc_bus.use_polling++; 703 #if 0 704 OOO 705 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 706 if (sc->sc_control == 0) { 707 /* 708 * Preserve register values, in case that APM BIOS 709 * does not recover them. 710 */ 711 sc->sc_control = ctl; 712 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 713 } 714 ctl |= EHCI_HCFS_SUSPEND; 715 OWRITE4(sc, EHCI_CONTROL, ctl); 716 #endif 717 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 718 sc->sc_bus.use_polling--; 719 break; 720 case PWR_RESUME: 721 sc->sc_bus.use_polling++; 722 #if 0 723 OOO 724 /* Some broken BIOSes do not recover these values */ 725 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 726 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 727 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 728 if (sc->sc_intre) 729 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 730 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 731 if (sc->sc_control) 732 ctl = sc->sc_control; 733 else 734 ctl = OREAD4(sc, EHCI_CONTROL); 735 ctl |= EHCI_HCFS_RESUME; 736 OWRITE4(sc, EHCI_CONTROL, ctl); 737 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 738 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 739 OWRITE4(sc, EHCI_CONTROL, ctl); 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 741 sc->sc_control = sc->sc_intre = 0; 742 #endif 743 sc->sc_bus.use_polling--; 744 break; 745 case PWR_SOFTSUSPEND: 746 case PWR_SOFTSTANDBY: 747 case PWR_SOFTRESUME: 748 break; 749 } 750 splx(s); 751 } 752 753 /* 754 * Shut down the controller when the system is going down. 755 */ 756 void 757 ehci_shutdown(void *v) 758 { 759 ehci_softc_t *sc = v; 760 761 DPRINTF(("ehci_shutdown: stopping the HC\n")); 762 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 763 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 764 } 765 766 usbd_status 767 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 768 { 769 struct ehci_softc *sc = (struct ehci_softc *)bus; 770 771 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 772 } 773 774 void 775 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 776 { 777 struct ehci_softc *sc = (struct ehci_softc *)bus; 778 779 usb_freemem(&sc->sc_bus, dma); 780 } 781 782 usbd_xfer_handle 783 ehci_allocx(struct usbd_bus *bus) 784 { 785 struct ehci_softc *sc = (struct ehci_softc *)bus; 786 usbd_xfer_handle xfer; 787 788 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 789 if (xfer != NULL) 790 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 791 else 792 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 793 if (xfer != NULL) 794 memset(xfer, 0, sizeof (struct ehci_xfer)); 795 return (xfer); 796 } 797 798 void 799 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 800 { 801 struct ehci_softc *sc = (struct ehci_softc *)bus; 802 803 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 804 } 805 806 Static void 807 ehci_device_clear_toggle(usbd_pipe_handle pipe) 808 { 809 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 810 811 printf("ehci_device_clear_toggle: epipe=%p\n", epipe); 812 #if 0 813 OOO 814 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 815 #endif 816 } 817 818 Static void 819 ehci_noop(usbd_pipe_handle pipe) 820 { 821 } 822 823 #ifdef EHCI_DEBUG 824 void 825 ehci_dumpregs(ehci_softc_t *sc) 826 { 827 int i; 828 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 829 EOREAD4(sc, EHCI_USBCMD), 830 EOREAD4(sc, EHCI_USBSTS), 831 EOREAD4(sc, EHCI_USBINTR)); 832 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 833 EOREAD4(sc, EHCI_FRINDEX), 834 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 835 EOREAD4(sc, EHCI_PERIODICLISTBASE), 836 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 837 for (i = 1; i <= sc->sc_noport; i++) 838 printf("port %d status=0x%08x\n", i, 839 EOREAD4(sc, EHCI_PORTSC(i))); 840 } 841 842 void 843 ehci_dump() 844 { 845 ehci_dumpregs(theehci); 846 } 847 848 void 849 ehci_dump_link(ehci_link_t link, int type) 850 { 851 link = le32toh(link); 852 printf("0x%08x", link); 853 if (link & EHCI_LINK_TERMINATE) 854 printf("<T>"); 855 else { 856 printf("<"); 857 if (type) { 858 switch (EHCI_LINK_TYPE(link)) { 859 case EHCI_LINK_ITD: printf("ITD"); break; 860 case EHCI_LINK_QH: printf("QH"); break; 861 case EHCI_LINK_SITD: printf("SITD"); break; 862 case EHCI_LINK_FSTN: printf("FSTN"); break; 863 } 864 } 865 printf(">"); 866 } 867 } 868 869 void 870 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 871 { 872 for (; sqtd; sqtd = sqtd->nextqtd) 873 ehci_dump_sqtd(sqtd); 874 } 875 876 void 877 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 878 { 879 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 880 ehci_dump_qtd(&sqtd->qtd); 881 } 882 883 void 884 ehci_dump_qtd(ehci_qtd_t *qtd) 885 { 886 u_int32_t s; 887 char sbuf[128]; 888 889 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 890 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 891 printf("\n"); 892 s = le32toh(qtd->qtd_status); 893 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 894 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 895 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 896 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 897 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 898 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 899 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 900 EHCI_QTD_GET_PID(s), sbuf); 901 for (s = 0; s < 5; s++) 902 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 903 } 904 905 void 906 ehci_dump_sqh(ehci_soft_qh_t *sqh) 907 { 908 ehci_qh_t *qh = &sqh->qh; 909 u_int32_t endp, endphub; 910 911 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 912 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 913 endp = le32toh(qh->qh_endp); 914 printf(" endp=0x%08x\n", endp); 915 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 916 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 917 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 918 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 919 printf(" mpl=0x%x ctl=%d nrl=%d\n", 920 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 921 EHCI_QH_GET_NRL(endp)); 922 endphub = le32toh(qh->qh_endphub); 923 printf(" endphub=0x%08x\n", endphub); 924 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 925 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 926 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 927 EHCI_QH_GET_MULT(endphub)); 928 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 929 printf("Overlay qTD:\n"); 930 ehci_dump_qtd(&qh->qh_qtd); 931 } 932 933 #endif 934 935 usbd_status 936 ehci_open(usbd_pipe_handle pipe) 937 { 938 usbd_device_handle dev = pipe->device; 939 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 940 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 941 u_int8_t addr = dev->address; 942 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 943 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 944 ehci_soft_qh_t *sqh; 945 usbd_status err; 946 #if 0 947 ehci_soft_itd_t *sitd; 948 ehci_physaddr_t tdphys; 949 u_int32_t fmt; 950 int ival; 951 #endif 952 int s; 953 int speed, naks; 954 955 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 956 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 957 958 if (addr == sc->sc_addr) { 959 switch (ed->bEndpointAddress) { 960 case USB_CONTROL_ENDPOINT: 961 pipe->methods = &ehci_root_ctrl_methods; 962 break; 963 case UE_DIR_IN | EHCI_INTR_ENDPT: 964 pipe->methods = &ehci_root_intr_methods; 965 break; 966 default: 967 return (USBD_INVAL); 968 } 969 return (USBD_NORMAL_COMPLETION); 970 } 971 972 switch (dev->speed) { 973 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 974 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 975 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 976 default: panic("ehci_open: bad device speed %d\n", dev->speed); 977 } 978 naks = 8; /* XXX */ 979 sqh = ehci_alloc_sqh(sc); 980 if (sqh == NULL) 981 goto bad0; 982 /* qh_link filled when the QH is added */ 983 sqh->qh.qh_endp = htole32( 984 EHCI_QH_SET_ADDR(addr) | 985 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 986 EHCI_QH_SET_EPS(speed) | /* XXX */ 987 /* XXX EHCI_QH_DTC ? */ 988 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 989 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 990 EHCI_QH_CTL : 0) | 991 EHCI_QH_SET_NRL(naks) 992 ); 993 sqh->qh.qh_endphub = htole32( 994 EHCI_QH_SET_MULT(1) 995 /* XXX TT stuff */ 996 /* XXX interrupt mask */ 997 ); 998 sqh->qh.qh_curqtd = EHCI_NULL; 999 /* Fill the overlay qTD */ 1000 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1001 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1002 sqh->qh.qh_qtd.qtd_status = htole32(0); 1003 1004 epipe->sqh = sqh; 1005 1006 switch (xfertype) { 1007 case UE_CONTROL: 1008 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1009 0, &epipe->u.ctl.reqdma); 1010 if (err) 1011 goto bad1; 1012 pipe->methods = &ehci_device_ctrl_methods; 1013 s = splusb(); 1014 ehci_add_qh(sqh, sc->sc_async_head); 1015 splx(s); 1016 break; 1017 case UE_BULK: 1018 pipe->methods = &ehci_device_bulk_methods; 1019 s = splusb(); 1020 ehci_add_qh(sqh, sc->sc_async_head); 1021 splx(s); 1022 break; 1023 default: 1024 return (USBD_INVAL); 1025 } 1026 return (USBD_NORMAL_COMPLETION); 1027 1028 bad1: 1029 ehci_free_sqh(sc, sqh); 1030 bad0: 1031 return (USBD_NOMEM); 1032 } 1033 1034 /* 1035 * Add an ED to the schedule. Called at splusb(). 1036 */ 1037 void 1038 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1039 { 1040 SPLUSBCHECK; 1041 1042 sqh->next = head->next; 1043 sqh->qh.qh_link = head->qh.qh_link; 1044 head->next = sqh; 1045 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1046 1047 #ifdef EHCI_DEBUG 1048 if (ehcidebug > 0) { 1049 printf("ehci_add_qh:\n"); 1050 ehci_dump_sqh(sqh); 1051 } 1052 #endif 1053 } 1054 1055 /* 1056 * Remove an ED from the schedule. Called at splusb(). 1057 */ 1058 void 1059 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1060 { 1061 ehci_soft_qh_t *p; 1062 1063 SPLUSBCHECK; 1064 /* XXX */ 1065 for (p = head; p == NULL && p->next != sqh; p = p->next) 1066 ; 1067 if (p == NULL) 1068 panic("ehci_rem_qh: ED not found\n"); 1069 p->next = sqh->next; 1070 p->qh.qh_link = sqh->qh.qh_link; 1071 1072 ehci_sync_hc(sc); 1073 } 1074 1075 /* 1076 * Ensure that the HC has released all references to the QH. We do this 1077 * by asking for a Async Advance Doorbell interrupt and then we wait for 1078 * the interrupt. 1079 * To make this easier we first obtain exclusive use of the doorbell. 1080 */ 1081 void 1082 ehci_sync_hc(ehci_softc_t *sc) 1083 { 1084 int s, error; 1085 1086 if (sc->sc_dying) { 1087 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1088 return; 1089 } 1090 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1091 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1092 s = splhardusb(); 1093 /* ask for doorbell */ 1094 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1095 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1096 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1097 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1098 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1099 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1100 splx(s); 1101 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1102 #ifdef DIAGNOSTIC 1103 if (error) 1104 printf("ehci_sync_hc: tsleep() = %d\n", error); 1105 #endif 1106 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1107 } 1108 1109 /***********/ 1110 1111 /* 1112 * Data structures and routines to emulate the root hub. 1113 */ 1114 Static usb_device_descriptor_t ehci_devd = { 1115 USB_DEVICE_DESCRIPTOR_SIZE, 1116 UDESC_DEVICE, /* type */ 1117 {0x00, 0x02}, /* USB version */ 1118 UDCLASS_HUB, /* class */ 1119 UDSUBCLASS_HUB, /* subclass */ 1120 UDPROTO_HSHUBSTT, /* protocol */ 1121 64, /* max packet */ 1122 {0},{0},{0x00,0x01}, /* device id */ 1123 1,2,0, /* string indicies */ 1124 1 /* # of configurations */ 1125 }; 1126 1127 Static usb_device_qualifier_t ehci_odevd = { 1128 USB_DEVICE_DESCRIPTOR_SIZE, 1129 UDESC_DEVICE_QUALIFIER, /* type */ 1130 {0x00, 0x02}, /* USB version */ 1131 UDCLASS_HUB, /* class */ 1132 UDSUBCLASS_HUB, /* subclass */ 1133 UDPROTO_FSHUB, /* protocol */ 1134 64, /* max packet */ 1135 1, /* # of configurations */ 1136 0 1137 }; 1138 1139 Static usb_config_descriptor_t ehci_confd = { 1140 USB_CONFIG_DESCRIPTOR_SIZE, 1141 UDESC_CONFIG, 1142 {USB_CONFIG_DESCRIPTOR_SIZE + 1143 USB_INTERFACE_DESCRIPTOR_SIZE + 1144 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1145 1, 1146 1, 1147 0, 1148 UC_SELF_POWERED, 1149 0 /* max power */ 1150 }; 1151 1152 Static usb_interface_descriptor_t ehci_ifcd = { 1153 USB_INTERFACE_DESCRIPTOR_SIZE, 1154 UDESC_INTERFACE, 1155 0, 1156 0, 1157 1, 1158 UICLASS_HUB, 1159 UISUBCLASS_HUB, 1160 UIPROTO_HSHUBSTT, 1161 0 1162 }; 1163 1164 Static usb_endpoint_descriptor_t ehci_endpd = { 1165 USB_ENDPOINT_DESCRIPTOR_SIZE, 1166 UDESC_ENDPOINT, 1167 UE_DIR_IN | EHCI_INTR_ENDPT, 1168 UE_INTERRUPT, 1169 {8, 0}, /* max packet */ 1170 255 1171 }; 1172 1173 Static usb_hub_descriptor_t ehci_hubd = { 1174 USB_HUB_DESCRIPTOR_SIZE, 1175 UDESC_HUB, 1176 0, 1177 {0,0}, 1178 0, 1179 0, 1180 {0}, 1181 }; 1182 1183 Static int 1184 ehci_str(p, l, s) 1185 usb_string_descriptor_t *p; 1186 int l; 1187 char *s; 1188 { 1189 int i; 1190 1191 if (l == 0) 1192 return (0); 1193 p->bLength = 2 * strlen(s) + 2; 1194 if (l == 1) 1195 return (1); 1196 p->bDescriptorType = UDESC_STRING; 1197 l -= 2; 1198 for (i = 0; s[i] && l > 1; i++, l -= 2) 1199 USETW2(p->bString[i], 0, s[i]); 1200 return (2*i+2); 1201 } 1202 1203 /* 1204 * Simulate a hardware hub by handling all the necessary requests. 1205 */ 1206 Static usbd_status 1207 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1208 { 1209 usbd_status err; 1210 1211 /* Insert last in queue. */ 1212 err = usb_insert_transfer(xfer); 1213 if (err) 1214 return (err); 1215 1216 /* Pipe isn't running, start first */ 1217 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1218 } 1219 1220 Static usbd_status 1221 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1222 { 1223 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1224 usb_device_request_t *req; 1225 void *buf = NULL; 1226 int port, i; 1227 int s, len, value, index, l, totlen = 0; 1228 usb_port_status_t ps; 1229 usb_hub_descriptor_t hubd; 1230 usbd_status err; 1231 u_int32_t v; 1232 1233 if (sc->sc_dying) 1234 return (USBD_IOERROR); 1235 1236 #ifdef DIAGNOSTIC 1237 if (!(xfer->rqflags & URQ_REQUEST)) 1238 /* XXX panic */ 1239 return (USBD_INVAL); 1240 #endif 1241 req = &xfer->request; 1242 1243 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1244 req->bmRequestType, req->bRequest)); 1245 1246 len = UGETW(req->wLength); 1247 value = UGETW(req->wValue); 1248 index = UGETW(req->wIndex); 1249 1250 if (len != 0) 1251 buf = KERNADDR(&xfer->dmabuf); 1252 1253 #define C(x,y) ((x) | ((y) << 8)) 1254 switch(C(req->bRequest, req->bmRequestType)) { 1255 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1256 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1257 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1258 /* 1259 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1260 * for the integrated root hub. 1261 */ 1262 break; 1263 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1264 if (len > 0) { 1265 *(u_int8_t *)buf = sc->sc_conf; 1266 totlen = 1; 1267 } 1268 break; 1269 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1270 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1271 switch(value >> 8) { 1272 case UDESC_DEVICE: 1273 if ((value & 0xff) != 0) { 1274 err = USBD_IOERROR; 1275 goto ret; 1276 } 1277 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1278 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1279 memcpy(buf, &ehci_devd, l); 1280 break; 1281 /* 1282 * We can't really operate at another speed, but the spec says 1283 * we need this descriptor. 1284 */ 1285 case UDESC_DEVICE_QUALIFIER: 1286 if ((value & 0xff) != 0) { 1287 err = USBD_IOERROR; 1288 goto ret; 1289 } 1290 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1291 memcpy(buf, &ehci_odevd, l); 1292 break; 1293 /* 1294 * We can't really operate at another speed, but the spec says 1295 * we need this descriptor. 1296 */ 1297 case UDESC_OTHER_SPEED_CONFIGURATION: 1298 case UDESC_CONFIG: 1299 if ((value & 0xff) != 0) { 1300 err = USBD_IOERROR; 1301 goto ret; 1302 } 1303 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1304 memcpy(buf, &ehci_confd, l); 1305 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1306 value >> 8; 1307 buf = (char *)buf + l; 1308 len -= l; 1309 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1310 totlen += l; 1311 memcpy(buf, &ehci_ifcd, l); 1312 buf = (char *)buf + l; 1313 len -= l; 1314 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1315 totlen += l; 1316 memcpy(buf, &ehci_endpd, l); 1317 break; 1318 case UDESC_STRING: 1319 if (len == 0) 1320 break; 1321 *(u_int8_t *)buf = 0; 1322 totlen = 1; 1323 switch (value & 0xff) { 1324 case 1: /* Vendor */ 1325 totlen = ehci_str(buf, len, sc->sc_vendor); 1326 break; 1327 case 2: /* Product */ 1328 totlen = ehci_str(buf, len, "EHCI root hub"); 1329 break; 1330 } 1331 break; 1332 default: 1333 err = USBD_IOERROR; 1334 goto ret; 1335 } 1336 break; 1337 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1338 if (len > 0) { 1339 *(u_int8_t *)buf = 0; 1340 totlen = 1; 1341 } 1342 break; 1343 case C(UR_GET_STATUS, UT_READ_DEVICE): 1344 if (len > 1) { 1345 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1346 totlen = 2; 1347 } 1348 break; 1349 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1350 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1351 if (len > 1) { 1352 USETW(((usb_status_t *)buf)->wStatus, 0); 1353 totlen = 2; 1354 } 1355 break; 1356 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1357 if (value >= USB_MAX_DEVICES) { 1358 err = USBD_IOERROR; 1359 goto ret; 1360 } 1361 sc->sc_addr = value; 1362 break; 1363 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1364 if (value != 0 && value != 1) { 1365 err = USBD_IOERROR; 1366 goto ret; 1367 } 1368 sc->sc_conf = value; 1369 break; 1370 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1371 break; 1372 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1373 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1374 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1375 err = USBD_IOERROR; 1376 goto ret; 1377 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1378 break; 1379 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1380 break; 1381 /* Hub requests */ 1382 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1383 break; 1384 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1385 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1386 "port=%d feature=%d\n", 1387 index, value)); 1388 if (index < 1 || index > sc->sc_noport) { 1389 err = USBD_IOERROR; 1390 goto ret; 1391 } 1392 port = EHCI_PORTSC(index); 1393 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1394 switch(value) { 1395 case UHF_PORT_ENABLE: 1396 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1397 break; 1398 case UHF_PORT_SUSPEND: 1399 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1400 break; 1401 case UHF_PORT_POWER: 1402 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1403 break; 1404 case UHF_PORT_TEST: 1405 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1406 "%d\n", index)); 1407 break; 1408 case UHF_PORT_INDICATOR: 1409 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1410 "%d\n", index)); 1411 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1412 break; 1413 case UHF_C_PORT_CONNECTION: 1414 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1415 break; 1416 case UHF_C_PORT_ENABLE: 1417 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1418 break; 1419 case UHF_C_PORT_SUSPEND: 1420 /* how? */ 1421 break; 1422 case UHF_C_PORT_OVER_CURRENT: 1423 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1424 break; 1425 case UHF_C_PORT_RESET: 1426 sc->sc_isreset = 0; 1427 break; 1428 default: 1429 err = USBD_IOERROR; 1430 goto ret; 1431 } 1432 #if 0 1433 switch(value) { 1434 case UHF_C_PORT_CONNECTION: 1435 case UHF_C_PORT_ENABLE: 1436 case UHF_C_PORT_SUSPEND: 1437 case UHF_C_PORT_OVER_CURRENT: 1438 case UHF_C_PORT_RESET: 1439 /* Enable RHSC interrupt if condition is cleared. */ 1440 if ((OREAD4(sc, port) >> 16) == 0) 1441 ehci_pcd_able(sc, 1); 1442 break; 1443 default: 1444 break; 1445 } 1446 #endif 1447 break; 1448 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1449 if (value != 0) { 1450 err = USBD_IOERROR; 1451 goto ret; 1452 } 1453 hubd = ehci_hubd; 1454 hubd.bNbrPorts = sc->sc_noport; 1455 v = EOREAD4(sc, EHCI_HCSPARAMS); 1456 USETW(hubd.wHubCharacteristics, 1457 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1458 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1459 ? UHD_PORT_IND : 0); 1460 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1461 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1462 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1463 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1464 l = min(len, hubd.bDescLength); 1465 totlen = l; 1466 memcpy(buf, &hubd, l); 1467 break; 1468 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1469 if (len != 4) { 1470 err = USBD_IOERROR; 1471 goto ret; 1472 } 1473 memset(buf, 0, len); /* ? XXX */ 1474 totlen = len; 1475 break; 1476 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1477 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1478 index)); 1479 if (index < 1 || index > sc->sc_noport) { 1480 err = USBD_IOERROR; 1481 goto ret; 1482 } 1483 if (len != 4) { 1484 err = USBD_IOERROR; 1485 goto ret; 1486 } 1487 v = EOREAD4(sc, EHCI_PORTSC(index)); 1488 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1489 v)); 1490 i = UPS_HIGH_SPEED; 1491 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1492 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1493 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1494 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1495 if (v & EHCI_PS_PR) i |= UPS_RESET; 1496 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1497 USETW(ps.wPortStatus, i); 1498 i = 0; 1499 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1500 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1501 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1502 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1503 USETW(ps.wPortChange, i); 1504 l = min(len, sizeof ps); 1505 memcpy(buf, &ps, l); 1506 totlen = l; 1507 break; 1508 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1509 err = USBD_IOERROR; 1510 goto ret; 1511 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1512 break; 1513 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1514 if (index < 1 || index > sc->sc_noport) { 1515 err = USBD_IOERROR; 1516 goto ret; 1517 } 1518 port = EHCI_PORTSC(index); 1519 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1520 switch(value) { 1521 case UHF_PORT_ENABLE: 1522 EOWRITE4(sc, port, v | EHCI_PS_PE); 1523 break; 1524 case UHF_PORT_SUSPEND: 1525 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1526 break; 1527 case UHF_PORT_RESET: 1528 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1529 index)); 1530 if (EHCI_PS_IS_LOWSPEED(v)) { 1531 /* Low speed device, give up ownership. */ 1532 ehci_disown(sc, index, 1); 1533 break; 1534 } 1535 /* Start reset sequence. */ 1536 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1537 EOWRITE4(sc, port, v | EHCI_PS_PR); 1538 /* Wait for reset to complete. */ 1539 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1540 /* Terminate reset sequence. */ 1541 EOWRITE4(sc, port, v); 1542 /* Wait for HC to complete reset. */ 1543 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1544 v = EOREAD4(sc, port); 1545 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1546 if (v & EHCI_PS_PR) { 1547 printf("%s: port reset timeout\n", 1548 USBDEVNAME(sc->sc_bus.bdev)); 1549 return (USBD_TIMEOUT); 1550 } 1551 if (!(v & EHCI_PS_PE)) { 1552 /* Not a high speed device, give up ownership.*/ 1553 ehci_disown(sc, index, 0); 1554 break; 1555 } 1556 sc->sc_isreset = 1; 1557 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1558 index, v)); 1559 break; 1560 case UHF_PORT_POWER: 1561 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1562 "%d\n", index)); 1563 EOWRITE4(sc, port, v | EHCI_PS_PP); 1564 break; 1565 case UHF_PORT_TEST: 1566 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1567 "%d\n", index)); 1568 break; 1569 case UHF_PORT_INDICATOR: 1570 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1571 "%d\n", index)); 1572 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1573 break; 1574 default: 1575 err = USBD_IOERROR; 1576 goto ret; 1577 } 1578 break; 1579 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1580 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1581 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1582 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1583 break; 1584 default: 1585 err = USBD_IOERROR; 1586 goto ret; 1587 } 1588 xfer->actlen = totlen; 1589 err = USBD_NORMAL_COMPLETION; 1590 ret: 1591 xfer->status = err; 1592 s = splusb(); 1593 usb_transfer_complete(xfer); 1594 splx(s); 1595 return (USBD_IN_PROGRESS); 1596 } 1597 1598 void 1599 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1600 { 1601 int i, port; 1602 u_int32_t v; 1603 1604 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1605 #ifdef DIAGNOSTIC 1606 if (sc->sc_npcomp != 0) { 1607 i = (index-1) / sc->sc_npcomp; 1608 if (i >= sc->sc_ncomp) 1609 printf("%s: strange port\n", 1610 USBDEVNAME(sc->sc_bus.bdev)); 1611 else 1612 printf("%s: handing over %s speed device on " 1613 "port %d to %s\n", 1614 USBDEVNAME(sc->sc_bus.bdev), 1615 lowspeed ? "low" : "full", 1616 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1617 } else { 1618 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1619 } 1620 #endif 1621 port = EHCI_PORTSC(index); 1622 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1623 EOWRITE4(sc, port, v | EHCI_PS_PO); 1624 } 1625 1626 /* Abort a root control request. */ 1627 Static void 1628 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1629 { 1630 /* Nothing to do, all transfers are synchronous. */ 1631 } 1632 1633 /* Close the root pipe. */ 1634 Static void 1635 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1636 { 1637 DPRINTF(("ehci_root_ctrl_close\n")); 1638 /* Nothing to do. */ 1639 } 1640 1641 void 1642 ehci_root_intr_done(usbd_xfer_handle xfer) 1643 { 1644 xfer->hcpriv = NULL; 1645 } 1646 1647 Static usbd_status 1648 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1649 { 1650 usbd_status err; 1651 1652 /* Insert last in queue. */ 1653 err = usb_insert_transfer(xfer); 1654 if (err) 1655 return (err); 1656 1657 /* Pipe isn't running, start first */ 1658 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1659 } 1660 1661 Static usbd_status 1662 ehci_root_intr_start(usbd_xfer_handle xfer) 1663 { 1664 usbd_pipe_handle pipe = xfer->pipe; 1665 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1666 1667 if (sc->sc_dying) 1668 return (USBD_IOERROR); 1669 1670 sc->sc_intrxfer = xfer; 1671 1672 return (USBD_IN_PROGRESS); 1673 } 1674 1675 /* Abort a root interrupt request. */ 1676 Static void 1677 ehci_root_intr_abort(usbd_xfer_handle xfer) 1678 { 1679 int s; 1680 1681 if (xfer->pipe->intrxfer == xfer) { 1682 DPRINTF(("ehci_root_intr_abort: remove\n")); 1683 xfer->pipe->intrxfer = NULL; 1684 } 1685 xfer->status = USBD_CANCELLED; 1686 s = splusb(); 1687 usb_transfer_complete(xfer); 1688 splx(s); 1689 } 1690 1691 /* Close the root pipe. */ 1692 Static void 1693 ehci_root_intr_close(usbd_pipe_handle pipe) 1694 { 1695 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1696 1697 DPRINTF(("ehci_root_intr_close\n")); 1698 1699 sc->sc_intrxfer = NULL; 1700 } 1701 1702 void 1703 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1704 { 1705 xfer->hcpriv = NULL; 1706 } 1707 1708 /************************/ 1709 1710 ehci_soft_qh_t * 1711 ehci_alloc_sqh(ehci_softc_t *sc) 1712 { 1713 ehci_soft_qh_t *sqh; 1714 usbd_status err; 1715 int i, offs; 1716 usb_dma_t dma; 1717 1718 if (sc->sc_freeqhs == NULL) { 1719 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1720 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1721 EHCI_PAGE_SIZE, &dma); 1722 if (err) 1723 return (NULL); 1724 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1725 offs = i * EHCI_SQH_SIZE; 1726 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1727 sqh->physaddr = DMAADDR(&dma) + offs; 1728 sqh->next = sc->sc_freeqhs; 1729 sc->sc_freeqhs = sqh; 1730 } 1731 } 1732 sqh = sc->sc_freeqhs; 1733 sc->sc_freeqhs = sqh->next; 1734 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1735 sqh->next = NULL; 1736 return (sqh); 1737 } 1738 1739 void 1740 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1741 { 1742 sqh->next = sc->sc_freeqhs; 1743 sc->sc_freeqhs = sqh; 1744 } 1745 1746 ehci_soft_qtd_t * 1747 ehci_alloc_sqtd(ehci_softc_t *sc) 1748 { 1749 ehci_soft_qtd_t *sqtd; 1750 usbd_status err; 1751 int i, offs; 1752 usb_dma_t dma; 1753 int s; 1754 1755 if (sc->sc_freeqtds == NULL) { 1756 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1757 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1758 EHCI_PAGE_SIZE, &dma); 1759 if (err) 1760 return (NULL); 1761 s = splusb(); 1762 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1763 offs = i * EHCI_SQTD_SIZE; 1764 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1765 sqtd->physaddr = DMAADDR(&dma) + offs; 1766 sqtd->nextqtd = sc->sc_freeqtds; 1767 sc->sc_freeqtds = sqtd; 1768 } 1769 splx(s); 1770 } 1771 1772 s = splusb(); 1773 sqtd = sc->sc_freeqtds; 1774 sc->sc_freeqtds = sqtd->nextqtd; 1775 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1776 sqtd->nextqtd = NULL; 1777 sqtd->xfer = NULL; 1778 splx(s); 1779 1780 return (sqtd); 1781 } 1782 1783 void 1784 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1785 { 1786 int s; 1787 1788 s = splusb(); 1789 sqtd->nextqtd = sc->sc_freeqtds; 1790 sc->sc_freeqtds = sqtd; 1791 splx(s); 1792 } 1793 1794 usbd_status 1795 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 1796 int alen, int rd, usbd_xfer_handle xfer, 1797 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 1798 { 1799 ehci_soft_qtd_t *next, *cur; 1800 ehci_physaddr_t dataphys, dataphysend, nextphys; 1801 u_int32_t qtdstatus; 1802 int len, curlen; 1803 int i; 1804 usb_dma_t *dma = &xfer->dmabuf; 1805 1806 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen)); 1807 1808 len = alen; 1809 dataphys = DMAADDR(dma); 1810 dataphysend = EHCI_PAGE(dataphys + len - 1); 1811 qtdstatus = htole32( 1812 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 1813 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 1814 EHCI_QTD_SET_CERR(3) 1815 /* IOC set below */ 1816 /* BYTES set below */ 1817 /* XXX Data toggle */ 1818 ); 1819 1820 cur = ehci_alloc_sqtd(sc); 1821 if (cur == NULL) 1822 goto nomem; 1823 *sp = cur; 1824 for (;;) { 1825 /* The EHCI hardware can handle at most 4 page crossings. */ 1826 if (EHCI_PAGE(dataphys) == dataphysend || 1827 EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE 1828 == dataphysend) { 1829 /* we can handle it in this QTD */ 1830 curlen = len; 1831 } else { 1832 #if 0 1833 /* must use multiple TDs, fill as much as possible. */ 1834 curlen = 2 * EHCI_PAGE_SIZE - 1835 (dataphys & (EHCI_PAGE_SIZE-1)); 1836 /* the length must be a multiple of the max size */ 1837 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 1838 #ifdef DIAGNOSTIC 1839 if (curlen == 0) 1840 panic("ehci_alloc_std: curlen == 0\n"); 1841 #endif 1842 #else 1843 printf("ehci_alloc_std_chain: multiple QTDs\n"); 1844 return (USBD_NOMEM); 1845 #endif 1846 } 1847 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x " 1848 "dataphysend=0x%08x len=%d curlen=%d\n", 1849 dataphys, dataphysend, 1850 len, curlen)); 1851 len -= curlen; 1852 1853 if (len != 0) { 1854 next = ehci_alloc_sqtd(sc); 1855 if (next == NULL) 1856 goto nomem; 1857 nextphys = next->physaddr; 1858 } else { 1859 next = NULL; 1860 nextphys = EHCI_NULL; 1861 } 1862 1863 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 1864 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 1865 if (i != 0) /* use offset only in first buffer */ 1866 a = EHCI_PAGE(a); 1867 cur->qtd.qtd_buffer[i] = htole32(a); 1868 } 1869 cur->nextqtd = next; 1870 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 1871 cur->qtd.qtd_status = 1872 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 1873 cur->xfer = xfer; 1874 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 1875 dataphys, dataphys + curlen - 1)); 1876 if (len == 0) 1877 break; 1878 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n")); 1879 dataphys += curlen; 1880 cur = next; 1881 } 1882 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 1883 *ep = cur; 1884 1885 return (USBD_NORMAL_COMPLETION); 1886 1887 nomem: 1888 /* XXX free chain */ 1889 return (USBD_NOMEM); 1890 } 1891 1892 /****************/ 1893 1894 /* 1895 * Close a reqular pipe. 1896 * Assumes that there are no pending transactions. 1897 */ 1898 void 1899 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 1900 { 1901 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1902 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1903 ehci_soft_qh_t *sqh = epipe->sqh; 1904 int s; 1905 1906 s = splusb(); 1907 ehci_rem_qh(sc, sqh, head); 1908 splx(s); 1909 ehci_free_sqh(sc, epipe->sqh); 1910 } 1911 1912 /* 1913 * Abort a device request. 1914 * If this routine is called at splusb() it guarantees that the request 1915 * will be removed from the hardware scheduling and that the callback 1916 * for it will be called with USBD_CANCELLED status. 1917 * It's impossible to guarantee that the requested transfer will not 1918 * have happened since the hardware runs concurrently. 1919 * If the transaction has already happened we rely on the ordinary 1920 * interrupt processing to process it. 1921 */ 1922 void 1923 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1924 { 1925 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 1926 ehci_soft_qh_t *sqh = epipe->sqh; 1927 #if 0 1928 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 1929 ehci_soft_td_t *p, *n; 1930 ehci_physaddr_t headp; 1931 int hit; 1932 #endif 1933 int s; 1934 1935 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 1936 1937 if (xfer->device->bus->intr_context || !curproc) 1938 panic("ehci_abort_xfer: not in process context\n"); 1939 1940 /* 1941 * Step 1: Make interrupt routine and hardware ignore xfer. 1942 */ 1943 s = splusb(); 1944 xfer->status = status; /* make software ignore it */ 1945 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 1946 splx(s); 1947 /* XXX */ 1948 1949 /* 1950 * Step 2: Wait until we know hardware has finished any possible 1951 * use of the xfer. Also make sure the soft interrupt routine 1952 * has run. 1953 */ 1954 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 1955 /* XXX should have some communication with softintr() to know 1956 when it's done */ 1957 usb_delay_ms(epipe->pipe.device->bus, 250); 1958 1959 /* 1960 * Step 3: Remove any vestiges of the xfer from the hardware. 1961 * The complication here is that the hardware may have executed 1962 * beyond the xfer we're trying to abort. So as we're scanning 1963 * the TDs of this xfer we check if the hardware points to 1964 * any of them. 1965 */ 1966 s = splusb(); /* XXX why? */ 1967 /* XXX */ 1968 1969 /* 1970 * Step 4: Turn on hardware again. 1971 */ 1972 /* XXX */ 1973 1974 /* 1975 * Step 5: Execute callback. 1976 */ 1977 usb_transfer_complete(xfer); 1978 1979 splx(s); 1980 } 1981 1982 void 1983 ehci_timeout(void *addr) 1984 { 1985 struct ehci_xfer *exfer = addr; 1986 1987 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 1988 1989 /* Execute the abort in a process context. */ 1990 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 1991 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 1992 } 1993 1994 void 1995 ehci_timeout_task(void *addr) 1996 { 1997 usbd_xfer_handle xfer = addr; 1998 int s; 1999 2000 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2001 2002 s = splusb(); 2003 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2004 splx(s); 2005 } 2006 2007 /************************/ 2008 2009 Static usbd_status 2010 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2011 { 2012 usbd_status err; 2013 2014 /* Insert last in queue. */ 2015 err = usb_insert_transfer(xfer); 2016 if (err) 2017 return (err); 2018 2019 /* Pipe isn't running, start first */ 2020 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2021 } 2022 2023 Static usbd_status 2024 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2025 { 2026 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2027 usbd_status err; 2028 2029 if (sc->sc_dying) 2030 return (USBD_IOERROR); 2031 2032 #ifdef DIAGNOSTIC 2033 if (!(xfer->rqflags & URQ_REQUEST)) { 2034 /* XXX panic */ 2035 printf("ehci_device_ctrl_transfer: not a request\n"); 2036 return (USBD_INVAL); 2037 } 2038 #endif 2039 2040 err = ehci_device_request(xfer); 2041 if (err) 2042 return (err); 2043 2044 if (sc->sc_bus.use_polling) 2045 ehci_waitintr(sc, xfer); 2046 return (USBD_IN_PROGRESS); 2047 } 2048 2049 void 2050 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2051 { 2052 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2053 2054 #ifdef DIAGNOSTIC 2055 if (!(xfer->rqflags & URQ_REQUEST)) { 2056 panic("ehci_ctrl_done: not a request\n"); 2057 } 2058 #endif 2059 xfer->hcpriv = NULL; 2060 } 2061 2062 /* Abort a device control request. */ 2063 Static void 2064 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2065 { 2066 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2067 ehci_abort_xfer(xfer, USBD_CANCELLED); 2068 } 2069 2070 /* Close a device control pipe. */ 2071 Static void 2072 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2073 { 2074 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2075 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2076 2077 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2078 ehci_close_pipe(pipe, sc->sc_async_head); 2079 /*ehci_free_std(sc, epipe->tail.td);*/ 2080 } 2081 2082 usbd_status 2083 ehci_device_request(usbd_xfer_handle xfer) 2084 { 2085 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2086 usb_device_request_t *req = &xfer->request; 2087 usbd_device_handle dev = epipe->pipe.device; 2088 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2089 int addr = dev->address; 2090 ehci_soft_qtd_t *setup, *stat, *next; 2091 ehci_soft_qh_t *sqh; 2092 int isread; 2093 int len; 2094 usbd_status err; 2095 int s; 2096 2097 isread = req->bmRequestType & UT_READ; 2098 len = UGETW(req->wLength); 2099 2100 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2101 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2102 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2103 UGETW(req->wIndex), len, addr, 2104 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2105 2106 setup = ehci_alloc_sqtd(sc); 2107 if (setup == NULL) { 2108 err = USBD_NOMEM; 2109 goto bad1; 2110 } 2111 stat = ehci_alloc_sqtd(sc); 2112 if (stat == NULL) { 2113 err = USBD_NOMEM; 2114 goto bad2; 2115 } 2116 2117 sqh = epipe->sqh; 2118 epipe->u.ctl.length = len; 2119 2120 /* XXX 2121 * Since we're messing with the QH we must know the HC is in sync. 2122 * This needs to go away since it slows down control transfers. 2123 * Removing it entails: 2124 * - fill the QH only once with addr & wMaxPacketSize 2125 * - put the correct data toggles in the qtds and set DTC 2126 */ 2127 /* ehci_sync_hc(sc); */ 2128 /* Update device address and length since they may have changed. */ 2129 /* XXX This only needs to be done once, but it's too early in open. */ 2130 /* XXXX Should not touch ED here! */ 2131 sqh->qh.qh_endp = 2132 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2133 htole32( 2134 EHCI_QH_SET_ADDR(addr) | 2135 /* EHCI_QH_DTC | */ 2136 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2137 ); 2138 /* Clear toggle */ 2139 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2140 2141 /* Set up data transaction */ 2142 if (len != 0) { 2143 ehci_soft_qtd_t *end; 2144 2145 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, 2146 &next, &end); 2147 if (err) 2148 goto bad3; 2149 end->nextqtd = stat; 2150 end->qtd.qtd_next = 2151 end->qtd.qtd_altnext = htole32(stat->physaddr); 2152 /* Start toggle at 1. */ 2153 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2154 } else { 2155 next = stat; 2156 } 2157 2158 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req); 2159 2160 setup->qtd.qtd_status = htole32( 2161 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2162 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2163 EHCI_QTD_SET_CERR(3) | 2164 EHCI_QTD_SET_BYTES(sizeof *req) 2165 ); 2166 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma)); 2167 setup->nextqtd = next; 2168 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2169 setup->xfer = xfer; 2170 2171 stat->qtd.qtd_status = htole32( 2172 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2173 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2174 EHCI_QTD_SET_CERR(3) | 2175 EHCI_QTD_IOC 2176 ); 2177 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2178 stat->nextqtd = NULL; 2179 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2180 stat->xfer = xfer; 2181 2182 #ifdef EHCI_DEBUG 2183 if (ehcidebug > 2) { 2184 DPRINTF(("ehci_device_request:\n")); 2185 ehci_dump_sqh(sqh); 2186 ehci_dump_sqtds(setup); 2187 } 2188 #endif 2189 2190 /* Insert qTD in QH list. */ 2191 s = splusb(); 2192 sqh->qh.qh_curqtd = 0; 2193 sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr); 2194 sqh->sqtd = setup; 2195 if (xfer->timeout && !sc->sc_bus.use_polling) { 2196 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2197 ehci_timeout, xfer); 2198 } 2199 splx(s); 2200 2201 #if 1 2202 if (ehcidebug > 10) { 2203 delay(10000); 2204 DPRINTF(("ehci_device_request: status=%x\n", 2205 EOREAD4(sc, EHCI_USBSTS))); 2206 ehci_dumpregs(sc); 2207 ehci_dump_sqh(sc->sc_async_head); 2208 ehci_dump_sqh(sqh); 2209 ehci_dump_sqtds(setup); 2210 } 2211 #endif 2212 2213 return (USBD_NORMAL_COMPLETION); 2214 2215 bad3: 2216 ehci_free_sqtd(sc, stat); 2217 bad2: 2218 ehci_free_sqtd(sc, setup); 2219 bad1: 2220 return (err); 2221 } 2222 2223 /************************/ 2224 2225 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2226 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2227 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 2228 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 2229 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 2230 2231 /************************/ 2232 2233 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2234 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2235 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2236 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2237 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2238 2239 /************************/ 2240 2241 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2242 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2243 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2244 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2245 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2246
Indexes created Thu Sep 25 16:09:42 GMT 2025