ehci.c revision 1.18
1 /* TODO 2 Add intrinfo. 3 */ 4 /* $NetBSD: ehci.c,v 1.18 2001/11/21 12:28:23 augustss Exp $ */ 5 6 /* 7 * Copyright (c) 2001 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by Lennart Augustsson (lennart (at) augustsson.net). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 44 * 45 * The EHCI 0.96 spec can be found at 46 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 47 * and the USB 2.0 spec at 48 * http://www.usb.org/developers/data/usb_20.zip 49 * 50 */ 51 52 #include <sys/cdefs.h> 53 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.18 2001/11/21 12:28:23 augustss Exp $"); 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/kernel.h> 58 #include <sys/malloc.h> 59 #include <sys/device.h> 60 #include <sys/select.h> 61 #include <sys/proc.h> 62 #include <sys/queue.h> 63 64 #include <machine/bus.h> 65 #include <machine/endian.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 #include <dev/usb/usbdivar.h> 70 #include <dev/usb/usb_mem.h> 71 #include <dev/usb/usb_quirks.h> 72 73 #include <dev/usb/ehcireg.h> 74 #include <dev/usb/ehcivar.h> 75 76 #ifdef EHCI_DEBUG 77 #define DPRINTF(x) if (ehcidebug) printf x 78 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 79 int ehcidebug = 0; 80 #ifndef __NetBSD__ 81 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 82 #endif 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n,x) 86 #endif 87 88 struct ehci_pipe { 89 struct usbd_pipe pipe; 90 ehci_soft_qh_t *sqh; 91 union { 92 ehci_soft_qtd_t *qtd; 93 /* ehci_soft_itd_t *itd; */ 94 } tail; 95 union { 96 /* Control pipe */ 97 struct { 98 usb_dma_t reqdma; 99 u_int length; 100 ehci_soft_qtd_t *setup, *data, *stat; 101 } ctl; 102 /* Interrupt pipe */ 103 /* XXX */ 104 /* Bulk pipe */ 105 struct { 106 u_int length; 107 int isread; 108 } bulk; 109 /* Iso pipe */ 110 /* XXX */ 111 } u; 112 }; 113 114 Static void ehci_shutdown(void *); 115 Static void ehci_power(int, void *); 116 117 Static usbd_status ehci_open(usbd_pipe_handle); 118 Static void ehci_poll(struct usbd_bus *); 119 Static void ehci_softintr(void *); 120 Static int ehci_intr1(ehci_softc_t *); 121 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 122 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 123 Static void ehci_idone(struct ehci_xfer *); 124 Static void ehci_timeout(void *); 125 Static void ehci_timeout_task(void *); 126 127 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 128 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 129 130 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 131 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 132 133 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 134 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 135 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 136 Static void ehci_root_ctrl_close(usbd_pipe_handle); 137 Static void ehci_root_ctrl_done(usbd_xfer_handle); 138 139 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 140 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 141 Static void ehci_root_intr_abort(usbd_xfer_handle); 142 Static void ehci_root_intr_close(usbd_pipe_handle); 143 Static void ehci_root_intr_done(usbd_xfer_handle); 144 145 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 146 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 147 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 148 Static void ehci_device_ctrl_close(usbd_pipe_handle); 149 Static void ehci_device_ctrl_done(usbd_xfer_handle); 150 151 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 152 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 153 Static void ehci_device_bulk_abort(usbd_xfer_handle); 154 Static void ehci_device_bulk_close(usbd_pipe_handle); 155 Static void ehci_device_bulk_done(usbd_xfer_handle); 156 157 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 158 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 159 Static void ehci_device_intr_abort(usbd_xfer_handle); 160 Static void ehci_device_intr_close(usbd_pipe_handle); 161 Static void ehci_device_intr_done(usbd_xfer_handle); 162 163 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 164 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 165 Static void ehci_device_isoc_abort(usbd_xfer_handle); 166 Static void ehci_device_isoc_close(usbd_pipe_handle); 167 Static void ehci_device_isoc_done(usbd_xfer_handle); 168 169 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 170 Static void ehci_noop(usbd_pipe_handle pipe); 171 172 Static int ehci_str(usb_string_descriptor_t *, int, char *); 173 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 174 Static void ehci_pcd_able(ehci_softc_t *, int); 175 Static void ehci_pcd_enable(void *); 176 Static void ehci_disown(ehci_softc_t *, int, int); 177 178 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 179 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 180 181 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 182 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 183 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *, 184 ehci_softc_t *, int, int, usbd_xfer_handle, 185 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 186 Static void ehci_free_std_chain(ehci_softc_t *, ehci_soft_qtd_t *, 187 ehci_soft_qtd_t *); 188 189 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 190 191 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 192 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 193 ehci_soft_qh_t *); 194 Static void ehci_sync_hc(ehci_softc_t *); 195 196 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 197 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 198 199 #ifdef EHCI_DEBUG 200 Static void ehci_dump_regs(ehci_softc_t *); 201 Static void ehci_dump(void); 202 Static ehci_softc_t *theehci; 203 Static void ehci_dump_link(ehci_link_t, int); 204 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 205 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 206 Static void ehci_dump_qtd(ehci_qtd_t *); 207 Static void ehci_dump_sqh(ehci_soft_qh_t *); 208 Static void ehci_dump_exfer(struct ehci_xfer *); 209 #endif 210 211 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 212 213 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 214 215 #define EHCI_INTR_ENDPT 1 216 217 #define ehci_add_intr_list(sc, ex) \ 218 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 219 #define ehci_del_intr_list(ex) \ 220 LIST_REMOVE((ex), inext) 221 222 Static struct usbd_bus_methods ehci_bus_methods = { 223 ehci_open, 224 ehci_softintr, 225 ehci_poll, 226 ehci_allocm, 227 ehci_freem, 228 ehci_allocx, 229 ehci_freex, 230 }; 231 232 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 233 ehci_root_ctrl_transfer, 234 ehci_root_ctrl_start, 235 ehci_root_ctrl_abort, 236 ehci_root_ctrl_close, 237 ehci_noop, 238 ehci_root_ctrl_done, 239 }; 240 241 Static struct usbd_pipe_methods ehci_root_intr_methods = { 242 ehci_root_intr_transfer, 243 ehci_root_intr_start, 244 ehci_root_intr_abort, 245 ehci_root_intr_close, 246 ehci_noop, 247 ehci_root_intr_done, 248 }; 249 250 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 251 ehci_device_ctrl_transfer, 252 ehci_device_ctrl_start, 253 ehci_device_ctrl_abort, 254 ehci_device_ctrl_close, 255 ehci_noop, 256 ehci_device_ctrl_done, 257 }; 258 259 Static struct usbd_pipe_methods ehci_device_intr_methods = { 260 ehci_device_intr_transfer, 261 ehci_device_intr_start, 262 ehci_device_intr_abort, 263 ehci_device_intr_close, 264 ehci_device_clear_toggle, 265 ehci_device_intr_done, 266 }; 267 268 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 269 ehci_device_bulk_transfer, 270 ehci_device_bulk_start, 271 ehci_device_bulk_abort, 272 ehci_device_bulk_close, 273 ehci_device_clear_toggle, 274 ehci_device_bulk_done, 275 }; 276 277 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 278 ehci_device_isoc_transfer, 279 ehci_device_isoc_start, 280 ehci_device_isoc_abort, 281 ehci_device_isoc_close, 282 ehci_noop, 283 ehci_device_isoc_done, 284 }; 285 286 usbd_status 287 ehci_init(ehci_softc_t *sc) 288 { 289 u_int32_t version, sparams, cparams, hcr; 290 u_int i; 291 usbd_status err; 292 ehci_soft_qh_t *sqh; 293 294 DPRINTF(("ehci_init: start\n")); 295 #ifdef EHCI_DEBUG 296 theehci = sc; 297 #endif 298 299 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 300 301 version = EREAD2(sc, EHCI_HCIVERSION); 302 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 303 version >> 8, version & 0xff); 304 305 sparams = EREAD4(sc, EHCI_HCSPARAMS); 306 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 307 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 308 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 309 printf("%s: wrong number of companions (%d != %d)\n", 310 USBDEVNAME(sc->sc_bus.bdev), 311 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 312 return (USBD_IOERROR); 313 } 314 if (sc->sc_ncomp > 0) { 315 printf("%s: companion controller%s, %d port%s each:", 316 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 317 EHCI_HCS_N_PCC(sparams), 318 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 319 for (i = 0; i < sc->sc_ncomp; i++) 320 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 321 printf("\n"); 322 } 323 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 324 cparams = EREAD4(sc, EHCI_HCCPARAMS); 325 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 326 327 sc->sc_bus.usbrev = USBREV_2_0; 328 329 /* Reset the controller */ 330 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 331 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 332 usb_delay_ms(&sc->sc_bus, 1); 333 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 334 for (i = 0; i < 100; i++) { 335 delay(10); 336 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 337 if (!hcr) 338 break; 339 } 340 if (hcr) { 341 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 342 return (USBD_IOERROR); 343 } 344 345 /* frame list size at default, read back what we got and use that */ 346 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 347 case 0: sc->sc_flsize = 1024*4; break; 348 case 1: sc->sc_flsize = 512*4; break; 349 case 2: sc->sc_flsize = 256*4; break; 350 case 3: return (USBD_IOERROR); 351 } 352 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 353 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 354 if (err) 355 return (err); 356 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 357 358 /* Set up the bus struct. */ 359 sc->sc_bus.methods = &ehci_bus_methods; 360 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 361 362 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 363 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 364 365 sc->sc_eintrs = EHCI_NORMAL_INTRS; 366 367 /* Allocate dummy QH that starts the async list. */ 368 sqh = ehci_alloc_sqh(sc); 369 if (sqh == NULL) { 370 err = USBD_NOMEM; 371 goto bad1; 372 } 373 /* Fill the QH */ 374 sqh->qh.qh_endp = 375 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 376 sqh->qh.qh_link = 377 htole32(sqh->physaddr | EHCI_LINK_QH); 378 sqh->qh.qh_curqtd = EHCI_NULL; 379 sqh->next = NULL; 380 /* Fill the overlay qTD */ 381 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 382 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 383 sqh->qh.qh_qtd.qtd_status = 384 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 385 sqh->sqtd = NULL; 386 #ifdef EHCI_DEBUG 387 if (ehcidebug) { 388 ehci_dump_sqh(sc->sc_async_head); 389 } 390 #endif 391 392 /* Point to async list */ 393 sc->sc_async_head = sqh; 394 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 395 396 usb_callout_init(sc->sc_tmo_pcd); 397 398 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 399 400 /* Enable interrupts */ 401 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 402 403 /* Turn on controller */ 404 EOWRITE4(sc, EHCI_USBCMD, 405 EHCI_CMD_ITC_8 | /* 8 microframes */ 406 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 407 EHCI_CMD_ASE | 408 /* EHCI_CMD_PSE | */ 409 EHCI_CMD_RS); 410 411 /* Take over port ownership */ 412 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 413 414 for (i = 0; i < 100; i++) { 415 delay(10); 416 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 417 if (!hcr) 418 break; 419 } 420 if (hcr) { 421 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 422 return (USBD_IOERROR); 423 } 424 425 return (USBD_NORMAL_COMPLETION); 426 427 #if 0 428 bad2: 429 ehci_free_sqh(sc, sc->sc_async_head); 430 #endif 431 bad1: 432 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 433 return (err); 434 } 435 436 int 437 ehci_intr(void *v) 438 { 439 ehci_softc_t *sc = v; 440 441 if (sc == NULL || sc->sc_dying) 442 return (0); 443 444 /* If we get an interrupt while polling, then just ignore it. */ 445 if (sc->sc_bus.use_polling) { 446 #ifdef DIAGNOSTIC 447 printf("ehci_intr: ignored interrupt while polling\n"); 448 #endif 449 return (0); 450 } 451 452 return (ehci_intr1(sc)); 453 } 454 455 Static int 456 ehci_intr1(ehci_softc_t *sc) 457 { 458 u_int32_t intrs, eintrs; 459 460 DPRINTFN(20,("ehci_intr1: enter\n")); 461 462 /* In case the interrupt occurs before initialization has completed. */ 463 if (sc == NULL) { 464 #ifdef DIAGNOSTIC 465 printf("ehci_intr: sc == NULL\n"); 466 #endif 467 return (0); 468 } 469 470 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 471 472 if (!intrs) 473 return (0); 474 475 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 476 eintrs = intrs & sc->sc_eintrs; 477 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 478 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 479 (u_int)eintrs)); 480 if (!eintrs) 481 return (0); 482 483 sc->sc_bus.intr_context++; 484 sc->sc_bus.no_intrs++; 485 if (eintrs & EHCI_STS_IAA) { 486 DPRINTF(("ehci_intr1: door bell\n")); 487 wakeup(&sc->sc_async_head); 488 eintrs &= ~EHCI_STS_INT; 489 } 490 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 491 DPRINTF(("ehci_intr1: INT/ERRINT\n")); 492 usb_schedsoftintr(&sc->sc_bus); 493 eintrs &= ~(EHCI_STS_INT | EHCI_STS_HSE); 494 } 495 if (eintrs & EHCI_STS_HSE) { 496 printf("%s: unrecoverable error, controller halted\n", 497 USBDEVNAME(sc->sc_bus.bdev)); 498 /* XXX what else */ 499 } 500 if (eintrs & EHCI_STS_PCD) { 501 ehci_pcd(sc, sc->sc_intrxfer); 502 /* 503 * Disable PCD interrupt for now, because it will be 504 * on until the port has been reset. 505 */ 506 ehci_pcd_able(sc, 0); 507 /* Do not allow RHSC interrupts > 1 per second */ 508 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 509 eintrs &= ~EHCI_STS_PCD; 510 } 511 512 sc->sc_bus.intr_context--; 513 514 if (eintrs != 0) { 515 /* Block unprocessed interrupts. */ 516 sc->sc_eintrs &= ~eintrs; 517 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 518 printf("%s: blocking intrs 0x%x\n", 519 USBDEVNAME(sc->sc_bus.bdev), eintrs); 520 } 521 522 return (1); 523 } 524 525 void 526 ehci_pcd_able(ehci_softc_t *sc, int on) 527 { 528 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 529 if (on) 530 sc->sc_eintrs |= EHCI_STS_PCD; 531 else 532 sc->sc_eintrs &= ~EHCI_STS_PCD; 533 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 534 } 535 536 void 537 ehci_pcd_enable(void *v_sc) 538 { 539 ehci_softc_t *sc = v_sc; 540 541 ehci_pcd_able(sc, 1); 542 } 543 544 void 545 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 546 { 547 usbd_pipe_handle pipe; 548 struct ehci_pipe *epipe; 549 u_char *p; 550 int i, m; 551 552 if (xfer == NULL) { 553 /* Just ignore the change. */ 554 return; 555 } 556 557 pipe = xfer->pipe; 558 epipe = (struct ehci_pipe *)pipe; 559 560 p = KERNADDR(&xfer->dmabuf); 561 m = min(sc->sc_noport, xfer->length * 8 - 1); 562 memset(p, 0, xfer->length); 563 for (i = 1; i <= m; i++) { 564 /* Pick out CHANGE bits from the status reg. */ 565 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 566 p[i/8] |= 1 << (i%8); 567 } 568 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 569 xfer->actlen = xfer->length; 570 xfer->status = USBD_NORMAL_COMPLETION; 571 572 usb_transfer_complete(xfer); 573 } 574 575 void 576 ehci_softintr(void *v) 577 { 578 ehci_softc_t *sc = v; 579 struct ehci_xfer *ex; 580 581 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 582 sc->sc_bus.intr_context)); 583 584 sc->sc_bus.intr_context++; 585 586 /* 587 * The only explanation I can think of for why EHCI is as brain dead 588 * as UHCI interrupt-wise is that Intel was involved in both. 589 * An interrupt just tells us that something is done, we have no 590 * clue what, so we need to scan through all active transfers. :-( 591 */ 592 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 593 ehci_check_intr(sc, ex); 594 595 sc->sc_bus.intr_context--; 596 } 597 598 /* Check for an interrupt. */ 599 void 600 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 601 { 602 ehci_soft_qtd_t *sqtd, *lsqtd; 603 u_int32_t status; 604 605 DPRINTFN(15, ("ehci_check_intr: ex=%p\n", ex)); 606 607 if (ex->sqtdstart == NULL) { 608 printf("ehci_check_intr: sqtdstart=NULL\n"); 609 return; 610 } 611 lsqtd = ex->sqtdend; 612 #ifdef DIAGNOSTIC 613 if (lsqtd == NULL) { 614 printf("ehci_check_intr: sqtd==0\n"); 615 return; 616 } 617 #endif 618 /* 619 * If the last TD is still active we need to check whether there 620 * is a an error somewhere in the middle, or whether there was a 621 * short packet (SPD and not ACTIVE). 622 */ 623 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 624 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 625 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 626 status = le32toh(sqtd->qtd.qtd_status); 627 /* If there's an active QTD the xfer isn't done. */ 628 if (status & EHCI_QTD_ACTIVE) 629 break; 630 /* Any kind of error makes the xfer done. */ 631 if (status & EHCI_QTD_HALTED) 632 goto done; 633 /* We want short packets, and it is short: it's done */ 634 if (EHCI_QTD_SET_BYTES(status) != 0) 635 goto done; 636 } 637 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 638 ex, ex->sqtdstart)); 639 return; 640 } 641 done: 642 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 643 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 644 ehci_idone(ex); 645 } 646 647 void 648 ehci_idone(struct ehci_xfer *ex) 649 { 650 usbd_xfer_handle xfer = &ex->xfer; 651 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 652 ehci_soft_qtd_t *sqtd; 653 u_int32_t status = 0, nstatus; 654 int actlen; 655 656 DPRINTFN(12, ("ehci_idone: ex=%p\n", ex)); 657 #ifdef DIAGNOSTIC 658 { 659 int s = splhigh(); 660 if (ex->isdone) { 661 splx(s); 662 #ifdef EHCI_DEBUG 663 printf("ehci_idone: ex is done!\n "); 664 ehci_dump_exfer(ex); 665 #else 666 printf("ehci_idone: ex=%p is done!\n", ex); 667 #endif 668 return; 669 } 670 ex->isdone = 1; 671 splx(s); 672 } 673 #endif 674 675 if (xfer->status == USBD_CANCELLED || 676 xfer->status == USBD_TIMEOUT) { 677 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 678 return; 679 } 680 681 #ifdef EHCI_DEBUG 682 DPRINTFN(10, ("ehci_idone: ex=%p, xfer=%p, pipe=%p ready\n", 683 ex, xfer, epipe)); 684 if (ehcidebug > 10) 685 ehci_dump_sqtds(ex->sqtdstart); 686 #endif 687 688 /* The transfer is done, compute actual length and status. */ 689 actlen = 0; 690 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 691 nstatus = le32toh(sqtd->qtd.qtd_status); 692 if (nstatus & EHCI_QTD_ACTIVE) 693 break; 694 695 status = nstatus; 696 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 697 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 698 } 699 #if 0 700 /* If there are left over TDs we need to update the toggle. */ 701 if (sqtd != NULL) 702 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 703 #endif 704 705 status &= EHCI_QTD_STATERRS; 706 DPRINTFN(10, ("ehci_idone: actlen=%d, status=0x%x\n", actlen, status)); 707 xfer->actlen = actlen; 708 if (status != 0) { 709 #ifdef EHCI_DEBUG 710 char sbuf[128]; 711 712 bitmask_snprintf((u_int32_t)status, 713 "\20\2MISSEDMICRO\3XACT\4BABBLE\5BABBLE" 714 "\6HALTED", 715 sbuf, sizeof(sbuf)); 716 717 DPRINTFN((status == EHCI_QTD_HALTED)*10, 718 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 719 "status 0x%s\n", 720 xfer->pipe->device->address, 721 xfer->pipe->endpoint->edesc->bEndpointAddress, 722 sbuf)); 723 #endif 724 725 if (status == EHCI_QTD_HALTED) 726 xfer->status = USBD_STALLED; 727 else 728 xfer->status = USBD_IOERROR; /* more info XXX */ 729 } else { 730 xfer->status = USBD_NORMAL_COMPLETION; 731 } 732 733 usb_transfer_complete(xfer); 734 DPRINTFN(12, ("ehci_idone: ex=%p done\n", ex)); 735 } 736 737 /* 738 * Wait here until controller claims to have an interrupt. 739 * Then call ehci_intr and return. Use timeout to avoid waiting 740 * too long. 741 */ 742 void 743 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 744 { 745 int timo = xfer->timeout; 746 int usecs; 747 u_int32_t intrs; 748 749 xfer->status = USBD_IN_PROGRESS; 750 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 751 usb_delay_ms(&sc->sc_bus, 1); 752 if (sc->sc_dying) 753 break; 754 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 755 sc->sc_eintrs; 756 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 757 #ifdef OHCI_DEBUG 758 if (ehcidebug > 15) 759 ehci_dump_regs(sc); 760 #endif 761 if (intrs) { 762 ehci_intr1(sc); 763 if (xfer->status != USBD_IN_PROGRESS) 764 return; 765 } 766 } 767 768 /* Timeout */ 769 DPRINTF(("ehci_waitintr: timeout\n")); 770 xfer->status = USBD_TIMEOUT; 771 usb_transfer_complete(xfer); 772 /* XXX should free TD */ 773 } 774 775 void 776 ehci_poll(struct usbd_bus *bus) 777 { 778 ehci_softc_t *sc = (ehci_softc_t *)bus; 779 #ifdef EHCI_DEBUG 780 static int last; 781 int new; 782 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 783 if (new != last) { 784 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 785 last = new; 786 } 787 #endif 788 789 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 790 ehci_intr1(sc); 791 } 792 793 int 794 ehci_detach(struct ehci_softc *sc, int flags) 795 { 796 int rv = 0; 797 798 if (sc->sc_child != NULL) 799 rv = config_detach(sc->sc_child, flags); 800 801 if (rv != 0) 802 return (rv); 803 804 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 805 806 if (sc->sc_powerhook != NULL) 807 powerhook_disestablish(sc->sc_powerhook); 808 if (sc->sc_shutdownhook != NULL) 809 shutdownhook_disestablish(sc->sc_shutdownhook); 810 811 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 812 813 /* XXX free other data structures XXX */ 814 815 return (rv); 816 } 817 818 819 int 820 ehci_activate(device_ptr_t self, enum devact act) 821 { 822 struct ehci_softc *sc = (struct ehci_softc *)self; 823 int rv = 0; 824 825 switch (act) { 826 case DVACT_ACTIVATE: 827 return (EOPNOTSUPP); 828 break; 829 830 case DVACT_DEACTIVATE: 831 if (sc->sc_child != NULL) 832 rv = config_deactivate(sc->sc_child); 833 sc->sc_dying = 1; 834 break; 835 } 836 return (rv); 837 } 838 839 /* 840 * Handle suspend/resume. 841 * 842 * We need to switch to polling mode here, because this routine is 843 * called from an intterupt context. This is all right since we 844 * are almost suspended anyway. 845 */ 846 void 847 ehci_power(int why, void *v) 848 { 849 ehci_softc_t *sc = v; 850 //u_int32_t ctl; 851 int s; 852 853 #ifdef EHCI_DEBUG 854 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 855 ehci_dump_regs(sc); 856 #endif 857 858 s = splhardusb(); 859 switch (why) { 860 case PWR_SUSPEND: 861 case PWR_STANDBY: 862 sc->sc_bus.use_polling++; 863 #if 0 864 OOO 865 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 866 if (sc->sc_control == 0) { 867 /* 868 * Preserve register values, in case that APM BIOS 869 * does not recover them. 870 */ 871 sc->sc_control = ctl; 872 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 873 } 874 ctl |= EHCI_HCFS_SUSPEND; 875 OWRITE4(sc, EHCI_CONTROL, ctl); 876 #endif 877 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 878 sc->sc_bus.use_polling--; 879 break; 880 case PWR_RESUME: 881 sc->sc_bus.use_polling++; 882 #if 0 883 OOO 884 /* Some broken BIOSes do not recover these values */ 885 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 886 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 887 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 888 if (sc->sc_intre) 889 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 890 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 891 if (sc->sc_control) 892 ctl = sc->sc_control; 893 else 894 ctl = OREAD4(sc, EHCI_CONTROL); 895 ctl |= EHCI_HCFS_RESUME; 896 OWRITE4(sc, EHCI_CONTROL, ctl); 897 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 898 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 899 OWRITE4(sc, EHCI_CONTROL, ctl); 900 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 901 sc->sc_control = sc->sc_intre = 0; 902 #endif 903 sc->sc_bus.use_polling--; 904 break; 905 case PWR_SOFTSUSPEND: 906 case PWR_SOFTSTANDBY: 907 case PWR_SOFTRESUME: 908 break; 909 } 910 splx(s); 911 } 912 913 /* 914 * Shut down the controller when the system is going down. 915 */ 916 void 917 ehci_shutdown(void *v) 918 { 919 ehci_softc_t *sc = v; 920 921 DPRINTF(("ehci_shutdown: stopping the HC\n")); 922 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 923 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 924 } 925 926 usbd_status 927 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 928 { 929 struct ehci_softc *sc = (struct ehci_softc *)bus; 930 931 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 932 } 933 934 void 935 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 936 { 937 struct ehci_softc *sc = (struct ehci_softc *)bus; 938 939 usb_freemem(&sc->sc_bus, dma); 940 } 941 942 usbd_xfer_handle 943 ehci_allocx(struct usbd_bus *bus) 944 { 945 struct ehci_softc *sc = (struct ehci_softc *)bus; 946 usbd_xfer_handle xfer; 947 948 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 949 if (xfer != NULL) 950 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 951 else 952 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 953 if (xfer != NULL) { 954 memset(xfer, 0, sizeof (struct ehci_xfer)); 955 #ifdef DIAGNOSTIC 956 EXFER(xfer)->isdone = 1; 957 xfer->busy_free = XFER_BUSY; 958 #endif 959 } 960 return (xfer); 961 } 962 963 void 964 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 965 { 966 struct ehci_softc *sc = (struct ehci_softc *)bus; 967 968 #ifdef DIAGNOSTIC 969 if (xfer->busy_free != XFER_BUSY) { 970 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 971 xfer->busy_free); 972 return; 973 } 974 xfer->busy_free = XFER_FREE; 975 if (!EXFER(xfer)->isdone) { 976 printf("ehci_freex: !isdone\n"); 977 return; 978 } 979 #endif 980 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 981 } 982 983 Static void 984 ehci_device_clear_toggle(usbd_pipe_handle pipe) 985 { 986 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 987 988 printf("ehci_device_clear_toggle: epipe=%p\n", epipe); 989 #if 0 990 OOO 991 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY); 992 #endif 993 } 994 995 Static void 996 ehci_noop(usbd_pipe_handle pipe) 997 { 998 } 999 1000 #ifdef EHCI_DEBUG 1001 void 1002 ehci_dump_regs(ehci_softc_t *sc) 1003 { 1004 int i; 1005 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1006 EOREAD4(sc, EHCI_USBCMD), 1007 EOREAD4(sc, EHCI_USBSTS), 1008 EOREAD4(sc, EHCI_USBINTR)); 1009 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1010 EOREAD4(sc, EHCI_FRINDEX), 1011 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1012 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1013 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1014 for (i = 1; i <= sc->sc_noport; i++) 1015 printf("port %d status=0x%08x\n", i, 1016 EOREAD4(sc, EHCI_PORTSC(i))); 1017 } 1018 1019 void 1020 ehci_dump() 1021 { 1022 ehci_dump_regs(theehci); 1023 } 1024 1025 void 1026 ehci_dump_link(ehci_link_t link, int type) 1027 { 1028 link = le32toh(link); 1029 printf("0x%08x", link); 1030 if (link & EHCI_LINK_TERMINATE) 1031 printf("<T>"); 1032 else { 1033 printf("<"); 1034 if (type) { 1035 switch (EHCI_LINK_TYPE(link)) { 1036 case EHCI_LINK_ITD: printf("ITD"); break; 1037 case EHCI_LINK_QH: printf("QH"); break; 1038 case EHCI_LINK_SITD: printf("SITD"); break; 1039 case EHCI_LINK_FSTN: printf("FSTN"); break; 1040 } 1041 } 1042 printf(">"); 1043 } 1044 } 1045 1046 void 1047 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1048 { 1049 for (; sqtd; sqtd = sqtd->nextqtd) 1050 ehci_dump_sqtd(sqtd); 1051 } 1052 1053 void 1054 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1055 { 1056 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1057 ehci_dump_qtd(&sqtd->qtd); 1058 } 1059 1060 void 1061 ehci_dump_qtd(ehci_qtd_t *qtd) 1062 { 1063 u_int32_t s; 1064 char sbuf[128]; 1065 1066 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1067 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1068 printf("\n"); 1069 s = le32toh(qtd->qtd_status); 1070 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1071 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1072 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1073 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1074 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1075 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1076 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1077 EHCI_QTD_GET_PID(s), sbuf); 1078 for (s = 0; s < 5; s++) 1079 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1080 } 1081 1082 void 1083 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1084 { 1085 ehci_qh_t *qh = &sqh->qh; 1086 u_int32_t endp, endphub; 1087 1088 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1089 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1090 endp = le32toh(qh->qh_endp); 1091 printf(" endp=0x%08x\n", endp); 1092 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1093 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1094 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1095 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1096 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1097 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1098 EHCI_QH_GET_NRL(endp)); 1099 endphub = le32toh(qh->qh_endphub); 1100 printf(" endphub=0x%08x\n", endphub); 1101 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1102 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1103 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1104 EHCI_QH_GET_MULT(endphub)); 1105 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1106 printf("Overlay qTD:\n"); 1107 ehci_dump_qtd(&qh->qh_qtd); 1108 } 1109 1110 Static void 1111 ehci_dump_exfer(struct ehci_xfer *ex) 1112 { 1113 printf("ehci_dump_exfer: ex=%p\n", ex); 1114 } 1115 #endif 1116 1117 usbd_status 1118 ehci_open(usbd_pipe_handle pipe) 1119 { 1120 usbd_device_handle dev = pipe->device; 1121 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1122 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1123 u_int8_t addr = dev->address; 1124 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1125 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1126 ehci_soft_qh_t *sqh; 1127 usbd_status err; 1128 #if 0 1129 ehci_soft_itd_t *sitd; 1130 ehci_physaddr_t tdphys; 1131 u_int32_t fmt; 1132 int ival; 1133 #endif 1134 int s; 1135 int speed, naks; 1136 1137 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1138 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1139 1140 if (sc->sc_dying) 1141 return (USBD_IOERROR); 1142 1143 if (addr == sc->sc_addr) { 1144 switch (ed->bEndpointAddress) { 1145 case USB_CONTROL_ENDPOINT: 1146 pipe->methods = &ehci_root_ctrl_methods; 1147 break; 1148 case UE_DIR_IN | EHCI_INTR_ENDPT: 1149 pipe->methods = &ehci_root_intr_methods; 1150 break; 1151 default: 1152 return (USBD_INVAL); 1153 } 1154 return (USBD_NORMAL_COMPLETION); 1155 } 1156 1157 switch (dev->speed) { 1158 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1159 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1160 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1161 default: panic("ehci_open: bad device speed %d\n", dev->speed); 1162 } 1163 naks = 8; /* XXX */ 1164 sqh = ehci_alloc_sqh(sc); 1165 if (sqh == NULL) 1166 goto bad0; 1167 /* qh_link filled when the QH is added */ 1168 sqh->qh.qh_endp = htole32( 1169 EHCI_QH_SET_ADDR(addr) | 1170 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1171 EHCI_QH_SET_EPS(speed) | /* XXX */ 1172 /* XXX EHCI_QH_DTC ? */ 1173 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1174 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1175 EHCI_QH_CTL : 0) | 1176 EHCI_QH_SET_NRL(naks) 1177 ); 1178 sqh->qh.qh_endphub = htole32( 1179 EHCI_QH_SET_MULT(1) 1180 /* XXX TT stuff */ 1181 /* XXX interrupt mask */ 1182 ); 1183 sqh->qh.qh_curqtd = EHCI_NULL; 1184 /* Fill the overlay qTD */ 1185 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1186 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1187 sqh->qh.qh_qtd.qtd_status = htole32(0); 1188 1189 epipe->sqh = sqh; 1190 1191 switch (xfertype) { 1192 case UE_CONTROL: 1193 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1194 0, &epipe->u.ctl.reqdma); 1195 if (err) 1196 goto bad1; 1197 pipe->methods = &ehci_device_ctrl_methods; 1198 s = splusb(); 1199 ehci_add_qh(sqh, sc->sc_async_head); 1200 splx(s); 1201 break; 1202 case UE_BULK: 1203 pipe->methods = &ehci_device_bulk_methods; 1204 s = splusb(); 1205 ehci_add_qh(sqh, sc->sc_async_head); 1206 splx(s); 1207 break; 1208 default: 1209 return (USBD_INVAL); 1210 } 1211 return (USBD_NORMAL_COMPLETION); 1212 1213 bad1: 1214 ehci_free_sqh(sc, sqh); 1215 bad0: 1216 return (USBD_NOMEM); 1217 } 1218 1219 /* 1220 * Add an ED to the schedule. Called at splusb(). 1221 */ 1222 void 1223 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1224 { 1225 SPLUSBCHECK; 1226 1227 sqh->next = head->next; 1228 sqh->qh.qh_link = head->qh.qh_link; 1229 head->next = sqh; 1230 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1231 1232 #ifdef EHCI_DEBUG 1233 if (ehcidebug > 0) { 1234 printf("ehci_add_qh:\n"); 1235 ehci_dump_sqh(sqh); 1236 } 1237 #endif 1238 } 1239 1240 /* 1241 * Remove an ED from the schedule. Called at splusb(). 1242 */ 1243 void 1244 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1245 { 1246 ehci_soft_qh_t *p; 1247 1248 SPLUSBCHECK; 1249 /* XXX */ 1250 for (p = head; p == NULL && p->next != sqh; p = p->next) 1251 ; 1252 if (p == NULL) 1253 panic("ehci_rem_qh: ED not found\n"); 1254 p->next = sqh->next; 1255 p->qh.qh_link = sqh->qh.qh_link; 1256 1257 ehci_sync_hc(sc); 1258 } 1259 1260 /* 1261 * Ensure that the HC has released all references to the QH. We do this 1262 * by asking for a Async Advance Doorbell interrupt and then we wait for 1263 * the interrupt. 1264 * To make this easier we first obtain exclusive use of the doorbell. 1265 */ 1266 void 1267 ehci_sync_hc(ehci_softc_t *sc) 1268 { 1269 int s, error; 1270 1271 if (sc->sc_dying) { 1272 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1273 return; 1274 } 1275 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1276 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1277 s = splhardusb(); 1278 /* ask for doorbell */ 1279 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1280 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1281 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1282 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1283 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1284 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1285 splx(s); 1286 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1287 #ifdef DIAGNOSTIC 1288 if (error) 1289 printf("ehci_sync_hc: tsleep() = %d\n", error); 1290 #endif 1291 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1292 } 1293 1294 /***********/ 1295 1296 /* 1297 * Data structures and routines to emulate the root hub. 1298 */ 1299 Static usb_device_descriptor_t ehci_devd = { 1300 USB_DEVICE_DESCRIPTOR_SIZE, 1301 UDESC_DEVICE, /* type */ 1302 {0x00, 0x02}, /* USB version */ 1303 UDCLASS_HUB, /* class */ 1304 UDSUBCLASS_HUB, /* subclass */ 1305 UDPROTO_HSHUBSTT, /* protocol */ 1306 64, /* max packet */ 1307 {0},{0},{0x00,0x01}, /* device id */ 1308 1,2,0, /* string indicies */ 1309 1 /* # of configurations */ 1310 }; 1311 1312 Static usb_device_qualifier_t ehci_odevd = { 1313 USB_DEVICE_DESCRIPTOR_SIZE, 1314 UDESC_DEVICE_QUALIFIER, /* type */ 1315 {0x00, 0x02}, /* USB version */ 1316 UDCLASS_HUB, /* class */ 1317 UDSUBCLASS_HUB, /* subclass */ 1318 UDPROTO_FSHUB, /* protocol */ 1319 64, /* max packet */ 1320 1, /* # of configurations */ 1321 0 1322 }; 1323 1324 Static usb_config_descriptor_t ehci_confd = { 1325 USB_CONFIG_DESCRIPTOR_SIZE, 1326 UDESC_CONFIG, 1327 {USB_CONFIG_DESCRIPTOR_SIZE + 1328 USB_INTERFACE_DESCRIPTOR_SIZE + 1329 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1330 1, 1331 1, 1332 0, 1333 UC_SELF_POWERED, 1334 0 /* max power */ 1335 }; 1336 1337 Static usb_interface_descriptor_t ehci_ifcd = { 1338 USB_INTERFACE_DESCRIPTOR_SIZE, 1339 UDESC_INTERFACE, 1340 0, 1341 0, 1342 1, 1343 UICLASS_HUB, 1344 UISUBCLASS_HUB, 1345 UIPROTO_HSHUBSTT, 1346 0 1347 }; 1348 1349 Static usb_endpoint_descriptor_t ehci_endpd = { 1350 USB_ENDPOINT_DESCRIPTOR_SIZE, 1351 UDESC_ENDPOINT, 1352 UE_DIR_IN | EHCI_INTR_ENDPT, 1353 UE_INTERRUPT, 1354 {8, 0}, /* max packet */ 1355 255 1356 }; 1357 1358 Static usb_hub_descriptor_t ehci_hubd = { 1359 USB_HUB_DESCRIPTOR_SIZE, 1360 UDESC_HUB, 1361 0, 1362 {0,0}, 1363 0, 1364 0, 1365 {0}, 1366 }; 1367 1368 Static int 1369 ehci_str(p, l, s) 1370 usb_string_descriptor_t *p; 1371 int l; 1372 char *s; 1373 { 1374 int i; 1375 1376 if (l == 0) 1377 return (0); 1378 p->bLength = 2 * strlen(s) + 2; 1379 if (l == 1) 1380 return (1); 1381 p->bDescriptorType = UDESC_STRING; 1382 l -= 2; 1383 for (i = 0; s[i] && l > 1; i++, l -= 2) 1384 USETW2(p->bString[i], 0, s[i]); 1385 return (2*i+2); 1386 } 1387 1388 /* 1389 * Simulate a hardware hub by handling all the necessary requests. 1390 */ 1391 Static usbd_status 1392 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1393 { 1394 usbd_status err; 1395 1396 /* Insert last in queue. */ 1397 err = usb_insert_transfer(xfer); 1398 if (err) 1399 return (err); 1400 1401 /* Pipe isn't running, start first */ 1402 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1403 } 1404 1405 Static usbd_status 1406 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1407 { 1408 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1409 usb_device_request_t *req; 1410 void *buf = NULL; 1411 int port, i; 1412 int s, len, value, index, l, totlen = 0; 1413 usb_port_status_t ps; 1414 usb_hub_descriptor_t hubd; 1415 usbd_status err; 1416 u_int32_t v; 1417 1418 if (sc->sc_dying) 1419 return (USBD_IOERROR); 1420 1421 #ifdef DIAGNOSTIC 1422 if (!(xfer->rqflags & URQ_REQUEST)) 1423 /* XXX panic */ 1424 return (USBD_INVAL); 1425 #endif 1426 req = &xfer->request; 1427 1428 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1429 req->bmRequestType, req->bRequest)); 1430 1431 len = UGETW(req->wLength); 1432 value = UGETW(req->wValue); 1433 index = UGETW(req->wIndex); 1434 1435 if (len != 0) 1436 buf = KERNADDR(&xfer->dmabuf); 1437 1438 #define C(x,y) ((x) | ((y) << 8)) 1439 switch(C(req->bRequest, req->bmRequestType)) { 1440 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1441 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1442 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1443 /* 1444 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1445 * for the integrated root hub. 1446 */ 1447 break; 1448 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1449 if (len > 0) { 1450 *(u_int8_t *)buf = sc->sc_conf; 1451 totlen = 1; 1452 } 1453 break; 1454 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1455 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1456 switch(value >> 8) { 1457 case UDESC_DEVICE: 1458 if ((value & 0xff) != 0) { 1459 err = USBD_IOERROR; 1460 goto ret; 1461 } 1462 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1463 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1464 memcpy(buf, &ehci_devd, l); 1465 break; 1466 /* 1467 * We can't really operate at another speed, but the spec says 1468 * we need this descriptor. 1469 */ 1470 case UDESC_DEVICE_QUALIFIER: 1471 if ((value & 0xff) != 0) { 1472 err = USBD_IOERROR; 1473 goto ret; 1474 } 1475 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1476 memcpy(buf, &ehci_odevd, l); 1477 break; 1478 /* 1479 * We can't really operate at another speed, but the spec says 1480 * we need this descriptor. 1481 */ 1482 case UDESC_OTHER_SPEED_CONFIGURATION: 1483 case UDESC_CONFIG: 1484 if ((value & 0xff) != 0) { 1485 err = USBD_IOERROR; 1486 goto ret; 1487 } 1488 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1489 memcpy(buf, &ehci_confd, l); 1490 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1491 value >> 8; 1492 buf = (char *)buf + l; 1493 len -= l; 1494 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1495 totlen += l; 1496 memcpy(buf, &ehci_ifcd, l); 1497 buf = (char *)buf + l; 1498 len -= l; 1499 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1500 totlen += l; 1501 memcpy(buf, &ehci_endpd, l); 1502 break; 1503 case UDESC_STRING: 1504 if (len == 0) 1505 break; 1506 *(u_int8_t *)buf = 0; 1507 totlen = 1; 1508 switch (value & 0xff) { 1509 case 1: /* Vendor */ 1510 totlen = ehci_str(buf, len, sc->sc_vendor); 1511 break; 1512 case 2: /* Product */ 1513 totlen = ehci_str(buf, len, "EHCI root hub"); 1514 break; 1515 } 1516 break; 1517 default: 1518 err = USBD_IOERROR; 1519 goto ret; 1520 } 1521 break; 1522 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1523 if (len > 0) { 1524 *(u_int8_t *)buf = 0; 1525 totlen = 1; 1526 } 1527 break; 1528 case C(UR_GET_STATUS, UT_READ_DEVICE): 1529 if (len > 1) { 1530 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1531 totlen = 2; 1532 } 1533 break; 1534 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1535 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1536 if (len > 1) { 1537 USETW(((usb_status_t *)buf)->wStatus, 0); 1538 totlen = 2; 1539 } 1540 break; 1541 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1542 if (value >= USB_MAX_DEVICES) { 1543 err = USBD_IOERROR; 1544 goto ret; 1545 } 1546 sc->sc_addr = value; 1547 break; 1548 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1549 if (value != 0 && value != 1) { 1550 err = USBD_IOERROR; 1551 goto ret; 1552 } 1553 sc->sc_conf = value; 1554 break; 1555 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1556 break; 1557 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1558 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1559 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1560 err = USBD_IOERROR; 1561 goto ret; 1562 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1563 break; 1564 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1565 break; 1566 /* Hub requests */ 1567 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1568 break; 1569 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1570 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1571 "port=%d feature=%d\n", 1572 index, value)); 1573 if (index < 1 || index > sc->sc_noport) { 1574 err = USBD_IOERROR; 1575 goto ret; 1576 } 1577 port = EHCI_PORTSC(index); 1578 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1579 switch(value) { 1580 case UHF_PORT_ENABLE: 1581 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1582 break; 1583 case UHF_PORT_SUSPEND: 1584 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1585 break; 1586 case UHF_PORT_POWER: 1587 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1588 break; 1589 case UHF_PORT_TEST: 1590 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1591 "%d\n", index)); 1592 break; 1593 case UHF_PORT_INDICATOR: 1594 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1595 "%d\n", index)); 1596 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1597 break; 1598 case UHF_C_PORT_CONNECTION: 1599 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1600 break; 1601 case UHF_C_PORT_ENABLE: 1602 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1603 break; 1604 case UHF_C_PORT_SUSPEND: 1605 /* how? */ 1606 break; 1607 case UHF_C_PORT_OVER_CURRENT: 1608 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1609 break; 1610 case UHF_C_PORT_RESET: 1611 sc->sc_isreset = 0; 1612 break; 1613 default: 1614 err = USBD_IOERROR; 1615 goto ret; 1616 } 1617 #if 0 1618 switch(value) { 1619 case UHF_C_PORT_CONNECTION: 1620 case UHF_C_PORT_ENABLE: 1621 case UHF_C_PORT_SUSPEND: 1622 case UHF_C_PORT_OVER_CURRENT: 1623 case UHF_C_PORT_RESET: 1624 /* Enable RHSC interrupt if condition is cleared. */ 1625 if ((OREAD4(sc, port) >> 16) == 0) 1626 ehci_pcd_able(sc, 1); 1627 break; 1628 default: 1629 break; 1630 } 1631 #endif 1632 break; 1633 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1634 if (value != 0) { 1635 err = USBD_IOERROR; 1636 goto ret; 1637 } 1638 hubd = ehci_hubd; 1639 hubd.bNbrPorts = sc->sc_noport; 1640 v = EOREAD4(sc, EHCI_HCSPARAMS); 1641 USETW(hubd.wHubCharacteristics, 1642 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1643 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1644 ? UHD_PORT_IND : 0); 1645 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1646 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1647 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1648 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1649 l = min(len, hubd.bDescLength); 1650 totlen = l; 1651 memcpy(buf, &hubd, l); 1652 break; 1653 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1654 if (len != 4) { 1655 err = USBD_IOERROR; 1656 goto ret; 1657 } 1658 memset(buf, 0, len); /* ? XXX */ 1659 totlen = len; 1660 break; 1661 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1662 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1663 index)); 1664 if (index < 1 || index > sc->sc_noport) { 1665 err = USBD_IOERROR; 1666 goto ret; 1667 } 1668 if (len != 4) { 1669 err = USBD_IOERROR; 1670 goto ret; 1671 } 1672 v = EOREAD4(sc, EHCI_PORTSC(index)); 1673 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1674 v)); 1675 i = UPS_HIGH_SPEED; 1676 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1677 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1678 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1679 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1680 if (v & EHCI_PS_PR) i |= UPS_RESET; 1681 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1682 USETW(ps.wPortStatus, i); 1683 i = 0; 1684 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1685 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1686 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1687 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1688 USETW(ps.wPortChange, i); 1689 l = min(len, sizeof ps); 1690 memcpy(buf, &ps, l); 1691 totlen = l; 1692 break; 1693 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1694 err = USBD_IOERROR; 1695 goto ret; 1696 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1697 break; 1698 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1699 if (index < 1 || index > sc->sc_noport) { 1700 err = USBD_IOERROR; 1701 goto ret; 1702 } 1703 port = EHCI_PORTSC(index); 1704 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1705 switch(value) { 1706 case UHF_PORT_ENABLE: 1707 EOWRITE4(sc, port, v | EHCI_PS_PE); 1708 break; 1709 case UHF_PORT_SUSPEND: 1710 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1711 break; 1712 case UHF_PORT_RESET: 1713 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1714 index)); 1715 if (EHCI_PS_IS_LOWSPEED(v)) { 1716 /* Low speed device, give up ownership. */ 1717 ehci_disown(sc, index, 1); 1718 break; 1719 } 1720 /* Start reset sequence. */ 1721 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1722 EOWRITE4(sc, port, v | EHCI_PS_PR); 1723 /* Wait for reset to complete. */ 1724 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1725 if (sc->sc_dying) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 /* Terminate reset sequence. */ 1730 EOWRITE4(sc, port, v); 1731 /* Wait for HC to complete reset. */ 1732 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1733 if (sc->sc_dying) { 1734 err = USBD_IOERROR; 1735 goto ret; 1736 } 1737 v = EOREAD4(sc, port); 1738 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1739 if (v & EHCI_PS_PR) { 1740 printf("%s: port reset timeout\n", 1741 USBDEVNAME(sc->sc_bus.bdev)); 1742 return (USBD_TIMEOUT); 1743 } 1744 if (!(v & EHCI_PS_PE)) { 1745 /* Not a high speed device, give up ownership.*/ 1746 ehci_disown(sc, index, 0); 1747 break; 1748 } 1749 sc->sc_isreset = 1; 1750 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1751 index, v)); 1752 break; 1753 case UHF_PORT_POWER: 1754 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1755 "%d\n", index)); 1756 EOWRITE4(sc, port, v | EHCI_PS_PP); 1757 break; 1758 case UHF_PORT_TEST: 1759 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1760 "%d\n", index)); 1761 break; 1762 case UHF_PORT_INDICATOR: 1763 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1764 "%d\n", index)); 1765 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1766 break; 1767 default: 1768 err = USBD_IOERROR; 1769 goto ret; 1770 } 1771 break; 1772 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1773 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1774 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1775 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1776 break; 1777 default: 1778 err = USBD_IOERROR; 1779 goto ret; 1780 } 1781 xfer->actlen = totlen; 1782 err = USBD_NORMAL_COMPLETION; 1783 ret: 1784 xfer->status = err; 1785 s = splusb(); 1786 usb_transfer_complete(xfer); 1787 splx(s); 1788 return (USBD_IN_PROGRESS); 1789 } 1790 1791 void 1792 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1793 { 1794 int i, port; 1795 u_int32_t v; 1796 1797 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1798 #ifdef DIAGNOSTIC 1799 if (sc->sc_npcomp != 0) { 1800 i = (index-1) / sc->sc_npcomp; 1801 if (i >= sc->sc_ncomp) 1802 printf("%s: strange port\n", 1803 USBDEVNAME(sc->sc_bus.bdev)); 1804 else 1805 printf("%s: handing over %s speed device on " 1806 "port %d to %s\n", 1807 USBDEVNAME(sc->sc_bus.bdev), 1808 lowspeed ? "low" : "full", 1809 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1810 } else { 1811 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1812 } 1813 #endif 1814 port = EHCI_PORTSC(index); 1815 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1816 EOWRITE4(sc, port, v | EHCI_PS_PO); 1817 } 1818 1819 /* Abort a root control request. */ 1820 Static void 1821 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1822 { 1823 /* Nothing to do, all transfers are synchronous. */ 1824 } 1825 1826 /* Close the root pipe. */ 1827 Static void 1828 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1829 { 1830 DPRINTF(("ehci_root_ctrl_close\n")); 1831 /* Nothing to do. */ 1832 } 1833 1834 void 1835 ehci_root_intr_done(usbd_xfer_handle xfer) 1836 { 1837 xfer->hcpriv = NULL; 1838 } 1839 1840 Static usbd_status 1841 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1842 { 1843 usbd_status err; 1844 1845 /* Insert last in queue. */ 1846 err = usb_insert_transfer(xfer); 1847 if (err) 1848 return (err); 1849 1850 /* Pipe isn't running, start first */ 1851 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1852 } 1853 1854 Static usbd_status 1855 ehci_root_intr_start(usbd_xfer_handle xfer) 1856 { 1857 usbd_pipe_handle pipe = xfer->pipe; 1858 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1859 1860 if (sc->sc_dying) 1861 return (USBD_IOERROR); 1862 1863 sc->sc_intrxfer = xfer; 1864 1865 return (USBD_IN_PROGRESS); 1866 } 1867 1868 /* Abort a root interrupt request. */ 1869 Static void 1870 ehci_root_intr_abort(usbd_xfer_handle xfer) 1871 { 1872 int s; 1873 1874 if (xfer->pipe->intrxfer == xfer) { 1875 DPRINTF(("ehci_root_intr_abort: remove\n")); 1876 xfer->pipe->intrxfer = NULL; 1877 } 1878 xfer->status = USBD_CANCELLED; 1879 s = splusb(); 1880 usb_transfer_complete(xfer); 1881 splx(s); 1882 } 1883 1884 /* Close the root pipe. */ 1885 Static void 1886 ehci_root_intr_close(usbd_pipe_handle pipe) 1887 { 1888 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1889 1890 DPRINTF(("ehci_root_intr_close\n")); 1891 1892 sc->sc_intrxfer = NULL; 1893 } 1894 1895 void 1896 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1897 { 1898 xfer->hcpriv = NULL; 1899 } 1900 1901 /************************/ 1902 1903 ehci_soft_qh_t * 1904 ehci_alloc_sqh(ehci_softc_t *sc) 1905 { 1906 ehci_soft_qh_t *sqh; 1907 usbd_status err; 1908 int i, offs; 1909 usb_dma_t dma; 1910 1911 if (sc->sc_freeqhs == NULL) { 1912 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1913 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1914 EHCI_PAGE_SIZE, &dma); 1915 if (err) 1916 return (NULL); 1917 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1918 offs = i * EHCI_SQH_SIZE; 1919 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1920 sqh->physaddr = DMAADDR(&dma) + offs; 1921 sqh->next = sc->sc_freeqhs; 1922 sc->sc_freeqhs = sqh; 1923 } 1924 } 1925 sqh = sc->sc_freeqhs; 1926 sc->sc_freeqhs = sqh->next; 1927 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1928 sqh->next = NULL; 1929 return (sqh); 1930 } 1931 1932 void 1933 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1934 { 1935 sqh->next = sc->sc_freeqhs; 1936 sc->sc_freeqhs = sqh; 1937 } 1938 1939 ehci_soft_qtd_t * 1940 ehci_alloc_sqtd(ehci_softc_t *sc) 1941 { 1942 ehci_soft_qtd_t *sqtd; 1943 usbd_status err; 1944 int i, offs; 1945 usb_dma_t dma; 1946 int s; 1947 1948 if (sc->sc_freeqtds == NULL) { 1949 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1950 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1951 EHCI_PAGE_SIZE, &dma); 1952 if (err) 1953 return (NULL); 1954 s = splusb(); 1955 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1956 offs = i * EHCI_SQTD_SIZE; 1957 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1958 sqtd->physaddr = DMAADDR(&dma) + offs; 1959 sqtd->nextqtd = sc->sc_freeqtds; 1960 sc->sc_freeqtds = sqtd; 1961 } 1962 splx(s); 1963 } 1964 1965 s = splusb(); 1966 sqtd = sc->sc_freeqtds; 1967 sc->sc_freeqtds = sqtd->nextqtd; 1968 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1969 sqtd->nextqtd = NULL; 1970 sqtd->xfer = NULL; 1971 splx(s); 1972 1973 return (sqtd); 1974 } 1975 1976 void 1977 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1978 { 1979 int s; 1980 1981 s = splusb(); 1982 sqtd->nextqtd = sc->sc_freeqtds; 1983 sc->sc_freeqtds = sqtd; 1984 splx(s); 1985 } 1986 1987 usbd_status 1988 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 1989 int alen, int rd, usbd_xfer_handle xfer, 1990 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 1991 { 1992 ehci_soft_qtd_t *next, *cur; 1993 ehci_physaddr_t dataphys, dataphysend, nextphys; 1994 u_int32_t qtdstatus; 1995 int len, curlen; 1996 int i; 1997 usb_dma_t *dma = &xfer->dmabuf; 1998 1999 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen)); 2000 2001 len = alen; 2002 dataphys = DMAADDR(dma); 2003 dataphysend = EHCI_PAGE(dataphys + len - 1); 2004 qtdstatus = htole32( 2005 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2006 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2007 EHCI_QTD_SET_CERR(3) 2008 /* IOC set below */ 2009 /* BYTES set below */ 2010 /* XXX Data toggle */ 2011 ); 2012 2013 cur = ehci_alloc_sqtd(sc); 2014 if (cur == NULL) 2015 goto nomem; 2016 *sp = cur; 2017 for (;;) { 2018 /* The EHCI hardware can handle at most 4 page crossings. */ 2019 if (EHCI_PAGE(dataphys) == dataphysend || 2020 EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE 2021 == dataphysend) { 2022 /* we can handle it in this QTD */ 2023 curlen = len; 2024 } else { 2025 #if 0 2026 /* must use multiple TDs, fill as much as possible. */ 2027 curlen = 2 * EHCI_PAGE_SIZE - 2028 (dataphys & (EHCI_PAGE_SIZE-1)); 2029 /* the length must be a multiple of the max size */ 2030 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2031 #ifdef DIAGNOSTIC 2032 if (curlen == 0) 2033 panic("ehci_alloc_std: curlen == 0\n"); 2034 #endif 2035 #else 2036 printf("ehci_alloc_std_chain: multiple QTDs\n"); 2037 return (USBD_NOMEM); 2038 #endif 2039 } 2040 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x " 2041 "dataphysend=0x%08x len=%d curlen=%d\n", 2042 dataphys, dataphysend, 2043 len, curlen)); 2044 len -= curlen; 2045 2046 if (len != 0) { 2047 next = ehci_alloc_sqtd(sc); 2048 if (next == NULL) 2049 goto nomem; 2050 nextphys = next->physaddr; 2051 } else { 2052 next = NULL; 2053 nextphys = EHCI_NULL; 2054 } 2055 2056 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2057 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2058 if (i != 0) /* use offset only in first buffer */ 2059 a = EHCI_PAGE(a); 2060 cur->qtd.qtd_buffer[i] = htole32(a); 2061 } 2062 cur->nextqtd = next; 2063 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2064 cur->qtd.qtd_status = 2065 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2066 cur->xfer = xfer; 2067 cur->len = curlen; 2068 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 2069 dataphys, dataphys + curlen - 1)); 2070 if (len == 0) 2071 break; 2072 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n")); 2073 dataphys += curlen; 2074 cur = next; 2075 } 2076 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2077 *ep = cur; 2078 2079 return (USBD_NORMAL_COMPLETION); 2080 2081 nomem: 2082 /* XXX free chain */ 2083 return (USBD_NOMEM); 2084 } 2085 2086 Static void 2087 ehci_free_std_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2088 ehci_soft_qtd_t *sqtdend) 2089 { 2090 ehci_soft_qtd_t *p; 2091 2092 for (; sqtd != sqtdend; sqtd = p) { 2093 p = sqtd->nextqtd; 2094 ehci_free_sqtd(sc, sqtd); 2095 } 2096 } 2097 2098 /****************/ 2099 2100 /* 2101 * Close a reqular pipe. 2102 * Assumes that there are no pending transactions. 2103 */ 2104 void 2105 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2106 { 2107 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2108 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2109 ehci_soft_qh_t *sqh = epipe->sqh; 2110 int s; 2111 2112 s = splusb(); 2113 ehci_rem_qh(sc, sqh, head); 2114 splx(s); 2115 ehci_free_sqh(sc, epipe->sqh); 2116 } 2117 2118 /* 2119 * Abort a device request. 2120 * If this routine is called at splusb() it guarantees that the request 2121 * will be removed from the hardware scheduling and that the callback 2122 * for it will be called with USBD_CANCELLED status. 2123 * It's impossible to guarantee that the requested transfer will not 2124 * have happened since the hardware runs concurrently. 2125 * If the transaction has already happened we rely on the ordinary 2126 * interrupt processing to process it. 2127 */ 2128 void 2129 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2130 { 2131 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2132 ehci_soft_qh_t *sqh = epipe->sqh; 2133 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2134 #if 0 2135 ehci_soft_td_t *p, *n; 2136 ehci_physaddr_t headp; 2137 int hit; 2138 #endif 2139 int s; 2140 2141 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 2142 2143 if (sc->sc_dying) { 2144 /* If we're dying, just do the software part. */ 2145 s = splusb(); 2146 xfer->status = status; /* make software ignore it */ 2147 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2148 usb_transfer_complete(xfer); 2149 splx(s); 2150 return; 2151 } 2152 2153 if (xfer->device->bus->intr_context || !curproc) 2154 panic("ehci_abort_xfer: not in process context\n"); 2155 2156 /* 2157 * Step 1: Make interrupt routine and hardware ignore xfer. 2158 */ 2159 s = splusb(); 2160 xfer->status = status; /* make software ignore it */ 2161 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2162 splx(s); 2163 /* XXX */ 2164 2165 /* 2166 * Step 2: Wait until we know hardware has finished any possible 2167 * use of the xfer. Also make sure the soft interrupt routine 2168 * has run. 2169 */ 2170 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2171 /* XXX should have some communication with softintr() to know 2172 when it's done */ 2173 usb_delay_ms(epipe->pipe.device->bus, 250); 2174 2175 /* 2176 * Step 3: Remove any vestiges of the xfer from the hardware. 2177 * The complication here is that the hardware may have executed 2178 * beyond the xfer we're trying to abort. So as we're scanning 2179 * the TDs of this xfer we check if the hardware points to 2180 * any of them. 2181 */ 2182 s = splusb(); /* XXX why? */ 2183 /* XXX */ 2184 2185 /* 2186 * Step 4: Turn on hardware again. 2187 */ 2188 /* XXX */ 2189 2190 /* 2191 * Step 5: Execute callback. 2192 */ 2193 #ifdef DIAGNOSTIC 2194 EXFER(xfer)->isdone = 1; 2195 #endif 2196 usb_transfer_complete(xfer); 2197 2198 splx(s); 2199 } 2200 2201 void 2202 ehci_timeout(void *addr) 2203 { 2204 struct ehci_xfer *exfer = addr; 2205 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2206 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2207 2208 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2209 2210 if (sc->sc_dying) { 2211 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2212 return; 2213 } 2214 2215 /* Execute the abort in a process context. */ 2216 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2217 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2218 } 2219 2220 void 2221 ehci_timeout_task(void *addr) 2222 { 2223 usbd_xfer_handle xfer = addr; 2224 int s; 2225 2226 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2227 2228 s = splusb(); 2229 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2230 splx(s); 2231 } 2232 2233 /************************/ 2234 2235 Static usbd_status 2236 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2237 { 2238 usbd_status err; 2239 2240 /* Insert last in queue. */ 2241 err = usb_insert_transfer(xfer); 2242 if (err) 2243 return (err); 2244 2245 /* Pipe isn't running, start first */ 2246 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2247 } 2248 2249 Static usbd_status 2250 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2251 { 2252 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2253 usbd_status err; 2254 2255 if (sc->sc_dying) 2256 return (USBD_IOERROR); 2257 2258 #ifdef DIAGNOSTIC 2259 if (!(xfer->rqflags & URQ_REQUEST)) { 2260 /* XXX panic */ 2261 printf("ehci_device_ctrl_transfer: not a request\n"); 2262 return (USBD_INVAL); 2263 } 2264 #endif 2265 2266 err = ehci_device_request(xfer); 2267 if (err) 2268 return (err); 2269 2270 if (sc->sc_bus.use_polling) 2271 ehci_waitintr(sc, xfer); 2272 return (USBD_IN_PROGRESS); 2273 } 2274 2275 void 2276 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2277 { 2278 struct ehci_xfer *ex = EXFER(xfer); 2279 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2280 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2281 2282 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2283 2284 #ifdef DIAGNOSTIC 2285 if (!(xfer->rqflags & URQ_REQUEST)) { 2286 panic("ehci_ctrl_done: not a request\n"); 2287 } 2288 #endif 2289 2290 ehci_del_intr_list(ex); /* remove from active list */ 2291 2292 if (epipe->u.ctl.length != 0) 2293 ehci_free_std_chain(sc, ex->sqtdstart, ex->sqtdend); 2294 2295 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen)); 2296 } 2297 2298 /* Abort a device control request. */ 2299 Static void 2300 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2301 { 2302 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2303 ehci_abort_xfer(xfer, USBD_CANCELLED); 2304 } 2305 2306 /* Close a device control pipe. */ 2307 Static void 2308 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2309 { 2310 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2311 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2312 2313 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2314 ehci_close_pipe(pipe, sc->sc_async_head); 2315 } 2316 2317 usbd_status 2318 ehci_device_request(usbd_xfer_handle xfer) 2319 { 2320 #define exfer EXFER(xfer) 2321 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2322 usb_device_request_t *req = &xfer->request; 2323 usbd_device_handle dev = epipe->pipe.device; 2324 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2325 int addr = dev->address; 2326 ehci_soft_qtd_t *setup, *stat, *next; 2327 ehci_soft_qh_t *sqh; 2328 int isread; 2329 int len; 2330 usbd_status err; 2331 int s; 2332 2333 isread = req->bmRequestType & UT_READ; 2334 len = UGETW(req->wLength); 2335 2336 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2337 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2338 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2339 UGETW(req->wIndex), len, addr, 2340 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2341 2342 setup = ehci_alloc_sqtd(sc); 2343 if (setup == NULL) { 2344 err = USBD_NOMEM; 2345 goto bad1; 2346 } 2347 stat = ehci_alloc_sqtd(sc); 2348 if (stat == NULL) { 2349 err = USBD_NOMEM; 2350 goto bad2; 2351 } 2352 2353 sqh = epipe->sqh; 2354 epipe->u.ctl.length = len; 2355 2356 /* XXX 2357 * Since we're messing with the QH we must know the HC is in sync. 2358 * This needs to go away since it slows down control transfers. 2359 * Removing it entails: 2360 * - fill the QH only once with addr & wMaxPacketSize 2361 * - put the correct data toggles in the qtds and set DTC 2362 */ 2363 /* ehci_sync_hc(sc); */ 2364 /* Update device address and length since they may have changed. */ 2365 /* XXX This only needs to be done once, but it's too early in open. */ 2366 /* XXXX Should not touch ED here! */ 2367 sqh->qh.qh_endp = 2368 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2369 htole32( 2370 EHCI_QH_SET_ADDR(addr) | 2371 /* EHCI_QH_DTC | */ 2372 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2373 ); 2374 /* Clear toggle */ 2375 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2376 2377 /* Set up data transaction */ 2378 if (len != 0) { 2379 ehci_soft_qtd_t *end; 2380 2381 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, 2382 &next, &end); 2383 if (err) 2384 goto bad3; 2385 end->nextqtd = stat; 2386 end->qtd.qtd_next = 2387 end->qtd.qtd_altnext = htole32(stat->physaddr); 2388 /* Start toggle at 1. */ 2389 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2390 } else { 2391 next = stat; 2392 } 2393 2394 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req); 2395 2396 setup->qtd.qtd_status = htole32( 2397 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2398 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2399 EHCI_QTD_SET_CERR(3) | 2400 EHCI_QTD_SET_BYTES(sizeof *req) 2401 ); 2402 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma)); 2403 setup->nextqtd = next; 2404 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2405 setup->xfer = xfer; 2406 setup->len = sizeof *req; 2407 2408 stat->qtd.qtd_status = htole32( 2409 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2410 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2411 EHCI_QTD_SET_CERR(3) | 2412 EHCI_QTD_IOC 2413 ); 2414 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2415 stat->nextqtd = NULL; 2416 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2417 stat->xfer = xfer; 2418 stat->len = 0; 2419 2420 #ifdef EHCI_DEBUG 2421 if (ehcidebug > 2) { 2422 DPRINTF(("ehci_device_request:\n")); 2423 ehci_dump_sqh(sqh); 2424 ehci_dump_sqtds(setup); 2425 } 2426 #endif 2427 2428 exfer->sqtdstart = setup; 2429 exfer->sqtdend = stat; 2430 #ifdef DIAGNOSTIC 2431 if (!exfer->isdone) { 2432 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2433 } 2434 exfer->isdone = 0; 2435 #endif 2436 2437 /* Insert qTD in QH list. */ 2438 s = splusb(); 2439 sqh->qh.qh_curqtd = 0; 2440 sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr); 2441 sqh->sqtd = setup; 2442 if (xfer->timeout && !sc->sc_bus.use_polling) { 2443 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2444 ehci_timeout, xfer); 2445 } 2446 ehci_add_intr_list(sc, exfer); 2447 xfer->status = USBD_IN_PROGRESS; 2448 splx(s); 2449 2450 #ifdef EHCI_DEBUG 2451 if (ehcidebug > 10) { 2452 delay(10000); 2453 DPRINTF(("ehci_device_request: status=%x\n", 2454 EOREAD4(sc, EHCI_USBSTS))); 2455 ehci_dump_regs(sc); 2456 ehci_dump_sqh(sc->sc_async_head); 2457 ehci_dump_sqh(sqh); 2458 ehci_dump_sqtds(setup); 2459 } 2460 #endif 2461 2462 return (USBD_NORMAL_COMPLETION); 2463 2464 bad3: 2465 ehci_free_sqtd(sc, stat); 2466 bad2: 2467 ehci_free_sqtd(sc, setup); 2468 bad1: 2469 return (err); 2470 #undef exfer 2471 } 2472 2473 /************************/ 2474 2475 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2476 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2477 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { } 2478 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { } 2479 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { } 2480 2481 /************************/ 2482 2483 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2484 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2485 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2486 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2487 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2488 2489 /************************/ 2490 2491 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2492 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2493 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2494 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2495 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2496
Indexes created Mon Sep 22 13:09:51 GMT 2025