ehci.c revision 1.19 1 /* $NetBSD: ehci.c,v 1.19 2001/11/21 13:04:50 augustss Exp $ */
2
3 /*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart (at) augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 *
42 * The EHCI 0.96 spec can be found at
43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 * and the USB 2.0 spec at
45 * http://www.usb.org/developers/data/usb_20.zip
46 *
47 */
48
49 #include <sys/cdefs.h>
50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.19 2001/11/21 13:04:50 augustss Exp $");
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/kernel.h>
55 #include <sys/malloc.h>
56 #include <sys/device.h>
57 #include <sys/select.h>
58 #include <sys/proc.h>
59 #include <sys/queue.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ehcireg.h>
71 #include <dev/usb/ehcivar.h>
72
73 #ifdef EHCI_DEBUG
74 #define DPRINTF(x) if (ehcidebug) printf x
75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 int ehcidebug = 0;
77 #ifndef __NetBSD__
78 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
79 #endif
80 #else
81 #define DPRINTF(x)
82 #define DPRINTFN(n,x)
83 #endif
84
85 struct ehci_pipe {
86 struct usbd_pipe pipe;
87 ehci_soft_qh_t *sqh;
88 union {
89 ehci_soft_qtd_t *qtd;
90 /* ehci_soft_itd_t *itd; */
91 } tail;
92 union {
93 /* Control pipe */
94 struct {
95 usb_dma_t reqdma;
96 u_int length;
97 /*ehci_soft_qtd_t *setup, *data, *stat;*/
98 } ctl;
99 /* Interrupt pipe */
100 /* XXX */
101 /* Bulk pipe */
102 struct {
103 u_int length;
104 } bulk;
105 /* Iso pipe */
106 /* XXX */
107 } u;
108 };
109
110 Static void ehci_shutdown(void *);
111 Static void ehci_power(int, void *);
112
113 Static usbd_status ehci_open(usbd_pipe_handle);
114 Static void ehci_poll(struct usbd_bus *);
115 Static void ehci_softintr(void *);
116 Static int ehci_intr1(ehci_softc_t *);
117 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
118 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
119 Static void ehci_idone(struct ehci_xfer *);
120 Static void ehci_timeout(void *);
121 Static void ehci_timeout_task(void *);
122
123 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
124 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
125
126 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
127 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
128
129 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
130 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
131 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
132 Static void ehci_root_ctrl_close(usbd_pipe_handle);
133 Static void ehci_root_ctrl_done(usbd_xfer_handle);
134
135 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
136 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
137 Static void ehci_root_intr_abort(usbd_xfer_handle);
138 Static void ehci_root_intr_close(usbd_pipe_handle);
139 Static void ehci_root_intr_done(usbd_xfer_handle);
140
141 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
142 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
143 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
144 Static void ehci_device_ctrl_close(usbd_pipe_handle);
145 Static void ehci_device_ctrl_done(usbd_xfer_handle);
146
147 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
148 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
149 Static void ehci_device_bulk_abort(usbd_xfer_handle);
150 Static void ehci_device_bulk_close(usbd_pipe_handle);
151 Static void ehci_device_bulk_done(usbd_xfer_handle);
152
153 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
154 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
155 Static void ehci_device_intr_abort(usbd_xfer_handle);
156 Static void ehci_device_intr_close(usbd_pipe_handle);
157 Static void ehci_device_intr_done(usbd_xfer_handle);
158
159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
161 Static void ehci_device_isoc_abort(usbd_xfer_handle);
162 Static void ehci_device_isoc_close(usbd_pipe_handle);
163 Static void ehci_device_isoc_done(usbd_xfer_handle);
164
165 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
166 Static void ehci_noop(usbd_pipe_handle pipe);
167
168 Static int ehci_str(usb_string_descriptor_t *, int, char *);
169 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
170 Static void ehci_pcd_able(ehci_softc_t *, int);
171 Static void ehci_pcd_enable(void *);
172 Static void ehci_disown(ehci_softc_t *, int, int);
173
174 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
175 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
176
177 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
178 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
179 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *,
180 ehci_softc_t *, int, int, usbd_xfer_handle,
181 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
182 Static void ehci_free_std_chain(ehci_softc_t *, ehci_soft_qtd_t *,
183 ehci_soft_qtd_t *);
184
185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
186
187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
189 ehci_soft_qh_t *);
190 Static void ehci_sync_hc(ehci_softc_t *);
191
192 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
193 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
194
195 #ifdef EHCI_DEBUG
196 Static void ehci_dump_regs(ehci_softc_t *);
197 Static void ehci_dump(void);
198 Static ehci_softc_t *theehci;
199 Static void ehci_dump_link(ehci_link_t, int);
200 Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
201 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
202 Static void ehci_dump_qtd(ehci_qtd_t *);
203 Static void ehci_dump_sqh(ehci_soft_qh_t *);
204 Static void ehci_dump_exfer(struct ehci_xfer *);
205 #endif
206
207 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
208
209 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
210
211 #define EHCI_INTR_ENDPT 1
212
213 #define ehci_add_intr_list(sc, ex) \
214 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
215 #define ehci_del_intr_list(ex) \
216 LIST_REMOVE((ex), inext)
217
218 Static struct usbd_bus_methods ehci_bus_methods = {
219 ehci_open,
220 ehci_softintr,
221 ehci_poll,
222 ehci_allocm,
223 ehci_freem,
224 ehci_allocx,
225 ehci_freex,
226 };
227
228 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
229 ehci_root_ctrl_transfer,
230 ehci_root_ctrl_start,
231 ehci_root_ctrl_abort,
232 ehci_root_ctrl_close,
233 ehci_noop,
234 ehci_root_ctrl_done,
235 };
236
237 Static struct usbd_pipe_methods ehci_root_intr_methods = {
238 ehci_root_intr_transfer,
239 ehci_root_intr_start,
240 ehci_root_intr_abort,
241 ehci_root_intr_close,
242 ehci_noop,
243 ehci_root_intr_done,
244 };
245
246 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
247 ehci_device_ctrl_transfer,
248 ehci_device_ctrl_start,
249 ehci_device_ctrl_abort,
250 ehci_device_ctrl_close,
251 ehci_noop,
252 ehci_device_ctrl_done,
253 };
254
255 Static struct usbd_pipe_methods ehci_device_intr_methods = {
256 ehci_device_intr_transfer,
257 ehci_device_intr_start,
258 ehci_device_intr_abort,
259 ehci_device_intr_close,
260 ehci_device_clear_toggle,
261 ehci_device_intr_done,
262 };
263
264 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
265 ehci_device_bulk_transfer,
266 ehci_device_bulk_start,
267 ehci_device_bulk_abort,
268 ehci_device_bulk_close,
269 ehci_device_clear_toggle,
270 ehci_device_bulk_done,
271 };
272
273 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
274 ehci_device_isoc_transfer,
275 ehci_device_isoc_start,
276 ehci_device_isoc_abort,
277 ehci_device_isoc_close,
278 ehci_noop,
279 ehci_device_isoc_done,
280 };
281
282 usbd_status
283 ehci_init(ehci_softc_t *sc)
284 {
285 u_int32_t version, sparams, cparams, hcr;
286 u_int i;
287 usbd_status err;
288 ehci_soft_qh_t *sqh;
289
290 DPRINTF(("ehci_init: start\n"));
291 #ifdef EHCI_DEBUG
292 theehci = sc;
293 #endif
294
295 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
296
297 version = EREAD2(sc, EHCI_HCIVERSION);
298 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
299 version >> 8, version & 0xff);
300
301 sparams = EREAD4(sc, EHCI_HCSPARAMS);
302 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
303 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
304 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
305 printf("%s: wrong number of companions (%d != %d)\n",
306 USBDEVNAME(sc->sc_bus.bdev),
307 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
308 return (USBD_IOERROR);
309 }
310 if (sc->sc_ncomp > 0) {
311 printf("%s: companion controller%s, %d port%s each:",
312 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
313 EHCI_HCS_N_PCC(sparams),
314 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
315 for (i = 0; i < sc->sc_ncomp; i++)
316 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
317 printf("\n");
318 }
319 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
320 cparams = EREAD4(sc, EHCI_HCCPARAMS);
321 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
322
323 sc->sc_bus.usbrev = USBREV_2_0;
324
325 /* Reset the controller */
326 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
327 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
328 usb_delay_ms(&sc->sc_bus, 1);
329 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
330 for (i = 0; i < 100; i++) {
331 delay(10);
332 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
333 if (!hcr)
334 break;
335 }
336 if (hcr) {
337 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
338 return (USBD_IOERROR);
339 }
340
341 /* frame list size at default, read back what we got and use that */
342 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
343 case 0: sc->sc_flsize = 1024*4; break;
344 case 1: sc->sc_flsize = 512*4; break;
345 case 2: sc->sc_flsize = 256*4; break;
346 case 3: return (USBD_IOERROR);
347 }
348 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
349 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
350 if (err)
351 return (err);
352 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
353
354 /* Set up the bus struct. */
355 sc->sc_bus.methods = &ehci_bus_methods;
356 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
357
358 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
359 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
360
361 sc->sc_eintrs = EHCI_NORMAL_INTRS;
362
363 /* Allocate dummy QH that starts the async list. */
364 sqh = ehci_alloc_sqh(sc);
365 if (sqh == NULL) {
366 err = USBD_NOMEM;
367 goto bad1;
368 }
369 /* Fill the QH */
370 sqh->qh.qh_endp =
371 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
372 sqh->qh.qh_link =
373 htole32(sqh->physaddr | EHCI_LINK_QH);
374 sqh->qh.qh_curqtd = EHCI_NULL;
375 sqh->next = NULL;
376 /* Fill the overlay qTD */
377 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
378 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
379 sqh->qh.qh_qtd.qtd_status =
380 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
381 sqh->sqtd = NULL;
382 #ifdef EHCI_DEBUG
383 if (ehcidebug) {
384 ehci_dump_sqh(sc->sc_async_head);
385 }
386 #endif
387
388 /* Point to async list */
389 sc->sc_async_head = sqh;
390 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
391
392 usb_callout_init(sc->sc_tmo_pcd);
393
394 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
395
396 /* Enable interrupts */
397 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
398
399 /* Turn on controller */
400 EOWRITE4(sc, EHCI_USBCMD,
401 EHCI_CMD_ITC_8 | /* 8 microframes */
402 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
403 EHCI_CMD_ASE |
404 /* EHCI_CMD_PSE | */
405 EHCI_CMD_RS);
406
407 /* Take over port ownership */
408 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
409
410 for (i = 0; i < 100; i++) {
411 delay(10);
412 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
413 if (!hcr)
414 break;
415 }
416 if (hcr) {
417 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
418 return (USBD_IOERROR);
419 }
420
421 return (USBD_NORMAL_COMPLETION);
422
423 #if 0
424 bad2:
425 ehci_free_sqh(sc, sc->sc_async_head);
426 #endif
427 bad1:
428 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
429 return (err);
430 }
431
432 int
433 ehci_intr(void *v)
434 {
435 ehci_softc_t *sc = v;
436
437 if (sc == NULL || sc->sc_dying)
438 return (0);
439
440 /* If we get an interrupt while polling, then just ignore it. */
441 if (sc->sc_bus.use_polling) {
442 #ifdef DIAGNOSTIC
443 printf("ehci_intr: ignored interrupt while polling\n");
444 #endif
445 return (0);
446 }
447
448 return (ehci_intr1(sc));
449 }
450
451 Static int
452 ehci_intr1(ehci_softc_t *sc)
453 {
454 u_int32_t intrs, eintrs;
455
456 DPRINTFN(20,("ehci_intr1: enter\n"));
457
458 /* In case the interrupt occurs before initialization has completed. */
459 if (sc == NULL) {
460 #ifdef DIAGNOSTIC
461 printf("ehci_intr: sc == NULL\n");
462 #endif
463 return (0);
464 }
465
466 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
467
468 if (!intrs)
469 return (0);
470
471 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
472 eintrs = intrs & sc->sc_eintrs;
473 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
474 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
475 (u_int)eintrs));
476 if (!eintrs)
477 return (0);
478
479 sc->sc_bus.intr_context++;
480 sc->sc_bus.no_intrs++;
481 if (eintrs & EHCI_STS_IAA) {
482 DPRINTF(("ehci_intr1: door bell\n"));
483 wakeup(&sc->sc_async_head);
484 eintrs &= ~EHCI_STS_INT;
485 }
486 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
487 DPRINTF(("ehci_intr1: INT/ERRINT\n"));
488 usb_schedsoftintr(&sc->sc_bus);
489 eintrs &= ~(EHCI_STS_INT | EHCI_STS_HSE);
490 }
491 if (eintrs & EHCI_STS_HSE) {
492 printf("%s: unrecoverable error, controller halted\n",
493 USBDEVNAME(sc->sc_bus.bdev));
494 /* XXX what else */
495 }
496 if (eintrs & EHCI_STS_PCD) {
497 ehci_pcd(sc, sc->sc_intrxfer);
498 /*
499 * Disable PCD interrupt for now, because it will be
500 * on until the port has been reset.
501 */
502 ehci_pcd_able(sc, 0);
503 /* Do not allow RHSC interrupts > 1 per second */
504 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
505 eintrs &= ~EHCI_STS_PCD;
506 }
507
508 sc->sc_bus.intr_context--;
509
510 if (eintrs != 0) {
511 /* Block unprocessed interrupts. */
512 sc->sc_eintrs &= ~eintrs;
513 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
514 printf("%s: blocking intrs 0x%x\n",
515 USBDEVNAME(sc->sc_bus.bdev), eintrs);
516 }
517
518 return (1);
519 }
520
521 void
522 ehci_pcd_able(ehci_softc_t *sc, int on)
523 {
524 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
525 if (on)
526 sc->sc_eintrs |= EHCI_STS_PCD;
527 else
528 sc->sc_eintrs &= ~EHCI_STS_PCD;
529 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
530 }
531
532 void
533 ehci_pcd_enable(void *v_sc)
534 {
535 ehci_softc_t *sc = v_sc;
536
537 ehci_pcd_able(sc, 1);
538 }
539
540 void
541 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
542 {
543 usbd_pipe_handle pipe;
544 struct ehci_pipe *epipe;
545 u_char *p;
546 int i, m;
547
548 if (xfer == NULL) {
549 /* Just ignore the change. */
550 return;
551 }
552
553 pipe = xfer->pipe;
554 epipe = (struct ehci_pipe *)pipe;
555
556 p = KERNADDR(&xfer->dmabuf);
557 m = min(sc->sc_noport, xfer->length * 8 - 1);
558 memset(p, 0, xfer->length);
559 for (i = 1; i <= m; i++) {
560 /* Pick out CHANGE bits from the status reg. */
561 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
562 p[i/8] |= 1 << (i%8);
563 }
564 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
565 xfer->actlen = xfer->length;
566 xfer->status = USBD_NORMAL_COMPLETION;
567
568 usb_transfer_complete(xfer);
569 }
570
571 void
572 ehci_softintr(void *v)
573 {
574 ehci_softc_t *sc = v;
575 struct ehci_xfer *ex;
576
577 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
578 sc->sc_bus.intr_context));
579
580 sc->sc_bus.intr_context++;
581
582 /*
583 * The only explanation I can think of for why EHCI is as brain dead
584 * as UHCI interrupt-wise is that Intel was involved in both.
585 * An interrupt just tells us that something is done, we have no
586 * clue what, so we need to scan through all active transfers. :-(
587 */
588 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
589 ehci_check_intr(sc, ex);
590
591 sc->sc_bus.intr_context--;
592 }
593
594 /* Check for an interrupt. */
595 void
596 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
597 {
598 ehci_soft_qtd_t *sqtd, *lsqtd;
599 u_int32_t status;
600
601 DPRINTFN(15, ("ehci_check_intr: ex=%p\n", ex));
602
603 if (ex->sqtdstart == NULL) {
604 printf("ehci_check_intr: sqtdstart=NULL\n");
605 return;
606 }
607 lsqtd = ex->sqtdend;
608 #ifdef DIAGNOSTIC
609 if (lsqtd == NULL) {
610 printf("ehci_check_intr: sqtd==0\n");
611 return;
612 }
613 #endif
614 /*
615 * If the last TD is still active we need to check whether there
616 * is a an error somewhere in the middle, or whether there was a
617 * short packet (SPD and not ACTIVE).
618 */
619 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
620 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
621 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
622 status = le32toh(sqtd->qtd.qtd_status);
623 /* If there's an active QTD the xfer isn't done. */
624 if (status & EHCI_QTD_ACTIVE)
625 break;
626 /* Any kind of error makes the xfer done. */
627 if (status & EHCI_QTD_HALTED)
628 goto done;
629 /* We want short packets, and it is short: it's done */
630 if (EHCI_QTD_SET_BYTES(status) != 0)
631 goto done;
632 }
633 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
634 ex, ex->sqtdstart));
635 return;
636 }
637 done:
638 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
639 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
640 ehci_idone(ex);
641 }
642
643 void
644 ehci_idone(struct ehci_xfer *ex)
645 {
646 usbd_xfer_handle xfer = &ex->xfer;
647 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
648 ehci_soft_qtd_t *sqtd;
649 u_int32_t status = 0, nstatus;
650 int actlen;
651
652 DPRINTFN(12, ("ehci_idone: ex=%p\n", ex));
653 #ifdef DIAGNOSTIC
654 {
655 int s = splhigh();
656 if (ex->isdone) {
657 splx(s);
658 #ifdef EHCI_DEBUG
659 printf("ehci_idone: ex is done!\n ");
660 ehci_dump_exfer(ex);
661 #else
662 printf("ehci_idone: ex=%p is done!\n", ex);
663 #endif
664 return;
665 }
666 ex->isdone = 1;
667 splx(s);
668 }
669 #endif
670
671 if (xfer->status == USBD_CANCELLED ||
672 xfer->status == USBD_TIMEOUT) {
673 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
674 return;
675 }
676
677 #ifdef EHCI_DEBUG
678 DPRINTFN(10, ("ehci_idone: ex=%p, xfer=%p, pipe=%p ready\n",
679 ex, xfer, epipe));
680 if (ehcidebug > 10)
681 ehci_dump_sqtds(ex->sqtdstart);
682 #endif
683
684 /* The transfer is done, compute actual length and status. */
685 actlen = 0;
686 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
687 nstatus = le32toh(sqtd->qtd.qtd_status);
688 if (nstatus & EHCI_QTD_ACTIVE)
689 break;
690
691 status = nstatus;
692 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
693 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
694 }
695 #if 0
696 /* If there are left over TDs we need to update the toggle. */
697 if (sqtd != NULL)
698 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
699 #endif
700
701 status &= EHCI_QTD_STATERRS;
702 DPRINTFN(10, ("ehci_idone: actlen=%d, status=0x%x\n", actlen, status));
703 xfer->actlen = actlen;
704 if (status != 0) {
705 #ifdef EHCI_DEBUG
706 char sbuf[128];
707
708 bitmask_snprintf((u_int32_t)status,
709 "\20\2MISSEDMICRO\3XACT\4BABBLE\5BABBLE"
710 "\6HALTED",
711 sbuf, sizeof(sbuf));
712
713 DPRINTFN((status == EHCI_QTD_HALTED)*10,
714 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
715 "status 0x%s\n",
716 xfer->pipe->device->address,
717 xfer->pipe->endpoint->edesc->bEndpointAddress,
718 sbuf));
719 #endif
720
721 if (status == EHCI_QTD_HALTED)
722 xfer->status = USBD_STALLED;
723 else
724 xfer->status = USBD_IOERROR; /* more info XXX */
725 } else {
726 xfer->status = USBD_NORMAL_COMPLETION;
727 }
728
729 usb_transfer_complete(xfer);
730 DPRINTFN(12, ("ehci_idone: ex=%p done\n", ex));
731 }
732
733 /*
734 * Wait here until controller claims to have an interrupt.
735 * Then call ehci_intr and return. Use timeout to avoid waiting
736 * too long.
737 */
738 void
739 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
740 {
741 int timo = xfer->timeout;
742 int usecs;
743 u_int32_t intrs;
744
745 xfer->status = USBD_IN_PROGRESS;
746 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
747 usb_delay_ms(&sc->sc_bus, 1);
748 if (sc->sc_dying)
749 break;
750 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
751 sc->sc_eintrs;
752 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
753 #ifdef OHCI_DEBUG
754 if (ehcidebug > 15)
755 ehci_dump_regs(sc);
756 #endif
757 if (intrs) {
758 ehci_intr1(sc);
759 if (xfer->status != USBD_IN_PROGRESS)
760 return;
761 }
762 }
763
764 /* Timeout */
765 DPRINTF(("ehci_waitintr: timeout\n"));
766 xfer->status = USBD_TIMEOUT;
767 usb_transfer_complete(xfer);
768 /* XXX should free TD */
769 }
770
771 void
772 ehci_poll(struct usbd_bus *bus)
773 {
774 ehci_softc_t *sc = (ehci_softc_t *)bus;
775 #ifdef EHCI_DEBUG
776 static int last;
777 int new;
778 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
779 if (new != last) {
780 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
781 last = new;
782 }
783 #endif
784
785 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
786 ehci_intr1(sc);
787 }
788
789 int
790 ehci_detach(struct ehci_softc *sc, int flags)
791 {
792 int rv = 0;
793
794 if (sc->sc_child != NULL)
795 rv = config_detach(sc->sc_child, flags);
796
797 if (rv != 0)
798 return (rv);
799
800 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
801
802 if (sc->sc_powerhook != NULL)
803 powerhook_disestablish(sc->sc_powerhook);
804 if (sc->sc_shutdownhook != NULL)
805 shutdownhook_disestablish(sc->sc_shutdownhook);
806
807 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
808
809 /* XXX free other data structures XXX */
810
811 return (rv);
812 }
813
814
815 int
816 ehci_activate(device_ptr_t self, enum devact act)
817 {
818 struct ehci_softc *sc = (struct ehci_softc *)self;
819 int rv = 0;
820
821 switch (act) {
822 case DVACT_ACTIVATE:
823 return (EOPNOTSUPP);
824 break;
825
826 case DVACT_DEACTIVATE:
827 if (sc->sc_child != NULL)
828 rv = config_deactivate(sc->sc_child);
829 sc->sc_dying = 1;
830 break;
831 }
832 return (rv);
833 }
834
835 /*
836 * Handle suspend/resume.
837 *
838 * We need to switch to polling mode here, because this routine is
839 * called from an intterupt context. This is all right since we
840 * are almost suspended anyway.
841 */
842 void
843 ehci_power(int why, void *v)
844 {
845 ehci_softc_t *sc = v;
846 //u_int32_t ctl;
847 int s;
848
849 #ifdef EHCI_DEBUG
850 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
851 ehci_dump_regs(sc);
852 #endif
853
854 s = splhardusb();
855 switch (why) {
856 case PWR_SUSPEND:
857 case PWR_STANDBY:
858 sc->sc_bus.use_polling++;
859 #if 0
860 OOO
861 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
862 if (sc->sc_control == 0) {
863 /*
864 * Preserve register values, in case that APM BIOS
865 * does not recover them.
866 */
867 sc->sc_control = ctl;
868 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
869 }
870 ctl |= EHCI_HCFS_SUSPEND;
871 OWRITE4(sc, EHCI_CONTROL, ctl);
872 #endif
873 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
874 sc->sc_bus.use_polling--;
875 break;
876 case PWR_RESUME:
877 sc->sc_bus.use_polling++;
878 #if 0
879 OOO
880 /* Some broken BIOSes do not recover these values */
881 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
882 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
883 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
884 if (sc->sc_intre)
885 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
886 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
887 if (sc->sc_control)
888 ctl = sc->sc_control;
889 else
890 ctl = OREAD4(sc, EHCI_CONTROL);
891 ctl |= EHCI_HCFS_RESUME;
892 OWRITE4(sc, EHCI_CONTROL, ctl);
893 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
894 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
895 OWRITE4(sc, EHCI_CONTROL, ctl);
896 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
897 sc->sc_control = sc->sc_intre = 0;
898 #endif
899 sc->sc_bus.use_polling--;
900 break;
901 case PWR_SOFTSUSPEND:
902 case PWR_SOFTSTANDBY:
903 case PWR_SOFTRESUME:
904 break;
905 }
906 splx(s);
907 }
908
909 /*
910 * Shut down the controller when the system is going down.
911 */
912 void
913 ehci_shutdown(void *v)
914 {
915 ehci_softc_t *sc = v;
916
917 DPRINTF(("ehci_shutdown: stopping the HC\n"));
918 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
919 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
920 }
921
922 usbd_status
923 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
924 {
925 struct ehci_softc *sc = (struct ehci_softc *)bus;
926
927 return (usb_allocmem(&sc->sc_bus, size, 0, dma));
928 }
929
930 void
931 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
932 {
933 struct ehci_softc *sc = (struct ehci_softc *)bus;
934
935 usb_freemem(&sc->sc_bus, dma);
936 }
937
938 usbd_xfer_handle
939 ehci_allocx(struct usbd_bus *bus)
940 {
941 struct ehci_softc *sc = (struct ehci_softc *)bus;
942 usbd_xfer_handle xfer;
943
944 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
945 if (xfer != NULL)
946 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
947 else
948 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
949 if (xfer != NULL) {
950 memset(xfer, 0, sizeof (struct ehci_xfer));
951 #ifdef DIAGNOSTIC
952 EXFER(xfer)->isdone = 1;
953 xfer->busy_free = XFER_BUSY;
954 #endif
955 }
956 return (xfer);
957 }
958
959 void
960 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
961 {
962 struct ehci_softc *sc = (struct ehci_softc *)bus;
963
964 #ifdef DIAGNOSTIC
965 if (xfer->busy_free != XFER_BUSY) {
966 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
967 xfer->busy_free);
968 return;
969 }
970 xfer->busy_free = XFER_FREE;
971 if (!EXFER(xfer)->isdone) {
972 printf("ehci_freex: !isdone\n");
973 return;
974 }
975 #endif
976 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
977 }
978
979 Static void
980 ehci_device_clear_toggle(usbd_pipe_handle pipe)
981 {
982 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
983
984 printf("ehci_device_clear_toggle: epipe=%p\n", epipe);
985 #if 0
986 OOO
987 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
988 #endif
989 }
990
991 Static void
992 ehci_noop(usbd_pipe_handle pipe)
993 {
994 }
995
996 #ifdef EHCI_DEBUG
997 void
998 ehci_dump_regs(ehci_softc_t *sc)
999 {
1000 int i;
1001 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1002 EOREAD4(sc, EHCI_USBCMD),
1003 EOREAD4(sc, EHCI_USBSTS),
1004 EOREAD4(sc, EHCI_USBINTR));
1005 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1006 EOREAD4(sc, EHCI_FRINDEX),
1007 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1008 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1009 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1010 for (i = 1; i <= sc->sc_noport; i++)
1011 printf("port %d status=0x%08x\n", i,
1012 EOREAD4(sc, EHCI_PORTSC(i)));
1013 }
1014
1015 void
1016 ehci_dump()
1017 {
1018 ehci_dump_regs(theehci);
1019 }
1020
1021 void
1022 ehci_dump_link(ehci_link_t link, int type)
1023 {
1024 link = le32toh(link);
1025 printf("0x%08x", link);
1026 if (link & EHCI_LINK_TERMINATE)
1027 printf("<T>");
1028 else {
1029 printf("<");
1030 if (type) {
1031 switch (EHCI_LINK_TYPE(link)) {
1032 case EHCI_LINK_ITD: printf("ITD"); break;
1033 case EHCI_LINK_QH: printf("QH"); break;
1034 case EHCI_LINK_SITD: printf("SITD"); break;
1035 case EHCI_LINK_FSTN: printf("FSTN"); break;
1036 }
1037 }
1038 printf(">");
1039 }
1040 }
1041
1042 void
1043 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1044 {
1045 for (; sqtd; sqtd = sqtd->nextqtd)
1046 ehci_dump_sqtd(sqtd);
1047 }
1048
1049 void
1050 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1051 {
1052 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1053 ehci_dump_qtd(&sqtd->qtd);
1054 }
1055
1056 void
1057 ehci_dump_qtd(ehci_qtd_t *qtd)
1058 {
1059 u_int32_t s;
1060 char sbuf[128];
1061
1062 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1063 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1064 printf("\n");
1065 s = le32toh(qtd->qtd_status);
1066 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1067 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1068 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1069 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1070 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1071 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1072 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1073 EHCI_QTD_GET_PID(s), sbuf);
1074 for (s = 0; s < 5; s++)
1075 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1076 }
1077
1078 void
1079 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1080 {
1081 ehci_qh_t *qh = &sqh->qh;
1082 u_int32_t endp, endphub;
1083
1084 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1085 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1086 endp = le32toh(qh->qh_endp);
1087 printf(" endp=0x%08x\n", endp);
1088 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1089 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1090 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1091 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1092 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1093 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1094 EHCI_QH_GET_NRL(endp));
1095 endphub = le32toh(qh->qh_endphub);
1096 printf(" endphub=0x%08x\n", endphub);
1097 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1098 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1099 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1100 EHCI_QH_GET_MULT(endphub));
1101 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1102 printf("Overlay qTD:\n");
1103 ehci_dump_qtd(&qh->qh_qtd);
1104 }
1105
1106 Static void
1107 ehci_dump_exfer(struct ehci_xfer *ex)
1108 {
1109 printf("ehci_dump_exfer: ex=%p\n", ex);
1110 }
1111 #endif
1112
1113 usbd_status
1114 ehci_open(usbd_pipe_handle pipe)
1115 {
1116 usbd_device_handle dev = pipe->device;
1117 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1118 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1119 u_int8_t addr = dev->address;
1120 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1121 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1122 ehci_soft_qh_t *sqh;
1123 usbd_status err;
1124 #if 0
1125 ehci_soft_itd_t *sitd;
1126 ehci_physaddr_t tdphys;
1127 u_int32_t fmt;
1128 int ival;
1129 #endif
1130 int s;
1131 int speed, naks;
1132
1133 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1134 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1135
1136 if (sc->sc_dying)
1137 return (USBD_IOERROR);
1138
1139 if (addr == sc->sc_addr) {
1140 switch (ed->bEndpointAddress) {
1141 case USB_CONTROL_ENDPOINT:
1142 pipe->methods = &ehci_root_ctrl_methods;
1143 break;
1144 case UE_DIR_IN | EHCI_INTR_ENDPT:
1145 pipe->methods = &ehci_root_intr_methods;
1146 break;
1147 default:
1148 return (USBD_INVAL);
1149 }
1150 return (USBD_NORMAL_COMPLETION);
1151 }
1152
1153 switch (dev->speed) {
1154 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1155 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1156 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1157 default: panic("ehci_open: bad device speed %d\n", dev->speed);
1158 }
1159 naks = 8; /* XXX */
1160 sqh = ehci_alloc_sqh(sc);
1161 if (sqh == NULL)
1162 goto bad0;
1163 /* qh_link filled when the QH is added */
1164 sqh->qh.qh_endp = htole32(
1165 EHCI_QH_SET_ADDR(addr) |
1166 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1167 EHCI_QH_SET_EPS(speed) | /* XXX */
1168 /* XXX EHCI_QH_DTC ? */
1169 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1170 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1171 EHCI_QH_CTL : 0) |
1172 EHCI_QH_SET_NRL(naks)
1173 );
1174 sqh->qh.qh_endphub = htole32(
1175 EHCI_QH_SET_MULT(1)
1176 /* XXX TT stuff */
1177 /* XXX interrupt mask */
1178 );
1179 sqh->qh.qh_curqtd = EHCI_NULL;
1180 /* Fill the overlay qTD */
1181 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1182 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1183 sqh->qh.qh_qtd.qtd_status = htole32(0);
1184
1185 epipe->sqh = sqh;
1186
1187 switch (xfertype) {
1188 case UE_CONTROL:
1189 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1190 0, &epipe->u.ctl.reqdma);
1191 if (err)
1192 goto bad1;
1193 pipe->methods = &ehci_device_ctrl_methods;
1194 s = splusb();
1195 ehci_add_qh(sqh, sc->sc_async_head);
1196 splx(s);
1197 break;
1198 case UE_BULK:
1199 pipe->methods = &ehci_device_bulk_methods;
1200 s = splusb();
1201 ehci_add_qh(sqh, sc->sc_async_head);
1202 splx(s);
1203 break;
1204 default:
1205 return (USBD_INVAL);
1206 }
1207 return (USBD_NORMAL_COMPLETION);
1208
1209 bad1:
1210 ehci_free_sqh(sc, sqh);
1211 bad0:
1212 return (USBD_NOMEM);
1213 }
1214
1215 /*
1216 * Add an ED to the schedule. Called at splusb().
1217 */
1218 void
1219 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1220 {
1221 SPLUSBCHECK;
1222
1223 sqh->next = head->next;
1224 sqh->qh.qh_link = head->qh.qh_link;
1225 head->next = sqh;
1226 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1227
1228 #ifdef EHCI_DEBUG
1229 if (ehcidebug > 0) {
1230 printf("ehci_add_qh:\n");
1231 ehci_dump_sqh(sqh);
1232 }
1233 #endif
1234 }
1235
1236 /*
1237 * Remove an ED from the schedule. Called at splusb().
1238 */
1239 void
1240 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1241 {
1242 ehci_soft_qh_t *p;
1243
1244 SPLUSBCHECK;
1245 /* XXX */
1246 for (p = head; p == NULL && p->next != sqh; p = p->next)
1247 ;
1248 if (p == NULL)
1249 panic("ehci_rem_qh: ED not found\n");
1250 p->next = sqh->next;
1251 p->qh.qh_link = sqh->qh.qh_link;
1252
1253 ehci_sync_hc(sc);
1254 }
1255
1256 /*
1257 * Ensure that the HC has released all references to the QH. We do this
1258 * by asking for a Async Advance Doorbell interrupt and then we wait for
1259 * the interrupt.
1260 * To make this easier we first obtain exclusive use of the doorbell.
1261 */
1262 void
1263 ehci_sync_hc(ehci_softc_t *sc)
1264 {
1265 int s, error;
1266
1267 if (sc->sc_dying) {
1268 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1269 return;
1270 }
1271 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1272 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1273 s = splhardusb();
1274 /* ask for doorbell */
1275 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1276 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1277 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1278 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1279 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1280 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1281 splx(s);
1282 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1283 #ifdef DIAGNOSTIC
1284 if (error)
1285 printf("ehci_sync_hc: tsleep() = %d\n", error);
1286 #endif
1287 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1288 }
1289
1290 /***********/
1291
1292 /*
1293 * Data structures and routines to emulate the root hub.
1294 */
1295 Static usb_device_descriptor_t ehci_devd = {
1296 USB_DEVICE_DESCRIPTOR_SIZE,
1297 UDESC_DEVICE, /* type */
1298 {0x00, 0x02}, /* USB version */
1299 UDCLASS_HUB, /* class */
1300 UDSUBCLASS_HUB, /* subclass */
1301 UDPROTO_HSHUBSTT, /* protocol */
1302 64, /* max packet */
1303 {0},{0},{0x00,0x01}, /* device id */
1304 1,2,0, /* string indicies */
1305 1 /* # of configurations */
1306 };
1307
1308 Static usb_device_qualifier_t ehci_odevd = {
1309 USB_DEVICE_DESCRIPTOR_SIZE,
1310 UDESC_DEVICE_QUALIFIER, /* type */
1311 {0x00, 0x02}, /* USB version */
1312 UDCLASS_HUB, /* class */
1313 UDSUBCLASS_HUB, /* subclass */
1314 UDPROTO_FSHUB, /* protocol */
1315 64, /* max packet */
1316 1, /* # of configurations */
1317 0
1318 };
1319
1320 Static usb_config_descriptor_t ehci_confd = {
1321 USB_CONFIG_DESCRIPTOR_SIZE,
1322 UDESC_CONFIG,
1323 {USB_CONFIG_DESCRIPTOR_SIZE +
1324 USB_INTERFACE_DESCRIPTOR_SIZE +
1325 USB_ENDPOINT_DESCRIPTOR_SIZE},
1326 1,
1327 1,
1328 0,
1329 UC_SELF_POWERED,
1330 0 /* max power */
1331 };
1332
1333 Static usb_interface_descriptor_t ehci_ifcd = {
1334 USB_INTERFACE_DESCRIPTOR_SIZE,
1335 UDESC_INTERFACE,
1336 0,
1337 0,
1338 1,
1339 UICLASS_HUB,
1340 UISUBCLASS_HUB,
1341 UIPROTO_HSHUBSTT,
1342 0
1343 };
1344
1345 Static usb_endpoint_descriptor_t ehci_endpd = {
1346 USB_ENDPOINT_DESCRIPTOR_SIZE,
1347 UDESC_ENDPOINT,
1348 UE_DIR_IN | EHCI_INTR_ENDPT,
1349 UE_INTERRUPT,
1350 {8, 0}, /* max packet */
1351 255
1352 };
1353
1354 Static usb_hub_descriptor_t ehci_hubd = {
1355 USB_HUB_DESCRIPTOR_SIZE,
1356 UDESC_HUB,
1357 0,
1358 {0,0},
1359 0,
1360 0,
1361 {0},
1362 };
1363
1364 Static int
1365 ehci_str(p, l, s)
1366 usb_string_descriptor_t *p;
1367 int l;
1368 char *s;
1369 {
1370 int i;
1371
1372 if (l == 0)
1373 return (0);
1374 p->bLength = 2 * strlen(s) + 2;
1375 if (l == 1)
1376 return (1);
1377 p->bDescriptorType = UDESC_STRING;
1378 l -= 2;
1379 for (i = 0; s[i] && l > 1; i++, l -= 2)
1380 USETW2(p->bString[i], 0, s[i]);
1381 return (2*i+2);
1382 }
1383
1384 /*
1385 * Simulate a hardware hub by handling all the necessary requests.
1386 */
1387 Static usbd_status
1388 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1389 {
1390 usbd_status err;
1391
1392 /* Insert last in queue. */
1393 err = usb_insert_transfer(xfer);
1394 if (err)
1395 return (err);
1396
1397 /* Pipe isn't running, start first */
1398 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1399 }
1400
1401 Static usbd_status
1402 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1403 {
1404 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1405 usb_device_request_t *req;
1406 void *buf = NULL;
1407 int port, i;
1408 int s, len, value, index, l, totlen = 0;
1409 usb_port_status_t ps;
1410 usb_hub_descriptor_t hubd;
1411 usbd_status err;
1412 u_int32_t v;
1413
1414 if (sc->sc_dying)
1415 return (USBD_IOERROR);
1416
1417 #ifdef DIAGNOSTIC
1418 if (!(xfer->rqflags & URQ_REQUEST))
1419 /* XXX panic */
1420 return (USBD_INVAL);
1421 #endif
1422 req = &xfer->request;
1423
1424 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1425 req->bmRequestType, req->bRequest));
1426
1427 len = UGETW(req->wLength);
1428 value = UGETW(req->wValue);
1429 index = UGETW(req->wIndex);
1430
1431 if (len != 0)
1432 buf = KERNADDR(&xfer->dmabuf);
1433
1434 #define C(x,y) ((x) | ((y) << 8))
1435 switch(C(req->bRequest, req->bmRequestType)) {
1436 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1437 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1438 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1439 /*
1440 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1441 * for the integrated root hub.
1442 */
1443 break;
1444 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1445 if (len > 0) {
1446 *(u_int8_t *)buf = sc->sc_conf;
1447 totlen = 1;
1448 }
1449 break;
1450 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1451 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1452 switch(value >> 8) {
1453 case UDESC_DEVICE:
1454 if ((value & 0xff) != 0) {
1455 err = USBD_IOERROR;
1456 goto ret;
1457 }
1458 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1459 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1460 memcpy(buf, &ehci_devd, l);
1461 break;
1462 /*
1463 * We can't really operate at another speed, but the spec says
1464 * we need this descriptor.
1465 */
1466 case UDESC_DEVICE_QUALIFIER:
1467 if ((value & 0xff) != 0) {
1468 err = USBD_IOERROR;
1469 goto ret;
1470 }
1471 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1472 memcpy(buf, &ehci_odevd, l);
1473 break;
1474 /*
1475 * We can't really operate at another speed, but the spec says
1476 * we need this descriptor.
1477 */
1478 case UDESC_OTHER_SPEED_CONFIGURATION:
1479 case UDESC_CONFIG:
1480 if ((value & 0xff) != 0) {
1481 err = USBD_IOERROR;
1482 goto ret;
1483 }
1484 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1485 memcpy(buf, &ehci_confd, l);
1486 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1487 value >> 8;
1488 buf = (char *)buf + l;
1489 len -= l;
1490 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1491 totlen += l;
1492 memcpy(buf, &ehci_ifcd, l);
1493 buf = (char *)buf + l;
1494 len -= l;
1495 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1496 totlen += l;
1497 memcpy(buf, &ehci_endpd, l);
1498 break;
1499 case UDESC_STRING:
1500 if (len == 0)
1501 break;
1502 *(u_int8_t *)buf = 0;
1503 totlen = 1;
1504 switch (value & 0xff) {
1505 case 1: /* Vendor */
1506 totlen = ehci_str(buf, len, sc->sc_vendor);
1507 break;
1508 case 2: /* Product */
1509 totlen = ehci_str(buf, len, "EHCI root hub");
1510 break;
1511 }
1512 break;
1513 default:
1514 err = USBD_IOERROR;
1515 goto ret;
1516 }
1517 break;
1518 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1519 if (len > 0) {
1520 *(u_int8_t *)buf = 0;
1521 totlen = 1;
1522 }
1523 break;
1524 case C(UR_GET_STATUS, UT_READ_DEVICE):
1525 if (len > 1) {
1526 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1527 totlen = 2;
1528 }
1529 break;
1530 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1531 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1532 if (len > 1) {
1533 USETW(((usb_status_t *)buf)->wStatus, 0);
1534 totlen = 2;
1535 }
1536 break;
1537 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1538 if (value >= USB_MAX_DEVICES) {
1539 err = USBD_IOERROR;
1540 goto ret;
1541 }
1542 sc->sc_addr = value;
1543 break;
1544 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1545 if (value != 0 && value != 1) {
1546 err = USBD_IOERROR;
1547 goto ret;
1548 }
1549 sc->sc_conf = value;
1550 break;
1551 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1552 break;
1553 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1554 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1555 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1556 err = USBD_IOERROR;
1557 goto ret;
1558 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1559 break;
1560 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1561 break;
1562 /* Hub requests */
1563 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1564 break;
1565 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1566 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1567 "port=%d feature=%d\n",
1568 index, value));
1569 if (index < 1 || index > sc->sc_noport) {
1570 err = USBD_IOERROR;
1571 goto ret;
1572 }
1573 port = EHCI_PORTSC(index);
1574 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1575 switch(value) {
1576 case UHF_PORT_ENABLE:
1577 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1578 break;
1579 case UHF_PORT_SUSPEND:
1580 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1581 break;
1582 case UHF_PORT_POWER:
1583 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1584 break;
1585 case UHF_PORT_TEST:
1586 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1587 "%d\n", index));
1588 break;
1589 case UHF_PORT_INDICATOR:
1590 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1591 "%d\n", index));
1592 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1593 break;
1594 case UHF_C_PORT_CONNECTION:
1595 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1596 break;
1597 case UHF_C_PORT_ENABLE:
1598 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1599 break;
1600 case UHF_C_PORT_SUSPEND:
1601 /* how? */
1602 break;
1603 case UHF_C_PORT_OVER_CURRENT:
1604 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1605 break;
1606 case UHF_C_PORT_RESET:
1607 sc->sc_isreset = 0;
1608 break;
1609 default:
1610 err = USBD_IOERROR;
1611 goto ret;
1612 }
1613 #if 0
1614 switch(value) {
1615 case UHF_C_PORT_CONNECTION:
1616 case UHF_C_PORT_ENABLE:
1617 case UHF_C_PORT_SUSPEND:
1618 case UHF_C_PORT_OVER_CURRENT:
1619 case UHF_C_PORT_RESET:
1620 /* Enable RHSC interrupt if condition is cleared. */
1621 if ((OREAD4(sc, port) >> 16) == 0)
1622 ehci_pcd_able(sc, 1);
1623 break;
1624 default:
1625 break;
1626 }
1627 #endif
1628 break;
1629 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1630 if (value != 0) {
1631 err = USBD_IOERROR;
1632 goto ret;
1633 }
1634 hubd = ehci_hubd;
1635 hubd.bNbrPorts = sc->sc_noport;
1636 v = EOREAD4(sc, EHCI_HCSPARAMS);
1637 USETW(hubd.wHubCharacteristics,
1638 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1639 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1640 ? UHD_PORT_IND : 0);
1641 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1642 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1643 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1644 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1645 l = min(len, hubd.bDescLength);
1646 totlen = l;
1647 memcpy(buf, &hubd, l);
1648 break;
1649 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1650 if (len != 4) {
1651 err = USBD_IOERROR;
1652 goto ret;
1653 }
1654 memset(buf, 0, len); /* ? XXX */
1655 totlen = len;
1656 break;
1657 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1658 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1659 index));
1660 if (index < 1 || index > sc->sc_noport) {
1661 err = USBD_IOERROR;
1662 goto ret;
1663 }
1664 if (len != 4) {
1665 err = USBD_IOERROR;
1666 goto ret;
1667 }
1668 v = EOREAD4(sc, EHCI_PORTSC(index));
1669 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1670 v));
1671 i = UPS_HIGH_SPEED;
1672 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1673 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1674 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1675 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1676 if (v & EHCI_PS_PR) i |= UPS_RESET;
1677 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1678 USETW(ps.wPortStatus, i);
1679 i = 0;
1680 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1681 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1682 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1683 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1684 USETW(ps.wPortChange, i);
1685 l = min(len, sizeof ps);
1686 memcpy(buf, &ps, l);
1687 totlen = l;
1688 break;
1689 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1690 err = USBD_IOERROR;
1691 goto ret;
1692 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1693 break;
1694 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1695 if (index < 1 || index > sc->sc_noport) {
1696 err = USBD_IOERROR;
1697 goto ret;
1698 }
1699 port = EHCI_PORTSC(index);
1700 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1701 switch(value) {
1702 case UHF_PORT_ENABLE:
1703 EOWRITE4(sc, port, v | EHCI_PS_PE);
1704 break;
1705 case UHF_PORT_SUSPEND:
1706 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1707 break;
1708 case UHF_PORT_RESET:
1709 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1710 index));
1711 if (EHCI_PS_IS_LOWSPEED(v)) {
1712 /* Low speed device, give up ownership. */
1713 ehci_disown(sc, index, 1);
1714 break;
1715 }
1716 /* Start reset sequence. */
1717 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1718 EOWRITE4(sc, port, v | EHCI_PS_PR);
1719 /* Wait for reset to complete. */
1720 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1721 if (sc->sc_dying) {
1722 err = USBD_IOERROR;
1723 goto ret;
1724 }
1725 /* Terminate reset sequence. */
1726 EOWRITE4(sc, port, v);
1727 /* Wait for HC to complete reset. */
1728 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1729 if (sc->sc_dying) {
1730 err = USBD_IOERROR;
1731 goto ret;
1732 }
1733 v = EOREAD4(sc, port);
1734 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1735 if (v & EHCI_PS_PR) {
1736 printf("%s: port reset timeout\n",
1737 USBDEVNAME(sc->sc_bus.bdev));
1738 return (USBD_TIMEOUT);
1739 }
1740 if (!(v & EHCI_PS_PE)) {
1741 /* Not a high speed device, give up ownership.*/
1742 ehci_disown(sc, index, 0);
1743 break;
1744 }
1745 sc->sc_isreset = 1;
1746 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1747 index, v));
1748 break;
1749 case UHF_PORT_POWER:
1750 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1751 "%d\n", index));
1752 EOWRITE4(sc, port, v | EHCI_PS_PP);
1753 break;
1754 case UHF_PORT_TEST:
1755 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1756 "%d\n", index));
1757 break;
1758 case UHF_PORT_INDICATOR:
1759 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1760 "%d\n", index));
1761 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1762 break;
1763 default:
1764 err = USBD_IOERROR;
1765 goto ret;
1766 }
1767 break;
1768 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1769 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1770 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1771 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1772 break;
1773 default:
1774 err = USBD_IOERROR;
1775 goto ret;
1776 }
1777 xfer->actlen = totlen;
1778 err = USBD_NORMAL_COMPLETION;
1779 ret:
1780 xfer->status = err;
1781 s = splusb();
1782 usb_transfer_complete(xfer);
1783 splx(s);
1784 return (USBD_IN_PROGRESS);
1785 }
1786
1787 void
1788 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1789 {
1790 int i, port;
1791 u_int32_t v;
1792
1793 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1794 #ifdef DIAGNOSTIC
1795 if (sc->sc_npcomp != 0) {
1796 i = (index-1) / sc->sc_npcomp;
1797 if (i >= sc->sc_ncomp)
1798 printf("%s: strange port\n",
1799 USBDEVNAME(sc->sc_bus.bdev));
1800 else
1801 printf("%s: handing over %s speed device on "
1802 "port %d to %s\n",
1803 USBDEVNAME(sc->sc_bus.bdev),
1804 lowspeed ? "low" : "full",
1805 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1806 } else {
1807 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1808 }
1809 #endif
1810 port = EHCI_PORTSC(index);
1811 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1812 EOWRITE4(sc, port, v | EHCI_PS_PO);
1813 }
1814
1815 /* Abort a root control request. */
1816 Static void
1817 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1818 {
1819 /* Nothing to do, all transfers are synchronous. */
1820 }
1821
1822 /* Close the root pipe. */
1823 Static void
1824 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1825 {
1826 DPRINTF(("ehci_root_ctrl_close\n"));
1827 /* Nothing to do. */
1828 }
1829
1830 void
1831 ehci_root_intr_done(usbd_xfer_handle xfer)
1832 {
1833 xfer->hcpriv = NULL;
1834 }
1835
1836 Static usbd_status
1837 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1838 {
1839 usbd_status err;
1840
1841 /* Insert last in queue. */
1842 err = usb_insert_transfer(xfer);
1843 if (err)
1844 return (err);
1845
1846 /* Pipe isn't running, start first */
1847 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1848 }
1849
1850 Static usbd_status
1851 ehci_root_intr_start(usbd_xfer_handle xfer)
1852 {
1853 usbd_pipe_handle pipe = xfer->pipe;
1854 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1855
1856 if (sc->sc_dying)
1857 return (USBD_IOERROR);
1858
1859 sc->sc_intrxfer = xfer;
1860
1861 return (USBD_IN_PROGRESS);
1862 }
1863
1864 /* Abort a root interrupt request. */
1865 Static void
1866 ehci_root_intr_abort(usbd_xfer_handle xfer)
1867 {
1868 int s;
1869
1870 if (xfer->pipe->intrxfer == xfer) {
1871 DPRINTF(("ehci_root_intr_abort: remove\n"));
1872 xfer->pipe->intrxfer = NULL;
1873 }
1874 xfer->status = USBD_CANCELLED;
1875 s = splusb();
1876 usb_transfer_complete(xfer);
1877 splx(s);
1878 }
1879
1880 /* Close the root pipe. */
1881 Static void
1882 ehci_root_intr_close(usbd_pipe_handle pipe)
1883 {
1884 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1885
1886 DPRINTF(("ehci_root_intr_close\n"));
1887
1888 sc->sc_intrxfer = NULL;
1889 }
1890
1891 void
1892 ehci_root_ctrl_done(usbd_xfer_handle xfer)
1893 {
1894 xfer->hcpriv = NULL;
1895 }
1896
1897 /************************/
1898
1899 ehci_soft_qh_t *
1900 ehci_alloc_sqh(ehci_softc_t *sc)
1901 {
1902 ehci_soft_qh_t *sqh;
1903 usbd_status err;
1904 int i, offs;
1905 usb_dma_t dma;
1906
1907 if (sc->sc_freeqhs == NULL) {
1908 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1909 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1910 EHCI_PAGE_SIZE, &dma);
1911 if (err)
1912 return (NULL);
1913 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1914 offs = i * EHCI_SQH_SIZE;
1915 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1916 sqh->physaddr = DMAADDR(&dma) + offs;
1917 sqh->next = sc->sc_freeqhs;
1918 sc->sc_freeqhs = sqh;
1919 }
1920 }
1921 sqh = sc->sc_freeqhs;
1922 sc->sc_freeqhs = sqh->next;
1923 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1924 sqh->next = NULL;
1925 return (sqh);
1926 }
1927
1928 void
1929 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1930 {
1931 sqh->next = sc->sc_freeqhs;
1932 sc->sc_freeqhs = sqh;
1933 }
1934
1935 ehci_soft_qtd_t *
1936 ehci_alloc_sqtd(ehci_softc_t *sc)
1937 {
1938 ehci_soft_qtd_t *sqtd;
1939 usbd_status err;
1940 int i, offs;
1941 usb_dma_t dma;
1942 int s;
1943
1944 if (sc->sc_freeqtds == NULL) {
1945 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1946 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1947 EHCI_PAGE_SIZE, &dma);
1948 if (err)
1949 return (NULL);
1950 s = splusb();
1951 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1952 offs = i * EHCI_SQTD_SIZE;
1953 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1954 sqtd->physaddr = DMAADDR(&dma) + offs;
1955 sqtd->nextqtd = sc->sc_freeqtds;
1956 sc->sc_freeqtds = sqtd;
1957 }
1958 splx(s);
1959 }
1960
1961 s = splusb();
1962 sqtd = sc->sc_freeqtds;
1963 sc->sc_freeqtds = sqtd->nextqtd;
1964 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1965 sqtd->nextqtd = NULL;
1966 sqtd->xfer = NULL;
1967 splx(s);
1968
1969 return (sqtd);
1970 }
1971
1972 void
1973 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1974 {
1975 int s;
1976
1977 s = splusb();
1978 sqtd->nextqtd = sc->sc_freeqtds;
1979 sc->sc_freeqtds = sqtd;
1980 splx(s);
1981 }
1982
1983 usbd_status
1984 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
1985 int alen, int rd, usbd_xfer_handle xfer,
1986 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
1987 {
1988 ehci_soft_qtd_t *next, *cur;
1989 ehci_physaddr_t dataphys, dataphysend, nextphys;
1990 u_int32_t qtdstatus;
1991 int len, curlen;
1992 int i;
1993 usb_dma_t *dma = &xfer->dmabuf;
1994
1995 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen));
1996
1997 len = alen;
1998 dataphys = DMAADDR(dma);
1999 dataphysend = EHCI_PAGE(dataphys + len - 1);
2000 qtdstatus = htole32(
2001 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2002 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2003 EHCI_QTD_SET_CERR(3)
2004 /* IOC set below */
2005 /* BYTES set below */
2006 /* XXX Data toggle */
2007 );
2008
2009 cur = ehci_alloc_sqtd(sc);
2010 if (cur == NULL)
2011 goto nomem;
2012 *sp = cur;
2013 for (;;) {
2014 /* The EHCI hardware can handle at most 4 page crossings. */
2015 if (EHCI_PAGE(dataphys) == dataphysend ||
2016 EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE
2017 == dataphysend) {
2018 /* we can handle it in this QTD */
2019 curlen = len;
2020 } else {
2021 #if 0
2022 /* must use multiple TDs, fill as much as possible. */
2023 curlen = 2 * EHCI_PAGE_SIZE -
2024 (dataphys & (EHCI_PAGE_SIZE-1));
2025 /* the length must be a multiple of the max size */
2026 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2027 #ifdef DIAGNOSTIC
2028 if (curlen == 0)
2029 panic("ehci_alloc_std: curlen == 0\n");
2030 #endif
2031 #else
2032 printf("ehci_alloc_std_chain: multiple QTDs\n");
2033 return (USBD_NOMEM);
2034 #endif
2035 }
2036 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x "
2037 "dataphysend=0x%08x len=%d curlen=%d\n",
2038 dataphys, dataphysend,
2039 len, curlen));
2040 len -= curlen;
2041
2042 if (len != 0) {
2043 next = ehci_alloc_sqtd(sc);
2044 if (next == NULL)
2045 goto nomem;
2046 nextphys = next->physaddr;
2047 } else {
2048 next = NULL;
2049 nextphys = EHCI_NULL;
2050 }
2051
2052 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2053 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2054 if (i != 0) /* use offset only in first buffer */
2055 a = EHCI_PAGE(a);
2056 cur->qtd.qtd_buffer[i] = htole32(a);
2057 }
2058 cur->nextqtd = next;
2059 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2060 cur->qtd.qtd_status =
2061 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2062 cur->xfer = xfer;
2063 cur->len = curlen;
2064 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
2065 dataphys, dataphys + curlen - 1));
2066 if (len == 0)
2067 break;
2068 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n"));
2069 dataphys += curlen;
2070 cur = next;
2071 }
2072 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2073 *ep = cur;
2074
2075 return (USBD_NORMAL_COMPLETION);
2076
2077 nomem:
2078 /* XXX free chain */
2079 return (USBD_NOMEM);
2080 }
2081
2082 Static void
2083 ehci_free_std_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2084 ehci_soft_qtd_t *sqtdend)
2085 {
2086 ehci_soft_qtd_t *p;
2087
2088 for (; sqtd != sqtdend; sqtd = p) {
2089 p = sqtd->nextqtd;
2090 ehci_free_sqtd(sc, sqtd);
2091 }
2092 }
2093
2094 /****************/
2095
2096 /*
2097 * Close a reqular pipe.
2098 * Assumes that there are no pending transactions.
2099 */
2100 void
2101 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2102 {
2103 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2104 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2105 ehci_soft_qh_t *sqh = epipe->sqh;
2106 int s;
2107
2108 s = splusb();
2109 ehci_rem_qh(sc, sqh, head);
2110 splx(s);
2111 ehci_free_sqh(sc, epipe->sqh);
2112 }
2113
2114 /*
2115 * Abort a device request.
2116 * If this routine is called at splusb() it guarantees that the request
2117 * will be removed from the hardware scheduling and that the callback
2118 * for it will be called with USBD_CANCELLED status.
2119 * It's impossible to guarantee that the requested transfer will not
2120 * have happened since the hardware runs concurrently.
2121 * If the transaction has already happened we rely on the ordinary
2122 * interrupt processing to process it.
2123 */
2124 void
2125 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2126 {
2127 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2128 ehci_soft_qh_t *sqh = epipe->sqh;
2129 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2130 #if 0
2131 ehci_soft_td_t *p, *n;
2132 ehci_physaddr_t headp;
2133 int hit;
2134 #endif
2135 int s;
2136
2137 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
2138
2139 if (sc->sc_dying) {
2140 /* If we're dying, just do the software part. */
2141 s = splusb();
2142 xfer->status = status; /* make software ignore it */
2143 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2144 usb_transfer_complete(xfer);
2145 splx(s);
2146 return;
2147 }
2148
2149 if (xfer->device->bus->intr_context || !curproc)
2150 panic("ehci_abort_xfer: not in process context\n");
2151
2152 /*
2153 * Step 1: Make interrupt routine and hardware ignore xfer.
2154 */
2155 s = splusb();
2156 xfer->status = status; /* make software ignore it */
2157 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2158 splx(s);
2159 /* XXX */
2160
2161 /*
2162 * Step 2: Wait until we know hardware has finished any possible
2163 * use of the xfer. Also make sure the soft interrupt routine
2164 * has run.
2165 */
2166 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
2167 /* XXX should have some communication with softintr() to know
2168 when it's done */
2169 usb_delay_ms(epipe->pipe.device->bus, 250);
2170
2171 /*
2172 * Step 3: Remove any vestiges of the xfer from the hardware.
2173 * The complication here is that the hardware may have executed
2174 * beyond the xfer we're trying to abort. So as we're scanning
2175 * the TDs of this xfer we check if the hardware points to
2176 * any of them.
2177 */
2178 s = splusb(); /* XXX why? */
2179 /* XXX */
2180
2181 /*
2182 * Step 4: Turn on hardware again.
2183 */
2184 /* XXX */
2185
2186 /*
2187 * Step 5: Execute callback.
2188 */
2189 #ifdef DIAGNOSTIC
2190 EXFER(xfer)->isdone = 1;
2191 #endif
2192 usb_transfer_complete(xfer);
2193
2194 splx(s);
2195 }
2196
2197 void
2198 ehci_timeout(void *addr)
2199 {
2200 struct ehci_xfer *exfer = addr;
2201 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2202 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2203
2204 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2205
2206 if (sc->sc_dying) {
2207 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2208 return;
2209 }
2210
2211 /* Execute the abort in a process context. */
2212 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2213 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2214 }
2215
2216 void
2217 ehci_timeout_task(void *addr)
2218 {
2219 usbd_xfer_handle xfer = addr;
2220 int s;
2221
2222 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2223
2224 s = splusb();
2225 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2226 splx(s);
2227 }
2228
2229 /************************/
2230
2231 Static usbd_status
2232 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2233 {
2234 usbd_status err;
2235
2236 /* Insert last in queue. */
2237 err = usb_insert_transfer(xfer);
2238 if (err)
2239 return (err);
2240
2241 /* Pipe isn't running, start first */
2242 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2243 }
2244
2245 Static usbd_status
2246 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2247 {
2248 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2249 usbd_status err;
2250
2251 if (sc->sc_dying)
2252 return (USBD_IOERROR);
2253
2254 #ifdef DIAGNOSTIC
2255 if (!(xfer->rqflags & URQ_REQUEST)) {
2256 /* XXX panic */
2257 printf("ehci_device_ctrl_transfer: not a request\n");
2258 return (USBD_INVAL);
2259 }
2260 #endif
2261
2262 err = ehci_device_request(xfer);
2263 if (err)
2264 return (err);
2265
2266 if (sc->sc_bus.use_polling)
2267 ehci_waitintr(sc, xfer);
2268 return (USBD_IN_PROGRESS);
2269 }
2270
2271 void
2272 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2273 {
2274 struct ehci_xfer *ex = EXFER(xfer);
2275 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2276 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2277
2278 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2279
2280 #ifdef DIAGNOSTIC
2281 if (!(xfer->rqflags & URQ_REQUEST)) {
2282 panic("ehci_ctrl_done: not a request\n");
2283 }
2284 #endif
2285
2286 ehci_del_intr_list(ex); /* remove from active list */
2287
2288 if (epipe->u.ctl.length != 0)
2289 ehci_free_std_chain(sc, ex->sqtdstart, NULL);
2290
2291 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
2292 }
2293
2294 /* Abort a device control request. */
2295 Static void
2296 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2297 {
2298 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2299 ehci_abort_xfer(xfer, USBD_CANCELLED);
2300 }
2301
2302 /* Close a device control pipe. */
2303 Static void
2304 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2305 {
2306 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2307 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2308
2309 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2310 ehci_close_pipe(pipe, sc->sc_async_head);
2311 }
2312
2313 usbd_status
2314 ehci_device_request(usbd_xfer_handle xfer)
2315 {
2316 #define exfer EXFER(xfer)
2317 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2318 usb_device_request_t *req = &xfer->request;
2319 usbd_device_handle dev = epipe->pipe.device;
2320 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2321 int addr = dev->address;
2322 ehci_soft_qtd_t *setup, *stat, *next;
2323 ehci_soft_qh_t *sqh;
2324 int isread;
2325 int len;
2326 usbd_status err;
2327 int s;
2328
2329 isread = req->bmRequestType & UT_READ;
2330 len = UGETW(req->wLength);
2331
2332 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2333 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2334 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2335 UGETW(req->wIndex), len, addr,
2336 epipe->pipe.endpoint->edesc->bEndpointAddress));
2337
2338 setup = ehci_alloc_sqtd(sc);
2339 if (setup == NULL) {
2340 err = USBD_NOMEM;
2341 goto bad1;
2342 }
2343 stat = ehci_alloc_sqtd(sc);
2344 if (stat == NULL) {
2345 err = USBD_NOMEM;
2346 goto bad2;
2347 }
2348
2349 sqh = epipe->sqh;
2350 epipe->u.ctl.length = len;
2351
2352 /* XXX
2353 * Since we're messing with the QH we must know the HC is in sync.
2354 * This needs to go away since it slows down control transfers.
2355 * Removing it entails:
2356 * - fill the QH only once with addr & wMaxPacketSize
2357 * - put the correct data toggles in the qtds and set DTC
2358 */
2359 /* ehci_sync_hc(sc); */
2360 /* Update device address and length since they may have changed. */
2361 /* XXX This only needs to be done once, but it's too early in open. */
2362 /* XXXX Should not touch ED here! */
2363 sqh->qh.qh_endp =
2364 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2365 htole32(
2366 EHCI_QH_SET_ADDR(addr) |
2367 /* EHCI_QH_DTC | */
2368 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2369 );
2370 /* Clear toggle */
2371 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2372
2373 /* Set up data transaction */
2374 if (len != 0) {
2375 ehci_soft_qtd_t *end;
2376
2377 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer,
2378 &next, &end);
2379 if (err)
2380 goto bad3;
2381 end->nextqtd = stat;
2382 end->qtd.qtd_next =
2383 end->qtd.qtd_altnext = htole32(stat->physaddr);
2384 /* Start toggle at 1. */
2385 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2386 } else {
2387 next = stat;
2388 }
2389
2390 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
2391
2392 setup->qtd.qtd_status = htole32(
2393 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2394 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2395 EHCI_QTD_SET_CERR(3) |
2396 EHCI_QTD_SET_BYTES(sizeof *req)
2397 );
2398 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2399 setup->nextqtd = next;
2400 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2401 setup->xfer = xfer;
2402 setup->len = sizeof *req;
2403
2404 stat->qtd.qtd_status = htole32(
2405 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2406 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2407 EHCI_QTD_SET_CERR(3) |
2408 EHCI_QTD_IOC
2409 );
2410 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2411 stat->nextqtd = NULL;
2412 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2413 stat->xfer = xfer;
2414 stat->len = 0;
2415
2416 #ifdef EHCI_DEBUG
2417 if (ehcidebug > 2) {
2418 DPRINTF(("ehci_device_request:\n"));
2419 ehci_dump_sqh(sqh);
2420 ehci_dump_sqtds(setup);
2421 }
2422 #endif
2423
2424 exfer->sqtdstart = setup;
2425 exfer->sqtdend = stat;
2426 #ifdef DIAGNOSTIC
2427 if (!exfer->isdone) {
2428 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2429 }
2430 exfer->isdone = 0;
2431 #endif
2432
2433 /* Insert qTD in QH list. */
2434 s = splusb();
2435 sqh->qh.qh_curqtd = 0;
2436 sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr);
2437 sqh->sqtd = setup;
2438 if (xfer->timeout && !sc->sc_bus.use_polling) {
2439 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2440 ehci_timeout, xfer);
2441 }
2442 ehci_add_intr_list(sc, exfer);
2443 xfer->status = USBD_IN_PROGRESS;
2444 splx(s);
2445
2446 #ifdef EHCI_DEBUG
2447 if (ehcidebug > 10) {
2448 delay(10000);
2449 DPRINTF(("ehci_device_request: status=%x\n",
2450 EOREAD4(sc, EHCI_USBSTS)));
2451 ehci_dump_regs(sc);
2452 ehci_dump_sqh(sc->sc_async_head);
2453 ehci_dump_sqh(sqh);
2454 ehci_dump_sqtds(setup);
2455 }
2456 #endif
2457
2458 return (USBD_NORMAL_COMPLETION);
2459
2460 bad3:
2461 ehci_free_sqtd(sc, stat);
2462 bad2:
2463 ehci_free_sqtd(sc, setup);
2464 bad1:
2465 return (err);
2466 #undef exfer
2467 }
2468
2469 /************************/
2470
2471 Static usbd_status
2472 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2473 {
2474 usbd_status err;
2475
2476 /* Insert last in queue. */
2477 err = usb_insert_transfer(xfer);
2478 if (err)
2479 return (err);
2480
2481 /* Pipe isn't running, start first */
2482 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2483 }
2484
2485 usbd_status
2486 ehci_device_bulk_start(usbd_xfer_handle xfer)
2487 {
2488 #define exfer EXFER(xfer)
2489 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2490 usbd_device_handle dev = epipe->pipe.device;
2491 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2492 ehci_soft_qtd_t *data, *dataend;
2493 ehci_soft_qh_t *sqh;
2494 usbd_status err;
2495 int len, isread, endpt;
2496 int s;
2497
2498 DPRINTFN(3, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2499 xfer, xfer->length, xfer->flags));
2500
2501 if (sc->sc_dying)
2502 return (USBD_IOERROR);
2503
2504 #ifdef DIAGNOSTIC
2505 if (xfer->rqflags & URQ_REQUEST)
2506 panic("ehci_device_bulk_transfer: a request\n");
2507 #endif
2508
2509 len = xfer->length;
2510 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2511 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2512 sqh = epipe->sqh;
2513
2514 epipe->u.bulk.length = len;
2515
2516 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, &data,
2517 &dataend);
2518 if (err)
2519 return (err);
2520
2521 #ifdef EHCI_DEBUG
2522 if (ehcidebug > 8) {
2523 DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2524 ehci_dump_sqtds(data);
2525 }
2526 #endif
2527
2528 /* Set up interrupt info. */
2529 exfer->sqtdstart = data;
2530 exfer->sqtdend = dataend;
2531 #ifdef DIAGNOSTIC
2532 if (!exfer->isdone) {
2533 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2534 }
2535 exfer->isdone = 0;
2536 #endif
2537
2538 s = splusb();
2539 sqh->qh.qh_curqtd = 0;
2540 sqh->qh.qh_qtd.qtd_next = htole32(data->physaddr);
2541 sqh->sqtd = data;
2542 if (xfer->timeout && !sc->sc_bus.use_polling) {
2543 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2544 ehci_timeout, xfer);
2545 }
2546 ehci_add_intr_list(sc, exfer);
2547 xfer->status = USBD_IN_PROGRESS;
2548 splx(s);
2549
2550 #ifdef EHCI_DEBUG
2551 if (ehcidebug > 10) {
2552 DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2553 ehci_dump_sqtds(data);
2554 }
2555 #endif
2556
2557 if (sc->sc_bus.use_polling)
2558 ehci_waitintr(sc, xfer);
2559
2560 return (USBD_IN_PROGRESS);
2561 #undef exfer
2562 }
2563
2564 Static void
2565 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2566 {
2567 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2568 ehci_abort_xfer(xfer, USBD_CANCELLED);
2569 }
2570
2571 /*
2572 * Close a device bulk pipe.
2573 */
2574 Static void
2575 ehci_device_bulk_close(usbd_pipe_handle pipe)
2576 {
2577 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2578
2579 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2580 ehci_close_pipe(pipe, sc->sc_async_head);
2581 }
2582
2583 void
2584 ehci_device_bulk_done(usbd_xfer_handle xfer)
2585 {
2586 struct ehci_xfer *ex = EXFER(xfer);
2587 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2588 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2589
2590 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2591 xfer, xfer->actlen));
2592
2593 ehci_del_intr_list(ex); /* remove from active list */
2594
2595 ehci_free_std_chain(sc, ex->sqtdstart, 0);
2596
2597 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2598 }
2599
2600 /************************/
2601
2602 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2603 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2604 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2605 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2606 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2607
2608 /************************/
2609
2610 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2611 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2612 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2613 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2614 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2615