ehci.c revision 1.22
1 /* $NetBSD: ehci.c,v 1.22 2001/11/21 14:00:12 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 0.96 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/data/usb_20.zip 46 * 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.22 2001/11/21 14:00:12 augustss Exp $"); 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/kernel.h> 55 #include <sys/malloc.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #include <sys/proc.h> 59 #include <sys/queue.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ehcireg.h> 71 #include <dev/usb/ehcivar.h> 72 73 #ifdef EHCI_DEBUG 74 #define DPRINTF(x) if (ehcidebug) printf x 75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 76 int ehcidebug = 0; 77 #ifndef __NetBSD__ 78 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 79 #endif 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n,x) 83 #endif 84 85 struct ehci_pipe { 86 struct usbd_pipe pipe; 87 ehci_soft_qh_t *sqh; 88 union { 89 ehci_soft_qtd_t *qtd; 90 /* ehci_soft_itd_t *itd; */ 91 } tail; 92 union { 93 /* Control pipe */ 94 struct { 95 usb_dma_t reqdma; 96 u_int length; 97 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 98 } ctl; 99 /* Interrupt pipe */ 100 /* XXX */ 101 /* Bulk pipe */ 102 struct { 103 u_int length; 104 } bulk; 105 /* Iso pipe */ 106 /* XXX */ 107 } u; 108 }; 109 110 Static void ehci_shutdown(void *); 111 Static void ehci_power(int, void *); 112 113 Static usbd_status ehci_open(usbd_pipe_handle); 114 Static void ehci_poll(struct usbd_bus *); 115 Static void ehci_softintr(void *); 116 Static int ehci_intr1(ehci_softc_t *); 117 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 118 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 119 Static void ehci_idone(struct ehci_xfer *); 120 Static void ehci_timeout(void *); 121 Static void ehci_timeout_task(void *); 122 123 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 124 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 125 126 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 127 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 128 129 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 130 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 131 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 132 Static void ehci_root_ctrl_close(usbd_pipe_handle); 133 Static void ehci_root_ctrl_done(usbd_xfer_handle); 134 135 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 136 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 137 Static void ehci_root_intr_abort(usbd_xfer_handle); 138 Static void ehci_root_intr_close(usbd_pipe_handle); 139 Static void ehci_root_intr_done(usbd_xfer_handle); 140 141 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 142 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 143 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 144 Static void ehci_device_ctrl_close(usbd_pipe_handle); 145 Static void ehci_device_ctrl_done(usbd_xfer_handle); 146 147 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 148 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 149 Static void ehci_device_bulk_abort(usbd_xfer_handle); 150 Static void ehci_device_bulk_close(usbd_pipe_handle); 151 Static void ehci_device_bulk_done(usbd_xfer_handle); 152 153 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 154 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 155 Static void ehci_device_intr_abort(usbd_xfer_handle); 156 Static void ehci_device_intr_close(usbd_pipe_handle); 157 Static void ehci_device_intr_done(usbd_xfer_handle); 158 159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 161 Static void ehci_device_isoc_abort(usbd_xfer_handle); 162 Static void ehci_device_isoc_close(usbd_pipe_handle); 163 Static void ehci_device_isoc_done(usbd_xfer_handle); 164 165 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 166 Static void ehci_noop(usbd_pipe_handle pipe); 167 168 Static int ehci_str(usb_string_descriptor_t *, int, char *); 169 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 170 Static void ehci_pcd_able(ehci_softc_t *, int); 171 Static void ehci_pcd_enable(void *); 172 Static void ehci_disown(ehci_softc_t *, int, int); 173 174 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 175 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 176 177 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 178 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 179 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *, 180 ehci_softc_t *, int, int, usbd_xfer_handle, 181 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 182 Static void ehci_free_std_chain(ehci_softc_t *, ehci_soft_qtd_t *, 183 ehci_soft_qtd_t *); 184 185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 186 187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 189 ehci_soft_qh_t *); 190 Static void ehci_sync_hc(ehci_softc_t *); 191 192 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 193 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 194 195 #ifdef EHCI_DEBUG 196 Static void ehci_dump_regs(ehci_softc_t *); 197 Static void ehci_dump(void); 198 Static ehci_softc_t *theehci; 199 Static void ehci_dump_link(ehci_link_t, int); 200 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 201 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 202 Static void ehci_dump_qtd(ehci_qtd_t *); 203 Static void ehci_dump_sqh(ehci_soft_qh_t *); 204 Static void ehci_dump_exfer(struct ehci_xfer *); 205 #endif 206 207 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 208 209 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 210 211 #define EHCI_INTR_ENDPT 1 212 213 #define ehci_add_intr_list(sc, ex) \ 214 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 215 #define ehci_del_intr_list(ex) \ 216 LIST_REMOVE((ex), inext) 217 218 Static struct usbd_bus_methods ehci_bus_methods = { 219 ehci_open, 220 ehci_softintr, 221 ehci_poll, 222 ehci_allocm, 223 ehci_freem, 224 ehci_allocx, 225 ehci_freex, 226 }; 227 228 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 229 ehci_root_ctrl_transfer, 230 ehci_root_ctrl_start, 231 ehci_root_ctrl_abort, 232 ehci_root_ctrl_close, 233 ehci_noop, 234 ehci_root_ctrl_done, 235 }; 236 237 Static struct usbd_pipe_methods ehci_root_intr_methods = { 238 ehci_root_intr_transfer, 239 ehci_root_intr_start, 240 ehci_root_intr_abort, 241 ehci_root_intr_close, 242 ehci_noop, 243 ehci_root_intr_done, 244 }; 245 246 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 247 ehci_device_ctrl_transfer, 248 ehci_device_ctrl_start, 249 ehci_device_ctrl_abort, 250 ehci_device_ctrl_close, 251 ehci_noop, 252 ehci_device_ctrl_done, 253 }; 254 255 Static struct usbd_pipe_methods ehci_device_intr_methods = { 256 ehci_device_intr_transfer, 257 ehci_device_intr_start, 258 ehci_device_intr_abort, 259 ehci_device_intr_close, 260 ehci_device_clear_toggle, 261 ehci_device_intr_done, 262 }; 263 264 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 265 ehci_device_bulk_transfer, 266 ehci_device_bulk_start, 267 ehci_device_bulk_abort, 268 ehci_device_bulk_close, 269 ehci_device_clear_toggle, 270 ehci_device_bulk_done, 271 }; 272 273 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 274 ehci_device_isoc_transfer, 275 ehci_device_isoc_start, 276 ehci_device_isoc_abort, 277 ehci_device_isoc_close, 278 ehci_noop, 279 ehci_device_isoc_done, 280 }; 281 282 usbd_status 283 ehci_init(ehci_softc_t *sc) 284 { 285 u_int32_t version, sparams, cparams, hcr; 286 u_int i; 287 usbd_status err; 288 ehci_soft_qh_t *sqh; 289 290 DPRINTF(("ehci_init: start\n")); 291 #ifdef EHCI_DEBUG 292 theehci = sc; 293 #endif 294 295 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 296 297 version = EREAD2(sc, EHCI_HCIVERSION); 298 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 299 version >> 8, version & 0xff); 300 301 sparams = EREAD4(sc, EHCI_HCSPARAMS); 302 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 303 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 304 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 305 printf("%s: wrong number of companions (%d != %d)\n", 306 USBDEVNAME(sc->sc_bus.bdev), 307 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 308 return (USBD_IOERROR); 309 } 310 if (sc->sc_ncomp > 0) { 311 printf("%s: companion controller%s, %d port%s each:", 312 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 313 EHCI_HCS_N_PCC(sparams), 314 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 315 for (i = 0; i < sc->sc_ncomp; i++) 316 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 317 printf("\n"); 318 } 319 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 320 cparams = EREAD4(sc, EHCI_HCCPARAMS); 321 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 322 323 sc->sc_bus.usbrev = USBREV_2_0; 324 325 /* Reset the controller */ 326 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 327 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 328 usb_delay_ms(&sc->sc_bus, 1); 329 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 330 for (i = 0; i < 100; i++) { 331 delay(10); 332 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 333 if (!hcr) 334 break; 335 } 336 if (hcr) { 337 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 338 return (USBD_IOERROR); 339 } 340 341 /* frame list size at default, read back what we got and use that */ 342 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 343 case 0: sc->sc_flsize = 1024*4; break; 344 case 1: sc->sc_flsize = 512*4; break; 345 case 2: sc->sc_flsize = 256*4; break; 346 case 3: return (USBD_IOERROR); 347 } 348 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 349 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 350 if (err) 351 return (err); 352 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 353 354 /* Set up the bus struct. */ 355 sc->sc_bus.methods = &ehci_bus_methods; 356 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 357 358 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 359 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 360 361 sc->sc_eintrs = EHCI_NORMAL_INTRS; 362 363 /* Allocate dummy QH that starts the async list. */ 364 sqh = ehci_alloc_sqh(sc); 365 if (sqh == NULL) { 366 err = USBD_NOMEM; 367 goto bad1; 368 } 369 /* Fill the QH */ 370 sqh->qh.qh_endp = 371 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 372 sqh->qh.qh_link = 373 htole32(sqh->physaddr | EHCI_LINK_QH); 374 sqh->qh.qh_curqtd = EHCI_NULL; 375 sqh->next = NULL; 376 /* Fill the overlay qTD */ 377 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 378 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 379 sqh->qh.qh_qtd.qtd_status = 380 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 381 sqh->sqtd = NULL; 382 #ifdef EHCI_DEBUG 383 if (ehcidebug) { 384 ehci_dump_sqh(sc->sc_async_head); 385 } 386 #endif 387 388 /* Point to async list */ 389 sc->sc_async_head = sqh; 390 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 391 392 usb_callout_init(sc->sc_tmo_pcd); 393 394 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 395 396 /* Enable interrupts */ 397 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 398 399 /* Turn on controller */ 400 EOWRITE4(sc, EHCI_USBCMD, 401 EHCI_CMD_ITC_8 | /* 8 microframes */ 402 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 403 EHCI_CMD_ASE | 404 /* EHCI_CMD_PSE | */ 405 EHCI_CMD_RS); 406 407 /* Take over port ownership */ 408 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 409 410 for (i = 0; i < 100; i++) { 411 delay(10); 412 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 413 if (!hcr) 414 break; 415 } 416 if (hcr) { 417 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 418 return (USBD_IOERROR); 419 } 420 421 return (USBD_NORMAL_COMPLETION); 422 423 #if 0 424 bad2: 425 ehci_free_sqh(sc, sc->sc_async_head); 426 #endif 427 bad1: 428 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 429 return (err); 430 } 431 432 int 433 ehci_intr(void *v) 434 { 435 ehci_softc_t *sc = v; 436 437 if (sc == NULL || sc->sc_dying) 438 return (0); 439 440 /* If we get an interrupt while polling, then just ignore it. */ 441 if (sc->sc_bus.use_polling) { 442 #ifdef DIAGNOSTIC 443 printf("ehci_intr: ignored interrupt while polling\n"); 444 #endif 445 return (0); 446 } 447 448 return (ehci_intr1(sc)); 449 } 450 451 Static int 452 ehci_intr1(ehci_softc_t *sc) 453 { 454 u_int32_t intrs, eintrs; 455 456 DPRINTFN(20,("ehci_intr1: enter\n")); 457 458 /* In case the interrupt occurs before initialization has completed. */ 459 if (sc == NULL) { 460 #ifdef DIAGNOSTIC 461 printf("ehci_intr: sc == NULL\n"); 462 #endif 463 return (0); 464 } 465 466 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 467 468 if (!intrs) 469 return (0); 470 471 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 472 eintrs = intrs & sc->sc_eintrs; 473 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 474 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 475 (u_int)eintrs)); 476 if (!eintrs) 477 return (0); 478 479 sc->sc_bus.intr_context++; 480 sc->sc_bus.no_intrs++; 481 if (eintrs & EHCI_STS_IAA) { 482 DPRINTF(("ehci_intr1: door bell\n")); 483 wakeup(&sc->sc_async_head); 484 eintrs &= ~EHCI_STS_IAA; 485 } 486 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 487 DPRINTF(("ehci_intr1: %s %s\n", 488 eintrs & EHCI_STS_INT ? "INT" : "", 489 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 490 usb_schedsoftintr(&sc->sc_bus); 491 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 492 } 493 if (eintrs & EHCI_STS_HSE) { 494 printf("%s: unrecoverable error, controller halted\n", 495 USBDEVNAME(sc->sc_bus.bdev)); 496 /* XXX what else */ 497 } 498 if (eintrs & EHCI_STS_PCD) { 499 ehci_pcd(sc, sc->sc_intrxfer); 500 /* 501 * Disable PCD interrupt for now, because it will be 502 * on until the port has been reset. 503 */ 504 ehci_pcd_able(sc, 0); 505 /* Do not allow RHSC interrupts > 1 per second */ 506 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 507 eintrs &= ~EHCI_STS_PCD; 508 } 509 510 sc->sc_bus.intr_context--; 511 512 if (eintrs != 0) { 513 /* Block unprocessed interrupts. */ 514 sc->sc_eintrs &= ~eintrs; 515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 516 printf("%s: blocking intrs 0x%x\n", 517 USBDEVNAME(sc->sc_bus.bdev), eintrs); 518 } 519 520 return (1); 521 } 522 523 void 524 ehci_pcd_able(ehci_softc_t *sc, int on) 525 { 526 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 527 if (on) 528 sc->sc_eintrs |= EHCI_STS_PCD; 529 else 530 sc->sc_eintrs &= ~EHCI_STS_PCD; 531 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 532 } 533 534 void 535 ehci_pcd_enable(void *v_sc) 536 { 537 ehci_softc_t *sc = v_sc; 538 539 ehci_pcd_able(sc, 1); 540 } 541 542 void 543 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 544 { 545 usbd_pipe_handle pipe; 546 struct ehci_pipe *epipe; 547 u_char *p; 548 int i, m; 549 550 if (xfer == NULL) { 551 /* Just ignore the change. */ 552 return; 553 } 554 555 pipe = xfer->pipe; 556 epipe = (struct ehci_pipe *)pipe; 557 558 p = KERNADDR(&xfer->dmabuf); 559 m = min(sc->sc_noport, xfer->length * 8 - 1); 560 memset(p, 0, xfer->length); 561 for (i = 1; i <= m; i++) { 562 /* Pick out CHANGE bits from the status reg. */ 563 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 564 p[i/8] |= 1 << (i%8); 565 } 566 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 567 xfer->actlen = xfer->length; 568 xfer->status = USBD_NORMAL_COMPLETION; 569 570 usb_transfer_complete(xfer); 571 } 572 573 void 574 ehci_softintr(void *v) 575 { 576 ehci_softc_t *sc = v; 577 struct ehci_xfer *ex; 578 579 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 580 sc->sc_bus.intr_context)); 581 582 sc->sc_bus.intr_context++; 583 584 /* 585 * The only explanation I can think of for why EHCI is as brain dead 586 * as UHCI interrupt-wise is that Intel was involved in both. 587 * An interrupt just tells us that something is done, we have no 588 * clue what, so we need to scan through all active transfers. :-( 589 */ 590 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 591 ehci_check_intr(sc, ex); 592 593 sc->sc_bus.intr_context--; 594 } 595 596 /* Check for an interrupt. */ 597 void 598 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 599 { 600 ehci_soft_qtd_t *sqtd, *lsqtd; 601 u_int32_t status; 602 603 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 604 605 if (ex->sqtdstart == NULL) { 606 printf("ehci_check_intr: sqtdstart=NULL\n"); 607 return; 608 } 609 lsqtd = ex->sqtdend; 610 #ifdef DIAGNOSTIC 611 if (lsqtd == NULL) { 612 printf("ehci_check_intr: sqtd==0\n"); 613 return; 614 } 615 #endif 616 /* 617 * If the last TD is still active we need to check whether there 618 * is a an error somewhere in the middle, or whether there was a 619 * short packet (SPD and not ACTIVE). 620 */ 621 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 622 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 623 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 624 status = le32toh(sqtd->qtd.qtd_status); 625 /* If there's an active QTD the xfer isn't done. */ 626 if (status & EHCI_QTD_ACTIVE) 627 break; 628 /* Any kind of error makes the xfer done. */ 629 if (status & EHCI_QTD_HALTED) 630 goto done; 631 /* We want short packets, and it is short: it's done */ 632 if (EHCI_QTD_SET_BYTES(status) != 0) 633 goto done; 634 } 635 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 636 ex, ex->sqtdstart)); 637 return; 638 } 639 done: 640 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 641 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 642 ehci_idone(ex); 643 } 644 645 void 646 ehci_idone(struct ehci_xfer *ex) 647 { 648 usbd_xfer_handle xfer = &ex->xfer; 649 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 650 ehci_soft_qtd_t *sqtd; 651 u_int32_t status = 0, nstatus; 652 int actlen; 653 654 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 655 #ifdef DIAGNOSTIC 656 { 657 int s = splhigh(); 658 if (ex->isdone) { 659 splx(s); 660 #ifdef EHCI_DEBUG 661 printf("ehci_idone: ex is done!\n "); 662 ehci_dump_exfer(ex); 663 #else 664 printf("ehci_idone: ex=%p is done!\n", ex); 665 #endif 666 return; 667 } 668 ex->isdone = 1; 669 splx(s); 670 } 671 #endif 672 673 if (xfer->status == USBD_CANCELLED || 674 xfer->status == USBD_TIMEOUT) { 675 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 676 return; 677 } 678 679 #ifdef EHCI_DEBUG 680 DPRINTFN(10, ("ehci_idone: ex=%p, xfer=%p, pipe=%p ready\n", 681 ex, xfer, epipe)); 682 if (ehcidebug > 10) 683 ehci_dump_sqtds(ex->sqtdstart); 684 #endif 685 686 /* The transfer is done, compute actual length and status. */ 687 actlen = 0; 688 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 689 nstatus = le32toh(sqtd->qtd.qtd_status); 690 if (nstatus & EHCI_QTD_ACTIVE) 691 break; 692 693 status = nstatus; 694 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 695 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 696 } 697 698 /* If there are left over TDs we need to update the toggle. */ 699 if (sqtd != NULL) { 700 printf("ehci_idone: need toggle update\n"); 701 #if 0 702 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 703 #endif 704 } 705 706 status &= EHCI_QTD_STATERRS; 707 DPRINTFN(/*10*/2, ("ehci_idone: len=%d actlen=%d, status=0x%x\n", 708 xfer->length, actlen, status)); 709 xfer->actlen = actlen; 710 if (status != 0) { 711 #ifdef EHCI_DEBUG 712 char sbuf[128]; 713 714 bitmask_snprintf((u_int32_t)status, 715 "\20\2MISSEDMICRO\3XACT\4BABBLE\5BABBLE" 716 "\6HALTED", 717 sbuf, sizeof(sbuf)); 718 719 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 720 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 721 "status 0x%s\n", 722 xfer->pipe->device->address, 723 xfer->pipe->endpoint->edesc->bEndpointAddress, 724 sbuf)); 725 #endif 726 727 if (status == EHCI_QTD_HALTED) 728 xfer->status = USBD_STALLED; 729 else 730 xfer->status = USBD_IOERROR; /* more info XXX */ 731 } else { 732 xfer->status = USBD_NORMAL_COMPLETION; 733 } 734 735 usb_transfer_complete(xfer); 736 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 737 } 738 739 /* 740 * Wait here until controller claims to have an interrupt. 741 * Then call ehci_intr and return. Use timeout to avoid waiting 742 * too long. 743 */ 744 void 745 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 746 { 747 int timo = xfer->timeout; 748 int usecs; 749 u_int32_t intrs; 750 751 xfer->status = USBD_IN_PROGRESS; 752 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 753 usb_delay_ms(&sc->sc_bus, 1); 754 if (sc->sc_dying) 755 break; 756 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 757 sc->sc_eintrs; 758 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 759 #ifdef OHCI_DEBUG 760 if (ehcidebug > 15) 761 ehci_dump_regs(sc); 762 #endif 763 if (intrs) { 764 ehci_intr1(sc); 765 if (xfer->status != USBD_IN_PROGRESS) 766 return; 767 } 768 } 769 770 /* Timeout */ 771 DPRINTF(("ehci_waitintr: timeout\n")); 772 xfer->status = USBD_TIMEOUT; 773 usb_transfer_complete(xfer); 774 /* XXX should free TD */ 775 } 776 777 void 778 ehci_poll(struct usbd_bus *bus) 779 { 780 ehci_softc_t *sc = (ehci_softc_t *)bus; 781 #ifdef EHCI_DEBUG 782 static int last; 783 int new; 784 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 785 if (new != last) { 786 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 787 last = new; 788 } 789 #endif 790 791 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 792 ehci_intr1(sc); 793 } 794 795 int 796 ehci_detach(struct ehci_softc *sc, int flags) 797 { 798 int rv = 0; 799 800 if (sc->sc_child != NULL) 801 rv = config_detach(sc->sc_child, flags); 802 803 if (rv != 0) 804 return (rv); 805 806 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 807 808 if (sc->sc_powerhook != NULL) 809 powerhook_disestablish(sc->sc_powerhook); 810 if (sc->sc_shutdownhook != NULL) 811 shutdownhook_disestablish(sc->sc_shutdownhook); 812 813 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 814 815 /* XXX free other data structures XXX */ 816 817 return (rv); 818 } 819 820 821 int 822 ehci_activate(device_ptr_t self, enum devact act) 823 { 824 struct ehci_softc *sc = (struct ehci_softc *)self; 825 int rv = 0; 826 827 switch (act) { 828 case DVACT_ACTIVATE: 829 return (EOPNOTSUPP); 830 break; 831 832 case DVACT_DEACTIVATE: 833 if (sc->sc_child != NULL) 834 rv = config_deactivate(sc->sc_child); 835 sc->sc_dying = 1; 836 break; 837 } 838 return (rv); 839 } 840 841 /* 842 * Handle suspend/resume. 843 * 844 * We need to switch to polling mode here, because this routine is 845 * called from an intterupt context. This is all right since we 846 * are almost suspended anyway. 847 */ 848 void 849 ehci_power(int why, void *v) 850 { 851 ehci_softc_t *sc = v; 852 //u_int32_t ctl; 853 int s; 854 855 #ifdef EHCI_DEBUG 856 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 857 ehci_dump_regs(sc); 858 #endif 859 860 s = splhardusb(); 861 switch (why) { 862 case PWR_SUSPEND: 863 case PWR_STANDBY: 864 sc->sc_bus.use_polling++; 865 #if 0 866 OOO 867 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 868 if (sc->sc_control == 0) { 869 /* 870 * Preserve register values, in case that APM BIOS 871 * does not recover them. 872 */ 873 sc->sc_control = ctl; 874 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 875 } 876 ctl |= EHCI_HCFS_SUSPEND; 877 OWRITE4(sc, EHCI_CONTROL, ctl); 878 #endif 879 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 880 sc->sc_bus.use_polling--; 881 break; 882 case PWR_RESUME: 883 sc->sc_bus.use_polling++; 884 #if 0 885 OOO 886 /* Some broken BIOSes do not recover these values */ 887 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 888 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 889 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 890 if (sc->sc_intre) 891 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 892 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 893 if (sc->sc_control) 894 ctl = sc->sc_control; 895 else 896 ctl = OREAD4(sc, EHCI_CONTROL); 897 ctl |= EHCI_HCFS_RESUME; 898 OWRITE4(sc, EHCI_CONTROL, ctl); 899 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 900 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 901 OWRITE4(sc, EHCI_CONTROL, ctl); 902 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 903 sc->sc_control = sc->sc_intre = 0; 904 #endif 905 sc->sc_bus.use_polling--; 906 break; 907 case PWR_SOFTSUSPEND: 908 case PWR_SOFTSTANDBY: 909 case PWR_SOFTRESUME: 910 break; 911 } 912 splx(s); 913 } 914 915 /* 916 * Shut down the controller when the system is going down. 917 */ 918 void 919 ehci_shutdown(void *v) 920 { 921 ehci_softc_t *sc = v; 922 923 DPRINTF(("ehci_shutdown: stopping the HC\n")); 924 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 925 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 926 } 927 928 usbd_status 929 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 930 { 931 struct ehci_softc *sc = (struct ehci_softc *)bus; 932 933 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 934 } 935 936 void 937 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 938 { 939 struct ehci_softc *sc = (struct ehci_softc *)bus; 940 941 usb_freemem(&sc->sc_bus, dma); 942 } 943 944 usbd_xfer_handle 945 ehci_allocx(struct usbd_bus *bus) 946 { 947 struct ehci_softc *sc = (struct ehci_softc *)bus; 948 usbd_xfer_handle xfer; 949 950 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 951 if (xfer != NULL) 952 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 953 else 954 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 955 if (xfer != NULL) { 956 memset(xfer, 0, sizeof (struct ehci_xfer)); 957 #ifdef DIAGNOSTIC 958 EXFER(xfer)->isdone = 1; 959 xfer->busy_free = XFER_BUSY; 960 #endif 961 } 962 return (xfer); 963 } 964 965 void 966 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 967 { 968 struct ehci_softc *sc = (struct ehci_softc *)bus; 969 970 #ifdef DIAGNOSTIC 971 if (xfer->busy_free != XFER_BUSY) { 972 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 973 xfer->busy_free); 974 return; 975 } 976 xfer->busy_free = XFER_FREE; 977 if (!EXFER(xfer)->isdone) { 978 printf("ehci_freex: !isdone\n"); 979 return; 980 } 981 #endif 982 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 983 } 984 985 Static void 986 ehci_device_clear_toggle(usbd_pipe_handle pipe) 987 { 988 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 989 990 DPRINTF(("ehci_device_clear_toggle: epipe=%p\n", epipe)); 991 #ifdef USB_DEBUG 992 if (ehcidebug) 993 usbd_dump_pipe(pipe); 994 #endif 995 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 996 } 997 998 Static void 999 ehci_noop(usbd_pipe_handle pipe) 1000 { 1001 } 1002 1003 #ifdef EHCI_DEBUG 1004 void 1005 ehci_dump_regs(ehci_softc_t *sc) 1006 { 1007 int i; 1008 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1009 EOREAD4(sc, EHCI_USBCMD), 1010 EOREAD4(sc, EHCI_USBSTS), 1011 EOREAD4(sc, EHCI_USBINTR)); 1012 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1013 EOREAD4(sc, EHCI_FRINDEX), 1014 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1015 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1016 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1017 for (i = 1; i <= sc->sc_noport; i++) 1018 printf("port %d status=0x%08x\n", i, 1019 EOREAD4(sc, EHCI_PORTSC(i))); 1020 } 1021 1022 void 1023 ehci_dump() 1024 { 1025 ehci_dump_regs(theehci); 1026 } 1027 1028 void 1029 ehci_dump_link(ehci_link_t link, int type) 1030 { 1031 link = le32toh(link); 1032 printf("0x%08x", link); 1033 if (link & EHCI_LINK_TERMINATE) 1034 printf("<T>"); 1035 else { 1036 printf("<"); 1037 if (type) { 1038 switch (EHCI_LINK_TYPE(link)) { 1039 case EHCI_LINK_ITD: printf("ITD"); break; 1040 case EHCI_LINK_QH: printf("QH"); break; 1041 case EHCI_LINK_SITD: printf("SITD"); break; 1042 case EHCI_LINK_FSTN: printf("FSTN"); break; 1043 } 1044 } 1045 printf(">"); 1046 } 1047 } 1048 1049 void 1050 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1051 { 1052 for (; sqtd; sqtd = sqtd->nextqtd) 1053 ehci_dump_sqtd(sqtd); 1054 } 1055 1056 void 1057 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1058 { 1059 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1060 ehci_dump_qtd(&sqtd->qtd); 1061 } 1062 1063 void 1064 ehci_dump_qtd(ehci_qtd_t *qtd) 1065 { 1066 u_int32_t s; 1067 char sbuf[128]; 1068 1069 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1070 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1071 printf("\n"); 1072 s = le32toh(qtd->qtd_status); 1073 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1074 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1075 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1076 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1077 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1078 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1079 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1080 EHCI_QTD_GET_PID(s), sbuf); 1081 for (s = 0; s < 5; s++) 1082 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1083 } 1084 1085 void 1086 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1087 { 1088 ehci_qh_t *qh = &sqh->qh; 1089 u_int32_t endp, endphub; 1090 1091 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1092 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1093 endp = le32toh(qh->qh_endp); 1094 printf(" endp=0x%08x\n", endp); 1095 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1096 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1097 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1098 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1099 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1100 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1101 EHCI_QH_GET_NRL(endp)); 1102 endphub = le32toh(qh->qh_endphub); 1103 printf(" endphub=0x%08x\n", endphub); 1104 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1105 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1106 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1107 EHCI_QH_GET_MULT(endphub)); 1108 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1109 printf("Overlay qTD:\n"); 1110 ehci_dump_qtd(&qh->qh_qtd); 1111 } 1112 1113 Static void 1114 ehci_dump_exfer(struct ehci_xfer *ex) 1115 { 1116 printf("ehci_dump_exfer: ex=%p\n", ex); 1117 } 1118 #endif 1119 1120 usbd_status 1121 ehci_open(usbd_pipe_handle pipe) 1122 { 1123 usbd_device_handle dev = pipe->device; 1124 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1125 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1126 u_int8_t addr = dev->address; 1127 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1128 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1129 ehci_soft_qh_t *sqh; 1130 usbd_status err; 1131 #if 0 1132 ehci_soft_itd_t *sitd; 1133 ehci_physaddr_t tdphys; 1134 u_int32_t fmt; 1135 int ival; 1136 #endif 1137 int s; 1138 int speed, naks; 1139 1140 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1141 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1142 1143 if (sc->sc_dying) 1144 return (USBD_IOERROR); 1145 1146 if (addr == sc->sc_addr) { 1147 switch (ed->bEndpointAddress) { 1148 case USB_CONTROL_ENDPOINT: 1149 pipe->methods = &ehci_root_ctrl_methods; 1150 break; 1151 case UE_DIR_IN | EHCI_INTR_ENDPT: 1152 pipe->methods = &ehci_root_intr_methods; 1153 break; 1154 default: 1155 return (USBD_INVAL); 1156 } 1157 return (USBD_NORMAL_COMPLETION); 1158 } 1159 1160 switch (dev->speed) { 1161 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1162 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1163 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1164 default: panic("ehci_open: bad device speed %d\n", dev->speed); 1165 } 1166 naks = 8; /* XXX */ 1167 sqh = ehci_alloc_sqh(sc); 1168 if (sqh == NULL) 1169 goto bad0; 1170 /* qh_link filled when the QH is added */ 1171 sqh->qh.qh_endp = htole32( 1172 EHCI_QH_SET_ADDR(addr) | 1173 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1174 EHCI_QH_SET_EPS(speed) | /* XXX */ 1175 /* XXX EHCI_QH_DTC ? */ 1176 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1177 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1178 EHCI_QH_CTL : 0) | 1179 EHCI_QH_SET_NRL(naks) 1180 ); 1181 sqh->qh.qh_endphub = htole32( 1182 EHCI_QH_SET_MULT(1) 1183 /* XXX TT stuff */ 1184 /* XXX interrupt mask */ 1185 ); 1186 sqh->qh.qh_curqtd = EHCI_NULL; 1187 /* Fill the overlay qTD */ 1188 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1189 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1190 sqh->qh.qh_qtd.qtd_status = htole32(0); 1191 1192 epipe->sqh = sqh; 1193 1194 switch (xfertype) { 1195 case UE_CONTROL: 1196 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1197 0, &epipe->u.ctl.reqdma); 1198 if (err) 1199 goto bad1; 1200 pipe->methods = &ehci_device_ctrl_methods; 1201 s = splusb(); 1202 ehci_add_qh(sqh, sc->sc_async_head); 1203 splx(s); 1204 break; 1205 case UE_BULK: 1206 pipe->methods = &ehci_device_bulk_methods; 1207 s = splusb(); 1208 ehci_add_qh(sqh, sc->sc_async_head); 1209 splx(s); 1210 break; 1211 default: 1212 return (USBD_INVAL); 1213 } 1214 return (USBD_NORMAL_COMPLETION); 1215 1216 bad1: 1217 ehci_free_sqh(sc, sqh); 1218 bad0: 1219 return (USBD_NOMEM); 1220 } 1221 1222 /* 1223 * Add an ED to the schedule. Called at splusb(). 1224 */ 1225 void 1226 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1227 { 1228 SPLUSBCHECK; 1229 1230 sqh->next = head->next; 1231 sqh->qh.qh_link = head->qh.qh_link; 1232 head->next = sqh; 1233 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1234 1235 #ifdef EHCI_DEBUG 1236 if (ehcidebug > 5) { 1237 printf("ehci_add_qh:\n"); 1238 ehci_dump_sqh(sqh); 1239 } 1240 #endif 1241 } 1242 1243 /* 1244 * Remove an ED from the schedule. Called at splusb(). 1245 */ 1246 void 1247 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1248 { 1249 ehci_soft_qh_t *p; 1250 1251 SPLUSBCHECK; 1252 /* XXX */ 1253 for (p = head; p == NULL && p->next != sqh; p = p->next) 1254 ; 1255 if (p == NULL) 1256 panic("ehci_rem_qh: ED not found\n"); 1257 p->next = sqh->next; 1258 p->qh.qh_link = sqh->qh.qh_link; 1259 1260 ehci_sync_hc(sc); 1261 } 1262 1263 /* 1264 * Ensure that the HC has released all references to the QH. We do this 1265 * by asking for a Async Advance Doorbell interrupt and then we wait for 1266 * the interrupt. 1267 * To make this easier we first obtain exclusive use of the doorbell. 1268 */ 1269 void 1270 ehci_sync_hc(ehci_softc_t *sc) 1271 { 1272 int s, error; 1273 1274 if (sc->sc_dying) { 1275 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1276 return; 1277 } 1278 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1279 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1280 s = splhardusb(); 1281 /* ask for doorbell */ 1282 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1283 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1284 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1285 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1286 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1287 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1288 splx(s); 1289 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1290 #ifdef DIAGNOSTIC 1291 if (error) 1292 printf("ehci_sync_hc: tsleep() = %d\n", error); 1293 #endif 1294 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1295 } 1296 1297 /***********/ 1298 1299 /* 1300 * Data structures and routines to emulate the root hub. 1301 */ 1302 Static usb_device_descriptor_t ehci_devd = { 1303 USB_DEVICE_DESCRIPTOR_SIZE, 1304 UDESC_DEVICE, /* type */ 1305 {0x00, 0x02}, /* USB version */ 1306 UDCLASS_HUB, /* class */ 1307 UDSUBCLASS_HUB, /* subclass */ 1308 UDPROTO_HSHUBSTT, /* protocol */ 1309 64, /* max packet */ 1310 {0},{0},{0x00,0x01}, /* device id */ 1311 1,2,0, /* string indicies */ 1312 1 /* # of configurations */ 1313 }; 1314 1315 Static usb_device_qualifier_t ehci_odevd = { 1316 USB_DEVICE_DESCRIPTOR_SIZE, 1317 UDESC_DEVICE_QUALIFIER, /* type */ 1318 {0x00, 0x02}, /* USB version */ 1319 UDCLASS_HUB, /* class */ 1320 UDSUBCLASS_HUB, /* subclass */ 1321 UDPROTO_FSHUB, /* protocol */ 1322 64, /* max packet */ 1323 1, /* # of configurations */ 1324 0 1325 }; 1326 1327 Static usb_config_descriptor_t ehci_confd = { 1328 USB_CONFIG_DESCRIPTOR_SIZE, 1329 UDESC_CONFIG, 1330 {USB_CONFIG_DESCRIPTOR_SIZE + 1331 USB_INTERFACE_DESCRIPTOR_SIZE + 1332 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1333 1, 1334 1, 1335 0, 1336 UC_SELF_POWERED, 1337 0 /* max power */ 1338 }; 1339 1340 Static usb_interface_descriptor_t ehci_ifcd = { 1341 USB_INTERFACE_DESCRIPTOR_SIZE, 1342 UDESC_INTERFACE, 1343 0, 1344 0, 1345 1, 1346 UICLASS_HUB, 1347 UISUBCLASS_HUB, 1348 UIPROTO_HSHUBSTT, 1349 0 1350 }; 1351 1352 Static usb_endpoint_descriptor_t ehci_endpd = { 1353 USB_ENDPOINT_DESCRIPTOR_SIZE, 1354 UDESC_ENDPOINT, 1355 UE_DIR_IN | EHCI_INTR_ENDPT, 1356 UE_INTERRUPT, 1357 {8, 0}, /* max packet */ 1358 255 1359 }; 1360 1361 Static usb_hub_descriptor_t ehci_hubd = { 1362 USB_HUB_DESCRIPTOR_SIZE, 1363 UDESC_HUB, 1364 0, 1365 {0,0}, 1366 0, 1367 0, 1368 {0}, 1369 }; 1370 1371 Static int 1372 ehci_str(p, l, s) 1373 usb_string_descriptor_t *p; 1374 int l; 1375 char *s; 1376 { 1377 int i; 1378 1379 if (l == 0) 1380 return (0); 1381 p->bLength = 2 * strlen(s) + 2; 1382 if (l == 1) 1383 return (1); 1384 p->bDescriptorType = UDESC_STRING; 1385 l -= 2; 1386 for (i = 0; s[i] && l > 1; i++, l -= 2) 1387 USETW2(p->bString[i], 0, s[i]); 1388 return (2*i+2); 1389 } 1390 1391 /* 1392 * Simulate a hardware hub by handling all the necessary requests. 1393 */ 1394 Static usbd_status 1395 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1396 { 1397 usbd_status err; 1398 1399 /* Insert last in queue. */ 1400 err = usb_insert_transfer(xfer); 1401 if (err) 1402 return (err); 1403 1404 /* Pipe isn't running, start first */ 1405 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1406 } 1407 1408 Static usbd_status 1409 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1410 { 1411 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1412 usb_device_request_t *req; 1413 void *buf = NULL; 1414 int port, i; 1415 int s, len, value, index, l, totlen = 0; 1416 usb_port_status_t ps; 1417 usb_hub_descriptor_t hubd; 1418 usbd_status err; 1419 u_int32_t v; 1420 1421 if (sc->sc_dying) 1422 return (USBD_IOERROR); 1423 1424 #ifdef DIAGNOSTIC 1425 if (!(xfer->rqflags & URQ_REQUEST)) 1426 /* XXX panic */ 1427 return (USBD_INVAL); 1428 #endif 1429 req = &xfer->request; 1430 1431 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1432 req->bmRequestType, req->bRequest)); 1433 1434 len = UGETW(req->wLength); 1435 value = UGETW(req->wValue); 1436 index = UGETW(req->wIndex); 1437 1438 if (len != 0) 1439 buf = KERNADDR(&xfer->dmabuf); 1440 1441 #define C(x,y) ((x) | ((y) << 8)) 1442 switch(C(req->bRequest, req->bmRequestType)) { 1443 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1444 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1445 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1446 /* 1447 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1448 * for the integrated root hub. 1449 */ 1450 break; 1451 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1452 if (len > 0) { 1453 *(u_int8_t *)buf = sc->sc_conf; 1454 totlen = 1; 1455 } 1456 break; 1457 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1458 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1459 switch(value >> 8) { 1460 case UDESC_DEVICE: 1461 if ((value & 0xff) != 0) { 1462 err = USBD_IOERROR; 1463 goto ret; 1464 } 1465 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1466 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1467 memcpy(buf, &ehci_devd, l); 1468 break; 1469 /* 1470 * We can't really operate at another speed, but the spec says 1471 * we need this descriptor. 1472 */ 1473 case UDESC_DEVICE_QUALIFIER: 1474 if ((value & 0xff) != 0) { 1475 err = USBD_IOERROR; 1476 goto ret; 1477 } 1478 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1479 memcpy(buf, &ehci_odevd, l); 1480 break; 1481 /* 1482 * We can't really operate at another speed, but the spec says 1483 * we need this descriptor. 1484 */ 1485 case UDESC_OTHER_SPEED_CONFIGURATION: 1486 case UDESC_CONFIG: 1487 if ((value & 0xff) != 0) { 1488 err = USBD_IOERROR; 1489 goto ret; 1490 } 1491 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1492 memcpy(buf, &ehci_confd, l); 1493 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1494 value >> 8; 1495 buf = (char *)buf + l; 1496 len -= l; 1497 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1498 totlen += l; 1499 memcpy(buf, &ehci_ifcd, l); 1500 buf = (char *)buf + l; 1501 len -= l; 1502 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1503 totlen += l; 1504 memcpy(buf, &ehci_endpd, l); 1505 break; 1506 case UDESC_STRING: 1507 if (len == 0) 1508 break; 1509 *(u_int8_t *)buf = 0; 1510 totlen = 1; 1511 switch (value & 0xff) { 1512 case 1: /* Vendor */ 1513 totlen = ehci_str(buf, len, sc->sc_vendor); 1514 break; 1515 case 2: /* Product */ 1516 totlen = ehci_str(buf, len, "EHCI root hub"); 1517 break; 1518 } 1519 break; 1520 default: 1521 err = USBD_IOERROR; 1522 goto ret; 1523 } 1524 break; 1525 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1526 if (len > 0) { 1527 *(u_int8_t *)buf = 0; 1528 totlen = 1; 1529 } 1530 break; 1531 case C(UR_GET_STATUS, UT_READ_DEVICE): 1532 if (len > 1) { 1533 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1534 totlen = 2; 1535 } 1536 break; 1537 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1538 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1539 if (len > 1) { 1540 USETW(((usb_status_t *)buf)->wStatus, 0); 1541 totlen = 2; 1542 } 1543 break; 1544 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1545 if (value >= USB_MAX_DEVICES) { 1546 err = USBD_IOERROR; 1547 goto ret; 1548 } 1549 sc->sc_addr = value; 1550 break; 1551 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1552 if (value != 0 && value != 1) { 1553 err = USBD_IOERROR; 1554 goto ret; 1555 } 1556 sc->sc_conf = value; 1557 break; 1558 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1559 break; 1560 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1561 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1562 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1563 err = USBD_IOERROR; 1564 goto ret; 1565 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1566 break; 1567 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1568 break; 1569 /* Hub requests */ 1570 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1571 break; 1572 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1573 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1574 "port=%d feature=%d\n", 1575 index, value)); 1576 if (index < 1 || index > sc->sc_noport) { 1577 err = USBD_IOERROR; 1578 goto ret; 1579 } 1580 port = EHCI_PORTSC(index); 1581 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1582 switch(value) { 1583 case UHF_PORT_ENABLE: 1584 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1585 break; 1586 case UHF_PORT_SUSPEND: 1587 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1588 break; 1589 case UHF_PORT_POWER: 1590 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1591 break; 1592 case UHF_PORT_TEST: 1593 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1594 "%d\n", index)); 1595 break; 1596 case UHF_PORT_INDICATOR: 1597 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1598 "%d\n", index)); 1599 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1600 break; 1601 case UHF_C_PORT_CONNECTION: 1602 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1603 break; 1604 case UHF_C_PORT_ENABLE: 1605 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1606 break; 1607 case UHF_C_PORT_SUSPEND: 1608 /* how? */ 1609 break; 1610 case UHF_C_PORT_OVER_CURRENT: 1611 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1612 break; 1613 case UHF_C_PORT_RESET: 1614 sc->sc_isreset = 0; 1615 break; 1616 default: 1617 err = USBD_IOERROR; 1618 goto ret; 1619 } 1620 #if 0 1621 switch(value) { 1622 case UHF_C_PORT_CONNECTION: 1623 case UHF_C_PORT_ENABLE: 1624 case UHF_C_PORT_SUSPEND: 1625 case UHF_C_PORT_OVER_CURRENT: 1626 case UHF_C_PORT_RESET: 1627 /* Enable RHSC interrupt if condition is cleared. */ 1628 if ((OREAD4(sc, port) >> 16) == 0) 1629 ehci_pcd_able(sc, 1); 1630 break; 1631 default: 1632 break; 1633 } 1634 #endif 1635 break; 1636 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1637 if (value != 0) { 1638 err = USBD_IOERROR; 1639 goto ret; 1640 } 1641 hubd = ehci_hubd; 1642 hubd.bNbrPorts = sc->sc_noport; 1643 v = EOREAD4(sc, EHCI_HCSPARAMS); 1644 USETW(hubd.wHubCharacteristics, 1645 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1646 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1647 ? UHD_PORT_IND : 0); 1648 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1649 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1650 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1651 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1652 l = min(len, hubd.bDescLength); 1653 totlen = l; 1654 memcpy(buf, &hubd, l); 1655 break; 1656 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1657 if (len != 4) { 1658 err = USBD_IOERROR; 1659 goto ret; 1660 } 1661 memset(buf, 0, len); /* ? XXX */ 1662 totlen = len; 1663 break; 1664 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1665 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1666 index)); 1667 if (index < 1 || index > sc->sc_noport) { 1668 err = USBD_IOERROR; 1669 goto ret; 1670 } 1671 if (len != 4) { 1672 err = USBD_IOERROR; 1673 goto ret; 1674 } 1675 v = EOREAD4(sc, EHCI_PORTSC(index)); 1676 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1677 v)); 1678 i = UPS_HIGH_SPEED; 1679 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1680 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1681 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1682 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1683 if (v & EHCI_PS_PR) i |= UPS_RESET; 1684 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1685 USETW(ps.wPortStatus, i); 1686 i = 0; 1687 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1688 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1689 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1690 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1691 USETW(ps.wPortChange, i); 1692 l = min(len, sizeof ps); 1693 memcpy(buf, &ps, l); 1694 totlen = l; 1695 break; 1696 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1697 err = USBD_IOERROR; 1698 goto ret; 1699 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1700 break; 1701 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1702 if (index < 1 || index > sc->sc_noport) { 1703 err = USBD_IOERROR; 1704 goto ret; 1705 } 1706 port = EHCI_PORTSC(index); 1707 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1708 switch(value) { 1709 case UHF_PORT_ENABLE: 1710 EOWRITE4(sc, port, v | EHCI_PS_PE); 1711 break; 1712 case UHF_PORT_SUSPEND: 1713 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1714 break; 1715 case UHF_PORT_RESET: 1716 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1717 index)); 1718 if (EHCI_PS_IS_LOWSPEED(v)) { 1719 /* Low speed device, give up ownership. */ 1720 ehci_disown(sc, index, 1); 1721 break; 1722 } 1723 /* Start reset sequence. */ 1724 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1725 EOWRITE4(sc, port, v | EHCI_PS_PR); 1726 /* Wait for reset to complete. */ 1727 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1728 if (sc->sc_dying) { 1729 err = USBD_IOERROR; 1730 goto ret; 1731 } 1732 /* Terminate reset sequence. */ 1733 EOWRITE4(sc, port, v); 1734 /* Wait for HC to complete reset. */ 1735 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1736 if (sc->sc_dying) { 1737 err = USBD_IOERROR; 1738 goto ret; 1739 } 1740 v = EOREAD4(sc, port); 1741 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1742 if (v & EHCI_PS_PR) { 1743 printf("%s: port reset timeout\n", 1744 USBDEVNAME(sc->sc_bus.bdev)); 1745 return (USBD_TIMEOUT); 1746 } 1747 if (!(v & EHCI_PS_PE)) { 1748 /* Not a high speed device, give up ownership.*/ 1749 ehci_disown(sc, index, 0); 1750 break; 1751 } 1752 sc->sc_isreset = 1; 1753 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1754 index, v)); 1755 break; 1756 case UHF_PORT_POWER: 1757 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1758 "%d\n", index)); 1759 EOWRITE4(sc, port, v | EHCI_PS_PP); 1760 break; 1761 case UHF_PORT_TEST: 1762 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1763 "%d\n", index)); 1764 break; 1765 case UHF_PORT_INDICATOR: 1766 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1767 "%d\n", index)); 1768 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1769 break; 1770 default: 1771 err = USBD_IOERROR; 1772 goto ret; 1773 } 1774 break; 1775 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1776 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1777 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1778 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1779 break; 1780 default: 1781 err = USBD_IOERROR; 1782 goto ret; 1783 } 1784 xfer->actlen = totlen; 1785 err = USBD_NORMAL_COMPLETION; 1786 ret: 1787 xfer->status = err; 1788 s = splusb(); 1789 usb_transfer_complete(xfer); 1790 splx(s); 1791 return (USBD_IN_PROGRESS); 1792 } 1793 1794 void 1795 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1796 { 1797 int i, port; 1798 u_int32_t v; 1799 1800 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1801 #ifdef DIAGNOSTIC 1802 if (sc->sc_npcomp != 0) { 1803 i = (index-1) / sc->sc_npcomp; 1804 if (i >= sc->sc_ncomp) 1805 printf("%s: strange port\n", 1806 USBDEVNAME(sc->sc_bus.bdev)); 1807 else 1808 printf("%s: handing over %s speed device on " 1809 "port %d to %s\n", 1810 USBDEVNAME(sc->sc_bus.bdev), 1811 lowspeed ? "low" : "full", 1812 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1813 } else { 1814 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1815 } 1816 #endif 1817 port = EHCI_PORTSC(index); 1818 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1819 EOWRITE4(sc, port, v | EHCI_PS_PO); 1820 } 1821 1822 /* Abort a root control request. */ 1823 Static void 1824 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1825 { 1826 /* Nothing to do, all transfers are synchronous. */ 1827 } 1828 1829 /* Close the root pipe. */ 1830 Static void 1831 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1832 { 1833 DPRINTF(("ehci_root_ctrl_close\n")); 1834 /* Nothing to do. */ 1835 } 1836 1837 void 1838 ehci_root_intr_done(usbd_xfer_handle xfer) 1839 { 1840 xfer->hcpriv = NULL; 1841 } 1842 1843 Static usbd_status 1844 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1845 { 1846 usbd_status err; 1847 1848 /* Insert last in queue. */ 1849 err = usb_insert_transfer(xfer); 1850 if (err) 1851 return (err); 1852 1853 /* Pipe isn't running, start first */ 1854 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1855 } 1856 1857 Static usbd_status 1858 ehci_root_intr_start(usbd_xfer_handle xfer) 1859 { 1860 usbd_pipe_handle pipe = xfer->pipe; 1861 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1862 1863 if (sc->sc_dying) 1864 return (USBD_IOERROR); 1865 1866 sc->sc_intrxfer = xfer; 1867 1868 return (USBD_IN_PROGRESS); 1869 } 1870 1871 /* Abort a root interrupt request. */ 1872 Static void 1873 ehci_root_intr_abort(usbd_xfer_handle xfer) 1874 { 1875 int s; 1876 1877 if (xfer->pipe->intrxfer == xfer) { 1878 DPRINTF(("ehci_root_intr_abort: remove\n")); 1879 xfer->pipe->intrxfer = NULL; 1880 } 1881 xfer->status = USBD_CANCELLED; 1882 s = splusb(); 1883 usb_transfer_complete(xfer); 1884 splx(s); 1885 } 1886 1887 /* Close the root pipe. */ 1888 Static void 1889 ehci_root_intr_close(usbd_pipe_handle pipe) 1890 { 1891 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1892 1893 DPRINTF(("ehci_root_intr_close\n")); 1894 1895 sc->sc_intrxfer = NULL; 1896 } 1897 1898 void 1899 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1900 { 1901 xfer->hcpriv = NULL; 1902 } 1903 1904 /************************/ 1905 1906 ehci_soft_qh_t * 1907 ehci_alloc_sqh(ehci_softc_t *sc) 1908 { 1909 ehci_soft_qh_t *sqh; 1910 usbd_status err; 1911 int i, offs; 1912 usb_dma_t dma; 1913 1914 if (sc->sc_freeqhs == NULL) { 1915 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1916 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1917 EHCI_PAGE_SIZE, &dma); 1918 if (err) 1919 return (NULL); 1920 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1921 offs = i * EHCI_SQH_SIZE; 1922 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs); 1923 sqh->physaddr = DMAADDR(&dma) + offs; 1924 sqh->next = sc->sc_freeqhs; 1925 sc->sc_freeqhs = sqh; 1926 } 1927 } 1928 sqh = sc->sc_freeqhs; 1929 sc->sc_freeqhs = sqh->next; 1930 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1931 sqh->next = NULL; 1932 return (sqh); 1933 } 1934 1935 void 1936 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1937 { 1938 sqh->next = sc->sc_freeqhs; 1939 sc->sc_freeqhs = sqh; 1940 } 1941 1942 ehci_soft_qtd_t * 1943 ehci_alloc_sqtd(ehci_softc_t *sc) 1944 { 1945 ehci_soft_qtd_t *sqtd; 1946 usbd_status err; 1947 int i, offs; 1948 usb_dma_t dma; 1949 int s; 1950 1951 if (sc->sc_freeqtds == NULL) { 1952 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 1953 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 1954 EHCI_PAGE_SIZE, &dma); 1955 if (err) 1956 return (NULL); 1957 s = splusb(); 1958 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 1959 offs = i * EHCI_SQTD_SIZE; 1960 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs); 1961 sqtd->physaddr = DMAADDR(&dma) + offs; 1962 sqtd->nextqtd = sc->sc_freeqtds; 1963 sc->sc_freeqtds = sqtd; 1964 } 1965 splx(s); 1966 } 1967 1968 s = splusb(); 1969 sqtd = sc->sc_freeqtds; 1970 sc->sc_freeqtds = sqtd->nextqtd; 1971 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 1972 sqtd->nextqtd = NULL; 1973 sqtd->xfer = NULL; 1974 splx(s); 1975 1976 return (sqtd); 1977 } 1978 1979 void 1980 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 1981 { 1982 int s; 1983 1984 s = splusb(); 1985 sqtd->nextqtd = sc->sc_freeqtds; 1986 sc->sc_freeqtds = sqtd; 1987 splx(s); 1988 } 1989 1990 usbd_status 1991 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 1992 int alen, int rd, usbd_xfer_handle xfer, 1993 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 1994 { 1995 ehci_soft_qtd_t *next, *cur; 1996 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 1997 u_int32_t qtdstatus; 1998 int len, curlen; 1999 int i; 2000 usb_dma_t *dma = &xfer->dmabuf; 2001 2002 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen)); 2003 2004 len = alen; 2005 dataphys = DMAADDR(dma); 2006 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2007 qtdstatus = htole32( 2008 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2009 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2010 EHCI_QTD_SET_CERR(3) 2011 /* IOC set below */ 2012 /* BYTES set below */ 2013 /* XXX Data toggle */ 2014 ); 2015 2016 cur = ehci_alloc_sqtd(sc); 2017 if (cur == NULL) 2018 goto nomem; 2019 *sp = cur; 2020 for (;;) { 2021 dataphyspage = EHCI_PAGE(dataphys); 2022 /* The EHCI hardware can handle at most 4 page crossings. */ 2023 if (dataphyslastpage - dataphyspage < EHCI_QTD_NBUFFERS) { 2024 /* we can handle it in this QTD */ 2025 curlen = len; 2026 } else { 2027 DPRINTF(("ehci_alloc_std_chain: multiple QTDs\n")); 2028 2029 /* must use multiple TDs, fill as much as possible. */ 2030 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2031 EHCI_PAGE_OFFSET(dataphys); 2032 2033 /* XXX true for EHCI? */ 2034 /* the length must be a multiple of the max size */ 2035 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2036 #ifdef DIAGNOSTIC 2037 if (curlen == 0) 2038 panic("ehci_alloc_std: curlen == 0\n"); 2039 #endif 2040 } 2041 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x " 2042 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2043 dataphys, dataphyslastpage, 2044 len, curlen)); 2045 len -= curlen; 2046 2047 if (len != 0) { 2048 next = ehci_alloc_sqtd(sc); 2049 if (next == NULL) 2050 goto nomem; 2051 nextphys = next->physaddr; 2052 } else { 2053 next = NULL; 2054 nextphys = EHCI_NULL; 2055 } 2056 2057 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2058 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2059 if (i != 0) /* use offset only in first buffer */ 2060 a = EHCI_PAGE(a); 2061 cur->qtd.qtd_buffer[i] = htole32(a); 2062 } 2063 cur->nextqtd = next; 2064 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2065 cur->qtd.qtd_status = 2066 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2067 cur->xfer = xfer; 2068 cur->len = curlen; 2069 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 2070 dataphys, dataphys + curlen - 1)); 2071 if (len == 0) 2072 break; 2073 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n")); 2074 dataphys += curlen; 2075 cur = next; 2076 } 2077 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2078 *ep = cur; 2079 2080 return (USBD_NORMAL_COMPLETION); 2081 2082 nomem: 2083 /* XXX free chain */ 2084 return (USBD_NOMEM); 2085 } 2086 2087 Static void 2088 ehci_free_std_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2089 ehci_soft_qtd_t *sqtdend) 2090 { 2091 ehci_soft_qtd_t *p; 2092 2093 for (; sqtd != sqtdend; sqtd = p) { 2094 p = sqtd->nextqtd; 2095 ehci_free_sqtd(sc, sqtd); 2096 } 2097 } 2098 2099 /****************/ 2100 2101 /* 2102 * Close a reqular pipe. 2103 * Assumes that there are no pending transactions. 2104 */ 2105 void 2106 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2107 { 2108 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2109 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2110 ehci_soft_qh_t *sqh = epipe->sqh; 2111 int s; 2112 2113 s = splusb(); 2114 ehci_rem_qh(sc, sqh, head); 2115 splx(s); 2116 ehci_free_sqh(sc, epipe->sqh); 2117 } 2118 2119 /* 2120 * Abort a device request. 2121 * If this routine is called at splusb() it guarantees that the request 2122 * will be removed from the hardware scheduling and that the callback 2123 * for it will be called with USBD_CANCELLED status. 2124 * It's impossible to guarantee that the requested transfer will not 2125 * have happened since the hardware runs concurrently. 2126 * If the transaction has already happened we rely on the ordinary 2127 * interrupt processing to process it. 2128 */ 2129 void 2130 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2131 { 2132 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2133 ehci_soft_qh_t *sqh = epipe->sqh; 2134 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2135 #if 0 2136 ehci_soft_td_t *p, *n; 2137 ehci_physaddr_t headp; 2138 int hit; 2139 #endif 2140 int s; 2141 2142 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh)); 2143 2144 if (sc->sc_dying) { 2145 /* If we're dying, just do the software part. */ 2146 s = splusb(); 2147 xfer->status = status; /* make software ignore it */ 2148 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2149 usb_transfer_complete(xfer); 2150 splx(s); 2151 return; 2152 } 2153 2154 if (xfer->device->bus->intr_context || !curproc) 2155 panic("ehci_abort_xfer: not in process context\n"); 2156 2157 /* 2158 * Step 1: Make interrupt routine and hardware ignore xfer. 2159 */ 2160 s = splusb(); 2161 xfer->status = status; /* make software ignore it */ 2162 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2163 splx(s); 2164 /* XXX */ 2165 2166 /* 2167 * Step 2: Wait until we know hardware has finished any possible 2168 * use of the xfer. Also make sure the soft interrupt routine 2169 * has run. 2170 */ 2171 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2172 /* XXX should have some communication with softintr() to know 2173 when it's done */ 2174 usb_delay_ms(epipe->pipe.device->bus, 250); 2175 2176 /* 2177 * Step 3: Remove any vestiges of the xfer from the hardware. 2178 * The complication here is that the hardware may have executed 2179 * beyond the xfer we're trying to abort. So as we're scanning 2180 * the TDs of this xfer we check if the hardware points to 2181 * any of them. 2182 */ 2183 s = splusb(); /* XXX why? */ 2184 /* XXX */ 2185 2186 /* 2187 * Step 4: Turn on hardware again. 2188 */ 2189 /* XXX */ 2190 2191 /* 2192 * Step 5: Execute callback. 2193 */ 2194 #ifdef DIAGNOSTIC 2195 EXFER(xfer)->isdone = 1; 2196 #endif 2197 usb_transfer_complete(xfer); 2198 2199 splx(s); 2200 } 2201 2202 void 2203 ehci_timeout(void *addr) 2204 { 2205 struct ehci_xfer *exfer = addr; 2206 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2207 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2208 2209 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2210 #ifdef USB_DEBUG 2211 if (ehcidebug) 2212 usbd_dump_pipe(exfer->xfer.pipe); 2213 #endif 2214 2215 if (sc->sc_dying) { 2216 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2217 return; 2218 } 2219 2220 /* Execute the abort in a process context. */ 2221 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2222 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2223 } 2224 2225 void 2226 ehci_timeout_task(void *addr) 2227 { 2228 usbd_xfer_handle xfer = addr; 2229 int s; 2230 2231 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2232 2233 s = splusb(); 2234 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2235 splx(s); 2236 } 2237 2238 /************************/ 2239 2240 Static usbd_status 2241 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2242 { 2243 usbd_status err; 2244 2245 /* Insert last in queue. */ 2246 err = usb_insert_transfer(xfer); 2247 if (err) 2248 return (err); 2249 2250 /* Pipe isn't running, start first */ 2251 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2252 } 2253 2254 Static usbd_status 2255 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2256 { 2257 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2258 usbd_status err; 2259 2260 if (sc->sc_dying) 2261 return (USBD_IOERROR); 2262 2263 #ifdef DIAGNOSTIC 2264 if (!(xfer->rqflags & URQ_REQUEST)) { 2265 /* XXX panic */ 2266 printf("ehci_device_ctrl_transfer: not a request\n"); 2267 return (USBD_INVAL); 2268 } 2269 #endif 2270 2271 err = ehci_device_request(xfer); 2272 if (err) 2273 return (err); 2274 2275 if (sc->sc_bus.use_polling) 2276 ehci_waitintr(sc, xfer); 2277 return (USBD_IN_PROGRESS); 2278 } 2279 2280 void 2281 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2282 { 2283 struct ehci_xfer *ex = EXFER(xfer); 2284 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2285 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2286 2287 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2288 2289 #ifdef DIAGNOSTIC 2290 if (!(xfer->rqflags & URQ_REQUEST)) { 2291 panic("ehci_ctrl_done: not a request\n"); 2292 } 2293 #endif 2294 2295 ehci_del_intr_list(ex); /* remove from active list */ 2296 2297 if (epipe->u.ctl.length != 0) 2298 ehci_free_std_chain(sc, ex->sqtdstart, NULL); 2299 2300 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen)); 2301 } 2302 2303 /* Abort a device control request. */ 2304 Static void 2305 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2306 { 2307 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2308 ehci_abort_xfer(xfer, USBD_CANCELLED); 2309 } 2310 2311 /* Close a device control pipe. */ 2312 Static void 2313 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2314 { 2315 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2316 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2317 2318 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2319 ehci_close_pipe(pipe, sc->sc_async_head); 2320 } 2321 2322 usbd_status 2323 ehci_device_request(usbd_xfer_handle xfer) 2324 { 2325 #define exfer EXFER(xfer) 2326 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2327 usb_device_request_t *req = &xfer->request; 2328 usbd_device_handle dev = epipe->pipe.device; 2329 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2330 int addr = dev->address; 2331 ehci_soft_qtd_t *setup, *stat, *next; 2332 ehci_soft_qh_t *sqh; 2333 int isread; 2334 int len; 2335 usbd_status err; 2336 int s; 2337 2338 isread = req->bmRequestType & UT_READ; 2339 len = UGETW(req->wLength); 2340 2341 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2342 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2343 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2344 UGETW(req->wIndex), len, addr, 2345 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2346 2347 setup = ehci_alloc_sqtd(sc); 2348 if (setup == NULL) { 2349 err = USBD_NOMEM; 2350 goto bad1; 2351 } 2352 stat = ehci_alloc_sqtd(sc); 2353 if (stat == NULL) { 2354 err = USBD_NOMEM; 2355 goto bad2; 2356 } 2357 2358 sqh = epipe->sqh; 2359 epipe->u.ctl.length = len; 2360 2361 /* XXX 2362 * Since we're messing with the QH we must know the HC is in sync. 2363 * This needs to go away since it slows down control transfers. 2364 * Removing it entails: 2365 * - fill the QH only once with addr & wMaxPacketSize 2366 * - put the correct data toggles in the qtds and set DTC 2367 */ 2368 /* ehci_sync_hc(sc); */ 2369 /* Update device address and length since they may have changed. */ 2370 /* XXX This only needs to be done once, but it's too early in open. */ 2371 /* XXXX Should not touch ED here! */ 2372 sqh->qh.qh_endp = 2373 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2374 htole32( 2375 EHCI_QH_SET_ADDR(addr) | 2376 /* EHCI_QH_DTC | */ 2377 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2378 ); 2379 /* Clear toggle */ 2380 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2381 2382 /* Set up data transaction */ 2383 if (len != 0) { 2384 ehci_soft_qtd_t *end; 2385 2386 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, 2387 &next, &end); 2388 if (err) 2389 goto bad3; 2390 end->nextqtd = stat; 2391 end->qtd.qtd_next = 2392 end->qtd.qtd_altnext = htole32(stat->physaddr); 2393 /* Start toggle at 1. */ 2394 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2395 } else { 2396 next = stat; 2397 } 2398 2399 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req); 2400 2401 setup->qtd.qtd_status = htole32( 2402 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2403 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2404 EHCI_QTD_SET_CERR(3) | 2405 EHCI_QTD_SET_BYTES(sizeof *req) 2406 ); 2407 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma)); 2408 setup->nextqtd = next; 2409 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2410 setup->xfer = xfer; 2411 setup->len = sizeof *req; 2412 2413 stat->qtd.qtd_status = htole32( 2414 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) | 2415 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2416 EHCI_QTD_SET_CERR(3) | 2417 EHCI_QTD_IOC 2418 ); 2419 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2420 stat->nextqtd = NULL; 2421 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2422 stat->xfer = xfer; 2423 stat->len = 0; 2424 2425 #ifdef EHCI_DEBUG 2426 if (ehcidebug > 2) { 2427 DPRINTF(("ehci_device_request:\n")); 2428 ehci_dump_sqh(sqh); 2429 ehci_dump_sqtds(setup); 2430 } 2431 #endif 2432 2433 exfer->sqtdstart = setup; 2434 exfer->sqtdend = stat; 2435 #ifdef DIAGNOSTIC 2436 if (!exfer->isdone) { 2437 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2438 } 2439 exfer->isdone = 0; 2440 #endif 2441 2442 /* Insert qTD in QH list. */ 2443 s = splusb(); 2444 sqh->qh.qh_curqtd = 0; 2445 sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr); 2446 sqh->sqtd = setup; 2447 if (xfer->timeout && !sc->sc_bus.use_polling) { 2448 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2449 ehci_timeout, xfer); 2450 } 2451 ehci_add_intr_list(sc, exfer); 2452 xfer->status = USBD_IN_PROGRESS; 2453 splx(s); 2454 2455 #ifdef EHCI_DEBUG 2456 if (ehcidebug > 10) { 2457 delay(10000); 2458 DPRINTF(("ehci_device_request: status=%x\n", 2459 EOREAD4(sc, EHCI_USBSTS))); 2460 ehci_dump_regs(sc); 2461 ehci_dump_sqh(sc->sc_async_head); 2462 ehci_dump_sqh(sqh); 2463 ehci_dump_sqtds(setup); 2464 } 2465 #endif 2466 2467 return (USBD_NORMAL_COMPLETION); 2468 2469 bad3: 2470 ehci_free_sqtd(sc, stat); 2471 bad2: 2472 ehci_free_sqtd(sc, setup); 2473 bad1: 2474 return (err); 2475 #undef exfer 2476 } 2477 2478 /************************/ 2479 2480 Static usbd_status 2481 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2482 { 2483 usbd_status err; 2484 2485 /* Insert last in queue. */ 2486 err = usb_insert_transfer(xfer); 2487 if (err) 2488 return (err); 2489 2490 /* Pipe isn't running, start first */ 2491 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2492 } 2493 2494 usbd_status 2495 ehci_device_bulk_start(usbd_xfer_handle xfer) 2496 { 2497 #define exfer EXFER(xfer) 2498 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2499 usbd_device_handle dev = epipe->pipe.device; 2500 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2501 ehci_soft_qtd_t *data, *dataend; 2502 ehci_soft_qh_t *sqh; 2503 usbd_status err; 2504 int len, isread, endpt; 2505 int s; 2506 2507 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2508 xfer, xfer->length, xfer->flags)); 2509 2510 if (sc->sc_dying) 2511 return (USBD_IOERROR); 2512 2513 #ifdef DIAGNOSTIC 2514 if (xfer->rqflags & URQ_REQUEST) 2515 panic("ehci_device_bulk_transfer: a request\n"); 2516 #endif 2517 2518 len = xfer->length; 2519 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2520 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2521 sqh = epipe->sqh; 2522 2523 epipe->u.bulk.length = len; 2524 2525 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, &data, 2526 &dataend); 2527 if (err) 2528 return (err); 2529 2530 #ifdef EHCI_DEBUG 2531 if (ehcidebug > 8) { 2532 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2533 ehci_dump_sqtds(data); 2534 } 2535 #endif 2536 2537 /* Set up interrupt info. */ 2538 exfer->sqtdstart = data; 2539 exfer->sqtdend = dataend; 2540 #ifdef DIAGNOSTIC 2541 if (!exfer->isdone) { 2542 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2543 } 2544 exfer->isdone = 0; 2545 #endif 2546 2547 s = splusb(); 2548 sqh->qh.qh_curqtd = 0; 2549 sqh->qh.qh_qtd.qtd_next = htole32(data->physaddr); 2550 sqh->sqtd = data; 2551 if (xfer->timeout && !sc->sc_bus.use_polling) { 2552 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2553 ehci_timeout, xfer); 2554 } 2555 ehci_add_intr_list(sc, exfer); 2556 xfer->status = USBD_IN_PROGRESS; 2557 splx(s); 2558 2559 #ifdef EHCI_DEBUG 2560 if (ehcidebug > 10) { 2561 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2562 ehci_dump_sqtds(data); 2563 } 2564 #endif 2565 2566 if (sc->sc_bus.use_polling) 2567 ehci_waitintr(sc, xfer); 2568 2569 return (USBD_IN_PROGRESS); 2570 #undef exfer 2571 } 2572 2573 Static void 2574 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2575 { 2576 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2577 ehci_abort_xfer(xfer, USBD_CANCELLED); 2578 } 2579 2580 /* 2581 * Close a device bulk pipe. 2582 */ 2583 Static void 2584 ehci_device_bulk_close(usbd_pipe_handle pipe) 2585 { 2586 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2587 2588 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2589 ehci_close_pipe(pipe, sc->sc_async_head); 2590 } 2591 2592 void 2593 ehci_device_bulk_done(usbd_xfer_handle xfer) 2594 { 2595 struct ehci_xfer *ex = EXFER(xfer); 2596 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2597 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2598 2599 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2600 xfer, xfer->actlen)); 2601 2602 ehci_del_intr_list(ex); /* remove from active list */ 2603 2604 ehci_free_std_chain(sc, ex->sqtdstart, 0); 2605 2606 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2607 } 2608 2609 /************************/ 2610 2611 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2612 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2613 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2614 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2615 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2616 2617 /************************/ 2618 2619 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2620 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2621 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2622 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2623 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2624
Indexes created Thu Sep 25 16:09:42 GMT 2025