ehci.c revision 1.24 1 /* $NetBSD: ehci.c,v 1.24 2001/11/21 16:22:58 augustss Exp $ */
2
3 /*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart (at) augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 *
42 * The EHCI 0.96 spec can be found at
43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 * and the USB 2.0 spec at
45 * http://www.usb.org/developers/data/usb_20.zip
46 *
47 */
48
49 #include <sys/cdefs.h>
50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.24 2001/11/21 16:22:58 augustss Exp $");
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/kernel.h>
55 #include <sys/malloc.h>
56 #include <sys/device.h>
57 #include <sys/select.h>
58 #include <sys/proc.h>
59 #include <sys/queue.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ehcireg.h>
71 #include <dev/usb/ehcivar.h>
72
73 #ifdef EHCI_DEBUG
74 #define DPRINTF(x) if (ehcidebug) printf x
75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 int ehcidebug = 0;
77 #ifndef __NetBSD__
78 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
79 #endif
80 #else
81 #define DPRINTF(x)
82 #define DPRINTFN(n,x)
83 #endif
84
85 struct ehci_pipe {
86 struct usbd_pipe pipe;
87 ehci_soft_qh_t *sqh;
88 union {
89 ehci_soft_qtd_t *qtd;
90 /* ehci_soft_itd_t *itd; */
91 } tail;
92 union {
93 /* Control pipe */
94 struct {
95 usb_dma_t reqdma;
96 u_int length;
97 /*ehci_soft_qtd_t *setup, *data, *stat;*/
98 } ctl;
99 /* Interrupt pipe */
100 /* XXX */
101 /* Bulk pipe */
102 struct {
103 u_int length;
104 } bulk;
105 /* Iso pipe */
106 /* XXX */
107 } u;
108 };
109
110 Static void ehci_shutdown(void *);
111 Static void ehci_power(int, void *);
112
113 Static usbd_status ehci_open(usbd_pipe_handle);
114 Static void ehci_poll(struct usbd_bus *);
115 Static void ehci_softintr(void *);
116 Static int ehci_intr1(ehci_softc_t *);
117 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
118 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
119 Static void ehci_idone(struct ehci_xfer *);
120 Static void ehci_timeout(void *);
121 Static void ehci_timeout_task(void *);
122
123 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
124 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
125
126 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
127 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
128
129 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
130 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
131 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
132 Static void ehci_root_ctrl_close(usbd_pipe_handle);
133 Static void ehci_root_ctrl_done(usbd_xfer_handle);
134
135 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
136 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
137 Static void ehci_root_intr_abort(usbd_xfer_handle);
138 Static void ehci_root_intr_close(usbd_pipe_handle);
139 Static void ehci_root_intr_done(usbd_xfer_handle);
140
141 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
142 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
143 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
144 Static void ehci_device_ctrl_close(usbd_pipe_handle);
145 Static void ehci_device_ctrl_done(usbd_xfer_handle);
146
147 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
148 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
149 Static void ehci_device_bulk_abort(usbd_xfer_handle);
150 Static void ehci_device_bulk_close(usbd_pipe_handle);
151 Static void ehci_device_bulk_done(usbd_xfer_handle);
152
153 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
154 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
155 Static void ehci_device_intr_abort(usbd_xfer_handle);
156 Static void ehci_device_intr_close(usbd_pipe_handle);
157 Static void ehci_device_intr_done(usbd_xfer_handle);
158
159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
161 Static void ehci_device_isoc_abort(usbd_xfer_handle);
162 Static void ehci_device_isoc_close(usbd_pipe_handle);
163 Static void ehci_device_isoc_done(usbd_xfer_handle);
164
165 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
166 Static void ehci_noop(usbd_pipe_handle pipe);
167
168 Static int ehci_str(usb_string_descriptor_t *, int, char *);
169 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
170 Static void ehci_pcd_able(ehci_softc_t *, int);
171 Static void ehci_pcd_enable(void *);
172 Static void ehci_disown(ehci_softc_t *, int, int);
173
174 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
175 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
176
177 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
178 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
179 Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *,
180 ehci_softc_t *, int, int, usbd_xfer_handle,
181 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
182 Static void ehci_free_std_chain(ehci_softc_t *, ehci_soft_qtd_t *,
183 ehci_soft_qtd_t *);
184
185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
186
187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
189 ehci_soft_qh_t *);
190 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
191 Static void ehci_sync_hc(ehci_softc_t *);
192
193 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
194 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
195
196 #ifdef EHCI_DEBUG
197 Static void ehci_dump_regs(ehci_softc_t *);
198 Static void ehci_dump(void);
199 Static ehci_softc_t *theehci;
200 Static void ehci_dump_link(ehci_link_t, int);
201 Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
202 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
203 Static void ehci_dump_qtd(ehci_qtd_t *);
204 Static void ehci_dump_sqh(ehci_soft_qh_t *);
205 Static void ehci_dump_exfer(struct ehci_xfer *);
206 #endif
207
208 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
209
210 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
211
212 #define EHCI_INTR_ENDPT 1
213
214 #define ehci_add_intr_list(sc, ex) \
215 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
216 #define ehci_del_intr_list(ex) \
217 LIST_REMOVE((ex), inext)
218
219 Static struct usbd_bus_methods ehci_bus_methods = {
220 ehci_open,
221 ehci_softintr,
222 ehci_poll,
223 ehci_allocm,
224 ehci_freem,
225 ehci_allocx,
226 ehci_freex,
227 };
228
229 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
230 ehci_root_ctrl_transfer,
231 ehci_root_ctrl_start,
232 ehci_root_ctrl_abort,
233 ehci_root_ctrl_close,
234 ehci_noop,
235 ehci_root_ctrl_done,
236 };
237
238 Static struct usbd_pipe_methods ehci_root_intr_methods = {
239 ehci_root_intr_transfer,
240 ehci_root_intr_start,
241 ehci_root_intr_abort,
242 ehci_root_intr_close,
243 ehci_noop,
244 ehci_root_intr_done,
245 };
246
247 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
248 ehci_device_ctrl_transfer,
249 ehci_device_ctrl_start,
250 ehci_device_ctrl_abort,
251 ehci_device_ctrl_close,
252 ehci_noop,
253 ehci_device_ctrl_done,
254 };
255
256 Static struct usbd_pipe_methods ehci_device_intr_methods = {
257 ehci_device_intr_transfer,
258 ehci_device_intr_start,
259 ehci_device_intr_abort,
260 ehci_device_intr_close,
261 ehci_device_clear_toggle,
262 ehci_device_intr_done,
263 };
264
265 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
266 ehci_device_bulk_transfer,
267 ehci_device_bulk_start,
268 ehci_device_bulk_abort,
269 ehci_device_bulk_close,
270 ehci_device_clear_toggle,
271 ehci_device_bulk_done,
272 };
273
274 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
275 ehci_device_isoc_transfer,
276 ehci_device_isoc_start,
277 ehci_device_isoc_abort,
278 ehci_device_isoc_close,
279 ehci_noop,
280 ehci_device_isoc_done,
281 };
282
283 usbd_status
284 ehci_init(ehci_softc_t *sc)
285 {
286 u_int32_t version, sparams, cparams, hcr;
287 u_int i;
288 usbd_status err;
289 ehci_soft_qh_t *sqh;
290
291 DPRINTF(("ehci_init: start\n"));
292 #ifdef EHCI_DEBUG
293 theehci = sc;
294 #endif
295
296 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
297
298 version = EREAD2(sc, EHCI_HCIVERSION);
299 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
300 version >> 8, version & 0xff);
301
302 sparams = EREAD4(sc, EHCI_HCSPARAMS);
303 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
304 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
305 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
306 printf("%s: wrong number of companions (%d != %d)\n",
307 USBDEVNAME(sc->sc_bus.bdev),
308 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
309 return (USBD_IOERROR);
310 }
311 if (sc->sc_ncomp > 0) {
312 printf("%s: companion controller%s, %d port%s each:",
313 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
314 EHCI_HCS_N_PCC(sparams),
315 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
316 for (i = 0; i < sc->sc_ncomp; i++)
317 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
318 printf("\n");
319 }
320 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
321 cparams = EREAD4(sc, EHCI_HCCPARAMS);
322 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
323
324 sc->sc_bus.usbrev = USBREV_2_0;
325
326 /* Reset the controller */
327 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
328 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
329 usb_delay_ms(&sc->sc_bus, 1);
330 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
331 for (i = 0; i < 100; i++) {
332 delay(10);
333 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
334 if (!hcr)
335 break;
336 }
337 if (hcr) {
338 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
339 return (USBD_IOERROR);
340 }
341
342 /* frame list size at default, read back what we got and use that */
343 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
344 case 0: sc->sc_flsize = 1024*4; break;
345 case 1: sc->sc_flsize = 512*4; break;
346 case 2: sc->sc_flsize = 256*4; break;
347 case 3: return (USBD_IOERROR);
348 }
349 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
350 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
351 if (err)
352 return (err);
353 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
354
355 /* Set up the bus struct. */
356 sc->sc_bus.methods = &ehci_bus_methods;
357 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
358
359 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
360 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
361
362 sc->sc_eintrs = EHCI_NORMAL_INTRS;
363
364 /* Allocate dummy QH that starts the async list. */
365 sqh = ehci_alloc_sqh(sc);
366 if (sqh == NULL) {
367 err = USBD_NOMEM;
368 goto bad1;
369 }
370 /* Fill the QH */
371 sqh->qh.qh_endp =
372 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
373 sqh->qh.qh_link =
374 htole32(sqh->physaddr | EHCI_LINK_QH);
375 sqh->qh.qh_curqtd = EHCI_NULL;
376 sqh->next = NULL;
377 /* Fill the overlay qTD */
378 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
379 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
380 sqh->qh.qh_qtd.qtd_status =
381 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
382 sqh->sqtd = NULL;
383 #ifdef EHCI_DEBUG
384 if (ehcidebug) {
385 ehci_dump_sqh(sc->sc_async_head);
386 }
387 #endif
388
389 /* Point to async list */
390 sc->sc_async_head = sqh;
391 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
392
393 usb_callout_init(sc->sc_tmo_pcd);
394
395 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
396
397 /* Enable interrupts */
398 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
399
400 /* Turn on controller */
401 EOWRITE4(sc, EHCI_USBCMD,
402 EHCI_CMD_ITC_8 | /* 8 microframes */
403 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
404 EHCI_CMD_ASE |
405 /* EHCI_CMD_PSE | */
406 EHCI_CMD_RS);
407
408 /* Take over port ownership */
409 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
410
411 for (i = 0; i < 100; i++) {
412 delay(10);
413 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
414 if (!hcr)
415 break;
416 }
417 if (hcr) {
418 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
419 return (USBD_IOERROR);
420 }
421
422 return (USBD_NORMAL_COMPLETION);
423
424 #if 0
425 bad2:
426 ehci_free_sqh(sc, sc->sc_async_head);
427 #endif
428 bad1:
429 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
430 return (err);
431 }
432
433 int
434 ehci_intr(void *v)
435 {
436 ehci_softc_t *sc = v;
437
438 if (sc == NULL || sc->sc_dying)
439 return (0);
440
441 /* If we get an interrupt while polling, then just ignore it. */
442 if (sc->sc_bus.use_polling) {
443 #ifdef DIAGNOSTIC
444 printf("ehci_intr: ignored interrupt while polling\n");
445 #endif
446 return (0);
447 }
448
449 return (ehci_intr1(sc));
450 }
451
452 Static int
453 ehci_intr1(ehci_softc_t *sc)
454 {
455 u_int32_t intrs, eintrs;
456
457 DPRINTFN(20,("ehci_intr1: enter\n"));
458
459 /* In case the interrupt occurs before initialization has completed. */
460 if (sc == NULL) {
461 #ifdef DIAGNOSTIC
462 printf("ehci_intr: sc == NULL\n");
463 #endif
464 return (0);
465 }
466
467 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
468
469 if (!intrs)
470 return (0);
471
472 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
473 eintrs = intrs & sc->sc_eintrs;
474 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
475 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
476 (u_int)eintrs));
477 if (!eintrs)
478 return (0);
479
480 sc->sc_bus.intr_context++;
481 sc->sc_bus.no_intrs++;
482 if (eintrs & EHCI_STS_IAA) {
483 DPRINTF(("ehci_intr1: door bell\n"));
484 wakeup(&sc->sc_async_head);
485 eintrs &= ~EHCI_STS_IAA;
486 }
487 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
488 DPRINTF(("ehci_intr1: %s %s\n",
489 eintrs & EHCI_STS_INT ? "INT" : "",
490 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
491 usb_schedsoftintr(&sc->sc_bus);
492 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
493 }
494 if (eintrs & EHCI_STS_HSE) {
495 printf("%s: unrecoverable error, controller halted\n",
496 USBDEVNAME(sc->sc_bus.bdev));
497 /* XXX what else */
498 }
499 if (eintrs & EHCI_STS_PCD) {
500 ehci_pcd(sc, sc->sc_intrxfer);
501 /*
502 * Disable PCD interrupt for now, because it will be
503 * on until the port has been reset.
504 */
505 ehci_pcd_able(sc, 0);
506 /* Do not allow RHSC interrupts > 1 per second */
507 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
508 eintrs &= ~EHCI_STS_PCD;
509 }
510
511 sc->sc_bus.intr_context--;
512
513 if (eintrs != 0) {
514 /* Block unprocessed interrupts. */
515 sc->sc_eintrs &= ~eintrs;
516 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
517 printf("%s: blocking intrs 0x%x\n",
518 USBDEVNAME(sc->sc_bus.bdev), eintrs);
519 }
520
521 return (1);
522 }
523
524 void
525 ehci_pcd_able(ehci_softc_t *sc, int on)
526 {
527 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
528 if (on)
529 sc->sc_eintrs |= EHCI_STS_PCD;
530 else
531 sc->sc_eintrs &= ~EHCI_STS_PCD;
532 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
533 }
534
535 void
536 ehci_pcd_enable(void *v_sc)
537 {
538 ehci_softc_t *sc = v_sc;
539
540 ehci_pcd_able(sc, 1);
541 }
542
543 void
544 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
545 {
546 usbd_pipe_handle pipe;
547 struct ehci_pipe *epipe;
548 u_char *p;
549 int i, m;
550
551 if (xfer == NULL) {
552 /* Just ignore the change. */
553 return;
554 }
555
556 pipe = xfer->pipe;
557 epipe = (struct ehci_pipe *)pipe;
558
559 p = KERNADDR(&xfer->dmabuf);
560 m = min(sc->sc_noport, xfer->length * 8 - 1);
561 memset(p, 0, xfer->length);
562 for (i = 1; i <= m; i++) {
563 /* Pick out CHANGE bits from the status reg. */
564 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
565 p[i/8] |= 1 << (i%8);
566 }
567 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
568 xfer->actlen = xfer->length;
569 xfer->status = USBD_NORMAL_COMPLETION;
570
571 usb_transfer_complete(xfer);
572 }
573
574 void
575 ehci_softintr(void *v)
576 {
577 ehci_softc_t *sc = v;
578 struct ehci_xfer *ex;
579
580 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
581 sc->sc_bus.intr_context));
582
583 sc->sc_bus.intr_context++;
584
585 /*
586 * The only explanation I can think of for why EHCI is as brain dead
587 * as UHCI interrupt-wise is that Intel was involved in both.
588 * An interrupt just tells us that something is done, we have no
589 * clue what, so we need to scan through all active transfers. :-(
590 */
591 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
592 ehci_check_intr(sc, ex);
593
594 sc->sc_bus.intr_context--;
595 }
596
597 /* Check for an interrupt. */
598 void
599 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
600 {
601 ehci_soft_qtd_t *sqtd, *lsqtd;
602 u_int32_t status;
603
604 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
605
606 if (ex->sqtdstart == NULL) {
607 printf("ehci_check_intr: sqtdstart=NULL\n");
608 return;
609 }
610 lsqtd = ex->sqtdend;
611 #ifdef DIAGNOSTIC
612 if (lsqtd == NULL) {
613 printf("ehci_check_intr: sqtd==0\n");
614 return;
615 }
616 #endif
617 /*
618 * If the last TD is still active we need to check whether there
619 * is a an error somewhere in the middle, or whether there was a
620 * short packet (SPD and not ACTIVE).
621 */
622 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
623 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
624 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
625 status = le32toh(sqtd->qtd.qtd_status);
626 /* If there's an active QTD the xfer isn't done. */
627 if (status & EHCI_QTD_ACTIVE)
628 break;
629 /* Any kind of error makes the xfer done. */
630 if (status & EHCI_QTD_HALTED)
631 goto done;
632 /* We want short packets, and it is short: it's done */
633 if (EHCI_QTD_SET_BYTES(status) != 0)
634 goto done;
635 }
636 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
637 ex, ex->sqtdstart));
638 return;
639 }
640 done:
641 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
642 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
643 ehci_idone(ex);
644 }
645
646 void
647 ehci_idone(struct ehci_xfer *ex)
648 {
649 usbd_xfer_handle xfer = &ex->xfer;
650 #ifdef EHCI_DEBUG
651 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
652 #endif
653 ehci_soft_qtd_t *sqtd;
654 u_int32_t status = 0, nstatus;
655 int actlen;
656
657 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
658 #ifdef DIAGNOSTIC
659 {
660 int s = splhigh();
661 if (ex->isdone) {
662 splx(s);
663 #ifdef EHCI_DEBUG
664 printf("ehci_idone: ex is done!\n ");
665 ehci_dump_exfer(ex);
666 #else
667 printf("ehci_idone: ex=%p is done!\n", ex);
668 #endif
669 return;
670 }
671 ex->isdone = 1;
672 splx(s);
673 }
674 #endif
675
676 if (xfer->status == USBD_CANCELLED ||
677 xfer->status == USBD_TIMEOUT) {
678 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
679 return;
680 }
681
682 #ifdef EHCI_DEBUG
683 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
684 if (ehcidebug > 10)
685 ehci_dump_sqtds(ex->sqtdstart);
686 #endif
687
688 /* The transfer is done, compute actual length and status. */
689 actlen = 0;
690 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
691 nstatus = le32toh(sqtd->qtd.qtd_status);
692 if (nstatus & EHCI_QTD_ACTIVE)
693 break;
694
695 status = nstatus;
696 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
697 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
698 }
699
700 /* If there are left over TDs we need to update the toggle. */
701 if (sqtd != NULL) {
702 printf("ehci_idone: need toggle update\n");
703 #if 0
704 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
705 #endif
706 }
707
708 status &= EHCI_QTD_STATERRS;
709 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
710 xfer->length, actlen, status));
711 xfer->actlen = actlen;
712 if (status != 0) {
713 #ifdef EHCI_DEBUG
714 char sbuf[128];
715
716 bitmask_snprintf((u_int32_t)status,
717 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
718 "\7HALTED",
719 sbuf, sizeof(sbuf));
720
721 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
722 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
723 "status 0x%s\n",
724 xfer->pipe->device->address,
725 xfer->pipe->endpoint->edesc->bEndpointAddress,
726 sbuf));
727 if (ehcidebug > 2) {
728 ehci_dump_sqh(epipe->sqh);
729 ehci_dump_sqtds(ex->sqtdstart);
730 }
731 #endif
732 if (status == EHCI_QTD_HALTED)
733 xfer->status = USBD_STALLED;
734 else
735 xfer->status = USBD_IOERROR; /* more info XXX */
736 } else {
737 xfer->status = USBD_NORMAL_COMPLETION;
738 }
739
740 usb_transfer_complete(xfer);
741 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
742 }
743
744 /*
745 * Wait here until controller claims to have an interrupt.
746 * Then call ehci_intr and return. Use timeout to avoid waiting
747 * too long.
748 */
749 void
750 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
751 {
752 int timo = xfer->timeout;
753 int usecs;
754 u_int32_t intrs;
755
756 xfer->status = USBD_IN_PROGRESS;
757 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
758 usb_delay_ms(&sc->sc_bus, 1);
759 if (sc->sc_dying)
760 break;
761 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
762 sc->sc_eintrs;
763 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
764 #ifdef OHCI_DEBUG
765 if (ehcidebug > 15)
766 ehci_dump_regs(sc);
767 #endif
768 if (intrs) {
769 ehci_intr1(sc);
770 if (xfer->status != USBD_IN_PROGRESS)
771 return;
772 }
773 }
774
775 /* Timeout */
776 DPRINTF(("ehci_waitintr: timeout\n"));
777 xfer->status = USBD_TIMEOUT;
778 usb_transfer_complete(xfer);
779 /* XXX should free TD */
780 }
781
782 void
783 ehci_poll(struct usbd_bus *bus)
784 {
785 ehci_softc_t *sc = (ehci_softc_t *)bus;
786 #ifdef EHCI_DEBUG
787 static int last;
788 int new;
789 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
790 if (new != last) {
791 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
792 last = new;
793 }
794 #endif
795
796 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
797 ehci_intr1(sc);
798 }
799
800 int
801 ehci_detach(struct ehci_softc *sc, int flags)
802 {
803 int rv = 0;
804
805 if (sc->sc_child != NULL)
806 rv = config_detach(sc->sc_child, flags);
807
808 if (rv != 0)
809 return (rv);
810
811 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
812
813 if (sc->sc_powerhook != NULL)
814 powerhook_disestablish(sc->sc_powerhook);
815 if (sc->sc_shutdownhook != NULL)
816 shutdownhook_disestablish(sc->sc_shutdownhook);
817
818 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
819
820 /* XXX free other data structures XXX */
821
822 return (rv);
823 }
824
825
826 int
827 ehci_activate(device_ptr_t self, enum devact act)
828 {
829 struct ehci_softc *sc = (struct ehci_softc *)self;
830 int rv = 0;
831
832 switch (act) {
833 case DVACT_ACTIVATE:
834 return (EOPNOTSUPP);
835 break;
836
837 case DVACT_DEACTIVATE:
838 if (sc->sc_child != NULL)
839 rv = config_deactivate(sc->sc_child);
840 sc->sc_dying = 1;
841 break;
842 }
843 return (rv);
844 }
845
846 /*
847 * Handle suspend/resume.
848 *
849 * We need to switch to polling mode here, because this routine is
850 * called from an intterupt context. This is all right since we
851 * are almost suspended anyway.
852 */
853 void
854 ehci_power(int why, void *v)
855 {
856 ehci_softc_t *sc = v;
857 //u_int32_t ctl;
858 int s;
859
860 #ifdef EHCI_DEBUG
861 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
862 ehci_dump_regs(sc);
863 #endif
864
865 s = splhardusb();
866 switch (why) {
867 case PWR_SUSPEND:
868 case PWR_STANDBY:
869 sc->sc_bus.use_polling++;
870 #if 0
871 OOO
872 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
873 if (sc->sc_control == 0) {
874 /*
875 * Preserve register values, in case that APM BIOS
876 * does not recover them.
877 */
878 sc->sc_control = ctl;
879 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
880 }
881 ctl |= EHCI_HCFS_SUSPEND;
882 OWRITE4(sc, EHCI_CONTROL, ctl);
883 #endif
884 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
885 sc->sc_bus.use_polling--;
886 break;
887 case PWR_RESUME:
888 sc->sc_bus.use_polling++;
889 #if 0
890 OOO
891 /* Some broken BIOSes do not recover these values */
892 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
893 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
894 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
895 if (sc->sc_intre)
896 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
897 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
898 if (sc->sc_control)
899 ctl = sc->sc_control;
900 else
901 ctl = OREAD4(sc, EHCI_CONTROL);
902 ctl |= EHCI_HCFS_RESUME;
903 OWRITE4(sc, EHCI_CONTROL, ctl);
904 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
905 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
906 OWRITE4(sc, EHCI_CONTROL, ctl);
907 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
908 sc->sc_control = sc->sc_intre = 0;
909 #endif
910 sc->sc_bus.use_polling--;
911 break;
912 case PWR_SOFTSUSPEND:
913 case PWR_SOFTSTANDBY:
914 case PWR_SOFTRESUME:
915 break;
916 }
917 splx(s);
918 }
919
920 /*
921 * Shut down the controller when the system is going down.
922 */
923 void
924 ehci_shutdown(void *v)
925 {
926 ehci_softc_t *sc = v;
927
928 DPRINTF(("ehci_shutdown: stopping the HC\n"));
929 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
930 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
931 }
932
933 usbd_status
934 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
935 {
936 struct ehci_softc *sc = (struct ehci_softc *)bus;
937
938 return (usb_allocmem(&sc->sc_bus, size, 0, dma));
939 }
940
941 void
942 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
943 {
944 struct ehci_softc *sc = (struct ehci_softc *)bus;
945
946 usb_freemem(&sc->sc_bus, dma);
947 }
948
949 usbd_xfer_handle
950 ehci_allocx(struct usbd_bus *bus)
951 {
952 struct ehci_softc *sc = (struct ehci_softc *)bus;
953 usbd_xfer_handle xfer;
954
955 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
956 if (xfer != NULL)
957 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
958 else
959 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
960 if (xfer != NULL) {
961 memset(xfer, 0, sizeof (struct ehci_xfer));
962 #ifdef DIAGNOSTIC
963 EXFER(xfer)->isdone = 1;
964 xfer->busy_free = XFER_BUSY;
965 #endif
966 }
967 return (xfer);
968 }
969
970 void
971 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
972 {
973 struct ehci_softc *sc = (struct ehci_softc *)bus;
974
975 #ifdef DIAGNOSTIC
976 if (xfer->busy_free != XFER_BUSY) {
977 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
978 xfer->busy_free);
979 return;
980 }
981 xfer->busy_free = XFER_FREE;
982 if (!EXFER(xfer)->isdone) {
983 printf("ehci_freex: !isdone\n");
984 return;
985 }
986 #endif
987 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
988 }
989
990 Static void
991 ehci_device_clear_toggle(usbd_pipe_handle pipe)
992 {
993 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
994
995 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
996 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
997 #ifdef USB_DEBUG
998 if (ehcidebug)
999 usbd_dump_pipe(pipe);
1000 #endif
1001 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
1002 }
1003
1004 Static void
1005 ehci_noop(usbd_pipe_handle pipe)
1006 {
1007 }
1008
1009 #ifdef EHCI_DEBUG
1010 void
1011 ehci_dump_regs(ehci_softc_t *sc)
1012 {
1013 int i;
1014 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1015 EOREAD4(sc, EHCI_USBCMD),
1016 EOREAD4(sc, EHCI_USBSTS),
1017 EOREAD4(sc, EHCI_USBINTR));
1018 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1019 EOREAD4(sc, EHCI_FRINDEX),
1020 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1021 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1022 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1023 for (i = 1; i <= sc->sc_noport; i++)
1024 printf("port %d status=0x%08x\n", i,
1025 EOREAD4(sc, EHCI_PORTSC(i)));
1026 }
1027
1028 void
1029 ehci_dump()
1030 {
1031 ehci_dump_regs(theehci);
1032 }
1033
1034 void
1035 ehci_dump_link(ehci_link_t link, int type)
1036 {
1037 link = le32toh(link);
1038 printf("0x%08x", link);
1039 if (link & EHCI_LINK_TERMINATE)
1040 printf("<T>");
1041 else {
1042 printf("<");
1043 if (type) {
1044 switch (EHCI_LINK_TYPE(link)) {
1045 case EHCI_LINK_ITD: printf("ITD"); break;
1046 case EHCI_LINK_QH: printf("QH"); break;
1047 case EHCI_LINK_SITD: printf("SITD"); break;
1048 case EHCI_LINK_FSTN: printf("FSTN"); break;
1049 }
1050 }
1051 printf(">");
1052 }
1053 }
1054
1055 void
1056 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1057 {
1058 for (; sqtd; sqtd = sqtd->nextqtd)
1059 ehci_dump_sqtd(sqtd);
1060 }
1061
1062 void
1063 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1064 {
1065 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1066 ehci_dump_qtd(&sqtd->qtd);
1067 }
1068
1069 void
1070 ehci_dump_qtd(ehci_qtd_t *qtd)
1071 {
1072 u_int32_t s;
1073 char sbuf[128];
1074
1075 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1076 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1077 printf("\n");
1078 s = le32toh(qtd->qtd_status);
1079 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1080 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1081 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1082 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1083 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1084 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1085 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1086 EHCI_QTD_GET_PID(s), sbuf);
1087 for (s = 0; s < 5; s++)
1088 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1089 }
1090
1091 void
1092 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1093 {
1094 ehci_qh_t *qh = &sqh->qh;
1095 u_int32_t endp, endphub;
1096
1097 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1098 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1099 endp = le32toh(qh->qh_endp);
1100 printf(" endp=0x%08x\n", endp);
1101 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1102 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1103 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1104 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1105 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1106 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1107 EHCI_QH_GET_NRL(endp));
1108 endphub = le32toh(qh->qh_endphub);
1109 printf(" endphub=0x%08x\n", endphub);
1110 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1111 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1112 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1113 EHCI_QH_GET_MULT(endphub));
1114 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1115 printf("Overlay qTD:\n");
1116 ehci_dump_qtd(&qh->qh_qtd);
1117 }
1118
1119 Static void
1120 ehci_dump_exfer(struct ehci_xfer *ex)
1121 {
1122 printf("ehci_dump_exfer: ex=%p\n", ex);
1123 }
1124 #endif
1125
1126 usbd_status
1127 ehci_open(usbd_pipe_handle pipe)
1128 {
1129 usbd_device_handle dev = pipe->device;
1130 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1131 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1132 u_int8_t addr = dev->address;
1133 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1134 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1135 ehci_soft_qh_t *sqh;
1136 usbd_status err;
1137 int s;
1138 int speed, naks;
1139
1140 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1141 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1142
1143 if (sc->sc_dying)
1144 return (USBD_IOERROR);
1145
1146 if (addr == sc->sc_addr) {
1147 switch (ed->bEndpointAddress) {
1148 case USB_CONTROL_ENDPOINT:
1149 pipe->methods = &ehci_root_ctrl_methods;
1150 break;
1151 case UE_DIR_IN | EHCI_INTR_ENDPT:
1152 pipe->methods = &ehci_root_intr_methods;
1153 break;
1154 default:
1155 return (USBD_INVAL);
1156 }
1157 return (USBD_NORMAL_COMPLETION);
1158 }
1159
1160 /* XXX All this stuff is only valid for async. */
1161 switch (dev->speed) {
1162 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1163 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1164 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1165 default: panic("ehci_open: bad device speed %d\n", dev->speed);
1166 }
1167 naks = 8; /* XXX */
1168 sqh = ehci_alloc_sqh(sc);
1169 if (sqh == NULL)
1170 goto bad0;
1171 /* qh_link filled when the QH is added */
1172 sqh->qh.qh_endp = htole32(
1173 EHCI_QH_SET_ADDR(addr) |
1174 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1175 EHCI_QH_SET_EPS(speed) | /* XXX */
1176 /* XXX EHCI_QH_DTC ? */
1177 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1178 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1179 EHCI_QH_CTL : 0) |
1180 EHCI_QH_SET_NRL(naks)
1181 );
1182 sqh->qh.qh_endphub = htole32(
1183 EHCI_QH_SET_MULT(1)
1184 /* XXX TT stuff */
1185 /* XXX interrupt mask */
1186 );
1187 sqh->qh.qh_curqtd = EHCI_NULL;
1188 /* Fill the overlay qTD */
1189 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1190 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1191 sqh->qh.qh_qtd.qtd_status = htole32(0);
1192
1193 epipe->sqh = sqh;
1194
1195 switch (xfertype) {
1196 case UE_CONTROL:
1197 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1198 0, &epipe->u.ctl.reqdma);
1199 if (err)
1200 goto bad1;
1201 pipe->methods = &ehci_device_ctrl_methods;
1202 s = splusb();
1203 ehci_add_qh(sqh, sc->sc_async_head);
1204 splx(s);
1205 break;
1206 case UE_BULK:
1207 pipe->methods = &ehci_device_bulk_methods;
1208 s = splusb();
1209 ehci_add_qh(sqh, sc->sc_async_head);
1210 splx(s);
1211 break;
1212 case UE_INTERRUPT:
1213 pipe->methods = &ehci_device_intr_methods;
1214 return (USBD_INVAL);
1215 case UE_ISOCHRONOUS:
1216 pipe->methods = &ehci_device_isoc_methods;
1217 return (USBD_INVAL);
1218 default:
1219 return (USBD_INVAL);
1220 }
1221 return (USBD_NORMAL_COMPLETION);
1222
1223 bad1:
1224 ehci_free_sqh(sc, sqh);
1225 bad0:
1226 return (USBD_NOMEM);
1227 }
1228
1229 /*
1230 * Add an ED to the schedule. Called at splusb().
1231 */
1232 void
1233 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1234 {
1235 SPLUSBCHECK;
1236
1237 sqh->next = head->next;
1238 sqh->qh.qh_link = head->qh.qh_link;
1239 head->next = sqh;
1240 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1241
1242 #ifdef EHCI_DEBUG
1243 if (ehcidebug > 5) {
1244 printf("ehci_add_qh:\n");
1245 ehci_dump_sqh(sqh);
1246 }
1247 #endif
1248 }
1249
1250 /*
1251 * Remove an ED from the schedule. Called at splusb().
1252 */
1253 void
1254 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1255 {
1256 ehci_soft_qh_t *p;
1257
1258 SPLUSBCHECK;
1259 /* XXX */
1260 for (p = head; p == NULL && p->next != sqh; p = p->next)
1261 ;
1262 if (p == NULL)
1263 panic("ehci_rem_qh: ED not found\n");
1264 p->next = sqh->next;
1265 p->qh.qh_link = sqh->qh.qh_link;
1266
1267 ehci_sync_hc(sc);
1268 }
1269
1270 void
1271 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1272 {
1273 /* Halt while we are messing. */
1274 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1275 sqh->qh.qh_curqtd = 0;
1276 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1277 sqh->sqtd = sqtd;
1278 /* Keep toggle, clear the rest, including length. */
1279 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
1280 }
1281
1282 /*
1283 * Ensure that the HC has released all references to the QH. We do this
1284 * by asking for a Async Advance Doorbell interrupt and then we wait for
1285 * the interrupt.
1286 * To make this easier we first obtain exclusive use of the doorbell.
1287 */
1288 void
1289 ehci_sync_hc(ehci_softc_t *sc)
1290 {
1291 int s, error;
1292
1293 if (sc->sc_dying) {
1294 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1295 return;
1296 }
1297 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1298 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1299 s = splhardusb();
1300 /* ask for doorbell */
1301 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1302 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1303 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1304 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1305 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1306 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1307 splx(s);
1308 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1309 #ifdef DIAGNOSTIC
1310 if (error)
1311 printf("ehci_sync_hc: tsleep() = %d\n", error);
1312 #endif
1313 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1314 }
1315
1316 /***********/
1317
1318 /*
1319 * Data structures and routines to emulate the root hub.
1320 */
1321 Static usb_device_descriptor_t ehci_devd = {
1322 USB_DEVICE_DESCRIPTOR_SIZE,
1323 UDESC_DEVICE, /* type */
1324 {0x00, 0x02}, /* USB version */
1325 UDCLASS_HUB, /* class */
1326 UDSUBCLASS_HUB, /* subclass */
1327 UDPROTO_HSHUBSTT, /* protocol */
1328 64, /* max packet */
1329 {0},{0},{0x00,0x01}, /* device id */
1330 1,2,0, /* string indicies */
1331 1 /* # of configurations */
1332 };
1333
1334 Static usb_device_qualifier_t ehci_odevd = {
1335 USB_DEVICE_DESCRIPTOR_SIZE,
1336 UDESC_DEVICE_QUALIFIER, /* type */
1337 {0x00, 0x02}, /* USB version */
1338 UDCLASS_HUB, /* class */
1339 UDSUBCLASS_HUB, /* subclass */
1340 UDPROTO_FSHUB, /* protocol */
1341 64, /* max packet */
1342 1, /* # of configurations */
1343 0
1344 };
1345
1346 Static usb_config_descriptor_t ehci_confd = {
1347 USB_CONFIG_DESCRIPTOR_SIZE,
1348 UDESC_CONFIG,
1349 {USB_CONFIG_DESCRIPTOR_SIZE +
1350 USB_INTERFACE_DESCRIPTOR_SIZE +
1351 USB_ENDPOINT_DESCRIPTOR_SIZE},
1352 1,
1353 1,
1354 0,
1355 UC_SELF_POWERED,
1356 0 /* max power */
1357 };
1358
1359 Static usb_interface_descriptor_t ehci_ifcd = {
1360 USB_INTERFACE_DESCRIPTOR_SIZE,
1361 UDESC_INTERFACE,
1362 0,
1363 0,
1364 1,
1365 UICLASS_HUB,
1366 UISUBCLASS_HUB,
1367 UIPROTO_HSHUBSTT,
1368 0
1369 };
1370
1371 Static usb_endpoint_descriptor_t ehci_endpd = {
1372 USB_ENDPOINT_DESCRIPTOR_SIZE,
1373 UDESC_ENDPOINT,
1374 UE_DIR_IN | EHCI_INTR_ENDPT,
1375 UE_INTERRUPT,
1376 {8, 0}, /* max packet */
1377 255
1378 };
1379
1380 Static usb_hub_descriptor_t ehci_hubd = {
1381 USB_HUB_DESCRIPTOR_SIZE,
1382 UDESC_HUB,
1383 0,
1384 {0,0},
1385 0,
1386 0,
1387 {0},
1388 };
1389
1390 Static int
1391 ehci_str(p, l, s)
1392 usb_string_descriptor_t *p;
1393 int l;
1394 char *s;
1395 {
1396 int i;
1397
1398 if (l == 0)
1399 return (0);
1400 p->bLength = 2 * strlen(s) + 2;
1401 if (l == 1)
1402 return (1);
1403 p->bDescriptorType = UDESC_STRING;
1404 l -= 2;
1405 for (i = 0; s[i] && l > 1; i++, l -= 2)
1406 USETW2(p->bString[i], 0, s[i]);
1407 return (2*i+2);
1408 }
1409
1410 /*
1411 * Simulate a hardware hub by handling all the necessary requests.
1412 */
1413 Static usbd_status
1414 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1415 {
1416 usbd_status err;
1417
1418 /* Insert last in queue. */
1419 err = usb_insert_transfer(xfer);
1420 if (err)
1421 return (err);
1422
1423 /* Pipe isn't running, start first */
1424 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1425 }
1426
1427 Static usbd_status
1428 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1429 {
1430 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1431 usb_device_request_t *req;
1432 void *buf = NULL;
1433 int port, i;
1434 int s, len, value, index, l, totlen = 0;
1435 usb_port_status_t ps;
1436 usb_hub_descriptor_t hubd;
1437 usbd_status err;
1438 u_int32_t v;
1439
1440 if (sc->sc_dying)
1441 return (USBD_IOERROR);
1442
1443 #ifdef DIAGNOSTIC
1444 if (!(xfer->rqflags & URQ_REQUEST))
1445 /* XXX panic */
1446 return (USBD_INVAL);
1447 #endif
1448 req = &xfer->request;
1449
1450 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1451 req->bmRequestType, req->bRequest));
1452
1453 len = UGETW(req->wLength);
1454 value = UGETW(req->wValue);
1455 index = UGETW(req->wIndex);
1456
1457 if (len != 0)
1458 buf = KERNADDR(&xfer->dmabuf);
1459
1460 #define C(x,y) ((x) | ((y) << 8))
1461 switch(C(req->bRequest, req->bmRequestType)) {
1462 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1463 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1464 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1465 /*
1466 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1467 * for the integrated root hub.
1468 */
1469 break;
1470 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1471 if (len > 0) {
1472 *(u_int8_t *)buf = sc->sc_conf;
1473 totlen = 1;
1474 }
1475 break;
1476 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1477 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1478 switch(value >> 8) {
1479 case UDESC_DEVICE:
1480 if ((value & 0xff) != 0) {
1481 err = USBD_IOERROR;
1482 goto ret;
1483 }
1484 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1485 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1486 memcpy(buf, &ehci_devd, l);
1487 break;
1488 /*
1489 * We can't really operate at another speed, but the spec says
1490 * we need this descriptor.
1491 */
1492 case UDESC_DEVICE_QUALIFIER:
1493 if ((value & 0xff) != 0) {
1494 err = USBD_IOERROR;
1495 goto ret;
1496 }
1497 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1498 memcpy(buf, &ehci_odevd, l);
1499 break;
1500 /*
1501 * We can't really operate at another speed, but the spec says
1502 * we need this descriptor.
1503 */
1504 case UDESC_OTHER_SPEED_CONFIGURATION:
1505 case UDESC_CONFIG:
1506 if ((value & 0xff) != 0) {
1507 err = USBD_IOERROR;
1508 goto ret;
1509 }
1510 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1511 memcpy(buf, &ehci_confd, l);
1512 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1513 value >> 8;
1514 buf = (char *)buf + l;
1515 len -= l;
1516 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1517 totlen += l;
1518 memcpy(buf, &ehci_ifcd, l);
1519 buf = (char *)buf + l;
1520 len -= l;
1521 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1522 totlen += l;
1523 memcpy(buf, &ehci_endpd, l);
1524 break;
1525 case UDESC_STRING:
1526 if (len == 0)
1527 break;
1528 *(u_int8_t *)buf = 0;
1529 totlen = 1;
1530 switch (value & 0xff) {
1531 case 1: /* Vendor */
1532 totlen = ehci_str(buf, len, sc->sc_vendor);
1533 break;
1534 case 2: /* Product */
1535 totlen = ehci_str(buf, len, "EHCI root hub");
1536 break;
1537 }
1538 break;
1539 default:
1540 err = USBD_IOERROR;
1541 goto ret;
1542 }
1543 break;
1544 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1545 if (len > 0) {
1546 *(u_int8_t *)buf = 0;
1547 totlen = 1;
1548 }
1549 break;
1550 case C(UR_GET_STATUS, UT_READ_DEVICE):
1551 if (len > 1) {
1552 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1553 totlen = 2;
1554 }
1555 break;
1556 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1557 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1558 if (len > 1) {
1559 USETW(((usb_status_t *)buf)->wStatus, 0);
1560 totlen = 2;
1561 }
1562 break;
1563 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1564 if (value >= USB_MAX_DEVICES) {
1565 err = USBD_IOERROR;
1566 goto ret;
1567 }
1568 sc->sc_addr = value;
1569 break;
1570 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1571 if (value != 0 && value != 1) {
1572 err = USBD_IOERROR;
1573 goto ret;
1574 }
1575 sc->sc_conf = value;
1576 break;
1577 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1578 break;
1579 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1580 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1581 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1582 err = USBD_IOERROR;
1583 goto ret;
1584 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1585 break;
1586 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1587 break;
1588 /* Hub requests */
1589 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1590 break;
1591 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1592 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1593 "port=%d feature=%d\n",
1594 index, value));
1595 if (index < 1 || index > sc->sc_noport) {
1596 err = USBD_IOERROR;
1597 goto ret;
1598 }
1599 port = EHCI_PORTSC(index);
1600 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1601 switch(value) {
1602 case UHF_PORT_ENABLE:
1603 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1604 break;
1605 case UHF_PORT_SUSPEND:
1606 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1607 break;
1608 case UHF_PORT_POWER:
1609 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1610 break;
1611 case UHF_PORT_TEST:
1612 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1613 "%d\n", index));
1614 break;
1615 case UHF_PORT_INDICATOR:
1616 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1617 "%d\n", index));
1618 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1619 break;
1620 case UHF_C_PORT_CONNECTION:
1621 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1622 break;
1623 case UHF_C_PORT_ENABLE:
1624 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1625 break;
1626 case UHF_C_PORT_SUSPEND:
1627 /* how? */
1628 break;
1629 case UHF_C_PORT_OVER_CURRENT:
1630 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1631 break;
1632 case UHF_C_PORT_RESET:
1633 sc->sc_isreset = 0;
1634 break;
1635 default:
1636 err = USBD_IOERROR;
1637 goto ret;
1638 }
1639 #if 0
1640 switch(value) {
1641 case UHF_C_PORT_CONNECTION:
1642 case UHF_C_PORT_ENABLE:
1643 case UHF_C_PORT_SUSPEND:
1644 case UHF_C_PORT_OVER_CURRENT:
1645 case UHF_C_PORT_RESET:
1646 /* Enable RHSC interrupt if condition is cleared. */
1647 if ((OREAD4(sc, port) >> 16) == 0)
1648 ehci_pcd_able(sc, 1);
1649 break;
1650 default:
1651 break;
1652 }
1653 #endif
1654 break;
1655 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1656 if (value != 0) {
1657 err = USBD_IOERROR;
1658 goto ret;
1659 }
1660 hubd = ehci_hubd;
1661 hubd.bNbrPorts = sc->sc_noport;
1662 v = EOREAD4(sc, EHCI_HCSPARAMS);
1663 USETW(hubd.wHubCharacteristics,
1664 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1665 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1666 ? UHD_PORT_IND : 0);
1667 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1668 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1669 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1670 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1671 l = min(len, hubd.bDescLength);
1672 totlen = l;
1673 memcpy(buf, &hubd, l);
1674 break;
1675 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1676 if (len != 4) {
1677 err = USBD_IOERROR;
1678 goto ret;
1679 }
1680 memset(buf, 0, len); /* ? XXX */
1681 totlen = len;
1682 break;
1683 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1684 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1685 index));
1686 if (index < 1 || index > sc->sc_noport) {
1687 err = USBD_IOERROR;
1688 goto ret;
1689 }
1690 if (len != 4) {
1691 err = USBD_IOERROR;
1692 goto ret;
1693 }
1694 v = EOREAD4(sc, EHCI_PORTSC(index));
1695 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1696 v));
1697 i = UPS_HIGH_SPEED;
1698 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1699 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1700 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1701 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1702 if (v & EHCI_PS_PR) i |= UPS_RESET;
1703 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1704 USETW(ps.wPortStatus, i);
1705 i = 0;
1706 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1707 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1708 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1709 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1710 USETW(ps.wPortChange, i);
1711 l = min(len, sizeof ps);
1712 memcpy(buf, &ps, l);
1713 totlen = l;
1714 break;
1715 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1716 err = USBD_IOERROR;
1717 goto ret;
1718 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1719 break;
1720 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1721 if (index < 1 || index > sc->sc_noport) {
1722 err = USBD_IOERROR;
1723 goto ret;
1724 }
1725 port = EHCI_PORTSC(index);
1726 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1727 switch(value) {
1728 case UHF_PORT_ENABLE:
1729 EOWRITE4(sc, port, v | EHCI_PS_PE);
1730 break;
1731 case UHF_PORT_SUSPEND:
1732 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1733 break;
1734 case UHF_PORT_RESET:
1735 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1736 index));
1737 if (EHCI_PS_IS_LOWSPEED(v)) {
1738 /* Low speed device, give up ownership. */
1739 ehci_disown(sc, index, 1);
1740 break;
1741 }
1742 /* Start reset sequence. */
1743 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1744 EOWRITE4(sc, port, v | EHCI_PS_PR);
1745 /* Wait for reset to complete. */
1746 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1747 if (sc->sc_dying) {
1748 err = USBD_IOERROR;
1749 goto ret;
1750 }
1751 /* Terminate reset sequence. */
1752 EOWRITE4(sc, port, v);
1753 /* Wait for HC to complete reset. */
1754 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1755 if (sc->sc_dying) {
1756 err = USBD_IOERROR;
1757 goto ret;
1758 }
1759 v = EOREAD4(sc, port);
1760 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1761 if (v & EHCI_PS_PR) {
1762 printf("%s: port reset timeout\n",
1763 USBDEVNAME(sc->sc_bus.bdev));
1764 return (USBD_TIMEOUT);
1765 }
1766 if (!(v & EHCI_PS_PE)) {
1767 /* Not a high speed device, give up ownership.*/
1768 ehci_disown(sc, index, 0);
1769 break;
1770 }
1771 sc->sc_isreset = 1;
1772 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1773 index, v));
1774 break;
1775 case UHF_PORT_POWER:
1776 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1777 "%d\n", index));
1778 EOWRITE4(sc, port, v | EHCI_PS_PP);
1779 break;
1780 case UHF_PORT_TEST:
1781 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1782 "%d\n", index));
1783 break;
1784 case UHF_PORT_INDICATOR:
1785 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1786 "%d\n", index));
1787 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1788 break;
1789 default:
1790 err = USBD_IOERROR;
1791 goto ret;
1792 }
1793 break;
1794 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1795 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1796 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1797 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1798 break;
1799 default:
1800 err = USBD_IOERROR;
1801 goto ret;
1802 }
1803 xfer->actlen = totlen;
1804 err = USBD_NORMAL_COMPLETION;
1805 ret:
1806 xfer->status = err;
1807 s = splusb();
1808 usb_transfer_complete(xfer);
1809 splx(s);
1810 return (USBD_IN_PROGRESS);
1811 }
1812
1813 void
1814 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1815 {
1816 int port;
1817 u_int32_t v;
1818
1819 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1820 #ifdef DIAGNOSTIC
1821 if (sc->sc_npcomp != 0) {
1822 int i = (index-1) / sc->sc_npcomp;
1823 if (i >= sc->sc_ncomp)
1824 printf("%s: strange port\n",
1825 USBDEVNAME(sc->sc_bus.bdev));
1826 else
1827 printf("%s: handing over %s speed device on "
1828 "port %d to %s\n",
1829 USBDEVNAME(sc->sc_bus.bdev),
1830 lowspeed ? "low" : "full",
1831 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1832 } else {
1833 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1834 }
1835 #endif
1836 port = EHCI_PORTSC(index);
1837 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1838 EOWRITE4(sc, port, v | EHCI_PS_PO);
1839 }
1840
1841 /* Abort a root control request. */
1842 Static void
1843 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1844 {
1845 /* Nothing to do, all transfers are synchronous. */
1846 }
1847
1848 /* Close the root pipe. */
1849 Static void
1850 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1851 {
1852 DPRINTF(("ehci_root_ctrl_close\n"));
1853 /* Nothing to do. */
1854 }
1855
1856 void
1857 ehci_root_intr_done(usbd_xfer_handle xfer)
1858 {
1859 xfer->hcpriv = NULL;
1860 }
1861
1862 Static usbd_status
1863 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1864 {
1865 usbd_status err;
1866
1867 /* Insert last in queue. */
1868 err = usb_insert_transfer(xfer);
1869 if (err)
1870 return (err);
1871
1872 /* Pipe isn't running, start first */
1873 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1874 }
1875
1876 Static usbd_status
1877 ehci_root_intr_start(usbd_xfer_handle xfer)
1878 {
1879 usbd_pipe_handle pipe = xfer->pipe;
1880 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1881
1882 if (sc->sc_dying)
1883 return (USBD_IOERROR);
1884
1885 sc->sc_intrxfer = xfer;
1886
1887 return (USBD_IN_PROGRESS);
1888 }
1889
1890 /* Abort a root interrupt request. */
1891 Static void
1892 ehci_root_intr_abort(usbd_xfer_handle xfer)
1893 {
1894 int s;
1895
1896 if (xfer->pipe->intrxfer == xfer) {
1897 DPRINTF(("ehci_root_intr_abort: remove\n"));
1898 xfer->pipe->intrxfer = NULL;
1899 }
1900 xfer->status = USBD_CANCELLED;
1901 s = splusb();
1902 usb_transfer_complete(xfer);
1903 splx(s);
1904 }
1905
1906 /* Close the root pipe. */
1907 Static void
1908 ehci_root_intr_close(usbd_pipe_handle pipe)
1909 {
1910 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1911
1912 DPRINTF(("ehci_root_intr_close\n"));
1913
1914 sc->sc_intrxfer = NULL;
1915 }
1916
1917 void
1918 ehci_root_ctrl_done(usbd_xfer_handle xfer)
1919 {
1920 xfer->hcpriv = NULL;
1921 }
1922
1923 /************************/
1924
1925 ehci_soft_qh_t *
1926 ehci_alloc_sqh(ehci_softc_t *sc)
1927 {
1928 ehci_soft_qh_t *sqh;
1929 usbd_status err;
1930 int i, offs;
1931 usb_dma_t dma;
1932
1933 if (sc->sc_freeqhs == NULL) {
1934 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1935 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1936 EHCI_PAGE_SIZE, &dma);
1937 if (err)
1938 return (NULL);
1939 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1940 offs = i * EHCI_SQH_SIZE;
1941 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1942 sqh->physaddr = DMAADDR(&dma) + offs;
1943 sqh->next = sc->sc_freeqhs;
1944 sc->sc_freeqhs = sqh;
1945 }
1946 }
1947 sqh = sc->sc_freeqhs;
1948 sc->sc_freeqhs = sqh->next;
1949 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1950 sqh->next = NULL;
1951 return (sqh);
1952 }
1953
1954 void
1955 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1956 {
1957 sqh->next = sc->sc_freeqhs;
1958 sc->sc_freeqhs = sqh;
1959 }
1960
1961 ehci_soft_qtd_t *
1962 ehci_alloc_sqtd(ehci_softc_t *sc)
1963 {
1964 ehci_soft_qtd_t *sqtd;
1965 usbd_status err;
1966 int i, offs;
1967 usb_dma_t dma;
1968 int s;
1969
1970 if (sc->sc_freeqtds == NULL) {
1971 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1972 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1973 EHCI_PAGE_SIZE, &dma);
1974 if (err)
1975 return (NULL);
1976 s = splusb();
1977 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1978 offs = i * EHCI_SQTD_SIZE;
1979 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1980 sqtd->physaddr = DMAADDR(&dma) + offs;
1981 sqtd->nextqtd = sc->sc_freeqtds;
1982 sc->sc_freeqtds = sqtd;
1983 }
1984 splx(s);
1985 }
1986
1987 s = splusb();
1988 sqtd = sc->sc_freeqtds;
1989 sc->sc_freeqtds = sqtd->nextqtd;
1990 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1991 sqtd->nextqtd = NULL;
1992 sqtd->xfer = NULL;
1993 splx(s);
1994
1995 return (sqtd);
1996 }
1997
1998 void
1999 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2000 {
2001 int s;
2002
2003 s = splusb();
2004 sqtd->nextqtd = sc->sc_freeqtds;
2005 sc->sc_freeqtds = sqtd;
2006 splx(s);
2007 }
2008
2009 usbd_status
2010 ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2011 int alen, int rd, usbd_xfer_handle xfer,
2012 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2013 {
2014 ehci_soft_qtd_t *next, *cur;
2015 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2016 u_int32_t qtdstatus;
2017 int len, curlen;
2018 int i;
2019 usb_dma_t *dma = &xfer->dmabuf;
2020
2021 DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen));
2022
2023 len = alen;
2024 dataphys = DMAADDR(dma);
2025 dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2026 qtdstatus = htole32(
2027 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2028 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2029 EHCI_QTD_SET_CERR(3)
2030 /* IOC set below */
2031 /* BYTES set below */
2032 /* XXX Data toggle */
2033 );
2034
2035 cur = ehci_alloc_sqtd(sc);
2036 if (cur == NULL)
2037 goto nomem;
2038 *sp = cur;
2039 for (;;) {
2040 dataphyspage = EHCI_PAGE(dataphys);
2041 /* The EHCI hardware can handle at most 4 page crossings. */
2042 if (dataphyslastpage - dataphyspage < EHCI_QTD_NBUFFERS) {
2043 /* we can handle it in this QTD */
2044 curlen = len;
2045 } else {
2046 DPRINTF(("ehci_alloc_std_chain: multiple QTDs\n"));
2047
2048 /* must use multiple TDs, fill as much as possible. */
2049 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2050 EHCI_PAGE_OFFSET(dataphys);
2051
2052 /* XXX true for EHCI? */
2053 /* the length must be a multiple of the max size */
2054 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2055 #ifdef DIAGNOSTIC
2056 if (curlen == 0)
2057 panic("ehci_alloc_std: curlen == 0\n");
2058 #endif
2059 }
2060 DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x "
2061 "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2062 dataphys, dataphyslastpage,
2063 len, curlen));
2064 len -= curlen;
2065
2066 if (len != 0) {
2067 next = ehci_alloc_sqtd(sc);
2068 if (next == NULL)
2069 goto nomem;
2070 nextphys = next->physaddr;
2071 } else {
2072 next = NULL;
2073 nextphys = EHCI_NULL;
2074 }
2075
2076 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2077 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2078 if (i != 0) /* use offset only in first buffer */
2079 a = EHCI_PAGE(a);
2080 cur->qtd.qtd_buffer[i] = htole32(a);
2081 }
2082 cur->nextqtd = next;
2083 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2084 cur->qtd.qtd_status =
2085 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2086 cur->xfer = xfer;
2087 cur->len = curlen;
2088 DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
2089 dataphys, dataphys + curlen - 1));
2090 if (len == 0)
2091 break;
2092 DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n"));
2093 dataphys += curlen;
2094 cur = next;
2095 }
2096 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2097 *ep = cur;
2098
2099 return (USBD_NORMAL_COMPLETION);
2100
2101 nomem:
2102 /* XXX free chain */
2103 return (USBD_NOMEM);
2104 }
2105
2106 Static void
2107 ehci_free_std_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2108 ehci_soft_qtd_t *sqtdend)
2109 {
2110 ehci_soft_qtd_t *p;
2111
2112 for (; sqtd != sqtdend; sqtd = p) {
2113 p = sqtd->nextqtd;
2114 ehci_free_sqtd(sc, sqtd);
2115 }
2116 }
2117
2118 /****************/
2119
2120 /*
2121 * Close a reqular pipe.
2122 * Assumes that there are no pending transactions.
2123 */
2124 void
2125 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2126 {
2127 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2128 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2129 ehci_soft_qh_t *sqh = epipe->sqh;
2130 int s;
2131
2132 s = splusb();
2133 ehci_rem_qh(sc, sqh, head);
2134 splx(s);
2135 ehci_free_sqh(sc, epipe->sqh);
2136 }
2137
2138 /*
2139 * Abort a device request.
2140 * If this routine is called at splusb() it guarantees that the request
2141 * will be removed from the hardware scheduling and that the callback
2142 * for it will be called with USBD_CANCELLED status.
2143 * It's impossible to guarantee that the requested transfer will not
2144 * have happened since the hardware runs concurrently.
2145 * If the transaction has already happened we rely on the ordinary
2146 * interrupt processing to process it.
2147 */
2148 void
2149 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2150 {
2151 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2152 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2153 int s;
2154
2155 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2156
2157 if (sc->sc_dying) {
2158 /* If we're dying, just do the software part. */
2159 s = splusb();
2160 xfer->status = status; /* make software ignore it */
2161 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2162 usb_transfer_complete(xfer);
2163 splx(s);
2164 return;
2165 }
2166
2167 if (xfer->device->bus->intr_context || !curproc)
2168 panic("ehci_abort_xfer: not in process context\n");
2169
2170 /*
2171 * Step 1: Make interrupt routine and hardware ignore xfer.
2172 */
2173 s = splusb();
2174 xfer->status = status; /* make software ignore it */
2175 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2176 splx(s);
2177 /* XXX */
2178
2179 /*
2180 * Step 2: Wait until we know hardware has finished any possible
2181 * use of the xfer. Also make sure the soft interrupt routine
2182 * has run.
2183 */
2184 usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
2185 /* XXX should have some communication with softintr() to know
2186 when it's done */
2187 usb_delay_ms(epipe->pipe.device->bus, 250);
2188
2189 /*
2190 * Step 3: Remove any vestiges of the xfer from the hardware.
2191 * The complication here is that the hardware may have executed
2192 * beyond the xfer we're trying to abort. So as we're scanning
2193 * the TDs of this xfer we check if the hardware points to
2194 * any of them.
2195 */
2196 s = splusb(); /* XXX why? */
2197 /* XXX */
2198
2199 /*
2200 * Step 4: Turn on hardware again.
2201 */
2202 /* XXX */
2203
2204 /*
2205 * Step 5: Execute callback.
2206 */
2207 #ifdef DIAGNOSTIC
2208 EXFER(xfer)->isdone = 1;
2209 #endif
2210 usb_transfer_complete(xfer);
2211
2212 splx(s);
2213 }
2214
2215 void
2216 ehci_timeout(void *addr)
2217 {
2218 struct ehci_xfer *exfer = addr;
2219 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2220 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2221
2222 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2223 #ifdef USB_DEBUG
2224 if (ehcidebug)
2225 usbd_dump_pipe(exfer->xfer.pipe);
2226 #endif
2227
2228 if (sc->sc_dying) {
2229 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2230 return;
2231 }
2232
2233 /* Execute the abort in a process context. */
2234 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2235 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2236 }
2237
2238 void
2239 ehci_timeout_task(void *addr)
2240 {
2241 usbd_xfer_handle xfer = addr;
2242 int s;
2243
2244 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2245
2246 s = splusb();
2247 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2248 splx(s);
2249 }
2250
2251 /************************/
2252
2253 Static usbd_status
2254 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2255 {
2256 usbd_status err;
2257
2258 /* Insert last in queue. */
2259 err = usb_insert_transfer(xfer);
2260 if (err)
2261 return (err);
2262
2263 /* Pipe isn't running, start first */
2264 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2265 }
2266
2267 Static usbd_status
2268 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2269 {
2270 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2271 usbd_status err;
2272
2273 if (sc->sc_dying)
2274 return (USBD_IOERROR);
2275
2276 #ifdef DIAGNOSTIC
2277 if (!(xfer->rqflags & URQ_REQUEST)) {
2278 /* XXX panic */
2279 printf("ehci_device_ctrl_transfer: not a request\n");
2280 return (USBD_INVAL);
2281 }
2282 #endif
2283
2284 err = ehci_device_request(xfer);
2285 if (err)
2286 return (err);
2287
2288 if (sc->sc_bus.use_polling)
2289 ehci_waitintr(sc, xfer);
2290 return (USBD_IN_PROGRESS);
2291 }
2292
2293 void
2294 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2295 {
2296 struct ehci_xfer *ex = EXFER(xfer);
2297 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2298 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2299
2300 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2301
2302 #ifdef DIAGNOSTIC
2303 if (!(xfer->rqflags & URQ_REQUEST)) {
2304 panic("ehci_ctrl_done: not a request\n");
2305 }
2306 #endif
2307
2308 ehci_del_intr_list(ex); /* remove from active list */
2309
2310 if (epipe->u.ctl.length != 0)
2311 ehci_free_std_chain(sc, ex->sqtdstart, NULL);
2312
2313 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
2314 }
2315
2316 /* Abort a device control request. */
2317 Static void
2318 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2319 {
2320 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2321 ehci_abort_xfer(xfer, USBD_CANCELLED);
2322 }
2323
2324 /* Close a device control pipe. */
2325 Static void
2326 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2327 {
2328 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2329 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2330
2331 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2332 ehci_close_pipe(pipe, sc->sc_async_head);
2333 }
2334
2335 usbd_status
2336 ehci_device_request(usbd_xfer_handle xfer)
2337 {
2338 #define exfer EXFER(xfer)
2339 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2340 usb_device_request_t *req = &xfer->request;
2341 usbd_device_handle dev = epipe->pipe.device;
2342 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2343 int addr = dev->address;
2344 ehci_soft_qtd_t *setup, *stat, *next;
2345 ehci_soft_qh_t *sqh;
2346 int isread;
2347 int len;
2348 usbd_status err;
2349 int s;
2350
2351 isread = req->bmRequestType & UT_READ;
2352 len = UGETW(req->wLength);
2353
2354 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2355 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2356 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2357 UGETW(req->wIndex), len, addr,
2358 epipe->pipe.endpoint->edesc->bEndpointAddress));
2359
2360 setup = ehci_alloc_sqtd(sc);
2361 if (setup == NULL) {
2362 err = USBD_NOMEM;
2363 goto bad1;
2364 }
2365 stat = ehci_alloc_sqtd(sc);
2366 if (stat == NULL) {
2367 err = USBD_NOMEM;
2368 goto bad2;
2369 }
2370
2371 sqh = epipe->sqh;
2372 epipe->u.ctl.length = len;
2373
2374 /* XXX
2375 * Since we're messing with the QH we must know the HC is in sync.
2376 * This needs to go away since it slows down control transfers.
2377 * Removing it entails:
2378 * - fill the QH only once with addr & wMaxPacketSize
2379 * - put the correct data toggles in the qtds and set DTC
2380 */
2381 /* ehci_sync_hc(sc); */
2382 /* Update device address and length since they may have changed. */
2383 /* XXX This only needs to be done once, but it's too early in open. */
2384 /* XXXX Should not touch ED here! */
2385 sqh->qh.qh_endp =
2386 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2387 htole32(
2388 EHCI_QH_SET_ADDR(addr) |
2389 /* EHCI_QH_DTC | */
2390 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2391 );
2392 /* Clear toggle */
2393 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2394
2395 /* Set up data transaction */
2396 if (len != 0) {
2397 ehci_soft_qtd_t *end;
2398
2399 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer,
2400 &next, &end);
2401 if (err)
2402 goto bad3;
2403 end->nextqtd = stat;
2404 end->qtd.qtd_next =
2405 end->qtd.qtd_altnext = htole32(stat->physaddr);
2406 /* Start toggle at 1. */
2407 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2408 } else {
2409 next = stat;
2410 }
2411
2412 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
2413
2414 setup->qtd.qtd_status = htole32(
2415 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2416 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2417 EHCI_QTD_SET_CERR(3) |
2418 EHCI_QTD_SET_BYTES(sizeof *req)
2419 );
2420 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2421 setup->nextqtd = next;
2422 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2423 setup->xfer = xfer;
2424 setup->len = sizeof *req;
2425
2426 stat->qtd.qtd_status = htole32(
2427 EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2428 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2429 EHCI_QTD_SET_CERR(3) |
2430 EHCI_QTD_IOC
2431 );
2432 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2433 stat->nextqtd = NULL;
2434 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2435 stat->xfer = xfer;
2436 stat->len = 0;
2437
2438 #ifdef EHCI_DEBUG
2439 if (ehcidebug > 5) {
2440 DPRINTF(("ehci_device_request:\n"));
2441 ehci_dump_sqh(sqh);
2442 ehci_dump_sqtds(setup);
2443 }
2444 #endif
2445
2446 exfer->sqtdstart = setup;
2447 exfer->sqtdend = stat;
2448 #ifdef DIAGNOSTIC
2449 if (!exfer->isdone) {
2450 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2451 }
2452 exfer->isdone = 0;
2453 #endif
2454
2455 /* Insert qTD in QH list. */
2456 s = splusb();
2457 ehci_set_qh_qtd(sqh, setup);
2458 if (xfer->timeout && !sc->sc_bus.use_polling) {
2459 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2460 ehci_timeout, xfer);
2461 }
2462 ehci_add_intr_list(sc, exfer);
2463 xfer->status = USBD_IN_PROGRESS;
2464 splx(s);
2465
2466 #ifdef EHCI_DEBUG
2467 if (ehcidebug > 10) {
2468 DPRINTF(("ehci_device_request: status=%x\n",
2469 EOREAD4(sc, EHCI_USBSTS)));
2470 delay(10000);
2471 ehci_dump_regs(sc);
2472 ehci_dump_sqh(sc->sc_async_head);
2473 ehci_dump_sqh(sqh);
2474 ehci_dump_sqtds(setup);
2475 }
2476 #endif
2477
2478 return (USBD_NORMAL_COMPLETION);
2479
2480 bad3:
2481 ehci_free_sqtd(sc, stat);
2482 bad2:
2483 ehci_free_sqtd(sc, setup);
2484 bad1:
2485 return (err);
2486 #undef exfer
2487 }
2488
2489 /************************/
2490
2491 Static usbd_status
2492 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2493 {
2494 usbd_status err;
2495
2496 /* Insert last in queue. */
2497 err = usb_insert_transfer(xfer);
2498 if (err)
2499 return (err);
2500
2501 /* Pipe isn't running, start first */
2502 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2503 }
2504
2505 usbd_status
2506 ehci_device_bulk_start(usbd_xfer_handle xfer)
2507 {
2508 #define exfer EXFER(xfer)
2509 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2510 usbd_device_handle dev = epipe->pipe.device;
2511 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2512 ehci_soft_qtd_t *data, *dataend;
2513 ehci_soft_qh_t *sqh;
2514 usbd_status err;
2515 int len, isread, endpt;
2516 int s;
2517
2518 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2519 xfer, xfer->length, xfer->flags));
2520
2521 if (sc->sc_dying)
2522 return (USBD_IOERROR);
2523
2524 #ifdef DIAGNOSTIC
2525 if (xfer->rqflags & URQ_REQUEST)
2526 panic("ehci_device_bulk_transfer: a request\n");
2527 #endif
2528
2529 len = xfer->length;
2530 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2531 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2532 sqh = epipe->sqh;
2533
2534 epipe->u.bulk.length = len;
2535
2536 err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer, &data,
2537 &dataend);
2538 if (err)
2539 return (err);
2540
2541 #ifdef EHCI_DEBUG
2542 if (ehcidebug > 5) {
2543 DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2544 ehci_dump_sqh(sqh);
2545 ehci_dump_sqtds(data);
2546 }
2547 #endif
2548
2549 /* Set up interrupt info. */
2550 exfer->sqtdstart = data;
2551 exfer->sqtdend = dataend;
2552 #ifdef DIAGNOSTIC
2553 if (!exfer->isdone) {
2554 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2555 }
2556 exfer->isdone = 0;
2557 #endif
2558
2559 s = splusb();
2560 ehci_set_qh_qtd(sqh, data);
2561 if (xfer->timeout && !sc->sc_bus.use_polling) {
2562 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2563 ehci_timeout, xfer);
2564 }
2565 ehci_add_intr_list(sc, exfer);
2566 xfer->status = USBD_IN_PROGRESS;
2567 splx(s);
2568
2569 #ifdef EHCI_DEBUG
2570 if (ehcidebug > 10) {
2571 DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2572 delay(10000);
2573 ehci_dump_regs(sc);
2574 ehci_dump_sqh(sc->sc_async_head);
2575 ehci_dump_sqh(sqh);
2576 ehci_dump_sqtds(data);
2577 }
2578 #endif
2579
2580 if (sc->sc_bus.use_polling)
2581 ehci_waitintr(sc, xfer);
2582
2583 return (USBD_IN_PROGRESS);
2584 #undef exfer
2585 }
2586
2587 Static void
2588 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2589 {
2590 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2591 ehci_abort_xfer(xfer, USBD_CANCELLED);
2592 }
2593
2594 /*
2595 * Close a device bulk pipe.
2596 */
2597 Static void
2598 ehci_device_bulk_close(usbd_pipe_handle pipe)
2599 {
2600 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2601
2602 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2603 ehci_close_pipe(pipe, sc->sc_async_head);
2604 }
2605
2606 void
2607 ehci_device_bulk_done(usbd_xfer_handle xfer)
2608 {
2609 struct ehci_xfer *ex = EXFER(xfer);
2610 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2611 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2612
2613 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2614 xfer, xfer->actlen));
2615
2616 ehci_del_intr_list(ex); /* remove from active list */
2617
2618 ehci_free_std_chain(sc, ex->sqtdstart, 0);
2619
2620 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2621 }
2622
2623 /************************/
2624
2625 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2626 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2627 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2628 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2629 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2630
2631 /************************/
2632
2633 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2634 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2635 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2636 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2637 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2638