ehci.c revision 1.27 1 /* $NetBSD: ehci.c,v 1.27 2001/12/01 09:39:32 enami Exp $ */
2
3 /*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart (at) augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 *
42 * The EHCI 0.96 spec can be found at
43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 * and the USB 2.0 spec at
45 * http://www.usb.org/developers/data/usb_20.zip
46 *
47 */
48
49 #include <sys/cdefs.h>
50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.27 2001/12/01 09:39:32 enami Exp $");
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/kernel.h>
55 #include <sys/malloc.h>
56 #include <sys/device.h>
57 #include <sys/select.h>
58 #include <sys/proc.h>
59 #include <sys/queue.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ehcireg.h>
71 #include <dev/usb/ehcivar.h>
72
73 #ifdef EHCI_DEBUG
74 #define DPRINTF(x) if (ehcidebug) printf x
75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 int ehcidebug = 0;
77 #ifndef __NetBSD__
78 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
79 #endif
80 #else
81 #define DPRINTF(x)
82 #define DPRINTFN(n,x)
83 #endif
84
85 struct ehci_pipe {
86 struct usbd_pipe pipe;
87 ehci_soft_qh_t *sqh;
88 union {
89 ehci_soft_qtd_t *qtd;
90 /* ehci_soft_itd_t *itd; */
91 } tail;
92 union {
93 /* Control pipe */
94 struct {
95 usb_dma_t reqdma;
96 u_int length;
97 /*ehci_soft_qtd_t *setup, *data, *stat;*/
98 } ctl;
99 /* Interrupt pipe */
100 /* XXX */
101 /* Bulk pipe */
102 struct {
103 u_int length;
104 } bulk;
105 /* Iso pipe */
106 /* XXX */
107 } u;
108 };
109
110 Static void ehci_shutdown(void *);
111 Static void ehci_power(int, void *);
112
113 Static usbd_status ehci_open(usbd_pipe_handle);
114 Static void ehci_poll(struct usbd_bus *);
115 Static void ehci_softintr(void *);
116 Static int ehci_intr1(ehci_softc_t *);
117 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
118 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
119 Static void ehci_idone(struct ehci_xfer *);
120 Static void ehci_timeout(void *);
121 Static void ehci_timeout_task(void *);
122
123 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
124 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
125
126 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
127 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
128
129 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
130 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
131 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
132 Static void ehci_root_ctrl_close(usbd_pipe_handle);
133 Static void ehci_root_ctrl_done(usbd_xfer_handle);
134
135 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
136 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
137 Static void ehci_root_intr_abort(usbd_xfer_handle);
138 Static void ehci_root_intr_close(usbd_pipe_handle);
139 Static void ehci_root_intr_done(usbd_xfer_handle);
140
141 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
142 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
143 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
144 Static void ehci_device_ctrl_close(usbd_pipe_handle);
145 Static void ehci_device_ctrl_done(usbd_xfer_handle);
146
147 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
148 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
149 Static void ehci_device_bulk_abort(usbd_xfer_handle);
150 Static void ehci_device_bulk_close(usbd_pipe_handle);
151 Static void ehci_device_bulk_done(usbd_xfer_handle);
152
153 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
154 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
155 Static void ehci_device_intr_abort(usbd_xfer_handle);
156 Static void ehci_device_intr_close(usbd_pipe_handle);
157 Static void ehci_device_intr_done(usbd_xfer_handle);
158
159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
161 Static void ehci_device_isoc_abort(usbd_xfer_handle);
162 Static void ehci_device_isoc_close(usbd_pipe_handle);
163 Static void ehci_device_isoc_done(usbd_xfer_handle);
164
165 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
166 Static void ehci_noop(usbd_pipe_handle pipe);
167
168 Static int ehci_str(usb_string_descriptor_t *, int, char *);
169 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
170 Static void ehci_pcd_able(ehci_softc_t *, int);
171 Static void ehci_pcd_enable(void *);
172 Static void ehci_disown(ehci_softc_t *, int, int);
173
174 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
175 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
176
177 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
178 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
179 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
180 ehci_softc_t *, int, int, usbd_xfer_handle,
181 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
182 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
183 ehci_soft_qtd_t *);
184
185 Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
186
187 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
188 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
189 ehci_soft_qh_t *);
190 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
191 Static void ehci_sync_hc(ehci_softc_t *);
192
193 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
194 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
195
196 #ifdef EHCI_DEBUG
197 Static void ehci_dump_regs(ehci_softc_t *);
198 Static void ehci_dump(void);
199 Static ehci_softc_t *theehci;
200 Static void ehci_dump_link(ehci_link_t, int);
201 Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
202 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
203 Static void ehci_dump_qtd(ehci_qtd_t *);
204 Static void ehci_dump_sqh(ehci_soft_qh_t *);
205 Static void ehci_dump_exfer(struct ehci_xfer *);
206 #endif
207
208 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
209
210 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
211
212 #define EHCI_INTR_ENDPT 1
213
214 #define ehci_add_intr_list(sc, ex) \
215 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
216 #define ehci_del_intr_list(ex) \
217 LIST_REMOVE((ex), inext)
218
219 Static struct usbd_bus_methods ehci_bus_methods = {
220 ehci_open,
221 ehci_softintr,
222 ehci_poll,
223 ehci_allocm,
224 ehci_freem,
225 ehci_allocx,
226 ehci_freex,
227 };
228
229 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
230 ehci_root_ctrl_transfer,
231 ehci_root_ctrl_start,
232 ehci_root_ctrl_abort,
233 ehci_root_ctrl_close,
234 ehci_noop,
235 ehci_root_ctrl_done,
236 };
237
238 Static struct usbd_pipe_methods ehci_root_intr_methods = {
239 ehci_root_intr_transfer,
240 ehci_root_intr_start,
241 ehci_root_intr_abort,
242 ehci_root_intr_close,
243 ehci_noop,
244 ehci_root_intr_done,
245 };
246
247 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
248 ehci_device_ctrl_transfer,
249 ehci_device_ctrl_start,
250 ehci_device_ctrl_abort,
251 ehci_device_ctrl_close,
252 ehci_noop,
253 ehci_device_ctrl_done,
254 };
255
256 Static struct usbd_pipe_methods ehci_device_intr_methods = {
257 ehci_device_intr_transfer,
258 ehci_device_intr_start,
259 ehci_device_intr_abort,
260 ehci_device_intr_close,
261 ehci_device_clear_toggle,
262 ehci_device_intr_done,
263 };
264
265 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
266 ehci_device_bulk_transfer,
267 ehci_device_bulk_start,
268 ehci_device_bulk_abort,
269 ehci_device_bulk_close,
270 ehci_device_clear_toggle,
271 ehci_device_bulk_done,
272 };
273
274 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
275 ehci_device_isoc_transfer,
276 ehci_device_isoc_start,
277 ehci_device_isoc_abort,
278 ehci_device_isoc_close,
279 ehci_noop,
280 ehci_device_isoc_done,
281 };
282
283 usbd_status
284 ehci_init(ehci_softc_t *sc)
285 {
286 u_int32_t version, sparams, cparams, hcr;
287 u_int i;
288 usbd_status err;
289 ehci_soft_qh_t *sqh;
290
291 DPRINTF(("ehci_init: start\n"));
292 #ifdef EHCI_DEBUG
293 theehci = sc;
294 #endif
295
296 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
297
298 version = EREAD2(sc, EHCI_HCIVERSION);
299 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
300 version >> 8, version & 0xff);
301
302 sparams = EREAD4(sc, EHCI_HCSPARAMS);
303 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
304 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
305 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
306 printf("%s: wrong number of companions (%d != %d)\n",
307 USBDEVNAME(sc->sc_bus.bdev),
308 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
309 return (USBD_IOERROR);
310 }
311 if (sc->sc_ncomp > 0) {
312 printf("%s: companion controller%s, %d port%s each:",
313 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
314 EHCI_HCS_N_PCC(sparams),
315 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
316 for (i = 0; i < sc->sc_ncomp; i++)
317 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
318 printf("\n");
319 }
320 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
321 cparams = EREAD4(sc, EHCI_HCCPARAMS);
322 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
323
324 sc->sc_bus.usbrev = USBREV_2_0;
325
326 /* Reset the controller */
327 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
328 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
329 usb_delay_ms(&sc->sc_bus, 1);
330 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
331 for (i = 0; i < 100; i++) {
332 delay(10);
333 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
334 if (!hcr)
335 break;
336 }
337 if (hcr) {
338 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
339 return (USBD_IOERROR);
340 }
341
342 /* frame list size at default, read back what we got and use that */
343 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
344 case 0: sc->sc_flsize = 1024*4; break;
345 case 1: sc->sc_flsize = 512*4; break;
346 case 2: sc->sc_flsize = 256*4; break;
347 case 3: return (USBD_IOERROR);
348 }
349 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
350 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
351 if (err)
352 return (err);
353 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
354
355 /* Set up the bus struct. */
356 sc->sc_bus.methods = &ehci_bus_methods;
357 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
358
359 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
360 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
361
362 sc->sc_eintrs = EHCI_NORMAL_INTRS;
363
364 /* Allocate dummy QH that starts the async list. */
365 sqh = ehci_alloc_sqh(sc);
366 if (sqh == NULL) {
367 err = USBD_NOMEM;
368 goto bad1;
369 }
370 /* Fill the QH */
371 sqh->qh.qh_endp =
372 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
373 sqh->qh.qh_link =
374 htole32(sqh->physaddr | EHCI_LINK_QH);
375 sqh->qh.qh_curqtd = EHCI_NULL;
376 sqh->next = NULL;
377 /* Fill the overlay qTD */
378 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
379 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
380 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
381 sqh->sqtd = NULL;
382 #ifdef EHCI_DEBUG
383 if (ehcidebug) {
384 ehci_dump_sqh(sqh);
385 }
386 #endif
387
388 /* Point to async list */
389 sc->sc_async_head = sqh;
390 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
391
392 usb_callout_init(sc->sc_tmo_pcd);
393
394 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
395
396 /* Enable interrupts */
397 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
398
399 /* Turn on controller */
400 EOWRITE4(sc, EHCI_USBCMD,
401 EHCI_CMD_ITC_8 | /* 8 microframes */
402 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
403 EHCI_CMD_ASE |
404 /* EHCI_CMD_PSE | */
405 EHCI_CMD_RS);
406
407 /* Take over port ownership */
408 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
409
410 for (i = 0; i < 100; i++) {
411 delay(10);
412 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
413 if (!hcr)
414 break;
415 }
416 if (hcr) {
417 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
418 return (USBD_IOERROR);
419 }
420
421 return (USBD_NORMAL_COMPLETION);
422
423 #if 0
424 bad2:
425 ehci_free_sqh(sc, sc->sc_async_head);
426 #endif
427 bad1:
428 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
429 return (err);
430 }
431
432 int
433 ehci_intr(void *v)
434 {
435 ehci_softc_t *sc = v;
436
437 if (sc == NULL || sc->sc_dying)
438 return (0);
439
440 /* If we get an interrupt while polling, then just ignore it. */
441 if (sc->sc_bus.use_polling) {
442 #ifdef DIAGNOSTIC
443 printf("ehci_intr: ignored interrupt while polling\n");
444 #endif
445 return (0);
446 }
447
448 return (ehci_intr1(sc));
449 }
450
451 Static int
452 ehci_intr1(ehci_softc_t *sc)
453 {
454 u_int32_t intrs, eintrs;
455
456 DPRINTFN(20,("ehci_intr1: enter\n"));
457
458 /* In case the interrupt occurs before initialization has completed. */
459 if (sc == NULL) {
460 #ifdef DIAGNOSTIC
461 printf("ehci_intr: sc == NULL\n");
462 #endif
463 return (0);
464 }
465
466 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
467
468 if (!intrs)
469 return (0);
470
471 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
472 eintrs = intrs & sc->sc_eintrs;
473 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
474 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
475 (u_int)eintrs));
476 if (!eintrs)
477 return (0);
478
479 sc->sc_bus.intr_context++;
480 sc->sc_bus.no_intrs++;
481 if (eintrs & EHCI_STS_IAA) {
482 DPRINTF(("ehci_intr1: door bell\n"));
483 wakeup(&sc->sc_async_head);
484 eintrs &= ~EHCI_STS_IAA;
485 }
486 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
487 DPRINTF(("ehci_intr1: %s %s\n",
488 eintrs & EHCI_STS_INT ? "INT" : "",
489 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
490 usb_schedsoftintr(&sc->sc_bus);
491 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
492 }
493 if (eintrs & EHCI_STS_HSE) {
494 printf("%s: unrecoverable error, controller halted\n",
495 USBDEVNAME(sc->sc_bus.bdev));
496 /* XXX what else */
497 }
498 if (eintrs & EHCI_STS_PCD) {
499 ehci_pcd(sc, sc->sc_intrxfer);
500 /*
501 * Disable PCD interrupt for now, because it will be
502 * on until the port has been reset.
503 */
504 ehci_pcd_able(sc, 0);
505 /* Do not allow RHSC interrupts > 1 per second */
506 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
507 eintrs &= ~EHCI_STS_PCD;
508 }
509
510 sc->sc_bus.intr_context--;
511
512 if (eintrs != 0) {
513 /* Block unprocessed interrupts. */
514 sc->sc_eintrs &= ~eintrs;
515 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
516 printf("%s: blocking intrs 0x%x\n",
517 USBDEVNAME(sc->sc_bus.bdev), eintrs);
518 }
519
520 return (1);
521 }
522
523 void
524 ehci_pcd_able(ehci_softc_t *sc, int on)
525 {
526 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
527 if (on)
528 sc->sc_eintrs |= EHCI_STS_PCD;
529 else
530 sc->sc_eintrs &= ~EHCI_STS_PCD;
531 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
532 }
533
534 void
535 ehci_pcd_enable(void *v_sc)
536 {
537 ehci_softc_t *sc = v_sc;
538
539 ehci_pcd_able(sc, 1);
540 }
541
542 void
543 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
544 {
545 usbd_pipe_handle pipe;
546 struct ehci_pipe *epipe;
547 u_char *p;
548 int i, m;
549
550 if (xfer == NULL) {
551 /* Just ignore the change. */
552 return;
553 }
554
555 pipe = xfer->pipe;
556 epipe = (struct ehci_pipe *)pipe;
557
558 p = KERNADDR(&xfer->dmabuf);
559 m = min(sc->sc_noport, xfer->length * 8 - 1);
560 memset(p, 0, xfer->length);
561 for (i = 1; i <= m; i++) {
562 /* Pick out CHANGE bits from the status reg. */
563 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
564 p[i/8] |= 1 << (i%8);
565 }
566 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
567 xfer->actlen = xfer->length;
568 xfer->status = USBD_NORMAL_COMPLETION;
569
570 usb_transfer_complete(xfer);
571 }
572
573 void
574 ehci_softintr(void *v)
575 {
576 ehci_softc_t *sc = v;
577 struct ehci_xfer *ex;
578
579 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
580 sc->sc_bus.intr_context));
581
582 sc->sc_bus.intr_context++;
583
584 /*
585 * The only explanation I can think of for why EHCI is as brain dead
586 * as UHCI interrupt-wise is that Intel was involved in both.
587 * An interrupt just tells us that something is done, we have no
588 * clue what, so we need to scan through all active transfers. :-(
589 */
590 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
591 ehci_check_intr(sc, ex);
592
593 sc->sc_bus.intr_context--;
594 }
595
596 /* Check for an interrupt. */
597 void
598 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
599 {
600 ehci_soft_qtd_t *sqtd, *lsqtd;
601 u_int32_t status;
602
603 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
604
605 if (ex->sqtdstart == NULL) {
606 printf("ehci_check_intr: sqtdstart=NULL\n");
607 return;
608 }
609 lsqtd = ex->sqtdend;
610 #ifdef DIAGNOSTIC
611 if (lsqtd == NULL) {
612 printf("ehci_check_intr: sqtd==0\n");
613 return;
614 }
615 #endif
616 /*
617 * If the last TD is still active we need to check whether there
618 * is a an error somewhere in the middle, or whether there was a
619 * short packet (SPD and not ACTIVE).
620 */
621 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
622 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
623 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
624 status = le32toh(sqtd->qtd.qtd_status);
625 /* If there's an active QTD the xfer isn't done. */
626 if (status & EHCI_QTD_ACTIVE)
627 break;
628 /* Any kind of error makes the xfer done. */
629 if (status & EHCI_QTD_HALTED)
630 goto done;
631 /* We want short packets, and it is short: it's done */
632 if (EHCI_QTD_SET_BYTES(status) != 0)
633 goto done;
634 }
635 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
636 ex, ex->sqtdstart));
637 return;
638 }
639 done:
640 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
641 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
642 ehci_idone(ex);
643 }
644
645 void
646 ehci_idone(struct ehci_xfer *ex)
647 {
648 usbd_xfer_handle xfer = &ex->xfer;
649 #ifdef EHCI_DEBUG
650 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
651 #endif
652 ehci_soft_qtd_t *sqtd;
653 u_int32_t status = 0, nstatus;
654 int actlen;
655
656 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
657 #ifdef DIAGNOSTIC
658 {
659 int s = splhigh();
660 if (ex->isdone) {
661 splx(s);
662 #ifdef EHCI_DEBUG
663 printf("ehci_idone: ex is done!\n ");
664 ehci_dump_exfer(ex);
665 #else
666 printf("ehci_idone: ex=%p is done!\n", ex);
667 #endif
668 return;
669 }
670 ex->isdone = 1;
671 splx(s);
672 }
673 #endif
674
675 if (xfer->status == USBD_CANCELLED ||
676 xfer->status == USBD_TIMEOUT) {
677 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
678 return;
679 }
680
681 #ifdef EHCI_DEBUG
682 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
683 if (ehcidebug > 10)
684 ehci_dump_sqtds(ex->sqtdstart);
685 #endif
686
687 /* The transfer is done, compute actual length and status. */
688 actlen = 0;
689 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
690 nstatus = le32toh(sqtd->qtd.qtd_status);
691 if (nstatus & EHCI_QTD_ACTIVE)
692 break;
693
694 status = nstatus;
695 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
696 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
697 }
698
699 /* If there are left over TDs we need to update the toggle. */
700 if (sqtd != NULL) {
701 if (!(xfer->rqflags & URQ_REQUEST))
702 printf("ehci_idone: need toggle update\n");
703 #if 0
704 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
705 #endif
706 }
707
708 status &= EHCI_QTD_STATERRS;
709 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
710 xfer->length, actlen, status));
711 xfer->actlen = actlen;
712 if (status != 0) {
713 #ifdef EHCI_DEBUG
714 char sbuf[128];
715
716 bitmask_snprintf((u_int32_t)status,
717 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
718 "\7HALTED",
719 sbuf, sizeof(sbuf));
720
721 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
722 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
723 "status 0x%s\n",
724 xfer->pipe->device->address,
725 xfer->pipe->endpoint->edesc->bEndpointAddress,
726 sbuf));
727 if (ehcidebug > 2) {
728 ehci_dump_sqh(epipe->sqh);
729 ehci_dump_sqtds(ex->sqtdstart);
730 }
731 #endif
732 if (status == EHCI_QTD_HALTED)
733 xfer->status = USBD_STALLED;
734 else
735 xfer->status = USBD_IOERROR; /* more info XXX */
736 } else {
737 xfer->status = USBD_NORMAL_COMPLETION;
738 }
739
740 usb_transfer_complete(xfer);
741 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
742 }
743
744 /*
745 * Wait here until controller claims to have an interrupt.
746 * Then call ehci_intr and return. Use timeout to avoid waiting
747 * too long.
748 */
749 void
750 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
751 {
752 int timo = xfer->timeout;
753 int usecs;
754 u_int32_t intrs;
755
756 xfer->status = USBD_IN_PROGRESS;
757 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
758 usb_delay_ms(&sc->sc_bus, 1);
759 if (sc->sc_dying)
760 break;
761 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
762 sc->sc_eintrs;
763 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
764 #ifdef OHCI_DEBUG
765 if (ehcidebug > 15)
766 ehci_dump_regs(sc);
767 #endif
768 if (intrs) {
769 ehci_intr1(sc);
770 if (xfer->status != USBD_IN_PROGRESS)
771 return;
772 }
773 }
774
775 /* Timeout */
776 DPRINTF(("ehci_waitintr: timeout\n"));
777 xfer->status = USBD_TIMEOUT;
778 usb_transfer_complete(xfer);
779 /* XXX should free TD */
780 }
781
782 void
783 ehci_poll(struct usbd_bus *bus)
784 {
785 ehci_softc_t *sc = (ehci_softc_t *)bus;
786 #ifdef EHCI_DEBUG
787 static int last;
788 int new;
789 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
790 if (new != last) {
791 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
792 last = new;
793 }
794 #endif
795
796 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
797 ehci_intr1(sc);
798 }
799
800 int
801 ehci_detach(struct ehci_softc *sc, int flags)
802 {
803 int rv = 0;
804
805 if (sc->sc_child != NULL)
806 rv = config_detach(sc->sc_child, flags);
807
808 if (rv != 0)
809 return (rv);
810
811 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
812
813 if (sc->sc_powerhook != NULL)
814 powerhook_disestablish(sc->sc_powerhook);
815 if (sc->sc_shutdownhook != NULL)
816 shutdownhook_disestablish(sc->sc_shutdownhook);
817
818 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
819
820 /* XXX free other data structures XXX */
821
822 return (rv);
823 }
824
825
826 int
827 ehci_activate(device_ptr_t self, enum devact act)
828 {
829 struct ehci_softc *sc = (struct ehci_softc *)self;
830 int rv = 0;
831
832 switch (act) {
833 case DVACT_ACTIVATE:
834 return (EOPNOTSUPP);
835 break;
836
837 case DVACT_DEACTIVATE:
838 if (sc->sc_child != NULL)
839 rv = config_deactivate(sc->sc_child);
840 sc->sc_dying = 1;
841 break;
842 }
843 return (rv);
844 }
845
846 /*
847 * Handle suspend/resume.
848 *
849 * We need to switch to polling mode here, because this routine is
850 * called from an intterupt context. This is all right since we
851 * are almost suspended anyway.
852 */
853 void
854 ehci_power(int why, void *v)
855 {
856 ehci_softc_t *sc = v;
857 //u_int32_t ctl;
858 int s;
859
860 #ifdef EHCI_DEBUG
861 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
862 ehci_dump_regs(sc);
863 #endif
864
865 s = splhardusb();
866 switch (why) {
867 case PWR_SUSPEND:
868 case PWR_STANDBY:
869 sc->sc_bus.use_polling++;
870 #if 0
871 OOO
872 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
873 if (sc->sc_control == 0) {
874 /*
875 * Preserve register values, in case that APM BIOS
876 * does not recover them.
877 */
878 sc->sc_control = ctl;
879 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
880 }
881 ctl |= EHCI_HCFS_SUSPEND;
882 OWRITE4(sc, EHCI_CONTROL, ctl);
883 #endif
884 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
885 sc->sc_bus.use_polling--;
886 break;
887 case PWR_RESUME:
888 sc->sc_bus.use_polling++;
889 #if 0
890 OOO
891 /* Some broken BIOSes do not recover these values */
892 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
893 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
894 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
895 if (sc->sc_intre)
896 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
897 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
898 if (sc->sc_control)
899 ctl = sc->sc_control;
900 else
901 ctl = OREAD4(sc, EHCI_CONTROL);
902 ctl |= EHCI_HCFS_RESUME;
903 OWRITE4(sc, EHCI_CONTROL, ctl);
904 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
905 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
906 OWRITE4(sc, EHCI_CONTROL, ctl);
907 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
908 sc->sc_control = sc->sc_intre = 0;
909 #endif
910 sc->sc_bus.use_polling--;
911 break;
912 case PWR_SOFTSUSPEND:
913 case PWR_SOFTSTANDBY:
914 case PWR_SOFTRESUME:
915 break;
916 }
917 splx(s);
918 }
919
920 /*
921 * Shut down the controller when the system is going down.
922 */
923 void
924 ehci_shutdown(void *v)
925 {
926 ehci_softc_t *sc = v;
927
928 DPRINTF(("ehci_shutdown: stopping the HC\n"));
929 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
930 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
931 }
932
933 usbd_status
934 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
935 {
936 struct ehci_softc *sc = (struct ehci_softc *)bus;
937 usbd_status err;
938
939 err = usb_allocmem(&sc->sc_bus, size, 0, dma);
940 #ifdef EHCI_DEBUG
941 if (err)
942 printf("ehci_allocm: usb_allocmem()=%d\n", err);
943 #endif
944 return (err);
945 }
946
947 void
948 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
949 {
950 struct ehci_softc *sc = (struct ehci_softc *)bus;
951
952 usb_freemem(&sc->sc_bus, dma);
953 }
954
955 usbd_xfer_handle
956 ehci_allocx(struct usbd_bus *bus)
957 {
958 struct ehci_softc *sc = (struct ehci_softc *)bus;
959 usbd_xfer_handle xfer;
960
961 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
962 if (xfer != NULL)
963 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
964 else
965 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
966 if (xfer != NULL) {
967 memset(xfer, 0, sizeof (struct ehci_xfer));
968 #ifdef DIAGNOSTIC
969 EXFER(xfer)->isdone = 1;
970 xfer->busy_free = XFER_BUSY;
971 #endif
972 }
973 return (xfer);
974 }
975
976 void
977 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
978 {
979 struct ehci_softc *sc = (struct ehci_softc *)bus;
980
981 #ifdef DIAGNOSTIC
982 if (xfer->busy_free != XFER_BUSY) {
983 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
984 xfer->busy_free);
985 return;
986 }
987 xfer->busy_free = XFER_FREE;
988 if (!EXFER(xfer)->isdone) {
989 printf("ehci_freex: !isdone\n");
990 return;
991 }
992 #endif
993 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
994 }
995
996 Static void
997 ehci_device_clear_toggle(usbd_pipe_handle pipe)
998 {
999 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1000
1001 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1002 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1003 #ifdef USB_DEBUG
1004 if (ehcidebug)
1005 usbd_dump_pipe(pipe);
1006 #endif
1007 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
1008 }
1009
1010 Static void
1011 ehci_noop(usbd_pipe_handle pipe)
1012 {
1013 }
1014
1015 #ifdef EHCI_DEBUG
1016 void
1017 ehci_dump_regs(ehci_softc_t *sc)
1018 {
1019 int i;
1020 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1021 EOREAD4(sc, EHCI_USBCMD),
1022 EOREAD4(sc, EHCI_USBSTS),
1023 EOREAD4(sc, EHCI_USBINTR));
1024 printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1025 EOREAD4(sc, EHCI_FRINDEX),
1026 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1027 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1028 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1029 for (i = 1; i <= sc->sc_noport; i++)
1030 printf("port %d status=0x%08x\n", i,
1031 EOREAD4(sc, EHCI_PORTSC(i)));
1032 }
1033
1034 void
1035 ehci_dump()
1036 {
1037 ehci_dump_regs(theehci);
1038 }
1039
1040 void
1041 ehci_dump_link(ehci_link_t link, int type)
1042 {
1043 link = le32toh(link);
1044 printf("0x%08x", link);
1045 if (link & EHCI_LINK_TERMINATE)
1046 printf("<T>");
1047 else {
1048 printf("<");
1049 if (type) {
1050 switch (EHCI_LINK_TYPE(link)) {
1051 case EHCI_LINK_ITD: printf("ITD"); break;
1052 case EHCI_LINK_QH: printf("QH"); break;
1053 case EHCI_LINK_SITD: printf("SITD"); break;
1054 case EHCI_LINK_FSTN: printf("FSTN"); break;
1055 }
1056 }
1057 printf(">");
1058 }
1059 }
1060
1061 void
1062 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1063 {
1064 for (; sqtd; sqtd = sqtd->nextqtd)
1065 ehci_dump_sqtd(sqtd);
1066 }
1067
1068 void
1069 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1070 {
1071 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1072 ehci_dump_qtd(&sqtd->qtd);
1073 }
1074
1075 void
1076 ehci_dump_qtd(ehci_qtd_t *qtd)
1077 {
1078 u_int32_t s;
1079 char sbuf[128];
1080
1081 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1082 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1083 printf("\n");
1084 s = le32toh(qtd->qtd_status);
1085 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1086 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1087 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1088 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1089 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1090 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1091 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1092 EHCI_QTD_GET_PID(s), sbuf);
1093 for (s = 0; s < 5; s++)
1094 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1095 }
1096
1097 void
1098 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1099 {
1100 ehci_qh_t *qh = &sqh->qh;
1101 u_int32_t endp, endphub;
1102
1103 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1104 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1105 endp = le32toh(qh->qh_endp);
1106 printf(" endp=0x%08x\n", endp);
1107 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1108 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1109 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1110 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1111 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1112 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1113 EHCI_QH_GET_NRL(endp));
1114 endphub = le32toh(qh->qh_endphub);
1115 printf(" endphub=0x%08x\n", endphub);
1116 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1117 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1118 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1119 EHCI_QH_GET_MULT(endphub));
1120 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1121 printf("Overlay qTD:\n");
1122 ehci_dump_qtd(&qh->qh_qtd);
1123 }
1124
1125 Static void
1126 ehci_dump_exfer(struct ehci_xfer *ex)
1127 {
1128 printf("ehci_dump_exfer: ex=%p\n", ex);
1129 }
1130 #endif
1131
1132 usbd_status
1133 ehci_open(usbd_pipe_handle pipe)
1134 {
1135 usbd_device_handle dev = pipe->device;
1136 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1137 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1138 u_int8_t addr = dev->address;
1139 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1140 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1141 ehci_soft_qh_t *sqh;
1142 usbd_status err;
1143 int s;
1144 int speed, naks;
1145
1146 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1147 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1148
1149 if (sc->sc_dying)
1150 return (USBD_IOERROR);
1151
1152 if (addr == sc->sc_addr) {
1153 switch (ed->bEndpointAddress) {
1154 case USB_CONTROL_ENDPOINT:
1155 pipe->methods = &ehci_root_ctrl_methods;
1156 break;
1157 case UE_DIR_IN | EHCI_INTR_ENDPT:
1158 pipe->methods = &ehci_root_intr_methods;
1159 break;
1160 default:
1161 return (USBD_INVAL);
1162 }
1163 return (USBD_NORMAL_COMPLETION);
1164 }
1165
1166 /* XXX All this stuff is only valid for async. */
1167 switch (dev->speed) {
1168 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1169 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1170 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1171 default: panic("ehci_open: bad device speed %d\n", dev->speed);
1172 }
1173 naks = 8; /* XXX */
1174 sqh = ehci_alloc_sqh(sc);
1175 if (sqh == NULL)
1176 goto bad0;
1177 /* qh_link filled when the QH is added */
1178 sqh->qh.qh_endp = htole32(
1179 EHCI_QH_SET_ADDR(addr) |
1180 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1181 EHCI_QH_SET_EPS(speed) | /* XXX */
1182 /* XXX EHCI_QH_DTC ? */
1183 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1184 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1185 EHCI_QH_CTL : 0) |
1186 EHCI_QH_SET_NRL(naks)
1187 );
1188 sqh->qh.qh_endphub = htole32(
1189 EHCI_QH_SET_MULT(1)
1190 /* XXX TT stuff */
1191 /* XXX interrupt mask */
1192 );
1193 sqh->qh.qh_curqtd = EHCI_NULL;
1194 /* Fill the overlay qTD */
1195 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1196 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1197 sqh->qh.qh_qtd.qtd_status = htole32(0);
1198
1199 epipe->sqh = sqh;
1200
1201 switch (xfertype) {
1202 case UE_CONTROL:
1203 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1204 0, &epipe->u.ctl.reqdma);
1205 #ifdef EHCI_DEBUG
1206 if (err)
1207 printf("ehci_open: usb_allocmem()=%d\n", err);
1208 #endif
1209 if (err)
1210 goto bad1;
1211 pipe->methods = &ehci_device_ctrl_methods;
1212 s = splusb();
1213 ehci_add_qh(sqh, sc->sc_async_head);
1214 splx(s);
1215 break;
1216 case UE_BULK:
1217 pipe->methods = &ehci_device_bulk_methods;
1218 s = splusb();
1219 ehci_add_qh(sqh, sc->sc_async_head);
1220 splx(s);
1221 break;
1222 case UE_INTERRUPT:
1223 pipe->methods = &ehci_device_intr_methods;
1224 return (USBD_INVAL);
1225 case UE_ISOCHRONOUS:
1226 pipe->methods = &ehci_device_isoc_methods;
1227 return (USBD_INVAL);
1228 default:
1229 return (USBD_INVAL);
1230 }
1231 return (USBD_NORMAL_COMPLETION);
1232
1233 bad1:
1234 ehci_free_sqh(sc, sqh);
1235 bad0:
1236 return (USBD_NOMEM);
1237 }
1238
1239 /*
1240 * Add an ED to the schedule. Called at splusb().
1241 */
1242 void
1243 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1244 {
1245 SPLUSBCHECK;
1246
1247 sqh->next = head->next;
1248 sqh->qh.qh_link = head->qh.qh_link;
1249 head->next = sqh;
1250 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1251
1252 #ifdef EHCI_DEBUG
1253 if (ehcidebug > 5) {
1254 printf("ehci_add_qh:\n");
1255 ehci_dump_sqh(sqh);
1256 }
1257 #endif
1258 }
1259
1260 /*
1261 * Remove an ED from the schedule. Called at splusb().
1262 */
1263 void
1264 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1265 {
1266 ehci_soft_qh_t *p;
1267
1268 SPLUSBCHECK;
1269 /* XXX */
1270 for (p = head; p == NULL && p->next != sqh; p = p->next)
1271 ;
1272 if (p == NULL)
1273 panic("ehci_rem_qh: ED not found\n");
1274 p->next = sqh->next;
1275 p->qh.qh_link = sqh->qh.qh_link;
1276
1277 ehci_sync_hc(sc);
1278 }
1279
1280 void
1281 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1282 {
1283 /* Halt while we are messing. */
1284 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1285 sqh->qh.qh_curqtd = 0;
1286 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1287 sqh->sqtd = sqtd;
1288 /* Keep toggle, clear the rest, including length. */
1289 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
1290 }
1291
1292 /*
1293 * Ensure that the HC has released all references to the QH. We do this
1294 * by asking for a Async Advance Doorbell interrupt and then we wait for
1295 * the interrupt.
1296 * To make this easier we first obtain exclusive use of the doorbell.
1297 */
1298 void
1299 ehci_sync_hc(ehci_softc_t *sc)
1300 {
1301 int s, error;
1302
1303 if (sc->sc_dying) {
1304 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1305 return;
1306 }
1307 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1308 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1309 s = splhardusb();
1310 /* ask for doorbell */
1311 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1312 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1313 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1314 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1315 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1316 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1317 splx(s);
1318 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1319 #ifdef DIAGNOSTIC
1320 if (error)
1321 printf("ehci_sync_hc: tsleep() = %d\n", error);
1322 #endif
1323 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1324 }
1325
1326 /***********/
1327
1328 /*
1329 * Data structures and routines to emulate the root hub.
1330 */
1331 Static usb_device_descriptor_t ehci_devd = {
1332 USB_DEVICE_DESCRIPTOR_SIZE,
1333 UDESC_DEVICE, /* type */
1334 {0x00, 0x02}, /* USB version */
1335 UDCLASS_HUB, /* class */
1336 UDSUBCLASS_HUB, /* subclass */
1337 UDPROTO_HSHUBSTT, /* protocol */
1338 64, /* max packet */
1339 {0},{0},{0x00,0x01}, /* device id */
1340 1,2,0, /* string indicies */
1341 1 /* # of configurations */
1342 };
1343
1344 Static usb_device_qualifier_t ehci_odevd = {
1345 USB_DEVICE_DESCRIPTOR_SIZE,
1346 UDESC_DEVICE_QUALIFIER, /* type */
1347 {0x00, 0x02}, /* USB version */
1348 UDCLASS_HUB, /* class */
1349 UDSUBCLASS_HUB, /* subclass */
1350 UDPROTO_FSHUB, /* protocol */
1351 64, /* max packet */
1352 1, /* # of configurations */
1353 0
1354 };
1355
1356 Static usb_config_descriptor_t ehci_confd = {
1357 USB_CONFIG_DESCRIPTOR_SIZE,
1358 UDESC_CONFIG,
1359 {USB_CONFIG_DESCRIPTOR_SIZE +
1360 USB_INTERFACE_DESCRIPTOR_SIZE +
1361 USB_ENDPOINT_DESCRIPTOR_SIZE},
1362 1,
1363 1,
1364 0,
1365 UC_SELF_POWERED,
1366 0 /* max power */
1367 };
1368
1369 Static usb_interface_descriptor_t ehci_ifcd = {
1370 USB_INTERFACE_DESCRIPTOR_SIZE,
1371 UDESC_INTERFACE,
1372 0,
1373 0,
1374 1,
1375 UICLASS_HUB,
1376 UISUBCLASS_HUB,
1377 UIPROTO_HSHUBSTT,
1378 0
1379 };
1380
1381 Static usb_endpoint_descriptor_t ehci_endpd = {
1382 USB_ENDPOINT_DESCRIPTOR_SIZE,
1383 UDESC_ENDPOINT,
1384 UE_DIR_IN | EHCI_INTR_ENDPT,
1385 UE_INTERRUPT,
1386 {8, 0}, /* max packet */
1387 255
1388 };
1389
1390 Static usb_hub_descriptor_t ehci_hubd = {
1391 USB_HUB_DESCRIPTOR_SIZE,
1392 UDESC_HUB,
1393 0,
1394 {0,0},
1395 0,
1396 0,
1397 {0},
1398 };
1399
1400 Static int
1401 ehci_str(p, l, s)
1402 usb_string_descriptor_t *p;
1403 int l;
1404 char *s;
1405 {
1406 int i;
1407
1408 if (l == 0)
1409 return (0);
1410 p->bLength = 2 * strlen(s) + 2;
1411 if (l == 1)
1412 return (1);
1413 p->bDescriptorType = UDESC_STRING;
1414 l -= 2;
1415 for (i = 0; s[i] && l > 1; i++, l -= 2)
1416 USETW2(p->bString[i], 0, s[i]);
1417 return (2*i+2);
1418 }
1419
1420 /*
1421 * Simulate a hardware hub by handling all the necessary requests.
1422 */
1423 Static usbd_status
1424 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1425 {
1426 usbd_status err;
1427
1428 /* Insert last in queue. */
1429 err = usb_insert_transfer(xfer);
1430 if (err)
1431 return (err);
1432
1433 /* Pipe isn't running, start first */
1434 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1435 }
1436
1437 Static usbd_status
1438 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1439 {
1440 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1441 usb_device_request_t *req;
1442 void *buf = NULL;
1443 int port, i;
1444 int s, len, value, index, l, totlen = 0;
1445 usb_port_status_t ps;
1446 usb_hub_descriptor_t hubd;
1447 usbd_status err;
1448 u_int32_t v;
1449
1450 if (sc->sc_dying)
1451 return (USBD_IOERROR);
1452
1453 #ifdef DIAGNOSTIC
1454 if (!(xfer->rqflags & URQ_REQUEST))
1455 /* XXX panic */
1456 return (USBD_INVAL);
1457 #endif
1458 req = &xfer->request;
1459
1460 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1461 req->bmRequestType, req->bRequest));
1462
1463 len = UGETW(req->wLength);
1464 value = UGETW(req->wValue);
1465 index = UGETW(req->wIndex);
1466
1467 if (len != 0)
1468 buf = KERNADDR(&xfer->dmabuf);
1469
1470 #define C(x,y) ((x) | ((y) << 8))
1471 switch(C(req->bRequest, req->bmRequestType)) {
1472 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1473 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1474 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1475 /*
1476 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1477 * for the integrated root hub.
1478 */
1479 break;
1480 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1481 if (len > 0) {
1482 *(u_int8_t *)buf = sc->sc_conf;
1483 totlen = 1;
1484 }
1485 break;
1486 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1487 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1488 switch(value >> 8) {
1489 case UDESC_DEVICE:
1490 if ((value & 0xff) != 0) {
1491 err = USBD_IOERROR;
1492 goto ret;
1493 }
1494 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1495 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1496 memcpy(buf, &ehci_devd, l);
1497 break;
1498 /*
1499 * We can't really operate at another speed, but the spec says
1500 * we need this descriptor.
1501 */
1502 case UDESC_DEVICE_QUALIFIER:
1503 if ((value & 0xff) != 0) {
1504 err = USBD_IOERROR;
1505 goto ret;
1506 }
1507 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1508 memcpy(buf, &ehci_odevd, l);
1509 break;
1510 /*
1511 * We can't really operate at another speed, but the spec says
1512 * we need this descriptor.
1513 */
1514 case UDESC_OTHER_SPEED_CONFIGURATION:
1515 case UDESC_CONFIG:
1516 if ((value & 0xff) != 0) {
1517 err = USBD_IOERROR;
1518 goto ret;
1519 }
1520 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1521 memcpy(buf, &ehci_confd, l);
1522 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1523 value >> 8;
1524 buf = (char *)buf + l;
1525 len -= l;
1526 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1527 totlen += l;
1528 memcpy(buf, &ehci_ifcd, l);
1529 buf = (char *)buf + l;
1530 len -= l;
1531 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1532 totlen += l;
1533 memcpy(buf, &ehci_endpd, l);
1534 break;
1535 case UDESC_STRING:
1536 if (len == 0)
1537 break;
1538 *(u_int8_t *)buf = 0;
1539 totlen = 1;
1540 switch (value & 0xff) {
1541 case 1: /* Vendor */
1542 totlen = ehci_str(buf, len, sc->sc_vendor);
1543 break;
1544 case 2: /* Product */
1545 totlen = ehci_str(buf, len, "EHCI root hub");
1546 break;
1547 }
1548 break;
1549 default:
1550 err = USBD_IOERROR;
1551 goto ret;
1552 }
1553 break;
1554 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1555 if (len > 0) {
1556 *(u_int8_t *)buf = 0;
1557 totlen = 1;
1558 }
1559 break;
1560 case C(UR_GET_STATUS, UT_READ_DEVICE):
1561 if (len > 1) {
1562 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1563 totlen = 2;
1564 }
1565 break;
1566 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1567 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1568 if (len > 1) {
1569 USETW(((usb_status_t *)buf)->wStatus, 0);
1570 totlen = 2;
1571 }
1572 break;
1573 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1574 if (value >= USB_MAX_DEVICES) {
1575 err = USBD_IOERROR;
1576 goto ret;
1577 }
1578 sc->sc_addr = value;
1579 break;
1580 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1581 if (value != 0 && value != 1) {
1582 err = USBD_IOERROR;
1583 goto ret;
1584 }
1585 sc->sc_conf = value;
1586 break;
1587 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1588 break;
1589 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1590 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1591 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1592 err = USBD_IOERROR;
1593 goto ret;
1594 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1595 break;
1596 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1597 break;
1598 /* Hub requests */
1599 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1600 break;
1601 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1602 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1603 "port=%d feature=%d\n",
1604 index, value));
1605 if (index < 1 || index > sc->sc_noport) {
1606 err = USBD_IOERROR;
1607 goto ret;
1608 }
1609 port = EHCI_PORTSC(index);
1610 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1611 switch(value) {
1612 case UHF_PORT_ENABLE:
1613 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1614 break;
1615 case UHF_PORT_SUSPEND:
1616 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1617 break;
1618 case UHF_PORT_POWER:
1619 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1620 break;
1621 case UHF_PORT_TEST:
1622 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1623 "%d\n", index));
1624 break;
1625 case UHF_PORT_INDICATOR:
1626 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1627 "%d\n", index));
1628 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1629 break;
1630 case UHF_C_PORT_CONNECTION:
1631 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1632 break;
1633 case UHF_C_PORT_ENABLE:
1634 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1635 break;
1636 case UHF_C_PORT_SUSPEND:
1637 /* how? */
1638 break;
1639 case UHF_C_PORT_OVER_CURRENT:
1640 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1641 break;
1642 case UHF_C_PORT_RESET:
1643 sc->sc_isreset = 0;
1644 break;
1645 default:
1646 err = USBD_IOERROR;
1647 goto ret;
1648 }
1649 #if 0
1650 switch(value) {
1651 case UHF_C_PORT_CONNECTION:
1652 case UHF_C_PORT_ENABLE:
1653 case UHF_C_PORT_SUSPEND:
1654 case UHF_C_PORT_OVER_CURRENT:
1655 case UHF_C_PORT_RESET:
1656 /* Enable RHSC interrupt if condition is cleared. */
1657 if ((OREAD4(sc, port) >> 16) == 0)
1658 ehci_pcd_able(sc, 1);
1659 break;
1660 default:
1661 break;
1662 }
1663 #endif
1664 break;
1665 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1666 if (value != 0) {
1667 err = USBD_IOERROR;
1668 goto ret;
1669 }
1670 hubd = ehci_hubd;
1671 hubd.bNbrPorts = sc->sc_noport;
1672 v = EOREAD4(sc, EHCI_HCSPARAMS);
1673 USETW(hubd.wHubCharacteristics,
1674 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1675 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1676 ? UHD_PORT_IND : 0);
1677 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1678 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1679 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1680 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1681 l = min(len, hubd.bDescLength);
1682 totlen = l;
1683 memcpy(buf, &hubd, l);
1684 break;
1685 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1686 if (len != 4) {
1687 err = USBD_IOERROR;
1688 goto ret;
1689 }
1690 memset(buf, 0, len); /* ? XXX */
1691 totlen = len;
1692 break;
1693 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1694 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1695 index));
1696 if (index < 1 || index > sc->sc_noport) {
1697 err = USBD_IOERROR;
1698 goto ret;
1699 }
1700 if (len != 4) {
1701 err = USBD_IOERROR;
1702 goto ret;
1703 }
1704 v = EOREAD4(sc, EHCI_PORTSC(index));
1705 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1706 v));
1707 i = UPS_HIGH_SPEED;
1708 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1709 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1710 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1711 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1712 if (v & EHCI_PS_PR) i |= UPS_RESET;
1713 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1714 USETW(ps.wPortStatus, i);
1715 i = 0;
1716 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1717 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1718 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1719 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1720 USETW(ps.wPortChange, i);
1721 l = min(len, sizeof ps);
1722 memcpy(buf, &ps, l);
1723 totlen = l;
1724 break;
1725 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1726 err = USBD_IOERROR;
1727 goto ret;
1728 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1729 break;
1730 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1731 if (index < 1 || index > sc->sc_noport) {
1732 err = USBD_IOERROR;
1733 goto ret;
1734 }
1735 port = EHCI_PORTSC(index);
1736 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1737 switch(value) {
1738 case UHF_PORT_ENABLE:
1739 EOWRITE4(sc, port, v | EHCI_PS_PE);
1740 break;
1741 case UHF_PORT_SUSPEND:
1742 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1743 break;
1744 case UHF_PORT_RESET:
1745 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1746 index));
1747 if (EHCI_PS_IS_LOWSPEED(v)) {
1748 /* Low speed device, give up ownership. */
1749 ehci_disown(sc, index, 1);
1750 break;
1751 }
1752 /* Start reset sequence. */
1753 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1754 EOWRITE4(sc, port, v | EHCI_PS_PR);
1755 /* Wait for reset to complete. */
1756 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1757 if (sc->sc_dying) {
1758 err = USBD_IOERROR;
1759 goto ret;
1760 }
1761 /* Terminate reset sequence. */
1762 EOWRITE4(sc, port, v);
1763 /* Wait for HC to complete reset. */
1764 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1765 if (sc->sc_dying) {
1766 err = USBD_IOERROR;
1767 goto ret;
1768 }
1769 v = EOREAD4(sc, port);
1770 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1771 if (v & EHCI_PS_PR) {
1772 printf("%s: port reset timeout\n",
1773 USBDEVNAME(sc->sc_bus.bdev));
1774 return (USBD_TIMEOUT);
1775 }
1776 if (!(v & EHCI_PS_PE)) {
1777 /* Not a high speed device, give up ownership.*/
1778 ehci_disown(sc, index, 0);
1779 break;
1780 }
1781 sc->sc_isreset = 1;
1782 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1783 index, v));
1784 break;
1785 case UHF_PORT_POWER:
1786 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1787 "%d\n", index));
1788 EOWRITE4(sc, port, v | EHCI_PS_PP);
1789 break;
1790 case UHF_PORT_TEST:
1791 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1792 "%d\n", index));
1793 break;
1794 case UHF_PORT_INDICATOR:
1795 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1796 "%d\n", index));
1797 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1798 break;
1799 default:
1800 err = USBD_IOERROR;
1801 goto ret;
1802 }
1803 break;
1804 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1805 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1806 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1807 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1808 break;
1809 default:
1810 err = USBD_IOERROR;
1811 goto ret;
1812 }
1813 xfer->actlen = totlen;
1814 err = USBD_NORMAL_COMPLETION;
1815 ret:
1816 xfer->status = err;
1817 s = splusb();
1818 usb_transfer_complete(xfer);
1819 splx(s);
1820 return (USBD_IN_PROGRESS);
1821 }
1822
1823 void
1824 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1825 {
1826 int port;
1827 u_int32_t v;
1828
1829 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1830 #ifdef DIAGNOSTIC
1831 if (sc->sc_npcomp != 0) {
1832 int i = (index-1) / sc->sc_npcomp;
1833 if (i >= sc->sc_ncomp)
1834 printf("%s: strange port\n",
1835 USBDEVNAME(sc->sc_bus.bdev));
1836 else
1837 printf("%s: handing over %s speed device on "
1838 "port %d to %s\n",
1839 USBDEVNAME(sc->sc_bus.bdev),
1840 lowspeed ? "low" : "full",
1841 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1842 } else {
1843 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1844 }
1845 #endif
1846 port = EHCI_PORTSC(index);
1847 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1848 EOWRITE4(sc, port, v | EHCI_PS_PO);
1849 }
1850
1851 /* Abort a root control request. */
1852 Static void
1853 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1854 {
1855 /* Nothing to do, all transfers are synchronous. */
1856 }
1857
1858 /* Close the root pipe. */
1859 Static void
1860 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1861 {
1862 DPRINTF(("ehci_root_ctrl_close\n"));
1863 /* Nothing to do. */
1864 }
1865
1866 void
1867 ehci_root_intr_done(usbd_xfer_handle xfer)
1868 {
1869 xfer->hcpriv = NULL;
1870 }
1871
1872 Static usbd_status
1873 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1874 {
1875 usbd_status err;
1876
1877 /* Insert last in queue. */
1878 err = usb_insert_transfer(xfer);
1879 if (err)
1880 return (err);
1881
1882 /* Pipe isn't running, start first */
1883 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1884 }
1885
1886 Static usbd_status
1887 ehci_root_intr_start(usbd_xfer_handle xfer)
1888 {
1889 usbd_pipe_handle pipe = xfer->pipe;
1890 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1891
1892 if (sc->sc_dying)
1893 return (USBD_IOERROR);
1894
1895 sc->sc_intrxfer = xfer;
1896
1897 return (USBD_IN_PROGRESS);
1898 }
1899
1900 /* Abort a root interrupt request. */
1901 Static void
1902 ehci_root_intr_abort(usbd_xfer_handle xfer)
1903 {
1904 int s;
1905
1906 if (xfer->pipe->intrxfer == xfer) {
1907 DPRINTF(("ehci_root_intr_abort: remove\n"));
1908 xfer->pipe->intrxfer = NULL;
1909 }
1910 xfer->status = USBD_CANCELLED;
1911 s = splusb();
1912 usb_transfer_complete(xfer);
1913 splx(s);
1914 }
1915
1916 /* Close the root pipe. */
1917 Static void
1918 ehci_root_intr_close(usbd_pipe_handle pipe)
1919 {
1920 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1921
1922 DPRINTF(("ehci_root_intr_close\n"));
1923
1924 sc->sc_intrxfer = NULL;
1925 }
1926
1927 void
1928 ehci_root_ctrl_done(usbd_xfer_handle xfer)
1929 {
1930 xfer->hcpriv = NULL;
1931 }
1932
1933 /************************/
1934
1935 ehci_soft_qh_t *
1936 ehci_alloc_sqh(ehci_softc_t *sc)
1937 {
1938 ehci_soft_qh_t *sqh;
1939 usbd_status err;
1940 int i, offs;
1941 usb_dma_t dma;
1942
1943 if (sc->sc_freeqhs == NULL) {
1944 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1945 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1946 EHCI_PAGE_SIZE, &dma);
1947 #ifdef EHCI_DEBUG
1948 if (err)
1949 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
1950 #endif
1951 if (err)
1952 return (NULL);
1953 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1954 offs = i * EHCI_SQH_SIZE;
1955 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1956 sqh->physaddr = DMAADDR(&dma) + offs;
1957 sqh->next = sc->sc_freeqhs;
1958 sc->sc_freeqhs = sqh;
1959 }
1960 }
1961 sqh = sc->sc_freeqhs;
1962 sc->sc_freeqhs = sqh->next;
1963 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1964 sqh->next = NULL;
1965 return (sqh);
1966 }
1967
1968 void
1969 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1970 {
1971 sqh->next = sc->sc_freeqhs;
1972 sc->sc_freeqhs = sqh;
1973 }
1974
1975 ehci_soft_qtd_t *
1976 ehci_alloc_sqtd(ehci_softc_t *sc)
1977 {
1978 ehci_soft_qtd_t *sqtd;
1979 usbd_status err;
1980 int i, offs;
1981 usb_dma_t dma;
1982 int s;
1983
1984 if (sc->sc_freeqtds == NULL) {
1985 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1986 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1987 EHCI_PAGE_SIZE, &dma);
1988 #ifdef EHCI_DEBUG
1989 if (err)
1990 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
1991 #endif
1992 if (err)
1993 return (NULL);
1994 s = splusb();
1995 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1996 offs = i * EHCI_SQTD_SIZE;
1997 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1998 sqtd->physaddr = DMAADDR(&dma) + offs;
1999 sqtd->nextqtd = sc->sc_freeqtds;
2000 sc->sc_freeqtds = sqtd;
2001 }
2002 splx(s);
2003 }
2004
2005 s = splusb();
2006 sqtd = sc->sc_freeqtds;
2007 sc->sc_freeqtds = sqtd->nextqtd;
2008 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2009 sqtd->nextqtd = NULL;
2010 sqtd->xfer = NULL;
2011 splx(s);
2012
2013 return (sqtd);
2014 }
2015
2016 void
2017 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2018 {
2019 int s;
2020
2021 s = splusb();
2022 sqtd->nextqtd = sc->sc_freeqtds;
2023 sc->sc_freeqtds = sqtd;
2024 splx(s);
2025 }
2026
2027 usbd_status
2028 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2029 int alen, int rd, usbd_xfer_handle xfer,
2030 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2031 {
2032 ehci_soft_qtd_t *next, *cur;
2033 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2034 u_int32_t qtdstatus;
2035 int len, curlen;
2036 int i;
2037 usb_dma_t *dma = &xfer->dmabuf;
2038
2039 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2040
2041 len = alen;
2042 dataphys = DMAADDR(dma);
2043 dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2044 qtdstatus = htole32(
2045 EHCI_QTD_ACTIVE |
2046 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2047 EHCI_QTD_SET_CERR(3)
2048 /* IOC set below */
2049 /* BYTES set below */
2050 /* XXX Data toggle */
2051 );
2052
2053 cur = ehci_alloc_sqtd(sc);
2054 *sp = cur;
2055 if (cur == NULL)
2056 goto nomem;
2057 for (;;) {
2058 dataphyspage = EHCI_PAGE(dataphys);
2059 /* The EHCI hardware can handle at most 5 pages. */
2060 if (dataphyslastpage - dataphyspage <
2061 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2062 /* we can handle it in this QTD */
2063 curlen = len;
2064 } else {
2065 /* must use multiple TDs, fill as much as possible. */
2066 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2067 EHCI_PAGE_OFFSET(dataphys);
2068 #ifdef DIAGNOSTIC
2069 if (curlen > len) {
2070 printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2071 "len=0x%x offs=0x%x\n", curlen, len,
2072 EHCI_PAGE_OFFSET(dataphys));
2073 printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2074 dataphyslastpage, dataphyspage,
2075 dataphys);
2076 curlen = len;
2077 }
2078 #endif
2079
2080 /* XXX true for EHCI? */
2081 /* the length must be a multiple of the max size */
2082 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2083 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2084 "curlen=%d\n", curlen));
2085 #ifdef DIAGNOSTIC
2086 if (curlen == 0)
2087 panic("ehci_alloc_std: curlen == 0\n");
2088 #endif
2089 }
2090 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2091 "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2092 dataphys, dataphyslastpage,
2093 len, curlen));
2094 len -= curlen;
2095
2096 if (len != 0) {
2097 next = ehci_alloc_sqtd(sc);
2098 if (next == NULL)
2099 goto nomem;
2100 nextphys = next->physaddr;
2101 } else {
2102 next = NULL;
2103 nextphys = EHCI_NULL;
2104 }
2105
2106 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2107 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2108 if (i != 0) /* use offset only in first buffer */
2109 a = EHCI_PAGE(a);
2110 cur->qtd.qtd_buffer[i] = htole32(a);
2111 #ifdef DIAGNOSTIC
2112 if (i >= EHCI_QTD_NBUFFERS) {
2113 printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2114 goto nomem;
2115 }
2116 #endif
2117 }
2118 cur->nextqtd = next;
2119 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2120 cur->qtd.qtd_status =
2121 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2122 cur->xfer = xfer;
2123 cur->len = curlen;
2124 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x be=0x%08x\n",
2125 dataphys, dataphys + curlen - 1));
2126 if (len == 0)
2127 break;
2128 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2129 dataphys += curlen;
2130 cur = next;
2131 }
2132 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2133 *ep = cur;
2134
2135 return (USBD_NORMAL_COMPLETION);
2136
2137 nomem:
2138 /* XXX free chain */
2139 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2140 return (USBD_NOMEM);
2141 }
2142
2143 Static void
2144 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2145 ehci_soft_qtd_t *sqtdend)
2146 {
2147 ehci_soft_qtd_t *p;
2148 int i;
2149
2150 for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2151 p = sqtd->nextqtd;
2152 ehci_free_sqtd(sc, sqtd);
2153 }
2154 }
2155
2156 /****************/
2157
2158 /*
2159 * Close a reqular pipe.
2160 * Assumes that there are no pending transactions.
2161 */
2162 void
2163 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2164 {
2165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2166 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2167 ehci_soft_qh_t *sqh = epipe->sqh;
2168 int s;
2169
2170 s = splusb();
2171 ehci_rem_qh(sc, sqh, head);
2172 splx(s);
2173 ehci_free_sqh(sc, epipe->sqh);
2174 }
2175
2176 /*
2177 * Abort a device request.
2178 * If this routine is called at splusb() it guarantees that the request
2179 * will be removed from the hardware scheduling and that the callback
2180 * for it will be called with USBD_CANCELLED status.
2181 * It's impossible to guarantee that the requested transfer will not
2182 * have happened since the hardware runs concurrently.
2183 * If the transaction has already happened we rely on the ordinary
2184 * interrupt processing to process it.
2185 * XXX This is most probably wrong.
2186 */
2187 void
2188 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2189 {
2190 #define exfer EXFER(xfer)
2191 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2192 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2193 ehci_soft_qh_t *sqh = epipe->sqh;
2194 ehci_soft_qtd_t *sqtd;
2195 ehci_physaddr_t cur;
2196 u_int32_t qhstatus;
2197 int s;
2198 int hit;
2199
2200 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2201
2202 if (sc->sc_dying) {
2203 /* If we're dying, just do the software part. */
2204 s = splusb();
2205 xfer->status = status; /* make software ignore it */
2206 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2207 usb_transfer_complete(xfer);
2208 splx(s);
2209 return;
2210 }
2211
2212 if (xfer->device->bus->intr_context || !curproc)
2213 panic("ehci_abort_xfer: not in process context\n");
2214
2215 /*
2216 * Step 1: Make interrupt routine and hardware ignore xfer.
2217 */
2218 s = splusb();
2219 xfer->status = status; /* make software ignore it */
2220 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2221 qhstatus = sqh->qh.qh_qtd.qtd_status;
2222 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2223 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2224 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2225 if (sqtd == exfer->sqtdend)
2226 break;
2227 }
2228 splx(s);
2229
2230 /*
2231 * Step 2: Wait until we know hardware has finished any possible
2232 * use of the xfer. Also make sure the soft interrupt routine
2233 * has run.
2234 */
2235 ehci_sync_hc(sc);
2236 /* XXX should have some communication with softintr() to know
2237 when it's done */
2238 usb_delay_ms(epipe->pipe.device->bus, 250);
2239
2240 /*
2241 * Step 3: Remove any vestiges of the xfer from the hardware.
2242 * The complication here is that the hardware may have executed
2243 * beyond the xfer we're trying to abort. So as we're scanning
2244 * the TDs of this xfer we check if the hardware points to
2245 * any of them.
2246 */
2247 s = splusb(); /* XXX why? */
2248 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2249 hit = 0;
2250 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2251 hit |= cur == sqtd->physaddr;
2252 if (sqtd == exfer->sqtdend)
2253 break;
2254 }
2255 sqtd = sqtd->nextqtd;
2256 /* Zap curqtd register if hardware pointed inside the xfer. */
2257 if (hit && sqtd != NULL) {
2258 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2259 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2260 sqh->qh.qh_qtd.qtd_status = qhstatus;
2261 } else {
2262 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2263 }
2264
2265 /*
2266 * Step 4: Execute callback.
2267 */
2268 #ifdef DIAGNOSTIC
2269 exfer->isdone = 1;
2270 #endif
2271 usb_transfer_complete(xfer);
2272
2273 splx(s);
2274 #undef exfer
2275 }
2276
2277 void
2278 ehci_timeout(void *addr)
2279 {
2280 struct ehci_xfer *exfer = addr;
2281 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2282 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2283
2284 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2285 #ifdef USB_DEBUG
2286 if (ehcidebug > 1)
2287 usbd_dump_pipe(exfer->xfer.pipe);
2288 #endif
2289
2290 if (sc->sc_dying) {
2291 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2292 return;
2293 }
2294
2295 /* Execute the abort in a process context. */
2296 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2297 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2298 }
2299
2300 void
2301 ehci_timeout_task(void *addr)
2302 {
2303 usbd_xfer_handle xfer = addr;
2304 int s;
2305
2306 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2307
2308 s = splusb();
2309 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2310 splx(s);
2311 }
2312
2313 /************************/
2314
2315 Static usbd_status
2316 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2317 {
2318 usbd_status err;
2319
2320 /* Insert last in queue. */
2321 err = usb_insert_transfer(xfer);
2322 if (err)
2323 return (err);
2324
2325 /* Pipe isn't running, start first */
2326 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2327 }
2328
2329 Static usbd_status
2330 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2331 {
2332 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2333 usbd_status err;
2334
2335 if (sc->sc_dying)
2336 return (USBD_IOERROR);
2337
2338 #ifdef DIAGNOSTIC
2339 if (!(xfer->rqflags & URQ_REQUEST)) {
2340 /* XXX panic */
2341 printf("ehci_device_ctrl_transfer: not a request\n");
2342 return (USBD_INVAL);
2343 }
2344 #endif
2345
2346 err = ehci_device_request(xfer);
2347 if (err)
2348 return (err);
2349
2350 if (sc->sc_bus.use_polling)
2351 ehci_waitintr(sc, xfer);
2352 return (USBD_IN_PROGRESS);
2353 }
2354
2355 void
2356 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2357 {
2358 struct ehci_xfer *ex = EXFER(xfer);
2359 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2360 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2361
2362 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2363
2364 #ifdef DIAGNOSTIC
2365 if (!(xfer->rqflags & URQ_REQUEST)) {
2366 panic("ehci_ctrl_done: not a request\n");
2367 }
2368 #endif
2369
2370 if (xfer->status != USBD_NOMEM) {
2371 ehci_del_intr_list(ex); /* remove from active list */
2372 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2373 }
2374
2375 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2376 }
2377
2378 /* Abort a device control request. */
2379 Static void
2380 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2381 {
2382 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2383 ehci_abort_xfer(xfer, USBD_CANCELLED);
2384 }
2385
2386 /* Close a device control pipe. */
2387 Static void
2388 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2389 {
2390 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2391 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2392
2393 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2394 ehci_close_pipe(pipe, sc->sc_async_head);
2395 }
2396
2397 usbd_status
2398 ehci_device_request(usbd_xfer_handle xfer)
2399 {
2400 #define exfer EXFER(xfer)
2401 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2402 usb_device_request_t *req = &xfer->request;
2403 usbd_device_handle dev = epipe->pipe.device;
2404 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2405 int addr = dev->address;
2406 ehci_soft_qtd_t *setup, *stat, *next;
2407 ehci_soft_qh_t *sqh;
2408 int isread;
2409 int len;
2410 usbd_status err;
2411 int s;
2412
2413 isread = req->bmRequestType & UT_READ;
2414 len = UGETW(req->wLength);
2415
2416 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2417 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2418 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2419 UGETW(req->wIndex), len, addr,
2420 epipe->pipe.endpoint->edesc->bEndpointAddress));
2421
2422 setup = ehci_alloc_sqtd(sc);
2423 if (setup == NULL) {
2424 err = USBD_NOMEM;
2425 goto bad1;
2426 }
2427 stat = ehci_alloc_sqtd(sc);
2428 if (stat == NULL) {
2429 err = USBD_NOMEM;
2430 goto bad2;
2431 }
2432
2433 sqh = epipe->sqh;
2434 epipe->u.ctl.length = len;
2435
2436 /* XXX
2437 * Since we're messing with the QH we must know the HC is in sync.
2438 * This needs to go away since it slows down control transfers.
2439 * Removing it entails:
2440 * - fill the QH only once with addr & wMaxPacketSize
2441 * - put the correct data toggles in the qtds and set DTC
2442 */
2443 /* ehci_sync_hc(sc); */
2444 /* Update device address and length since they may have changed. */
2445 /* XXX This only needs to be done once, but it's too early in open. */
2446 /* XXXX Should not touch ED here! */
2447 sqh->qh.qh_endp =
2448 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2449 htole32(
2450 EHCI_QH_SET_ADDR(addr) |
2451 /* EHCI_QH_DTC | */
2452 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2453 );
2454 /* Clear toggle */
2455 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2456
2457 /* Set up data transaction */
2458 if (len != 0) {
2459 ehci_soft_qtd_t *end;
2460
2461 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2462 &next, &end);
2463 if (err)
2464 goto bad3;
2465 end->nextqtd = stat;
2466 end->qtd.qtd_next =
2467 end->qtd.qtd_altnext = htole32(stat->physaddr);
2468 /* Start toggle at 1. */
2469 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2470 } else {
2471 next = stat;
2472 }
2473
2474 memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
2475
2476 setup->qtd.qtd_status = htole32(
2477 EHCI_QTD_ACTIVE |
2478 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2479 EHCI_QTD_SET_CERR(3) |
2480 EHCI_QTD_SET_BYTES(sizeof *req)
2481 );
2482 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2483 setup->nextqtd = next;
2484 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2485 setup->xfer = xfer;
2486 setup->len = sizeof *req;
2487
2488 stat->qtd.qtd_status = htole32(
2489 EHCI_QTD_ACTIVE |
2490 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2491 EHCI_QTD_SET_CERR(3) |
2492 EHCI_QTD_IOC
2493 );
2494 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2495 stat->nextqtd = NULL;
2496 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2497 stat->xfer = xfer;
2498 stat->len = 0;
2499
2500 #ifdef EHCI_DEBUG
2501 if (ehcidebug > 5) {
2502 DPRINTF(("ehci_device_request:\n"));
2503 ehci_dump_sqh(sqh);
2504 ehci_dump_sqtds(setup);
2505 }
2506 #endif
2507
2508 exfer->sqtdstart = setup;
2509 exfer->sqtdend = stat;
2510 #ifdef DIAGNOSTIC
2511 if (!exfer->isdone) {
2512 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2513 }
2514 exfer->isdone = 0;
2515 #endif
2516
2517 /* Insert qTD in QH list. */
2518 s = splusb();
2519 ehci_set_qh_qtd(sqh, setup);
2520 if (xfer->timeout && !sc->sc_bus.use_polling) {
2521 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2522 ehci_timeout, xfer);
2523 }
2524 ehci_add_intr_list(sc, exfer);
2525 xfer->status = USBD_IN_PROGRESS;
2526 splx(s);
2527
2528 #ifdef EHCI_DEBUG
2529 if (ehcidebug > 10) {
2530 DPRINTF(("ehci_device_request: status=%x\n",
2531 EOREAD4(sc, EHCI_USBSTS)));
2532 delay(10000);
2533 ehci_dump_regs(sc);
2534 ehci_dump_sqh(sc->sc_async_head);
2535 ehci_dump_sqh(sqh);
2536 ehci_dump_sqtds(setup);
2537 }
2538 #endif
2539
2540 return (USBD_NORMAL_COMPLETION);
2541
2542 bad3:
2543 ehci_free_sqtd(sc, stat);
2544 bad2:
2545 ehci_free_sqtd(sc, setup);
2546 bad1:
2547 DPRINTFN(-1,("ehci_device_request: no memory\n"));
2548 xfer->status = err;
2549 usb_transfer_complete(xfer);
2550 return (err);
2551 #undef exfer
2552 }
2553
2554 /************************/
2555
2556 Static usbd_status
2557 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2558 {
2559 usbd_status err;
2560
2561 /* Insert last in queue. */
2562 err = usb_insert_transfer(xfer);
2563 if (err)
2564 return (err);
2565
2566 /* Pipe isn't running, start first */
2567 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2568 }
2569
2570 usbd_status
2571 ehci_device_bulk_start(usbd_xfer_handle xfer)
2572 {
2573 #define exfer EXFER(xfer)
2574 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2575 usbd_device_handle dev = epipe->pipe.device;
2576 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2577 ehci_soft_qtd_t *data, *dataend;
2578 ehci_soft_qh_t *sqh;
2579 usbd_status err;
2580 int len, isread, endpt;
2581 int s;
2582
2583 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2584 xfer, xfer->length, xfer->flags));
2585
2586 if (sc->sc_dying)
2587 return (USBD_IOERROR);
2588
2589 #ifdef DIAGNOSTIC
2590 if (xfer->rqflags & URQ_REQUEST)
2591 panic("ehci_device_bulk_transfer: a request\n");
2592 #endif
2593
2594 len = xfer->length;
2595 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2596 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2597 sqh = epipe->sqh;
2598
2599 epipe->u.bulk.length = len;
2600
2601 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2602 &dataend);
2603 if (err) {
2604 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2605 xfer->status = err;
2606 usb_transfer_complete(xfer);
2607 return (err);
2608 }
2609
2610 #ifdef EHCI_DEBUG
2611 if (ehcidebug > 5) {
2612 DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2613 ehci_dump_sqh(sqh);
2614 ehci_dump_sqtds(data);
2615 }
2616 #endif
2617
2618 /* Set up interrupt info. */
2619 exfer->sqtdstart = data;
2620 exfer->sqtdend = dataend;
2621 #ifdef DIAGNOSTIC
2622 if (!exfer->isdone) {
2623 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2624 }
2625 exfer->isdone = 0;
2626 #endif
2627
2628 s = splusb();
2629 ehci_set_qh_qtd(sqh, data);
2630 if (xfer->timeout && !sc->sc_bus.use_polling) {
2631 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2632 ehci_timeout, xfer);
2633 }
2634 ehci_add_intr_list(sc, exfer);
2635 xfer->status = USBD_IN_PROGRESS;
2636 splx(s);
2637
2638 #ifdef EHCI_DEBUG
2639 if (ehcidebug > 10) {
2640 DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2641 delay(10000);
2642 ehci_dump_regs(sc);
2643 ehci_dump_sqh(sc->sc_async_head);
2644 ehci_dump_sqh(sqh);
2645 ehci_dump_sqtds(data);
2646 }
2647 #endif
2648
2649 if (sc->sc_bus.use_polling)
2650 ehci_waitintr(sc, xfer);
2651
2652 return (USBD_IN_PROGRESS);
2653 #undef exfer
2654 }
2655
2656 Static void
2657 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2658 {
2659 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2660 ehci_abort_xfer(xfer, USBD_CANCELLED);
2661 }
2662
2663 /*
2664 * Close a device bulk pipe.
2665 */
2666 Static void
2667 ehci_device_bulk_close(usbd_pipe_handle pipe)
2668 {
2669 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2670
2671 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2672 ehci_close_pipe(pipe, sc->sc_async_head);
2673 }
2674
2675 void
2676 ehci_device_bulk_done(usbd_xfer_handle xfer)
2677 {
2678 struct ehci_xfer *ex = EXFER(xfer);
2679 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2680 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2681
2682 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2683 xfer, xfer->actlen));
2684
2685 if (xfer->status != USBD_NOMEM) {
2686 ehci_del_intr_list(ex); /* remove from active list */
2687 ehci_free_sqtd_chain(sc, ex->sqtdstart, 0);
2688 }
2689
2690 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2691 }
2692
2693 /************************/
2694
2695 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2696 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2697 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2698 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2699 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2700
2701 /************************/
2702
2703 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2704 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2705 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2706 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2707 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2708