ehci.c revision 1.38
1 /* $NetBSD: ehci.c,v 1.38 2002/11/09 08:59:46 martin Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart (at) augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/data/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.38 2002/11/09 08:59:46 martin Exp $"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <machine/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ehcireg.h> 76 #include <dev/usb/ehcivar.h> 77 78 #ifdef EHCI_DEBUG 79 #define DPRINTF(x) if (ehcidebug) printf x 80 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 81 int ehcidebug = 0; 82 #ifndef __NetBSD__ 83 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 84 #endif 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 struct ehci_pipe { 91 struct usbd_pipe pipe; 92 ehci_soft_qh_t *sqh; 93 union { 94 ehci_soft_qtd_t *qtd; 95 /* ehci_soft_itd_t *itd; */ 96 } tail; 97 union { 98 /* Control pipe */ 99 struct { 100 usb_dma_t reqdma; 101 u_int length; 102 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 103 } ctl; 104 /* Interrupt pipe */ 105 /* XXX */ 106 /* Bulk pipe */ 107 struct { 108 u_int length; 109 } bulk; 110 /* Iso pipe */ 111 /* XXX */ 112 } u; 113 }; 114 115 Static void ehci_shutdown(void *); 116 Static void ehci_power(int, void *); 117 118 Static usbd_status ehci_open(usbd_pipe_handle); 119 Static void ehci_poll(struct usbd_bus *); 120 Static void ehci_softintr(void *); 121 Static int ehci_intr1(ehci_softc_t *); 122 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 123 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 124 Static void ehci_idone(struct ehci_xfer *); 125 Static void ehci_timeout(void *); 126 Static void ehci_timeout_task(void *); 127 128 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 129 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 130 131 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 132 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 133 134 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 135 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 136 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 137 Static void ehci_root_ctrl_close(usbd_pipe_handle); 138 Static void ehci_root_ctrl_done(usbd_xfer_handle); 139 140 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 141 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 142 Static void ehci_root_intr_abort(usbd_xfer_handle); 143 Static void ehci_root_intr_close(usbd_pipe_handle); 144 Static void ehci_root_intr_done(usbd_xfer_handle); 145 146 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 147 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 148 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 149 Static void ehci_device_ctrl_close(usbd_pipe_handle); 150 Static void ehci_device_ctrl_done(usbd_xfer_handle); 151 152 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 154 Static void ehci_device_bulk_abort(usbd_xfer_handle); 155 Static void ehci_device_bulk_close(usbd_pipe_handle); 156 Static void ehci_device_bulk_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 160 Static void ehci_device_intr_abort(usbd_xfer_handle); 161 Static void ehci_device_intr_close(usbd_pipe_handle); 162 Static void ehci_device_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 166 Static void ehci_device_isoc_abort(usbd_xfer_handle); 167 Static void ehci_device_isoc_close(usbd_pipe_handle); 168 Static void ehci_device_isoc_done(usbd_xfer_handle); 169 170 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 171 Static void ehci_noop(usbd_pipe_handle pipe); 172 173 Static int ehci_str(usb_string_descriptor_t *, int, char *); 174 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 175 Static void ehci_pcd_able(ehci_softc_t *, int); 176 Static void ehci_pcd_enable(void *); 177 Static void ehci_disown(ehci_softc_t *, int, int); 178 179 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 180 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 181 182 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 183 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 184 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 185 ehci_softc_t *, int, int, usbd_xfer_handle, 186 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 187 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 188 ehci_soft_qtd_t *); 189 190 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 191 192 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 193 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 194 ehci_soft_qh_t *); 195 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 196 Static void ehci_sync_hc(ehci_softc_t *); 197 198 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 199 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 200 201 #ifdef EHCI_DEBUG 202 Static void ehci_dump_regs(ehci_softc_t *); 203 Static ehci_softc_t *theehci; 204 Static void ehci_dump_link(ehci_link_t, int); 205 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 206 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 207 Static void ehci_dump_qtd(ehci_qtd_t *); 208 Static void ehci_dump_sqh(ehci_soft_qh_t *); 209 #ifdef DIAGNOSTIC 210 Static void ehci_dump_exfer(struct ehci_xfer *); 211 #endif 212 #endif 213 214 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 215 216 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 217 218 #define EHCI_INTR_ENDPT 1 219 220 #define ehci_add_intr_list(sc, ex) \ 221 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 222 #define ehci_del_intr_list(ex) \ 223 LIST_REMOVE((ex), inext) 224 225 Static struct usbd_bus_methods ehci_bus_methods = { 226 ehci_open, 227 ehci_softintr, 228 ehci_poll, 229 ehci_allocm, 230 ehci_freem, 231 ehci_allocx, 232 ehci_freex, 233 }; 234 235 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 236 ehci_root_ctrl_transfer, 237 ehci_root_ctrl_start, 238 ehci_root_ctrl_abort, 239 ehci_root_ctrl_close, 240 ehci_noop, 241 ehci_root_ctrl_done, 242 }; 243 244 Static struct usbd_pipe_methods ehci_root_intr_methods = { 245 ehci_root_intr_transfer, 246 ehci_root_intr_start, 247 ehci_root_intr_abort, 248 ehci_root_intr_close, 249 ehci_noop, 250 ehci_root_intr_done, 251 }; 252 253 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 254 ehci_device_ctrl_transfer, 255 ehci_device_ctrl_start, 256 ehci_device_ctrl_abort, 257 ehci_device_ctrl_close, 258 ehci_noop, 259 ehci_device_ctrl_done, 260 }; 261 262 Static struct usbd_pipe_methods ehci_device_intr_methods = { 263 ehci_device_intr_transfer, 264 ehci_device_intr_start, 265 ehci_device_intr_abort, 266 ehci_device_intr_close, 267 ehci_device_clear_toggle, 268 ehci_device_intr_done, 269 }; 270 271 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 272 ehci_device_bulk_transfer, 273 ehci_device_bulk_start, 274 ehci_device_bulk_abort, 275 ehci_device_bulk_close, 276 ehci_device_clear_toggle, 277 ehci_device_bulk_done, 278 }; 279 280 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 281 ehci_device_isoc_transfer, 282 ehci_device_isoc_start, 283 ehci_device_isoc_abort, 284 ehci_device_isoc_close, 285 ehci_noop, 286 ehci_device_isoc_done, 287 }; 288 289 usbd_status 290 ehci_init(ehci_softc_t *sc) 291 { 292 u_int32_t version, sparams, cparams, hcr; 293 u_int i; 294 usbd_status err; 295 ehci_soft_qh_t *sqh; 296 297 DPRINTF(("ehci_init: start\n")); 298 #ifdef EHCI_DEBUG 299 theehci = sc; 300 #endif 301 302 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 303 304 version = EREAD2(sc, EHCI_HCIVERSION); 305 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 306 version >> 8, version & 0xff); 307 308 sparams = EREAD4(sc, EHCI_HCSPARAMS); 309 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 310 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 311 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 312 printf("%s: wrong number of companions (%d != %d)\n", 313 USBDEVNAME(sc->sc_bus.bdev), 314 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 315 return (USBD_IOERROR); 316 } 317 if (sc->sc_ncomp > 0) { 318 printf("%s: companion controller%s, %d port%s each:", 319 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 320 EHCI_HCS_N_PCC(sparams), 321 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 322 for (i = 0; i < sc->sc_ncomp; i++) 323 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 324 printf("\n"); 325 } 326 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 327 cparams = EREAD4(sc, EHCI_HCCPARAMS); 328 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 329 330 if (EHCI_HCC_64BIT(cparams)) { 331 /* MUST clear segment register if 64 bit capable. */ 332 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 333 } 334 335 sc->sc_bus.usbrev = USBREV_2_0; 336 337 /* Reset the controller */ 338 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 339 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 340 usb_delay_ms(&sc->sc_bus, 1); 341 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 342 for (i = 0; i < 100; i++) { 343 usb_delay_ms(&sc->sc_bus, 1); 344 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 345 if (!hcr) 346 break; 347 } 348 if (hcr) { 349 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 350 return (USBD_IOERROR); 351 } 352 353 /* frame list size at default, read back what we got and use that */ 354 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 355 case 0: sc->sc_flsize = 1024*4; break; 356 case 1: sc->sc_flsize = 512*4; break; 357 case 2: sc->sc_flsize = 256*4; break; 358 case 3: return (USBD_IOERROR); 359 } 360 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 361 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 362 if (err) 363 return (err); 364 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 365 366 /* Set up the bus struct. */ 367 sc->sc_bus.methods = &ehci_bus_methods; 368 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 369 370 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 371 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 372 373 sc->sc_eintrs = EHCI_NORMAL_INTRS; 374 375 /* Allocate dummy QH that starts the async list. */ 376 sqh = ehci_alloc_sqh(sc); 377 if (sqh == NULL) { 378 err = USBD_NOMEM; 379 goto bad1; 380 } 381 /* Fill the QH */ 382 sqh->qh.qh_endp = 383 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 384 sqh->qh.qh_link = 385 htole32(sqh->physaddr | EHCI_LINK_QH); 386 sqh->qh.qh_curqtd = EHCI_NULL; 387 sqh->next = NULL; 388 /* Fill the overlay qTD */ 389 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 390 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 391 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 392 sqh->sqtd = NULL; 393 #ifdef EHCI_DEBUG 394 if (ehcidebug) { 395 ehci_dump_sqh(sqh); 396 } 397 #endif 398 399 /* Point to async list */ 400 sc->sc_async_head = sqh; 401 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 402 403 usb_callout_init(sc->sc_tmo_pcd); 404 405 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 406 407 /* Enable interrupts */ 408 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 409 410 /* Turn on controller */ 411 EOWRITE4(sc, EHCI_USBCMD, 412 EHCI_CMD_ITC_8 | /* 8 microframes */ 413 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 414 EHCI_CMD_ASE | 415 /* EHCI_CMD_PSE | */ 416 EHCI_CMD_RS); 417 418 /* Take over port ownership */ 419 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 420 421 for (i = 0; i < 100; i++) { 422 usb_delay_ms(&sc->sc_bus, 1); 423 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 424 if (!hcr) 425 break; 426 } 427 if (hcr) { 428 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 429 return (USBD_IOERROR); 430 } 431 432 return (USBD_NORMAL_COMPLETION); 433 434 #if 0 435 bad2: 436 ehci_free_sqh(sc, sc->sc_async_head); 437 #endif 438 bad1: 439 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 440 return (err); 441 } 442 443 int 444 ehci_intr(void *v) 445 { 446 ehci_softc_t *sc = v; 447 448 if (sc == NULL || sc->sc_dying) 449 return (0); 450 451 /* If we get an interrupt while polling, then just ignore it. */ 452 if (sc->sc_bus.use_polling) { 453 #ifdef DIAGNOSTIC 454 printf("ehci_intr: ignored interrupt while polling\n"); 455 #endif 456 return (0); 457 } 458 459 return (ehci_intr1(sc)); 460 } 461 462 Static int 463 ehci_intr1(ehci_softc_t *sc) 464 { 465 u_int32_t intrs, eintrs; 466 467 DPRINTFN(20,("ehci_intr1: enter\n")); 468 469 /* In case the interrupt occurs before initialization has completed. */ 470 if (sc == NULL) { 471 #ifdef DIAGNOSTIC 472 printf("ehci_intr: sc == NULL\n"); 473 #endif 474 return (0); 475 } 476 477 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 478 479 if (!intrs) 480 return (0); 481 482 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 483 eintrs = intrs & sc->sc_eintrs; 484 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 485 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 486 (u_int)eintrs)); 487 if (!eintrs) 488 return (0); 489 490 sc->sc_bus.intr_context++; 491 sc->sc_bus.no_intrs++; 492 if (eintrs & EHCI_STS_IAA) { 493 DPRINTF(("ehci_intr1: door bell\n")); 494 wakeup(&sc->sc_async_head); 495 eintrs &= ~EHCI_STS_IAA; 496 } 497 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 498 DPRINTF(("ehci_intr1: %s %s\n", 499 eintrs & EHCI_STS_INT ? "INT" : "", 500 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 501 usb_schedsoftintr(&sc->sc_bus); 502 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 503 } 504 if (eintrs & EHCI_STS_HSE) { 505 printf("%s: unrecoverable error, controller halted\n", 506 USBDEVNAME(sc->sc_bus.bdev)); 507 /* XXX what else */ 508 } 509 if (eintrs & EHCI_STS_PCD) { 510 ehci_pcd(sc, sc->sc_intrxfer); 511 /* 512 * Disable PCD interrupt for now, because it will be 513 * on until the port has been reset. 514 */ 515 ehci_pcd_able(sc, 0); 516 /* Do not allow RHSC interrupts > 1 per second */ 517 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 518 eintrs &= ~EHCI_STS_PCD; 519 } 520 521 sc->sc_bus.intr_context--; 522 523 if (eintrs != 0) { 524 /* Block unprocessed interrupts. */ 525 sc->sc_eintrs &= ~eintrs; 526 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 527 printf("%s: blocking intrs 0x%x\n", 528 USBDEVNAME(sc->sc_bus.bdev), eintrs); 529 } 530 531 return (1); 532 } 533 534 void 535 ehci_pcd_able(ehci_softc_t *sc, int on) 536 { 537 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 538 if (on) 539 sc->sc_eintrs |= EHCI_STS_PCD; 540 else 541 sc->sc_eintrs &= ~EHCI_STS_PCD; 542 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 543 } 544 545 void 546 ehci_pcd_enable(void *v_sc) 547 { 548 ehci_softc_t *sc = v_sc; 549 550 ehci_pcd_able(sc, 1); 551 } 552 553 void 554 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 555 { 556 usbd_pipe_handle pipe; 557 struct ehci_pipe *epipe; 558 u_char *p; 559 int i, m; 560 561 if (xfer == NULL) { 562 /* Just ignore the change. */ 563 return; 564 } 565 566 pipe = xfer->pipe; 567 epipe = (struct ehci_pipe *)pipe; 568 569 p = KERNADDR(&xfer->dmabuf, 0); 570 m = min(sc->sc_noport, xfer->length * 8 - 1); 571 memset(p, 0, xfer->length); 572 for (i = 1; i <= m; i++) { 573 /* Pick out CHANGE bits from the status reg. */ 574 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 575 p[i/8] |= 1 << (i%8); 576 } 577 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 578 xfer->actlen = xfer->length; 579 xfer->status = USBD_NORMAL_COMPLETION; 580 581 usb_transfer_complete(xfer); 582 } 583 584 void 585 ehci_softintr(void *v) 586 { 587 ehci_softc_t *sc = v; 588 struct ehci_xfer *ex; 589 590 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 591 sc->sc_bus.intr_context)); 592 593 sc->sc_bus.intr_context++; 594 595 /* 596 * The only explanation I can think of for why EHCI is as brain dead 597 * as UHCI interrupt-wise is that Intel was involved in both. 598 * An interrupt just tells us that something is done, we have no 599 * clue what, so we need to scan through all active transfers. :-( 600 */ 601 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 602 ehci_check_intr(sc, ex); 603 604 if (sc->sc_softwake) { 605 sc->sc_softwake = 0; 606 wakeup(&sc->sc_softwake); 607 } 608 609 sc->sc_bus.intr_context--; 610 } 611 612 /* Check for an interrupt. */ 613 void 614 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 615 { 616 ehci_soft_qtd_t *sqtd, *lsqtd; 617 u_int32_t status; 618 619 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 620 621 if (ex->sqtdstart == NULL) { 622 printf("ehci_check_intr: sqtdstart=NULL\n"); 623 return; 624 } 625 lsqtd = ex->sqtdend; 626 #ifdef DIAGNOSTIC 627 if (lsqtd == NULL) { 628 printf("ehci_check_intr: sqtd==0\n"); 629 return; 630 } 631 #endif 632 /* 633 * If the last TD is still active we need to check whether there 634 * is a an error somewhere in the middle, or whether there was a 635 * short packet (SPD and not ACTIVE). 636 */ 637 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 638 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 639 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 640 status = le32toh(sqtd->qtd.qtd_status); 641 /* If there's an active QTD the xfer isn't done. */ 642 if (status & EHCI_QTD_ACTIVE) 643 break; 644 /* Any kind of error makes the xfer done. */ 645 if (status & EHCI_QTD_HALTED) 646 goto done; 647 /* We want short packets, and it is short: it's done */ 648 if (EHCI_QTD_SET_BYTES(status) != 0) 649 goto done; 650 } 651 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 652 ex, ex->sqtdstart)); 653 return; 654 } 655 done: 656 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 657 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 658 ehci_idone(ex); 659 } 660 661 void 662 ehci_idone(struct ehci_xfer *ex) 663 { 664 usbd_xfer_handle xfer = &ex->xfer; 665 #ifdef EHCI_DEBUG 666 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 667 #endif 668 ehci_soft_qtd_t *sqtd; 669 u_int32_t status = 0, nstatus; 670 int actlen; 671 672 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 673 #ifdef DIAGNOSTIC 674 { 675 int s = splhigh(); 676 if (ex->isdone) { 677 splx(s); 678 #ifdef EHCI_DEBUG 679 printf("ehci_idone: ex is done!\n "); 680 ehci_dump_exfer(ex); 681 #else 682 printf("ehci_idone: ex=%p is done!\n", ex); 683 #endif 684 return; 685 } 686 ex->isdone = 1; 687 splx(s); 688 } 689 #endif 690 691 if (xfer->status == USBD_CANCELLED || 692 xfer->status == USBD_TIMEOUT) { 693 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 694 return; 695 } 696 697 #ifdef EHCI_DEBUG 698 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 699 if (ehcidebug > 10) 700 ehci_dump_sqtds(ex->sqtdstart); 701 #endif 702 703 /* The transfer is done, compute actual length and status. */ 704 actlen = 0; 705 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 706 nstatus = le32toh(sqtd->qtd.qtd_status); 707 if (nstatus & EHCI_QTD_ACTIVE) 708 break; 709 710 status = nstatus; 711 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 712 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 713 } 714 715 /* If there are left over TDs we need to update the toggle. */ 716 if (sqtd != NULL) { 717 if (!(xfer->rqflags & URQ_REQUEST)) 718 printf("ehci_idone: need toggle update\n"); 719 #if 0 720 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 721 #endif 722 } 723 724 status &= EHCI_QTD_STATERRS; 725 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 726 xfer->length, actlen, status)); 727 xfer->actlen = actlen; 728 if (status != 0) { 729 #ifdef EHCI_DEBUG 730 char sbuf[128]; 731 732 bitmask_snprintf((u_int32_t)status, 733 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 734 "\7HALTED", 735 sbuf, sizeof(sbuf)); 736 737 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 738 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 739 "status 0x%s\n", 740 xfer->pipe->device->address, 741 xfer->pipe->endpoint->edesc->bEndpointAddress, 742 sbuf)); 743 if (ehcidebug > 2) { 744 ehci_dump_sqh(epipe->sqh); 745 ehci_dump_sqtds(ex->sqtdstart); 746 } 747 #endif 748 if (status == EHCI_QTD_HALTED) 749 xfer->status = USBD_STALLED; 750 else 751 xfer->status = USBD_IOERROR; /* more info XXX */ 752 } else { 753 xfer->status = USBD_NORMAL_COMPLETION; 754 } 755 756 usb_transfer_complete(xfer); 757 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 758 } 759 760 /* 761 * Wait here until controller claims to have an interrupt. 762 * Then call ehci_intr and return. Use timeout to avoid waiting 763 * too long. 764 */ 765 void 766 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 767 { 768 int timo = xfer->timeout; 769 int usecs; 770 u_int32_t intrs; 771 772 xfer->status = USBD_IN_PROGRESS; 773 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 774 usb_delay_ms(&sc->sc_bus, 1); 775 if (sc->sc_dying) 776 break; 777 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 778 sc->sc_eintrs; 779 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 780 #ifdef OHCI_DEBUG 781 if (ehcidebug > 15) 782 ehci_dump_regs(sc); 783 #endif 784 if (intrs) { 785 ehci_intr1(sc); 786 if (xfer->status != USBD_IN_PROGRESS) 787 return; 788 } 789 } 790 791 /* Timeout */ 792 DPRINTF(("ehci_waitintr: timeout\n")); 793 xfer->status = USBD_TIMEOUT; 794 usb_transfer_complete(xfer); 795 /* XXX should free TD */ 796 } 797 798 void 799 ehci_poll(struct usbd_bus *bus) 800 { 801 ehci_softc_t *sc = (ehci_softc_t *)bus; 802 #ifdef EHCI_DEBUG 803 static int last; 804 int new; 805 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 806 if (new != last) { 807 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 808 last = new; 809 } 810 #endif 811 812 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 813 ehci_intr1(sc); 814 } 815 816 int 817 ehci_detach(struct ehci_softc *sc, int flags) 818 { 819 int rv = 0; 820 821 if (sc->sc_child != NULL) 822 rv = config_detach(sc->sc_child, flags); 823 824 if (rv != 0) 825 return (rv); 826 827 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 828 829 if (sc->sc_powerhook != NULL) 830 powerhook_disestablish(sc->sc_powerhook); 831 if (sc->sc_shutdownhook != NULL) 832 shutdownhook_disestablish(sc->sc_shutdownhook); 833 834 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 835 836 /* XXX free other data structures XXX */ 837 838 return (rv); 839 } 840 841 842 int 843 ehci_activate(device_ptr_t self, enum devact act) 844 { 845 struct ehci_softc *sc = (struct ehci_softc *)self; 846 int rv = 0; 847 848 switch (act) { 849 case DVACT_ACTIVATE: 850 return (EOPNOTSUPP); 851 break; 852 853 case DVACT_DEACTIVATE: 854 if (sc->sc_child != NULL) 855 rv = config_deactivate(sc->sc_child); 856 sc->sc_dying = 1; 857 break; 858 } 859 return (rv); 860 } 861 862 /* 863 * Handle suspend/resume. 864 * 865 * We need to switch to polling mode here, because this routine is 866 * called from an intterupt context. This is all right since we 867 * are almost suspended anyway. 868 */ 869 void 870 ehci_power(int why, void *v) 871 { 872 ehci_softc_t *sc = v; 873 //u_int32_t ctl; 874 int s; 875 876 #ifdef EHCI_DEBUG 877 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 878 ehci_dump_regs(sc); 879 #endif 880 881 s = splhardusb(); 882 switch (why) { 883 case PWR_SUSPEND: 884 case PWR_STANDBY: 885 sc->sc_bus.use_polling++; 886 #if 0 887 OOO 888 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 889 if (sc->sc_control == 0) { 890 /* 891 * Preserve register values, in case that APM BIOS 892 * does not recover them. 893 */ 894 sc->sc_control = ctl; 895 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 896 } 897 ctl |= EHCI_HCFS_SUSPEND; 898 OWRITE4(sc, EHCI_CONTROL, ctl); 899 #endif 900 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 901 sc->sc_bus.use_polling--; 902 break; 903 case PWR_RESUME: 904 sc->sc_bus.use_polling++; 905 #if 0 906 OOO 907 /* Some broken BIOSes do not recover these values */ 908 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 909 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 910 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 911 if (sc->sc_intre) 912 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 913 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 914 if (sc->sc_control) 915 ctl = sc->sc_control; 916 else 917 ctl = OREAD4(sc, EHCI_CONTROL); 918 ctl |= EHCI_HCFS_RESUME; 919 OWRITE4(sc, EHCI_CONTROL, ctl); 920 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 921 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 922 OWRITE4(sc, EHCI_CONTROL, ctl); 923 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 924 sc->sc_control = sc->sc_intre = 0; 925 #endif 926 sc->sc_bus.use_polling--; 927 break; 928 case PWR_SOFTSUSPEND: 929 case PWR_SOFTSTANDBY: 930 case PWR_SOFTRESUME: 931 break; 932 } 933 splx(s); 934 } 935 936 /* 937 * Shut down the controller when the system is going down. 938 */ 939 void 940 ehci_shutdown(void *v) 941 { 942 ehci_softc_t *sc = v; 943 944 DPRINTF(("ehci_shutdown: stopping the HC\n")); 945 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 946 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 947 } 948 949 usbd_status 950 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 951 { 952 struct ehci_softc *sc = (struct ehci_softc *)bus; 953 usbd_status err; 954 955 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 956 #ifdef EHCI_DEBUG 957 if (err) 958 printf("ehci_allocm: usb_allocmem()=%d\n", err); 959 #endif 960 return (err); 961 } 962 963 void 964 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 965 { 966 struct ehci_softc *sc = (struct ehci_softc *)bus; 967 968 usb_freemem(&sc->sc_bus, dma); 969 } 970 971 usbd_xfer_handle 972 ehci_allocx(struct usbd_bus *bus) 973 { 974 struct ehci_softc *sc = (struct ehci_softc *)bus; 975 usbd_xfer_handle xfer; 976 977 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 978 if (xfer != NULL) { 979 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 980 #ifdef DIAGNOSTIC 981 if (xfer->busy_free != XFER_FREE) { 982 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 983 xfer->busy_free); 984 } 985 #endif 986 } else { 987 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 988 } 989 if (xfer != NULL) { 990 memset(xfer, 0, sizeof (struct ehci_xfer)); 991 #ifdef DIAGNOSTIC 992 EXFER(xfer)->isdone = 1; 993 xfer->busy_free = XFER_BUSY; 994 #endif 995 } 996 return (xfer); 997 } 998 999 void 1000 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1001 { 1002 struct ehci_softc *sc = (struct ehci_softc *)bus; 1003 1004 #ifdef DIAGNOSTIC 1005 if (xfer->busy_free != XFER_BUSY) { 1006 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1007 xfer->busy_free); 1008 return; 1009 } 1010 xfer->busy_free = XFER_FREE; 1011 if (!EXFER(xfer)->isdone) { 1012 printf("ehci_freex: !isdone\n"); 1013 return; 1014 } 1015 #endif 1016 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1017 } 1018 1019 Static void 1020 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1021 { 1022 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1023 1024 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1025 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1026 #ifdef USB_DEBUG 1027 if (ehcidebug) 1028 usbd_dump_pipe(pipe); 1029 #endif 1030 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1031 } 1032 1033 Static void 1034 ehci_noop(usbd_pipe_handle pipe) 1035 { 1036 } 1037 1038 #ifdef EHCI_DEBUG 1039 void 1040 ehci_dump_regs(ehci_softc_t *sc) 1041 { 1042 int i; 1043 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1044 EOREAD4(sc, EHCI_USBCMD), 1045 EOREAD4(sc, EHCI_USBSTS), 1046 EOREAD4(sc, EHCI_USBINTR)); 1047 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1048 EOREAD4(sc, EHCI_FRINDEX), 1049 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1050 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1051 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1052 for (i = 1; i <= sc->sc_noport; i++) 1053 printf("port %d status=0x%08x\n", i, 1054 EOREAD4(sc, EHCI_PORTSC(i))); 1055 } 1056 1057 void 1058 ehci_dump_link(ehci_link_t link, int type) 1059 { 1060 link = le32toh(link); 1061 printf("0x%08x", link); 1062 if (link & EHCI_LINK_TERMINATE) 1063 printf("<T>"); 1064 else { 1065 printf("<"); 1066 if (type) { 1067 switch (EHCI_LINK_TYPE(link)) { 1068 case EHCI_LINK_ITD: printf("ITD"); break; 1069 case EHCI_LINK_QH: printf("QH"); break; 1070 case EHCI_LINK_SITD: printf("SITD"); break; 1071 case EHCI_LINK_FSTN: printf("FSTN"); break; 1072 } 1073 } 1074 printf(">"); 1075 } 1076 } 1077 1078 void 1079 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1080 { 1081 int i; 1082 u_int32_t stop; 1083 1084 stop = 0; 1085 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1086 ehci_dump_sqtd(sqtd); 1087 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1088 } 1089 if (sqtd) 1090 printf("dump aborted, too many TDs\n"); 1091 } 1092 1093 void 1094 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1095 { 1096 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1097 ehci_dump_qtd(&sqtd->qtd); 1098 } 1099 1100 void 1101 ehci_dump_qtd(ehci_qtd_t *qtd) 1102 { 1103 u_int32_t s; 1104 char sbuf[128]; 1105 1106 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1107 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1108 printf("\n"); 1109 s = le32toh(qtd->qtd_status); 1110 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1111 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1112 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1113 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1114 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1115 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1116 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1117 EHCI_QTD_GET_PID(s), sbuf); 1118 for (s = 0; s < 5; s++) 1119 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1120 } 1121 1122 void 1123 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1124 { 1125 ehci_qh_t *qh = &sqh->qh; 1126 u_int32_t endp, endphub; 1127 1128 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1129 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1130 endp = le32toh(qh->qh_endp); 1131 printf(" endp=0x%08x\n", endp); 1132 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1133 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1134 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1135 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1136 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1137 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1138 EHCI_QH_GET_NRL(endp)); 1139 endphub = le32toh(qh->qh_endphub); 1140 printf(" endphub=0x%08x\n", endphub); 1141 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1142 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1143 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1144 EHCI_QH_GET_MULT(endphub)); 1145 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1146 printf("Overlay qTD:\n"); 1147 ehci_dump_qtd(&qh->qh_qtd); 1148 } 1149 1150 #ifdef DIAGNOSTIC 1151 Static void 1152 ehci_dump_exfer(struct ehci_xfer *ex) 1153 { 1154 printf("ehci_dump_exfer: ex=%p\n", ex); 1155 } 1156 #endif 1157 #endif 1158 1159 usbd_status 1160 ehci_open(usbd_pipe_handle pipe) 1161 { 1162 usbd_device_handle dev = pipe->device; 1163 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1164 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1165 u_int8_t addr = dev->address; 1166 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1167 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1168 ehci_soft_qh_t *sqh; 1169 usbd_status err; 1170 int s; 1171 int speed, naks; 1172 1173 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1174 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1175 1176 if (sc->sc_dying) 1177 return (USBD_IOERROR); 1178 1179 if (addr == sc->sc_addr) { 1180 switch (ed->bEndpointAddress) { 1181 case USB_CONTROL_ENDPOINT: 1182 pipe->methods = &ehci_root_ctrl_methods; 1183 break; 1184 case UE_DIR_IN | EHCI_INTR_ENDPT: 1185 pipe->methods = &ehci_root_intr_methods; 1186 break; 1187 default: 1188 return (USBD_INVAL); 1189 } 1190 return (USBD_NORMAL_COMPLETION); 1191 } 1192 1193 /* XXX All this stuff is only valid for async. */ 1194 switch (dev->speed) { 1195 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1196 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1197 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1198 default: panic("ehci_open: bad device speed %d", dev->speed); 1199 } 1200 naks = 8; /* XXX */ 1201 sqh = ehci_alloc_sqh(sc); 1202 if (sqh == NULL) 1203 goto bad0; 1204 /* qh_link filled when the QH is added */ 1205 sqh->qh.qh_endp = htole32( 1206 EHCI_QH_SET_ADDR(addr) | 1207 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1208 EHCI_QH_SET_EPS(speed) | /* XXX */ 1209 /* XXX EHCI_QH_DTC ? */ 1210 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1211 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1212 EHCI_QH_CTL : 0) | 1213 EHCI_QH_SET_NRL(naks) 1214 ); 1215 sqh->qh.qh_endphub = htole32( 1216 EHCI_QH_SET_MULT(1) 1217 /* XXX TT stuff */ 1218 /* XXX interrupt mask */ 1219 ); 1220 sqh->qh.qh_curqtd = EHCI_NULL; 1221 /* Fill the overlay qTD */ 1222 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1223 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1224 sqh->qh.qh_qtd.qtd_status = htole32(0); 1225 1226 epipe->sqh = sqh; 1227 1228 switch (xfertype) { 1229 case UE_CONTROL: 1230 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1231 0, &epipe->u.ctl.reqdma); 1232 #ifdef EHCI_DEBUG 1233 if (err) 1234 printf("ehci_open: usb_allocmem()=%d\n", err); 1235 #endif 1236 if (err) 1237 goto bad1; 1238 pipe->methods = &ehci_device_ctrl_methods; 1239 s = splusb(); 1240 ehci_add_qh(sqh, sc->sc_async_head); 1241 splx(s); 1242 break; 1243 case UE_BULK: 1244 pipe->methods = &ehci_device_bulk_methods; 1245 s = splusb(); 1246 ehci_add_qh(sqh, sc->sc_async_head); 1247 splx(s); 1248 break; 1249 case UE_INTERRUPT: 1250 pipe->methods = &ehci_device_intr_methods; 1251 return (USBD_INVAL); 1252 case UE_ISOCHRONOUS: 1253 pipe->methods = &ehci_device_isoc_methods; 1254 return (USBD_INVAL); 1255 default: 1256 return (USBD_INVAL); 1257 } 1258 return (USBD_NORMAL_COMPLETION); 1259 1260 bad1: 1261 ehci_free_sqh(sc, sqh); 1262 bad0: 1263 return (USBD_NOMEM); 1264 } 1265 1266 /* 1267 * Add an ED to the schedule. Called at splusb(). 1268 */ 1269 void 1270 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1271 { 1272 SPLUSBCHECK; 1273 1274 sqh->next = head->next; 1275 sqh->qh.qh_link = head->qh.qh_link; 1276 head->next = sqh; 1277 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1278 1279 #ifdef EHCI_DEBUG 1280 if (ehcidebug > 5) { 1281 printf("ehci_add_qh:\n"); 1282 ehci_dump_sqh(sqh); 1283 } 1284 #endif 1285 } 1286 1287 /* 1288 * Remove an ED from the schedule. Called at splusb(). 1289 */ 1290 void 1291 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1292 { 1293 ehci_soft_qh_t *p; 1294 1295 SPLUSBCHECK; 1296 /* XXX */ 1297 for (p = head; p == NULL && p->next != sqh; p = p->next) 1298 ; 1299 if (p == NULL) 1300 panic("ehci_rem_qh: ED not found"); 1301 p->next = sqh->next; 1302 p->qh.qh_link = sqh->qh.qh_link; 1303 1304 ehci_sync_hc(sc); 1305 } 1306 1307 void 1308 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1309 { 1310 /* Halt while we are messing. */ 1311 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1312 sqh->qh.qh_curqtd = 0; 1313 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1314 sqh->sqtd = sqtd; 1315 /* Keep toggle, clear the rest, including length. */ 1316 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1317 } 1318 1319 /* 1320 * Ensure that the HC has released all references to the QH. We do this 1321 * by asking for a Async Advance Doorbell interrupt and then we wait for 1322 * the interrupt. 1323 * To make this easier we first obtain exclusive use of the doorbell. 1324 */ 1325 void 1326 ehci_sync_hc(ehci_softc_t *sc) 1327 { 1328 int s, error; 1329 1330 if (sc->sc_dying) { 1331 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1332 return; 1333 } 1334 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1335 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1336 s = splhardusb(); 1337 /* ask for doorbell */ 1338 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1339 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1340 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1341 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1342 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1343 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1344 splx(s); 1345 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1346 #ifdef DIAGNOSTIC 1347 if (error) 1348 printf("ehci_sync_hc: tsleep() = %d\n", error); 1349 #endif 1350 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1351 } 1352 1353 /***********/ 1354 1355 /* 1356 * Data structures and routines to emulate the root hub. 1357 */ 1358 Static usb_device_descriptor_t ehci_devd = { 1359 USB_DEVICE_DESCRIPTOR_SIZE, 1360 UDESC_DEVICE, /* type */ 1361 {0x00, 0x02}, /* USB version */ 1362 UDCLASS_HUB, /* class */ 1363 UDSUBCLASS_HUB, /* subclass */ 1364 UDPROTO_HSHUBSTT, /* protocol */ 1365 64, /* max packet */ 1366 {0},{0},{0x00,0x01}, /* device id */ 1367 1,2,0, /* string indicies */ 1368 1 /* # of configurations */ 1369 }; 1370 1371 Static usb_device_qualifier_t ehci_odevd = { 1372 USB_DEVICE_DESCRIPTOR_SIZE, 1373 UDESC_DEVICE_QUALIFIER, /* type */ 1374 {0x00, 0x02}, /* USB version */ 1375 UDCLASS_HUB, /* class */ 1376 UDSUBCLASS_HUB, /* subclass */ 1377 UDPROTO_FSHUB, /* protocol */ 1378 64, /* max packet */ 1379 1, /* # of configurations */ 1380 0 1381 }; 1382 1383 Static usb_config_descriptor_t ehci_confd = { 1384 USB_CONFIG_DESCRIPTOR_SIZE, 1385 UDESC_CONFIG, 1386 {USB_CONFIG_DESCRIPTOR_SIZE + 1387 USB_INTERFACE_DESCRIPTOR_SIZE + 1388 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1389 1, 1390 1, 1391 0, 1392 UC_SELF_POWERED, 1393 0 /* max power */ 1394 }; 1395 1396 Static usb_interface_descriptor_t ehci_ifcd = { 1397 USB_INTERFACE_DESCRIPTOR_SIZE, 1398 UDESC_INTERFACE, 1399 0, 1400 0, 1401 1, 1402 UICLASS_HUB, 1403 UISUBCLASS_HUB, 1404 UIPROTO_HSHUBSTT, 1405 0 1406 }; 1407 1408 Static usb_endpoint_descriptor_t ehci_endpd = { 1409 USB_ENDPOINT_DESCRIPTOR_SIZE, 1410 UDESC_ENDPOINT, 1411 UE_DIR_IN | EHCI_INTR_ENDPT, 1412 UE_INTERRUPT, 1413 {8, 0}, /* max packet */ 1414 255 1415 }; 1416 1417 Static usb_hub_descriptor_t ehci_hubd = { 1418 USB_HUB_DESCRIPTOR_SIZE, 1419 UDESC_HUB, 1420 0, 1421 {0,0}, 1422 0, 1423 0, 1424 {0}, 1425 }; 1426 1427 Static int 1428 ehci_str(p, l, s) 1429 usb_string_descriptor_t *p; 1430 int l; 1431 char *s; 1432 { 1433 int i; 1434 1435 if (l == 0) 1436 return (0); 1437 p->bLength = 2 * strlen(s) + 2; 1438 if (l == 1) 1439 return (1); 1440 p->bDescriptorType = UDESC_STRING; 1441 l -= 2; 1442 for (i = 0; s[i] && l > 1; i++, l -= 2) 1443 USETW2(p->bString[i], 0, s[i]); 1444 return (2*i+2); 1445 } 1446 1447 /* 1448 * Simulate a hardware hub by handling all the necessary requests. 1449 */ 1450 Static usbd_status 1451 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1452 { 1453 usbd_status err; 1454 1455 /* Insert last in queue. */ 1456 err = usb_insert_transfer(xfer); 1457 if (err) 1458 return (err); 1459 1460 /* Pipe isn't running, start first */ 1461 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1462 } 1463 1464 Static usbd_status 1465 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1466 { 1467 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1468 usb_device_request_t *req; 1469 void *buf = NULL; 1470 int port, i; 1471 int s, len, value, index, l, totlen = 0; 1472 usb_port_status_t ps; 1473 usb_hub_descriptor_t hubd; 1474 usbd_status err; 1475 u_int32_t v; 1476 1477 if (sc->sc_dying) 1478 return (USBD_IOERROR); 1479 1480 #ifdef DIAGNOSTIC 1481 if (!(xfer->rqflags & URQ_REQUEST)) 1482 /* XXX panic */ 1483 return (USBD_INVAL); 1484 #endif 1485 req = &xfer->request; 1486 1487 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1488 req->bmRequestType, req->bRequest)); 1489 1490 len = UGETW(req->wLength); 1491 value = UGETW(req->wValue); 1492 index = UGETW(req->wIndex); 1493 1494 if (len != 0) 1495 buf = KERNADDR(&xfer->dmabuf, 0); 1496 1497 #define C(x,y) ((x) | ((y) << 8)) 1498 switch(C(req->bRequest, req->bmRequestType)) { 1499 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1500 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1501 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1502 /* 1503 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1504 * for the integrated root hub. 1505 */ 1506 break; 1507 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1508 if (len > 0) { 1509 *(u_int8_t *)buf = sc->sc_conf; 1510 totlen = 1; 1511 } 1512 break; 1513 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1514 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1515 switch(value >> 8) { 1516 case UDESC_DEVICE: 1517 if ((value & 0xff) != 0) { 1518 err = USBD_IOERROR; 1519 goto ret; 1520 } 1521 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1522 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1523 memcpy(buf, &ehci_devd, l); 1524 break; 1525 /* 1526 * We can't really operate at another speed, but the spec says 1527 * we need this descriptor. 1528 */ 1529 case UDESC_DEVICE_QUALIFIER: 1530 if ((value & 0xff) != 0) { 1531 err = USBD_IOERROR; 1532 goto ret; 1533 } 1534 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1535 memcpy(buf, &ehci_odevd, l); 1536 break; 1537 /* 1538 * We can't really operate at another speed, but the spec says 1539 * we need this descriptor. 1540 */ 1541 case UDESC_OTHER_SPEED_CONFIGURATION: 1542 case UDESC_CONFIG: 1543 if ((value & 0xff) != 0) { 1544 err = USBD_IOERROR; 1545 goto ret; 1546 } 1547 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1548 memcpy(buf, &ehci_confd, l); 1549 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1550 value >> 8; 1551 buf = (char *)buf + l; 1552 len -= l; 1553 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1554 totlen += l; 1555 memcpy(buf, &ehci_ifcd, l); 1556 buf = (char *)buf + l; 1557 len -= l; 1558 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1559 totlen += l; 1560 memcpy(buf, &ehci_endpd, l); 1561 break; 1562 case UDESC_STRING: 1563 if (len == 0) 1564 break; 1565 *(u_int8_t *)buf = 0; 1566 totlen = 1; 1567 switch (value & 0xff) { 1568 case 1: /* Vendor */ 1569 totlen = ehci_str(buf, len, sc->sc_vendor); 1570 break; 1571 case 2: /* Product */ 1572 totlen = ehci_str(buf, len, "EHCI root hub"); 1573 break; 1574 } 1575 break; 1576 default: 1577 err = USBD_IOERROR; 1578 goto ret; 1579 } 1580 break; 1581 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1582 if (len > 0) { 1583 *(u_int8_t *)buf = 0; 1584 totlen = 1; 1585 } 1586 break; 1587 case C(UR_GET_STATUS, UT_READ_DEVICE): 1588 if (len > 1) { 1589 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1590 totlen = 2; 1591 } 1592 break; 1593 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1594 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1595 if (len > 1) { 1596 USETW(((usb_status_t *)buf)->wStatus, 0); 1597 totlen = 2; 1598 } 1599 break; 1600 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1601 if (value >= USB_MAX_DEVICES) { 1602 err = USBD_IOERROR; 1603 goto ret; 1604 } 1605 sc->sc_addr = value; 1606 break; 1607 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1608 if (value != 0 && value != 1) { 1609 err = USBD_IOERROR; 1610 goto ret; 1611 } 1612 sc->sc_conf = value; 1613 break; 1614 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1615 break; 1616 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1617 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1618 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1619 err = USBD_IOERROR; 1620 goto ret; 1621 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1622 break; 1623 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1624 break; 1625 /* Hub requests */ 1626 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1627 break; 1628 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1629 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1630 "port=%d feature=%d\n", 1631 index, value)); 1632 if (index < 1 || index > sc->sc_noport) { 1633 err = USBD_IOERROR; 1634 goto ret; 1635 } 1636 port = EHCI_PORTSC(index); 1637 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1638 switch(value) { 1639 case UHF_PORT_ENABLE: 1640 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1641 break; 1642 case UHF_PORT_SUSPEND: 1643 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1644 break; 1645 case UHF_PORT_POWER: 1646 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1647 break; 1648 case UHF_PORT_TEST: 1649 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1650 "%d\n", index)); 1651 break; 1652 case UHF_PORT_INDICATOR: 1653 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1654 "%d\n", index)); 1655 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1656 break; 1657 case UHF_C_PORT_CONNECTION: 1658 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1659 break; 1660 case UHF_C_PORT_ENABLE: 1661 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1662 break; 1663 case UHF_C_PORT_SUSPEND: 1664 /* how? */ 1665 break; 1666 case UHF_C_PORT_OVER_CURRENT: 1667 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1668 break; 1669 case UHF_C_PORT_RESET: 1670 sc->sc_isreset = 0; 1671 break; 1672 default: 1673 err = USBD_IOERROR; 1674 goto ret; 1675 } 1676 #if 0 1677 switch(value) { 1678 case UHF_C_PORT_CONNECTION: 1679 case UHF_C_PORT_ENABLE: 1680 case UHF_C_PORT_SUSPEND: 1681 case UHF_C_PORT_OVER_CURRENT: 1682 case UHF_C_PORT_RESET: 1683 /* Enable RHSC interrupt if condition is cleared. */ 1684 if ((OREAD4(sc, port) >> 16) == 0) 1685 ehci_pcd_able(sc, 1); 1686 break; 1687 default: 1688 break; 1689 } 1690 #endif 1691 break; 1692 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1693 if (value != 0) { 1694 err = USBD_IOERROR; 1695 goto ret; 1696 } 1697 hubd = ehci_hubd; 1698 hubd.bNbrPorts = sc->sc_noport; 1699 v = EOREAD4(sc, EHCI_HCSPARAMS); 1700 USETW(hubd.wHubCharacteristics, 1701 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1702 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1703 ? UHD_PORT_IND : 0); 1704 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1705 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1706 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1707 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1708 l = min(len, hubd.bDescLength); 1709 totlen = l; 1710 memcpy(buf, &hubd, l); 1711 break; 1712 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1713 if (len != 4) { 1714 err = USBD_IOERROR; 1715 goto ret; 1716 } 1717 memset(buf, 0, len); /* ? XXX */ 1718 totlen = len; 1719 break; 1720 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1721 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1722 index)); 1723 if (index < 1 || index > sc->sc_noport) { 1724 err = USBD_IOERROR; 1725 goto ret; 1726 } 1727 if (len != 4) { 1728 err = USBD_IOERROR; 1729 goto ret; 1730 } 1731 v = EOREAD4(sc, EHCI_PORTSC(index)); 1732 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1733 v)); 1734 i = UPS_HIGH_SPEED; 1735 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1736 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1737 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1738 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1739 if (v & EHCI_PS_PR) i |= UPS_RESET; 1740 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1741 USETW(ps.wPortStatus, i); 1742 i = 0; 1743 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1744 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1745 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1746 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1747 USETW(ps.wPortChange, i); 1748 l = min(len, sizeof ps); 1749 memcpy(buf, &ps, l); 1750 totlen = l; 1751 break; 1752 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1753 err = USBD_IOERROR; 1754 goto ret; 1755 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1756 break; 1757 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1758 if (index < 1 || index > sc->sc_noport) { 1759 err = USBD_IOERROR; 1760 goto ret; 1761 } 1762 port = EHCI_PORTSC(index); 1763 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1764 switch(value) { 1765 case UHF_PORT_ENABLE: 1766 EOWRITE4(sc, port, v | EHCI_PS_PE); 1767 break; 1768 case UHF_PORT_SUSPEND: 1769 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1770 break; 1771 case UHF_PORT_RESET: 1772 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1773 index)); 1774 if (EHCI_PS_IS_LOWSPEED(v)) { 1775 /* Low speed device, give up ownership. */ 1776 ehci_disown(sc, index, 1); 1777 break; 1778 } 1779 /* Start reset sequence. */ 1780 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1781 EOWRITE4(sc, port, v | EHCI_PS_PR); 1782 /* Wait for reset to complete. */ 1783 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1784 if (sc->sc_dying) { 1785 err = USBD_IOERROR; 1786 goto ret; 1787 } 1788 /* Terminate reset sequence. */ 1789 EOWRITE4(sc, port, v); 1790 /* Wait for HC to complete reset. */ 1791 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1792 if (sc->sc_dying) { 1793 err = USBD_IOERROR; 1794 goto ret; 1795 } 1796 v = EOREAD4(sc, port); 1797 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1798 if (v & EHCI_PS_PR) { 1799 printf("%s: port reset timeout\n", 1800 USBDEVNAME(sc->sc_bus.bdev)); 1801 return (USBD_TIMEOUT); 1802 } 1803 if (!(v & EHCI_PS_PE)) { 1804 /* Not a high speed device, give up ownership.*/ 1805 ehci_disown(sc, index, 0); 1806 break; 1807 } 1808 sc->sc_isreset = 1; 1809 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1810 index, v)); 1811 break; 1812 case UHF_PORT_POWER: 1813 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1814 "%d\n", index)); 1815 EOWRITE4(sc, port, v | EHCI_PS_PP); 1816 break; 1817 case UHF_PORT_TEST: 1818 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1819 "%d\n", index)); 1820 break; 1821 case UHF_PORT_INDICATOR: 1822 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1823 "%d\n", index)); 1824 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1825 break; 1826 default: 1827 err = USBD_IOERROR; 1828 goto ret; 1829 } 1830 break; 1831 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1832 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1833 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1834 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1835 break; 1836 default: 1837 err = USBD_IOERROR; 1838 goto ret; 1839 } 1840 xfer->actlen = totlen; 1841 err = USBD_NORMAL_COMPLETION; 1842 ret: 1843 xfer->status = err; 1844 s = splusb(); 1845 usb_transfer_complete(xfer); 1846 splx(s); 1847 return (USBD_IN_PROGRESS); 1848 } 1849 1850 void 1851 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1852 { 1853 int port; 1854 u_int32_t v; 1855 1856 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1857 #ifdef DIAGNOSTIC 1858 if (sc->sc_npcomp != 0) { 1859 int i = (index-1) / sc->sc_npcomp; 1860 if (i >= sc->sc_ncomp) 1861 printf("%s: strange port\n", 1862 USBDEVNAME(sc->sc_bus.bdev)); 1863 else 1864 printf("%s: handing over %s speed device on " 1865 "port %d to %s\n", 1866 USBDEVNAME(sc->sc_bus.bdev), 1867 lowspeed ? "low" : "full", 1868 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1869 } else { 1870 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1871 } 1872 #endif 1873 port = EHCI_PORTSC(index); 1874 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1875 EOWRITE4(sc, port, v | EHCI_PS_PO); 1876 } 1877 1878 /* Abort a root control request. */ 1879 Static void 1880 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1881 { 1882 /* Nothing to do, all transfers are synchronous. */ 1883 } 1884 1885 /* Close the root pipe. */ 1886 Static void 1887 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1888 { 1889 DPRINTF(("ehci_root_ctrl_close\n")); 1890 /* Nothing to do. */ 1891 } 1892 1893 void 1894 ehci_root_intr_done(usbd_xfer_handle xfer) 1895 { 1896 xfer->hcpriv = NULL; 1897 } 1898 1899 Static usbd_status 1900 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1901 { 1902 usbd_status err; 1903 1904 /* Insert last in queue. */ 1905 err = usb_insert_transfer(xfer); 1906 if (err) 1907 return (err); 1908 1909 /* Pipe isn't running, start first */ 1910 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1911 } 1912 1913 Static usbd_status 1914 ehci_root_intr_start(usbd_xfer_handle xfer) 1915 { 1916 usbd_pipe_handle pipe = xfer->pipe; 1917 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1918 1919 if (sc->sc_dying) 1920 return (USBD_IOERROR); 1921 1922 sc->sc_intrxfer = xfer; 1923 1924 return (USBD_IN_PROGRESS); 1925 } 1926 1927 /* Abort a root interrupt request. */ 1928 Static void 1929 ehci_root_intr_abort(usbd_xfer_handle xfer) 1930 { 1931 int s; 1932 1933 if (xfer->pipe->intrxfer == xfer) { 1934 DPRINTF(("ehci_root_intr_abort: remove\n")); 1935 xfer->pipe->intrxfer = NULL; 1936 } 1937 xfer->status = USBD_CANCELLED; 1938 s = splusb(); 1939 usb_transfer_complete(xfer); 1940 splx(s); 1941 } 1942 1943 /* Close the root pipe. */ 1944 Static void 1945 ehci_root_intr_close(usbd_pipe_handle pipe) 1946 { 1947 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1948 1949 DPRINTF(("ehci_root_intr_close\n")); 1950 1951 sc->sc_intrxfer = NULL; 1952 } 1953 1954 void 1955 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1956 { 1957 xfer->hcpriv = NULL; 1958 } 1959 1960 /************************/ 1961 1962 ehci_soft_qh_t * 1963 ehci_alloc_sqh(ehci_softc_t *sc) 1964 { 1965 ehci_soft_qh_t *sqh; 1966 usbd_status err; 1967 int i, offs; 1968 usb_dma_t dma; 1969 1970 if (sc->sc_freeqhs == NULL) { 1971 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1972 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1973 EHCI_PAGE_SIZE, &dma); 1974 #ifdef EHCI_DEBUG 1975 if (err) 1976 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1977 #endif 1978 if (err) 1979 return (NULL); 1980 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1981 offs = i * EHCI_SQH_SIZE; 1982 sqh = KERNADDR(&dma, offs); 1983 sqh->physaddr = DMAADDR(&dma, offs); 1984 sqh->next = sc->sc_freeqhs; 1985 sc->sc_freeqhs = sqh; 1986 } 1987 } 1988 sqh = sc->sc_freeqhs; 1989 sc->sc_freeqhs = sqh->next; 1990 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1991 sqh->next = NULL; 1992 return (sqh); 1993 } 1994 1995 void 1996 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1997 { 1998 sqh->next = sc->sc_freeqhs; 1999 sc->sc_freeqhs = sqh; 2000 } 2001 2002 ehci_soft_qtd_t * 2003 ehci_alloc_sqtd(ehci_softc_t *sc) 2004 { 2005 ehci_soft_qtd_t *sqtd; 2006 usbd_status err; 2007 int i, offs; 2008 usb_dma_t dma; 2009 int s; 2010 2011 if (sc->sc_freeqtds == NULL) { 2012 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2013 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2014 EHCI_PAGE_SIZE, &dma); 2015 #ifdef EHCI_DEBUG 2016 if (err) 2017 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2018 #endif 2019 if (err) 2020 return (NULL); 2021 s = splusb(); 2022 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2023 offs = i * EHCI_SQTD_SIZE; 2024 sqtd = KERNADDR(&dma, offs); 2025 sqtd->physaddr = DMAADDR(&dma, offs); 2026 sqtd->nextqtd = sc->sc_freeqtds; 2027 sc->sc_freeqtds = sqtd; 2028 } 2029 splx(s); 2030 } 2031 2032 s = splusb(); 2033 sqtd = sc->sc_freeqtds; 2034 sc->sc_freeqtds = sqtd->nextqtd; 2035 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2036 sqtd->nextqtd = NULL; 2037 sqtd->xfer = NULL; 2038 splx(s); 2039 2040 return (sqtd); 2041 } 2042 2043 void 2044 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2045 { 2046 int s; 2047 2048 s = splusb(); 2049 sqtd->nextqtd = sc->sc_freeqtds; 2050 sc->sc_freeqtds = sqtd; 2051 splx(s); 2052 } 2053 2054 usbd_status 2055 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2056 int alen, int rd, usbd_xfer_handle xfer, 2057 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2058 { 2059 ehci_soft_qtd_t *next, *cur; 2060 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2061 u_int32_t qtdstatus; 2062 int len, curlen; 2063 int i; 2064 usb_dma_t *dma = &xfer->dmabuf; 2065 2066 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2067 2068 len = alen; 2069 dataphys = DMAADDR(dma, 0); 2070 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2071 qtdstatus = htole32( 2072 EHCI_QTD_ACTIVE | 2073 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2074 EHCI_QTD_SET_CERR(3) 2075 /* IOC set below */ 2076 /* BYTES set below */ 2077 /* XXX Data toggle */ 2078 ); 2079 2080 cur = ehci_alloc_sqtd(sc); 2081 *sp = cur; 2082 if (cur == NULL) 2083 goto nomem; 2084 for (;;) { 2085 dataphyspage = EHCI_PAGE(dataphys); 2086 /* The EHCI hardware can handle at most 5 pages. */ 2087 if (dataphyslastpage - dataphyspage < 2088 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2089 /* we can handle it in this QTD */ 2090 curlen = len; 2091 } else { 2092 /* must use multiple TDs, fill as much as possible. */ 2093 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2094 EHCI_PAGE_OFFSET(dataphys); 2095 #ifdef DIAGNOSTIC 2096 if (curlen > len) { 2097 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2098 "len=0x%x offs=0x%x\n", curlen, len, 2099 EHCI_PAGE_OFFSET(dataphys)); 2100 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2101 dataphyslastpage, dataphyspage, 2102 dataphys); 2103 curlen = len; 2104 } 2105 #endif 2106 2107 /* XXX true for EHCI? */ 2108 /* the length must be a multiple of the max size */ 2109 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2110 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2111 "curlen=%d\n", curlen)); 2112 #ifdef DIAGNOSTIC 2113 if (curlen == 0) 2114 panic("ehci_alloc_std: curlen == 0"); 2115 #endif 2116 } 2117 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2118 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2119 dataphys, dataphyslastpage, 2120 len, curlen)); 2121 len -= curlen; 2122 2123 if (len != 0) { 2124 next = ehci_alloc_sqtd(sc); 2125 if (next == NULL) 2126 goto nomem; 2127 nextphys = next->physaddr; 2128 } else { 2129 next = NULL; 2130 nextphys = EHCI_NULL; 2131 } 2132 2133 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2134 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2135 if (i != 0) /* use offset only in first buffer */ 2136 a = EHCI_PAGE(a); 2137 cur->qtd.qtd_buffer[i] = htole32(a); 2138 #ifdef DIAGNOSTIC 2139 if (i >= EHCI_QTD_NBUFFERS) { 2140 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2141 goto nomem; 2142 } 2143 #endif 2144 } 2145 cur->nextqtd = next; 2146 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2147 cur->qtd.qtd_status = 2148 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2149 cur->xfer = xfer; 2150 cur->len = curlen; 2151 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2152 dataphys, dataphys + curlen)); 2153 if (len == 0) 2154 break; 2155 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2156 dataphys += curlen; 2157 cur = next; 2158 } 2159 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2160 *ep = cur; 2161 2162 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2163 *sp, *ep)); 2164 2165 return (USBD_NORMAL_COMPLETION); 2166 2167 nomem: 2168 /* XXX free chain */ 2169 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2170 return (USBD_NOMEM); 2171 } 2172 2173 Static void 2174 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2175 ehci_soft_qtd_t *sqtdend) 2176 { 2177 ehci_soft_qtd_t *p; 2178 int i; 2179 2180 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2181 sqtd, sqtdend)); 2182 2183 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2184 p = sqtd->nextqtd; 2185 ehci_free_sqtd(sc, sqtd); 2186 } 2187 } 2188 2189 /****************/ 2190 2191 /* 2192 * Close a reqular pipe. 2193 * Assumes that there are no pending transactions. 2194 */ 2195 void 2196 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2197 { 2198 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2199 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2200 ehci_soft_qh_t *sqh = epipe->sqh; 2201 int s; 2202 2203 s = splusb(); 2204 ehci_rem_qh(sc, sqh, head); 2205 splx(s); 2206 ehci_free_sqh(sc, epipe->sqh); 2207 } 2208 2209 /* 2210 * Abort a device request. 2211 * If this routine is called at splusb() it guarantees that the request 2212 * will be removed from the hardware scheduling and that the callback 2213 * for it will be called with USBD_CANCELLED status. 2214 * It's impossible to guarantee that the requested transfer will not 2215 * have happened since the hardware runs concurrently. 2216 * If the transaction has already happened we rely on the ordinary 2217 * interrupt processing to process it. 2218 * XXX This is most probably wrong. 2219 */ 2220 void 2221 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2222 { 2223 #define exfer EXFER(xfer) 2224 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2225 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2226 ehci_soft_qh_t *sqh = epipe->sqh; 2227 ehci_soft_qtd_t *sqtd; 2228 ehci_physaddr_t cur; 2229 u_int32_t qhstatus; 2230 int s; 2231 int hit; 2232 2233 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2234 2235 if (sc->sc_dying) { 2236 /* If we're dying, just do the software part. */ 2237 s = splusb(); 2238 xfer->status = status; /* make software ignore it */ 2239 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2240 usb_transfer_complete(xfer); 2241 splx(s); 2242 return; 2243 } 2244 2245 if (xfer->device->bus->intr_context || !curproc) 2246 panic("ehci_abort_xfer: not in process context"); 2247 2248 /* 2249 * Step 1: Make interrupt routine and hardware ignore xfer. 2250 */ 2251 s = splusb(); 2252 xfer->status = status; /* make software ignore it */ 2253 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2254 qhstatus = sqh->qh.qh_qtd.qtd_status; 2255 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2256 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2257 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2258 if (sqtd == exfer->sqtdend) 2259 break; 2260 } 2261 splx(s); 2262 2263 /* 2264 * Step 2: Wait until we know hardware has finished any possible 2265 * use of the xfer. Also make sure the soft interrupt routine 2266 * has run. 2267 */ 2268 ehci_sync_hc(sc); 2269 s = splusb(); 2270 sc->sc_softwake = 1; 2271 usb_schedsoftintr(&sc->sc_bus); 2272 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2273 splx(s); 2274 2275 /* 2276 * Step 3: Remove any vestiges of the xfer from the hardware. 2277 * The complication here is that the hardware may have executed 2278 * beyond the xfer we're trying to abort. So as we're scanning 2279 * the TDs of this xfer we check if the hardware points to 2280 * any of them. 2281 */ 2282 s = splusb(); /* XXX why? */ 2283 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2284 hit = 0; 2285 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2286 hit |= cur == sqtd->physaddr; 2287 if (sqtd == exfer->sqtdend) 2288 break; 2289 } 2290 sqtd = sqtd->nextqtd; 2291 /* Zap curqtd register if hardware pointed inside the xfer. */ 2292 if (hit && sqtd != NULL) { 2293 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2294 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2295 sqh->qh.qh_qtd.qtd_status = qhstatus; 2296 } else { 2297 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2298 } 2299 2300 /* 2301 * Step 4: Execute callback. 2302 */ 2303 #ifdef DIAGNOSTIC 2304 exfer->isdone = 1; 2305 #endif 2306 usb_transfer_complete(xfer); 2307 2308 splx(s); 2309 #undef exfer 2310 } 2311 2312 void 2313 ehci_timeout(void *addr) 2314 { 2315 struct ehci_xfer *exfer = addr; 2316 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2317 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2318 2319 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2320 #ifdef USB_DEBUG 2321 if (ehcidebug > 1) 2322 usbd_dump_pipe(exfer->xfer.pipe); 2323 #endif 2324 2325 if (sc->sc_dying) { 2326 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2327 return; 2328 } 2329 2330 /* Execute the abort in a process context. */ 2331 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2332 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2333 } 2334 2335 void 2336 ehci_timeout_task(void *addr) 2337 { 2338 usbd_xfer_handle xfer = addr; 2339 int s; 2340 2341 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2342 2343 s = splusb(); 2344 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2345 splx(s); 2346 } 2347 2348 /************************/ 2349 2350 Static usbd_status 2351 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2352 { 2353 usbd_status err; 2354 2355 /* Insert last in queue. */ 2356 err = usb_insert_transfer(xfer); 2357 if (err) 2358 return (err); 2359 2360 /* Pipe isn't running, start first */ 2361 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2362 } 2363 2364 Static usbd_status 2365 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2366 { 2367 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2368 usbd_status err; 2369 2370 if (sc->sc_dying) 2371 return (USBD_IOERROR); 2372 2373 #ifdef DIAGNOSTIC 2374 if (!(xfer->rqflags & URQ_REQUEST)) { 2375 /* XXX panic */ 2376 printf("ehci_device_ctrl_transfer: not a request\n"); 2377 return (USBD_INVAL); 2378 } 2379 #endif 2380 2381 err = ehci_device_request(xfer); 2382 if (err) 2383 return (err); 2384 2385 if (sc->sc_bus.use_polling) 2386 ehci_waitintr(sc, xfer); 2387 return (USBD_IN_PROGRESS); 2388 } 2389 2390 void 2391 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2392 { 2393 struct ehci_xfer *ex = EXFER(xfer); 2394 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2395 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2396 2397 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2398 2399 #ifdef DIAGNOSTIC 2400 if (!(xfer->rqflags & URQ_REQUEST)) { 2401 panic("ehci_ctrl_done: not a request"); 2402 } 2403 #endif 2404 2405 if (xfer->status != USBD_NOMEM) { 2406 ehci_del_intr_list(ex); /* remove from active list */ 2407 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2408 } 2409 2410 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2411 } 2412 2413 /* Abort a device control request. */ 2414 Static void 2415 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2416 { 2417 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2418 ehci_abort_xfer(xfer, USBD_CANCELLED); 2419 } 2420 2421 /* Close a device control pipe. */ 2422 Static void 2423 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2424 { 2425 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2426 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2427 2428 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2429 ehci_close_pipe(pipe, sc->sc_async_head); 2430 } 2431 2432 usbd_status 2433 ehci_device_request(usbd_xfer_handle xfer) 2434 { 2435 #define exfer EXFER(xfer) 2436 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2437 usb_device_request_t *req = &xfer->request; 2438 usbd_device_handle dev = epipe->pipe.device; 2439 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2440 int addr = dev->address; 2441 ehci_soft_qtd_t *setup, *stat, *next; 2442 ehci_soft_qh_t *sqh; 2443 int isread; 2444 int len; 2445 usbd_status err; 2446 int s; 2447 2448 isread = req->bmRequestType & UT_READ; 2449 len = UGETW(req->wLength); 2450 2451 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2452 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2453 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2454 UGETW(req->wIndex), len, addr, 2455 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2456 2457 setup = ehci_alloc_sqtd(sc); 2458 if (setup == NULL) { 2459 err = USBD_NOMEM; 2460 goto bad1; 2461 } 2462 stat = ehci_alloc_sqtd(sc); 2463 if (stat == NULL) { 2464 err = USBD_NOMEM; 2465 goto bad2; 2466 } 2467 2468 sqh = epipe->sqh; 2469 epipe->u.ctl.length = len; 2470 2471 /* XXX 2472 * Since we're messing with the QH we must know the HC is in sync. 2473 * This needs to go away since it slows down control transfers. 2474 * Removing it entails: 2475 * - fill the QH only once with addr & wMaxPacketSize 2476 * - put the correct data toggles in the qtds and set DTC 2477 */ 2478 /* ehci_sync_hc(sc); */ 2479 /* Update device address and length since they may have changed. */ 2480 /* XXX This only needs to be done once, but it's too early in open. */ 2481 /* XXXX Should not touch ED here! */ 2482 sqh->qh.qh_endp = 2483 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2484 htole32( 2485 EHCI_QH_SET_ADDR(addr) | 2486 /* EHCI_QH_DTC | */ 2487 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2488 ); 2489 /* Clear toggle */ 2490 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2491 2492 /* Set up data transaction */ 2493 if (len != 0) { 2494 ehci_soft_qtd_t *end; 2495 2496 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2497 &next, &end); 2498 if (err) 2499 goto bad3; 2500 end->nextqtd = stat; 2501 end->qtd.qtd_next = 2502 end->qtd.qtd_altnext = htole32(stat->physaddr); 2503 /* Start toggle at 1. */ 2504 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2505 } else { 2506 next = stat; 2507 } 2508 2509 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2510 2511 setup->qtd.qtd_status = htole32( 2512 EHCI_QTD_ACTIVE | 2513 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2514 EHCI_QTD_SET_CERR(3) | 2515 EHCI_QTD_SET_BYTES(sizeof *req) 2516 ); 2517 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2518 setup->nextqtd = next; 2519 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2520 setup->xfer = xfer; 2521 setup->len = sizeof *req; 2522 2523 stat->qtd.qtd_status = htole32( 2524 EHCI_QTD_ACTIVE | 2525 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2526 EHCI_QTD_SET_CERR(3) | 2527 EHCI_QTD_IOC 2528 ); 2529 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2530 stat->nextqtd = NULL; 2531 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2532 stat->xfer = xfer; 2533 stat->len = 0; 2534 2535 #ifdef EHCI_DEBUG 2536 if (ehcidebug > 5) { 2537 DPRINTF(("ehci_device_request:\n")); 2538 ehci_dump_sqh(sqh); 2539 ehci_dump_sqtds(setup); 2540 } 2541 #endif 2542 2543 exfer->sqtdstart = setup; 2544 exfer->sqtdend = stat; 2545 #ifdef DIAGNOSTIC 2546 if (!exfer->isdone) { 2547 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2548 } 2549 exfer->isdone = 0; 2550 #endif 2551 2552 /* Insert qTD in QH list. */ 2553 s = splusb(); 2554 ehci_set_qh_qtd(sqh, setup); 2555 if (xfer->timeout && !sc->sc_bus.use_polling) { 2556 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2557 ehci_timeout, xfer); 2558 } 2559 ehci_add_intr_list(sc, exfer); 2560 xfer->status = USBD_IN_PROGRESS; 2561 splx(s); 2562 2563 #ifdef EHCI_DEBUG 2564 if (ehcidebug > 10) { 2565 DPRINTF(("ehci_device_request: status=%x\n", 2566 EOREAD4(sc, EHCI_USBSTS))); 2567 delay(10000); 2568 ehci_dump_regs(sc); 2569 ehci_dump_sqh(sc->sc_async_head); 2570 ehci_dump_sqh(sqh); 2571 ehci_dump_sqtds(setup); 2572 } 2573 #endif 2574 2575 return (USBD_NORMAL_COMPLETION); 2576 2577 bad3: 2578 ehci_free_sqtd(sc, stat); 2579 bad2: 2580 ehci_free_sqtd(sc, setup); 2581 bad1: 2582 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2583 xfer->status = err; 2584 usb_transfer_complete(xfer); 2585 return (err); 2586 #undef exfer 2587 } 2588 2589 /************************/ 2590 2591 Static usbd_status 2592 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2593 { 2594 usbd_status err; 2595 2596 /* Insert last in queue. */ 2597 err = usb_insert_transfer(xfer); 2598 if (err) 2599 return (err); 2600 2601 /* Pipe isn't running, start first */ 2602 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2603 } 2604 2605 usbd_status 2606 ehci_device_bulk_start(usbd_xfer_handle xfer) 2607 { 2608 #define exfer EXFER(xfer) 2609 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2610 usbd_device_handle dev = epipe->pipe.device; 2611 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2612 ehci_soft_qtd_t *data, *dataend; 2613 ehci_soft_qh_t *sqh; 2614 usbd_status err; 2615 int len, isread, endpt; 2616 int s; 2617 2618 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2619 xfer, xfer->length, xfer->flags)); 2620 2621 if (sc->sc_dying) 2622 return (USBD_IOERROR); 2623 2624 #ifdef DIAGNOSTIC 2625 if (xfer->rqflags & URQ_REQUEST) 2626 panic("ehci_device_bulk_transfer: a request"); 2627 #endif 2628 2629 len = xfer->length; 2630 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2631 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2632 sqh = epipe->sqh; 2633 2634 epipe->u.bulk.length = len; 2635 2636 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2637 &dataend); 2638 if (err) { 2639 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2640 xfer->status = err; 2641 usb_transfer_complete(xfer); 2642 return (err); 2643 } 2644 2645 #ifdef EHCI_DEBUG 2646 if (ehcidebug > 5) { 2647 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2648 ehci_dump_sqh(sqh); 2649 ehci_dump_sqtds(data); 2650 } 2651 #endif 2652 2653 /* Set up interrupt info. */ 2654 exfer->sqtdstart = data; 2655 exfer->sqtdend = dataend; 2656 #ifdef DIAGNOSTIC 2657 if (!exfer->isdone) { 2658 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2659 } 2660 exfer->isdone = 0; 2661 #endif 2662 2663 s = splusb(); 2664 ehci_set_qh_qtd(sqh, data); 2665 if (xfer->timeout && !sc->sc_bus.use_polling) { 2666 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2667 ehci_timeout, xfer); 2668 } 2669 ehci_add_intr_list(sc, exfer); 2670 xfer->status = USBD_IN_PROGRESS; 2671 splx(s); 2672 2673 #ifdef EHCI_DEBUG 2674 if (ehcidebug > 10) { 2675 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2676 delay(10000); 2677 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2678 ehci_dump_regs(sc); 2679 #if 0 2680 printf("async_head:\n"); 2681 ehci_dump_sqh(sc->sc_async_head); 2682 #endif 2683 printf("sqh:\n"); 2684 ehci_dump_sqh(sqh); 2685 ehci_dump_sqtds(data); 2686 } 2687 #endif 2688 2689 if (sc->sc_bus.use_polling) 2690 ehci_waitintr(sc, xfer); 2691 2692 return (USBD_IN_PROGRESS); 2693 #undef exfer 2694 } 2695 2696 Static void 2697 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2698 { 2699 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2700 ehci_abort_xfer(xfer, USBD_CANCELLED); 2701 } 2702 2703 /* 2704 * Close a device bulk pipe. 2705 */ 2706 Static void 2707 ehci_device_bulk_close(usbd_pipe_handle pipe) 2708 { 2709 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2710 2711 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2712 ehci_close_pipe(pipe, sc->sc_async_head); 2713 } 2714 2715 void 2716 ehci_device_bulk_done(usbd_xfer_handle xfer) 2717 { 2718 struct ehci_xfer *ex = EXFER(xfer); 2719 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2720 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2721 2722 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2723 xfer, xfer->actlen)); 2724 2725 if (xfer->status != USBD_NOMEM) { 2726 ehci_del_intr_list(ex); /* remove from active list */ 2727 ehci_free_sqtd_chain(sc, ex->sqtdstart, 0); 2728 } 2729 2730 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2731 } 2732 2733 /************************/ 2734 2735 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2736 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2737 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2738 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2739 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2740 2741 /************************/ 2742 2743 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2744 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2745 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2746 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2747 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2748
Indexes created Tue Sep 23 20:09:58 GMT 2025