ehci.c revision 1.39 1 /* $NetBSD: ehci.c,v 1.39 2002/11/11 20:55:28 martin Exp $ */
2
3 /*
4 * TODO
5 * hold off explorations by companion controllers until ehci has started.
6 */
7
8 /*
9 * Copyright (c) 2001 The NetBSD Foundation, Inc.
10 * All rights reserved.
11 *
12 * This code is derived from software contributed to The NetBSD Foundation
13 * by Lennart Augustsson (lennart (at) augustsson.net).
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the NetBSD
26 * Foundation, Inc. and its contributors.
27 * 4. Neither the name of The NetBSD Foundation nor the names of its
28 * contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 * POSSIBILITY OF SUCH DAMAGE.
42 */
43
44 /*
45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
46 *
47 * The EHCI 1.0 spec can be found at
48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
49 * and the USB 2.0 spec at
50 * http://www.usb.org/developers/data/usb_20.zip
51 *
52 */
53
54 #include <sys/cdefs.h>
55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.39 2002/11/11 20:55:28 martin Exp $");
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
61 #include <sys/device.h>
62 #include <sys/select.h>
63 #include <sys/proc.h>
64 #include <sys/queue.h>
65
66 #include <machine/bus.h>
67 #include <machine/endian.h>
68
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
71 #include <dev/usb/usbdivar.h>
72 #include <dev/usb/usb_mem.h>
73 #include <dev/usb/usb_quirks.h>
74
75 #include <dev/usb/ehcireg.h>
76 #include <dev/usb/ehcivar.h>
77
78 #ifdef EHCI_DEBUG
79 #define DPRINTF(x) if (ehcidebug) printf x
80 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
81 int ehcidebug = 0;
82 #ifndef __NetBSD__
83 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
84 #endif
85 #else
86 #define DPRINTF(x)
87 #define DPRINTFN(n,x)
88 #endif
89
90 struct ehci_pipe {
91 struct usbd_pipe pipe;
92 ehci_soft_qh_t *sqh;
93 union {
94 ehci_soft_qtd_t *qtd;
95 /* ehci_soft_itd_t *itd; */
96 } tail;
97 union {
98 /* Control pipe */
99 struct {
100 usb_dma_t reqdma;
101 u_int length;
102 /*ehci_soft_qtd_t *setup, *data, *stat;*/
103 } ctl;
104 /* Interrupt pipe */
105 /* XXX */
106 /* Bulk pipe */
107 struct {
108 u_int length;
109 } bulk;
110 /* Iso pipe */
111 /* XXX */
112 } u;
113 };
114
115 Static void ehci_shutdown(void *);
116 Static void ehci_power(int, void *);
117
118 Static usbd_status ehci_open(usbd_pipe_handle);
119 Static void ehci_poll(struct usbd_bus *);
120 Static void ehci_softintr(void *);
121 Static int ehci_intr1(ehci_softc_t *);
122 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
123 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
124 Static void ehci_idone(struct ehci_xfer *);
125 Static void ehci_timeout(void *);
126 Static void ehci_timeout_task(void *);
127
128 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
129 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
130
131 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
132 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
133
134 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
135 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
136 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
137 Static void ehci_root_ctrl_close(usbd_pipe_handle);
138 Static void ehci_root_ctrl_done(usbd_xfer_handle);
139
140 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
141 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
142 Static void ehci_root_intr_abort(usbd_xfer_handle);
143 Static void ehci_root_intr_close(usbd_pipe_handle);
144 Static void ehci_root_intr_done(usbd_xfer_handle);
145
146 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
147 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
148 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
149 Static void ehci_device_ctrl_close(usbd_pipe_handle);
150 Static void ehci_device_ctrl_done(usbd_xfer_handle);
151
152 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
153 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
154 Static void ehci_device_bulk_abort(usbd_xfer_handle);
155 Static void ehci_device_bulk_close(usbd_pipe_handle);
156 Static void ehci_device_bulk_done(usbd_xfer_handle);
157
158 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
159 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
160 Static void ehci_device_intr_abort(usbd_xfer_handle);
161 Static void ehci_device_intr_close(usbd_pipe_handle);
162 Static void ehci_device_intr_done(usbd_xfer_handle);
163
164 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
165 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
166 Static void ehci_device_isoc_abort(usbd_xfer_handle);
167 Static void ehci_device_isoc_close(usbd_pipe_handle);
168 Static void ehci_device_isoc_done(usbd_xfer_handle);
169
170 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
171 Static void ehci_noop(usbd_pipe_handle pipe);
172
173 Static int ehci_str(usb_string_descriptor_t *, int, char *);
174 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
175 Static void ehci_pcd_able(ehci_softc_t *, int);
176 Static void ehci_pcd_enable(void *);
177 Static void ehci_disown(ehci_softc_t *, int, int);
178
179 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
180 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
181
182 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
183 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
184 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
185 ehci_softc_t *, int, int, usbd_xfer_handle,
186 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
187 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
188 ehci_soft_qtd_t *);
189
190 Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
191
192 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
193 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
194 ehci_soft_qh_t *);
195 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
196 Static void ehci_sync_hc(ehci_softc_t *);
197
198 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
199 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
200
201 #ifdef EHCI_DEBUG
202 Static void ehci_dump_regs(ehci_softc_t *);
203 Static void ehci_dump(void);
204 Static ehci_softc_t *theehci;
205 Static void ehci_dump_link(ehci_link_t, int);
206 Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
207 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
208 Static void ehci_dump_qtd(ehci_qtd_t *);
209 Static void ehci_dump_sqh(ehci_soft_qh_t *);
210 #ifdef DIAGNOSTIC
211 Static void ehci_dump_exfer(struct ehci_xfer *);
212 #endif
213 #endif
214
215 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
216
217 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
218
219 #define EHCI_INTR_ENDPT 1
220
221 #define ehci_add_intr_list(sc, ex) \
222 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
223 #define ehci_del_intr_list(ex) \
224 LIST_REMOVE((ex), inext)
225
226 Static struct usbd_bus_methods ehci_bus_methods = {
227 ehci_open,
228 ehci_softintr,
229 ehci_poll,
230 ehci_allocm,
231 ehci_freem,
232 ehci_allocx,
233 ehci_freex,
234 };
235
236 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
237 ehci_root_ctrl_transfer,
238 ehci_root_ctrl_start,
239 ehci_root_ctrl_abort,
240 ehci_root_ctrl_close,
241 ehci_noop,
242 ehci_root_ctrl_done,
243 };
244
245 Static struct usbd_pipe_methods ehci_root_intr_methods = {
246 ehci_root_intr_transfer,
247 ehci_root_intr_start,
248 ehci_root_intr_abort,
249 ehci_root_intr_close,
250 ehci_noop,
251 ehci_root_intr_done,
252 };
253
254 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
255 ehci_device_ctrl_transfer,
256 ehci_device_ctrl_start,
257 ehci_device_ctrl_abort,
258 ehci_device_ctrl_close,
259 ehci_noop,
260 ehci_device_ctrl_done,
261 };
262
263 Static struct usbd_pipe_methods ehci_device_intr_methods = {
264 ehci_device_intr_transfer,
265 ehci_device_intr_start,
266 ehci_device_intr_abort,
267 ehci_device_intr_close,
268 ehci_device_clear_toggle,
269 ehci_device_intr_done,
270 };
271
272 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
273 ehci_device_bulk_transfer,
274 ehci_device_bulk_start,
275 ehci_device_bulk_abort,
276 ehci_device_bulk_close,
277 ehci_device_clear_toggle,
278 ehci_device_bulk_done,
279 };
280
281 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
282 ehci_device_isoc_transfer,
283 ehci_device_isoc_start,
284 ehci_device_isoc_abort,
285 ehci_device_isoc_close,
286 ehci_noop,
287 ehci_device_isoc_done,
288 };
289
290 usbd_status
291 ehci_init(ehci_softc_t *sc)
292 {
293 u_int32_t version, sparams, cparams, hcr;
294 u_int i;
295 usbd_status err;
296 ehci_soft_qh_t *sqh;
297
298 DPRINTF(("ehci_init: start\n"));
299 #ifdef EHCI_DEBUG
300 theehci = sc;
301 #endif
302
303 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
304
305 version = EREAD2(sc, EHCI_HCIVERSION);
306 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
307 version >> 8, version & 0xff);
308
309 sparams = EREAD4(sc, EHCI_HCSPARAMS);
310 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
311 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
312 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
313 printf("%s: wrong number of companions (%d != %d)\n",
314 USBDEVNAME(sc->sc_bus.bdev),
315 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
316 return (USBD_IOERROR);
317 }
318 if (sc->sc_ncomp > 0) {
319 printf("%s: companion controller%s, %d port%s each:",
320 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
321 EHCI_HCS_N_PCC(sparams),
322 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
323 for (i = 0; i < sc->sc_ncomp; i++)
324 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
325 printf("\n");
326 }
327 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
328 cparams = EREAD4(sc, EHCI_HCCPARAMS);
329 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
330
331 if (EHCI_HCC_64BIT(cparams)) {
332 /* MUST clear segment register if 64 bit capable. */
333 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
334 }
335
336 sc->sc_bus.usbrev = USBREV_2_0;
337
338 /* Reset the controller */
339 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
340 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
341 usb_delay_ms(&sc->sc_bus, 1);
342 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
343 for (i = 0; i < 100; i++) {
344 usb_delay_ms(&sc->sc_bus, 1);
345 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
346 if (!hcr)
347 break;
348 }
349 if (hcr) {
350 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
351 return (USBD_IOERROR);
352 }
353
354 /* frame list size at default, read back what we got and use that */
355 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
356 case 0: sc->sc_flsize = 1024*4; break;
357 case 1: sc->sc_flsize = 512*4; break;
358 case 2: sc->sc_flsize = 256*4; break;
359 case 3: return (USBD_IOERROR);
360 }
361 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
362 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
363 if (err)
364 return (err);
365 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
366
367 /* Set up the bus struct. */
368 sc->sc_bus.methods = &ehci_bus_methods;
369 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
370
371 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
372 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
373
374 sc->sc_eintrs = EHCI_NORMAL_INTRS;
375
376 /* Allocate dummy QH that starts the async list. */
377 sqh = ehci_alloc_sqh(sc);
378 if (sqh == NULL) {
379 err = USBD_NOMEM;
380 goto bad1;
381 }
382 /* Fill the QH */
383 sqh->qh.qh_endp =
384 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
385 sqh->qh.qh_link =
386 htole32(sqh->physaddr | EHCI_LINK_QH);
387 sqh->qh.qh_curqtd = EHCI_NULL;
388 sqh->next = NULL;
389 /* Fill the overlay qTD */
390 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
391 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
392 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
393 sqh->sqtd = NULL;
394 #ifdef EHCI_DEBUG
395 if (ehcidebug) {
396 ehci_dump_sqh(sqh);
397 }
398 #endif
399
400 /* Point to async list */
401 sc->sc_async_head = sqh;
402 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
403
404 usb_callout_init(sc->sc_tmo_pcd);
405
406 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
407
408 /* Enable interrupts */
409 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
410
411 /* Turn on controller */
412 EOWRITE4(sc, EHCI_USBCMD,
413 EHCI_CMD_ITC_8 | /* 8 microframes */
414 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
415 EHCI_CMD_ASE |
416 /* EHCI_CMD_PSE | */
417 EHCI_CMD_RS);
418
419 /* Take over port ownership */
420 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
421
422 for (i = 0; i < 100; i++) {
423 usb_delay_ms(&sc->sc_bus, 1);
424 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
425 if (!hcr)
426 break;
427 }
428 if (hcr) {
429 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
430 return (USBD_IOERROR);
431 }
432
433 return (USBD_NORMAL_COMPLETION);
434
435 #if 0
436 bad2:
437 ehci_free_sqh(sc, sc->sc_async_head);
438 #endif
439 bad1:
440 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
441 return (err);
442 }
443
444 int
445 ehci_intr(void *v)
446 {
447 ehci_softc_t *sc = v;
448
449 if (sc == NULL || sc->sc_dying)
450 return (0);
451
452 /* If we get an interrupt while polling, then just ignore it. */
453 if (sc->sc_bus.use_polling) {
454 #ifdef DIAGNOSTIC
455 printf("ehci_intr: ignored interrupt while polling\n");
456 #endif
457 return (0);
458 }
459
460 return (ehci_intr1(sc));
461 }
462
463 Static int
464 ehci_intr1(ehci_softc_t *sc)
465 {
466 u_int32_t intrs, eintrs;
467
468 DPRINTFN(20,("ehci_intr1: enter\n"));
469
470 /* In case the interrupt occurs before initialization has completed. */
471 if (sc == NULL) {
472 #ifdef DIAGNOSTIC
473 printf("ehci_intr: sc == NULL\n");
474 #endif
475 return (0);
476 }
477
478 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
479
480 if (!intrs)
481 return (0);
482
483 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
484 eintrs = intrs & sc->sc_eintrs;
485 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
486 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
487 (u_int)eintrs));
488 if (!eintrs)
489 return (0);
490
491 sc->sc_bus.intr_context++;
492 sc->sc_bus.no_intrs++;
493 if (eintrs & EHCI_STS_IAA) {
494 DPRINTF(("ehci_intr1: door bell\n"));
495 wakeup(&sc->sc_async_head);
496 eintrs &= ~EHCI_STS_IAA;
497 }
498 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
499 DPRINTF(("ehci_intr1: %s %s\n",
500 eintrs & EHCI_STS_INT ? "INT" : "",
501 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
502 usb_schedsoftintr(&sc->sc_bus);
503 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
504 }
505 if (eintrs & EHCI_STS_HSE) {
506 printf("%s: unrecoverable error, controller halted\n",
507 USBDEVNAME(sc->sc_bus.bdev));
508 /* XXX what else */
509 }
510 if (eintrs & EHCI_STS_PCD) {
511 ehci_pcd(sc, sc->sc_intrxfer);
512 /*
513 * Disable PCD interrupt for now, because it will be
514 * on until the port has been reset.
515 */
516 ehci_pcd_able(sc, 0);
517 /* Do not allow RHSC interrupts > 1 per second */
518 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
519 eintrs &= ~EHCI_STS_PCD;
520 }
521
522 sc->sc_bus.intr_context--;
523
524 if (eintrs != 0) {
525 /* Block unprocessed interrupts. */
526 sc->sc_eintrs &= ~eintrs;
527 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
528 printf("%s: blocking intrs 0x%x\n",
529 USBDEVNAME(sc->sc_bus.bdev), eintrs);
530 }
531
532 return (1);
533 }
534
535 void
536 ehci_pcd_able(ehci_softc_t *sc, int on)
537 {
538 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
539 if (on)
540 sc->sc_eintrs |= EHCI_STS_PCD;
541 else
542 sc->sc_eintrs &= ~EHCI_STS_PCD;
543 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
544 }
545
546 void
547 ehci_pcd_enable(void *v_sc)
548 {
549 ehci_softc_t *sc = v_sc;
550
551 ehci_pcd_able(sc, 1);
552 }
553
554 void
555 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
556 {
557 usbd_pipe_handle pipe;
558 struct ehci_pipe *epipe;
559 u_char *p;
560 int i, m;
561
562 if (xfer == NULL) {
563 /* Just ignore the change. */
564 return;
565 }
566
567 pipe = xfer->pipe;
568 epipe = (struct ehci_pipe *)pipe;
569
570 p = KERNADDR(&xfer->dmabuf, 0);
571 m = min(sc->sc_noport, xfer->length * 8 - 1);
572 memset(p, 0, xfer->length);
573 for (i = 1; i <= m; i++) {
574 /* Pick out CHANGE bits from the status reg. */
575 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
576 p[i/8] |= 1 << (i%8);
577 }
578 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
579 xfer->actlen = xfer->length;
580 xfer->status = USBD_NORMAL_COMPLETION;
581
582 usb_transfer_complete(xfer);
583 }
584
585 void
586 ehci_softintr(void *v)
587 {
588 ehci_softc_t *sc = v;
589 struct ehci_xfer *ex;
590
591 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
592 sc->sc_bus.intr_context));
593
594 sc->sc_bus.intr_context++;
595
596 /*
597 * The only explanation I can think of for why EHCI is as brain dead
598 * as UHCI interrupt-wise is that Intel was involved in both.
599 * An interrupt just tells us that something is done, we have no
600 * clue what, so we need to scan through all active transfers. :-(
601 */
602 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
603 ehci_check_intr(sc, ex);
604
605 if (sc->sc_softwake) {
606 sc->sc_softwake = 0;
607 wakeup(&sc->sc_softwake);
608 }
609
610 sc->sc_bus.intr_context--;
611 }
612
613 /* Check for an interrupt. */
614 void
615 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
616 {
617 ehci_soft_qtd_t *sqtd, *lsqtd;
618 u_int32_t status;
619
620 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
621
622 if (ex->sqtdstart == NULL) {
623 printf("ehci_check_intr: sqtdstart=NULL\n");
624 return;
625 }
626 lsqtd = ex->sqtdend;
627 #ifdef DIAGNOSTIC
628 if (lsqtd == NULL) {
629 printf("ehci_check_intr: sqtd==0\n");
630 return;
631 }
632 #endif
633 /*
634 * If the last TD is still active we need to check whether there
635 * is a an error somewhere in the middle, or whether there was a
636 * short packet (SPD and not ACTIVE).
637 */
638 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
639 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
640 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
641 status = le32toh(sqtd->qtd.qtd_status);
642 /* If there's an active QTD the xfer isn't done. */
643 if (status & EHCI_QTD_ACTIVE)
644 break;
645 /* Any kind of error makes the xfer done. */
646 if (status & EHCI_QTD_HALTED)
647 goto done;
648 /* We want short packets, and it is short: it's done */
649 if (EHCI_QTD_SET_BYTES(status) != 0)
650 goto done;
651 }
652 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
653 ex, ex->sqtdstart));
654 return;
655 }
656 done:
657 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
658 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
659 ehci_idone(ex);
660 }
661
662 void
663 ehci_idone(struct ehci_xfer *ex)
664 {
665 usbd_xfer_handle xfer = &ex->xfer;
666 #ifdef EHCI_DEBUG
667 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
668 #endif
669 ehci_soft_qtd_t *sqtd;
670 u_int32_t status = 0, nstatus;
671 int actlen;
672
673 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
674 #ifdef DIAGNOSTIC
675 {
676 int s = splhigh();
677 if (ex->isdone) {
678 splx(s);
679 #ifdef EHCI_DEBUG
680 printf("ehci_idone: ex is done!\n ");
681 ehci_dump_exfer(ex);
682 #else
683 printf("ehci_idone: ex=%p is done!\n", ex);
684 #endif
685 return;
686 }
687 ex->isdone = 1;
688 splx(s);
689 }
690 #endif
691
692 if (xfer->status == USBD_CANCELLED ||
693 xfer->status == USBD_TIMEOUT) {
694 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
695 return;
696 }
697
698 #ifdef EHCI_DEBUG
699 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
700 if (ehcidebug > 10)
701 ehci_dump_sqtds(ex->sqtdstart);
702 #endif
703
704 /* The transfer is done, compute actual length and status. */
705 actlen = 0;
706 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
707 nstatus = le32toh(sqtd->qtd.qtd_status);
708 if (nstatus & EHCI_QTD_ACTIVE)
709 break;
710
711 status = nstatus;
712 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
713 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
714 }
715
716 /* If there are left over TDs we need to update the toggle. */
717 if (sqtd != NULL) {
718 if (!(xfer->rqflags & URQ_REQUEST))
719 printf("ehci_idone: need toggle update\n");
720 #if 0
721 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
722 #endif
723 }
724
725 status &= EHCI_QTD_STATERRS;
726 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
727 xfer->length, actlen, status));
728 xfer->actlen = actlen;
729 if (status != 0) {
730 #ifdef EHCI_DEBUG
731 char sbuf[128];
732
733 bitmask_snprintf((u_int32_t)status,
734 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
735 "\7HALTED",
736 sbuf, sizeof(sbuf));
737
738 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
739 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
740 "status 0x%s\n",
741 xfer->pipe->device->address,
742 xfer->pipe->endpoint->edesc->bEndpointAddress,
743 sbuf));
744 if (ehcidebug > 2) {
745 ehci_dump_sqh(epipe->sqh);
746 ehci_dump_sqtds(ex->sqtdstart);
747 }
748 #endif
749 if (status == EHCI_QTD_HALTED)
750 xfer->status = USBD_STALLED;
751 else
752 xfer->status = USBD_IOERROR; /* more info XXX */
753 } else {
754 xfer->status = USBD_NORMAL_COMPLETION;
755 }
756
757 usb_transfer_complete(xfer);
758 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
759 }
760
761 /*
762 * Wait here until controller claims to have an interrupt.
763 * Then call ehci_intr and return. Use timeout to avoid waiting
764 * too long.
765 */
766 void
767 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
768 {
769 int timo = xfer->timeout;
770 int usecs;
771 u_int32_t intrs;
772
773 xfer->status = USBD_IN_PROGRESS;
774 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
775 usb_delay_ms(&sc->sc_bus, 1);
776 if (sc->sc_dying)
777 break;
778 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
779 sc->sc_eintrs;
780 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
781 #ifdef OHCI_DEBUG
782 if (ehcidebug > 15)
783 ehci_dump_regs(sc);
784 #endif
785 if (intrs) {
786 ehci_intr1(sc);
787 if (xfer->status != USBD_IN_PROGRESS)
788 return;
789 }
790 }
791
792 /* Timeout */
793 DPRINTF(("ehci_waitintr: timeout\n"));
794 xfer->status = USBD_TIMEOUT;
795 usb_transfer_complete(xfer);
796 /* XXX should free TD */
797 }
798
799 void
800 ehci_poll(struct usbd_bus *bus)
801 {
802 ehci_softc_t *sc = (ehci_softc_t *)bus;
803 #ifdef EHCI_DEBUG
804 static int last;
805 int new;
806 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
807 if (new != last) {
808 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
809 last = new;
810 }
811 #endif
812
813 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
814 ehci_intr1(sc);
815 }
816
817 int
818 ehci_detach(struct ehci_softc *sc, int flags)
819 {
820 int rv = 0;
821
822 if (sc->sc_child != NULL)
823 rv = config_detach(sc->sc_child, flags);
824
825 if (rv != 0)
826 return (rv);
827
828 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
829
830 if (sc->sc_powerhook != NULL)
831 powerhook_disestablish(sc->sc_powerhook);
832 if (sc->sc_shutdownhook != NULL)
833 shutdownhook_disestablish(sc->sc_shutdownhook);
834
835 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
836
837 /* XXX free other data structures XXX */
838
839 return (rv);
840 }
841
842
843 int
844 ehci_activate(device_ptr_t self, enum devact act)
845 {
846 struct ehci_softc *sc = (struct ehci_softc *)self;
847 int rv = 0;
848
849 switch (act) {
850 case DVACT_ACTIVATE:
851 return (EOPNOTSUPP);
852 break;
853
854 case DVACT_DEACTIVATE:
855 if (sc->sc_child != NULL)
856 rv = config_deactivate(sc->sc_child);
857 sc->sc_dying = 1;
858 break;
859 }
860 return (rv);
861 }
862
863 /*
864 * Handle suspend/resume.
865 *
866 * We need to switch to polling mode here, because this routine is
867 * called from an intterupt context. This is all right since we
868 * are almost suspended anyway.
869 */
870 void
871 ehci_power(int why, void *v)
872 {
873 ehci_softc_t *sc = v;
874 //u_int32_t ctl;
875 int s;
876
877 #ifdef EHCI_DEBUG
878 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
879 ehci_dump_regs(sc);
880 #endif
881
882 s = splhardusb();
883 switch (why) {
884 case PWR_SUSPEND:
885 case PWR_STANDBY:
886 sc->sc_bus.use_polling++;
887 #if 0
888 OOO
889 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
890 if (sc->sc_control == 0) {
891 /*
892 * Preserve register values, in case that APM BIOS
893 * does not recover them.
894 */
895 sc->sc_control = ctl;
896 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
897 }
898 ctl |= EHCI_HCFS_SUSPEND;
899 OWRITE4(sc, EHCI_CONTROL, ctl);
900 #endif
901 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
902 sc->sc_bus.use_polling--;
903 break;
904 case PWR_RESUME:
905 sc->sc_bus.use_polling++;
906 #if 0
907 OOO
908 /* Some broken BIOSes do not recover these values */
909 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
910 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
911 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
912 if (sc->sc_intre)
913 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
914 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
915 if (sc->sc_control)
916 ctl = sc->sc_control;
917 else
918 ctl = OREAD4(sc, EHCI_CONTROL);
919 ctl |= EHCI_HCFS_RESUME;
920 OWRITE4(sc, EHCI_CONTROL, ctl);
921 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
922 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
923 OWRITE4(sc, EHCI_CONTROL, ctl);
924 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
925 sc->sc_control = sc->sc_intre = 0;
926 #endif
927 sc->sc_bus.use_polling--;
928 break;
929 case PWR_SOFTSUSPEND:
930 case PWR_SOFTSTANDBY:
931 case PWR_SOFTRESUME:
932 break;
933 }
934 splx(s);
935 }
936
937 /*
938 * Shut down the controller when the system is going down.
939 */
940 void
941 ehci_shutdown(void *v)
942 {
943 ehci_softc_t *sc = v;
944
945 DPRINTF(("ehci_shutdown: stopping the HC\n"));
946 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
947 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
948 }
949
950 usbd_status
951 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
952 {
953 struct ehci_softc *sc = (struct ehci_softc *)bus;
954 usbd_status err;
955
956 err = usb_allocmem(&sc->sc_bus, size, 0, dma);
957 #ifdef EHCI_DEBUG
958 if (err)
959 printf("ehci_allocm: usb_allocmem()=%d\n", err);
960 #endif
961 return (err);
962 }
963
964 void
965 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
966 {
967 struct ehci_softc *sc = (struct ehci_softc *)bus;
968
969 usb_freemem(&sc->sc_bus, dma);
970 }
971
972 usbd_xfer_handle
973 ehci_allocx(struct usbd_bus *bus)
974 {
975 struct ehci_softc *sc = (struct ehci_softc *)bus;
976 usbd_xfer_handle xfer;
977
978 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
979 if (xfer != NULL) {
980 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
981 #ifdef DIAGNOSTIC
982 if (xfer->busy_free != XFER_FREE) {
983 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
984 xfer->busy_free);
985 }
986 #endif
987 } else {
988 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
989 }
990 if (xfer != NULL) {
991 memset(xfer, 0, sizeof (struct ehci_xfer));
992 #ifdef DIAGNOSTIC
993 EXFER(xfer)->isdone = 1;
994 xfer->busy_free = XFER_BUSY;
995 #endif
996 }
997 return (xfer);
998 }
999
1000 void
1001 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1002 {
1003 struct ehci_softc *sc = (struct ehci_softc *)bus;
1004
1005 #ifdef DIAGNOSTIC
1006 if (xfer->busy_free != XFER_BUSY) {
1007 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1008 xfer->busy_free);
1009 return;
1010 }
1011 xfer->busy_free = XFER_FREE;
1012 if (!EXFER(xfer)->isdone) {
1013 printf("ehci_freex: !isdone\n");
1014 return;
1015 }
1016 #endif
1017 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1018 }
1019
1020 Static void
1021 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1022 {
1023 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1024
1025 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1026 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1027 #ifdef USB_DEBUG
1028 if (ehcidebug)
1029 usbd_dump_pipe(pipe);
1030 #endif
1031 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
1032 }
1033
1034 Static void
1035 ehci_noop(usbd_pipe_handle pipe)
1036 {
1037 }
1038
1039 #ifdef EHCI_DEBUG
1040 void
1041 ehci_dump_regs(ehci_softc_t *sc)
1042 {
1043 int i;
1044 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1045 EOREAD4(sc, EHCI_USBCMD),
1046 EOREAD4(sc, EHCI_USBSTS),
1047 EOREAD4(sc, EHCI_USBINTR));
1048 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1049 EOREAD4(sc, EHCI_FRINDEX),
1050 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1051 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1052 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1053 for (i = 1; i <= sc->sc_noport; i++)
1054 printf("port %d status=0x%08x\n", i,
1055 EOREAD4(sc, EHCI_PORTSC(i)));
1056 }
1057
1058 void
1059 ehci_dump()
1060 {
1061 ehci_dump_regs(theehci);
1062 }
1063
1064 void
1065 ehci_dump_link(ehci_link_t link, int type)
1066 {
1067 link = le32toh(link);
1068 printf("0x%08x", link);
1069 if (link & EHCI_LINK_TERMINATE)
1070 printf("<T>");
1071 else {
1072 printf("<");
1073 if (type) {
1074 switch (EHCI_LINK_TYPE(link)) {
1075 case EHCI_LINK_ITD: printf("ITD"); break;
1076 case EHCI_LINK_QH: printf("QH"); break;
1077 case EHCI_LINK_SITD: printf("SITD"); break;
1078 case EHCI_LINK_FSTN: printf("FSTN"); break;
1079 }
1080 }
1081 printf(">");
1082 }
1083 }
1084
1085 void
1086 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1087 {
1088 int i;
1089 u_int32_t stop;
1090
1091 stop = 0;
1092 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1093 ehci_dump_sqtd(sqtd);
1094 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE;
1095 }
1096 if (sqtd)
1097 printf("dump aborted, too many TDs\n");
1098 }
1099
1100 void
1101 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1102 {
1103 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1104 ehci_dump_qtd(&sqtd->qtd);
1105 }
1106
1107 void
1108 ehci_dump_qtd(ehci_qtd_t *qtd)
1109 {
1110 u_int32_t s;
1111 char sbuf[128];
1112
1113 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1114 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1115 printf("\n");
1116 s = le32toh(qtd->qtd_status);
1117 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1118 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1119 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1120 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1121 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1122 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1123 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1124 EHCI_QTD_GET_PID(s), sbuf);
1125 for (s = 0; s < 5; s++)
1126 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1127 }
1128
1129 void
1130 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1131 {
1132 ehci_qh_t *qh = &sqh->qh;
1133 u_int32_t endp, endphub;
1134
1135 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1136 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1137 endp = le32toh(qh->qh_endp);
1138 printf(" endp=0x%08x\n", endp);
1139 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1140 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1141 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1142 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1143 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1144 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1145 EHCI_QH_GET_NRL(endp));
1146 endphub = le32toh(qh->qh_endphub);
1147 printf(" endphub=0x%08x\n", endphub);
1148 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1149 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1150 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1151 EHCI_QH_GET_MULT(endphub));
1152 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1153 printf("Overlay qTD:\n");
1154 ehci_dump_qtd(&qh->qh_qtd);
1155 }
1156
1157 #ifdef DIAGNOSTIC
1158 Static void
1159 ehci_dump_exfer(struct ehci_xfer *ex)
1160 {
1161 printf("ehci_dump_exfer: ex=%p\n", ex);
1162 }
1163 #endif
1164 #endif
1165
1166 usbd_status
1167 ehci_open(usbd_pipe_handle pipe)
1168 {
1169 usbd_device_handle dev = pipe->device;
1170 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1171 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1172 u_int8_t addr = dev->address;
1173 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1174 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1175 ehci_soft_qh_t *sqh;
1176 usbd_status err;
1177 int s;
1178 int speed, naks;
1179
1180 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1181 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1182
1183 if (sc->sc_dying)
1184 return (USBD_IOERROR);
1185
1186 if (addr == sc->sc_addr) {
1187 switch (ed->bEndpointAddress) {
1188 case USB_CONTROL_ENDPOINT:
1189 pipe->methods = &ehci_root_ctrl_methods;
1190 break;
1191 case UE_DIR_IN | EHCI_INTR_ENDPT:
1192 pipe->methods = &ehci_root_intr_methods;
1193 break;
1194 default:
1195 return (USBD_INVAL);
1196 }
1197 return (USBD_NORMAL_COMPLETION);
1198 }
1199
1200 /* XXX All this stuff is only valid for async. */
1201 switch (dev->speed) {
1202 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1203 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1204 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1205 default: panic("ehci_open: bad device speed %d", dev->speed);
1206 }
1207 naks = 8; /* XXX */
1208 sqh = ehci_alloc_sqh(sc);
1209 if (sqh == NULL)
1210 goto bad0;
1211 /* qh_link filled when the QH is added */
1212 sqh->qh.qh_endp = htole32(
1213 EHCI_QH_SET_ADDR(addr) |
1214 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1215 EHCI_QH_SET_EPS(speed) | /* XXX */
1216 /* XXX EHCI_QH_DTC ? */
1217 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1218 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1219 EHCI_QH_CTL : 0) |
1220 EHCI_QH_SET_NRL(naks)
1221 );
1222 sqh->qh.qh_endphub = htole32(
1223 EHCI_QH_SET_MULT(1)
1224 /* XXX TT stuff */
1225 /* XXX interrupt mask */
1226 );
1227 sqh->qh.qh_curqtd = EHCI_NULL;
1228 /* Fill the overlay qTD */
1229 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1230 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1231 sqh->qh.qh_qtd.qtd_status = htole32(0);
1232
1233 epipe->sqh = sqh;
1234
1235 switch (xfertype) {
1236 case UE_CONTROL:
1237 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1238 0, &epipe->u.ctl.reqdma);
1239 #ifdef EHCI_DEBUG
1240 if (err)
1241 printf("ehci_open: usb_allocmem()=%d\n", err);
1242 #endif
1243 if (err)
1244 goto bad1;
1245 pipe->methods = &ehci_device_ctrl_methods;
1246 s = splusb();
1247 ehci_add_qh(sqh, sc->sc_async_head);
1248 splx(s);
1249 break;
1250 case UE_BULK:
1251 pipe->methods = &ehci_device_bulk_methods;
1252 s = splusb();
1253 ehci_add_qh(sqh, sc->sc_async_head);
1254 splx(s);
1255 break;
1256 case UE_INTERRUPT:
1257 pipe->methods = &ehci_device_intr_methods;
1258 return (USBD_INVAL);
1259 case UE_ISOCHRONOUS:
1260 pipe->methods = &ehci_device_isoc_methods;
1261 return (USBD_INVAL);
1262 default:
1263 return (USBD_INVAL);
1264 }
1265 return (USBD_NORMAL_COMPLETION);
1266
1267 bad1:
1268 ehci_free_sqh(sc, sqh);
1269 bad0:
1270 return (USBD_NOMEM);
1271 }
1272
1273 /*
1274 * Add an ED to the schedule. Called at splusb().
1275 */
1276 void
1277 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1278 {
1279 SPLUSBCHECK;
1280
1281 sqh->next = head->next;
1282 sqh->qh.qh_link = head->qh.qh_link;
1283 head->next = sqh;
1284 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1285
1286 #ifdef EHCI_DEBUG
1287 if (ehcidebug > 5) {
1288 printf("ehci_add_qh:\n");
1289 ehci_dump_sqh(sqh);
1290 }
1291 #endif
1292 }
1293
1294 /*
1295 * Remove an ED from the schedule. Called at splusb().
1296 */
1297 void
1298 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1299 {
1300 ehci_soft_qh_t *p;
1301
1302 SPLUSBCHECK;
1303 /* XXX */
1304 for (p = head; p == NULL && p->next != sqh; p = p->next)
1305 ;
1306 if (p == NULL)
1307 panic("ehci_rem_qh: ED not found");
1308 p->next = sqh->next;
1309 p->qh.qh_link = sqh->qh.qh_link;
1310
1311 ehci_sync_hc(sc);
1312 }
1313
1314 void
1315 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1316 {
1317 /* Halt while we are messing. */
1318 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1319 sqh->qh.qh_curqtd = 0;
1320 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1321 sqh->sqtd = sqtd;
1322 /* Keep toggle, clear the rest, including length. */
1323 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
1324 }
1325
1326 /*
1327 * Ensure that the HC has released all references to the QH. We do this
1328 * by asking for a Async Advance Doorbell interrupt and then we wait for
1329 * the interrupt.
1330 * To make this easier we first obtain exclusive use of the doorbell.
1331 */
1332 void
1333 ehci_sync_hc(ehci_softc_t *sc)
1334 {
1335 int s, error;
1336
1337 if (sc->sc_dying) {
1338 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1339 return;
1340 }
1341 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1342 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1343 s = splhardusb();
1344 /* ask for doorbell */
1345 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1346 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1347 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1348 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1349 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1350 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1351 splx(s);
1352 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1353 #ifdef DIAGNOSTIC
1354 if (error)
1355 printf("ehci_sync_hc: tsleep() = %d\n", error);
1356 #endif
1357 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1358 }
1359
1360 /***********/
1361
1362 /*
1363 * Data structures and routines to emulate the root hub.
1364 */
1365 Static usb_device_descriptor_t ehci_devd = {
1366 USB_DEVICE_DESCRIPTOR_SIZE,
1367 UDESC_DEVICE, /* type */
1368 {0x00, 0x02}, /* USB version */
1369 UDCLASS_HUB, /* class */
1370 UDSUBCLASS_HUB, /* subclass */
1371 UDPROTO_HSHUBSTT, /* protocol */
1372 64, /* max packet */
1373 {0},{0},{0x00,0x01}, /* device id */
1374 1,2,0, /* string indicies */
1375 1 /* # of configurations */
1376 };
1377
1378 Static usb_device_qualifier_t ehci_odevd = {
1379 USB_DEVICE_DESCRIPTOR_SIZE,
1380 UDESC_DEVICE_QUALIFIER, /* type */
1381 {0x00, 0x02}, /* USB version */
1382 UDCLASS_HUB, /* class */
1383 UDSUBCLASS_HUB, /* subclass */
1384 UDPROTO_FSHUB, /* protocol */
1385 64, /* max packet */
1386 1, /* # of configurations */
1387 0
1388 };
1389
1390 Static usb_config_descriptor_t ehci_confd = {
1391 USB_CONFIG_DESCRIPTOR_SIZE,
1392 UDESC_CONFIG,
1393 {USB_CONFIG_DESCRIPTOR_SIZE +
1394 USB_INTERFACE_DESCRIPTOR_SIZE +
1395 USB_ENDPOINT_DESCRIPTOR_SIZE},
1396 1,
1397 1,
1398 0,
1399 UC_SELF_POWERED,
1400 0 /* max power */
1401 };
1402
1403 Static usb_interface_descriptor_t ehci_ifcd = {
1404 USB_INTERFACE_DESCRIPTOR_SIZE,
1405 UDESC_INTERFACE,
1406 0,
1407 0,
1408 1,
1409 UICLASS_HUB,
1410 UISUBCLASS_HUB,
1411 UIPROTO_HSHUBSTT,
1412 0
1413 };
1414
1415 Static usb_endpoint_descriptor_t ehci_endpd = {
1416 USB_ENDPOINT_DESCRIPTOR_SIZE,
1417 UDESC_ENDPOINT,
1418 UE_DIR_IN | EHCI_INTR_ENDPT,
1419 UE_INTERRUPT,
1420 {8, 0}, /* max packet */
1421 255
1422 };
1423
1424 Static usb_hub_descriptor_t ehci_hubd = {
1425 USB_HUB_DESCRIPTOR_SIZE,
1426 UDESC_HUB,
1427 0,
1428 {0,0},
1429 0,
1430 0,
1431 {0},
1432 };
1433
1434 Static int
1435 ehci_str(p, l, s)
1436 usb_string_descriptor_t *p;
1437 int l;
1438 char *s;
1439 {
1440 int i;
1441
1442 if (l == 0)
1443 return (0);
1444 p->bLength = 2 * strlen(s) + 2;
1445 if (l == 1)
1446 return (1);
1447 p->bDescriptorType = UDESC_STRING;
1448 l -= 2;
1449 for (i = 0; s[i] && l > 1; i++, l -= 2)
1450 USETW2(p->bString[i], 0, s[i]);
1451 return (2*i+2);
1452 }
1453
1454 /*
1455 * Simulate a hardware hub by handling all the necessary requests.
1456 */
1457 Static usbd_status
1458 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1459 {
1460 usbd_status err;
1461
1462 /* Insert last in queue. */
1463 err = usb_insert_transfer(xfer);
1464 if (err)
1465 return (err);
1466
1467 /* Pipe isn't running, start first */
1468 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1469 }
1470
1471 Static usbd_status
1472 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1473 {
1474 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1475 usb_device_request_t *req;
1476 void *buf = NULL;
1477 int port, i;
1478 int s, len, value, index, l, totlen = 0;
1479 usb_port_status_t ps;
1480 usb_hub_descriptor_t hubd;
1481 usbd_status err;
1482 u_int32_t v;
1483
1484 if (sc->sc_dying)
1485 return (USBD_IOERROR);
1486
1487 #ifdef DIAGNOSTIC
1488 if (!(xfer->rqflags & URQ_REQUEST))
1489 /* XXX panic */
1490 return (USBD_INVAL);
1491 #endif
1492 req = &xfer->request;
1493
1494 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1495 req->bmRequestType, req->bRequest));
1496
1497 len = UGETW(req->wLength);
1498 value = UGETW(req->wValue);
1499 index = UGETW(req->wIndex);
1500
1501 if (len != 0)
1502 buf = KERNADDR(&xfer->dmabuf, 0);
1503
1504 #define C(x,y) ((x) | ((y) << 8))
1505 switch(C(req->bRequest, req->bmRequestType)) {
1506 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1507 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1508 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1509 /*
1510 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1511 * for the integrated root hub.
1512 */
1513 break;
1514 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1515 if (len > 0) {
1516 *(u_int8_t *)buf = sc->sc_conf;
1517 totlen = 1;
1518 }
1519 break;
1520 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1521 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1522 switch(value >> 8) {
1523 case UDESC_DEVICE:
1524 if ((value & 0xff) != 0) {
1525 err = USBD_IOERROR;
1526 goto ret;
1527 }
1528 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1529 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1530 memcpy(buf, &ehci_devd, l);
1531 break;
1532 /*
1533 * We can't really operate at another speed, but the spec says
1534 * we need this descriptor.
1535 */
1536 case UDESC_DEVICE_QUALIFIER:
1537 if ((value & 0xff) != 0) {
1538 err = USBD_IOERROR;
1539 goto ret;
1540 }
1541 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1542 memcpy(buf, &ehci_odevd, l);
1543 break;
1544 /*
1545 * We can't really operate at another speed, but the spec says
1546 * we need this descriptor.
1547 */
1548 case UDESC_OTHER_SPEED_CONFIGURATION:
1549 case UDESC_CONFIG:
1550 if ((value & 0xff) != 0) {
1551 err = USBD_IOERROR;
1552 goto ret;
1553 }
1554 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1555 memcpy(buf, &ehci_confd, l);
1556 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1557 value >> 8;
1558 buf = (char *)buf + l;
1559 len -= l;
1560 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1561 totlen += l;
1562 memcpy(buf, &ehci_ifcd, l);
1563 buf = (char *)buf + l;
1564 len -= l;
1565 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1566 totlen += l;
1567 memcpy(buf, &ehci_endpd, l);
1568 break;
1569 case UDESC_STRING:
1570 if (len == 0)
1571 break;
1572 *(u_int8_t *)buf = 0;
1573 totlen = 1;
1574 switch (value & 0xff) {
1575 case 1: /* Vendor */
1576 totlen = ehci_str(buf, len, sc->sc_vendor);
1577 break;
1578 case 2: /* Product */
1579 totlen = ehci_str(buf, len, "EHCI root hub");
1580 break;
1581 }
1582 break;
1583 default:
1584 err = USBD_IOERROR;
1585 goto ret;
1586 }
1587 break;
1588 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1589 if (len > 0) {
1590 *(u_int8_t *)buf = 0;
1591 totlen = 1;
1592 }
1593 break;
1594 case C(UR_GET_STATUS, UT_READ_DEVICE):
1595 if (len > 1) {
1596 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1597 totlen = 2;
1598 }
1599 break;
1600 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1601 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1602 if (len > 1) {
1603 USETW(((usb_status_t *)buf)->wStatus, 0);
1604 totlen = 2;
1605 }
1606 break;
1607 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1608 if (value >= USB_MAX_DEVICES) {
1609 err = USBD_IOERROR;
1610 goto ret;
1611 }
1612 sc->sc_addr = value;
1613 break;
1614 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1615 if (value != 0 && value != 1) {
1616 err = USBD_IOERROR;
1617 goto ret;
1618 }
1619 sc->sc_conf = value;
1620 break;
1621 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1622 break;
1623 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1624 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1625 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1626 err = USBD_IOERROR;
1627 goto ret;
1628 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1629 break;
1630 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1631 break;
1632 /* Hub requests */
1633 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1634 break;
1635 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1636 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1637 "port=%d feature=%d\n",
1638 index, value));
1639 if (index < 1 || index > sc->sc_noport) {
1640 err = USBD_IOERROR;
1641 goto ret;
1642 }
1643 port = EHCI_PORTSC(index);
1644 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1645 switch(value) {
1646 case UHF_PORT_ENABLE:
1647 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1648 break;
1649 case UHF_PORT_SUSPEND:
1650 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1651 break;
1652 case UHF_PORT_POWER:
1653 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1654 break;
1655 case UHF_PORT_TEST:
1656 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1657 "%d\n", index));
1658 break;
1659 case UHF_PORT_INDICATOR:
1660 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1661 "%d\n", index));
1662 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1663 break;
1664 case UHF_C_PORT_CONNECTION:
1665 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1666 break;
1667 case UHF_C_PORT_ENABLE:
1668 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1669 break;
1670 case UHF_C_PORT_SUSPEND:
1671 /* how? */
1672 break;
1673 case UHF_C_PORT_OVER_CURRENT:
1674 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1675 break;
1676 case UHF_C_PORT_RESET:
1677 sc->sc_isreset = 0;
1678 break;
1679 default:
1680 err = USBD_IOERROR;
1681 goto ret;
1682 }
1683 #if 0
1684 switch(value) {
1685 case UHF_C_PORT_CONNECTION:
1686 case UHF_C_PORT_ENABLE:
1687 case UHF_C_PORT_SUSPEND:
1688 case UHF_C_PORT_OVER_CURRENT:
1689 case UHF_C_PORT_RESET:
1690 /* Enable RHSC interrupt if condition is cleared. */
1691 if ((OREAD4(sc, port) >> 16) == 0)
1692 ehci_pcd_able(sc, 1);
1693 break;
1694 default:
1695 break;
1696 }
1697 #endif
1698 break;
1699 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1700 if (value != 0) {
1701 err = USBD_IOERROR;
1702 goto ret;
1703 }
1704 hubd = ehci_hubd;
1705 hubd.bNbrPorts = sc->sc_noport;
1706 v = EOREAD4(sc, EHCI_HCSPARAMS);
1707 USETW(hubd.wHubCharacteristics,
1708 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1709 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1710 ? UHD_PORT_IND : 0);
1711 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1712 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1713 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1714 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1715 l = min(len, hubd.bDescLength);
1716 totlen = l;
1717 memcpy(buf, &hubd, l);
1718 break;
1719 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1720 if (len != 4) {
1721 err = USBD_IOERROR;
1722 goto ret;
1723 }
1724 memset(buf, 0, len); /* ? XXX */
1725 totlen = len;
1726 break;
1727 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1728 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1729 index));
1730 if (index < 1 || index > sc->sc_noport) {
1731 err = USBD_IOERROR;
1732 goto ret;
1733 }
1734 if (len != 4) {
1735 err = USBD_IOERROR;
1736 goto ret;
1737 }
1738 v = EOREAD4(sc, EHCI_PORTSC(index));
1739 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1740 v));
1741 i = UPS_HIGH_SPEED;
1742 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1743 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1744 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1745 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1746 if (v & EHCI_PS_PR) i |= UPS_RESET;
1747 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1748 USETW(ps.wPortStatus, i);
1749 i = 0;
1750 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1751 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1752 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1753 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1754 USETW(ps.wPortChange, i);
1755 l = min(len, sizeof ps);
1756 memcpy(buf, &ps, l);
1757 totlen = l;
1758 break;
1759 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1760 err = USBD_IOERROR;
1761 goto ret;
1762 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1763 break;
1764 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1765 if (index < 1 || index > sc->sc_noport) {
1766 err = USBD_IOERROR;
1767 goto ret;
1768 }
1769 port = EHCI_PORTSC(index);
1770 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1771 switch(value) {
1772 case UHF_PORT_ENABLE:
1773 EOWRITE4(sc, port, v | EHCI_PS_PE);
1774 break;
1775 case UHF_PORT_SUSPEND:
1776 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1777 break;
1778 case UHF_PORT_RESET:
1779 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1780 index));
1781 if (EHCI_PS_IS_LOWSPEED(v)) {
1782 /* Low speed device, give up ownership. */
1783 ehci_disown(sc, index, 1);
1784 break;
1785 }
1786 /* Start reset sequence. */
1787 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1788 EOWRITE4(sc, port, v | EHCI_PS_PR);
1789 /* Wait for reset to complete. */
1790 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1791 if (sc->sc_dying) {
1792 err = USBD_IOERROR;
1793 goto ret;
1794 }
1795 /* Terminate reset sequence. */
1796 EOWRITE4(sc, port, v);
1797 /* Wait for HC to complete reset. */
1798 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1799 if (sc->sc_dying) {
1800 err = USBD_IOERROR;
1801 goto ret;
1802 }
1803 v = EOREAD4(sc, port);
1804 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1805 if (v & EHCI_PS_PR) {
1806 printf("%s: port reset timeout\n",
1807 USBDEVNAME(sc->sc_bus.bdev));
1808 return (USBD_TIMEOUT);
1809 }
1810 if (!(v & EHCI_PS_PE)) {
1811 /* Not a high speed device, give up ownership.*/
1812 ehci_disown(sc, index, 0);
1813 break;
1814 }
1815 sc->sc_isreset = 1;
1816 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1817 index, v));
1818 break;
1819 case UHF_PORT_POWER:
1820 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1821 "%d\n", index));
1822 EOWRITE4(sc, port, v | EHCI_PS_PP);
1823 break;
1824 case UHF_PORT_TEST:
1825 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1826 "%d\n", index));
1827 break;
1828 case UHF_PORT_INDICATOR:
1829 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1830 "%d\n", index));
1831 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1832 break;
1833 default:
1834 err = USBD_IOERROR;
1835 goto ret;
1836 }
1837 break;
1838 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1839 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1840 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1841 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1842 break;
1843 default:
1844 err = USBD_IOERROR;
1845 goto ret;
1846 }
1847 xfer->actlen = totlen;
1848 err = USBD_NORMAL_COMPLETION;
1849 ret:
1850 xfer->status = err;
1851 s = splusb();
1852 usb_transfer_complete(xfer);
1853 splx(s);
1854 return (USBD_IN_PROGRESS);
1855 }
1856
1857 void
1858 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1859 {
1860 int port;
1861 u_int32_t v;
1862
1863 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1864 #ifdef DIAGNOSTIC
1865 if (sc->sc_npcomp != 0) {
1866 int i = (index-1) / sc->sc_npcomp;
1867 if (i >= sc->sc_ncomp)
1868 printf("%s: strange port\n",
1869 USBDEVNAME(sc->sc_bus.bdev));
1870 else
1871 printf("%s: handing over %s speed device on "
1872 "port %d to %s\n",
1873 USBDEVNAME(sc->sc_bus.bdev),
1874 lowspeed ? "low" : "full",
1875 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1876 } else {
1877 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1878 }
1879 #endif
1880 port = EHCI_PORTSC(index);
1881 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1882 EOWRITE4(sc, port, v | EHCI_PS_PO);
1883 }
1884
1885 /* Abort a root control request. */
1886 Static void
1887 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1888 {
1889 /* Nothing to do, all transfers are synchronous. */
1890 }
1891
1892 /* Close the root pipe. */
1893 Static void
1894 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1895 {
1896 DPRINTF(("ehci_root_ctrl_close\n"));
1897 /* Nothing to do. */
1898 }
1899
1900 void
1901 ehci_root_intr_done(usbd_xfer_handle xfer)
1902 {
1903 xfer->hcpriv = NULL;
1904 }
1905
1906 Static usbd_status
1907 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1908 {
1909 usbd_status err;
1910
1911 /* Insert last in queue. */
1912 err = usb_insert_transfer(xfer);
1913 if (err)
1914 return (err);
1915
1916 /* Pipe isn't running, start first */
1917 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1918 }
1919
1920 Static usbd_status
1921 ehci_root_intr_start(usbd_xfer_handle xfer)
1922 {
1923 usbd_pipe_handle pipe = xfer->pipe;
1924 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1925
1926 if (sc->sc_dying)
1927 return (USBD_IOERROR);
1928
1929 sc->sc_intrxfer = xfer;
1930
1931 return (USBD_IN_PROGRESS);
1932 }
1933
1934 /* Abort a root interrupt request. */
1935 Static void
1936 ehci_root_intr_abort(usbd_xfer_handle xfer)
1937 {
1938 int s;
1939
1940 if (xfer->pipe->intrxfer == xfer) {
1941 DPRINTF(("ehci_root_intr_abort: remove\n"));
1942 xfer->pipe->intrxfer = NULL;
1943 }
1944 xfer->status = USBD_CANCELLED;
1945 s = splusb();
1946 usb_transfer_complete(xfer);
1947 splx(s);
1948 }
1949
1950 /* Close the root pipe. */
1951 Static void
1952 ehci_root_intr_close(usbd_pipe_handle pipe)
1953 {
1954 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1955
1956 DPRINTF(("ehci_root_intr_close\n"));
1957
1958 sc->sc_intrxfer = NULL;
1959 }
1960
1961 void
1962 ehci_root_ctrl_done(usbd_xfer_handle xfer)
1963 {
1964 xfer->hcpriv = NULL;
1965 }
1966
1967 /************************/
1968
1969 ehci_soft_qh_t *
1970 ehci_alloc_sqh(ehci_softc_t *sc)
1971 {
1972 ehci_soft_qh_t *sqh;
1973 usbd_status err;
1974 int i, offs;
1975 usb_dma_t dma;
1976
1977 if (sc->sc_freeqhs == NULL) {
1978 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1979 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1980 EHCI_PAGE_SIZE, &dma);
1981 #ifdef EHCI_DEBUG
1982 if (err)
1983 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
1984 #endif
1985 if (err)
1986 return (NULL);
1987 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1988 offs = i * EHCI_SQH_SIZE;
1989 sqh = KERNADDR(&dma, offs);
1990 sqh->physaddr = DMAADDR(&dma, offs);
1991 sqh->next = sc->sc_freeqhs;
1992 sc->sc_freeqhs = sqh;
1993 }
1994 }
1995 sqh = sc->sc_freeqhs;
1996 sc->sc_freeqhs = sqh->next;
1997 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1998 sqh->next = NULL;
1999 return (sqh);
2000 }
2001
2002 void
2003 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2004 {
2005 sqh->next = sc->sc_freeqhs;
2006 sc->sc_freeqhs = sqh;
2007 }
2008
2009 ehci_soft_qtd_t *
2010 ehci_alloc_sqtd(ehci_softc_t *sc)
2011 {
2012 ehci_soft_qtd_t *sqtd;
2013 usbd_status err;
2014 int i, offs;
2015 usb_dma_t dma;
2016 int s;
2017
2018 if (sc->sc_freeqtds == NULL) {
2019 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2020 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2021 EHCI_PAGE_SIZE, &dma);
2022 #ifdef EHCI_DEBUG
2023 if (err)
2024 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2025 #endif
2026 if (err)
2027 return (NULL);
2028 s = splusb();
2029 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2030 offs = i * EHCI_SQTD_SIZE;
2031 sqtd = KERNADDR(&dma, offs);
2032 sqtd->physaddr = DMAADDR(&dma, offs);
2033 sqtd->nextqtd = sc->sc_freeqtds;
2034 sc->sc_freeqtds = sqtd;
2035 }
2036 splx(s);
2037 }
2038
2039 s = splusb();
2040 sqtd = sc->sc_freeqtds;
2041 sc->sc_freeqtds = sqtd->nextqtd;
2042 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2043 sqtd->nextqtd = NULL;
2044 sqtd->xfer = NULL;
2045 splx(s);
2046
2047 return (sqtd);
2048 }
2049
2050 void
2051 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2052 {
2053 int s;
2054
2055 s = splusb();
2056 sqtd->nextqtd = sc->sc_freeqtds;
2057 sc->sc_freeqtds = sqtd;
2058 splx(s);
2059 }
2060
2061 usbd_status
2062 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2063 int alen, int rd, usbd_xfer_handle xfer,
2064 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2065 {
2066 ehci_soft_qtd_t *next, *cur;
2067 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2068 u_int32_t qtdstatus;
2069 int len, curlen;
2070 int i;
2071 usb_dma_t *dma = &xfer->dmabuf;
2072
2073 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2074
2075 len = alen;
2076 dataphys = DMAADDR(dma, 0);
2077 dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2078 qtdstatus = htole32(
2079 EHCI_QTD_ACTIVE |
2080 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2081 EHCI_QTD_SET_CERR(3)
2082 /* IOC set below */
2083 /* BYTES set below */
2084 /* XXX Data toggle */
2085 );
2086
2087 cur = ehci_alloc_sqtd(sc);
2088 *sp = cur;
2089 if (cur == NULL)
2090 goto nomem;
2091 for (;;) {
2092 dataphyspage = EHCI_PAGE(dataphys);
2093 /* The EHCI hardware can handle at most 5 pages. */
2094 if (dataphyslastpage - dataphyspage <
2095 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2096 /* we can handle it in this QTD */
2097 curlen = len;
2098 } else {
2099 /* must use multiple TDs, fill as much as possible. */
2100 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2101 EHCI_PAGE_OFFSET(dataphys);
2102 #ifdef DIAGNOSTIC
2103 if (curlen > len) {
2104 printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2105 "len=0x%x offs=0x%x\n", curlen, len,
2106 EHCI_PAGE_OFFSET(dataphys));
2107 printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2108 dataphyslastpage, dataphyspage,
2109 dataphys);
2110 curlen = len;
2111 }
2112 #endif
2113
2114 /* XXX true for EHCI? */
2115 /* the length must be a multiple of the max size */
2116 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2117 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2118 "curlen=%d\n", curlen));
2119 #ifdef DIAGNOSTIC
2120 if (curlen == 0)
2121 panic("ehci_alloc_std: curlen == 0");
2122 #endif
2123 }
2124 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2125 "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2126 dataphys, dataphyslastpage,
2127 len, curlen));
2128 len -= curlen;
2129
2130 if (len != 0) {
2131 next = ehci_alloc_sqtd(sc);
2132 if (next == NULL)
2133 goto nomem;
2134 nextphys = next->physaddr;
2135 } else {
2136 next = NULL;
2137 nextphys = EHCI_NULL;
2138 }
2139
2140 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2141 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2142 if (i != 0) /* use offset only in first buffer */
2143 a = EHCI_PAGE(a);
2144 cur->qtd.qtd_buffer[i] = htole32(a);
2145 #ifdef DIAGNOSTIC
2146 if (i >= EHCI_QTD_NBUFFERS) {
2147 printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2148 goto nomem;
2149 }
2150 #endif
2151 }
2152 cur->nextqtd = next;
2153 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2154 cur->qtd.qtd_status =
2155 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2156 cur->xfer = xfer;
2157 cur->len = curlen;
2158 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2159 dataphys, dataphys + curlen));
2160 if (len == 0)
2161 break;
2162 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2163 dataphys += curlen;
2164 cur = next;
2165 }
2166 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2167 *ep = cur;
2168
2169 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2170 *sp, *ep));
2171
2172 return (USBD_NORMAL_COMPLETION);
2173
2174 nomem:
2175 /* XXX free chain */
2176 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2177 return (USBD_NOMEM);
2178 }
2179
2180 Static void
2181 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2182 ehci_soft_qtd_t *sqtdend)
2183 {
2184 ehci_soft_qtd_t *p;
2185 int i;
2186
2187 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2188 sqtd, sqtdend));
2189
2190 for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2191 p = sqtd->nextqtd;
2192 ehci_free_sqtd(sc, sqtd);
2193 }
2194 }
2195
2196 /****************/
2197
2198 /*
2199 * Close a reqular pipe.
2200 * Assumes that there are no pending transactions.
2201 */
2202 void
2203 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2204 {
2205 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2206 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2207 ehci_soft_qh_t *sqh = epipe->sqh;
2208 int s;
2209
2210 s = splusb();
2211 ehci_rem_qh(sc, sqh, head);
2212 splx(s);
2213 ehci_free_sqh(sc, epipe->sqh);
2214 }
2215
2216 /*
2217 * Abort a device request.
2218 * If this routine is called at splusb() it guarantees that the request
2219 * will be removed from the hardware scheduling and that the callback
2220 * for it will be called with USBD_CANCELLED status.
2221 * It's impossible to guarantee that the requested transfer will not
2222 * have happened since the hardware runs concurrently.
2223 * If the transaction has already happened we rely on the ordinary
2224 * interrupt processing to process it.
2225 * XXX This is most probably wrong.
2226 */
2227 void
2228 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2229 {
2230 #define exfer EXFER(xfer)
2231 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2232 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2233 ehci_soft_qh_t *sqh = epipe->sqh;
2234 ehci_soft_qtd_t *sqtd;
2235 ehci_physaddr_t cur;
2236 u_int32_t qhstatus;
2237 int s;
2238 int hit;
2239
2240 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2241
2242 if (sc->sc_dying) {
2243 /* If we're dying, just do the software part. */
2244 s = splusb();
2245 xfer->status = status; /* make software ignore it */
2246 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2247 usb_transfer_complete(xfer);
2248 splx(s);
2249 return;
2250 }
2251
2252 if (xfer->device->bus->intr_context || !curproc)
2253 panic("ehci_abort_xfer: not in process context");
2254
2255 /*
2256 * Step 1: Make interrupt routine and hardware ignore xfer.
2257 */
2258 s = splusb();
2259 xfer->status = status; /* make software ignore it */
2260 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2261 qhstatus = sqh->qh.qh_qtd.qtd_status;
2262 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2263 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2264 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2265 if (sqtd == exfer->sqtdend)
2266 break;
2267 }
2268 splx(s);
2269
2270 /*
2271 * Step 2: Wait until we know hardware has finished any possible
2272 * use of the xfer. Also make sure the soft interrupt routine
2273 * has run.
2274 */
2275 ehci_sync_hc(sc);
2276 s = splusb();
2277 sc->sc_softwake = 1;
2278 usb_schedsoftintr(&sc->sc_bus);
2279 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2280 splx(s);
2281
2282 /*
2283 * Step 3: Remove any vestiges of the xfer from the hardware.
2284 * The complication here is that the hardware may have executed
2285 * beyond the xfer we're trying to abort. So as we're scanning
2286 * the TDs of this xfer we check if the hardware points to
2287 * any of them.
2288 */
2289 s = splusb(); /* XXX why? */
2290 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2291 hit = 0;
2292 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2293 hit |= cur == sqtd->physaddr;
2294 if (sqtd == exfer->sqtdend)
2295 break;
2296 }
2297 sqtd = sqtd->nextqtd;
2298 /* Zap curqtd register if hardware pointed inside the xfer. */
2299 if (hit && sqtd != NULL) {
2300 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2301 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2302 sqh->qh.qh_qtd.qtd_status = qhstatus;
2303 } else {
2304 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2305 }
2306
2307 /*
2308 * Step 4: Execute callback.
2309 */
2310 #ifdef DIAGNOSTIC
2311 exfer->isdone = 1;
2312 #endif
2313 usb_transfer_complete(xfer);
2314
2315 splx(s);
2316 #undef exfer
2317 }
2318
2319 void
2320 ehci_timeout(void *addr)
2321 {
2322 struct ehci_xfer *exfer = addr;
2323 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2324 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2325
2326 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2327 #ifdef USB_DEBUG
2328 if (ehcidebug > 1)
2329 usbd_dump_pipe(exfer->xfer.pipe);
2330 #endif
2331
2332 if (sc->sc_dying) {
2333 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2334 return;
2335 }
2336
2337 /* Execute the abort in a process context. */
2338 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2339 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2340 }
2341
2342 void
2343 ehci_timeout_task(void *addr)
2344 {
2345 usbd_xfer_handle xfer = addr;
2346 int s;
2347
2348 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2349
2350 s = splusb();
2351 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2352 splx(s);
2353 }
2354
2355 /************************/
2356
2357 Static usbd_status
2358 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2359 {
2360 usbd_status err;
2361
2362 /* Insert last in queue. */
2363 err = usb_insert_transfer(xfer);
2364 if (err)
2365 return (err);
2366
2367 /* Pipe isn't running, start first */
2368 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2369 }
2370
2371 Static usbd_status
2372 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2373 {
2374 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2375 usbd_status err;
2376
2377 if (sc->sc_dying)
2378 return (USBD_IOERROR);
2379
2380 #ifdef DIAGNOSTIC
2381 if (!(xfer->rqflags & URQ_REQUEST)) {
2382 /* XXX panic */
2383 printf("ehci_device_ctrl_transfer: not a request\n");
2384 return (USBD_INVAL);
2385 }
2386 #endif
2387
2388 err = ehci_device_request(xfer);
2389 if (err)
2390 return (err);
2391
2392 if (sc->sc_bus.use_polling)
2393 ehci_waitintr(sc, xfer);
2394 return (USBD_IN_PROGRESS);
2395 }
2396
2397 void
2398 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2399 {
2400 struct ehci_xfer *ex = EXFER(xfer);
2401 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2402 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2403
2404 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2405
2406 #ifdef DIAGNOSTIC
2407 if (!(xfer->rqflags & URQ_REQUEST)) {
2408 panic("ehci_ctrl_done: not a request");
2409 }
2410 #endif
2411
2412 if (xfer->status != USBD_NOMEM) {
2413 ehci_del_intr_list(ex); /* remove from active list */
2414 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2415 }
2416
2417 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2418 }
2419
2420 /* Abort a device control request. */
2421 Static void
2422 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2423 {
2424 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2425 ehci_abort_xfer(xfer, USBD_CANCELLED);
2426 }
2427
2428 /* Close a device control pipe. */
2429 Static void
2430 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2431 {
2432 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2433 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2434
2435 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2436 ehci_close_pipe(pipe, sc->sc_async_head);
2437 }
2438
2439 usbd_status
2440 ehci_device_request(usbd_xfer_handle xfer)
2441 {
2442 #define exfer EXFER(xfer)
2443 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2444 usb_device_request_t *req = &xfer->request;
2445 usbd_device_handle dev = epipe->pipe.device;
2446 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2447 int addr = dev->address;
2448 ehci_soft_qtd_t *setup, *stat, *next;
2449 ehci_soft_qh_t *sqh;
2450 int isread;
2451 int len;
2452 usbd_status err;
2453 int s;
2454
2455 isread = req->bmRequestType & UT_READ;
2456 len = UGETW(req->wLength);
2457
2458 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2459 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2460 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2461 UGETW(req->wIndex), len, addr,
2462 epipe->pipe.endpoint->edesc->bEndpointAddress));
2463
2464 setup = ehci_alloc_sqtd(sc);
2465 if (setup == NULL) {
2466 err = USBD_NOMEM;
2467 goto bad1;
2468 }
2469 stat = ehci_alloc_sqtd(sc);
2470 if (stat == NULL) {
2471 err = USBD_NOMEM;
2472 goto bad2;
2473 }
2474
2475 sqh = epipe->sqh;
2476 epipe->u.ctl.length = len;
2477
2478 /* XXX
2479 * Since we're messing with the QH we must know the HC is in sync.
2480 * This needs to go away since it slows down control transfers.
2481 * Removing it entails:
2482 * - fill the QH only once with addr & wMaxPacketSize
2483 * - put the correct data toggles in the qtds and set DTC
2484 */
2485 /* ehci_sync_hc(sc); */
2486 /* Update device address and length since they may have changed. */
2487 /* XXX This only needs to be done once, but it's too early in open. */
2488 /* XXXX Should not touch ED here! */
2489 sqh->qh.qh_endp =
2490 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2491 htole32(
2492 EHCI_QH_SET_ADDR(addr) |
2493 /* EHCI_QH_DTC | */
2494 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2495 );
2496 /* Clear toggle */
2497 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2498
2499 /* Set up data transaction */
2500 if (len != 0) {
2501 ehci_soft_qtd_t *end;
2502
2503 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2504 &next, &end);
2505 if (err)
2506 goto bad3;
2507 end->nextqtd = stat;
2508 end->qtd.qtd_next =
2509 end->qtd.qtd_altnext = htole32(stat->physaddr);
2510 /* Start toggle at 1. */
2511 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2512 } else {
2513 next = stat;
2514 }
2515
2516 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2517
2518 setup->qtd.qtd_status = htole32(
2519 EHCI_QTD_ACTIVE |
2520 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2521 EHCI_QTD_SET_CERR(3) |
2522 EHCI_QTD_SET_BYTES(sizeof *req)
2523 );
2524 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2525 setup->nextqtd = next;
2526 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2527 setup->xfer = xfer;
2528 setup->len = sizeof *req;
2529
2530 stat->qtd.qtd_status = htole32(
2531 EHCI_QTD_ACTIVE |
2532 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2533 EHCI_QTD_SET_CERR(3) |
2534 EHCI_QTD_IOC
2535 );
2536 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2537 stat->nextqtd = NULL;
2538 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2539 stat->xfer = xfer;
2540 stat->len = 0;
2541
2542 #ifdef EHCI_DEBUG
2543 if (ehcidebug > 5) {
2544 DPRINTF(("ehci_device_request:\n"));
2545 ehci_dump_sqh(sqh);
2546 ehci_dump_sqtds(setup);
2547 }
2548 #endif
2549
2550 exfer->sqtdstart = setup;
2551 exfer->sqtdend = stat;
2552 #ifdef DIAGNOSTIC
2553 if (!exfer->isdone) {
2554 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2555 }
2556 exfer->isdone = 0;
2557 #endif
2558
2559 /* Insert qTD in QH list. */
2560 s = splusb();
2561 ehci_set_qh_qtd(sqh, setup);
2562 if (xfer->timeout && !sc->sc_bus.use_polling) {
2563 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2564 ehci_timeout, xfer);
2565 }
2566 ehci_add_intr_list(sc, exfer);
2567 xfer->status = USBD_IN_PROGRESS;
2568 splx(s);
2569
2570 #ifdef EHCI_DEBUG
2571 if (ehcidebug > 10) {
2572 DPRINTF(("ehci_device_request: status=%x\n",
2573 EOREAD4(sc, EHCI_USBSTS)));
2574 delay(10000);
2575 ehci_dump_regs(sc);
2576 ehci_dump_sqh(sc->sc_async_head);
2577 ehci_dump_sqh(sqh);
2578 ehci_dump_sqtds(setup);
2579 }
2580 #endif
2581
2582 return (USBD_NORMAL_COMPLETION);
2583
2584 bad3:
2585 ehci_free_sqtd(sc, stat);
2586 bad2:
2587 ehci_free_sqtd(sc, setup);
2588 bad1:
2589 DPRINTFN(-1,("ehci_device_request: no memory\n"));
2590 xfer->status = err;
2591 usb_transfer_complete(xfer);
2592 return (err);
2593 #undef exfer
2594 }
2595
2596 /************************/
2597
2598 Static usbd_status
2599 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2600 {
2601 usbd_status err;
2602
2603 /* Insert last in queue. */
2604 err = usb_insert_transfer(xfer);
2605 if (err)
2606 return (err);
2607
2608 /* Pipe isn't running, start first */
2609 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2610 }
2611
2612 usbd_status
2613 ehci_device_bulk_start(usbd_xfer_handle xfer)
2614 {
2615 #define exfer EXFER(xfer)
2616 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2617 usbd_device_handle dev = epipe->pipe.device;
2618 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2619 ehci_soft_qtd_t *data, *dataend;
2620 ehci_soft_qh_t *sqh;
2621 usbd_status err;
2622 int len, isread, endpt;
2623 int s;
2624
2625 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2626 xfer, xfer->length, xfer->flags));
2627
2628 if (sc->sc_dying)
2629 return (USBD_IOERROR);
2630
2631 #ifdef DIAGNOSTIC
2632 if (xfer->rqflags & URQ_REQUEST)
2633 panic("ehci_device_bulk_transfer: a request");
2634 #endif
2635
2636 len = xfer->length;
2637 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2638 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2639 sqh = epipe->sqh;
2640
2641 epipe->u.bulk.length = len;
2642
2643 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2644 &dataend);
2645 if (err) {
2646 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2647 xfer->status = err;
2648 usb_transfer_complete(xfer);
2649 return (err);
2650 }
2651
2652 #ifdef EHCI_DEBUG
2653 if (ehcidebug > 5) {
2654 DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2655 ehci_dump_sqh(sqh);
2656 ehci_dump_sqtds(data);
2657 }
2658 #endif
2659
2660 /* Set up interrupt info. */
2661 exfer->sqtdstart = data;
2662 exfer->sqtdend = dataend;
2663 #ifdef DIAGNOSTIC
2664 if (!exfer->isdone) {
2665 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2666 }
2667 exfer->isdone = 0;
2668 #endif
2669
2670 s = splusb();
2671 ehci_set_qh_qtd(sqh, data);
2672 if (xfer->timeout && !sc->sc_bus.use_polling) {
2673 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2674 ehci_timeout, xfer);
2675 }
2676 ehci_add_intr_list(sc, exfer);
2677 xfer->status = USBD_IN_PROGRESS;
2678 splx(s);
2679
2680 #ifdef EHCI_DEBUG
2681 if (ehcidebug > 10) {
2682 DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2683 delay(10000);
2684 DPRINTF(("ehci_device_bulk_transfer: data(3)\n"));
2685 ehci_dump_regs(sc);
2686 #if 0
2687 printf("async_head:\n");
2688 ehci_dump_sqh(sc->sc_async_head);
2689 #endif
2690 printf("sqh:\n");
2691 ehci_dump_sqh(sqh);
2692 ehci_dump_sqtds(data);
2693 }
2694 #endif
2695
2696 if (sc->sc_bus.use_polling)
2697 ehci_waitintr(sc, xfer);
2698
2699 return (USBD_IN_PROGRESS);
2700 #undef exfer
2701 }
2702
2703 Static void
2704 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2705 {
2706 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2707 ehci_abort_xfer(xfer, USBD_CANCELLED);
2708 }
2709
2710 /*
2711 * Close a device bulk pipe.
2712 */
2713 Static void
2714 ehci_device_bulk_close(usbd_pipe_handle pipe)
2715 {
2716 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2717
2718 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2719 ehci_close_pipe(pipe, sc->sc_async_head);
2720 }
2721
2722 void
2723 ehci_device_bulk_done(usbd_xfer_handle xfer)
2724 {
2725 struct ehci_xfer *ex = EXFER(xfer);
2726 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2727 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2728
2729 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2730 xfer, xfer->actlen));
2731
2732 if (xfer->status != USBD_NOMEM) {
2733 ehci_del_intr_list(ex); /* remove from active list */
2734 ehci_free_sqtd_chain(sc, ex->sqtdstart, 0);
2735 }
2736
2737 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2738 }
2739
2740 /************************/
2741
2742 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2743 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2744 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2745 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2746 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2747
2748 /************************/
2749
2750 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2751 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2752 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2753 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2754 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2755