ehci.c revision 1.46
1 /* $NetBSD: ehci.c,v 1.46 2003/03/09 19:51:13 augustss Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart (at) augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/docs/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.46 2003/03/09 19:51:13 augustss Exp $"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <machine/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ehcireg.h> 76 #include <dev/usb/ehcivar.h> 77 78 #ifdef EHCI_DEBUG 79 #define DPRINTF(x) if (ehcidebug) printf x 80 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 81 int ehcidebug = 0; 82 #ifndef __NetBSD__ 83 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 84 #endif 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 struct ehci_pipe { 91 struct usbd_pipe pipe; 92 ehci_soft_qh_t *sqh; 93 union { 94 ehci_soft_qtd_t *qtd; 95 /* ehci_soft_itd_t *itd; */ 96 } tail; 97 union { 98 /* Control pipe */ 99 struct { 100 usb_dma_t reqdma; 101 u_int length; 102 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 103 } ctl; 104 /* Interrupt pipe */ 105 /* XXX */ 106 /* Bulk pipe */ 107 struct { 108 u_int length; 109 } bulk; 110 /* Iso pipe */ 111 /* XXX */ 112 } u; 113 }; 114 115 Static void ehci_shutdown(void *); 116 Static void ehci_power(int, void *); 117 118 Static usbd_status ehci_open(usbd_pipe_handle); 119 Static void ehci_poll(struct usbd_bus *); 120 Static void ehci_softintr(void *); 121 Static int ehci_intr1(ehci_softc_t *); 122 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 123 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 124 Static void ehci_idone(struct ehci_xfer *); 125 Static void ehci_timeout(void *); 126 Static void ehci_timeout_task(void *); 127 128 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 129 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 130 131 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 132 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 133 134 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 135 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 136 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 137 Static void ehci_root_ctrl_close(usbd_pipe_handle); 138 Static void ehci_root_ctrl_done(usbd_xfer_handle); 139 140 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 141 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 142 Static void ehci_root_intr_abort(usbd_xfer_handle); 143 Static void ehci_root_intr_close(usbd_pipe_handle); 144 Static void ehci_root_intr_done(usbd_xfer_handle); 145 146 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 147 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 148 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 149 Static void ehci_device_ctrl_close(usbd_pipe_handle); 150 Static void ehci_device_ctrl_done(usbd_xfer_handle); 151 152 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 154 Static void ehci_device_bulk_abort(usbd_xfer_handle); 155 Static void ehci_device_bulk_close(usbd_pipe_handle); 156 Static void ehci_device_bulk_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 160 Static void ehci_device_intr_abort(usbd_xfer_handle); 161 Static void ehci_device_intr_close(usbd_pipe_handle); 162 Static void ehci_device_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 166 Static void ehci_device_isoc_abort(usbd_xfer_handle); 167 Static void ehci_device_isoc_close(usbd_pipe_handle); 168 Static void ehci_device_isoc_done(usbd_xfer_handle); 169 170 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 171 Static void ehci_noop(usbd_pipe_handle pipe); 172 173 Static int ehci_str(usb_string_descriptor_t *, int, char *); 174 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 175 Static void ehci_pcd_able(ehci_softc_t *, int); 176 Static void ehci_pcd_enable(void *); 177 Static void ehci_disown(ehci_softc_t *, int, int); 178 179 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 180 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 181 182 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 183 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 184 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 185 ehci_softc_t *, int, int, usbd_xfer_handle, 186 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 187 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 188 ehci_soft_qtd_t *); 189 190 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 191 192 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 193 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 194 ehci_soft_qh_t *); 195 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 196 Static void ehci_sync_hc(ehci_softc_t *); 197 198 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 199 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 200 201 #ifdef EHCI_DEBUG 202 Static void ehci_dump_regs(ehci_softc_t *); 203 Static void ehci_dump(void); 204 Static ehci_softc_t *theehci; 205 Static void ehci_dump_link(ehci_link_t, int); 206 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 207 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 208 Static void ehci_dump_qtd(ehci_qtd_t *); 209 Static void ehci_dump_sqh(ehci_soft_qh_t *); 210 #ifdef DIAGNOSTIC 211 Static void ehci_dump_exfer(struct ehci_xfer *); 212 #endif 213 #endif 214 215 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 216 217 #define EHCI_INTR_ENDPT 1 218 219 #define ehci_add_intr_list(sc, ex) \ 220 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 221 #define ehci_del_intr_list(ex) \ 222 do { \ 223 LIST_REMOVE((ex), inext); \ 224 (ex)->inext.le_prev = NULL; \ 225 } while (0) 226 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 227 228 Static struct usbd_bus_methods ehci_bus_methods = { 229 ehci_open, 230 ehci_softintr, 231 ehci_poll, 232 ehci_allocm, 233 ehci_freem, 234 ehci_allocx, 235 ehci_freex, 236 }; 237 238 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 239 ehci_root_ctrl_transfer, 240 ehci_root_ctrl_start, 241 ehci_root_ctrl_abort, 242 ehci_root_ctrl_close, 243 ehci_noop, 244 ehci_root_ctrl_done, 245 }; 246 247 Static struct usbd_pipe_methods ehci_root_intr_methods = { 248 ehci_root_intr_transfer, 249 ehci_root_intr_start, 250 ehci_root_intr_abort, 251 ehci_root_intr_close, 252 ehci_noop, 253 ehci_root_intr_done, 254 }; 255 256 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 257 ehci_device_ctrl_transfer, 258 ehci_device_ctrl_start, 259 ehci_device_ctrl_abort, 260 ehci_device_ctrl_close, 261 ehci_noop, 262 ehci_device_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_device_intr_methods = { 266 ehci_device_intr_transfer, 267 ehci_device_intr_start, 268 ehci_device_intr_abort, 269 ehci_device_intr_close, 270 ehci_device_clear_toggle, 271 ehci_device_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 275 ehci_device_bulk_transfer, 276 ehci_device_bulk_start, 277 ehci_device_bulk_abort, 278 ehci_device_bulk_close, 279 ehci_device_clear_toggle, 280 ehci_device_bulk_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 284 ehci_device_isoc_transfer, 285 ehci_device_isoc_start, 286 ehci_device_isoc_abort, 287 ehci_device_isoc_close, 288 ehci_noop, 289 ehci_device_isoc_done, 290 }; 291 292 usbd_status 293 ehci_init(ehci_softc_t *sc) 294 { 295 u_int32_t version, sparams, cparams, hcr; 296 u_int i; 297 usbd_status err; 298 ehci_soft_qh_t *sqh; 299 300 DPRINTF(("ehci_init: start\n")); 301 #ifdef EHCI_DEBUG 302 theehci = sc; 303 #endif 304 305 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 306 307 version = EREAD2(sc, EHCI_HCIVERSION); 308 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 309 version >> 8, version & 0xff); 310 311 sparams = EREAD4(sc, EHCI_HCSPARAMS); 312 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 313 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 314 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 315 aprint_error("%s: wrong number of companions (%d != %d)\n", 316 USBDEVNAME(sc->sc_bus.bdev), 317 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 318 return (USBD_IOERROR); 319 } 320 if (sc->sc_ncomp > 0) { 321 aprint_normal("%s: companion controller%s, %d port%s each:", 322 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 323 EHCI_HCS_N_PCC(sparams), 324 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 325 for (i = 0; i < sc->sc_ncomp; i++) 326 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 327 aprint_normal("\n"); 328 } 329 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 330 cparams = EREAD4(sc, EHCI_HCCPARAMS); 331 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 332 333 if (EHCI_HCC_64BIT(cparams)) { 334 /* MUST clear segment register if 64 bit capable. */ 335 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 336 } 337 338 sc->sc_bus.usbrev = USBREV_2_0; 339 340 /* Reset the controller */ 341 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 342 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 343 usb_delay_ms(&sc->sc_bus, 1); 344 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 345 for (i = 0; i < 100; i++) { 346 usb_delay_ms(&sc->sc_bus, 1); 347 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 348 if (!hcr) 349 break; 350 } 351 if (hcr) { 352 aprint_error("%s: reset timeout\n", 353 USBDEVNAME(sc->sc_bus.bdev)); 354 return (USBD_IOERROR); 355 } 356 357 /* frame list size at default, read back what we got and use that */ 358 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 359 case 0: sc->sc_flsize = 1024*4; break; 360 case 1: sc->sc_flsize = 512*4; break; 361 case 2: sc->sc_flsize = 256*4; break; 362 case 3: return (USBD_IOERROR); 363 } 364 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 365 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 366 if (err) 367 return (err); 368 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 369 370 /* Set up the bus struct. */ 371 sc->sc_bus.methods = &ehci_bus_methods; 372 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 373 374 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 375 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 376 377 sc->sc_eintrs = EHCI_NORMAL_INTRS; 378 379 /* Allocate dummy QH that starts the async list. */ 380 sqh = ehci_alloc_sqh(sc); 381 if (sqh == NULL) { 382 err = USBD_NOMEM; 383 goto bad1; 384 } 385 /* Fill the QH */ 386 sqh->qh.qh_endp = 387 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 388 sqh->qh.qh_link = 389 htole32(sqh->physaddr | EHCI_LINK_QH); 390 sqh->qh.qh_curqtd = EHCI_NULL; 391 sqh->next = NULL; 392 /* Fill the overlay qTD */ 393 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 394 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 395 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 396 sqh->sqtd = NULL; 397 #ifdef EHCI_DEBUG 398 if (ehcidebug) { 399 ehci_dump_sqh(sqh); 400 } 401 #endif 402 403 /* Point to async list */ 404 sc->sc_async_head = sqh; 405 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 406 407 usb_callout_init(sc->sc_tmo_pcd); 408 409 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 410 411 /* Enable interrupts */ 412 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 413 414 /* Turn on controller */ 415 EOWRITE4(sc, EHCI_USBCMD, 416 EHCI_CMD_ITC_8 | /* 8 microframes */ 417 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 418 EHCI_CMD_ASE | 419 /* EHCI_CMD_PSE | */ 420 EHCI_CMD_RS); 421 422 /* Take over port ownership */ 423 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 424 425 for (i = 0; i < 100; i++) { 426 usb_delay_ms(&sc->sc_bus, 1); 427 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 428 if (!hcr) 429 break; 430 } 431 if (hcr) { 432 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 433 return (USBD_IOERROR); 434 } 435 436 return (USBD_NORMAL_COMPLETION); 437 438 #if 0 439 bad2: 440 ehci_free_sqh(sc, sc->sc_async_head); 441 #endif 442 bad1: 443 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 444 return (err); 445 } 446 447 int 448 ehci_intr(void *v) 449 { 450 ehci_softc_t *sc = v; 451 452 if (sc == NULL || sc->sc_dying) 453 return (0); 454 455 /* If we get an interrupt while polling, then just ignore it. */ 456 if (sc->sc_bus.use_polling) { 457 #ifdef DIAGNOSTIC 458 printf("ehci_intr: ignored interrupt while polling\n"); 459 #endif 460 return (0); 461 } 462 463 return (ehci_intr1(sc)); 464 } 465 466 Static int 467 ehci_intr1(ehci_softc_t *sc) 468 { 469 u_int32_t intrs, eintrs; 470 471 DPRINTFN(20,("ehci_intr1: enter\n")); 472 473 /* In case the interrupt occurs before initialization has completed. */ 474 if (sc == NULL) { 475 #ifdef DIAGNOSTIC 476 printf("ehci_intr: sc == NULL\n"); 477 #endif 478 return (0); 479 } 480 481 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 482 483 if (!intrs) 484 return (0); 485 486 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 487 eintrs = intrs & sc->sc_eintrs; 488 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 489 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 490 (u_int)eintrs)); 491 if (!eintrs) 492 return (0); 493 494 sc->sc_bus.intr_context++; 495 sc->sc_bus.no_intrs++; 496 if (eintrs & EHCI_STS_IAA) { 497 DPRINTF(("ehci_intr1: door bell\n")); 498 wakeup(&sc->sc_async_head); 499 eintrs &= ~EHCI_STS_IAA; 500 } 501 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 502 DPRINTFN(5,("ehci_intr1: %s %s\n", 503 eintrs & EHCI_STS_INT ? "INT" : "", 504 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 505 usb_schedsoftintr(&sc->sc_bus); 506 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 507 } 508 if (eintrs & EHCI_STS_HSE) { 509 printf("%s: unrecoverable error, controller halted\n", 510 USBDEVNAME(sc->sc_bus.bdev)); 511 /* XXX what else */ 512 } 513 if (eintrs & EHCI_STS_PCD) { 514 ehci_pcd(sc, sc->sc_intrxfer); 515 /* 516 * Disable PCD interrupt for now, because it will be 517 * on until the port has been reset. 518 */ 519 ehci_pcd_able(sc, 0); 520 /* Do not allow RHSC interrupts > 1 per second */ 521 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 522 eintrs &= ~EHCI_STS_PCD; 523 } 524 525 sc->sc_bus.intr_context--; 526 527 if (eintrs != 0) { 528 /* Block unprocessed interrupts. */ 529 sc->sc_eintrs &= ~eintrs; 530 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 531 printf("%s: blocking intrs 0x%x\n", 532 USBDEVNAME(sc->sc_bus.bdev), eintrs); 533 } 534 535 return (1); 536 } 537 538 void 539 ehci_pcd_able(ehci_softc_t *sc, int on) 540 { 541 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 542 if (on) 543 sc->sc_eintrs |= EHCI_STS_PCD; 544 else 545 sc->sc_eintrs &= ~EHCI_STS_PCD; 546 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 547 } 548 549 void 550 ehci_pcd_enable(void *v_sc) 551 { 552 ehci_softc_t *sc = v_sc; 553 554 ehci_pcd_able(sc, 1); 555 } 556 557 void 558 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 559 { 560 usbd_pipe_handle pipe; 561 struct ehci_pipe *epipe; 562 u_char *p; 563 int i, m; 564 565 if (xfer == NULL) { 566 /* Just ignore the change. */ 567 return; 568 } 569 570 pipe = xfer->pipe; 571 epipe = (struct ehci_pipe *)pipe; 572 573 p = KERNADDR(&xfer->dmabuf, 0); 574 m = min(sc->sc_noport, xfer->length * 8 - 1); 575 memset(p, 0, xfer->length); 576 for (i = 1; i <= m; i++) { 577 /* Pick out CHANGE bits from the status reg. */ 578 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 579 p[i/8] |= 1 << (i%8); 580 } 581 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 582 xfer->actlen = xfer->length; 583 xfer->status = USBD_NORMAL_COMPLETION; 584 585 usb_transfer_complete(xfer); 586 } 587 588 void 589 ehci_softintr(void *v) 590 { 591 ehci_softc_t *sc = v; 592 struct ehci_xfer *ex; 593 594 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 595 sc->sc_bus.intr_context)); 596 597 sc->sc_bus.intr_context++; 598 599 /* 600 * The only explanation I can think of for why EHCI is as brain dead 601 * as UHCI interrupt-wise is that Intel was involved in both. 602 * An interrupt just tells us that something is done, we have no 603 * clue what, so we need to scan through all active transfers. :-( 604 */ 605 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 606 ehci_check_intr(sc, ex); 607 608 if (sc->sc_softwake) { 609 sc->sc_softwake = 0; 610 wakeup(&sc->sc_softwake); 611 } 612 613 sc->sc_bus.intr_context--; 614 } 615 616 /* Check for an interrupt. */ 617 void 618 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 619 { 620 ehci_soft_qtd_t *sqtd, *lsqtd; 621 u_int32_t status; 622 623 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 624 625 if (ex->sqtdstart == NULL) { 626 printf("ehci_check_intr: sqtdstart=NULL\n"); 627 return; 628 } 629 lsqtd = ex->sqtdend; 630 #ifdef DIAGNOSTIC 631 if (lsqtd == NULL) { 632 printf("ehci_check_intr: sqtd==0\n"); 633 return; 634 } 635 #endif 636 /* 637 * If the last TD is still active we need to check whether there 638 * is a an error somewhere in the middle, or whether there was a 639 * short packet (SPD and not ACTIVE). 640 */ 641 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 642 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 643 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 644 status = le32toh(sqtd->qtd.qtd_status); 645 /* If there's an active QTD the xfer isn't done. */ 646 if (status & EHCI_QTD_ACTIVE) 647 break; 648 /* Any kind of error makes the xfer done. */ 649 if (status & EHCI_QTD_HALTED) 650 goto done; 651 /* We want short packets, and it is short: it's done */ 652 if (EHCI_QTD_SET_BYTES(status) != 0) 653 goto done; 654 } 655 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 656 ex, ex->sqtdstart)); 657 return; 658 } 659 done: 660 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 661 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 662 ehci_idone(ex); 663 } 664 665 void 666 ehci_idone(struct ehci_xfer *ex) 667 { 668 usbd_xfer_handle xfer = &ex->xfer; 669 #ifdef EHCI_DEBUG 670 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 671 #endif 672 ehci_soft_qtd_t *sqtd; 673 u_int32_t status = 0, nstatus; 674 int actlen; 675 676 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 677 #ifdef DIAGNOSTIC 678 { 679 int s = splhigh(); 680 if (ex->isdone) { 681 splx(s); 682 #ifdef EHCI_DEBUG 683 printf("ehci_idone: ex is done!\n "); 684 ehci_dump_exfer(ex); 685 #else 686 printf("ehci_idone: ex=%p is done!\n", ex); 687 #endif 688 return; 689 } 690 ex->isdone = 1; 691 splx(s); 692 } 693 #endif 694 695 if (xfer->status == USBD_CANCELLED || 696 xfer->status == USBD_TIMEOUT) { 697 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 698 return; 699 } 700 701 #ifdef EHCI_DEBUG 702 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 703 if (ehcidebug > 10) 704 ehci_dump_sqtds(ex->sqtdstart); 705 #endif 706 707 /* The transfer is done, compute actual length and status. */ 708 actlen = 0; 709 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 710 nstatus = le32toh(sqtd->qtd.qtd_status); 711 if (nstatus & EHCI_QTD_ACTIVE) 712 break; 713 714 status = nstatus; 715 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 716 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 717 } 718 719 /* If there are left over TDs we need to update the toggle. */ 720 if (sqtd != NULL) { 721 if (!(xfer->rqflags & URQ_REQUEST)) 722 printf("ehci_idone: need toggle update\n"); 723 #if 0 724 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 725 #endif 726 } 727 728 status &= EHCI_QTD_STATERRS; 729 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 730 xfer->length, actlen, status)); 731 xfer->actlen = actlen; 732 if (status != 0) { 733 #ifdef EHCI_DEBUG 734 char sbuf[128]; 735 736 bitmask_snprintf((u_int32_t)status, 737 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 738 "\7HALTED", 739 sbuf, sizeof(sbuf)); 740 741 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 742 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 743 "status 0x%s\n", 744 xfer->pipe->device->address, 745 xfer->pipe->endpoint->edesc->bEndpointAddress, 746 sbuf)); 747 if (ehcidebug > 2) { 748 ehci_dump_sqh(epipe->sqh); 749 ehci_dump_sqtds(ex->sqtdstart); 750 } 751 #endif 752 if (status == EHCI_QTD_HALTED) 753 xfer->status = USBD_STALLED; 754 else 755 xfer->status = USBD_IOERROR; /* more info XXX */ 756 } else { 757 xfer->status = USBD_NORMAL_COMPLETION; 758 } 759 760 usb_transfer_complete(xfer); 761 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 762 } 763 764 /* 765 * Wait here until controller claims to have an interrupt. 766 * Then call ehci_intr and return. Use timeout to avoid waiting 767 * too long. 768 */ 769 void 770 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 771 { 772 int timo = xfer->timeout; 773 int usecs; 774 u_int32_t intrs; 775 776 xfer->status = USBD_IN_PROGRESS; 777 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 778 usb_delay_ms(&sc->sc_bus, 1); 779 if (sc->sc_dying) 780 break; 781 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 782 sc->sc_eintrs; 783 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 784 #ifdef OHCI_DEBUG 785 if (ehcidebug > 15) 786 ehci_dump_regs(sc); 787 #endif 788 if (intrs) { 789 ehci_intr1(sc); 790 if (xfer->status != USBD_IN_PROGRESS) 791 return; 792 } 793 } 794 795 /* Timeout */ 796 DPRINTF(("ehci_waitintr: timeout\n")); 797 xfer->status = USBD_TIMEOUT; 798 usb_transfer_complete(xfer); 799 /* XXX should free TD */ 800 } 801 802 void 803 ehci_poll(struct usbd_bus *bus) 804 { 805 ehci_softc_t *sc = (ehci_softc_t *)bus; 806 #ifdef EHCI_DEBUG 807 static int last; 808 int new; 809 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 810 if (new != last) { 811 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 812 last = new; 813 } 814 #endif 815 816 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 817 ehci_intr1(sc); 818 } 819 820 int 821 ehci_detach(struct ehci_softc *sc, int flags) 822 { 823 int rv = 0; 824 825 if (sc->sc_child != NULL) 826 rv = config_detach(sc->sc_child, flags); 827 828 if (rv != 0) 829 return (rv); 830 831 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 832 833 if (sc->sc_powerhook != NULL) 834 powerhook_disestablish(sc->sc_powerhook); 835 if (sc->sc_shutdownhook != NULL) 836 shutdownhook_disestablish(sc->sc_shutdownhook); 837 838 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 839 840 /* XXX free other data structures XXX */ 841 842 return (rv); 843 } 844 845 846 int 847 ehci_activate(device_ptr_t self, enum devact act) 848 { 849 struct ehci_softc *sc = (struct ehci_softc *)self; 850 int rv = 0; 851 852 switch (act) { 853 case DVACT_ACTIVATE: 854 return (EOPNOTSUPP); 855 break; 856 857 case DVACT_DEACTIVATE: 858 if (sc->sc_child != NULL) 859 rv = config_deactivate(sc->sc_child); 860 sc->sc_dying = 1; 861 break; 862 } 863 return (rv); 864 } 865 866 /* 867 * Handle suspend/resume. 868 * 869 * We need to switch to polling mode here, because this routine is 870 * called from an intterupt context. This is all right since we 871 * are almost suspended anyway. 872 */ 873 void 874 ehci_power(int why, void *v) 875 { 876 ehci_softc_t *sc = v; 877 //u_int32_t ctl; 878 int s; 879 880 #ifdef EHCI_DEBUG 881 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 882 ehci_dump_regs(sc); 883 #endif 884 885 s = splhardusb(); 886 switch (why) { 887 case PWR_SUSPEND: 888 case PWR_STANDBY: 889 sc->sc_bus.use_polling++; 890 #if 0 891 OOO 892 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 893 if (sc->sc_control == 0) { 894 /* 895 * Preserve register values, in case that APM BIOS 896 * does not recover them. 897 */ 898 sc->sc_control = ctl; 899 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 900 } 901 ctl |= EHCI_HCFS_SUSPEND; 902 OWRITE4(sc, EHCI_CONTROL, ctl); 903 #endif 904 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 905 sc->sc_bus.use_polling--; 906 break; 907 case PWR_RESUME: 908 sc->sc_bus.use_polling++; 909 #if 0 910 OOO 911 /* Some broken BIOSes do not recover these values */ 912 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 913 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 914 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 915 if (sc->sc_intre) 916 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 917 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 918 if (sc->sc_control) 919 ctl = sc->sc_control; 920 else 921 ctl = OREAD4(sc, EHCI_CONTROL); 922 ctl |= EHCI_HCFS_RESUME; 923 OWRITE4(sc, EHCI_CONTROL, ctl); 924 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 925 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 926 OWRITE4(sc, EHCI_CONTROL, ctl); 927 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 928 sc->sc_control = sc->sc_intre = 0; 929 #endif 930 sc->sc_bus.use_polling--; 931 break; 932 case PWR_SOFTSUSPEND: 933 case PWR_SOFTSTANDBY: 934 case PWR_SOFTRESUME: 935 break; 936 } 937 splx(s); 938 } 939 940 /* 941 * Shut down the controller when the system is going down. 942 */ 943 void 944 ehci_shutdown(void *v) 945 { 946 ehci_softc_t *sc = v; 947 948 DPRINTF(("ehci_shutdown: stopping the HC\n")); 949 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 950 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 951 } 952 953 usbd_status 954 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 955 { 956 struct ehci_softc *sc = (struct ehci_softc *)bus; 957 usbd_status err; 958 959 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 960 #ifdef EHCI_DEBUG 961 if (err) 962 printf("ehci_allocm: usb_allocmem()=%d\n", err); 963 #endif 964 return (err); 965 } 966 967 void 968 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 969 { 970 struct ehci_softc *sc = (struct ehci_softc *)bus; 971 972 usb_freemem(&sc->sc_bus, dma); 973 } 974 975 usbd_xfer_handle 976 ehci_allocx(struct usbd_bus *bus) 977 { 978 struct ehci_softc *sc = (struct ehci_softc *)bus; 979 usbd_xfer_handle xfer; 980 981 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 982 if (xfer != NULL) { 983 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 984 #ifdef DIAGNOSTIC 985 if (xfer->busy_free != XFER_FREE) { 986 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 987 xfer->busy_free); 988 } 989 #endif 990 } else { 991 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 992 } 993 if (xfer != NULL) { 994 memset(xfer, 0, sizeof (struct ehci_xfer)); 995 #ifdef DIAGNOSTIC 996 EXFER(xfer)->isdone = 1; 997 xfer->busy_free = XFER_BUSY; 998 #endif 999 } 1000 return (xfer); 1001 } 1002 1003 void 1004 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1005 { 1006 struct ehci_softc *sc = (struct ehci_softc *)bus; 1007 1008 #ifdef DIAGNOSTIC 1009 if (xfer->busy_free != XFER_BUSY) { 1010 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1011 xfer->busy_free); 1012 return; 1013 } 1014 xfer->busy_free = XFER_FREE; 1015 if (!EXFER(xfer)->isdone) { 1016 printf("ehci_freex: !isdone\n"); 1017 return; 1018 } 1019 #endif 1020 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1021 } 1022 1023 Static void 1024 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1025 { 1026 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1027 1028 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1029 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1030 #ifdef USB_DEBUG 1031 if (ehcidebug) 1032 usbd_dump_pipe(pipe); 1033 #endif 1034 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1035 } 1036 1037 Static void 1038 ehci_noop(usbd_pipe_handle pipe) 1039 { 1040 } 1041 1042 #ifdef EHCI_DEBUG 1043 void 1044 ehci_dump_regs(ehci_softc_t *sc) 1045 { 1046 int i; 1047 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1048 EOREAD4(sc, EHCI_USBCMD), 1049 EOREAD4(sc, EHCI_USBSTS), 1050 EOREAD4(sc, EHCI_USBINTR)); 1051 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1052 EOREAD4(sc, EHCI_FRINDEX), 1053 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1054 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1055 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1056 for (i = 1; i <= sc->sc_noport; i++) 1057 printf("port %d status=0x%08x\n", i, 1058 EOREAD4(sc, EHCI_PORTSC(i))); 1059 } 1060 1061 /* 1062 * Unused function - this is meant to be called from a kernel 1063 * debugger. 1064 */ 1065 void 1066 ehci_dump() 1067 { 1068 ehci_dump_regs(theehci); 1069 } 1070 1071 void 1072 ehci_dump_link(ehci_link_t link, int type) 1073 { 1074 link = le32toh(link); 1075 printf("0x%08x", link); 1076 if (link & EHCI_LINK_TERMINATE) 1077 printf("<T>"); 1078 else { 1079 printf("<"); 1080 if (type) { 1081 switch (EHCI_LINK_TYPE(link)) { 1082 case EHCI_LINK_ITD: printf("ITD"); break; 1083 case EHCI_LINK_QH: printf("QH"); break; 1084 case EHCI_LINK_SITD: printf("SITD"); break; 1085 case EHCI_LINK_FSTN: printf("FSTN"); break; 1086 } 1087 } 1088 printf(">"); 1089 } 1090 } 1091 1092 void 1093 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1094 { 1095 int i; 1096 u_int32_t stop; 1097 1098 stop = 0; 1099 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1100 ehci_dump_sqtd(sqtd); 1101 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1102 } 1103 if (sqtd) 1104 printf("dump aborted, too many TDs\n"); 1105 } 1106 1107 void 1108 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1109 { 1110 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1111 ehci_dump_qtd(&sqtd->qtd); 1112 } 1113 1114 void 1115 ehci_dump_qtd(ehci_qtd_t *qtd) 1116 { 1117 u_int32_t s; 1118 char sbuf[128]; 1119 1120 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1121 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1122 printf("\n"); 1123 s = le32toh(qtd->qtd_status); 1124 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1125 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1126 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1127 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1128 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1129 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1130 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1131 EHCI_QTD_GET_PID(s), sbuf); 1132 for (s = 0; s < 5; s++) 1133 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1134 } 1135 1136 void 1137 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1138 { 1139 ehci_qh_t *qh = &sqh->qh; 1140 u_int32_t endp, endphub; 1141 1142 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1143 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1144 endp = le32toh(qh->qh_endp); 1145 printf(" endp=0x%08x\n", endp); 1146 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1147 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1148 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1149 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1150 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1151 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1152 EHCI_QH_GET_NRL(endp)); 1153 endphub = le32toh(qh->qh_endphub); 1154 printf(" endphub=0x%08x\n", endphub); 1155 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1156 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1157 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1158 EHCI_QH_GET_MULT(endphub)); 1159 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1160 printf("Overlay qTD:\n"); 1161 ehci_dump_qtd(&qh->qh_qtd); 1162 } 1163 1164 #ifdef DIAGNOSTIC 1165 Static void 1166 ehci_dump_exfer(struct ehci_xfer *ex) 1167 { 1168 printf("ehci_dump_exfer: ex=%p\n", ex); 1169 } 1170 #endif 1171 #endif 1172 1173 usbd_status 1174 ehci_open(usbd_pipe_handle pipe) 1175 { 1176 usbd_device_handle dev = pipe->device; 1177 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1178 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1179 u_int8_t addr = dev->address; 1180 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1181 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1182 ehci_soft_qh_t *sqh; 1183 usbd_status err; 1184 int s; 1185 int speed, naks; 1186 1187 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1188 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1189 1190 if (sc->sc_dying) 1191 return (USBD_IOERROR); 1192 1193 if (addr == sc->sc_addr) { 1194 switch (ed->bEndpointAddress) { 1195 case USB_CONTROL_ENDPOINT: 1196 pipe->methods = &ehci_root_ctrl_methods; 1197 break; 1198 case UE_DIR_IN | EHCI_INTR_ENDPT: 1199 pipe->methods = &ehci_root_intr_methods; 1200 break; 1201 default: 1202 return (USBD_INVAL); 1203 } 1204 return (USBD_NORMAL_COMPLETION); 1205 } 1206 1207 /* XXX All this stuff is only valid for async. */ 1208 switch (dev->speed) { 1209 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1210 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1211 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1212 default: panic("ehci_open: bad device speed %d", dev->speed); 1213 } 1214 naks = 8; /* XXX */ 1215 sqh = ehci_alloc_sqh(sc); 1216 if (sqh == NULL) 1217 goto bad0; 1218 /* qh_link filled when the QH is added */ 1219 sqh->qh.qh_endp = htole32( 1220 EHCI_QH_SET_ADDR(addr) | 1221 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1222 EHCI_QH_SET_EPS(speed) | /* XXX */ 1223 /* XXX EHCI_QH_DTC ? */ 1224 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1225 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1226 EHCI_QH_CTL : 0) | 1227 EHCI_QH_SET_NRL(naks) 1228 ); 1229 sqh->qh.qh_endphub = htole32( 1230 EHCI_QH_SET_MULT(1) 1231 /* XXX TT stuff */ 1232 /* XXX interrupt mask */ 1233 ); 1234 sqh->qh.qh_curqtd = EHCI_NULL; 1235 /* Fill the overlay qTD */ 1236 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1237 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1238 sqh->qh.qh_qtd.qtd_status = htole32(0); 1239 1240 epipe->sqh = sqh; 1241 1242 switch (xfertype) { 1243 case UE_CONTROL: 1244 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1245 0, &epipe->u.ctl.reqdma); 1246 #ifdef EHCI_DEBUG 1247 if (err) 1248 printf("ehci_open: usb_allocmem()=%d\n", err); 1249 #endif 1250 if (err) 1251 goto bad1; 1252 pipe->methods = &ehci_device_ctrl_methods; 1253 s = splusb(); 1254 ehci_add_qh(sqh, sc->sc_async_head); 1255 splx(s); 1256 break; 1257 case UE_BULK: 1258 pipe->methods = &ehci_device_bulk_methods; 1259 s = splusb(); 1260 ehci_add_qh(sqh, sc->sc_async_head); 1261 splx(s); 1262 break; 1263 case UE_INTERRUPT: 1264 pipe->methods = &ehci_device_intr_methods; 1265 return (USBD_INVAL); 1266 case UE_ISOCHRONOUS: 1267 pipe->methods = &ehci_device_isoc_methods; 1268 return (USBD_INVAL); 1269 default: 1270 return (USBD_INVAL); 1271 } 1272 return (USBD_NORMAL_COMPLETION); 1273 1274 bad1: 1275 ehci_free_sqh(sc, sqh); 1276 bad0: 1277 return (USBD_NOMEM); 1278 } 1279 1280 /* 1281 * Add an ED to the schedule. Called at splusb(). 1282 */ 1283 void 1284 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1285 { 1286 SPLUSBCHECK; 1287 1288 sqh->next = head->next; 1289 sqh->qh.qh_link = head->qh.qh_link; 1290 head->next = sqh; 1291 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1292 1293 #ifdef EHCI_DEBUG 1294 if (ehcidebug > 5) { 1295 printf("ehci_add_qh:\n"); 1296 ehci_dump_sqh(sqh); 1297 } 1298 #endif 1299 } 1300 1301 /* 1302 * Remove an ED from the schedule. Called at splusb(). 1303 */ 1304 void 1305 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1306 { 1307 ehci_soft_qh_t *p; 1308 1309 SPLUSBCHECK; 1310 /* XXX */ 1311 for (p = head; p != NULL && p->next != sqh; p = p->next) 1312 ; 1313 if (p == NULL) 1314 panic("ehci_rem_qh: ED not found"); 1315 p->next = sqh->next; 1316 p->qh.qh_link = sqh->qh.qh_link; 1317 1318 ehci_sync_hc(sc); 1319 } 1320 1321 void 1322 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1323 { 1324 /* Halt while we are messing. */ 1325 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1326 sqh->qh.qh_curqtd = 0; 1327 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1328 sqh->sqtd = sqtd; 1329 /* Keep toggle, clear the rest, including length. */ 1330 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1331 } 1332 1333 /* 1334 * Ensure that the HC has released all references to the QH. We do this 1335 * by asking for a Async Advance Doorbell interrupt and then we wait for 1336 * the interrupt. 1337 * To make this easier we first obtain exclusive use of the doorbell. 1338 */ 1339 void 1340 ehci_sync_hc(ehci_softc_t *sc) 1341 { 1342 int s, error; 1343 1344 if (sc->sc_dying) { 1345 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1346 return; 1347 } 1348 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1349 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1350 s = splhardusb(); 1351 /* ask for doorbell */ 1352 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1353 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1354 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1355 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1356 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1357 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1358 splx(s); 1359 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1360 #ifdef DIAGNOSTIC 1361 if (error) 1362 printf("ehci_sync_hc: tsleep() = %d\n", error); 1363 #endif 1364 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1365 } 1366 1367 /***********/ 1368 1369 /* 1370 * Data structures and routines to emulate the root hub. 1371 */ 1372 Static usb_device_descriptor_t ehci_devd = { 1373 USB_DEVICE_DESCRIPTOR_SIZE, 1374 UDESC_DEVICE, /* type */ 1375 {0x00, 0x02}, /* USB version */ 1376 UDCLASS_HUB, /* class */ 1377 UDSUBCLASS_HUB, /* subclass */ 1378 UDPROTO_HSHUBSTT, /* protocol */ 1379 64, /* max packet */ 1380 {0},{0},{0x00,0x01}, /* device id */ 1381 1,2,0, /* string indicies */ 1382 1 /* # of configurations */ 1383 }; 1384 1385 Static usb_device_qualifier_t ehci_odevd = { 1386 USB_DEVICE_DESCRIPTOR_SIZE, 1387 UDESC_DEVICE_QUALIFIER, /* type */ 1388 {0x00, 0x02}, /* USB version */ 1389 UDCLASS_HUB, /* class */ 1390 UDSUBCLASS_HUB, /* subclass */ 1391 UDPROTO_FSHUB, /* protocol */ 1392 64, /* max packet */ 1393 1, /* # of configurations */ 1394 0 1395 }; 1396 1397 Static usb_config_descriptor_t ehci_confd = { 1398 USB_CONFIG_DESCRIPTOR_SIZE, 1399 UDESC_CONFIG, 1400 {USB_CONFIG_DESCRIPTOR_SIZE + 1401 USB_INTERFACE_DESCRIPTOR_SIZE + 1402 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1403 1, 1404 1, 1405 0, 1406 UC_SELF_POWERED, 1407 0 /* max power */ 1408 }; 1409 1410 Static usb_interface_descriptor_t ehci_ifcd = { 1411 USB_INTERFACE_DESCRIPTOR_SIZE, 1412 UDESC_INTERFACE, 1413 0, 1414 0, 1415 1, 1416 UICLASS_HUB, 1417 UISUBCLASS_HUB, 1418 UIPROTO_HSHUBSTT, 1419 0 1420 }; 1421 1422 Static usb_endpoint_descriptor_t ehci_endpd = { 1423 USB_ENDPOINT_DESCRIPTOR_SIZE, 1424 UDESC_ENDPOINT, 1425 UE_DIR_IN | EHCI_INTR_ENDPT, 1426 UE_INTERRUPT, 1427 {8, 0}, /* max packet */ 1428 255 1429 }; 1430 1431 Static usb_hub_descriptor_t ehci_hubd = { 1432 USB_HUB_DESCRIPTOR_SIZE, 1433 UDESC_HUB, 1434 0, 1435 {0,0}, 1436 0, 1437 0, 1438 {0}, 1439 }; 1440 1441 Static int 1442 ehci_str(p, l, s) 1443 usb_string_descriptor_t *p; 1444 int l; 1445 char *s; 1446 { 1447 int i; 1448 1449 if (l == 0) 1450 return (0); 1451 p->bLength = 2 * strlen(s) + 2; 1452 if (l == 1) 1453 return (1); 1454 p->bDescriptorType = UDESC_STRING; 1455 l -= 2; 1456 for (i = 0; s[i] && l > 1; i++, l -= 2) 1457 USETW2(p->bString[i], 0, s[i]); 1458 return (2*i+2); 1459 } 1460 1461 /* 1462 * Simulate a hardware hub by handling all the necessary requests. 1463 */ 1464 Static usbd_status 1465 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1466 { 1467 usbd_status err; 1468 1469 /* Insert last in queue. */ 1470 err = usb_insert_transfer(xfer); 1471 if (err) 1472 return (err); 1473 1474 /* Pipe isn't running, start first */ 1475 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1476 } 1477 1478 Static usbd_status 1479 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1480 { 1481 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1482 usb_device_request_t *req; 1483 void *buf = NULL; 1484 int port, i; 1485 int s, len, value, index, l, totlen = 0; 1486 usb_port_status_t ps; 1487 usb_hub_descriptor_t hubd; 1488 usbd_status err; 1489 u_int32_t v; 1490 1491 if (sc->sc_dying) 1492 return (USBD_IOERROR); 1493 1494 #ifdef DIAGNOSTIC 1495 if (!(xfer->rqflags & URQ_REQUEST)) 1496 /* XXX panic */ 1497 return (USBD_INVAL); 1498 #endif 1499 req = &xfer->request; 1500 1501 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1502 req->bmRequestType, req->bRequest)); 1503 1504 len = UGETW(req->wLength); 1505 value = UGETW(req->wValue); 1506 index = UGETW(req->wIndex); 1507 1508 if (len != 0) 1509 buf = KERNADDR(&xfer->dmabuf, 0); 1510 1511 #define C(x,y) ((x) | ((y) << 8)) 1512 switch(C(req->bRequest, req->bmRequestType)) { 1513 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1514 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1515 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1516 /* 1517 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1518 * for the integrated root hub. 1519 */ 1520 break; 1521 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1522 if (len > 0) { 1523 *(u_int8_t *)buf = sc->sc_conf; 1524 totlen = 1; 1525 } 1526 break; 1527 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1528 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1529 switch(value >> 8) { 1530 case UDESC_DEVICE: 1531 if ((value & 0xff) != 0) { 1532 err = USBD_IOERROR; 1533 goto ret; 1534 } 1535 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1536 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1537 memcpy(buf, &ehci_devd, l); 1538 break; 1539 /* 1540 * We can't really operate at another speed, but the spec says 1541 * we need this descriptor. 1542 */ 1543 case UDESC_DEVICE_QUALIFIER: 1544 if ((value & 0xff) != 0) { 1545 err = USBD_IOERROR; 1546 goto ret; 1547 } 1548 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1549 memcpy(buf, &ehci_odevd, l); 1550 break; 1551 /* 1552 * We can't really operate at another speed, but the spec says 1553 * we need this descriptor. 1554 */ 1555 case UDESC_OTHER_SPEED_CONFIGURATION: 1556 case UDESC_CONFIG: 1557 if ((value & 0xff) != 0) { 1558 err = USBD_IOERROR; 1559 goto ret; 1560 } 1561 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1562 memcpy(buf, &ehci_confd, l); 1563 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1564 value >> 8; 1565 buf = (char *)buf + l; 1566 len -= l; 1567 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1568 totlen += l; 1569 memcpy(buf, &ehci_ifcd, l); 1570 buf = (char *)buf + l; 1571 len -= l; 1572 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1573 totlen += l; 1574 memcpy(buf, &ehci_endpd, l); 1575 break; 1576 case UDESC_STRING: 1577 if (len == 0) 1578 break; 1579 *(u_int8_t *)buf = 0; 1580 totlen = 1; 1581 switch (value & 0xff) { 1582 case 1: /* Vendor */ 1583 totlen = ehci_str(buf, len, sc->sc_vendor); 1584 break; 1585 case 2: /* Product */ 1586 totlen = ehci_str(buf, len, "EHCI root hub"); 1587 break; 1588 } 1589 break; 1590 default: 1591 err = USBD_IOERROR; 1592 goto ret; 1593 } 1594 break; 1595 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1596 if (len > 0) { 1597 *(u_int8_t *)buf = 0; 1598 totlen = 1; 1599 } 1600 break; 1601 case C(UR_GET_STATUS, UT_READ_DEVICE): 1602 if (len > 1) { 1603 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1604 totlen = 2; 1605 } 1606 break; 1607 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1608 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1609 if (len > 1) { 1610 USETW(((usb_status_t *)buf)->wStatus, 0); 1611 totlen = 2; 1612 } 1613 break; 1614 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1615 if (value >= USB_MAX_DEVICES) { 1616 err = USBD_IOERROR; 1617 goto ret; 1618 } 1619 sc->sc_addr = value; 1620 break; 1621 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1622 if (value != 0 && value != 1) { 1623 err = USBD_IOERROR; 1624 goto ret; 1625 } 1626 sc->sc_conf = value; 1627 break; 1628 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1629 break; 1630 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1631 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1632 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1633 err = USBD_IOERROR; 1634 goto ret; 1635 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1636 break; 1637 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1638 break; 1639 /* Hub requests */ 1640 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1641 break; 1642 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1643 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1644 "port=%d feature=%d\n", 1645 index, value)); 1646 if (index < 1 || index > sc->sc_noport) { 1647 err = USBD_IOERROR; 1648 goto ret; 1649 } 1650 port = EHCI_PORTSC(index); 1651 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1652 switch(value) { 1653 case UHF_PORT_ENABLE: 1654 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1655 break; 1656 case UHF_PORT_SUSPEND: 1657 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1658 break; 1659 case UHF_PORT_POWER: 1660 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1661 break; 1662 case UHF_PORT_TEST: 1663 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1664 "%d\n", index)); 1665 break; 1666 case UHF_PORT_INDICATOR: 1667 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1668 "%d\n", index)); 1669 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1670 break; 1671 case UHF_C_PORT_CONNECTION: 1672 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1673 break; 1674 case UHF_C_PORT_ENABLE: 1675 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1676 break; 1677 case UHF_C_PORT_SUSPEND: 1678 /* how? */ 1679 break; 1680 case UHF_C_PORT_OVER_CURRENT: 1681 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1682 break; 1683 case UHF_C_PORT_RESET: 1684 sc->sc_isreset = 0; 1685 break; 1686 default: 1687 err = USBD_IOERROR; 1688 goto ret; 1689 } 1690 #if 0 1691 switch(value) { 1692 case UHF_C_PORT_CONNECTION: 1693 case UHF_C_PORT_ENABLE: 1694 case UHF_C_PORT_SUSPEND: 1695 case UHF_C_PORT_OVER_CURRENT: 1696 case UHF_C_PORT_RESET: 1697 /* Enable RHSC interrupt if condition is cleared. */ 1698 if ((OREAD4(sc, port) >> 16) == 0) 1699 ehci_pcd_able(sc, 1); 1700 break; 1701 default: 1702 break; 1703 } 1704 #endif 1705 break; 1706 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1707 if (value != 0) { 1708 err = USBD_IOERROR; 1709 goto ret; 1710 } 1711 hubd = ehci_hubd; 1712 hubd.bNbrPorts = sc->sc_noport; 1713 v = EOREAD4(sc, EHCI_HCSPARAMS); 1714 USETW(hubd.wHubCharacteristics, 1715 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1716 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1717 ? UHD_PORT_IND : 0); 1718 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1719 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1720 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1721 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1722 l = min(len, hubd.bDescLength); 1723 totlen = l; 1724 memcpy(buf, &hubd, l); 1725 break; 1726 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1727 if (len != 4) { 1728 err = USBD_IOERROR; 1729 goto ret; 1730 } 1731 memset(buf, 0, len); /* ? XXX */ 1732 totlen = len; 1733 break; 1734 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1735 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1736 index)); 1737 if (index < 1 || index > sc->sc_noport) { 1738 err = USBD_IOERROR; 1739 goto ret; 1740 } 1741 if (len != 4) { 1742 err = USBD_IOERROR; 1743 goto ret; 1744 } 1745 v = EOREAD4(sc, EHCI_PORTSC(index)); 1746 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1747 v)); 1748 i = UPS_HIGH_SPEED; 1749 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1750 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1751 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1752 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1753 if (v & EHCI_PS_PR) i |= UPS_RESET; 1754 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1755 USETW(ps.wPortStatus, i); 1756 i = 0; 1757 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1758 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1759 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1760 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1761 USETW(ps.wPortChange, i); 1762 l = min(len, sizeof ps); 1763 memcpy(buf, &ps, l); 1764 totlen = l; 1765 break; 1766 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1767 err = USBD_IOERROR; 1768 goto ret; 1769 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1770 break; 1771 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1772 if (index < 1 || index > sc->sc_noport) { 1773 err = USBD_IOERROR; 1774 goto ret; 1775 } 1776 port = EHCI_PORTSC(index); 1777 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1778 switch(value) { 1779 case UHF_PORT_ENABLE: 1780 EOWRITE4(sc, port, v | EHCI_PS_PE); 1781 break; 1782 case UHF_PORT_SUSPEND: 1783 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1784 break; 1785 case UHF_PORT_RESET: 1786 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1787 index)); 1788 if (EHCI_PS_IS_LOWSPEED(v)) { 1789 /* Low speed device, give up ownership. */ 1790 ehci_disown(sc, index, 1); 1791 break; 1792 } 1793 /* Start reset sequence. */ 1794 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1795 EOWRITE4(sc, port, v | EHCI_PS_PR); 1796 /* Wait for reset to complete. */ 1797 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1798 if (sc->sc_dying) { 1799 err = USBD_IOERROR; 1800 goto ret; 1801 } 1802 /* Terminate reset sequence. */ 1803 EOWRITE4(sc, port, v); 1804 /* Wait for HC to complete reset. */ 1805 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1806 if (sc->sc_dying) { 1807 err = USBD_IOERROR; 1808 goto ret; 1809 } 1810 v = EOREAD4(sc, port); 1811 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1812 if (v & EHCI_PS_PR) { 1813 printf("%s: port reset timeout\n", 1814 USBDEVNAME(sc->sc_bus.bdev)); 1815 return (USBD_TIMEOUT); 1816 } 1817 if (!(v & EHCI_PS_PE)) { 1818 /* Not a high speed device, give up ownership.*/ 1819 ehci_disown(sc, index, 0); 1820 break; 1821 } 1822 sc->sc_isreset = 1; 1823 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1824 index, v)); 1825 break; 1826 case UHF_PORT_POWER: 1827 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1828 "%d\n", index)); 1829 EOWRITE4(sc, port, v | EHCI_PS_PP); 1830 break; 1831 case UHF_PORT_TEST: 1832 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1833 "%d\n", index)); 1834 break; 1835 case UHF_PORT_INDICATOR: 1836 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1837 "%d\n", index)); 1838 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1839 break; 1840 default: 1841 err = USBD_IOERROR; 1842 goto ret; 1843 } 1844 break; 1845 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1846 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1847 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1848 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1849 break; 1850 default: 1851 err = USBD_IOERROR; 1852 goto ret; 1853 } 1854 xfer->actlen = totlen; 1855 err = USBD_NORMAL_COMPLETION; 1856 ret: 1857 xfer->status = err; 1858 s = splusb(); 1859 usb_transfer_complete(xfer); 1860 splx(s); 1861 return (USBD_IN_PROGRESS); 1862 } 1863 1864 void 1865 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1866 { 1867 int port; 1868 u_int32_t v; 1869 1870 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1871 #ifdef DIAGNOSTIC 1872 if (sc->sc_npcomp != 0) { 1873 int i = (index-1) / sc->sc_npcomp; 1874 if (i >= sc->sc_ncomp) 1875 printf("%s: strange port\n", 1876 USBDEVNAME(sc->sc_bus.bdev)); 1877 else 1878 printf("%s: handing over %s speed device on " 1879 "port %d to %s\n", 1880 USBDEVNAME(sc->sc_bus.bdev), 1881 lowspeed ? "low" : "full", 1882 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1883 } else { 1884 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1885 } 1886 #endif 1887 port = EHCI_PORTSC(index); 1888 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1889 EOWRITE4(sc, port, v | EHCI_PS_PO); 1890 } 1891 1892 /* Abort a root control request. */ 1893 Static void 1894 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1895 { 1896 /* Nothing to do, all transfers are synchronous. */ 1897 } 1898 1899 /* Close the root pipe. */ 1900 Static void 1901 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1902 { 1903 DPRINTF(("ehci_root_ctrl_close\n")); 1904 /* Nothing to do. */ 1905 } 1906 1907 void 1908 ehci_root_intr_done(usbd_xfer_handle xfer) 1909 { 1910 xfer->hcpriv = NULL; 1911 } 1912 1913 Static usbd_status 1914 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1915 { 1916 usbd_status err; 1917 1918 /* Insert last in queue. */ 1919 err = usb_insert_transfer(xfer); 1920 if (err) 1921 return (err); 1922 1923 /* Pipe isn't running, start first */ 1924 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1925 } 1926 1927 Static usbd_status 1928 ehci_root_intr_start(usbd_xfer_handle xfer) 1929 { 1930 usbd_pipe_handle pipe = xfer->pipe; 1931 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1932 1933 if (sc->sc_dying) 1934 return (USBD_IOERROR); 1935 1936 sc->sc_intrxfer = xfer; 1937 1938 return (USBD_IN_PROGRESS); 1939 } 1940 1941 /* Abort a root interrupt request. */ 1942 Static void 1943 ehci_root_intr_abort(usbd_xfer_handle xfer) 1944 { 1945 int s; 1946 1947 if (xfer->pipe->intrxfer == xfer) { 1948 DPRINTF(("ehci_root_intr_abort: remove\n")); 1949 xfer->pipe->intrxfer = NULL; 1950 } 1951 xfer->status = USBD_CANCELLED; 1952 s = splusb(); 1953 usb_transfer_complete(xfer); 1954 splx(s); 1955 } 1956 1957 /* Close the root pipe. */ 1958 Static void 1959 ehci_root_intr_close(usbd_pipe_handle pipe) 1960 { 1961 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1962 1963 DPRINTF(("ehci_root_intr_close\n")); 1964 1965 sc->sc_intrxfer = NULL; 1966 } 1967 1968 void 1969 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1970 { 1971 xfer->hcpriv = NULL; 1972 } 1973 1974 /************************/ 1975 1976 ehci_soft_qh_t * 1977 ehci_alloc_sqh(ehci_softc_t *sc) 1978 { 1979 ehci_soft_qh_t *sqh; 1980 usbd_status err; 1981 int i, offs; 1982 usb_dma_t dma; 1983 1984 if (sc->sc_freeqhs == NULL) { 1985 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1986 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1987 EHCI_PAGE_SIZE, &dma); 1988 #ifdef EHCI_DEBUG 1989 if (err) 1990 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1991 #endif 1992 if (err) 1993 return (NULL); 1994 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1995 offs = i * EHCI_SQH_SIZE; 1996 sqh = KERNADDR(&dma, offs); 1997 sqh->physaddr = DMAADDR(&dma, offs); 1998 sqh->next = sc->sc_freeqhs; 1999 sc->sc_freeqhs = sqh; 2000 } 2001 } 2002 sqh = sc->sc_freeqhs; 2003 sc->sc_freeqhs = sqh->next; 2004 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2005 sqh->next = NULL; 2006 return (sqh); 2007 } 2008 2009 void 2010 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2011 { 2012 sqh->next = sc->sc_freeqhs; 2013 sc->sc_freeqhs = sqh; 2014 } 2015 2016 ehci_soft_qtd_t * 2017 ehci_alloc_sqtd(ehci_softc_t *sc) 2018 { 2019 ehci_soft_qtd_t *sqtd; 2020 usbd_status err; 2021 int i, offs; 2022 usb_dma_t dma; 2023 int s; 2024 2025 if (sc->sc_freeqtds == NULL) { 2026 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2027 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2028 EHCI_PAGE_SIZE, &dma); 2029 #ifdef EHCI_DEBUG 2030 if (err) 2031 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2032 #endif 2033 if (err) 2034 return (NULL); 2035 s = splusb(); 2036 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2037 offs = i * EHCI_SQTD_SIZE; 2038 sqtd = KERNADDR(&dma, offs); 2039 sqtd->physaddr = DMAADDR(&dma, offs); 2040 sqtd->nextqtd = sc->sc_freeqtds; 2041 sc->sc_freeqtds = sqtd; 2042 } 2043 splx(s); 2044 } 2045 2046 s = splusb(); 2047 sqtd = sc->sc_freeqtds; 2048 sc->sc_freeqtds = sqtd->nextqtd; 2049 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2050 sqtd->nextqtd = NULL; 2051 sqtd->xfer = NULL; 2052 splx(s); 2053 2054 return (sqtd); 2055 } 2056 2057 void 2058 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2059 { 2060 int s; 2061 2062 s = splusb(); 2063 sqtd->nextqtd = sc->sc_freeqtds; 2064 sc->sc_freeqtds = sqtd; 2065 splx(s); 2066 } 2067 2068 usbd_status 2069 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2070 int alen, int rd, usbd_xfer_handle xfer, 2071 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2072 { 2073 ehci_soft_qtd_t *next, *cur; 2074 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2075 u_int32_t qtdstatus; 2076 int len, curlen; 2077 int i; 2078 usb_dma_t *dma = &xfer->dmabuf; 2079 2080 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2081 2082 len = alen; 2083 dataphys = DMAADDR(dma, 0); 2084 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2085 qtdstatus = htole32( 2086 EHCI_QTD_ACTIVE | 2087 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2088 EHCI_QTD_SET_CERR(3) 2089 /* IOC set below */ 2090 /* BYTES set below */ 2091 /* XXX Data toggle */ 2092 ); 2093 2094 cur = ehci_alloc_sqtd(sc); 2095 *sp = cur; 2096 if (cur == NULL) 2097 goto nomem; 2098 for (;;) { 2099 dataphyspage = EHCI_PAGE(dataphys); 2100 /* The EHCI hardware can handle at most 5 pages. */ 2101 if (dataphyslastpage - dataphyspage < 2102 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2103 /* we can handle it in this QTD */ 2104 curlen = len; 2105 } else { 2106 /* must use multiple TDs, fill as much as possible. */ 2107 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2108 EHCI_PAGE_OFFSET(dataphys); 2109 #ifdef DIAGNOSTIC 2110 if (curlen > len) { 2111 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2112 "len=0x%x offs=0x%x\n", curlen, len, 2113 EHCI_PAGE_OFFSET(dataphys)); 2114 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2115 dataphyslastpage, dataphyspage, 2116 dataphys); 2117 curlen = len; 2118 } 2119 #endif 2120 2121 /* XXX true for EHCI? */ 2122 /* the length must be a multiple of the max size */ 2123 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2124 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2125 "curlen=%d\n", curlen)); 2126 #ifdef DIAGNOSTIC 2127 if (curlen == 0) 2128 panic("ehci_alloc_std: curlen == 0"); 2129 #endif 2130 } 2131 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2132 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2133 dataphys, dataphyslastpage, 2134 len, curlen)); 2135 len -= curlen; 2136 2137 if (len != 0) { 2138 next = ehci_alloc_sqtd(sc); 2139 if (next == NULL) 2140 goto nomem; 2141 nextphys = next->physaddr; 2142 } else { 2143 next = NULL; 2144 nextphys = EHCI_NULL; 2145 } 2146 2147 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2148 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2149 if (i != 0) /* use offset only in first buffer */ 2150 a = EHCI_PAGE(a); 2151 cur->qtd.qtd_buffer[i] = htole32(a); 2152 #ifdef DIAGNOSTIC 2153 if (i >= EHCI_QTD_NBUFFERS) { 2154 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2155 goto nomem; 2156 } 2157 #endif 2158 } 2159 cur->nextqtd = next; 2160 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2161 cur->qtd.qtd_status = 2162 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2163 cur->xfer = xfer; 2164 cur->len = curlen; 2165 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2166 dataphys, dataphys + curlen)); 2167 if (len == 0) 2168 break; 2169 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2170 dataphys += curlen; 2171 cur = next; 2172 } 2173 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2174 *ep = cur; 2175 2176 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2177 *sp, *ep)); 2178 2179 return (USBD_NORMAL_COMPLETION); 2180 2181 nomem: 2182 /* XXX free chain */ 2183 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2184 return (USBD_NOMEM); 2185 } 2186 2187 Static void 2188 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2189 ehci_soft_qtd_t *sqtdend) 2190 { 2191 ehci_soft_qtd_t *p; 2192 int i; 2193 2194 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2195 sqtd, sqtdend)); 2196 2197 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2198 p = sqtd->nextqtd; 2199 ehci_free_sqtd(sc, sqtd); 2200 } 2201 } 2202 2203 /****************/ 2204 2205 /* 2206 * Close a reqular pipe. 2207 * Assumes that there are no pending transactions. 2208 */ 2209 void 2210 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2211 { 2212 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2213 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2214 ehci_soft_qh_t *sqh = epipe->sqh; 2215 int s; 2216 2217 s = splusb(); 2218 ehci_rem_qh(sc, sqh, head); 2219 splx(s); 2220 ehci_free_sqh(sc, epipe->sqh); 2221 } 2222 2223 /* 2224 * Abort a device request. 2225 * If this routine is called at splusb() it guarantees that the request 2226 * will be removed from the hardware scheduling and that the callback 2227 * for it will be called with USBD_CANCELLED status. 2228 * It's impossible to guarantee that the requested transfer will not 2229 * have happened since the hardware runs concurrently. 2230 * If the transaction has already happened we rely on the ordinary 2231 * interrupt processing to process it. 2232 * XXX This is most probably wrong. 2233 */ 2234 void 2235 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2236 { 2237 #define exfer EXFER(xfer) 2238 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2239 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2240 ehci_soft_qh_t *sqh = epipe->sqh; 2241 ehci_soft_qtd_t *sqtd; 2242 ehci_physaddr_t cur; 2243 u_int32_t qhstatus; 2244 int s; 2245 int hit; 2246 2247 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2248 2249 if (sc->sc_dying) { 2250 /* If we're dying, just do the software part. */ 2251 s = splusb(); 2252 xfer->status = status; /* make software ignore it */ 2253 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2254 usb_transfer_complete(xfer); 2255 splx(s); 2256 return; 2257 } 2258 2259 if (xfer->device->bus->intr_context || !curproc) 2260 panic("ehci_abort_xfer: not in process context"); 2261 2262 /* 2263 * Step 1: Make interrupt routine and hardware ignore xfer. 2264 */ 2265 s = splusb(); 2266 xfer->status = status; /* make software ignore it */ 2267 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2268 qhstatus = sqh->qh.qh_qtd.qtd_status; 2269 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2270 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2271 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2272 if (sqtd == exfer->sqtdend) 2273 break; 2274 } 2275 splx(s); 2276 2277 /* 2278 * Step 2: Wait until we know hardware has finished any possible 2279 * use of the xfer. Also make sure the soft interrupt routine 2280 * has run. 2281 */ 2282 ehci_sync_hc(sc); 2283 s = splusb(); 2284 sc->sc_softwake = 1; 2285 usb_schedsoftintr(&sc->sc_bus); 2286 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2287 splx(s); 2288 2289 /* 2290 * Step 3: Remove any vestiges of the xfer from the hardware. 2291 * The complication here is that the hardware may have executed 2292 * beyond the xfer we're trying to abort. So as we're scanning 2293 * the TDs of this xfer we check if the hardware points to 2294 * any of them. 2295 */ 2296 s = splusb(); /* XXX why? */ 2297 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2298 hit = 0; 2299 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2300 hit |= cur == sqtd->physaddr; 2301 if (sqtd == exfer->sqtdend) 2302 break; 2303 } 2304 sqtd = sqtd->nextqtd; 2305 /* Zap curqtd register if hardware pointed inside the xfer. */ 2306 if (hit && sqtd != NULL) { 2307 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2308 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2309 sqh->qh.qh_qtd.qtd_status = qhstatus; 2310 } else { 2311 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2312 } 2313 2314 /* 2315 * Step 4: Execute callback. 2316 */ 2317 #ifdef DIAGNOSTIC 2318 exfer->isdone = 1; 2319 #endif 2320 usb_transfer_complete(xfer); 2321 2322 splx(s); 2323 #undef exfer 2324 } 2325 2326 void 2327 ehci_timeout(void *addr) 2328 { 2329 struct ehci_xfer *exfer = addr; 2330 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2331 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2332 2333 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2334 #ifdef USB_DEBUG 2335 if (ehcidebug > 1) 2336 usbd_dump_pipe(exfer->xfer.pipe); 2337 #endif 2338 2339 if (sc->sc_dying) { 2340 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2341 return; 2342 } 2343 2344 /* Execute the abort in a process context. */ 2345 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2346 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2347 } 2348 2349 void 2350 ehci_timeout_task(void *addr) 2351 { 2352 usbd_xfer_handle xfer = addr; 2353 int s; 2354 2355 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2356 2357 s = splusb(); 2358 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2359 splx(s); 2360 } 2361 2362 /************************/ 2363 2364 Static usbd_status 2365 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2366 { 2367 usbd_status err; 2368 2369 /* Insert last in queue. */ 2370 err = usb_insert_transfer(xfer); 2371 if (err) 2372 return (err); 2373 2374 /* Pipe isn't running, start first */ 2375 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2376 } 2377 2378 Static usbd_status 2379 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2380 { 2381 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2382 usbd_status err; 2383 2384 if (sc->sc_dying) 2385 return (USBD_IOERROR); 2386 2387 #ifdef DIAGNOSTIC 2388 if (!(xfer->rqflags & URQ_REQUEST)) { 2389 /* XXX panic */ 2390 printf("ehci_device_ctrl_transfer: not a request\n"); 2391 return (USBD_INVAL); 2392 } 2393 #endif 2394 2395 err = ehci_device_request(xfer); 2396 if (err) 2397 return (err); 2398 2399 if (sc->sc_bus.use_polling) 2400 ehci_waitintr(sc, xfer); 2401 return (USBD_IN_PROGRESS); 2402 } 2403 2404 void 2405 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2406 { 2407 struct ehci_xfer *ex = EXFER(xfer); 2408 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2409 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2410 2411 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2412 2413 #ifdef DIAGNOSTIC 2414 if (!(xfer->rqflags & URQ_REQUEST)) { 2415 panic("ehci_ctrl_done: not a request"); 2416 } 2417 #endif 2418 2419 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2420 ehci_del_intr_list(ex); /* remove from active list */ 2421 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2422 } 2423 2424 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2425 } 2426 2427 /* Abort a device control request. */ 2428 Static void 2429 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2430 { 2431 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2432 ehci_abort_xfer(xfer, USBD_CANCELLED); 2433 } 2434 2435 /* Close a device control pipe. */ 2436 Static void 2437 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2438 { 2439 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2440 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2441 2442 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2443 ehci_close_pipe(pipe, sc->sc_async_head); 2444 } 2445 2446 usbd_status 2447 ehci_device_request(usbd_xfer_handle xfer) 2448 { 2449 #define exfer EXFER(xfer) 2450 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2451 usb_device_request_t *req = &xfer->request; 2452 usbd_device_handle dev = epipe->pipe.device; 2453 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2454 int addr = dev->address; 2455 ehci_soft_qtd_t *setup, *stat, *next; 2456 ehci_soft_qh_t *sqh; 2457 int isread; 2458 int len; 2459 usbd_status err; 2460 int s; 2461 2462 isread = req->bmRequestType & UT_READ; 2463 len = UGETW(req->wLength); 2464 2465 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2466 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2467 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2468 UGETW(req->wIndex), len, addr, 2469 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2470 2471 setup = ehci_alloc_sqtd(sc); 2472 if (setup == NULL) { 2473 err = USBD_NOMEM; 2474 goto bad1; 2475 } 2476 stat = ehci_alloc_sqtd(sc); 2477 if (stat == NULL) { 2478 err = USBD_NOMEM; 2479 goto bad2; 2480 } 2481 2482 sqh = epipe->sqh; 2483 epipe->u.ctl.length = len; 2484 2485 /* XXX 2486 * Since we're messing with the QH we must know the HC is in sync. 2487 * This needs to go away since it slows down control transfers. 2488 * Removing it entails: 2489 * - fill the QH only once with addr & wMaxPacketSize 2490 * - put the correct data toggles in the qtds and set DTC 2491 */ 2492 /* ehci_sync_hc(sc); */ 2493 /* Update device address and length since they may have changed. */ 2494 /* XXX This only needs to be done once, but it's too early in open. */ 2495 /* XXXX Should not touch ED here! */ 2496 sqh->qh.qh_endp = 2497 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2498 htole32( 2499 EHCI_QH_SET_ADDR(addr) | 2500 /* EHCI_QH_DTC | */ 2501 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2502 ); 2503 /* Clear toggle */ 2504 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2505 2506 /* Set up data transaction */ 2507 if (len != 0) { 2508 ehci_soft_qtd_t *end; 2509 2510 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2511 &next, &end); 2512 if (err) 2513 goto bad3; 2514 end->nextqtd = stat; 2515 end->qtd.qtd_next = 2516 end->qtd.qtd_altnext = htole32(stat->physaddr); 2517 /* Start toggle at 1. */ 2518 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2519 } else { 2520 next = stat; 2521 } 2522 2523 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2524 2525 setup->qtd.qtd_status = htole32( 2526 EHCI_QTD_ACTIVE | 2527 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2528 EHCI_QTD_SET_CERR(3) | 2529 EHCI_QTD_SET_BYTES(sizeof *req) 2530 ); 2531 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2532 setup->nextqtd = next; 2533 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2534 setup->xfer = xfer; 2535 setup->len = sizeof *req; 2536 2537 stat->qtd.qtd_status = htole32( 2538 EHCI_QTD_ACTIVE | 2539 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2540 EHCI_QTD_SET_CERR(3) | 2541 EHCI_QTD_IOC 2542 ); 2543 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2544 stat->nextqtd = NULL; 2545 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2546 stat->xfer = xfer; 2547 stat->len = 0; 2548 2549 #ifdef EHCI_DEBUG 2550 if (ehcidebug > 5) { 2551 DPRINTF(("ehci_device_request:\n")); 2552 ehci_dump_sqh(sqh); 2553 ehci_dump_sqtds(setup); 2554 } 2555 #endif 2556 2557 exfer->sqtdstart = setup; 2558 exfer->sqtdend = stat; 2559 #ifdef DIAGNOSTIC 2560 if (!exfer->isdone) { 2561 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2562 } 2563 exfer->isdone = 0; 2564 #endif 2565 2566 /* Insert qTD in QH list. */ 2567 s = splusb(); 2568 ehci_set_qh_qtd(sqh, setup); 2569 if (xfer->timeout && !sc->sc_bus.use_polling) { 2570 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2571 ehci_timeout, xfer); 2572 } 2573 ehci_add_intr_list(sc, exfer); 2574 xfer->status = USBD_IN_PROGRESS; 2575 splx(s); 2576 2577 #ifdef EHCI_DEBUG 2578 if (ehcidebug > 10) { 2579 DPRINTF(("ehci_device_request: status=%x\n", 2580 EOREAD4(sc, EHCI_USBSTS))); 2581 delay(10000); 2582 ehci_dump_regs(sc); 2583 ehci_dump_sqh(sc->sc_async_head); 2584 ehci_dump_sqh(sqh); 2585 ehci_dump_sqtds(setup); 2586 } 2587 #endif 2588 2589 return (USBD_NORMAL_COMPLETION); 2590 2591 bad3: 2592 ehci_free_sqtd(sc, stat); 2593 bad2: 2594 ehci_free_sqtd(sc, setup); 2595 bad1: 2596 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2597 xfer->status = err; 2598 usb_transfer_complete(xfer); 2599 return (err); 2600 #undef exfer 2601 } 2602 2603 /************************/ 2604 2605 Static usbd_status 2606 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2607 { 2608 usbd_status err; 2609 2610 /* Insert last in queue. */ 2611 err = usb_insert_transfer(xfer); 2612 if (err) 2613 return (err); 2614 2615 /* Pipe isn't running, start first */ 2616 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2617 } 2618 2619 usbd_status 2620 ehci_device_bulk_start(usbd_xfer_handle xfer) 2621 { 2622 #define exfer EXFER(xfer) 2623 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2624 usbd_device_handle dev = epipe->pipe.device; 2625 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2626 ehci_soft_qtd_t *data, *dataend; 2627 ehci_soft_qh_t *sqh; 2628 usbd_status err; 2629 int len, isread, endpt; 2630 int s; 2631 2632 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2633 xfer, xfer->length, xfer->flags)); 2634 2635 if (sc->sc_dying) 2636 return (USBD_IOERROR); 2637 2638 #ifdef DIAGNOSTIC 2639 if (xfer->rqflags & URQ_REQUEST) 2640 panic("ehci_device_bulk_transfer: a request"); 2641 #endif 2642 2643 len = xfer->length; 2644 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2645 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2646 sqh = epipe->sqh; 2647 2648 epipe->u.bulk.length = len; 2649 2650 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2651 &dataend); 2652 if (err) { 2653 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2654 xfer->status = err; 2655 usb_transfer_complete(xfer); 2656 return (err); 2657 } 2658 2659 #ifdef EHCI_DEBUG 2660 if (ehcidebug > 5) { 2661 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2662 ehci_dump_sqh(sqh); 2663 ehci_dump_sqtds(data); 2664 } 2665 #endif 2666 2667 /* Set up interrupt info. */ 2668 exfer->sqtdstart = data; 2669 exfer->sqtdend = dataend; 2670 #ifdef DIAGNOSTIC 2671 if (!exfer->isdone) { 2672 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2673 } 2674 exfer->isdone = 0; 2675 #endif 2676 2677 s = splusb(); 2678 ehci_set_qh_qtd(sqh, data); 2679 if (xfer->timeout && !sc->sc_bus.use_polling) { 2680 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2681 ehci_timeout, xfer); 2682 } 2683 ehci_add_intr_list(sc, exfer); 2684 xfer->status = USBD_IN_PROGRESS; 2685 splx(s); 2686 2687 #ifdef EHCI_DEBUG 2688 if (ehcidebug > 10) { 2689 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2690 delay(10000); 2691 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2692 ehci_dump_regs(sc); 2693 #if 0 2694 printf("async_head:\n"); 2695 ehci_dump_sqh(sc->sc_async_head); 2696 #endif 2697 printf("sqh:\n"); 2698 ehci_dump_sqh(sqh); 2699 ehci_dump_sqtds(data); 2700 } 2701 #endif 2702 2703 if (sc->sc_bus.use_polling) 2704 ehci_waitintr(sc, xfer); 2705 2706 return (USBD_IN_PROGRESS); 2707 #undef exfer 2708 } 2709 2710 Static void 2711 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2712 { 2713 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2714 ehci_abort_xfer(xfer, USBD_CANCELLED); 2715 } 2716 2717 /* 2718 * Close a device bulk pipe. 2719 */ 2720 Static void 2721 ehci_device_bulk_close(usbd_pipe_handle pipe) 2722 { 2723 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2724 2725 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2726 ehci_close_pipe(pipe, sc->sc_async_head); 2727 } 2728 2729 void 2730 ehci_device_bulk_done(usbd_xfer_handle xfer) 2731 { 2732 struct ehci_xfer *ex = EXFER(xfer); 2733 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2734 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2735 2736 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2737 xfer, xfer->actlen)); 2738 2739 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2740 ehci_del_intr_list(ex); /* remove from active list */ 2741 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2742 } 2743 2744 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2745 } 2746 2747 /************************/ 2748 2749 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2750 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2751 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2752 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2753 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2754 2755 /************************/ 2756 2757 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2758 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2759 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2760 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2761 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2762
Indexes created Mon Sep 22 05:09:51 GMT 2025