ehci.c revision 1.47
1 /* $NetBSD: ehci.c,v 1.47 2003/05/10 12:04:22 augustss Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart (at) augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/docs/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.47 2003/05/10 12:04:22 augustss Exp $"); 56 57 #include "ohci.h" 58 #include "uhci.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/malloc.h> 64 #include <sys/device.h> 65 #include <sys/select.h> 66 #include <sys/proc.h> 67 #include <sys/queue.h> 68 69 #include <machine/bus.h> 70 #include <machine/endian.h> 71 72 #include <dev/usb/usb.h> 73 #include <dev/usb/usbdi.h> 74 #include <dev/usb/usbdivar.h> 75 #include <dev/usb/usb_mem.h> 76 #include <dev/usb/usb_quirks.h> 77 78 #include <dev/usb/ehcireg.h> 79 #include <dev/usb/ehcivar.h> 80 81 #ifdef EHCI_DEBUG 82 #define DPRINTF(x) if (ehcidebug) printf x 83 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 84 int ehcidebug = 0; 85 #ifndef __NetBSD__ 86 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 87 #endif 88 #else 89 #define DPRINTF(x) 90 #define DPRINTFN(n,x) 91 #endif 92 93 struct ehci_pipe { 94 struct usbd_pipe pipe; 95 ehci_soft_qh_t *sqh; 96 union { 97 ehci_soft_qtd_t *qtd; 98 /* ehci_soft_itd_t *itd; */ 99 } tail; 100 union { 101 /* Control pipe */ 102 struct { 103 usb_dma_t reqdma; 104 u_int length; 105 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 106 } ctl; 107 /* Interrupt pipe */ 108 /* XXX */ 109 /* Bulk pipe */ 110 struct { 111 u_int length; 112 } bulk; 113 /* Iso pipe */ 114 /* XXX */ 115 } u; 116 }; 117 118 Static void ehci_shutdown(void *); 119 Static void ehci_power(int, void *); 120 121 Static usbd_status ehci_open(usbd_pipe_handle); 122 Static void ehci_poll(struct usbd_bus *); 123 Static void ehci_softintr(void *); 124 Static int ehci_intr1(ehci_softc_t *); 125 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 126 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 127 Static void ehci_idone(struct ehci_xfer *); 128 Static void ehci_timeout(void *); 129 Static void ehci_timeout_task(void *); 130 131 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 132 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 133 134 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 135 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 136 137 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 139 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ehci_root_ctrl_close(usbd_pipe_handle); 141 Static void ehci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 145 Static void ehci_root_intr_abort(usbd_xfer_handle); 146 Static void ehci_root_intr_close(usbd_pipe_handle); 147 Static void ehci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 151 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_device_ctrl_close(usbd_pipe_handle); 153 Static void ehci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 157 Static void ehci_device_bulk_abort(usbd_xfer_handle); 158 Static void ehci_device_bulk_close(usbd_pipe_handle); 159 Static void ehci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 163 Static void ehci_device_intr_abort(usbd_xfer_handle); 164 Static void ehci_device_intr_close(usbd_pipe_handle); 165 Static void ehci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 169 Static void ehci_device_isoc_abort(usbd_xfer_handle); 170 Static void ehci_device_isoc_close(usbd_pipe_handle); 171 Static void ehci_device_isoc_done(usbd_xfer_handle); 172 173 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 174 Static void ehci_noop(usbd_pipe_handle pipe); 175 176 Static int ehci_str(usb_string_descriptor_t *, int, char *); 177 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 178 Static void ehci_pcd_able(ehci_softc_t *, int); 179 Static void ehci_pcd_enable(void *); 180 Static void ehci_disown(ehci_softc_t *, int, int); 181 182 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 183 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 184 185 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 186 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 187 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 188 ehci_softc_t *, int, int, usbd_xfer_handle, 189 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 190 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 191 ehci_soft_qtd_t *); 192 193 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 194 195 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 196 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 197 ehci_soft_qh_t *); 198 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 199 Static void ehci_sync_hc(ehci_softc_t *); 200 201 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 202 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 203 204 #ifdef EHCI_DEBUG 205 Static void ehci_dump_regs(ehci_softc_t *); 206 Static void ehci_dump(void); 207 Static ehci_softc_t *theehci; 208 Static void ehci_dump_link(ehci_link_t, int); 209 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 210 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 211 Static void ehci_dump_qtd(ehci_qtd_t *); 212 Static void ehci_dump_sqh(ehci_soft_qh_t *); 213 #ifdef DIAGNOSTIC 214 Static void ehci_dump_exfer(struct ehci_xfer *); 215 #endif 216 #endif 217 218 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 219 220 #define EHCI_INTR_ENDPT 1 221 222 #define ehci_add_intr_list(sc, ex) \ 223 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 224 #define ehci_del_intr_list(ex) \ 225 do { \ 226 LIST_REMOVE((ex), inext); \ 227 (ex)->inext.le_prev = NULL; \ 228 } while (0) 229 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 230 231 Static struct usbd_bus_methods ehci_bus_methods = { 232 ehci_open, 233 ehci_softintr, 234 ehci_poll, 235 ehci_allocm, 236 ehci_freem, 237 ehci_allocx, 238 ehci_freex, 239 }; 240 241 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 242 ehci_root_ctrl_transfer, 243 ehci_root_ctrl_start, 244 ehci_root_ctrl_abort, 245 ehci_root_ctrl_close, 246 ehci_noop, 247 ehci_root_ctrl_done, 248 }; 249 250 Static struct usbd_pipe_methods ehci_root_intr_methods = { 251 ehci_root_intr_transfer, 252 ehci_root_intr_start, 253 ehci_root_intr_abort, 254 ehci_root_intr_close, 255 ehci_noop, 256 ehci_root_intr_done, 257 }; 258 259 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 260 ehci_device_ctrl_transfer, 261 ehci_device_ctrl_start, 262 ehci_device_ctrl_abort, 263 ehci_device_ctrl_close, 264 ehci_noop, 265 ehci_device_ctrl_done, 266 }; 267 268 Static struct usbd_pipe_methods ehci_device_intr_methods = { 269 ehci_device_intr_transfer, 270 ehci_device_intr_start, 271 ehci_device_intr_abort, 272 ehci_device_intr_close, 273 ehci_device_clear_toggle, 274 ehci_device_intr_done, 275 }; 276 277 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 278 ehci_device_bulk_transfer, 279 ehci_device_bulk_start, 280 ehci_device_bulk_abort, 281 ehci_device_bulk_close, 282 ehci_device_clear_toggle, 283 ehci_device_bulk_done, 284 }; 285 286 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 287 ehci_device_isoc_transfer, 288 ehci_device_isoc_start, 289 ehci_device_isoc_abort, 290 ehci_device_isoc_close, 291 ehci_noop, 292 ehci_device_isoc_done, 293 }; 294 295 usbd_status 296 ehci_init(ehci_softc_t *sc) 297 { 298 u_int32_t version, sparams, cparams, hcr; 299 u_int i; 300 usbd_status err; 301 ehci_soft_qh_t *sqh; 302 303 DPRINTF(("ehci_init: start\n")); 304 #ifdef EHCI_DEBUG 305 theehci = sc; 306 #endif 307 308 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 309 310 version = EREAD2(sc, EHCI_HCIVERSION); 311 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 312 version >> 8, version & 0xff); 313 314 sparams = EREAD4(sc, EHCI_HCSPARAMS); 315 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 316 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 317 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 318 aprint_error("%s: wrong number of companions (%d != %d)\n", 319 USBDEVNAME(sc->sc_bus.bdev), 320 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 321 #if NOHCI == 0 || NUHCI == 0 322 aprint_error("%s: ohci or uhci probably not configured\n", 323 USBDEVNAME(sc->sc_bus.bdev)); 324 #endif 325 return (USBD_IOERROR); 326 } 327 if (sc->sc_ncomp > 0) { 328 aprint_normal("%s: companion controller%s, %d port%s each:", 329 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 330 EHCI_HCS_N_PCC(sparams), 331 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 332 for (i = 0; i < sc->sc_ncomp; i++) 333 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 334 aprint_normal("\n"); 335 } 336 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 337 cparams = EREAD4(sc, EHCI_HCCPARAMS); 338 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 339 340 if (EHCI_HCC_64BIT(cparams)) { 341 /* MUST clear segment register if 64 bit capable. */ 342 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 343 } 344 345 sc->sc_bus.usbrev = USBREV_2_0; 346 347 /* Reset the controller */ 348 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 349 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 350 usb_delay_ms(&sc->sc_bus, 1); 351 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 352 for (i = 0; i < 100; i++) { 353 usb_delay_ms(&sc->sc_bus, 1); 354 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 355 if (!hcr) 356 break; 357 } 358 if (hcr) { 359 aprint_error("%s: reset timeout\n", 360 USBDEVNAME(sc->sc_bus.bdev)); 361 return (USBD_IOERROR); 362 } 363 364 /* frame list size at default, read back what we got and use that */ 365 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 366 case 0: sc->sc_flsize = 1024*4; break; 367 case 1: sc->sc_flsize = 512*4; break; 368 case 2: sc->sc_flsize = 256*4; break; 369 case 3: return (USBD_IOERROR); 370 } 371 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 372 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 373 if (err) 374 return (err); 375 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 376 377 /* Set up the bus struct. */ 378 sc->sc_bus.methods = &ehci_bus_methods; 379 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 380 381 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 382 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 383 384 sc->sc_eintrs = EHCI_NORMAL_INTRS; 385 386 /* Allocate dummy QH that starts the async list. */ 387 sqh = ehci_alloc_sqh(sc); 388 if (sqh == NULL) { 389 err = USBD_NOMEM; 390 goto bad1; 391 } 392 /* Fill the QH */ 393 sqh->qh.qh_endp = 394 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 395 sqh->qh.qh_link = 396 htole32(sqh->physaddr | EHCI_LINK_QH); 397 sqh->qh.qh_curqtd = EHCI_NULL; 398 sqh->next = NULL; 399 /* Fill the overlay qTD */ 400 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 401 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 402 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 403 sqh->sqtd = NULL; 404 #ifdef EHCI_DEBUG 405 if (ehcidebug) { 406 ehci_dump_sqh(sqh); 407 } 408 #endif 409 410 /* Point to async list */ 411 sc->sc_async_head = sqh; 412 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 413 414 usb_callout_init(sc->sc_tmo_pcd); 415 416 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 417 418 /* Enable interrupts */ 419 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 420 421 /* Turn on controller */ 422 EOWRITE4(sc, EHCI_USBCMD, 423 EHCI_CMD_ITC_8 | /* 8 microframes */ 424 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 425 EHCI_CMD_ASE | 426 /* EHCI_CMD_PSE | */ 427 EHCI_CMD_RS); 428 429 /* Take over port ownership */ 430 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 431 432 for (i = 0; i < 100; i++) { 433 usb_delay_ms(&sc->sc_bus, 1); 434 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 435 if (!hcr) 436 break; 437 } 438 if (hcr) { 439 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 440 return (USBD_IOERROR); 441 } 442 443 return (USBD_NORMAL_COMPLETION); 444 445 #if 0 446 bad2: 447 ehci_free_sqh(sc, sc->sc_async_head); 448 #endif 449 bad1: 450 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 451 return (err); 452 } 453 454 int 455 ehci_intr(void *v) 456 { 457 ehci_softc_t *sc = v; 458 459 if (sc == NULL || sc->sc_dying) 460 return (0); 461 462 /* If we get an interrupt while polling, then just ignore it. */ 463 if (sc->sc_bus.use_polling) { 464 #ifdef DIAGNOSTIC 465 printf("ehci_intr: ignored interrupt while polling\n"); 466 #endif 467 return (0); 468 } 469 470 return (ehci_intr1(sc)); 471 } 472 473 Static int 474 ehci_intr1(ehci_softc_t *sc) 475 { 476 u_int32_t intrs, eintrs; 477 478 DPRINTFN(20,("ehci_intr1: enter\n")); 479 480 /* In case the interrupt occurs before initialization has completed. */ 481 if (sc == NULL) { 482 #ifdef DIAGNOSTIC 483 printf("ehci_intr: sc == NULL\n"); 484 #endif 485 return (0); 486 } 487 488 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 489 490 if (!intrs) 491 return (0); 492 493 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 494 eintrs = intrs & sc->sc_eintrs; 495 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 496 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 497 (u_int)eintrs)); 498 if (!eintrs) 499 return (0); 500 501 sc->sc_bus.intr_context++; 502 sc->sc_bus.no_intrs++; 503 if (eintrs & EHCI_STS_IAA) { 504 DPRINTF(("ehci_intr1: door bell\n")); 505 wakeup(&sc->sc_async_head); 506 eintrs &= ~EHCI_STS_IAA; 507 } 508 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 509 DPRINTFN(5,("ehci_intr1: %s %s\n", 510 eintrs & EHCI_STS_INT ? "INT" : "", 511 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 512 usb_schedsoftintr(&sc->sc_bus); 513 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 514 } 515 if (eintrs & EHCI_STS_HSE) { 516 printf("%s: unrecoverable error, controller halted\n", 517 USBDEVNAME(sc->sc_bus.bdev)); 518 /* XXX what else */ 519 } 520 if (eintrs & EHCI_STS_PCD) { 521 ehci_pcd(sc, sc->sc_intrxfer); 522 /* 523 * Disable PCD interrupt for now, because it will be 524 * on until the port has been reset. 525 */ 526 ehci_pcd_able(sc, 0); 527 /* Do not allow RHSC interrupts > 1 per second */ 528 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 529 eintrs &= ~EHCI_STS_PCD; 530 } 531 532 sc->sc_bus.intr_context--; 533 534 if (eintrs != 0) { 535 /* Block unprocessed interrupts. */ 536 sc->sc_eintrs &= ~eintrs; 537 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 538 printf("%s: blocking intrs 0x%x\n", 539 USBDEVNAME(sc->sc_bus.bdev), eintrs); 540 } 541 542 return (1); 543 } 544 545 void 546 ehci_pcd_able(ehci_softc_t *sc, int on) 547 { 548 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 549 if (on) 550 sc->sc_eintrs |= EHCI_STS_PCD; 551 else 552 sc->sc_eintrs &= ~EHCI_STS_PCD; 553 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 554 } 555 556 void 557 ehci_pcd_enable(void *v_sc) 558 { 559 ehci_softc_t *sc = v_sc; 560 561 ehci_pcd_able(sc, 1); 562 } 563 564 void 565 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 566 { 567 usbd_pipe_handle pipe; 568 struct ehci_pipe *epipe; 569 u_char *p; 570 int i, m; 571 572 if (xfer == NULL) { 573 /* Just ignore the change. */ 574 return; 575 } 576 577 pipe = xfer->pipe; 578 epipe = (struct ehci_pipe *)pipe; 579 580 p = KERNADDR(&xfer->dmabuf, 0); 581 m = min(sc->sc_noport, xfer->length * 8 - 1); 582 memset(p, 0, xfer->length); 583 for (i = 1; i <= m; i++) { 584 /* Pick out CHANGE bits from the status reg. */ 585 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 586 p[i/8] |= 1 << (i%8); 587 } 588 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 589 xfer->actlen = xfer->length; 590 xfer->status = USBD_NORMAL_COMPLETION; 591 592 usb_transfer_complete(xfer); 593 } 594 595 void 596 ehci_softintr(void *v) 597 { 598 ehci_softc_t *sc = v; 599 struct ehci_xfer *ex; 600 601 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 602 sc->sc_bus.intr_context)); 603 604 sc->sc_bus.intr_context++; 605 606 /* 607 * The only explanation I can think of for why EHCI is as brain dead 608 * as UHCI interrupt-wise is that Intel was involved in both. 609 * An interrupt just tells us that something is done, we have no 610 * clue what, so we need to scan through all active transfers. :-( 611 */ 612 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 613 ehci_check_intr(sc, ex); 614 615 if (sc->sc_softwake) { 616 sc->sc_softwake = 0; 617 wakeup(&sc->sc_softwake); 618 } 619 620 sc->sc_bus.intr_context--; 621 } 622 623 /* Check for an interrupt. */ 624 void 625 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 626 { 627 ehci_soft_qtd_t *sqtd, *lsqtd; 628 u_int32_t status; 629 630 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 631 632 if (ex->sqtdstart == NULL) { 633 printf("ehci_check_intr: sqtdstart=NULL\n"); 634 return; 635 } 636 lsqtd = ex->sqtdend; 637 #ifdef DIAGNOSTIC 638 if (lsqtd == NULL) { 639 printf("ehci_check_intr: sqtd==0\n"); 640 return; 641 } 642 #endif 643 /* 644 * If the last TD is still active we need to check whether there 645 * is a an error somewhere in the middle, or whether there was a 646 * short packet (SPD and not ACTIVE). 647 */ 648 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 649 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 650 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 651 status = le32toh(sqtd->qtd.qtd_status); 652 /* If there's an active QTD the xfer isn't done. */ 653 if (status & EHCI_QTD_ACTIVE) 654 break; 655 /* Any kind of error makes the xfer done. */ 656 if (status & EHCI_QTD_HALTED) 657 goto done; 658 /* We want short packets, and it is short: it's done */ 659 if (EHCI_QTD_SET_BYTES(status) != 0) 660 goto done; 661 } 662 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 663 ex, ex->sqtdstart)); 664 return; 665 } 666 done: 667 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 668 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 669 ehci_idone(ex); 670 } 671 672 void 673 ehci_idone(struct ehci_xfer *ex) 674 { 675 usbd_xfer_handle xfer = &ex->xfer; 676 #ifdef EHCI_DEBUG 677 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 678 #endif 679 ehci_soft_qtd_t *sqtd; 680 u_int32_t status = 0, nstatus; 681 int actlen; 682 683 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 684 #ifdef DIAGNOSTIC 685 { 686 int s = splhigh(); 687 if (ex->isdone) { 688 splx(s); 689 #ifdef EHCI_DEBUG 690 printf("ehci_idone: ex is done!\n "); 691 ehci_dump_exfer(ex); 692 #else 693 printf("ehci_idone: ex=%p is done!\n", ex); 694 #endif 695 return; 696 } 697 ex->isdone = 1; 698 splx(s); 699 } 700 #endif 701 702 if (xfer->status == USBD_CANCELLED || 703 xfer->status == USBD_TIMEOUT) { 704 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 705 return; 706 } 707 708 #ifdef EHCI_DEBUG 709 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 710 if (ehcidebug > 10) 711 ehci_dump_sqtds(ex->sqtdstart); 712 #endif 713 714 /* The transfer is done, compute actual length and status. */ 715 actlen = 0; 716 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 717 nstatus = le32toh(sqtd->qtd.qtd_status); 718 if (nstatus & EHCI_QTD_ACTIVE) 719 break; 720 721 status = nstatus; 722 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 723 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 724 } 725 726 /* If there are left over TDs we need to update the toggle. */ 727 if (sqtd != NULL) { 728 if (!(xfer->rqflags & URQ_REQUEST)) 729 printf("ehci_idone: need toggle update\n"); 730 #if 0 731 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 732 #endif 733 } 734 735 status &= EHCI_QTD_STATERRS; 736 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 737 xfer->length, actlen, status)); 738 xfer->actlen = actlen; 739 if (status != 0) { 740 #ifdef EHCI_DEBUG 741 char sbuf[128]; 742 743 bitmask_snprintf((u_int32_t)status, 744 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 745 "\7HALTED", 746 sbuf, sizeof(sbuf)); 747 748 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 749 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 750 "status 0x%s\n", 751 xfer->pipe->device->address, 752 xfer->pipe->endpoint->edesc->bEndpointAddress, 753 sbuf)); 754 if (ehcidebug > 2) { 755 ehci_dump_sqh(epipe->sqh); 756 ehci_dump_sqtds(ex->sqtdstart); 757 } 758 #endif 759 if (status == EHCI_QTD_HALTED) 760 xfer->status = USBD_STALLED; 761 else 762 xfer->status = USBD_IOERROR; /* more info XXX */ 763 } else { 764 xfer->status = USBD_NORMAL_COMPLETION; 765 } 766 767 usb_transfer_complete(xfer); 768 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 769 } 770 771 /* 772 * Wait here until controller claims to have an interrupt. 773 * Then call ehci_intr and return. Use timeout to avoid waiting 774 * too long. 775 */ 776 void 777 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 778 { 779 int timo = xfer->timeout; 780 int usecs; 781 u_int32_t intrs; 782 783 xfer->status = USBD_IN_PROGRESS; 784 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 785 usb_delay_ms(&sc->sc_bus, 1); 786 if (sc->sc_dying) 787 break; 788 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 789 sc->sc_eintrs; 790 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 791 #ifdef OHCI_DEBUG 792 if (ehcidebug > 15) 793 ehci_dump_regs(sc); 794 #endif 795 if (intrs) { 796 ehci_intr1(sc); 797 if (xfer->status != USBD_IN_PROGRESS) 798 return; 799 } 800 } 801 802 /* Timeout */ 803 DPRINTF(("ehci_waitintr: timeout\n")); 804 xfer->status = USBD_TIMEOUT; 805 usb_transfer_complete(xfer); 806 /* XXX should free TD */ 807 } 808 809 void 810 ehci_poll(struct usbd_bus *bus) 811 { 812 ehci_softc_t *sc = (ehci_softc_t *)bus; 813 #ifdef EHCI_DEBUG 814 static int last; 815 int new; 816 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 817 if (new != last) { 818 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 819 last = new; 820 } 821 #endif 822 823 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 824 ehci_intr1(sc); 825 } 826 827 int 828 ehci_detach(struct ehci_softc *sc, int flags) 829 { 830 int rv = 0; 831 832 if (sc->sc_child != NULL) 833 rv = config_detach(sc->sc_child, flags); 834 835 if (rv != 0) 836 return (rv); 837 838 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 839 840 if (sc->sc_powerhook != NULL) 841 powerhook_disestablish(sc->sc_powerhook); 842 if (sc->sc_shutdownhook != NULL) 843 shutdownhook_disestablish(sc->sc_shutdownhook); 844 845 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 846 847 /* XXX free other data structures XXX */ 848 849 return (rv); 850 } 851 852 853 int 854 ehci_activate(device_ptr_t self, enum devact act) 855 { 856 struct ehci_softc *sc = (struct ehci_softc *)self; 857 int rv = 0; 858 859 switch (act) { 860 case DVACT_ACTIVATE: 861 return (EOPNOTSUPP); 862 break; 863 864 case DVACT_DEACTIVATE: 865 if (sc->sc_child != NULL) 866 rv = config_deactivate(sc->sc_child); 867 sc->sc_dying = 1; 868 break; 869 } 870 return (rv); 871 } 872 873 /* 874 * Handle suspend/resume. 875 * 876 * We need to switch to polling mode here, because this routine is 877 * called from an intterupt context. This is all right since we 878 * are almost suspended anyway. 879 */ 880 void 881 ehci_power(int why, void *v) 882 { 883 ehci_softc_t *sc = v; 884 //u_int32_t ctl; 885 int s; 886 887 #ifdef EHCI_DEBUG 888 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 889 ehci_dump_regs(sc); 890 #endif 891 892 s = splhardusb(); 893 switch (why) { 894 case PWR_SUSPEND: 895 case PWR_STANDBY: 896 sc->sc_bus.use_polling++; 897 #if 0 898 OOO 899 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 900 if (sc->sc_control == 0) { 901 /* 902 * Preserve register values, in case that APM BIOS 903 * does not recover them. 904 */ 905 sc->sc_control = ctl; 906 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 907 } 908 ctl |= EHCI_HCFS_SUSPEND; 909 OWRITE4(sc, EHCI_CONTROL, ctl); 910 #endif 911 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 912 sc->sc_bus.use_polling--; 913 break; 914 case PWR_RESUME: 915 sc->sc_bus.use_polling++; 916 #if 0 917 OOO 918 /* Some broken BIOSes do not recover these values */ 919 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 920 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 921 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 922 if (sc->sc_intre) 923 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 924 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 925 if (sc->sc_control) 926 ctl = sc->sc_control; 927 else 928 ctl = OREAD4(sc, EHCI_CONTROL); 929 ctl |= EHCI_HCFS_RESUME; 930 OWRITE4(sc, EHCI_CONTROL, ctl); 931 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 932 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 933 OWRITE4(sc, EHCI_CONTROL, ctl); 934 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 935 sc->sc_control = sc->sc_intre = 0; 936 #endif 937 sc->sc_bus.use_polling--; 938 break; 939 case PWR_SOFTSUSPEND: 940 case PWR_SOFTSTANDBY: 941 case PWR_SOFTRESUME: 942 break; 943 } 944 splx(s); 945 } 946 947 /* 948 * Shut down the controller when the system is going down. 949 */ 950 void 951 ehci_shutdown(void *v) 952 { 953 ehci_softc_t *sc = v; 954 955 DPRINTF(("ehci_shutdown: stopping the HC\n")); 956 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 957 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 958 } 959 960 usbd_status 961 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 962 { 963 struct ehci_softc *sc = (struct ehci_softc *)bus; 964 usbd_status err; 965 966 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 967 #ifdef EHCI_DEBUG 968 if (err) 969 printf("ehci_allocm: usb_allocmem()=%d\n", err); 970 #endif 971 return (err); 972 } 973 974 void 975 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 976 { 977 struct ehci_softc *sc = (struct ehci_softc *)bus; 978 979 usb_freemem(&sc->sc_bus, dma); 980 } 981 982 usbd_xfer_handle 983 ehci_allocx(struct usbd_bus *bus) 984 { 985 struct ehci_softc *sc = (struct ehci_softc *)bus; 986 usbd_xfer_handle xfer; 987 988 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 989 if (xfer != NULL) { 990 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 991 #ifdef DIAGNOSTIC 992 if (xfer->busy_free != XFER_FREE) { 993 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 994 xfer->busy_free); 995 } 996 #endif 997 } else { 998 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 999 } 1000 if (xfer != NULL) { 1001 memset(xfer, 0, sizeof (struct ehci_xfer)); 1002 #ifdef DIAGNOSTIC 1003 EXFER(xfer)->isdone = 1; 1004 xfer->busy_free = XFER_BUSY; 1005 #endif 1006 } 1007 return (xfer); 1008 } 1009 1010 void 1011 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1012 { 1013 struct ehci_softc *sc = (struct ehci_softc *)bus; 1014 1015 #ifdef DIAGNOSTIC 1016 if (xfer->busy_free != XFER_BUSY) { 1017 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1018 xfer->busy_free); 1019 return; 1020 } 1021 xfer->busy_free = XFER_FREE; 1022 if (!EXFER(xfer)->isdone) { 1023 printf("ehci_freex: !isdone\n"); 1024 return; 1025 } 1026 #endif 1027 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1028 } 1029 1030 Static void 1031 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1032 { 1033 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1034 1035 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1036 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1037 #ifdef USB_DEBUG 1038 if (ehcidebug) 1039 usbd_dump_pipe(pipe); 1040 #endif 1041 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1042 } 1043 1044 Static void 1045 ehci_noop(usbd_pipe_handle pipe) 1046 { 1047 } 1048 1049 #ifdef EHCI_DEBUG 1050 void 1051 ehci_dump_regs(ehci_softc_t *sc) 1052 { 1053 int i; 1054 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1055 EOREAD4(sc, EHCI_USBCMD), 1056 EOREAD4(sc, EHCI_USBSTS), 1057 EOREAD4(sc, EHCI_USBINTR)); 1058 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1059 EOREAD4(sc, EHCI_FRINDEX), 1060 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1061 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1062 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1063 for (i = 1; i <= sc->sc_noport; i++) 1064 printf("port %d status=0x%08x\n", i, 1065 EOREAD4(sc, EHCI_PORTSC(i))); 1066 } 1067 1068 /* 1069 * Unused function - this is meant to be called from a kernel 1070 * debugger. 1071 */ 1072 void 1073 ehci_dump() 1074 { 1075 ehci_dump_regs(theehci); 1076 } 1077 1078 void 1079 ehci_dump_link(ehci_link_t link, int type) 1080 { 1081 link = le32toh(link); 1082 printf("0x%08x", link); 1083 if (link & EHCI_LINK_TERMINATE) 1084 printf("<T>"); 1085 else { 1086 printf("<"); 1087 if (type) { 1088 switch (EHCI_LINK_TYPE(link)) { 1089 case EHCI_LINK_ITD: printf("ITD"); break; 1090 case EHCI_LINK_QH: printf("QH"); break; 1091 case EHCI_LINK_SITD: printf("SITD"); break; 1092 case EHCI_LINK_FSTN: printf("FSTN"); break; 1093 } 1094 } 1095 printf(">"); 1096 } 1097 } 1098 1099 void 1100 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1101 { 1102 int i; 1103 u_int32_t stop; 1104 1105 stop = 0; 1106 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1107 ehci_dump_sqtd(sqtd); 1108 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1109 } 1110 if (sqtd) 1111 printf("dump aborted, too many TDs\n"); 1112 } 1113 1114 void 1115 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1116 { 1117 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1118 ehci_dump_qtd(&sqtd->qtd); 1119 } 1120 1121 void 1122 ehci_dump_qtd(ehci_qtd_t *qtd) 1123 { 1124 u_int32_t s; 1125 char sbuf[128]; 1126 1127 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1128 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1129 printf("\n"); 1130 s = le32toh(qtd->qtd_status); 1131 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1132 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1133 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1134 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1135 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1136 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1137 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1138 EHCI_QTD_GET_PID(s), sbuf); 1139 for (s = 0; s < 5; s++) 1140 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1141 } 1142 1143 void 1144 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1145 { 1146 ehci_qh_t *qh = &sqh->qh; 1147 u_int32_t endp, endphub; 1148 1149 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1150 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1151 endp = le32toh(qh->qh_endp); 1152 printf(" endp=0x%08x\n", endp); 1153 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1154 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1155 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1156 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1157 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1158 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1159 EHCI_QH_GET_NRL(endp)); 1160 endphub = le32toh(qh->qh_endphub); 1161 printf(" endphub=0x%08x\n", endphub); 1162 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1163 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1164 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1165 EHCI_QH_GET_MULT(endphub)); 1166 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1167 printf("Overlay qTD:\n"); 1168 ehci_dump_qtd(&qh->qh_qtd); 1169 } 1170 1171 #ifdef DIAGNOSTIC 1172 Static void 1173 ehci_dump_exfer(struct ehci_xfer *ex) 1174 { 1175 printf("ehci_dump_exfer: ex=%p\n", ex); 1176 } 1177 #endif 1178 #endif 1179 1180 usbd_status 1181 ehci_open(usbd_pipe_handle pipe) 1182 { 1183 usbd_device_handle dev = pipe->device; 1184 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1185 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1186 u_int8_t addr = dev->address; 1187 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1188 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1189 ehci_soft_qh_t *sqh; 1190 usbd_status err; 1191 int s; 1192 int speed, naks; 1193 1194 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1195 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1196 1197 if (sc->sc_dying) 1198 return (USBD_IOERROR); 1199 1200 if (addr == sc->sc_addr) { 1201 switch (ed->bEndpointAddress) { 1202 case USB_CONTROL_ENDPOINT: 1203 pipe->methods = &ehci_root_ctrl_methods; 1204 break; 1205 case UE_DIR_IN | EHCI_INTR_ENDPT: 1206 pipe->methods = &ehci_root_intr_methods; 1207 break; 1208 default: 1209 return (USBD_INVAL); 1210 } 1211 return (USBD_NORMAL_COMPLETION); 1212 } 1213 1214 /* XXX All this stuff is only valid for async. */ 1215 switch (dev->speed) { 1216 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1217 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1218 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1219 default: panic("ehci_open: bad device speed %d", dev->speed); 1220 } 1221 naks = 8; /* XXX */ 1222 sqh = ehci_alloc_sqh(sc); 1223 if (sqh == NULL) 1224 goto bad0; 1225 /* qh_link filled when the QH is added */ 1226 sqh->qh.qh_endp = htole32( 1227 EHCI_QH_SET_ADDR(addr) | 1228 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1229 EHCI_QH_SET_EPS(speed) | /* XXX */ 1230 /* XXX EHCI_QH_DTC ? */ 1231 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1232 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1233 EHCI_QH_CTL : 0) | 1234 EHCI_QH_SET_NRL(naks) 1235 ); 1236 sqh->qh.qh_endphub = htole32( 1237 EHCI_QH_SET_MULT(1) 1238 /* XXX TT stuff */ 1239 /* XXX interrupt mask */ 1240 ); 1241 sqh->qh.qh_curqtd = EHCI_NULL; 1242 /* Fill the overlay qTD */ 1243 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1244 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1245 sqh->qh.qh_qtd.qtd_status = htole32(0); 1246 1247 epipe->sqh = sqh; 1248 1249 switch (xfertype) { 1250 case UE_CONTROL: 1251 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1252 0, &epipe->u.ctl.reqdma); 1253 #ifdef EHCI_DEBUG 1254 if (err) 1255 printf("ehci_open: usb_allocmem()=%d\n", err); 1256 #endif 1257 if (err) 1258 goto bad1; 1259 pipe->methods = &ehci_device_ctrl_methods; 1260 s = splusb(); 1261 ehci_add_qh(sqh, sc->sc_async_head); 1262 splx(s); 1263 break; 1264 case UE_BULK: 1265 pipe->methods = &ehci_device_bulk_methods; 1266 s = splusb(); 1267 ehci_add_qh(sqh, sc->sc_async_head); 1268 splx(s); 1269 break; 1270 case UE_INTERRUPT: 1271 pipe->methods = &ehci_device_intr_methods; 1272 return (USBD_INVAL); 1273 case UE_ISOCHRONOUS: 1274 pipe->methods = &ehci_device_isoc_methods; 1275 return (USBD_INVAL); 1276 default: 1277 return (USBD_INVAL); 1278 } 1279 return (USBD_NORMAL_COMPLETION); 1280 1281 bad1: 1282 ehci_free_sqh(sc, sqh); 1283 bad0: 1284 return (USBD_NOMEM); 1285 } 1286 1287 /* 1288 * Add an ED to the schedule. Called at splusb(). 1289 */ 1290 void 1291 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1292 { 1293 SPLUSBCHECK; 1294 1295 sqh->next = head->next; 1296 sqh->qh.qh_link = head->qh.qh_link; 1297 head->next = sqh; 1298 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1299 1300 #ifdef EHCI_DEBUG 1301 if (ehcidebug > 5) { 1302 printf("ehci_add_qh:\n"); 1303 ehci_dump_sqh(sqh); 1304 } 1305 #endif 1306 } 1307 1308 /* 1309 * Remove an ED from the schedule. Called at splusb(). 1310 */ 1311 void 1312 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1313 { 1314 ehci_soft_qh_t *p; 1315 1316 SPLUSBCHECK; 1317 /* XXX */ 1318 for (p = head; p != NULL && p->next != sqh; p = p->next) 1319 ; 1320 if (p == NULL) 1321 panic("ehci_rem_qh: ED not found"); 1322 p->next = sqh->next; 1323 p->qh.qh_link = sqh->qh.qh_link; 1324 1325 ehci_sync_hc(sc); 1326 } 1327 1328 void 1329 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1330 { 1331 /* Halt while we are messing. */ 1332 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1333 sqh->qh.qh_curqtd = 0; 1334 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1335 sqh->sqtd = sqtd; 1336 /* Keep toggle, clear the rest, including length. */ 1337 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1338 } 1339 1340 /* 1341 * Ensure that the HC has released all references to the QH. We do this 1342 * by asking for a Async Advance Doorbell interrupt and then we wait for 1343 * the interrupt. 1344 * To make this easier we first obtain exclusive use of the doorbell. 1345 */ 1346 void 1347 ehci_sync_hc(ehci_softc_t *sc) 1348 { 1349 int s, error; 1350 1351 if (sc->sc_dying) { 1352 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1353 return; 1354 } 1355 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1356 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1357 s = splhardusb(); 1358 /* ask for doorbell */ 1359 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1360 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1361 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1362 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1363 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1364 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1365 splx(s); 1366 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1367 #ifdef DIAGNOSTIC 1368 if (error) 1369 printf("ehci_sync_hc: tsleep() = %d\n", error); 1370 #endif 1371 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1372 } 1373 1374 /***********/ 1375 1376 /* 1377 * Data structures and routines to emulate the root hub. 1378 */ 1379 Static usb_device_descriptor_t ehci_devd = { 1380 USB_DEVICE_DESCRIPTOR_SIZE, 1381 UDESC_DEVICE, /* type */ 1382 {0x00, 0x02}, /* USB version */ 1383 UDCLASS_HUB, /* class */ 1384 UDSUBCLASS_HUB, /* subclass */ 1385 UDPROTO_HSHUBSTT, /* protocol */ 1386 64, /* max packet */ 1387 {0},{0},{0x00,0x01}, /* device id */ 1388 1,2,0, /* string indicies */ 1389 1 /* # of configurations */ 1390 }; 1391 1392 Static usb_device_qualifier_t ehci_odevd = { 1393 USB_DEVICE_DESCRIPTOR_SIZE, 1394 UDESC_DEVICE_QUALIFIER, /* type */ 1395 {0x00, 0x02}, /* USB version */ 1396 UDCLASS_HUB, /* class */ 1397 UDSUBCLASS_HUB, /* subclass */ 1398 UDPROTO_FSHUB, /* protocol */ 1399 64, /* max packet */ 1400 1, /* # of configurations */ 1401 0 1402 }; 1403 1404 Static usb_config_descriptor_t ehci_confd = { 1405 USB_CONFIG_DESCRIPTOR_SIZE, 1406 UDESC_CONFIG, 1407 {USB_CONFIG_DESCRIPTOR_SIZE + 1408 USB_INTERFACE_DESCRIPTOR_SIZE + 1409 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1410 1, 1411 1, 1412 0, 1413 UC_SELF_POWERED, 1414 0 /* max power */ 1415 }; 1416 1417 Static usb_interface_descriptor_t ehci_ifcd = { 1418 USB_INTERFACE_DESCRIPTOR_SIZE, 1419 UDESC_INTERFACE, 1420 0, 1421 0, 1422 1, 1423 UICLASS_HUB, 1424 UISUBCLASS_HUB, 1425 UIPROTO_HSHUBSTT, 1426 0 1427 }; 1428 1429 Static usb_endpoint_descriptor_t ehci_endpd = { 1430 USB_ENDPOINT_DESCRIPTOR_SIZE, 1431 UDESC_ENDPOINT, 1432 UE_DIR_IN | EHCI_INTR_ENDPT, 1433 UE_INTERRUPT, 1434 {8, 0}, /* max packet */ 1435 255 1436 }; 1437 1438 Static usb_hub_descriptor_t ehci_hubd = { 1439 USB_HUB_DESCRIPTOR_SIZE, 1440 UDESC_HUB, 1441 0, 1442 {0,0}, 1443 0, 1444 0, 1445 {0}, 1446 }; 1447 1448 Static int 1449 ehci_str(p, l, s) 1450 usb_string_descriptor_t *p; 1451 int l; 1452 char *s; 1453 { 1454 int i; 1455 1456 if (l == 0) 1457 return (0); 1458 p->bLength = 2 * strlen(s) + 2; 1459 if (l == 1) 1460 return (1); 1461 p->bDescriptorType = UDESC_STRING; 1462 l -= 2; 1463 for (i = 0; s[i] && l > 1; i++, l -= 2) 1464 USETW2(p->bString[i], 0, s[i]); 1465 return (2*i+2); 1466 } 1467 1468 /* 1469 * Simulate a hardware hub by handling all the necessary requests. 1470 */ 1471 Static usbd_status 1472 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1473 { 1474 usbd_status err; 1475 1476 /* Insert last in queue. */ 1477 err = usb_insert_transfer(xfer); 1478 if (err) 1479 return (err); 1480 1481 /* Pipe isn't running, start first */ 1482 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1483 } 1484 1485 Static usbd_status 1486 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1487 { 1488 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1489 usb_device_request_t *req; 1490 void *buf = NULL; 1491 int port, i; 1492 int s, len, value, index, l, totlen = 0; 1493 usb_port_status_t ps; 1494 usb_hub_descriptor_t hubd; 1495 usbd_status err; 1496 u_int32_t v; 1497 1498 if (sc->sc_dying) 1499 return (USBD_IOERROR); 1500 1501 #ifdef DIAGNOSTIC 1502 if (!(xfer->rqflags & URQ_REQUEST)) 1503 /* XXX panic */ 1504 return (USBD_INVAL); 1505 #endif 1506 req = &xfer->request; 1507 1508 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1509 req->bmRequestType, req->bRequest)); 1510 1511 len = UGETW(req->wLength); 1512 value = UGETW(req->wValue); 1513 index = UGETW(req->wIndex); 1514 1515 if (len != 0) 1516 buf = KERNADDR(&xfer->dmabuf, 0); 1517 1518 #define C(x,y) ((x) | ((y) << 8)) 1519 switch(C(req->bRequest, req->bmRequestType)) { 1520 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1521 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1522 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1523 /* 1524 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1525 * for the integrated root hub. 1526 */ 1527 break; 1528 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1529 if (len > 0) { 1530 *(u_int8_t *)buf = sc->sc_conf; 1531 totlen = 1; 1532 } 1533 break; 1534 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1535 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1536 switch(value >> 8) { 1537 case UDESC_DEVICE: 1538 if ((value & 0xff) != 0) { 1539 err = USBD_IOERROR; 1540 goto ret; 1541 } 1542 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1543 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1544 memcpy(buf, &ehci_devd, l); 1545 break; 1546 /* 1547 * We can't really operate at another speed, but the spec says 1548 * we need this descriptor. 1549 */ 1550 case UDESC_DEVICE_QUALIFIER: 1551 if ((value & 0xff) != 0) { 1552 err = USBD_IOERROR; 1553 goto ret; 1554 } 1555 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1556 memcpy(buf, &ehci_odevd, l); 1557 break; 1558 /* 1559 * We can't really operate at another speed, but the spec says 1560 * we need this descriptor. 1561 */ 1562 case UDESC_OTHER_SPEED_CONFIGURATION: 1563 case UDESC_CONFIG: 1564 if ((value & 0xff) != 0) { 1565 err = USBD_IOERROR; 1566 goto ret; 1567 } 1568 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1569 memcpy(buf, &ehci_confd, l); 1570 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1571 value >> 8; 1572 buf = (char *)buf + l; 1573 len -= l; 1574 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1575 totlen += l; 1576 memcpy(buf, &ehci_ifcd, l); 1577 buf = (char *)buf + l; 1578 len -= l; 1579 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1580 totlen += l; 1581 memcpy(buf, &ehci_endpd, l); 1582 break; 1583 case UDESC_STRING: 1584 if (len == 0) 1585 break; 1586 *(u_int8_t *)buf = 0; 1587 totlen = 1; 1588 switch (value & 0xff) { 1589 case 1: /* Vendor */ 1590 totlen = ehci_str(buf, len, sc->sc_vendor); 1591 break; 1592 case 2: /* Product */ 1593 totlen = ehci_str(buf, len, "EHCI root hub"); 1594 break; 1595 } 1596 break; 1597 default: 1598 err = USBD_IOERROR; 1599 goto ret; 1600 } 1601 break; 1602 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1603 if (len > 0) { 1604 *(u_int8_t *)buf = 0; 1605 totlen = 1; 1606 } 1607 break; 1608 case C(UR_GET_STATUS, UT_READ_DEVICE): 1609 if (len > 1) { 1610 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1611 totlen = 2; 1612 } 1613 break; 1614 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1615 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1616 if (len > 1) { 1617 USETW(((usb_status_t *)buf)->wStatus, 0); 1618 totlen = 2; 1619 } 1620 break; 1621 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1622 if (value >= USB_MAX_DEVICES) { 1623 err = USBD_IOERROR; 1624 goto ret; 1625 } 1626 sc->sc_addr = value; 1627 break; 1628 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1629 if (value != 0 && value != 1) { 1630 err = USBD_IOERROR; 1631 goto ret; 1632 } 1633 sc->sc_conf = value; 1634 break; 1635 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1636 break; 1637 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1638 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1639 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1640 err = USBD_IOERROR; 1641 goto ret; 1642 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1643 break; 1644 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1645 break; 1646 /* Hub requests */ 1647 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1648 break; 1649 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1650 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1651 "port=%d feature=%d\n", 1652 index, value)); 1653 if (index < 1 || index > sc->sc_noport) { 1654 err = USBD_IOERROR; 1655 goto ret; 1656 } 1657 port = EHCI_PORTSC(index); 1658 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1659 switch(value) { 1660 case UHF_PORT_ENABLE: 1661 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1662 break; 1663 case UHF_PORT_SUSPEND: 1664 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1665 break; 1666 case UHF_PORT_POWER: 1667 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1668 break; 1669 case UHF_PORT_TEST: 1670 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1671 "%d\n", index)); 1672 break; 1673 case UHF_PORT_INDICATOR: 1674 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1675 "%d\n", index)); 1676 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1677 break; 1678 case UHF_C_PORT_CONNECTION: 1679 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1680 break; 1681 case UHF_C_PORT_ENABLE: 1682 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1683 break; 1684 case UHF_C_PORT_SUSPEND: 1685 /* how? */ 1686 break; 1687 case UHF_C_PORT_OVER_CURRENT: 1688 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1689 break; 1690 case UHF_C_PORT_RESET: 1691 sc->sc_isreset = 0; 1692 break; 1693 default: 1694 err = USBD_IOERROR; 1695 goto ret; 1696 } 1697 #if 0 1698 switch(value) { 1699 case UHF_C_PORT_CONNECTION: 1700 case UHF_C_PORT_ENABLE: 1701 case UHF_C_PORT_SUSPEND: 1702 case UHF_C_PORT_OVER_CURRENT: 1703 case UHF_C_PORT_RESET: 1704 /* Enable RHSC interrupt if condition is cleared. */ 1705 if ((OREAD4(sc, port) >> 16) == 0) 1706 ehci_pcd_able(sc, 1); 1707 break; 1708 default: 1709 break; 1710 } 1711 #endif 1712 break; 1713 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1714 if (value != 0) { 1715 err = USBD_IOERROR; 1716 goto ret; 1717 } 1718 hubd = ehci_hubd; 1719 hubd.bNbrPorts = sc->sc_noport; 1720 v = EOREAD4(sc, EHCI_HCSPARAMS); 1721 USETW(hubd.wHubCharacteristics, 1722 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1723 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1724 ? UHD_PORT_IND : 0); 1725 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1726 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1727 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1728 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1729 l = min(len, hubd.bDescLength); 1730 totlen = l; 1731 memcpy(buf, &hubd, l); 1732 break; 1733 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1734 if (len != 4) { 1735 err = USBD_IOERROR; 1736 goto ret; 1737 } 1738 memset(buf, 0, len); /* ? XXX */ 1739 totlen = len; 1740 break; 1741 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1742 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1743 index)); 1744 if (index < 1 || index > sc->sc_noport) { 1745 err = USBD_IOERROR; 1746 goto ret; 1747 } 1748 if (len != 4) { 1749 err = USBD_IOERROR; 1750 goto ret; 1751 } 1752 v = EOREAD4(sc, EHCI_PORTSC(index)); 1753 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1754 v)); 1755 i = UPS_HIGH_SPEED; 1756 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1757 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1758 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1759 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1760 if (v & EHCI_PS_PR) i |= UPS_RESET; 1761 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1762 USETW(ps.wPortStatus, i); 1763 i = 0; 1764 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1765 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1766 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1767 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1768 USETW(ps.wPortChange, i); 1769 l = min(len, sizeof ps); 1770 memcpy(buf, &ps, l); 1771 totlen = l; 1772 break; 1773 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1774 err = USBD_IOERROR; 1775 goto ret; 1776 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1777 break; 1778 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1779 if (index < 1 || index > sc->sc_noport) { 1780 err = USBD_IOERROR; 1781 goto ret; 1782 } 1783 port = EHCI_PORTSC(index); 1784 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1785 switch(value) { 1786 case UHF_PORT_ENABLE: 1787 EOWRITE4(sc, port, v | EHCI_PS_PE); 1788 break; 1789 case UHF_PORT_SUSPEND: 1790 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1791 break; 1792 case UHF_PORT_RESET: 1793 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1794 index)); 1795 if (EHCI_PS_IS_LOWSPEED(v)) { 1796 /* Low speed device, give up ownership. */ 1797 ehci_disown(sc, index, 1); 1798 break; 1799 } 1800 /* Start reset sequence. */ 1801 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1802 EOWRITE4(sc, port, v | EHCI_PS_PR); 1803 /* Wait for reset to complete. */ 1804 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1805 if (sc->sc_dying) { 1806 err = USBD_IOERROR; 1807 goto ret; 1808 } 1809 /* Terminate reset sequence. */ 1810 EOWRITE4(sc, port, v); 1811 /* Wait for HC to complete reset. */ 1812 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1813 if (sc->sc_dying) { 1814 err = USBD_IOERROR; 1815 goto ret; 1816 } 1817 v = EOREAD4(sc, port); 1818 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1819 if (v & EHCI_PS_PR) { 1820 printf("%s: port reset timeout\n", 1821 USBDEVNAME(sc->sc_bus.bdev)); 1822 return (USBD_TIMEOUT); 1823 } 1824 if (!(v & EHCI_PS_PE)) { 1825 /* Not a high speed device, give up ownership.*/ 1826 ehci_disown(sc, index, 0); 1827 break; 1828 } 1829 sc->sc_isreset = 1; 1830 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1831 index, v)); 1832 break; 1833 case UHF_PORT_POWER: 1834 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1835 "%d\n", index)); 1836 EOWRITE4(sc, port, v | EHCI_PS_PP); 1837 break; 1838 case UHF_PORT_TEST: 1839 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1840 "%d\n", index)); 1841 break; 1842 case UHF_PORT_INDICATOR: 1843 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1844 "%d\n", index)); 1845 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1846 break; 1847 default: 1848 err = USBD_IOERROR; 1849 goto ret; 1850 } 1851 break; 1852 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1853 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1854 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1855 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1856 break; 1857 default: 1858 err = USBD_IOERROR; 1859 goto ret; 1860 } 1861 xfer->actlen = totlen; 1862 err = USBD_NORMAL_COMPLETION; 1863 ret: 1864 xfer->status = err; 1865 s = splusb(); 1866 usb_transfer_complete(xfer); 1867 splx(s); 1868 return (USBD_IN_PROGRESS); 1869 } 1870 1871 void 1872 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1873 { 1874 int port; 1875 u_int32_t v; 1876 1877 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1878 #ifdef DIAGNOSTIC 1879 if (sc->sc_npcomp != 0) { 1880 int i = (index-1) / sc->sc_npcomp; 1881 if (i >= sc->sc_ncomp) 1882 printf("%s: strange port\n", 1883 USBDEVNAME(sc->sc_bus.bdev)); 1884 else 1885 printf("%s: handing over %s speed device on " 1886 "port %d to %s\n", 1887 USBDEVNAME(sc->sc_bus.bdev), 1888 lowspeed ? "low" : "full", 1889 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1890 } else { 1891 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1892 } 1893 #endif 1894 port = EHCI_PORTSC(index); 1895 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1896 EOWRITE4(sc, port, v | EHCI_PS_PO); 1897 } 1898 1899 /* Abort a root control request. */ 1900 Static void 1901 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1902 { 1903 /* Nothing to do, all transfers are synchronous. */ 1904 } 1905 1906 /* Close the root pipe. */ 1907 Static void 1908 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1909 { 1910 DPRINTF(("ehci_root_ctrl_close\n")); 1911 /* Nothing to do. */ 1912 } 1913 1914 void 1915 ehci_root_intr_done(usbd_xfer_handle xfer) 1916 { 1917 xfer->hcpriv = NULL; 1918 } 1919 1920 Static usbd_status 1921 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1922 { 1923 usbd_status err; 1924 1925 /* Insert last in queue. */ 1926 err = usb_insert_transfer(xfer); 1927 if (err) 1928 return (err); 1929 1930 /* Pipe isn't running, start first */ 1931 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1932 } 1933 1934 Static usbd_status 1935 ehci_root_intr_start(usbd_xfer_handle xfer) 1936 { 1937 usbd_pipe_handle pipe = xfer->pipe; 1938 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1939 1940 if (sc->sc_dying) 1941 return (USBD_IOERROR); 1942 1943 sc->sc_intrxfer = xfer; 1944 1945 return (USBD_IN_PROGRESS); 1946 } 1947 1948 /* Abort a root interrupt request. */ 1949 Static void 1950 ehci_root_intr_abort(usbd_xfer_handle xfer) 1951 { 1952 int s; 1953 1954 if (xfer->pipe->intrxfer == xfer) { 1955 DPRINTF(("ehci_root_intr_abort: remove\n")); 1956 xfer->pipe->intrxfer = NULL; 1957 } 1958 xfer->status = USBD_CANCELLED; 1959 s = splusb(); 1960 usb_transfer_complete(xfer); 1961 splx(s); 1962 } 1963 1964 /* Close the root pipe. */ 1965 Static void 1966 ehci_root_intr_close(usbd_pipe_handle pipe) 1967 { 1968 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1969 1970 DPRINTF(("ehci_root_intr_close\n")); 1971 1972 sc->sc_intrxfer = NULL; 1973 } 1974 1975 void 1976 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1977 { 1978 xfer->hcpriv = NULL; 1979 } 1980 1981 /************************/ 1982 1983 ehci_soft_qh_t * 1984 ehci_alloc_sqh(ehci_softc_t *sc) 1985 { 1986 ehci_soft_qh_t *sqh; 1987 usbd_status err; 1988 int i, offs; 1989 usb_dma_t dma; 1990 1991 if (sc->sc_freeqhs == NULL) { 1992 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1993 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1994 EHCI_PAGE_SIZE, &dma); 1995 #ifdef EHCI_DEBUG 1996 if (err) 1997 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1998 #endif 1999 if (err) 2000 return (NULL); 2001 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2002 offs = i * EHCI_SQH_SIZE; 2003 sqh = KERNADDR(&dma, offs); 2004 sqh->physaddr = DMAADDR(&dma, offs); 2005 sqh->next = sc->sc_freeqhs; 2006 sc->sc_freeqhs = sqh; 2007 } 2008 } 2009 sqh = sc->sc_freeqhs; 2010 sc->sc_freeqhs = sqh->next; 2011 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2012 sqh->next = NULL; 2013 return (sqh); 2014 } 2015 2016 void 2017 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2018 { 2019 sqh->next = sc->sc_freeqhs; 2020 sc->sc_freeqhs = sqh; 2021 } 2022 2023 ehci_soft_qtd_t * 2024 ehci_alloc_sqtd(ehci_softc_t *sc) 2025 { 2026 ehci_soft_qtd_t *sqtd; 2027 usbd_status err; 2028 int i, offs; 2029 usb_dma_t dma; 2030 int s; 2031 2032 if (sc->sc_freeqtds == NULL) { 2033 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2034 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2035 EHCI_PAGE_SIZE, &dma); 2036 #ifdef EHCI_DEBUG 2037 if (err) 2038 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2039 #endif 2040 if (err) 2041 return (NULL); 2042 s = splusb(); 2043 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2044 offs = i * EHCI_SQTD_SIZE; 2045 sqtd = KERNADDR(&dma, offs); 2046 sqtd->physaddr = DMAADDR(&dma, offs); 2047 sqtd->nextqtd = sc->sc_freeqtds; 2048 sc->sc_freeqtds = sqtd; 2049 } 2050 splx(s); 2051 } 2052 2053 s = splusb(); 2054 sqtd = sc->sc_freeqtds; 2055 sc->sc_freeqtds = sqtd->nextqtd; 2056 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2057 sqtd->nextqtd = NULL; 2058 sqtd->xfer = NULL; 2059 splx(s); 2060 2061 return (sqtd); 2062 } 2063 2064 void 2065 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2066 { 2067 int s; 2068 2069 s = splusb(); 2070 sqtd->nextqtd = sc->sc_freeqtds; 2071 sc->sc_freeqtds = sqtd; 2072 splx(s); 2073 } 2074 2075 usbd_status 2076 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2077 int alen, int rd, usbd_xfer_handle xfer, 2078 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2079 { 2080 ehci_soft_qtd_t *next, *cur; 2081 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2082 u_int32_t qtdstatus; 2083 int len, curlen; 2084 int i; 2085 usb_dma_t *dma = &xfer->dmabuf; 2086 2087 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2088 2089 len = alen; 2090 dataphys = DMAADDR(dma, 0); 2091 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2092 qtdstatus = htole32( 2093 EHCI_QTD_ACTIVE | 2094 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2095 EHCI_QTD_SET_CERR(3) 2096 /* IOC set below */ 2097 /* BYTES set below */ 2098 /* XXX Data toggle */ 2099 ); 2100 2101 cur = ehci_alloc_sqtd(sc); 2102 *sp = cur; 2103 if (cur == NULL) 2104 goto nomem; 2105 for (;;) { 2106 dataphyspage = EHCI_PAGE(dataphys); 2107 /* The EHCI hardware can handle at most 5 pages. */ 2108 if (dataphyslastpage - dataphyspage < 2109 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2110 /* we can handle it in this QTD */ 2111 curlen = len; 2112 } else { 2113 /* must use multiple TDs, fill as much as possible. */ 2114 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2115 EHCI_PAGE_OFFSET(dataphys); 2116 #ifdef DIAGNOSTIC 2117 if (curlen > len) { 2118 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2119 "len=0x%x offs=0x%x\n", curlen, len, 2120 EHCI_PAGE_OFFSET(dataphys)); 2121 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2122 dataphyslastpage, dataphyspage, 2123 dataphys); 2124 curlen = len; 2125 } 2126 #endif 2127 2128 /* XXX true for EHCI? */ 2129 /* the length must be a multiple of the max size */ 2130 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2131 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2132 "curlen=%d\n", curlen)); 2133 #ifdef DIAGNOSTIC 2134 if (curlen == 0) 2135 panic("ehci_alloc_std: curlen == 0"); 2136 #endif 2137 } 2138 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2139 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2140 dataphys, dataphyslastpage, 2141 len, curlen)); 2142 len -= curlen; 2143 2144 if (len != 0) { 2145 next = ehci_alloc_sqtd(sc); 2146 if (next == NULL) 2147 goto nomem; 2148 nextphys = next->physaddr; 2149 } else { 2150 next = NULL; 2151 nextphys = EHCI_NULL; 2152 } 2153 2154 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2155 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2156 if (i != 0) /* use offset only in first buffer */ 2157 a = EHCI_PAGE(a); 2158 cur->qtd.qtd_buffer[i] = htole32(a); 2159 #ifdef DIAGNOSTIC 2160 if (i >= EHCI_QTD_NBUFFERS) { 2161 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2162 goto nomem; 2163 } 2164 #endif 2165 } 2166 cur->nextqtd = next; 2167 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2168 cur->qtd.qtd_status = 2169 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2170 cur->xfer = xfer; 2171 cur->len = curlen; 2172 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2173 dataphys, dataphys + curlen)); 2174 if (len == 0) 2175 break; 2176 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2177 dataphys += curlen; 2178 cur = next; 2179 } 2180 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2181 *ep = cur; 2182 2183 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2184 *sp, *ep)); 2185 2186 return (USBD_NORMAL_COMPLETION); 2187 2188 nomem: 2189 /* XXX free chain */ 2190 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2191 return (USBD_NOMEM); 2192 } 2193 2194 Static void 2195 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2196 ehci_soft_qtd_t *sqtdend) 2197 { 2198 ehci_soft_qtd_t *p; 2199 int i; 2200 2201 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2202 sqtd, sqtdend)); 2203 2204 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2205 p = sqtd->nextqtd; 2206 ehci_free_sqtd(sc, sqtd); 2207 } 2208 } 2209 2210 /****************/ 2211 2212 /* 2213 * Close a reqular pipe. 2214 * Assumes that there are no pending transactions. 2215 */ 2216 void 2217 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2218 { 2219 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2220 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2221 ehci_soft_qh_t *sqh = epipe->sqh; 2222 int s; 2223 2224 s = splusb(); 2225 ehci_rem_qh(sc, sqh, head); 2226 splx(s); 2227 ehci_free_sqh(sc, epipe->sqh); 2228 } 2229 2230 /* 2231 * Abort a device request. 2232 * If this routine is called at splusb() it guarantees that the request 2233 * will be removed from the hardware scheduling and that the callback 2234 * for it will be called with USBD_CANCELLED status. 2235 * It's impossible to guarantee that the requested transfer will not 2236 * have happened since the hardware runs concurrently. 2237 * If the transaction has already happened we rely on the ordinary 2238 * interrupt processing to process it. 2239 * XXX This is most probably wrong. 2240 */ 2241 void 2242 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2243 { 2244 #define exfer EXFER(xfer) 2245 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2246 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2247 ehci_soft_qh_t *sqh = epipe->sqh; 2248 ehci_soft_qtd_t *sqtd; 2249 ehci_physaddr_t cur; 2250 u_int32_t qhstatus; 2251 int s; 2252 int hit; 2253 2254 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2255 2256 if (sc->sc_dying) { 2257 /* If we're dying, just do the software part. */ 2258 s = splusb(); 2259 xfer->status = status; /* make software ignore it */ 2260 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2261 usb_transfer_complete(xfer); 2262 splx(s); 2263 return; 2264 } 2265 2266 if (xfer->device->bus->intr_context || !curproc) 2267 panic("ehci_abort_xfer: not in process context"); 2268 2269 /* 2270 * Step 1: Make interrupt routine and hardware ignore xfer. 2271 */ 2272 s = splusb(); 2273 xfer->status = status; /* make software ignore it */ 2274 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2275 qhstatus = sqh->qh.qh_qtd.qtd_status; 2276 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2277 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2278 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2279 if (sqtd == exfer->sqtdend) 2280 break; 2281 } 2282 splx(s); 2283 2284 /* 2285 * Step 2: Wait until we know hardware has finished any possible 2286 * use of the xfer. Also make sure the soft interrupt routine 2287 * has run. 2288 */ 2289 ehci_sync_hc(sc); 2290 s = splusb(); 2291 sc->sc_softwake = 1; 2292 usb_schedsoftintr(&sc->sc_bus); 2293 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2294 splx(s); 2295 2296 /* 2297 * Step 3: Remove any vestiges of the xfer from the hardware. 2298 * The complication here is that the hardware may have executed 2299 * beyond the xfer we're trying to abort. So as we're scanning 2300 * the TDs of this xfer we check if the hardware points to 2301 * any of them. 2302 */ 2303 s = splusb(); /* XXX why? */ 2304 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2305 hit = 0; 2306 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2307 hit |= cur == sqtd->physaddr; 2308 if (sqtd == exfer->sqtdend) 2309 break; 2310 } 2311 sqtd = sqtd->nextqtd; 2312 /* Zap curqtd register if hardware pointed inside the xfer. */ 2313 if (hit && sqtd != NULL) { 2314 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2315 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2316 sqh->qh.qh_qtd.qtd_status = qhstatus; 2317 } else { 2318 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2319 } 2320 2321 /* 2322 * Step 4: Execute callback. 2323 */ 2324 #ifdef DIAGNOSTIC 2325 exfer->isdone = 1; 2326 #endif 2327 usb_transfer_complete(xfer); 2328 2329 splx(s); 2330 #undef exfer 2331 } 2332 2333 void 2334 ehci_timeout(void *addr) 2335 { 2336 struct ehci_xfer *exfer = addr; 2337 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2338 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2339 2340 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2341 #ifdef USB_DEBUG 2342 if (ehcidebug > 1) 2343 usbd_dump_pipe(exfer->xfer.pipe); 2344 #endif 2345 2346 if (sc->sc_dying) { 2347 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2348 return; 2349 } 2350 2351 /* Execute the abort in a process context. */ 2352 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2353 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2354 } 2355 2356 void 2357 ehci_timeout_task(void *addr) 2358 { 2359 usbd_xfer_handle xfer = addr; 2360 int s; 2361 2362 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2363 2364 s = splusb(); 2365 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2366 splx(s); 2367 } 2368 2369 /************************/ 2370 2371 Static usbd_status 2372 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2373 { 2374 usbd_status err; 2375 2376 /* Insert last in queue. */ 2377 err = usb_insert_transfer(xfer); 2378 if (err) 2379 return (err); 2380 2381 /* Pipe isn't running, start first */ 2382 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2383 } 2384 2385 Static usbd_status 2386 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2387 { 2388 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2389 usbd_status err; 2390 2391 if (sc->sc_dying) 2392 return (USBD_IOERROR); 2393 2394 #ifdef DIAGNOSTIC 2395 if (!(xfer->rqflags & URQ_REQUEST)) { 2396 /* XXX panic */ 2397 printf("ehci_device_ctrl_transfer: not a request\n"); 2398 return (USBD_INVAL); 2399 } 2400 #endif 2401 2402 err = ehci_device_request(xfer); 2403 if (err) 2404 return (err); 2405 2406 if (sc->sc_bus.use_polling) 2407 ehci_waitintr(sc, xfer); 2408 return (USBD_IN_PROGRESS); 2409 } 2410 2411 void 2412 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2413 { 2414 struct ehci_xfer *ex = EXFER(xfer); 2415 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2416 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2417 2418 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2419 2420 #ifdef DIAGNOSTIC 2421 if (!(xfer->rqflags & URQ_REQUEST)) { 2422 panic("ehci_ctrl_done: not a request"); 2423 } 2424 #endif 2425 2426 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2427 ehci_del_intr_list(ex); /* remove from active list */ 2428 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2429 } 2430 2431 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2432 } 2433 2434 /* Abort a device control request. */ 2435 Static void 2436 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2437 { 2438 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2439 ehci_abort_xfer(xfer, USBD_CANCELLED); 2440 } 2441 2442 /* Close a device control pipe. */ 2443 Static void 2444 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2445 { 2446 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2447 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2448 2449 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2450 ehci_close_pipe(pipe, sc->sc_async_head); 2451 } 2452 2453 usbd_status 2454 ehci_device_request(usbd_xfer_handle xfer) 2455 { 2456 #define exfer EXFER(xfer) 2457 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2458 usb_device_request_t *req = &xfer->request; 2459 usbd_device_handle dev = epipe->pipe.device; 2460 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2461 int addr = dev->address; 2462 ehci_soft_qtd_t *setup, *stat, *next; 2463 ehci_soft_qh_t *sqh; 2464 int isread; 2465 int len; 2466 usbd_status err; 2467 int s; 2468 2469 isread = req->bmRequestType & UT_READ; 2470 len = UGETW(req->wLength); 2471 2472 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2473 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2474 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2475 UGETW(req->wIndex), len, addr, 2476 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2477 2478 setup = ehci_alloc_sqtd(sc); 2479 if (setup == NULL) { 2480 err = USBD_NOMEM; 2481 goto bad1; 2482 } 2483 stat = ehci_alloc_sqtd(sc); 2484 if (stat == NULL) { 2485 err = USBD_NOMEM; 2486 goto bad2; 2487 } 2488 2489 sqh = epipe->sqh; 2490 epipe->u.ctl.length = len; 2491 2492 /* XXX 2493 * Since we're messing with the QH we must know the HC is in sync. 2494 * This needs to go away since it slows down control transfers. 2495 * Removing it entails: 2496 * - fill the QH only once with addr & wMaxPacketSize 2497 * - put the correct data toggles in the qtds and set DTC 2498 */ 2499 /* ehci_sync_hc(sc); */ 2500 /* Update device address and length since they may have changed. */ 2501 /* XXX This only needs to be done once, but it's too early in open. */ 2502 /* XXXX Should not touch ED here! */ 2503 sqh->qh.qh_endp = 2504 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2505 htole32( 2506 EHCI_QH_SET_ADDR(addr) | 2507 /* EHCI_QH_DTC | */ 2508 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2509 ); 2510 /* Clear toggle */ 2511 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2512 2513 /* Set up data transaction */ 2514 if (len != 0) { 2515 ehci_soft_qtd_t *end; 2516 2517 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2518 &next, &end); 2519 if (err) 2520 goto bad3; 2521 end->nextqtd = stat; 2522 end->qtd.qtd_next = 2523 end->qtd.qtd_altnext = htole32(stat->physaddr); 2524 /* Start toggle at 1. */ 2525 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2526 } else { 2527 next = stat; 2528 } 2529 2530 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2531 2532 setup->qtd.qtd_status = htole32( 2533 EHCI_QTD_ACTIVE | 2534 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2535 EHCI_QTD_SET_CERR(3) | 2536 EHCI_QTD_SET_BYTES(sizeof *req) 2537 ); 2538 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2539 setup->nextqtd = next; 2540 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2541 setup->xfer = xfer; 2542 setup->len = sizeof *req; 2543 2544 stat->qtd.qtd_status = htole32( 2545 EHCI_QTD_ACTIVE | 2546 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2547 EHCI_QTD_SET_CERR(3) | 2548 EHCI_QTD_IOC 2549 ); 2550 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2551 stat->nextqtd = NULL; 2552 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2553 stat->xfer = xfer; 2554 stat->len = 0; 2555 2556 #ifdef EHCI_DEBUG 2557 if (ehcidebug > 5) { 2558 DPRINTF(("ehci_device_request:\n")); 2559 ehci_dump_sqh(sqh); 2560 ehci_dump_sqtds(setup); 2561 } 2562 #endif 2563 2564 exfer->sqtdstart = setup; 2565 exfer->sqtdend = stat; 2566 #ifdef DIAGNOSTIC 2567 if (!exfer->isdone) { 2568 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2569 } 2570 exfer->isdone = 0; 2571 #endif 2572 2573 /* Insert qTD in QH list. */ 2574 s = splusb(); 2575 ehci_set_qh_qtd(sqh, setup); 2576 if (xfer->timeout && !sc->sc_bus.use_polling) { 2577 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2578 ehci_timeout, xfer); 2579 } 2580 ehci_add_intr_list(sc, exfer); 2581 xfer->status = USBD_IN_PROGRESS; 2582 splx(s); 2583 2584 #ifdef EHCI_DEBUG 2585 if (ehcidebug > 10) { 2586 DPRINTF(("ehci_device_request: status=%x\n", 2587 EOREAD4(sc, EHCI_USBSTS))); 2588 delay(10000); 2589 ehci_dump_regs(sc); 2590 ehci_dump_sqh(sc->sc_async_head); 2591 ehci_dump_sqh(sqh); 2592 ehci_dump_sqtds(setup); 2593 } 2594 #endif 2595 2596 return (USBD_NORMAL_COMPLETION); 2597 2598 bad3: 2599 ehci_free_sqtd(sc, stat); 2600 bad2: 2601 ehci_free_sqtd(sc, setup); 2602 bad1: 2603 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2604 xfer->status = err; 2605 usb_transfer_complete(xfer); 2606 return (err); 2607 #undef exfer 2608 } 2609 2610 /************************/ 2611 2612 Static usbd_status 2613 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2614 { 2615 usbd_status err; 2616 2617 /* Insert last in queue. */ 2618 err = usb_insert_transfer(xfer); 2619 if (err) 2620 return (err); 2621 2622 /* Pipe isn't running, start first */ 2623 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2624 } 2625 2626 usbd_status 2627 ehci_device_bulk_start(usbd_xfer_handle xfer) 2628 { 2629 #define exfer EXFER(xfer) 2630 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2631 usbd_device_handle dev = epipe->pipe.device; 2632 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2633 ehci_soft_qtd_t *data, *dataend; 2634 ehci_soft_qh_t *sqh; 2635 usbd_status err; 2636 int len, isread, endpt; 2637 int s; 2638 2639 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2640 xfer, xfer->length, xfer->flags)); 2641 2642 if (sc->sc_dying) 2643 return (USBD_IOERROR); 2644 2645 #ifdef DIAGNOSTIC 2646 if (xfer->rqflags & URQ_REQUEST) 2647 panic("ehci_device_bulk_transfer: a request"); 2648 #endif 2649 2650 len = xfer->length; 2651 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2652 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2653 sqh = epipe->sqh; 2654 2655 epipe->u.bulk.length = len; 2656 2657 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2658 &dataend); 2659 if (err) { 2660 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2661 xfer->status = err; 2662 usb_transfer_complete(xfer); 2663 return (err); 2664 } 2665 2666 #ifdef EHCI_DEBUG 2667 if (ehcidebug > 5) { 2668 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2669 ehci_dump_sqh(sqh); 2670 ehci_dump_sqtds(data); 2671 } 2672 #endif 2673 2674 /* Set up interrupt info. */ 2675 exfer->sqtdstart = data; 2676 exfer->sqtdend = dataend; 2677 #ifdef DIAGNOSTIC 2678 if (!exfer->isdone) { 2679 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2680 } 2681 exfer->isdone = 0; 2682 #endif 2683 2684 s = splusb(); 2685 ehci_set_qh_qtd(sqh, data); 2686 if (xfer->timeout && !sc->sc_bus.use_polling) { 2687 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2688 ehci_timeout, xfer); 2689 } 2690 ehci_add_intr_list(sc, exfer); 2691 xfer->status = USBD_IN_PROGRESS; 2692 splx(s); 2693 2694 #ifdef EHCI_DEBUG 2695 if (ehcidebug > 10) { 2696 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2697 delay(10000); 2698 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2699 ehci_dump_regs(sc); 2700 #if 0 2701 printf("async_head:\n"); 2702 ehci_dump_sqh(sc->sc_async_head); 2703 #endif 2704 printf("sqh:\n"); 2705 ehci_dump_sqh(sqh); 2706 ehci_dump_sqtds(data); 2707 } 2708 #endif 2709 2710 if (sc->sc_bus.use_polling) 2711 ehci_waitintr(sc, xfer); 2712 2713 return (USBD_IN_PROGRESS); 2714 #undef exfer 2715 } 2716 2717 Static void 2718 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2719 { 2720 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2721 ehci_abort_xfer(xfer, USBD_CANCELLED); 2722 } 2723 2724 /* 2725 * Close a device bulk pipe. 2726 */ 2727 Static void 2728 ehci_device_bulk_close(usbd_pipe_handle pipe) 2729 { 2730 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2731 2732 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2733 ehci_close_pipe(pipe, sc->sc_async_head); 2734 } 2735 2736 void 2737 ehci_device_bulk_done(usbd_xfer_handle xfer) 2738 { 2739 struct ehci_xfer *ex = EXFER(xfer); 2740 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2741 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2742 2743 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2744 xfer, xfer->actlen)); 2745 2746 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2747 ehci_del_intr_list(ex); /* remove from active list */ 2748 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2749 } 2750 2751 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2752 } 2753 2754 /************************/ 2755 2756 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2757 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2758 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2759 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2760 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2761 2762 /************************/ 2763 2764 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2765 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2766 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2767 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2768 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2769
Indexes created Tue Sep 23 02:09:52 GMT 2025