ehci.c revision 1.47.2.5
1 /* $NetBSD: ehci.c,v 1.47.2.5 2004/12/18 09:32:21 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.47.2.5 2004/12/18 09:32:21 skrll Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 u_int ncomp; 323 324 DPRINTF(("ehci_init: start\n")); 325 #ifdef EHCI_DEBUG 326 theehci = sc; 327 #endif 328 329 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 330 331 version = EREAD2(sc, EHCI_HCIVERSION); 332 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 333 version >> 8, version & 0xff); 334 335 sparams = EREAD4(sc, EHCI_HCSPARAMS); 336 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 337 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 338 ncomp = EHCI_HCS_N_CC(sparams); 339 if (ncomp != sc->sc_ncomp) { 340 aprint_error("%s: wrong number of companions (%d != %d)\n", 341 USBDEVNAME(sc->sc_bus.bdev), 342 ncomp, sc->sc_ncomp); 343 #if NOHCI == 0 || NUHCI == 0 344 aprint_error("%s: ohci or uhci probably not configured\n", 345 USBDEVNAME(sc->sc_bus.bdev)); 346 #endif 347 if (ncomp < sc->sc_ncomp) 348 sc->sc_ncomp = ncomp; 349 } 350 if (sc->sc_ncomp > 0) { 351 aprint_normal("%s: companion controller%s, %d port%s each:", 352 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 353 EHCI_HCS_N_PCC(sparams), 354 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 355 for (i = 0; i < sc->sc_ncomp; i++) 356 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 357 aprint_normal("\n"); 358 } 359 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 360 cparams = EREAD4(sc, EHCI_HCCPARAMS); 361 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 362 363 if (EHCI_HCC_64BIT(cparams)) { 364 /* MUST clear segment register if 64 bit capable. */ 365 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 366 } 367 368 sc->sc_bus.usbrev = USBREV_2_0; 369 370 /* Reset the controller */ 371 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 372 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 373 usb_delay_ms(&sc->sc_bus, 1); 374 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 375 for (i = 0; i < 100; i++) { 376 usb_delay_ms(&sc->sc_bus, 1); 377 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 378 if (!hcr) 379 break; 380 } 381 if (hcr) { 382 aprint_error("%s: reset timeout\n", 383 USBDEVNAME(sc->sc_bus.bdev)); 384 return (USBD_IOERROR); 385 } 386 387 /* XXX need proper intr scheduling */ 388 sc->sc_rand = 96; 389 390 /* frame list size at default, read back what we got and use that */ 391 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 392 case 0: sc->sc_flsize = 1024; break; 393 case 1: sc->sc_flsize = 512; break; 394 case 2: sc->sc_flsize = 256; break; 395 case 3: return (USBD_IOERROR); 396 } 397 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 398 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 399 if (err) 400 return (err); 401 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 402 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 403 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 404 405 /* Set up the bus struct. */ 406 sc->sc_bus.methods = &ehci_bus_methods; 407 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 408 409 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 410 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 411 412 sc->sc_eintrs = EHCI_NORMAL_INTRS; 413 414 /* 415 * Allocate the interrupt dummy QHs. These are arranged to give poll 416 * intervals that are powers of 2 times 1ms. 417 */ 418 for (i = 0; i < EHCI_INTRQHS; i++) { 419 sqh = ehci_alloc_sqh(sc); 420 if (sqh == NULL) { 421 err = USBD_NOMEM; 422 goto bad1; 423 } 424 sc->sc_islots[i].sqh = sqh; 425 } 426 for (i = 0; i < EHCI_INTRQHS; i++) { 427 sqh = sc->sc_islots[i].sqh; 428 if (i == 0) { 429 /* The last (1ms) QH terminates. */ 430 sqh->qh.qh_link = EHCI_NULL; 431 sqh->next = NULL; 432 } else { 433 /* Otherwise the next QH has half the poll interval */ 434 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 435 sqh->qh.qh_link = htole32(sqh->next->physaddr | 436 EHCI_LINK_QH); 437 } 438 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 439 sqh->qh.qh_link = EHCI_NULL; 440 sqh->qh.qh_curqtd = EHCI_NULL; 441 sqh->next = NULL; 442 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 443 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 444 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 445 sqh->sqtd = NULL; 446 } 447 /* Point the frame list at the last level (128ms). */ 448 for (i = 0; i < sc->sc_flsize; i++) { 449 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 450 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 451 i)].sqh->physaddr); 452 } 453 454 /* Allocate dummy QH that starts the async list. */ 455 sqh = ehci_alloc_sqh(sc); 456 if (sqh == NULL) { 457 err = USBD_NOMEM; 458 goto bad1; 459 } 460 /* Fill the QH */ 461 sqh->qh.qh_endp = 462 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 463 sqh->qh.qh_link = 464 htole32(sqh->physaddr | EHCI_LINK_QH); 465 sqh->qh.qh_curqtd = EHCI_NULL; 466 sqh->next = NULL; 467 /* Fill the overlay qTD */ 468 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 469 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 470 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 471 sqh->sqtd = NULL; 472 #ifdef EHCI_DEBUG 473 if (ehcidebug) { 474 ehci_dump_sqh(sqh); 475 } 476 #endif 477 478 /* Point to async list */ 479 sc->sc_async_head = sqh; 480 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 481 482 usb_callout_init(sc->sc_tmo_pcd); 483 484 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 485 486 /* Enable interrupts */ 487 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 488 489 /* Turn on controller */ 490 EOWRITE4(sc, EHCI_USBCMD, 491 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 492 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 493 EHCI_CMD_ASE | 494 EHCI_CMD_PSE | 495 EHCI_CMD_RS); 496 497 /* Take over port ownership */ 498 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 499 500 for (i = 0; i < 100; i++) { 501 usb_delay_ms(&sc->sc_bus, 1); 502 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 503 if (!hcr) 504 break; 505 } 506 if (hcr) { 507 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 508 return (USBD_IOERROR); 509 } 510 511 return (USBD_NORMAL_COMPLETION); 512 513 #if 0 514 bad2: 515 ehci_free_sqh(sc, sc->sc_async_head); 516 #endif 517 bad1: 518 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 519 return (err); 520 } 521 522 int 523 ehci_intr(void *v) 524 { 525 ehci_softc_t *sc = v; 526 527 if (sc == NULL || sc->sc_dying) 528 return (0); 529 530 /* If we get an interrupt while polling, then just ignore it. */ 531 if (sc->sc_bus.use_polling) { 532 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 533 534 if (intrs) 535 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 536 #ifdef DIAGNOSTIC 537 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 538 #endif 539 return (0); 540 } 541 542 return (ehci_intr1(sc)); 543 } 544 545 Static int 546 ehci_intr1(ehci_softc_t *sc) 547 { 548 u_int32_t intrs, eintrs; 549 550 DPRINTFN(20,("ehci_intr1: enter\n")); 551 552 /* In case the interrupt occurs before initialization has completed. */ 553 if (sc == NULL) { 554 #ifdef DIAGNOSTIC 555 printf("ehci_intr1: sc == NULL\n"); 556 #endif 557 return (0); 558 } 559 560 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 561 if (!intrs) 562 return (0); 563 564 eintrs = intrs & sc->sc_eintrs; 565 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 566 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 567 (u_int)eintrs)); 568 if (!eintrs) 569 return (0); 570 571 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 572 sc->sc_bus.intr_context++; 573 sc->sc_bus.no_intrs++; 574 if (eintrs & EHCI_STS_IAA) { 575 DPRINTF(("ehci_intr1: door bell\n")); 576 wakeup(&sc->sc_async_head); 577 eintrs &= ~EHCI_STS_IAA; 578 } 579 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 580 DPRINTFN(5,("ehci_intr1: %s %s\n", 581 eintrs & EHCI_STS_INT ? "INT" : "", 582 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 583 usb_schedsoftintr(&sc->sc_bus); 584 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 585 } 586 if (eintrs & EHCI_STS_HSE) { 587 printf("%s: unrecoverable error, controller halted\n", 588 USBDEVNAME(sc->sc_bus.bdev)); 589 /* XXX what else */ 590 } 591 if (eintrs & EHCI_STS_PCD) { 592 ehci_pcd(sc, sc->sc_intrxfer); 593 /* 594 * Disable PCD interrupt for now, because it will be 595 * on until the port has been reset. 596 */ 597 ehci_pcd_able(sc, 0); 598 /* Do not allow RHSC interrupts > 1 per second */ 599 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 600 eintrs &= ~EHCI_STS_PCD; 601 } 602 603 sc->sc_bus.intr_context--; 604 605 if (eintrs != 0) { 606 /* Block unprocessed interrupts. */ 607 sc->sc_eintrs &= ~eintrs; 608 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 609 printf("%s: blocking intrs 0x%x\n", 610 USBDEVNAME(sc->sc_bus.bdev), eintrs); 611 } 612 613 return (1); 614 } 615 616 void 617 ehci_pcd_able(ehci_softc_t *sc, int on) 618 { 619 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 620 if (on) 621 sc->sc_eintrs |= EHCI_STS_PCD; 622 else 623 sc->sc_eintrs &= ~EHCI_STS_PCD; 624 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 625 } 626 627 void 628 ehci_pcd_enable(void *v_sc) 629 { 630 ehci_softc_t *sc = v_sc; 631 632 ehci_pcd_able(sc, 1); 633 } 634 635 void 636 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 637 { 638 usbd_pipe_handle pipe; 639 u_char *p; 640 int i, m; 641 642 if (xfer == NULL) { 643 /* Just ignore the change. */ 644 return; 645 } 646 647 pipe = xfer->pipe; 648 649 p = KERNADDR(&xfer->dmabuf, 0); 650 m = min(sc->sc_noport, xfer->length * 8 - 1); 651 memset(p, 0, xfer->length); 652 for (i = 1; i <= m; i++) { 653 /* Pick out CHANGE bits from the status reg. */ 654 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 655 p[i/8] |= 1 << (i%8); 656 } 657 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 658 xfer->actlen = xfer->length; 659 xfer->status = USBD_NORMAL_COMPLETION; 660 661 usb_transfer_complete(xfer); 662 } 663 664 void 665 ehci_softintr(void *v) 666 { 667 ehci_softc_t *sc = v; 668 struct ehci_xfer *ex, *nextex; 669 670 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 671 sc->sc_bus.intr_context)); 672 673 sc->sc_bus.intr_context++; 674 675 /* 676 * The only explanation I can think of for why EHCI is as brain dead 677 * as UHCI interrupt-wise is that Intel was involved in both. 678 * An interrupt just tells us that something is done, we have no 679 * clue what, so we need to scan through all active transfers. :-( 680 */ 681 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 682 nextex = LIST_NEXT(ex, inext); 683 ehci_check_intr(sc, ex); 684 } 685 686 #ifdef USB_USE_SOFTINTR 687 if (sc->sc_softwake) { 688 sc->sc_softwake = 0; 689 wakeup(&sc->sc_softwake); 690 } 691 #endif /* USB_USE_SOFTINTR */ 692 693 sc->sc_bus.intr_context--; 694 } 695 696 /* Check for an interrupt. */ 697 void 698 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 699 { 700 ehci_soft_qtd_t *sqtd, *lsqtd; 701 u_int32_t status; 702 703 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 704 705 if (ex->sqtdstart == NULL) { 706 printf("ehci_check_intr: sqtdstart=NULL\n"); 707 return; 708 } 709 lsqtd = ex->sqtdend; 710 #ifdef DIAGNOSTIC 711 if (lsqtd == NULL) { 712 printf("ehci_check_intr: lsqtd==0\n"); 713 return; 714 } 715 #endif 716 /* 717 * If the last TD is still active we need to check whether there 718 * is a an error somewhere in the middle, or whether there was a 719 * short packet (SPD and not ACTIVE). 720 */ 721 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 722 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 723 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 724 status = le32toh(sqtd->qtd.qtd_status); 725 /* If there's an active QTD the xfer isn't done. */ 726 if (status & EHCI_QTD_ACTIVE) 727 break; 728 /* Any kind of error makes the xfer done. */ 729 if (status & EHCI_QTD_HALTED) 730 goto done; 731 /* We want short packets, and it is short: it's done */ 732 if (EHCI_QTD_GET_BYTES(status) != 0) 733 goto done; 734 } 735 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 736 ex, ex->sqtdstart)); 737 return; 738 } 739 done: 740 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 741 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 742 ehci_idone(ex); 743 } 744 745 void 746 ehci_idone(struct ehci_xfer *ex) 747 { 748 usbd_xfer_handle xfer = &ex->xfer; 749 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 750 ehci_soft_qtd_t *sqtd, *lsqtd; 751 u_int32_t status = 0, nstatus = 0; 752 int actlen; 753 uint pkts_left; 754 755 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 756 #ifdef DIAGNOSTIC 757 { 758 int s = splhigh(); 759 if (ex->isdone) { 760 splx(s); 761 #ifdef EHCI_DEBUG 762 printf("ehci_idone: ex is done!\n "); 763 ehci_dump_exfer(ex); 764 #else 765 printf("ehci_idone: ex=%p is done!\n", ex); 766 #endif 767 return; 768 } 769 ex->isdone = 1; 770 splx(s); 771 } 772 #endif 773 774 if (xfer->status == USBD_CANCELLED || 775 xfer->status == USBD_TIMEOUT) { 776 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 777 return; 778 } 779 780 #ifdef EHCI_DEBUG 781 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 782 if (ehcidebug > 10) 783 ehci_dump_sqtds(ex->sqtdstart); 784 #endif 785 786 /* The transfer is done, compute actual length and status. */ 787 lsqtd = ex->sqtdend; 788 actlen = 0; 789 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 790 nstatus = le32toh(sqtd->qtd.qtd_status); 791 if (nstatus & EHCI_QTD_ACTIVE) 792 break; 793 794 status = nstatus; 795 /* halt is ok if descriptor is last, and complete */ 796 if (sqtd->qtd.qtd_next == EHCI_NULL && 797 EHCI_QTD_GET_BYTES(status) == 0) 798 status &= ~EHCI_QTD_HALTED; 799 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 800 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 801 } 802 803 /* 804 * If there are left over TDs we need to update the toggle. 805 * The default pipe doesn't need it since control transfers 806 * start the toggle at 0 every time. 807 */ 808 if (sqtd != lsqtd->nextqtd && 809 xfer->pipe->device->default_pipe != xfer->pipe) { 810 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 811 #if 0 812 ehci_dump_sqh(epipe->sqh); 813 ehci_dump_sqtds(ex->sqtdstart); 814 #endif 815 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 816 } 817 818 /* 819 * For a short transfer we need to update the toggle for the missing 820 * packets within the qTD. 821 */ 822 pkts_left = EHCI_QTD_GET_BYTES(status) / 823 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 824 epipe->nexttoggle ^= pkts_left % 2; 825 826 status &= EHCI_QTD_STATERRS; 827 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 828 xfer->length, actlen, status)); 829 xfer->actlen = actlen; 830 if (status != 0) { 831 #ifdef EHCI_DEBUG 832 char sbuf[128]; 833 834 bitmask_snprintf((u_int32_t)status, 835 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 836 "\3MISSED", sbuf, sizeof(sbuf)); 837 838 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 839 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 840 "status 0x%s\n", 841 xfer->pipe->device->address, 842 xfer->pipe->endpoint->edesc->bEndpointAddress, 843 sbuf)); 844 if (ehcidebug > 2) { 845 ehci_dump_sqh(epipe->sqh); 846 ehci_dump_sqtds(ex->sqtdstart); 847 } 848 #endif 849 if (status == EHCI_QTD_HALTED) 850 xfer->status = USBD_STALLED; 851 else 852 xfer->status = USBD_IOERROR; /* more info XXX */ 853 } else { 854 xfer->status = USBD_NORMAL_COMPLETION; 855 } 856 857 usb_transfer_complete(xfer); 858 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 859 } 860 861 /* 862 * Wait here until controller claims to have an interrupt. 863 * Then call ehci_intr and return. Use timeout to avoid waiting 864 * too long. 865 */ 866 void 867 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 868 { 869 int timo = xfer->timeout; 870 int usecs; 871 u_int32_t intrs; 872 873 xfer->status = USBD_IN_PROGRESS; 874 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 875 usb_delay_ms(&sc->sc_bus, 1); 876 if (sc->sc_dying) 877 break; 878 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 879 sc->sc_eintrs; 880 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 881 #ifdef EHCI_DEBUG 882 if (ehcidebug > 15) 883 ehci_dump_regs(sc); 884 #endif 885 if (intrs) { 886 ehci_intr1(sc); 887 if (xfer->status != USBD_IN_PROGRESS) 888 return; 889 } 890 } 891 892 /* Timeout */ 893 DPRINTF(("ehci_waitintr: timeout\n")); 894 xfer->status = USBD_TIMEOUT; 895 usb_transfer_complete(xfer); 896 /* XXX should free TD */ 897 } 898 899 void 900 ehci_poll(struct usbd_bus *bus) 901 { 902 ehci_softc_t *sc = (ehci_softc_t *)bus; 903 #ifdef EHCI_DEBUG 904 static int last; 905 int new; 906 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 907 if (new != last) { 908 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 909 last = new; 910 } 911 #endif 912 913 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 914 ehci_intr1(sc); 915 } 916 917 int 918 ehci_detach(struct ehci_softc *sc, int flags) 919 { 920 int rv = 0; 921 922 if (sc->sc_child != NULL) 923 rv = config_detach(sc->sc_child, flags); 924 925 if (rv != 0) 926 return (rv); 927 928 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 929 930 if (sc->sc_powerhook != NULL) 931 powerhook_disestablish(sc->sc_powerhook); 932 if (sc->sc_shutdownhook != NULL) 933 shutdownhook_disestablish(sc->sc_shutdownhook); 934 935 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 936 937 /* XXX free other data structures XXX */ 938 939 return (rv); 940 } 941 942 943 int 944 ehci_activate(device_ptr_t self, enum devact act) 945 { 946 struct ehci_softc *sc = (struct ehci_softc *)self; 947 int rv = 0; 948 949 switch (act) { 950 case DVACT_ACTIVATE: 951 return (EOPNOTSUPP); 952 953 case DVACT_DEACTIVATE: 954 if (sc->sc_child != NULL) 955 rv = config_deactivate(sc->sc_child); 956 sc->sc_dying = 1; 957 break; 958 } 959 return (rv); 960 } 961 962 /* 963 * Handle suspend/resume. 964 * 965 * We need to switch to polling mode here, because this routine is 966 * called from an interrupt context. This is all right since we 967 * are almost suspended anyway. 968 */ 969 void 970 ehci_power(int why, void *v) 971 { 972 ehci_softc_t *sc = v; 973 u_int32_t cmd, hcr; 974 int s, i; 975 976 #ifdef EHCI_DEBUG 977 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 978 if (ehcidebug > 0) 979 ehci_dump_regs(sc); 980 #endif 981 982 s = splhardusb(); 983 switch (why) { 984 case PWR_SUSPEND: 985 case PWR_STANDBY: 986 sc->sc_bus.use_polling++; 987 988 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 989 990 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 991 EOWRITE4(sc, EHCI_USBCMD, cmd); 992 993 for (i = 0; i < 100; i++) { 994 hcr = EOREAD4(sc, EHCI_USBSTS) & 995 (EHCI_STS_ASS | EHCI_STS_PSS); 996 if (hcr == 0) 997 break; 998 999 usb_delay_ms(&sc->sc_bus, 1); 1000 } 1001 if (hcr != 0) { 1002 printf("%s: reset timeout\n", 1003 USBDEVNAME(sc->sc_bus.bdev)); 1004 } 1005 1006 cmd &= ~EHCI_CMD_RS; 1007 EOWRITE4(sc, EHCI_USBCMD, cmd); 1008 1009 for (i = 0; i < 100; i++) { 1010 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1011 if (hcr == EHCI_STS_HCH) 1012 break; 1013 1014 usb_delay_ms(&sc->sc_bus, 1); 1015 } 1016 if (hcr != EHCI_STS_HCH) { 1017 printf("%s: config timeout\n", 1018 USBDEVNAME(sc->sc_bus.bdev)); 1019 } 1020 1021 sc->sc_bus.use_polling--; 1022 break; 1023 1024 case PWR_RESUME: 1025 sc->sc_bus.use_polling++; 1026 1027 /* restore things in case the bios sucks */ 1028 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1029 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1030 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1031 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1032 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1033 1034 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1035 1036 for (i = 0; i < 100; i++) { 1037 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1038 if (hcr != EHCI_STS_HCH) 1039 break; 1040 1041 usb_delay_ms(&sc->sc_bus, 1); 1042 } 1043 if (hcr == EHCI_STS_HCH) { 1044 printf("%s: config timeout\n", 1045 USBDEVNAME(sc->sc_bus.bdev)); 1046 } 1047 1048 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1049 1050 sc->sc_bus.use_polling--; 1051 break; 1052 case PWR_SOFTSUSPEND: 1053 case PWR_SOFTSTANDBY: 1054 case PWR_SOFTRESUME: 1055 break; 1056 } 1057 splx(s); 1058 1059 #ifdef EHCI_DEBUG 1060 DPRINTF(("ehci_power: sc=%p\n", sc)); 1061 if (ehcidebug > 0) 1062 ehci_dump_regs(sc); 1063 #endif 1064 } 1065 1066 /* 1067 * Shut down the controller when the system is going down. 1068 */ 1069 void 1070 ehci_shutdown(void *v) 1071 { 1072 ehci_softc_t *sc = v; 1073 1074 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1075 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1076 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1077 } 1078 1079 usbd_status 1080 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1081 { 1082 struct ehci_softc *sc = (struct ehci_softc *)bus; 1083 usbd_status err; 1084 1085 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1086 #ifdef EHCI_DEBUG 1087 if (err) 1088 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1089 #endif 1090 return (err); 1091 } 1092 1093 void 1094 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1095 { 1096 struct ehci_softc *sc = (struct ehci_softc *)bus; 1097 1098 usb_freemem(&sc->sc_bus, dma); 1099 } 1100 1101 usbd_xfer_handle 1102 ehci_allocx(struct usbd_bus *bus) 1103 { 1104 struct ehci_softc *sc = (struct ehci_softc *)bus; 1105 usbd_xfer_handle xfer; 1106 1107 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1108 if (xfer != NULL) { 1109 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1110 #ifdef DIAGNOSTIC 1111 if (xfer->busy_free != XFER_FREE) { 1112 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1113 xfer->busy_free); 1114 } 1115 #endif 1116 } else { 1117 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1118 } 1119 if (xfer != NULL) { 1120 memset(xfer, 0, sizeof(struct ehci_xfer)); 1121 #ifdef DIAGNOSTIC 1122 EXFER(xfer)->isdone = 1; 1123 xfer->busy_free = XFER_BUSY; 1124 #endif 1125 } 1126 return (xfer); 1127 } 1128 1129 void 1130 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1131 { 1132 struct ehci_softc *sc = (struct ehci_softc *)bus; 1133 1134 #ifdef DIAGNOSTIC 1135 if (xfer->busy_free != XFER_BUSY) { 1136 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1137 xfer->busy_free); 1138 return; 1139 } 1140 xfer->busy_free = XFER_FREE; 1141 if (!EXFER(xfer)->isdone) { 1142 printf("ehci_freex: !isdone\n"); 1143 return; 1144 } 1145 #endif 1146 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1147 } 1148 1149 Static void 1150 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1151 { 1152 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1153 1154 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1155 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1156 #ifdef USB_DEBUG 1157 if (ehcidebug) 1158 usbd_dump_pipe(pipe); 1159 #endif 1160 epipe->nexttoggle = 0; 1161 } 1162 1163 Static void 1164 ehci_noop(usbd_pipe_handle pipe) 1165 { 1166 } 1167 1168 #ifdef EHCI_DEBUG 1169 void 1170 ehci_dump_regs(ehci_softc_t *sc) 1171 { 1172 int i; 1173 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1174 EOREAD4(sc, EHCI_USBCMD), 1175 EOREAD4(sc, EHCI_USBSTS), 1176 EOREAD4(sc, EHCI_USBINTR)); 1177 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1178 EOREAD4(sc, EHCI_FRINDEX), 1179 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1180 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1181 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1182 for (i = 1; i <= sc->sc_noport; i++) 1183 printf("port %d status=0x%08x\n", i, 1184 EOREAD4(sc, EHCI_PORTSC(i))); 1185 } 1186 1187 /* 1188 * Unused function - this is meant to be called from a kernel 1189 * debugger. 1190 */ 1191 void 1192 ehci_dump() 1193 { 1194 ehci_dump_regs(theehci); 1195 } 1196 1197 void 1198 ehci_dump_link(ehci_link_t link, int type) 1199 { 1200 link = le32toh(link); 1201 printf("0x%08x", link); 1202 if (link & EHCI_LINK_TERMINATE) 1203 printf("<T>"); 1204 else { 1205 printf("<"); 1206 if (type) { 1207 switch (EHCI_LINK_TYPE(link)) { 1208 case EHCI_LINK_ITD: printf("ITD"); break; 1209 case EHCI_LINK_QH: printf("QH"); break; 1210 case EHCI_LINK_SITD: printf("SITD"); break; 1211 case EHCI_LINK_FSTN: printf("FSTN"); break; 1212 } 1213 } 1214 printf(">"); 1215 } 1216 } 1217 1218 void 1219 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1220 { 1221 int i; 1222 u_int32_t stop; 1223 1224 stop = 0; 1225 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1226 ehci_dump_sqtd(sqtd); 1227 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1228 } 1229 if (sqtd) 1230 printf("dump aborted, too many TDs\n"); 1231 } 1232 1233 void 1234 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1235 { 1236 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1237 ehci_dump_qtd(&sqtd->qtd); 1238 } 1239 1240 void 1241 ehci_dump_qtd(ehci_qtd_t *qtd) 1242 { 1243 u_int32_t s; 1244 char sbuf[128]; 1245 1246 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1247 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1248 printf("\n"); 1249 s = le32toh(qtd->qtd_status); 1250 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1251 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1252 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1253 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1254 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1255 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1256 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1257 EHCI_QTD_GET_PID(s), sbuf); 1258 for (s = 0; s < 5; s++) 1259 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1260 } 1261 1262 void 1263 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1264 { 1265 ehci_qh_t *qh = &sqh->qh; 1266 u_int32_t endp, endphub; 1267 1268 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1269 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1270 endp = le32toh(qh->qh_endp); 1271 printf(" endp=0x%08x\n", endp); 1272 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1273 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1274 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1275 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1276 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1277 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1278 EHCI_QH_GET_NRL(endp)); 1279 endphub = le32toh(qh->qh_endphub); 1280 printf(" endphub=0x%08x\n", endphub); 1281 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1282 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1283 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1284 EHCI_QH_GET_MULT(endphub)); 1285 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1286 printf("Overlay qTD:\n"); 1287 ehci_dump_qtd(&qh->qh_qtd); 1288 } 1289 1290 #ifdef DIAGNOSTIC 1291 Static void 1292 ehci_dump_exfer(struct ehci_xfer *ex) 1293 { 1294 printf("ehci_dump_exfer: ex=%p\n", ex); 1295 } 1296 #endif 1297 #endif 1298 1299 usbd_status 1300 ehci_open(usbd_pipe_handle pipe) 1301 { 1302 usbd_device_handle dev = pipe->device; 1303 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1304 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1305 u_int8_t addr = dev->address; 1306 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1307 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1308 ehci_soft_qh_t *sqh; 1309 usbd_status err; 1310 int s; 1311 int ival, speed, naks; 1312 int hshubaddr, hshubport; 1313 1314 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1315 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1316 1317 if (dev->myhsport) { 1318 hshubaddr = dev->myhsport->parent->address; 1319 hshubport = dev->myhsport->portno; 1320 } else { 1321 hshubaddr = 0; 1322 hshubport = 0; 1323 } 1324 1325 if (sc->sc_dying) 1326 return (USBD_IOERROR); 1327 1328 epipe->nexttoggle = 0; 1329 1330 if (addr == sc->sc_addr) { 1331 switch (ed->bEndpointAddress) { 1332 case USB_CONTROL_ENDPOINT: 1333 pipe->methods = &ehci_root_ctrl_methods; 1334 break; 1335 case UE_DIR_IN | EHCI_INTR_ENDPT: 1336 pipe->methods = &ehci_root_intr_methods; 1337 break; 1338 default: 1339 return (USBD_INVAL); 1340 } 1341 return (USBD_NORMAL_COMPLETION); 1342 } 1343 1344 /* XXX All this stuff is only valid for async. */ 1345 switch (dev->speed) { 1346 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1347 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1348 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1349 default: panic("ehci_open: bad device speed %d", dev->speed); 1350 } 1351 if (speed != EHCI_QH_SPEED_HIGH) { 1352 printf("%s: *** WARNING: opening low/full speed device, this " 1353 "does not work yet.\n", 1354 USBDEVNAME(sc->sc_bus.bdev)); 1355 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1356 hshubaddr, hshubport)); 1357 if (xfertype != UE_CONTROL) 1358 return USBD_INVAL; 1359 } 1360 1361 naks = 8; /* XXX */ 1362 sqh = ehci_alloc_sqh(sc); 1363 if (sqh == NULL) 1364 goto bad0; 1365 /* qh_link filled when the QH is added */ 1366 sqh->qh.qh_endp = htole32( 1367 EHCI_QH_SET_ADDR(addr) | 1368 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1369 EHCI_QH_SET_EPS(speed) | 1370 EHCI_QH_DTC | 1371 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1372 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1373 EHCI_QH_CTL : 0) | 1374 EHCI_QH_SET_NRL(naks) 1375 ); 1376 sqh->qh.qh_endphub = htole32( 1377 EHCI_QH_SET_MULT(1) | 1378 EHCI_QH_SET_HUBA(hshubaddr) | 1379 EHCI_QH_SET_PORT(hshubport) | 1380 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1381 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1382 ); 1383 sqh->qh.qh_curqtd = EHCI_NULL; 1384 /* Fill the overlay qTD */ 1385 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1386 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1387 sqh->qh.qh_qtd.qtd_status = htole32(0); 1388 1389 epipe->sqh = sqh; 1390 1391 switch (xfertype) { 1392 case UE_CONTROL: 1393 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1394 0, &epipe->u.ctl.reqdma); 1395 #ifdef EHCI_DEBUG 1396 if (err) 1397 printf("ehci_open: usb_allocmem()=%d\n", err); 1398 #endif 1399 if (err) 1400 goto bad1; 1401 pipe->methods = &ehci_device_ctrl_methods; 1402 s = splusb(); 1403 ehci_add_qh(sqh, sc->sc_async_head); 1404 splx(s); 1405 break; 1406 case UE_BULK: 1407 pipe->methods = &ehci_device_bulk_methods; 1408 s = splusb(); 1409 ehci_add_qh(sqh, sc->sc_async_head); 1410 splx(s); 1411 break; 1412 case UE_INTERRUPT: 1413 pipe->methods = &ehci_device_intr_methods; 1414 ival = pipe->interval; 1415 if (ival == USBD_DEFAULT_INTERVAL) 1416 ival = ed->bInterval; 1417 return (ehci_device_setintr(sc, sqh, ival)); 1418 case UE_ISOCHRONOUS: 1419 pipe->methods = &ehci_device_isoc_methods; 1420 return (USBD_INVAL); 1421 default: 1422 return (USBD_INVAL); 1423 } 1424 return (USBD_NORMAL_COMPLETION); 1425 1426 bad1: 1427 ehci_free_sqh(sc, sqh); 1428 bad0: 1429 return (USBD_NOMEM); 1430 } 1431 1432 /* 1433 * Add an ED to the schedule. Called at splusb(). 1434 */ 1435 void 1436 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1437 { 1438 SPLUSBCHECK; 1439 1440 sqh->next = head->next; 1441 sqh->qh.qh_link = head->qh.qh_link; 1442 head->next = sqh; 1443 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1444 1445 #ifdef EHCI_DEBUG 1446 if (ehcidebug > 5) { 1447 printf("ehci_add_qh:\n"); 1448 ehci_dump_sqh(sqh); 1449 } 1450 #endif 1451 } 1452 1453 /* 1454 * Remove an ED from the schedule. Called at splusb(). 1455 */ 1456 void 1457 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1458 { 1459 ehci_soft_qh_t *p; 1460 1461 SPLUSBCHECK; 1462 /* XXX */ 1463 for (p = head; p != NULL && p->next != sqh; p = p->next) 1464 ; 1465 if (p == NULL) 1466 panic("ehci_rem_qh: ED not found"); 1467 p->next = sqh->next; 1468 p->qh.qh_link = sqh->qh.qh_link; 1469 1470 ehci_sync_hc(sc); 1471 } 1472 1473 void 1474 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1475 { 1476 int i; 1477 u_int32_t status; 1478 1479 /* Save toggle bit and ping status. */ 1480 status = sqh->qh.qh_qtd.qtd_status & 1481 htole32(EHCI_QTD_TOGGLE_MASK | 1482 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1483 /* Set HALTED to make hw leave it alone. */ 1484 sqh->qh.qh_qtd.qtd_status = 1485 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1486 sqh->qh.qh_curqtd = 0; 1487 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1488 sqh->qh.qh_qtd.qtd_altnext = 0; 1489 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1490 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1491 sqh->sqtd = sqtd; 1492 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1493 sqh->qh.qh_qtd.qtd_status = status; 1494 } 1495 1496 /* 1497 * Ensure that the HC has released all references to the QH. We do this 1498 * by asking for a Async Advance Doorbell interrupt and then we wait for 1499 * the interrupt. 1500 * To make this easier we first obtain exclusive use of the doorbell. 1501 */ 1502 void 1503 ehci_sync_hc(ehci_softc_t *sc) 1504 { 1505 int s, error; 1506 1507 if (sc->sc_dying) { 1508 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1509 return; 1510 } 1511 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1512 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1513 s = splhardusb(); 1514 /* ask for doorbell */ 1515 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1516 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1517 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1518 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1519 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1520 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1521 splx(s); 1522 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1523 #ifdef DIAGNOSTIC 1524 if (error) 1525 printf("ehci_sync_hc: tsleep() = %d\n", error); 1526 #endif 1527 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1528 } 1529 1530 /***********/ 1531 1532 /* 1533 * Data structures and routines to emulate the root hub. 1534 */ 1535 Static usb_device_descriptor_t ehci_devd = { 1536 USB_DEVICE_DESCRIPTOR_SIZE, 1537 UDESC_DEVICE, /* type */ 1538 {0x00, 0x02}, /* USB version */ 1539 UDCLASS_HUB, /* class */ 1540 UDSUBCLASS_HUB, /* subclass */ 1541 UDPROTO_HSHUBSTT, /* protocol */ 1542 64, /* max packet */ 1543 {0},{0},{0x00,0x01}, /* device id */ 1544 1,2,0, /* string indicies */ 1545 1 /* # of configurations */ 1546 }; 1547 1548 Static usb_device_qualifier_t ehci_odevd = { 1549 USB_DEVICE_DESCRIPTOR_SIZE, 1550 UDESC_DEVICE_QUALIFIER, /* type */ 1551 {0x00, 0x02}, /* USB version */ 1552 UDCLASS_HUB, /* class */ 1553 UDSUBCLASS_HUB, /* subclass */ 1554 UDPROTO_FSHUB, /* protocol */ 1555 64, /* max packet */ 1556 1, /* # of configurations */ 1557 0 1558 }; 1559 1560 Static usb_config_descriptor_t ehci_confd = { 1561 USB_CONFIG_DESCRIPTOR_SIZE, 1562 UDESC_CONFIG, 1563 {USB_CONFIG_DESCRIPTOR_SIZE + 1564 USB_INTERFACE_DESCRIPTOR_SIZE + 1565 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1566 1, 1567 1, 1568 0, 1569 UC_SELF_POWERED, 1570 0 /* max power */ 1571 }; 1572 1573 Static usb_interface_descriptor_t ehci_ifcd = { 1574 USB_INTERFACE_DESCRIPTOR_SIZE, 1575 UDESC_INTERFACE, 1576 0, 1577 0, 1578 1, 1579 UICLASS_HUB, 1580 UISUBCLASS_HUB, 1581 UIPROTO_HSHUBSTT, 1582 0 1583 }; 1584 1585 Static usb_endpoint_descriptor_t ehci_endpd = { 1586 USB_ENDPOINT_DESCRIPTOR_SIZE, 1587 UDESC_ENDPOINT, 1588 UE_DIR_IN | EHCI_INTR_ENDPT, 1589 UE_INTERRUPT, 1590 {8, 0}, /* max packet */ 1591 255 1592 }; 1593 1594 Static usb_hub_descriptor_t ehci_hubd = { 1595 USB_HUB_DESCRIPTOR_SIZE, 1596 UDESC_HUB, 1597 0, 1598 {0,0}, 1599 0, 1600 0, 1601 {0}, 1602 }; 1603 1604 Static int 1605 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1606 { 1607 int i; 1608 1609 if (l == 0) 1610 return (0); 1611 p->bLength = 2 * strlen(s) + 2; 1612 if (l == 1) 1613 return (1); 1614 p->bDescriptorType = UDESC_STRING; 1615 l -= 2; 1616 for (i = 0; s[i] && l > 1; i++, l -= 2) 1617 USETW2(p->bString[i], 0, s[i]); 1618 return (2*i+2); 1619 } 1620 1621 /* 1622 * Simulate a hardware hub by handling all the necessary requests. 1623 */ 1624 Static usbd_status 1625 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1626 { 1627 usbd_status err; 1628 1629 /* Insert last in queue. */ 1630 err = usb_insert_transfer(xfer); 1631 if (err) 1632 return (err); 1633 1634 /* Pipe isn't running, start first */ 1635 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1636 } 1637 1638 Static usbd_status 1639 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1640 { 1641 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1642 usb_device_request_t *req; 1643 void *buf = NULL; 1644 int port, i; 1645 int s, len, value, index, l, totlen = 0; 1646 usb_port_status_t ps; 1647 usb_hub_descriptor_t hubd; 1648 usbd_status err; 1649 u_int32_t v; 1650 1651 if (sc->sc_dying) 1652 return (USBD_IOERROR); 1653 1654 #ifdef DIAGNOSTIC 1655 if (!(xfer->rqflags & URQ_REQUEST)) 1656 /* XXX panic */ 1657 return (USBD_INVAL); 1658 #endif 1659 req = &xfer->request; 1660 1661 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1662 req->bmRequestType, req->bRequest)); 1663 1664 len = UGETW(req->wLength); 1665 value = UGETW(req->wValue); 1666 index = UGETW(req->wIndex); 1667 1668 if (len != 0) 1669 buf = KERNADDR(&xfer->dmabuf, 0); 1670 1671 #define C(x,y) ((x) | ((y) << 8)) 1672 switch(C(req->bRequest, req->bmRequestType)) { 1673 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1674 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1675 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1676 /* 1677 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1678 * for the integrated root hub. 1679 */ 1680 break; 1681 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1682 if (len > 0) { 1683 *(u_int8_t *)buf = sc->sc_conf; 1684 totlen = 1; 1685 } 1686 break; 1687 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1688 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1689 switch(value >> 8) { 1690 case UDESC_DEVICE: 1691 if ((value & 0xff) != 0) { 1692 err = USBD_IOERROR; 1693 goto ret; 1694 } 1695 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1696 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1697 memcpy(buf, &ehci_devd, l); 1698 break; 1699 /* 1700 * We can't really operate at another speed, but the spec says 1701 * we need this descriptor. 1702 */ 1703 case UDESC_DEVICE_QUALIFIER: 1704 if ((value & 0xff) != 0) { 1705 err = USBD_IOERROR; 1706 goto ret; 1707 } 1708 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1709 memcpy(buf, &ehci_odevd, l); 1710 break; 1711 /* 1712 * We can't really operate at another speed, but the spec says 1713 * we need this descriptor. 1714 */ 1715 case UDESC_OTHER_SPEED_CONFIGURATION: 1716 case UDESC_CONFIG: 1717 if ((value & 0xff) != 0) { 1718 err = USBD_IOERROR; 1719 goto ret; 1720 } 1721 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1722 memcpy(buf, &ehci_confd, l); 1723 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1724 value >> 8; 1725 buf = (char *)buf + l; 1726 len -= l; 1727 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1728 totlen += l; 1729 memcpy(buf, &ehci_ifcd, l); 1730 buf = (char *)buf + l; 1731 len -= l; 1732 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1733 totlen += l; 1734 memcpy(buf, &ehci_endpd, l); 1735 break; 1736 case UDESC_STRING: 1737 if (len == 0) 1738 break; 1739 *(u_int8_t *)buf = 0; 1740 totlen = 1; 1741 switch (value & 0xff) { 1742 case 0: /* Language table */ 1743 totlen = ehci_str(buf, len, "\001"); 1744 break; 1745 case 1: /* Vendor */ 1746 totlen = ehci_str(buf, len, sc->sc_vendor); 1747 break; 1748 case 2: /* Product */ 1749 totlen = ehci_str(buf, len, "EHCI root hub"); 1750 break; 1751 } 1752 break; 1753 default: 1754 err = USBD_IOERROR; 1755 goto ret; 1756 } 1757 break; 1758 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1759 if (len > 0) { 1760 *(u_int8_t *)buf = 0; 1761 totlen = 1; 1762 } 1763 break; 1764 case C(UR_GET_STATUS, UT_READ_DEVICE): 1765 if (len > 1) { 1766 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1767 totlen = 2; 1768 } 1769 break; 1770 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1771 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1772 if (len > 1) { 1773 USETW(((usb_status_t *)buf)->wStatus, 0); 1774 totlen = 2; 1775 } 1776 break; 1777 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1778 if (value >= USB_MAX_DEVICES) { 1779 err = USBD_IOERROR; 1780 goto ret; 1781 } 1782 sc->sc_addr = value; 1783 break; 1784 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1785 if (value != 0 && value != 1) { 1786 err = USBD_IOERROR; 1787 goto ret; 1788 } 1789 sc->sc_conf = value; 1790 break; 1791 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1792 break; 1793 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1794 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1795 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1796 err = USBD_IOERROR; 1797 goto ret; 1798 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1799 break; 1800 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1801 break; 1802 /* Hub requests */ 1803 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1804 break; 1805 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1806 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1807 "port=%d feature=%d\n", 1808 index, value)); 1809 if (index < 1 || index > sc->sc_noport) { 1810 err = USBD_IOERROR; 1811 goto ret; 1812 } 1813 port = EHCI_PORTSC(index); 1814 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1815 switch(value) { 1816 case UHF_PORT_ENABLE: 1817 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1818 break; 1819 case UHF_PORT_SUSPEND: 1820 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1821 break; 1822 case UHF_PORT_POWER: 1823 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1824 break; 1825 case UHF_PORT_TEST: 1826 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1827 "%d\n", index)); 1828 break; 1829 case UHF_PORT_INDICATOR: 1830 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1831 "%d\n", index)); 1832 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1833 break; 1834 case UHF_C_PORT_CONNECTION: 1835 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1836 break; 1837 case UHF_C_PORT_ENABLE: 1838 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1839 break; 1840 case UHF_C_PORT_SUSPEND: 1841 /* how? */ 1842 break; 1843 case UHF_C_PORT_OVER_CURRENT: 1844 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1845 break; 1846 case UHF_C_PORT_RESET: 1847 sc->sc_isreset = 0; 1848 break; 1849 default: 1850 err = USBD_IOERROR; 1851 goto ret; 1852 } 1853 #if 0 1854 switch(value) { 1855 case UHF_C_PORT_CONNECTION: 1856 case UHF_C_PORT_ENABLE: 1857 case UHF_C_PORT_SUSPEND: 1858 case UHF_C_PORT_OVER_CURRENT: 1859 case UHF_C_PORT_RESET: 1860 /* Enable RHSC interrupt if condition is cleared. */ 1861 if ((OREAD4(sc, port) >> 16) == 0) 1862 ehci_pcd_able(sc, 1); 1863 break; 1864 default: 1865 break; 1866 } 1867 #endif 1868 break; 1869 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1870 if ((value & 0xff) != 0) { 1871 err = USBD_IOERROR; 1872 goto ret; 1873 } 1874 hubd = ehci_hubd; 1875 hubd.bNbrPorts = sc->sc_noport; 1876 v = EOREAD4(sc, EHCI_HCSPARAMS); 1877 USETW(hubd.wHubCharacteristics, 1878 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1879 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1880 ? UHD_PORT_IND : 0); 1881 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1882 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1883 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1884 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1885 l = min(len, hubd.bDescLength); 1886 totlen = l; 1887 memcpy(buf, &hubd, l); 1888 break; 1889 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1890 if (len != 4) { 1891 err = USBD_IOERROR; 1892 goto ret; 1893 } 1894 memset(buf, 0, len); /* ? XXX */ 1895 totlen = len; 1896 break; 1897 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1898 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1899 index)); 1900 if (index < 1 || index > sc->sc_noport) { 1901 err = USBD_IOERROR; 1902 goto ret; 1903 } 1904 if (len != 4) { 1905 err = USBD_IOERROR; 1906 goto ret; 1907 } 1908 v = EOREAD4(sc, EHCI_PORTSC(index)); 1909 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1910 v)); 1911 i = UPS_HIGH_SPEED; 1912 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1913 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1914 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1915 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1916 if (v & EHCI_PS_PR) i |= UPS_RESET; 1917 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1918 USETW(ps.wPortStatus, i); 1919 i = 0; 1920 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1921 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1922 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1923 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1924 USETW(ps.wPortChange, i); 1925 l = min(len, sizeof ps); 1926 memcpy(buf, &ps, l); 1927 totlen = l; 1928 break; 1929 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1930 err = USBD_IOERROR; 1931 goto ret; 1932 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1933 break; 1934 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1935 if (index < 1 || index > sc->sc_noport) { 1936 err = USBD_IOERROR; 1937 goto ret; 1938 } 1939 port = EHCI_PORTSC(index); 1940 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1941 switch(value) { 1942 case UHF_PORT_ENABLE: 1943 EOWRITE4(sc, port, v | EHCI_PS_PE); 1944 break; 1945 case UHF_PORT_SUSPEND: 1946 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1947 break; 1948 case UHF_PORT_RESET: 1949 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1950 index)); 1951 if (EHCI_PS_IS_LOWSPEED(v)) { 1952 /* Low speed device, give up ownership. */ 1953 ehci_disown(sc, index, 1); 1954 break; 1955 } 1956 /* Start reset sequence. */ 1957 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1958 EOWRITE4(sc, port, v | EHCI_PS_PR); 1959 /* Wait for reset to complete. */ 1960 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1961 if (sc->sc_dying) { 1962 err = USBD_IOERROR; 1963 goto ret; 1964 } 1965 /* Terminate reset sequence. */ 1966 EOWRITE4(sc, port, v); 1967 /* Wait for HC to complete reset. */ 1968 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1969 if (sc->sc_dying) { 1970 err = USBD_IOERROR; 1971 goto ret; 1972 } 1973 v = EOREAD4(sc, port); 1974 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1975 if (v & EHCI_PS_PR) { 1976 printf("%s: port reset timeout\n", 1977 USBDEVNAME(sc->sc_bus.bdev)); 1978 return (USBD_TIMEOUT); 1979 } 1980 if (!(v & EHCI_PS_PE)) { 1981 /* Not a high speed device, give up ownership.*/ 1982 ehci_disown(sc, index, 0); 1983 break; 1984 } 1985 sc->sc_isreset = 1; 1986 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1987 index, v)); 1988 break; 1989 case UHF_PORT_POWER: 1990 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1991 "%d\n", index)); 1992 EOWRITE4(sc, port, v | EHCI_PS_PP); 1993 break; 1994 case UHF_PORT_TEST: 1995 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1996 "%d\n", index)); 1997 break; 1998 case UHF_PORT_INDICATOR: 1999 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2000 "%d\n", index)); 2001 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2002 break; 2003 default: 2004 err = USBD_IOERROR; 2005 goto ret; 2006 } 2007 break; 2008 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2009 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2010 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2011 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2012 break; 2013 default: 2014 err = USBD_IOERROR; 2015 goto ret; 2016 } 2017 xfer->actlen = totlen; 2018 err = USBD_NORMAL_COMPLETION; 2019 ret: 2020 xfer->status = err; 2021 s = splusb(); 2022 usb_transfer_complete(xfer); 2023 splx(s); 2024 return (USBD_IN_PROGRESS); 2025 } 2026 2027 void 2028 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2029 { 2030 int port; 2031 u_int32_t v; 2032 2033 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2034 #ifdef DIAGNOSTIC 2035 if (sc->sc_npcomp != 0) { 2036 int i = (index-1) / sc->sc_npcomp; 2037 if (i >= sc->sc_ncomp) 2038 printf("%s: strange port\n", 2039 USBDEVNAME(sc->sc_bus.bdev)); 2040 else 2041 printf("%s: handing over %s speed device on " 2042 "port %d to %s\n", 2043 USBDEVNAME(sc->sc_bus.bdev), 2044 lowspeed ? "low" : "full", 2045 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2046 } else { 2047 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2048 } 2049 #endif 2050 port = EHCI_PORTSC(index); 2051 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2052 EOWRITE4(sc, port, v | EHCI_PS_PO); 2053 } 2054 2055 /* Abort a root control request. */ 2056 Static void 2057 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2058 { 2059 /* Nothing to do, all transfers are synchronous. */ 2060 } 2061 2062 /* Close the root pipe. */ 2063 Static void 2064 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2065 { 2066 DPRINTF(("ehci_root_ctrl_close\n")); 2067 /* Nothing to do. */ 2068 } 2069 2070 void 2071 ehci_root_intr_done(usbd_xfer_handle xfer) 2072 { 2073 xfer->hcpriv = NULL; 2074 } 2075 2076 Static usbd_status 2077 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2078 { 2079 usbd_status err; 2080 2081 /* Insert last in queue. */ 2082 err = usb_insert_transfer(xfer); 2083 if (err) 2084 return (err); 2085 2086 /* Pipe isn't running, start first */ 2087 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2088 } 2089 2090 Static usbd_status 2091 ehci_root_intr_start(usbd_xfer_handle xfer) 2092 { 2093 usbd_pipe_handle pipe = xfer->pipe; 2094 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2095 2096 if (sc->sc_dying) 2097 return (USBD_IOERROR); 2098 2099 sc->sc_intrxfer = xfer; 2100 2101 return (USBD_IN_PROGRESS); 2102 } 2103 2104 /* Abort a root interrupt request. */ 2105 Static void 2106 ehci_root_intr_abort(usbd_xfer_handle xfer) 2107 { 2108 int s; 2109 2110 if (xfer->pipe->intrxfer == xfer) { 2111 DPRINTF(("ehci_root_intr_abort: remove\n")); 2112 xfer->pipe->intrxfer = NULL; 2113 } 2114 xfer->status = USBD_CANCELLED; 2115 s = splusb(); 2116 usb_transfer_complete(xfer); 2117 splx(s); 2118 } 2119 2120 /* Close the root pipe. */ 2121 Static void 2122 ehci_root_intr_close(usbd_pipe_handle pipe) 2123 { 2124 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2125 2126 DPRINTF(("ehci_root_intr_close\n")); 2127 2128 sc->sc_intrxfer = NULL; 2129 } 2130 2131 void 2132 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2133 { 2134 xfer->hcpriv = NULL; 2135 } 2136 2137 /************************/ 2138 2139 ehci_soft_qh_t * 2140 ehci_alloc_sqh(ehci_softc_t *sc) 2141 { 2142 ehci_soft_qh_t *sqh; 2143 usbd_status err; 2144 int i, offs; 2145 usb_dma_t dma; 2146 2147 if (sc->sc_freeqhs == NULL) { 2148 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2149 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2150 EHCI_PAGE_SIZE, &dma); 2151 #ifdef EHCI_DEBUG 2152 if (err) 2153 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2154 #endif 2155 if (err) 2156 return (NULL); 2157 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2158 offs = i * EHCI_SQH_SIZE; 2159 sqh = KERNADDR(&dma, offs); 2160 sqh->physaddr = DMAADDR(&dma, offs); 2161 sqh->next = sc->sc_freeqhs; 2162 sc->sc_freeqhs = sqh; 2163 } 2164 } 2165 sqh = sc->sc_freeqhs; 2166 sc->sc_freeqhs = sqh->next; 2167 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2168 sqh->next = NULL; 2169 return (sqh); 2170 } 2171 2172 void 2173 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2174 { 2175 sqh->next = sc->sc_freeqhs; 2176 sc->sc_freeqhs = sqh; 2177 } 2178 2179 ehci_soft_qtd_t * 2180 ehci_alloc_sqtd(ehci_softc_t *sc) 2181 { 2182 ehci_soft_qtd_t *sqtd; 2183 usbd_status err; 2184 int i, offs; 2185 usb_dma_t dma; 2186 int s; 2187 2188 if (sc->sc_freeqtds == NULL) { 2189 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2190 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2191 EHCI_PAGE_SIZE, &dma); 2192 #ifdef EHCI_DEBUG 2193 if (err) 2194 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2195 #endif 2196 if (err) 2197 return (NULL); 2198 s = splusb(); 2199 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2200 offs = i * EHCI_SQTD_SIZE; 2201 sqtd = KERNADDR(&dma, offs); 2202 sqtd->physaddr = DMAADDR(&dma, offs); 2203 sqtd->nextqtd = sc->sc_freeqtds; 2204 sc->sc_freeqtds = sqtd; 2205 } 2206 splx(s); 2207 } 2208 2209 s = splusb(); 2210 sqtd = sc->sc_freeqtds; 2211 sc->sc_freeqtds = sqtd->nextqtd; 2212 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2213 sqtd->nextqtd = NULL; 2214 sqtd->xfer = NULL; 2215 splx(s); 2216 2217 return (sqtd); 2218 } 2219 2220 void 2221 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2222 { 2223 int s; 2224 2225 s = splusb(); 2226 sqtd->nextqtd = sc->sc_freeqtds; 2227 sc->sc_freeqtds = sqtd; 2228 splx(s); 2229 } 2230 2231 usbd_status 2232 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2233 int alen, int rd, usbd_xfer_handle xfer, 2234 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2235 { 2236 ehci_soft_qtd_t *next, *cur; 2237 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2238 u_int32_t qtdstatus; 2239 int len, curlen, mps; 2240 int i, tog; 2241 usb_dma_t *dma = &xfer->dmabuf; 2242 2243 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2244 2245 len = alen; 2246 dataphys = DMAADDR(dma, 0); 2247 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2248 #if 0 2249 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2250 epipe->nexttoggle); 2251 #endif 2252 qtdstatus = EHCI_QTD_ACTIVE | 2253 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2254 EHCI_QTD_SET_CERR(3) 2255 /* IOC set below */ 2256 /* BYTES set below */ 2257 ; 2258 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2259 tog = epipe->nexttoggle; 2260 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2261 2262 cur = ehci_alloc_sqtd(sc); 2263 *sp = cur; 2264 if (cur == NULL) 2265 goto nomem; 2266 for (;;) { 2267 dataphyspage = EHCI_PAGE(dataphys); 2268 /* The EHCI hardware can handle at most 5 pages. */ 2269 if (dataphyslastpage - dataphyspage < 2270 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2271 /* we can handle it in this QTD */ 2272 curlen = len; 2273 } else { 2274 /* must use multiple TDs, fill as much as possible. */ 2275 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2276 EHCI_PAGE_OFFSET(dataphys); 2277 #ifdef DIAGNOSTIC 2278 if (curlen > len) { 2279 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2280 "len=0x%x offs=0x%x\n", curlen, len, 2281 EHCI_PAGE_OFFSET(dataphys)); 2282 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2283 dataphyslastpage, dataphyspage, 2284 dataphys); 2285 curlen = len; 2286 } 2287 #endif 2288 /* the length must be a multiple of the max size */ 2289 curlen -= curlen % mps; 2290 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2291 "curlen=%d\n", curlen)); 2292 #ifdef DIAGNOSTIC 2293 if (curlen == 0) 2294 panic("ehci_alloc_std: curlen == 0"); 2295 #endif 2296 } 2297 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2298 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2299 dataphys, dataphyslastpage, 2300 len, curlen)); 2301 len -= curlen; 2302 2303 if (len != 0) { 2304 next = ehci_alloc_sqtd(sc); 2305 if (next == NULL) 2306 goto nomem; 2307 nextphys = htole32(next->physaddr); 2308 } else { 2309 next = NULL; 2310 nextphys = EHCI_NULL; 2311 } 2312 2313 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2314 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2315 if (i != 0) /* use offset only in first buffer */ 2316 a = EHCI_PAGE(a); 2317 cur->qtd.qtd_buffer[i] = htole32(a); 2318 cur->qtd.qtd_buffer_hi[i] = 0; 2319 #ifdef DIAGNOSTIC 2320 if (i >= EHCI_QTD_NBUFFERS) { 2321 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2322 goto nomem; 2323 } 2324 #endif 2325 } 2326 cur->nextqtd = next; 2327 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2328 cur->qtd.qtd_status = 2329 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2330 cur->xfer = xfer; 2331 cur->len = curlen; 2332 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2333 dataphys, dataphys + curlen)); 2334 /* adjust the toggle based on the number of packets in this 2335 qtd */ 2336 if (((curlen + mps - 1) / mps) & 1) { 2337 tog ^= 1; 2338 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2339 } 2340 if (len == 0) 2341 break; 2342 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2343 dataphys += curlen; 2344 cur = next; 2345 } 2346 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2347 *ep = cur; 2348 epipe->nexttoggle = tog; 2349 2350 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2351 *sp, *ep)); 2352 2353 return (USBD_NORMAL_COMPLETION); 2354 2355 nomem: 2356 /* XXX free chain */ 2357 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2358 return (USBD_NOMEM); 2359 } 2360 2361 Static void 2362 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2363 ehci_soft_qtd_t *sqtdend) 2364 { 2365 ehci_soft_qtd_t *p; 2366 int i; 2367 2368 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2369 sqtd, sqtdend)); 2370 2371 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2372 p = sqtd->nextqtd; 2373 ehci_free_sqtd(sc, sqtd); 2374 } 2375 } 2376 2377 /****************/ 2378 2379 /* 2380 * Close a reqular pipe. 2381 * Assumes that there are no pending transactions. 2382 */ 2383 void 2384 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2385 { 2386 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2387 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2388 ehci_soft_qh_t *sqh = epipe->sqh; 2389 int s; 2390 2391 s = splusb(); 2392 ehci_rem_qh(sc, sqh, head); 2393 splx(s); 2394 ehci_free_sqh(sc, epipe->sqh); 2395 } 2396 2397 /* 2398 * Abort a device request. 2399 * If this routine is called at splusb() it guarantees that the request 2400 * will be removed from the hardware scheduling and that the callback 2401 * for it will be called with USBD_CANCELLED status. 2402 * It's impossible to guarantee that the requested transfer will not 2403 * have happened since the hardware runs concurrently. 2404 * If the transaction has already happened we rely on the ordinary 2405 * interrupt processing to process it. 2406 * XXX This is most probably wrong. 2407 */ 2408 void 2409 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2410 { 2411 #define exfer EXFER(xfer) 2412 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2413 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2414 ehci_soft_qh_t *sqh = epipe->sqh; 2415 ehci_soft_qtd_t *sqtd; 2416 ehci_physaddr_t cur; 2417 u_int32_t qhstatus; 2418 int s; 2419 int hit; 2420 2421 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2422 2423 if (sc->sc_dying) { 2424 /* If we're dying, just do the software part. */ 2425 s = splusb(); 2426 xfer->status = status; /* make software ignore it */ 2427 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2428 usb_transfer_complete(xfer); 2429 splx(s); 2430 return; 2431 } 2432 2433 if (xfer->device->bus->intr_context || !curproc) 2434 panic("ehci_abort_xfer: not in process context"); 2435 2436 /* 2437 * Step 1: Make interrupt routine and hardware ignore xfer. 2438 */ 2439 s = splusb(); 2440 xfer->status = status; /* make software ignore it */ 2441 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2442 qhstatus = sqh->qh.qh_qtd.qtd_status; 2443 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2444 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2445 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2446 if (sqtd == exfer->sqtdend) 2447 break; 2448 } 2449 splx(s); 2450 2451 /* 2452 * Step 2: Wait until we know hardware has finished any possible 2453 * use of the xfer. Also make sure the soft interrupt routine 2454 * has run. 2455 */ 2456 ehci_sync_hc(sc); 2457 s = splusb(); 2458 #ifdef USB_USE_SOFTINTR 2459 sc->sc_softwake = 1; 2460 #endif /* USB_USE_SOFTINTR */ 2461 usb_schedsoftintr(&sc->sc_bus); 2462 #ifdef USB_USE_SOFTINTR 2463 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2464 #endif /* USB_USE_SOFTINTR */ 2465 splx(s); 2466 2467 /* 2468 * Step 3: Remove any vestiges of the xfer from the hardware. 2469 * The complication here is that the hardware may have executed 2470 * beyond the xfer we're trying to abort. So as we're scanning 2471 * the TDs of this xfer we check if the hardware points to 2472 * any of them. 2473 */ 2474 s = splusb(); /* XXX why? */ 2475 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2476 hit = 0; 2477 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2478 hit |= cur == sqtd->physaddr; 2479 if (sqtd == exfer->sqtdend) 2480 break; 2481 } 2482 sqtd = sqtd->nextqtd; 2483 /* Zap curqtd register if hardware pointed inside the xfer. */ 2484 if (hit && sqtd != NULL) { 2485 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2486 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2487 sqh->qh.qh_qtd.qtd_status = qhstatus; 2488 } else { 2489 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2490 } 2491 2492 /* 2493 * Step 4: Execute callback. 2494 */ 2495 #ifdef DIAGNOSTIC 2496 exfer->isdone = 1; 2497 #endif 2498 usb_transfer_complete(xfer); 2499 2500 splx(s); 2501 #undef exfer 2502 } 2503 2504 void 2505 ehci_timeout(void *addr) 2506 { 2507 struct ehci_xfer *exfer = addr; 2508 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2509 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2510 2511 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2512 #ifdef USB_DEBUG 2513 if (ehcidebug > 1) 2514 usbd_dump_pipe(exfer->xfer.pipe); 2515 #endif 2516 2517 if (sc->sc_dying) { 2518 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2519 return; 2520 } 2521 2522 /* Execute the abort in a process context. */ 2523 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2524 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2525 } 2526 2527 void 2528 ehci_timeout_task(void *addr) 2529 { 2530 usbd_xfer_handle xfer = addr; 2531 int s; 2532 2533 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2534 2535 s = splusb(); 2536 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2537 splx(s); 2538 } 2539 2540 /************************/ 2541 2542 Static usbd_status 2543 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2544 { 2545 usbd_status err; 2546 2547 /* Insert last in queue. */ 2548 err = usb_insert_transfer(xfer); 2549 if (err) 2550 return (err); 2551 2552 /* Pipe isn't running, start first */ 2553 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2554 } 2555 2556 Static usbd_status 2557 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2558 { 2559 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2560 usbd_status err; 2561 2562 if (sc->sc_dying) 2563 return (USBD_IOERROR); 2564 2565 #ifdef DIAGNOSTIC 2566 if (!(xfer->rqflags & URQ_REQUEST)) { 2567 /* XXX panic */ 2568 printf("ehci_device_ctrl_transfer: not a request\n"); 2569 return (USBD_INVAL); 2570 } 2571 #endif 2572 2573 err = ehci_device_request(xfer); 2574 if (err) 2575 return (err); 2576 2577 if (sc->sc_bus.use_polling) 2578 ehci_waitintr(sc, xfer); 2579 return (USBD_IN_PROGRESS); 2580 } 2581 2582 void 2583 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2584 { 2585 struct ehci_xfer *ex = EXFER(xfer); 2586 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2587 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2588 2589 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2590 2591 #ifdef DIAGNOSTIC 2592 if (!(xfer->rqflags & URQ_REQUEST)) { 2593 panic("ehci_ctrl_done: not a request"); 2594 } 2595 #endif 2596 2597 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2598 ehci_del_intr_list(ex); /* remove from active list */ 2599 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2600 } 2601 2602 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2603 } 2604 2605 /* Abort a device control request. */ 2606 Static void 2607 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2608 { 2609 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2610 ehci_abort_xfer(xfer, USBD_CANCELLED); 2611 } 2612 2613 /* Close a device control pipe. */ 2614 Static void 2615 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2616 { 2617 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2618 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2619 2620 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2621 ehci_close_pipe(pipe, sc->sc_async_head); 2622 } 2623 2624 usbd_status 2625 ehci_device_request(usbd_xfer_handle xfer) 2626 { 2627 #define exfer EXFER(xfer) 2628 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2629 usb_device_request_t *req = &xfer->request; 2630 usbd_device_handle dev = epipe->pipe.device; 2631 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2632 int addr = dev->address; 2633 ehci_soft_qtd_t *setup, *stat, *next; 2634 ehci_soft_qh_t *sqh; 2635 int isread; 2636 int len; 2637 usbd_status err; 2638 int s; 2639 2640 isread = req->bmRequestType & UT_READ; 2641 len = UGETW(req->wLength); 2642 2643 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2644 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2645 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2646 UGETW(req->wIndex), len, addr, 2647 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2648 2649 setup = ehci_alloc_sqtd(sc); 2650 if (setup == NULL) { 2651 err = USBD_NOMEM; 2652 goto bad1; 2653 } 2654 stat = ehci_alloc_sqtd(sc); 2655 if (stat == NULL) { 2656 err = USBD_NOMEM; 2657 goto bad2; 2658 } 2659 2660 sqh = epipe->sqh; 2661 epipe->u.ctl.length = len; 2662 2663 /* Update device address and length since they may have changed 2664 during the setup of the control pipe in usbd_new_device(). */ 2665 /* XXX This only needs to be done once, but it's too early in open. */ 2666 /* XXXX Should not touch ED here! */ 2667 sqh->qh.qh_endp = 2668 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2669 htole32( 2670 EHCI_QH_SET_ADDR(addr) | 2671 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2672 ); 2673 2674 /* Set up data transaction */ 2675 if (len != 0) { 2676 ehci_soft_qtd_t *end; 2677 2678 /* Start toggle at 1. */ 2679 epipe->nexttoggle = 1; 2680 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2681 &next, &end); 2682 if (err) 2683 goto bad3; 2684 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2685 end->nextqtd = stat; 2686 end->qtd.qtd_next = 2687 end->qtd.qtd_altnext = htole32(stat->physaddr); 2688 } else { 2689 next = stat; 2690 } 2691 2692 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2693 2694 /* Clear toggle */ 2695 setup->qtd.qtd_status = htole32( 2696 EHCI_QTD_ACTIVE | 2697 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2698 EHCI_QTD_SET_CERR(3) | 2699 EHCI_QTD_SET_TOGGLE(0) | 2700 EHCI_QTD_SET_BYTES(sizeof *req) 2701 ); 2702 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2703 setup->qtd.qtd_buffer_hi[0] = 0; 2704 setup->nextqtd = next; 2705 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2706 setup->xfer = xfer; 2707 setup->len = sizeof *req; 2708 2709 stat->qtd.qtd_status = htole32( 2710 EHCI_QTD_ACTIVE | 2711 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2712 EHCI_QTD_SET_CERR(3) | 2713 EHCI_QTD_SET_TOGGLE(1) | 2714 EHCI_QTD_IOC 2715 ); 2716 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2717 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2718 stat->nextqtd = NULL; 2719 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2720 stat->xfer = xfer; 2721 stat->len = 0; 2722 2723 #ifdef EHCI_DEBUG 2724 if (ehcidebug > 5) { 2725 DPRINTF(("ehci_device_request:\n")); 2726 ehci_dump_sqh(sqh); 2727 ehci_dump_sqtds(setup); 2728 } 2729 #endif 2730 2731 exfer->sqtdstart = setup; 2732 exfer->sqtdend = stat; 2733 #ifdef DIAGNOSTIC 2734 if (!exfer->isdone) { 2735 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2736 } 2737 exfer->isdone = 0; 2738 #endif 2739 2740 /* Insert qTD in QH list. */ 2741 s = splusb(); 2742 ehci_set_qh_qtd(sqh, setup); 2743 if (xfer->timeout && !sc->sc_bus.use_polling) { 2744 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2745 ehci_timeout, xfer); 2746 } 2747 ehci_add_intr_list(sc, exfer); 2748 xfer->status = USBD_IN_PROGRESS; 2749 splx(s); 2750 2751 #ifdef EHCI_DEBUG 2752 if (ehcidebug > 10) { 2753 DPRINTF(("ehci_device_request: status=%x\n", 2754 EOREAD4(sc, EHCI_USBSTS))); 2755 delay(10000); 2756 ehci_dump_regs(sc); 2757 ehci_dump_sqh(sc->sc_async_head); 2758 ehci_dump_sqh(sqh); 2759 ehci_dump_sqtds(setup); 2760 } 2761 #endif 2762 2763 return (USBD_NORMAL_COMPLETION); 2764 2765 bad3: 2766 ehci_free_sqtd(sc, stat); 2767 bad2: 2768 ehci_free_sqtd(sc, setup); 2769 bad1: 2770 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2771 xfer->status = err; 2772 usb_transfer_complete(xfer); 2773 return (err); 2774 #undef exfer 2775 } 2776 2777 /************************/ 2778 2779 Static usbd_status 2780 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2781 { 2782 usbd_status err; 2783 2784 /* Insert last in queue. */ 2785 err = usb_insert_transfer(xfer); 2786 if (err) 2787 return (err); 2788 2789 /* Pipe isn't running, start first */ 2790 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2791 } 2792 2793 usbd_status 2794 ehci_device_bulk_start(usbd_xfer_handle xfer) 2795 { 2796 #define exfer EXFER(xfer) 2797 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2798 usbd_device_handle dev = epipe->pipe.device; 2799 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2800 ehci_soft_qtd_t *data, *dataend; 2801 ehci_soft_qh_t *sqh; 2802 usbd_status err; 2803 int len, isread, endpt; 2804 int s; 2805 2806 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2807 xfer, xfer->length, xfer->flags)); 2808 2809 if (sc->sc_dying) 2810 return (USBD_IOERROR); 2811 2812 #ifdef DIAGNOSTIC 2813 if (xfer->rqflags & URQ_REQUEST) 2814 panic("ehci_device_bulk_start: a request"); 2815 #endif 2816 2817 len = xfer->length; 2818 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2819 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2820 sqh = epipe->sqh; 2821 2822 epipe->u.bulk.length = len; 2823 2824 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2825 &dataend); 2826 if (err) { 2827 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2828 xfer->status = err; 2829 usb_transfer_complete(xfer); 2830 return (err); 2831 } 2832 2833 #ifdef EHCI_DEBUG 2834 if (ehcidebug > 5) { 2835 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2836 ehci_dump_sqh(sqh); 2837 ehci_dump_sqtds(data); 2838 } 2839 #endif 2840 2841 /* Set up interrupt info. */ 2842 exfer->sqtdstart = data; 2843 exfer->sqtdend = dataend; 2844 #ifdef DIAGNOSTIC 2845 if (!exfer->isdone) { 2846 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2847 } 2848 exfer->isdone = 0; 2849 #endif 2850 2851 s = splusb(); 2852 ehci_set_qh_qtd(sqh, data); 2853 if (xfer->timeout && !sc->sc_bus.use_polling) { 2854 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2855 ehci_timeout, xfer); 2856 } 2857 ehci_add_intr_list(sc, exfer); 2858 xfer->status = USBD_IN_PROGRESS; 2859 splx(s); 2860 2861 #ifdef EHCI_DEBUG 2862 if (ehcidebug > 10) { 2863 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2864 delay(10000); 2865 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2866 ehci_dump_regs(sc); 2867 #if 0 2868 printf("async_head:\n"); 2869 ehci_dump_sqh(sc->sc_async_head); 2870 #endif 2871 printf("sqh:\n"); 2872 ehci_dump_sqh(sqh); 2873 ehci_dump_sqtds(data); 2874 } 2875 #endif 2876 2877 if (sc->sc_bus.use_polling) 2878 ehci_waitintr(sc, xfer); 2879 2880 return (USBD_IN_PROGRESS); 2881 #undef exfer 2882 } 2883 2884 Static void 2885 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2886 { 2887 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2888 ehci_abort_xfer(xfer, USBD_CANCELLED); 2889 } 2890 2891 /* 2892 * Close a device bulk pipe. 2893 */ 2894 Static void 2895 ehci_device_bulk_close(usbd_pipe_handle pipe) 2896 { 2897 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2898 2899 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2900 ehci_close_pipe(pipe, sc->sc_async_head); 2901 } 2902 2903 void 2904 ehci_device_bulk_done(usbd_xfer_handle xfer) 2905 { 2906 struct ehci_xfer *ex = EXFER(xfer); 2907 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2908 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2909 2910 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2911 xfer, xfer->actlen)); 2912 2913 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2914 ehci_del_intr_list(ex); /* remove from active list */ 2915 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2916 } 2917 2918 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2919 } 2920 2921 /************************/ 2922 2923 Static usbd_status 2924 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2925 { 2926 struct ehci_soft_islot *isp; 2927 int islot, lev; 2928 2929 /* Find a poll rate that is large enough. */ 2930 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2931 if (EHCI_ILEV_IVAL(lev) <= ival) 2932 break; 2933 2934 /* Pick an interrupt slot at the right level. */ 2935 /* XXX could do better than picking at random */ 2936 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2937 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2938 2939 sqh->islot = islot; 2940 isp = &sc->sc_islots[islot]; 2941 ehci_add_qh(sqh, isp->sqh); 2942 2943 return (USBD_NORMAL_COMPLETION); 2944 } 2945 2946 Static usbd_status 2947 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2948 { 2949 usbd_status err; 2950 2951 /* Insert last in queue. */ 2952 err = usb_insert_transfer(xfer); 2953 if (err) 2954 return (err); 2955 2956 /* 2957 * Pipe isn't running (otherwise err would be USBD_INPROG), 2958 * so start it first. 2959 */ 2960 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2961 } 2962 2963 Static usbd_status 2964 ehci_device_intr_start(usbd_xfer_handle xfer) 2965 { 2966 #define exfer EXFER(xfer) 2967 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2968 usbd_device_handle dev = xfer->pipe->device; 2969 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2970 ehci_soft_qtd_t *data, *dataend; 2971 ehci_soft_qh_t *sqh; 2972 usbd_status err; 2973 int len, isread, endpt; 2974 int s; 2975 2976 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2977 xfer, xfer->length, xfer->flags)); 2978 2979 if (sc->sc_dying) 2980 return (USBD_IOERROR); 2981 2982 #ifdef DIAGNOSTIC 2983 if (xfer->rqflags & URQ_REQUEST) 2984 panic("ehci_device_intr_start: a request"); 2985 #endif 2986 2987 len = xfer->length; 2988 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2989 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2990 sqh = epipe->sqh; 2991 2992 epipe->u.intr.length = len; 2993 2994 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2995 &dataend); 2996 if (err) { 2997 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 2998 xfer->status = err; 2999 usb_transfer_complete(xfer); 3000 return (err); 3001 } 3002 3003 #ifdef EHCI_DEBUG 3004 if (ehcidebug > 5) { 3005 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3006 ehci_dump_sqh(sqh); 3007 ehci_dump_sqtds(data); 3008 } 3009 #endif 3010 3011 /* Set up interrupt info. */ 3012 exfer->sqtdstart = data; 3013 exfer->sqtdend = dataend; 3014 #ifdef DIAGNOSTIC 3015 if (!exfer->isdone) { 3016 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3017 } 3018 exfer->isdone = 0; 3019 #endif 3020 3021 s = splusb(); 3022 ehci_set_qh_qtd(sqh, data); 3023 if (xfer->timeout && !sc->sc_bus.use_polling) { 3024 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3025 ehci_timeout, xfer); 3026 } 3027 ehci_add_intr_list(sc, exfer); 3028 xfer->status = USBD_IN_PROGRESS; 3029 splx(s); 3030 3031 #ifdef EHCI_DEBUG 3032 if (ehcidebug > 10) { 3033 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3034 delay(10000); 3035 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3036 ehci_dump_regs(sc); 3037 printf("sqh:\n"); 3038 ehci_dump_sqh(sqh); 3039 ehci_dump_sqtds(data); 3040 } 3041 #endif 3042 3043 if (sc->sc_bus.use_polling) 3044 ehci_waitintr(sc, xfer); 3045 3046 return (USBD_IN_PROGRESS); 3047 #undef exfer 3048 } 3049 3050 Static void 3051 ehci_device_intr_abort(usbd_xfer_handle xfer) 3052 { 3053 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3054 if (xfer->pipe->intrxfer == xfer) { 3055 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3056 xfer->pipe->intrxfer = NULL; 3057 } 3058 ehci_abort_xfer(xfer, USBD_CANCELLED); 3059 } 3060 3061 Static void 3062 ehci_device_intr_close(usbd_pipe_handle pipe) 3063 { 3064 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3065 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3066 struct ehci_soft_islot *isp; 3067 3068 isp = &sc->sc_islots[epipe->sqh->islot]; 3069 ehci_close_pipe(pipe, isp->sqh); 3070 } 3071 3072 Static void 3073 ehci_device_intr_done(usbd_xfer_handle xfer) 3074 { 3075 #define exfer EXFER(xfer) 3076 struct ehci_xfer *ex = EXFER(xfer); 3077 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3078 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3079 ehci_soft_qtd_t *data, *dataend; 3080 ehci_soft_qh_t *sqh; 3081 usbd_status err; 3082 int len, isread, endpt, s; 3083 3084 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3085 xfer, xfer->actlen)); 3086 3087 if (xfer->pipe->repeat) { 3088 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3089 3090 len = epipe->u.intr.length; 3091 xfer->length = len; 3092 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3093 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3094 sqh = epipe->sqh; 3095 3096 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3097 &data, &dataend); 3098 if (err) { 3099 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3100 xfer->status = err; 3101 return; 3102 } 3103 3104 /* Set up interrupt info. */ 3105 exfer->sqtdstart = data; 3106 exfer->sqtdend = dataend; 3107 #ifdef DIAGNOSTIC 3108 if (!exfer->isdone) { 3109 printf("ehci_device_intr_done: not done, ex=%p\n", 3110 exfer); 3111 } 3112 exfer->isdone = 0; 3113 #endif 3114 3115 s = splusb(); 3116 ehci_set_qh_qtd(sqh, data); 3117 if (xfer->timeout && !sc->sc_bus.use_polling) { 3118 usb_callout(xfer->timeout_handle, 3119 mstohz(xfer->timeout), ehci_timeout, xfer); 3120 } 3121 splx(s); 3122 3123 xfer->status = USBD_IN_PROGRESS; 3124 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3125 ehci_del_intr_list(ex); /* remove from active list */ 3126 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3127 } 3128 #undef exfer 3129 } 3130 3131 /************************/ 3132 3133 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3134 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3135 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3136 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3137 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3138
Indexes created Thu Oct 02 01:09:59 GMT 2025