ehci.c revision 1.49
1 /* $NetBSD: ehci.c,v 1.49 2003/10/13 00:05:36 enami Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart (at) augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/docs/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.49 2003/10/13 00:05:36 enami Exp $"); 56 57 #include "ohci.h" 58 #include "uhci.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/malloc.h> 64 #include <sys/device.h> 65 #include <sys/select.h> 66 #include <sys/proc.h> 67 #include <sys/queue.h> 68 69 #include <machine/bus.h> 70 #include <machine/endian.h> 71 72 #include <dev/usb/usb.h> 73 #include <dev/usb/usbdi.h> 74 #include <dev/usb/usbdivar.h> 75 #include <dev/usb/usb_mem.h> 76 #include <dev/usb/usb_quirks.h> 77 78 #include <dev/usb/ehcireg.h> 79 #include <dev/usb/ehcivar.h> 80 81 #ifdef EHCI_DEBUG 82 #define DPRINTF(x) if (ehcidebug) printf x 83 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 84 int ehcidebug = 0; 85 #ifndef __NetBSD__ 86 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 87 #endif 88 #else 89 #define DPRINTF(x) 90 #define DPRINTFN(n,x) 91 #endif 92 93 struct ehci_pipe { 94 struct usbd_pipe pipe; 95 ehci_soft_qh_t *sqh; 96 union { 97 ehci_soft_qtd_t *qtd; 98 /* ehci_soft_itd_t *itd; */ 99 } tail; 100 union { 101 /* Control pipe */ 102 struct { 103 usb_dma_t reqdma; 104 u_int length; 105 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 106 } ctl; 107 /* Interrupt pipe */ 108 /* XXX */ 109 /* Bulk pipe */ 110 struct { 111 u_int length; 112 } bulk; 113 /* Iso pipe */ 114 /* XXX */ 115 } u; 116 }; 117 118 Static void ehci_shutdown(void *); 119 Static void ehci_power(int, void *); 120 121 Static usbd_status ehci_open(usbd_pipe_handle); 122 Static void ehci_poll(struct usbd_bus *); 123 Static void ehci_softintr(void *); 124 Static int ehci_intr1(ehci_softc_t *); 125 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 126 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 127 Static void ehci_idone(struct ehci_xfer *); 128 Static void ehci_timeout(void *); 129 Static void ehci_timeout_task(void *); 130 131 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 132 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 133 134 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 135 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 136 137 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 139 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ehci_root_ctrl_close(usbd_pipe_handle); 141 Static void ehci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 145 Static void ehci_root_intr_abort(usbd_xfer_handle); 146 Static void ehci_root_intr_close(usbd_pipe_handle); 147 Static void ehci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 151 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_device_ctrl_close(usbd_pipe_handle); 153 Static void ehci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 157 Static void ehci_device_bulk_abort(usbd_xfer_handle); 158 Static void ehci_device_bulk_close(usbd_pipe_handle); 159 Static void ehci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 163 Static void ehci_device_intr_abort(usbd_xfer_handle); 164 Static void ehci_device_intr_close(usbd_pipe_handle); 165 Static void ehci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 169 Static void ehci_device_isoc_abort(usbd_xfer_handle); 170 Static void ehci_device_isoc_close(usbd_pipe_handle); 171 Static void ehci_device_isoc_done(usbd_xfer_handle); 172 173 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 174 Static void ehci_noop(usbd_pipe_handle pipe); 175 176 Static int ehci_str(usb_string_descriptor_t *, int, char *); 177 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 178 Static void ehci_pcd_able(ehci_softc_t *, int); 179 Static void ehci_pcd_enable(void *); 180 Static void ehci_disown(ehci_softc_t *, int, int); 181 182 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 183 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 184 185 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 186 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 187 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 188 ehci_softc_t *, int, int, usbd_xfer_handle, 189 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 190 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 191 ehci_soft_qtd_t *); 192 193 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 194 195 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 196 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 197 ehci_soft_qh_t *); 198 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 199 Static void ehci_sync_hc(ehci_softc_t *); 200 201 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 202 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 203 204 #ifdef EHCI_DEBUG 205 Static void ehci_dump_regs(ehci_softc_t *); 206 Static void ehci_dump(void); 207 Static ehci_softc_t *theehci; 208 Static void ehci_dump_link(ehci_link_t, int); 209 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 210 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 211 Static void ehci_dump_qtd(ehci_qtd_t *); 212 Static void ehci_dump_sqh(ehci_soft_qh_t *); 213 #ifdef DIAGNOSTIC 214 Static void ehci_dump_exfer(struct ehci_xfer *); 215 #endif 216 #endif 217 218 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 219 220 #define EHCI_INTR_ENDPT 1 221 222 #define ehci_add_intr_list(sc, ex) \ 223 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 224 #define ehci_del_intr_list(ex) \ 225 do { \ 226 LIST_REMOVE((ex), inext); \ 227 (ex)->inext.le_prev = NULL; \ 228 } while (0) 229 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 230 231 Static struct usbd_bus_methods ehci_bus_methods = { 232 ehci_open, 233 ehci_softintr, 234 ehci_poll, 235 ehci_allocm, 236 ehci_freem, 237 ehci_allocx, 238 ehci_freex, 239 }; 240 241 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 242 ehci_root_ctrl_transfer, 243 ehci_root_ctrl_start, 244 ehci_root_ctrl_abort, 245 ehci_root_ctrl_close, 246 ehci_noop, 247 ehci_root_ctrl_done, 248 }; 249 250 Static struct usbd_pipe_methods ehci_root_intr_methods = { 251 ehci_root_intr_transfer, 252 ehci_root_intr_start, 253 ehci_root_intr_abort, 254 ehci_root_intr_close, 255 ehci_noop, 256 ehci_root_intr_done, 257 }; 258 259 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 260 ehci_device_ctrl_transfer, 261 ehci_device_ctrl_start, 262 ehci_device_ctrl_abort, 263 ehci_device_ctrl_close, 264 ehci_noop, 265 ehci_device_ctrl_done, 266 }; 267 268 Static struct usbd_pipe_methods ehci_device_intr_methods = { 269 ehci_device_intr_transfer, 270 ehci_device_intr_start, 271 ehci_device_intr_abort, 272 ehci_device_intr_close, 273 ehci_device_clear_toggle, 274 ehci_device_intr_done, 275 }; 276 277 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 278 ehci_device_bulk_transfer, 279 ehci_device_bulk_start, 280 ehci_device_bulk_abort, 281 ehci_device_bulk_close, 282 ehci_device_clear_toggle, 283 ehci_device_bulk_done, 284 }; 285 286 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 287 ehci_device_isoc_transfer, 288 ehci_device_isoc_start, 289 ehci_device_isoc_abort, 290 ehci_device_isoc_close, 291 ehci_noop, 292 ehci_device_isoc_done, 293 }; 294 295 usbd_status 296 ehci_init(ehci_softc_t *sc) 297 { 298 u_int32_t version, sparams, cparams, hcr; 299 u_int i; 300 usbd_status err; 301 ehci_soft_qh_t *sqh; 302 303 DPRINTF(("ehci_init: start\n")); 304 #ifdef EHCI_DEBUG 305 theehci = sc; 306 #endif 307 308 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 309 310 version = EREAD2(sc, EHCI_HCIVERSION); 311 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 312 version >> 8, version & 0xff); 313 314 sparams = EREAD4(sc, EHCI_HCSPARAMS); 315 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 316 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 317 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 318 aprint_error("%s: wrong number of companions (%d != %d)\n", 319 USBDEVNAME(sc->sc_bus.bdev), 320 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 321 #if NOHCI == 0 || NUHCI == 0 322 aprint_error("%s: ohci or uhci probably not configured\n", 323 USBDEVNAME(sc->sc_bus.bdev)); 324 #endif 325 return (USBD_IOERROR); 326 } 327 if (sc->sc_ncomp > 0) { 328 aprint_normal("%s: companion controller%s, %d port%s each:", 329 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 330 EHCI_HCS_N_PCC(sparams), 331 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 332 for (i = 0; i < sc->sc_ncomp; i++) 333 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 334 aprint_normal("\n"); 335 } 336 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 337 cparams = EREAD4(sc, EHCI_HCCPARAMS); 338 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 339 340 if (EHCI_HCC_64BIT(cparams)) { 341 /* MUST clear segment register if 64 bit capable. */ 342 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 343 } 344 345 sc->sc_bus.usbrev = USBREV_2_0; 346 347 /* Reset the controller */ 348 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 349 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 350 usb_delay_ms(&sc->sc_bus, 1); 351 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 352 for (i = 0; i < 100; i++) { 353 usb_delay_ms(&sc->sc_bus, 1); 354 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 355 if (!hcr) 356 break; 357 } 358 if (hcr) { 359 aprint_error("%s: reset timeout\n", 360 USBDEVNAME(sc->sc_bus.bdev)); 361 return (USBD_IOERROR); 362 } 363 364 /* frame list size at default, read back what we got and use that */ 365 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 366 case 0: sc->sc_flsize = 1024*4; break; 367 case 1: sc->sc_flsize = 512*4; break; 368 case 2: sc->sc_flsize = 256*4; break; 369 case 3: return (USBD_IOERROR); 370 } 371 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 372 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 373 if (err) 374 return (err); 375 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 376 377 /* Set up the bus struct. */ 378 sc->sc_bus.methods = &ehci_bus_methods; 379 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 380 381 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 382 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 383 384 sc->sc_eintrs = EHCI_NORMAL_INTRS; 385 386 /* Allocate dummy QH that starts the async list. */ 387 sqh = ehci_alloc_sqh(sc); 388 if (sqh == NULL) { 389 err = USBD_NOMEM; 390 goto bad1; 391 } 392 /* Fill the QH */ 393 sqh->qh.qh_endp = 394 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 395 sqh->qh.qh_link = 396 htole32(sqh->physaddr | EHCI_LINK_QH); 397 sqh->qh.qh_curqtd = EHCI_NULL; 398 sqh->next = NULL; 399 /* Fill the overlay qTD */ 400 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 401 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 402 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 403 sqh->sqtd = NULL; 404 #ifdef EHCI_DEBUG 405 if (ehcidebug) { 406 ehci_dump_sqh(sqh); 407 } 408 #endif 409 410 /* Point to async list */ 411 sc->sc_async_head = sqh; 412 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 413 414 usb_callout_init(sc->sc_tmo_pcd); 415 416 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 417 418 /* Enable interrupts */ 419 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 420 421 /* Turn on controller */ 422 EOWRITE4(sc, EHCI_USBCMD, 423 EHCI_CMD_ITC_8 | /* 8 microframes */ 424 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 425 EHCI_CMD_ASE | 426 /* EHCI_CMD_PSE | */ 427 EHCI_CMD_RS); 428 429 /* Take over port ownership */ 430 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 431 432 for (i = 0; i < 100; i++) { 433 usb_delay_ms(&sc->sc_bus, 1); 434 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 435 if (!hcr) 436 break; 437 } 438 if (hcr) { 439 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 440 return (USBD_IOERROR); 441 } 442 443 return (USBD_NORMAL_COMPLETION); 444 445 #if 0 446 bad2: 447 ehci_free_sqh(sc, sc->sc_async_head); 448 #endif 449 bad1: 450 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 451 return (err); 452 } 453 454 int 455 ehci_intr(void *v) 456 { 457 ehci_softc_t *sc = v; 458 459 if (sc == NULL || sc->sc_dying) 460 return (0); 461 462 /* If we get an interrupt while polling, then just ignore it. */ 463 if (sc->sc_bus.use_polling) { 464 #ifdef DIAGNOSTIC 465 printf("ehci_intr: ignored interrupt while polling\n"); 466 #endif 467 return (0); 468 } 469 470 return (ehci_intr1(sc)); 471 } 472 473 Static int 474 ehci_intr1(ehci_softc_t *sc) 475 { 476 u_int32_t intrs, eintrs; 477 478 DPRINTFN(20,("ehci_intr1: enter\n")); 479 480 /* In case the interrupt occurs before initialization has completed. */ 481 if (sc == NULL) { 482 #ifdef DIAGNOSTIC 483 printf("ehci_intr: sc == NULL\n"); 484 #endif 485 return (0); 486 } 487 488 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 489 490 if (!intrs) 491 return (0); 492 493 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 494 eintrs = intrs & sc->sc_eintrs; 495 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 496 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 497 (u_int)eintrs)); 498 if (!eintrs) 499 return (0); 500 501 sc->sc_bus.intr_context++; 502 sc->sc_bus.no_intrs++; 503 if (eintrs & EHCI_STS_IAA) { 504 DPRINTF(("ehci_intr1: door bell\n")); 505 wakeup(&sc->sc_async_head); 506 eintrs &= ~EHCI_STS_IAA; 507 } 508 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 509 DPRINTFN(5,("ehci_intr1: %s %s\n", 510 eintrs & EHCI_STS_INT ? "INT" : "", 511 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 512 usb_schedsoftintr(&sc->sc_bus); 513 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 514 } 515 if (eintrs & EHCI_STS_HSE) { 516 printf("%s: unrecoverable error, controller halted\n", 517 USBDEVNAME(sc->sc_bus.bdev)); 518 /* XXX what else */ 519 } 520 if (eintrs & EHCI_STS_PCD) { 521 ehci_pcd(sc, sc->sc_intrxfer); 522 /* 523 * Disable PCD interrupt for now, because it will be 524 * on until the port has been reset. 525 */ 526 ehci_pcd_able(sc, 0); 527 /* Do not allow RHSC interrupts > 1 per second */ 528 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 529 eintrs &= ~EHCI_STS_PCD; 530 } 531 532 sc->sc_bus.intr_context--; 533 534 if (eintrs != 0) { 535 /* Block unprocessed interrupts. */ 536 sc->sc_eintrs &= ~eintrs; 537 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 538 printf("%s: blocking intrs 0x%x\n", 539 USBDEVNAME(sc->sc_bus.bdev), eintrs); 540 } 541 542 return (1); 543 } 544 545 void 546 ehci_pcd_able(ehci_softc_t *sc, int on) 547 { 548 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 549 if (on) 550 sc->sc_eintrs |= EHCI_STS_PCD; 551 else 552 sc->sc_eintrs &= ~EHCI_STS_PCD; 553 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 554 } 555 556 void 557 ehci_pcd_enable(void *v_sc) 558 { 559 ehci_softc_t *sc = v_sc; 560 561 ehci_pcd_able(sc, 1); 562 } 563 564 void 565 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 566 { 567 usbd_pipe_handle pipe; 568 struct ehci_pipe *epipe; 569 u_char *p; 570 int i, m; 571 572 if (xfer == NULL) { 573 /* Just ignore the change. */ 574 return; 575 } 576 577 pipe = xfer->pipe; 578 epipe = (struct ehci_pipe *)pipe; 579 580 p = KERNADDR(&xfer->dmabuf, 0); 581 m = min(sc->sc_noport, xfer->length * 8 - 1); 582 memset(p, 0, xfer->length); 583 for (i = 1; i <= m; i++) { 584 /* Pick out CHANGE bits from the status reg. */ 585 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 586 p[i/8] |= 1 << (i%8); 587 } 588 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 589 xfer->actlen = xfer->length; 590 xfer->status = USBD_NORMAL_COMPLETION; 591 592 usb_transfer_complete(xfer); 593 } 594 595 void 596 ehci_softintr(void *v) 597 { 598 ehci_softc_t *sc = v; 599 struct ehci_xfer *ex; 600 601 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 602 sc->sc_bus.intr_context)); 603 604 sc->sc_bus.intr_context++; 605 606 /* 607 * The only explanation I can think of for why EHCI is as brain dead 608 * as UHCI interrupt-wise is that Intel was involved in both. 609 * An interrupt just tells us that something is done, we have no 610 * clue what, so we need to scan through all active transfers. :-( 611 */ 612 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 613 ehci_check_intr(sc, ex); 614 615 if (sc->sc_softwake) { 616 sc->sc_softwake = 0; 617 wakeup(&sc->sc_softwake); 618 } 619 620 sc->sc_bus.intr_context--; 621 } 622 623 /* Check for an interrupt. */ 624 void 625 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 626 { 627 ehci_soft_qtd_t *sqtd, *lsqtd; 628 u_int32_t status; 629 630 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 631 632 if (ex->sqtdstart == NULL) { 633 printf("ehci_check_intr: sqtdstart=NULL\n"); 634 return; 635 } 636 lsqtd = ex->sqtdend; 637 #ifdef DIAGNOSTIC 638 if (lsqtd == NULL) { 639 printf("ehci_check_intr: sqtd==0\n"); 640 return; 641 } 642 #endif 643 /* 644 * If the last TD is still active we need to check whether there 645 * is a an error somewhere in the middle, or whether there was a 646 * short packet (SPD and not ACTIVE). 647 */ 648 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 649 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 650 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 651 status = le32toh(sqtd->qtd.qtd_status); 652 /* If there's an active QTD the xfer isn't done. */ 653 if (status & EHCI_QTD_ACTIVE) 654 break; 655 /* Any kind of error makes the xfer done. */ 656 if (status & EHCI_QTD_HALTED) 657 goto done; 658 /* We want short packets, and it is short: it's done */ 659 if (EHCI_QTD_SET_BYTES(status) != 0) 660 goto done; 661 } 662 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 663 ex, ex->sqtdstart)); 664 return; 665 } 666 done: 667 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 668 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 669 ehci_idone(ex); 670 } 671 672 void 673 ehci_idone(struct ehci_xfer *ex) 674 { 675 usbd_xfer_handle xfer = &ex->xfer; 676 #ifdef EHCI_DEBUG 677 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 678 #endif 679 ehci_soft_qtd_t *sqtd; 680 u_int32_t status = 0, nstatus; 681 int actlen; 682 683 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 684 #ifdef DIAGNOSTIC 685 { 686 int s = splhigh(); 687 if (ex->isdone) { 688 splx(s); 689 #ifdef EHCI_DEBUG 690 printf("ehci_idone: ex is done!\n "); 691 ehci_dump_exfer(ex); 692 #else 693 printf("ehci_idone: ex=%p is done!\n", ex); 694 #endif 695 return; 696 } 697 ex->isdone = 1; 698 splx(s); 699 } 700 #endif 701 702 if (xfer->status == USBD_CANCELLED || 703 xfer->status == USBD_TIMEOUT) { 704 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 705 return; 706 } 707 708 #ifdef EHCI_DEBUG 709 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 710 if (ehcidebug > 10) 711 ehci_dump_sqtds(ex->sqtdstart); 712 #endif 713 714 /* The transfer is done, compute actual length and status. */ 715 actlen = 0; 716 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 717 nstatus = le32toh(sqtd->qtd.qtd_status); 718 if (nstatus & EHCI_QTD_ACTIVE) 719 break; 720 721 status = nstatus; 722 /* halt is ok if descriptor is last, and complete */ 723 if (sqtd->qtd.qtd_next == EHCI_NULL && 724 EHCI_QTD_GET_BYTES(status) == 0) 725 status &= ~EHCI_QTD_HALTED; 726 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 727 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 728 } 729 730 /* If there are left over TDs we need to update the toggle. */ 731 if (sqtd != NULL) { 732 if (!(xfer->rqflags & URQ_REQUEST)) 733 printf("ehci_idone: need toggle update\n"); 734 #if 0 735 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 736 #endif 737 } 738 739 status &= EHCI_QTD_STATERRS; 740 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 741 xfer->length, actlen, status)); 742 xfer->actlen = actlen; 743 if (status != 0) { 744 #ifdef EHCI_DEBUG 745 char sbuf[128]; 746 747 bitmask_snprintf((u_int32_t)status, 748 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 749 "\7HALTED", 750 sbuf, sizeof(sbuf)); 751 752 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 753 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 754 "status 0x%s\n", 755 xfer->pipe->device->address, 756 xfer->pipe->endpoint->edesc->bEndpointAddress, 757 sbuf)); 758 if (ehcidebug > 2) { 759 ehci_dump_sqh(epipe->sqh); 760 ehci_dump_sqtds(ex->sqtdstart); 761 } 762 #endif 763 if (status == EHCI_QTD_HALTED) 764 xfer->status = USBD_STALLED; 765 else 766 xfer->status = USBD_IOERROR; /* more info XXX */ 767 } else { 768 xfer->status = USBD_NORMAL_COMPLETION; 769 } 770 771 usb_transfer_complete(xfer); 772 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 773 } 774 775 /* 776 * Wait here until controller claims to have an interrupt. 777 * Then call ehci_intr and return. Use timeout to avoid waiting 778 * too long. 779 */ 780 void 781 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 782 { 783 int timo = xfer->timeout; 784 int usecs; 785 u_int32_t intrs; 786 787 xfer->status = USBD_IN_PROGRESS; 788 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 789 usb_delay_ms(&sc->sc_bus, 1); 790 if (sc->sc_dying) 791 break; 792 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 793 sc->sc_eintrs; 794 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 795 #ifdef OHCI_DEBUG 796 if (ehcidebug > 15) 797 ehci_dump_regs(sc); 798 #endif 799 if (intrs) { 800 ehci_intr1(sc); 801 if (xfer->status != USBD_IN_PROGRESS) 802 return; 803 } 804 } 805 806 /* Timeout */ 807 DPRINTF(("ehci_waitintr: timeout\n")); 808 xfer->status = USBD_TIMEOUT; 809 usb_transfer_complete(xfer); 810 /* XXX should free TD */ 811 } 812 813 void 814 ehci_poll(struct usbd_bus *bus) 815 { 816 ehci_softc_t *sc = (ehci_softc_t *)bus; 817 #ifdef EHCI_DEBUG 818 static int last; 819 int new; 820 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 821 if (new != last) { 822 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 823 last = new; 824 } 825 #endif 826 827 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 828 ehci_intr1(sc); 829 } 830 831 int 832 ehci_detach(struct ehci_softc *sc, int flags) 833 { 834 int rv = 0; 835 836 if (sc->sc_child != NULL) 837 rv = config_detach(sc->sc_child, flags); 838 839 if (rv != 0) 840 return (rv); 841 842 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 843 844 if (sc->sc_powerhook != NULL) 845 powerhook_disestablish(sc->sc_powerhook); 846 if (sc->sc_shutdownhook != NULL) 847 shutdownhook_disestablish(sc->sc_shutdownhook); 848 849 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 850 851 /* XXX free other data structures XXX */ 852 853 return (rv); 854 } 855 856 857 int 858 ehci_activate(device_ptr_t self, enum devact act) 859 { 860 struct ehci_softc *sc = (struct ehci_softc *)self; 861 int rv = 0; 862 863 switch (act) { 864 case DVACT_ACTIVATE: 865 return (EOPNOTSUPP); 866 break; 867 868 case DVACT_DEACTIVATE: 869 if (sc->sc_child != NULL) 870 rv = config_deactivate(sc->sc_child); 871 sc->sc_dying = 1; 872 break; 873 } 874 return (rv); 875 } 876 877 /* 878 * Handle suspend/resume. 879 * 880 * We need to switch to polling mode here, because this routine is 881 * called from an intterupt context. This is all right since we 882 * are almost suspended anyway. 883 */ 884 void 885 ehci_power(int why, void *v) 886 { 887 ehci_softc_t *sc = v; 888 //u_int32_t ctl; 889 int s; 890 891 #ifdef EHCI_DEBUG 892 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 893 ehci_dump_regs(sc); 894 #endif 895 896 s = splhardusb(); 897 switch (why) { 898 case PWR_SUSPEND: 899 case PWR_STANDBY: 900 sc->sc_bus.use_polling++; 901 #if 0 902 OOO 903 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 904 if (sc->sc_control == 0) { 905 /* 906 * Preserve register values, in case that APM BIOS 907 * does not recover them. 908 */ 909 sc->sc_control = ctl; 910 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 911 } 912 ctl |= EHCI_HCFS_SUSPEND; 913 OWRITE4(sc, EHCI_CONTROL, ctl); 914 #endif 915 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 916 sc->sc_bus.use_polling--; 917 break; 918 case PWR_RESUME: 919 sc->sc_bus.use_polling++; 920 #if 0 921 OOO 922 /* Some broken BIOSes do not recover these values */ 923 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 924 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 925 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 926 if (sc->sc_intre) 927 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 928 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 929 if (sc->sc_control) 930 ctl = sc->sc_control; 931 else 932 ctl = OREAD4(sc, EHCI_CONTROL); 933 ctl |= EHCI_HCFS_RESUME; 934 OWRITE4(sc, EHCI_CONTROL, ctl); 935 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 936 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 937 OWRITE4(sc, EHCI_CONTROL, ctl); 938 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 939 sc->sc_control = sc->sc_intre = 0; 940 #endif 941 sc->sc_bus.use_polling--; 942 break; 943 case PWR_SOFTSUSPEND: 944 case PWR_SOFTSTANDBY: 945 case PWR_SOFTRESUME: 946 break; 947 } 948 splx(s); 949 } 950 951 /* 952 * Shut down the controller when the system is going down. 953 */ 954 void 955 ehci_shutdown(void *v) 956 { 957 ehci_softc_t *sc = v; 958 959 DPRINTF(("ehci_shutdown: stopping the HC\n")); 960 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 961 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 962 } 963 964 usbd_status 965 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 966 { 967 struct ehci_softc *sc = (struct ehci_softc *)bus; 968 usbd_status err; 969 970 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 971 #ifdef EHCI_DEBUG 972 if (err) 973 printf("ehci_allocm: usb_allocmem()=%d\n", err); 974 #endif 975 return (err); 976 } 977 978 void 979 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 980 { 981 struct ehci_softc *sc = (struct ehci_softc *)bus; 982 983 usb_freemem(&sc->sc_bus, dma); 984 } 985 986 usbd_xfer_handle 987 ehci_allocx(struct usbd_bus *bus) 988 { 989 struct ehci_softc *sc = (struct ehci_softc *)bus; 990 usbd_xfer_handle xfer; 991 992 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 993 if (xfer != NULL) { 994 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 995 #ifdef DIAGNOSTIC 996 if (xfer->busy_free != XFER_FREE) { 997 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 998 xfer->busy_free); 999 } 1000 #endif 1001 } else { 1002 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1003 } 1004 if (xfer != NULL) { 1005 memset(xfer, 0, sizeof (struct ehci_xfer)); 1006 #ifdef DIAGNOSTIC 1007 EXFER(xfer)->isdone = 1; 1008 xfer->busy_free = XFER_BUSY; 1009 #endif 1010 } 1011 return (xfer); 1012 } 1013 1014 void 1015 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1016 { 1017 struct ehci_softc *sc = (struct ehci_softc *)bus; 1018 1019 #ifdef DIAGNOSTIC 1020 if (xfer->busy_free != XFER_BUSY) { 1021 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1022 xfer->busy_free); 1023 return; 1024 } 1025 xfer->busy_free = XFER_FREE; 1026 if (!EXFER(xfer)->isdone) { 1027 printf("ehci_freex: !isdone\n"); 1028 return; 1029 } 1030 #endif 1031 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1032 } 1033 1034 Static void 1035 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1036 { 1037 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1038 1039 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1040 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1041 #ifdef USB_DEBUG 1042 if (ehcidebug) 1043 usbd_dump_pipe(pipe); 1044 #endif 1045 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1046 } 1047 1048 Static void 1049 ehci_noop(usbd_pipe_handle pipe) 1050 { 1051 } 1052 1053 #ifdef EHCI_DEBUG 1054 void 1055 ehci_dump_regs(ehci_softc_t *sc) 1056 { 1057 int i; 1058 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1059 EOREAD4(sc, EHCI_USBCMD), 1060 EOREAD4(sc, EHCI_USBSTS), 1061 EOREAD4(sc, EHCI_USBINTR)); 1062 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1063 EOREAD4(sc, EHCI_FRINDEX), 1064 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1065 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1066 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1067 for (i = 1; i <= sc->sc_noport; i++) 1068 printf("port %d status=0x%08x\n", i, 1069 EOREAD4(sc, EHCI_PORTSC(i))); 1070 } 1071 1072 /* 1073 * Unused function - this is meant to be called from a kernel 1074 * debugger. 1075 */ 1076 void 1077 ehci_dump() 1078 { 1079 ehci_dump_regs(theehci); 1080 } 1081 1082 void 1083 ehci_dump_link(ehci_link_t link, int type) 1084 { 1085 link = le32toh(link); 1086 printf("0x%08x", link); 1087 if (link & EHCI_LINK_TERMINATE) 1088 printf("<T>"); 1089 else { 1090 printf("<"); 1091 if (type) { 1092 switch (EHCI_LINK_TYPE(link)) { 1093 case EHCI_LINK_ITD: printf("ITD"); break; 1094 case EHCI_LINK_QH: printf("QH"); break; 1095 case EHCI_LINK_SITD: printf("SITD"); break; 1096 case EHCI_LINK_FSTN: printf("FSTN"); break; 1097 } 1098 } 1099 printf(">"); 1100 } 1101 } 1102 1103 void 1104 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1105 { 1106 int i; 1107 u_int32_t stop; 1108 1109 stop = 0; 1110 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1111 ehci_dump_sqtd(sqtd); 1112 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1113 } 1114 if (sqtd) 1115 printf("dump aborted, too many TDs\n"); 1116 } 1117 1118 void 1119 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1120 { 1121 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1122 ehci_dump_qtd(&sqtd->qtd); 1123 } 1124 1125 void 1126 ehci_dump_qtd(ehci_qtd_t *qtd) 1127 { 1128 u_int32_t s; 1129 char sbuf[128]; 1130 1131 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1132 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1133 printf("\n"); 1134 s = le32toh(qtd->qtd_status); 1135 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1136 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1137 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1138 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1139 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1140 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1141 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1142 EHCI_QTD_GET_PID(s), sbuf); 1143 for (s = 0; s < 5; s++) 1144 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1145 } 1146 1147 void 1148 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1149 { 1150 ehci_qh_t *qh = &sqh->qh; 1151 u_int32_t endp, endphub; 1152 1153 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1154 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1155 endp = le32toh(qh->qh_endp); 1156 printf(" endp=0x%08x\n", endp); 1157 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1158 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1159 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1160 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1161 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1162 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1163 EHCI_QH_GET_NRL(endp)); 1164 endphub = le32toh(qh->qh_endphub); 1165 printf(" endphub=0x%08x\n", endphub); 1166 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1167 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1168 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1169 EHCI_QH_GET_MULT(endphub)); 1170 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1171 printf("Overlay qTD:\n"); 1172 ehci_dump_qtd(&qh->qh_qtd); 1173 } 1174 1175 #ifdef DIAGNOSTIC 1176 Static void 1177 ehci_dump_exfer(struct ehci_xfer *ex) 1178 { 1179 printf("ehci_dump_exfer: ex=%p\n", ex); 1180 } 1181 #endif 1182 #endif 1183 1184 usbd_status 1185 ehci_open(usbd_pipe_handle pipe) 1186 { 1187 usbd_device_handle dev = pipe->device; 1188 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1189 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1190 u_int8_t addr = dev->address; 1191 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1192 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1193 ehci_soft_qh_t *sqh; 1194 usbd_status err; 1195 int s; 1196 int speed, naks; 1197 1198 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1199 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1200 1201 if (sc->sc_dying) 1202 return (USBD_IOERROR); 1203 1204 if (addr == sc->sc_addr) { 1205 switch (ed->bEndpointAddress) { 1206 case USB_CONTROL_ENDPOINT: 1207 pipe->methods = &ehci_root_ctrl_methods; 1208 break; 1209 case UE_DIR_IN | EHCI_INTR_ENDPT: 1210 pipe->methods = &ehci_root_intr_methods; 1211 break; 1212 default: 1213 return (USBD_INVAL); 1214 } 1215 return (USBD_NORMAL_COMPLETION); 1216 } 1217 1218 /* XXX All this stuff is only valid for async. */ 1219 switch (dev->speed) { 1220 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1221 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1222 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1223 default: panic("ehci_open: bad device speed %d", dev->speed); 1224 } 1225 naks = 8; /* XXX */ 1226 sqh = ehci_alloc_sqh(sc); 1227 if (sqh == NULL) 1228 goto bad0; 1229 /* qh_link filled when the QH is added */ 1230 sqh->qh.qh_endp = htole32( 1231 EHCI_QH_SET_ADDR(addr) | 1232 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1233 EHCI_QH_SET_EPS(speed) | /* XXX */ 1234 /* XXX EHCI_QH_DTC ? */ 1235 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1236 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1237 EHCI_QH_CTL : 0) | 1238 EHCI_QH_SET_NRL(naks) 1239 ); 1240 sqh->qh.qh_endphub = htole32( 1241 EHCI_QH_SET_MULT(1) 1242 /* XXX TT stuff */ 1243 /* XXX interrupt mask */ 1244 ); 1245 sqh->qh.qh_curqtd = EHCI_NULL; 1246 /* Fill the overlay qTD */ 1247 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1248 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1249 sqh->qh.qh_qtd.qtd_status = htole32(0); 1250 1251 epipe->sqh = sqh; 1252 1253 switch (xfertype) { 1254 case UE_CONTROL: 1255 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1256 0, &epipe->u.ctl.reqdma); 1257 #ifdef EHCI_DEBUG 1258 if (err) 1259 printf("ehci_open: usb_allocmem()=%d\n", err); 1260 #endif 1261 if (err) 1262 goto bad1; 1263 pipe->methods = &ehci_device_ctrl_methods; 1264 s = splusb(); 1265 ehci_add_qh(sqh, sc->sc_async_head); 1266 splx(s); 1267 break; 1268 case UE_BULK: 1269 pipe->methods = &ehci_device_bulk_methods; 1270 s = splusb(); 1271 ehci_add_qh(sqh, sc->sc_async_head); 1272 splx(s); 1273 break; 1274 case UE_INTERRUPT: 1275 pipe->methods = &ehci_device_intr_methods; 1276 return (USBD_INVAL); 1277 case UE_ISOCHRONOUS: 1278 pipe->methods = &ehci_device_isoc_methods; 1279 return (USBD_INVAL); 1280 default: 1281 return (USBD_INVAL); 1282 } 1283 return (USBD_NORMAL_COMPLETION); 1284 1285 bad1: 1286 ehci_free_sqh(sc, sqh); 1287 bad0: 1288 return (USBD_NOMEM); 1289 } 1290 1291 /* 1292 * Add an ED to the schedule. Called at splusb(). 1293 */ 1294 void 1295 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1296 { 1297 SPLUSBCHECK; 1298 1299 sqh->next = head->next; 1300 sqh->qh.qh_link = head->qh.qh_link; 1301 head->next = sqh; 1302 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1303 1304 #ifdef EHCI_DEBUG 1305 if (ehcidebug > 5) { 1306 printf("ehci_add_qh:\n"); 1307 ehci_dump_sqh(sqh); 1308 } 1309 #endif 1310 } 1311 1312 /* 1313 * Remove an ED from the schedule. Called at splusb(). 1314 */ 1315 void 1316 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1317 { 1318 ehci_soft_qh_t *p; 1319 1320 SPLUSBCHECK; 1321 /* XXX */ 1322 for (p = head; p != NULL && p->next != sqh; p = p->next) 1323 ; 1324 if (p == NULL) 1325 panic("ehci_rem_qh: ED not found"); 1326 p->next = sqh->next; 1327 p->qh.qh_link = sqh->qh.qh_link; 1328 1329 ehci_sync_hc(sc); 1330 } 1331 1332 void 1333 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1334 { 1335 /* Halt while we are messing. */ 1336 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1337 sqh->qh.qh_curqtd = 0; 1338 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1339 sqh->sqtd = sqtd; 1340 /* Keep toggle, clear the rest, including length. */ 1341 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1342 } 1343 1344 /* 1345 * Ensure that the HC has released all references to the QH. We do this 1346 * by asking for a Async Advance Doorbell interrupt and then we wait for 1347 * the interrupt. 1348 * To make this easier we first obtain exclusive use of the doorbell. 1349 */ 1350 void 1351 ehci_sync_hc(ehci_softc_t *sc) 1352 { 1353 int s, error; 1354 1355 if (sc->sc_dying) { 1356 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1357 return; 1358 } 1359 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1360 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1361 s = splhardusb(); 1362 /* ask for doorbell */ 1363 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1364 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1365 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1366 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1367 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1368 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1369 splx(s); 1370 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1371 #ifdef DIAGNOSTIC 1372 if (error) 1373 printf("ehci_sync_hc: tsleep() = %d\n", error); 1374 #endif 1375 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1376 } 1377 1378 /***********/ 1379 1380 /* 1381 * Data structures and routines to emulate the root hub. 1382 */ 1383 Static usb_device_descriptor_t ehci_devd = { 1384 USB_DEVICE_DESCRIPTOR_SIZE, 1385 UDESC_DEVICE, /* type */ 1386 {0x00, 0x02}, /* USB version */ 1387 UDCLASS_HUB, /* class */ 1388 UDSUBCLASS_HUB, /* subclass */ 1389 UDPROTO_HSHUBSTT, /* protocol */ 1390 64, /* max packet */ 1391 {0},{0},{0x00,0x01}, /* device id */ 1392 1,2,0, /* string indicies */ 1393 1 /* # of configurations */ 1394 }; 1395 1396 Static usb_device_qualifier_t ehci_odevd = { 1397 USB_DEVICE_DESCRIPTOR_SIZE, 1398 UDESC_DEVICE_QUALIFIER, /* type */ 1399 {0x00, 0x02}, /* USB version */ 1400 UDCLASS_HUB, /* class */ 1401 UDSUBCLASS_HUB, /* subclass */ 1402 UDPROTO_FSHUB, /* protocol */ 1403 64, /* max packet */ 1404 1, /* # of configurations */ 1405 0 1406 }; 1407 1408 Static usb_config_descriptor_t ehci_confd = { 1409 USB_CONFIG_DESCRIPTOR_SIZE, 1410 UDESC_CONFIG, 1411 {USB_CONFIG_DESCRIPTOR_SIZE + 1412 USB_INTERFACE_DESCRIPTOR_SIZE + 1413 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1414 1, 1415 1, 1416 0, 1417 UC_SELF_POWERED, 1418 0 /* max power */ 1419 }; 1420 1421 Static usb_interface_descriptor_t ehci_ifcd = { 1422 USB_INTERFACE_DESCRIPTOR_SIZE, 1423 UDESC_INTERFACE, 1424 0, 1425 0, 1426 1, 1427 UICLASS_HUB, 1428 UISUBCLASS_HUB, 1429 UIPROTO_HSHUBSTT, 1430 0 1431 }; 1432 1433 Static usb_endpoint_descriptor_t ehci_endpd = { 1434 USB_ENDPOINT_DESCRIPTOR_SIZE, 1435 UDESC_ENDPOINT, 1436 UE_DIR_IN | EHCI_INTR_ENDPT, 1437 UE_INTERRUPT, 1438 {8, 0}, /* max packet */ 1439 255 1440 }; 1441 1442 Static usb_hub_descriptor_t ehci_hubd = { 1443 USB_HUB_DESCRIPTOR_SIZE, 1444 UDESC_HUB, 1445 0, 1446 {0,0}, 1447 0, 1448 0, 1449 {0}, 1450 }; 1451 1452 Static int 1453 ehci_str(p, l, s) 1454 usb_string_descriptor_t *p; 1455 int l; 1456 char *s; 1457 { 1458 int i; 1459 1460 if (l == 0) 1461 return (0); 1462 p->bLength = 2 * strlen(s) + 2; 1463 if (l == 1) 1464 return (1); 1465 p->bDescriptorType = UDESC_STRING; 1466 l -= 2; 1467 for (i = 0; s[i] && l > 1; i++, l -= 2) 1468 USETW2(p->bString[i], 0, s[i]); 1469 return (2*i+2); 1470 } 1471 1472 /* 1473 * Simulate a hardware hub by handling all the necessary requests. 1474 */ 1475 Static usbd_status 1476 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1477 { 1478 usbd_status err; 1479 1480 /* Insert last in queue. */ 1481 err = usb_insert_transfer(xfer); 1482 if (err) 1483 return (err); 1484 1485 /* Pipe isn't running, start first */ 1486 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1487 } 1488 1489 Static usbd_status 1490 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1491 { 1492 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1493 usb_device_request_t *req; 1494 void *buf = NULL; 1495 int port, i; 1496 int s, len, value, index, l, totlen = 0; 1497 usb_port_status_t ps; 1498 usb_hub_descriptor_t hubd; 1499 usbd_status err; 1500 u_int32_t v; 1501 1502 if (sc->sc_dying) 1503 return (USBD_IOERROR); 1504 1505 #ifdef DIAGNOSTIC 1506 if (!(xfer->rqflags & URQ_REQUEST)) 1507 /* XXX panic */ 1508 return (USBD_INVAL); 1509 #endif 1510 req = &xfer->request; 1511 1512 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1513 req->bmRequestType, req->bRequest)); 1514 1515 len = UGETW(req->wLength); 1516 value = UGETW(req->wValue); 1517 index = UGETW(req->wIndex); 1518 1519 if (len != 0) 1520 buf = KERNADDR(&xfer->dmabuf, 0); 1521 1522 #define C(x,y) ((x) | ((y) << 8)) 1523 switch(C(req->bRequest, req->bmRequestType)) { 1524 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1525 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1526 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1527 /* 1528 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1529 * for the integrated root hub. 1530 */ 1531 break; 1532 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1533 if (len > 0) { 1534 *(u_int8_t *)buf = sc->sc_conf; 1535 totlen = 1; 1536 } 1537 break; 1538 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1539 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1540 switch(value >> 8) { 1541 case UDESC_DEVICE: 1542 if ((value & 0xff) != 0) { 1543 err = USBD_IOERROR; 1544 goto ret; 1545 } 1546 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1547 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1548 memcpy(buf, &ehci_devd, l); 1549 break; 1550 /* 1551 * We can't really operate at another speed, but the spec says 1552 * we need this descriptor. 1553 */ 1554 case UDESC_DEVICE_QUALIFIER: 1555 if ((value & 0xff) != 0) { 1556 err = USBD_IOERROR; 1557 goto ret; 1558 } 1559 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1560 memcpy(buf, &ehci_odevd, l); 1561 break; 1562 /* 1563 * We can't really operate at another speed, but the spec says 1564 * we need this descriptor. 1565 */ 1566 case UDESC_OTHER_SPEED_CONFIGURATION: 1567 case UDESC_CONFIG: 1568 if ((value & 0xff) != 0) { 1569 err = USBD_IOERROR; 1570 goto ret; 1571 } 1572 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1573 memcpy(buf, &ehci_confd, l); 1574 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1575 value >> 8; 1576 buf = (char *)buf + l; 1577 len -= l; 1578 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1579 totlen += l; 1580 memcpy(buf, &ehci_ifcd, l); 1581 buf = (char *)buf + l; 1582 len -= l; 1583 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1584 totlen += l; 1585 memcpy(buf, &ehci_endpd, l); 1586 break; 1587 case UDESC_STRING: 1588 if (len == 0) 1589 break; 1590 *(u_int8_t *)buf = 0; 1591 totlen = 1; 1592 switch (value & 0xff) { 1593 case 1: /* Vendor */ 1594 totlen = ehci_str(buf, len, sc->sc_vendor); 1595 break; 1596 case 2: /* Product */ 1597 totlen = ehci_str(buf, len, "EHCI root hub"); 1598 break; 1599 } 1600 break; 1601 default: 1602 err = USBD_IOERROR; 1603 goto ret; 1604 } 1605 break; 1606 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1607 if (len > 0) { 1608 *(u_int8_t *)buf = 0; 1609 totlen = 1; 1610 } 1611 break; 1612 case C(UR_GET_STATUS, UT_READ_DEVICE): 1613 if (len > 1) { 1614 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1615 totlen = 2; 1616 } 1617 break; 1618 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1619 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1620 if (len > 1) { 1621 USETW(((usb_status_t *)buf)->wStatus, 0); 1622 totlen = 2; 1623 } 1624 break; 1625 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1626 if (value >= USB_MAX_DEVICES) { 1627 err = USBD_IOERROR; 1628 goto ret; 1629 } 1630 sc->sc_addr = value; 1631 break; 1632 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1633 if (value != 0 && value != 1) { 1634 err = USBD_IOERROR; 1635 goto ret; 1636 } 1637 sc->sc_conf = value; 1638 break; 1639 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1640 break; 1641 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1642 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1643 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1644 err = USBD_IOERROR; 1645 goto ret; 1646 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1647 break; 1648 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1649 break; 1650 /* Hub requests */ 1651 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1652 break; 1653 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1654 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1655 "port=%d feature=%d\n", 1656 index, value)); 1657 if (index < 1 || index > sc->sc_noport) { 1658 err = USBD_IOERROR; 1659 goto ret; 1660 } 1661 port = EHCI_PORTSC(index); 1662 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1663 switch(value) { 1664 case UHF_PORT_ENABLE: 1665 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1666 break; 1667 case UHF_PORT_SUSPEND: 1668 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1669 break; 1670 case UHF_PORT_POWER: 1671 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1672 break; 1673 case UHF_PORT_TEST: 1674 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1675 "%d\n", index)); 1676 break; 1677 case UHF_PORT_INDICATOR: 1678 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1679 "%d\n", index)); 1680 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1681 break; 1682 case UHF_C_PORT_CONNECTION: 1683 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1684 break; 1685 case UHF_C_PORT_ENABLE: 1686 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1687 break; 1688 case UHF_C_PORT_SUSPEND: 1689 /* how? */ 1690 break; 1691 case UHF_C_PORT_OVER_CURRENT: 1692 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1693 break; 1694 case UHF_C_PORT_RESET: 1695 sc->sc_isreset = 0; 1696 break; 1697 default: 1698 err = USBD_IOERROR; 1699 goto ret; 1700 } 1701 #if 0 1702 switch(value) { 1703 case UHF_C_PORT_CONNECTION: 1704 case UHF_C_PORT_ENABLE: 1705 case UHF_C_PORT_SUSPEND: 1706 case UHF_C_PORT_OVER_CURRENT: 1707 case UHF_C_PORT_RESET: 1708 /* Enable RHSC interrupt if condition is cleared. */ 1709 if ((OREAD4(sc, port) >> 16) == 0) 1710 ehci_pcd_able(sc, 1); 1711 break; 1712 default: 1713 break; 1714 } 1715 #endif 1716 break; 1717 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1718 if (value != 0) { 1719 err = USBD_IOERROR; 1720 goto ret; 1721 } 1722 hubd = ehci_hubd; 1723 hubd.bNbrPorts = sc->sc_noport; 1724 v = EOREAD4(sc, EHCI_HCSPARAMS); 1725 USETW(hubd.wHubCharacteristics, 1726 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1727 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1728 ? UHD_PORT_IND : 0); 1729 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1730 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1731 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1732 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1733 l = min(len, hubd.bDescLength); 1734 totlen = l; 1735 memcpy(buf, &hubd, l); 1736 break; 1737 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1738 if (len != 4) { 1739 err = USBD_IOERROR; 1740 goto ret; 1741 } 1742 memset(buf, 0, len); /* ? XXX */ 1743 totlen = len; 1744 break; 1745 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1746 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1747 index)); 1748 if (index < 1 || index > sc->sc_noport) { 1749 err = USBD_IOERROR; 1750 goto ret; 1751 } 1752 if (len != 4) { 1753 err = USBD_IOERROR; 1754 goto ret; 1755 } 1756 v = EOREAD4(sc, EHCI_PORTSC(index)); 1757 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1758 v)); 1759 i = UPS_HIGH_SPEED; 1760 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1761 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1762 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1763 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1764 if (v & EHCI_PS_PR) i |= UPS_RESET; 1765 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1766 USETW(ps.wPortStatus, i); 1767 i = 0; 1768 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1769 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1770 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1771 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1772 USETW(ps.wPortChange, i); 1773 l = min(len, sizeof ps); 1774 memcpy(buf, &ps, l); 1775 totlen = l; 1776 break; 1777 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1778 err = USBD_IOERROR; 1779 goto ret; 1780 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1781 break; 1782 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1783 if (index < 1 || index > sc->sc_noport) { 1784 err = USBD_IOERROR; 1785 goto ret; 1786 } 1787 port = EHCI_PORTSC(index); 1788 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1789 switch(value) { 1790 case UHF_PORT_ENABLE: 1791 EOWRITE4(sc, port, v | EHCI_PS_PE); 1792 break; 1793 case UHF_PORT_SUSPEND: 1794 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1795 break; 1796 case UHF_PORT_RESET: 1797 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1798 index)); 1799 if (EHCI_PS_IS_LOWSPEED(v)) { 1800 /* Low speed device, give up ownership. */ 1801 ehci_disown(sc, index, 1); 1802 break; 1803 } 1804 /* Start reset sequence. */ 1805 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1806 EOWRITE4(sc, port, v | EHCI_PS_PR); 1807 /* Wait for reset to complete. */ 1808 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1809 if (sc->sc_dying) { 1810 err = USBD_IOERROR; 1811 goto ret; 1812 } 1813 /* Terminate reset sequence. */ 1814 EOWRITE4(sc, port, v); 1815 /* Wait for HC to complete reset. */ 1816 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1817 if (sc->sc_dying) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 v = EOREAD4(sc, port); 1822 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1823 if (v & EHCI_PS_PR) { 1824 printf("%s: port reset timeout\n", 1825 USBDEVNAME(sc->sc_bus.bdev)); 1826 return (USBD_TIMEOUT); 1827 } 1828 if (!(v & EHCI_PS_PE)) { 1829 /* Not a high speed device, give up ownership.*/ 1830 ehci_disown(sc, index, 0); 1831 break; 1832 } 1833 sc->sc_isreset = 1; 1834 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1835 index, v)); 1836 break; 1837 case UHF_PORT_POWER: 1838 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1839 "%d\n", index)); 1840 EOWRITE4(sc, port, v | EHCI_PS_PP); 1841 break; 1842 case UHF_PORT_TEST: 1843 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1844 "%d\n", index)); 1845 break; 1846 case UHF_PORT_INDICATOR: 1847 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1848 "%d\n", index)); 1849 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1850 break; 1851 default: 1852 err = USBD_IOERROR; 1853 goto ret; 1854 } 1855 break; 1856 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1857 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1858 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1859 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1860 break; 1861 default: 1862 err = USBD_IOERROR; 1863 goto ret; 1864 } 1865 xfer->actlen = totlen; 1866 err = USBD_NORMAL_COMPLETION; 1867 ret: 1868 xfer->status = err; 1869 s = splusb(); 1870 usb_transfer_complete(xfer); 1871 splx(s); 1872 return (USBD_IN_PROGRESS); 1873 } 1874 1875 void 1876 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1877 { 1878 int port; 1879 u_int32_t v; 1880 1881 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1882 #ifdef DIAGNOSTIC 1883 if (sc->sc_npcomp != 0) { 1884 int i = (index-1) / sc->sc_npcomp; 1885 if (i >= sc->sc_ncomp) 1886 printf("%s: strange port\n", 1887 USBDEVNAME(sc->sc_bus.bdev)); 1888 else 1889 printf("%s: handing over %s speed device on " 1890 "port %d to %s\n", 1891 USBDEVNAME(sc->sc_bus.bdev), 1892 lowspeed ? "low" : "full", 1893 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1894 } else { 1895 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1896 } 1897 #endif 1898 port = EHCI_PORTSC(index); 1899 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1900 EOWRITE4(sc, port, v | EHCI_PS_PO); 1901 } 1902 1903 /* Abort a root control request. */ 1904 Static void 1905 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1906 { 1907 /* Nothing to do, all transfers are synchronous. */ 1908 } 1909 1910 /* Close the root pipe. */ 1911 Static void 1912 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1913 { 1914 DPRINTF(("ehci_root_ctrl_close\n")); 1915 /* Nothing to do. */ 1916 } 1917 1918 void 1919 ehci_root_intr_done(usbd_xfer_handle xfer) 1920 { 1921 xfer->hcpriv = NULL; 1922 } 1923 1924 Static usbd_status 1925 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1926 { 1927 usbd_status err; 1928 1929 /* Insert last in queue. */ 1930 err = usb_insert_transfer(xfer); 1931 if (err) 1932 return (err); 1933 1934 /* Pipe isn't running, start first */ 1935 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1936 } 1937 1938 Static usbd_status 1939 ehci_root_intr_start(usbd_xfer_handle xfer) 1940 { 1941 usbd_pipe_handle pipe = xfer->pipe; 1942 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1943 1944 if (sc->sc_dying) 1945 return (USBD_IOERROR); 1946 1947 sc->sc_intrxfer = xfer; 1948 1949 return (USBD_IN_PROGRESS); 1950 } 1951 1952 /* Abort a root interrupt request. */ 1953 Static void 1954 ehci_root_intr_abort(usbd_xfer_handle xfer) 1955 { 1956 int s; 1957 1958 if (xfer->pipe->intrxfer == xfer) { 1959 DPRINTF(("ehci_root_intr_abort: remove\n")); 1960 xfer->pipe->intrxfer = NULL; 1961 } 1962 xfer->status = USBD_CANCELLED; 1963 s = splusb(); 1964 usb_transfer_complete(xfer); 1965 splx(s); 1966 } 1967 1968 /* Close the root pipe. */ 1969 Static void 1970 ehci_root_intr_close(usbd_pipe_handle pipe) 1971 { 1972 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1973 1974 DPRINTF(("ehci_root_intr_close\n")); 1975 1976 sc->sc_intrxfer = NULL; 1977 } 1978 1979 void 1980 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1981 { 1982 xfer->hcpriv = NULL; 1983 } 1984 1985 /************************/ 1986 1987 ehci_soft_qh_t * 1988 ehci_alloc_sqh(ehci_softc_t *sc) 1989 { 1990 ehci_soft_qh_t *sqh; 1991 usbd_status err; 1992 int i, offs; 1993 usb_dma_t dma; 1994 1995 if (sc->sc_freeqhs == NULL) { 1996 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1997 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1998 EHCI_PAGE_SIZE, &dma); 1999 #ifdef EHCI_DEBUG 2000 if (err) 2001 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2002 #endif 2003 if (err) 2004 return (NULL); 2005 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2006 offs = i * EHCI_SQH_SIZE; 2007 sqh = KERNADDR(&dma, offs); 2008 sqh->physaddr = DMAADDR(&dma, offs); 2009 sqh->next = sc->sc_freeqhs; 2010 sc->sc_freeqhs = sqh; 2011 } 2012 } 2013 sqh = sc->sc_freeqhs; 2014 sc->sc_freeqhs = sqh->next; 2015 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2016 sqh->next = NULL; 2017 return (sqh); 2018 } 2019 2020 void 2021 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2022 { 2023 sqh->next = sc->sc_freeqhs; 2024 sc->sc_freeqhs = sqh; 2025 } 2026 2027 ehci_soft_qtd_t * 2028 ehci_alloc_sqtd(ehci_softc_t *sc) 2029 { 2030 ehci_soft_qtd_t *sqtd; 2031 usbd_status err; 2032 int i, offs; 2033 usb_dma_t dma; 2034 int s; 2035 2036 if (sc->sc_freeqtds == NULL) { 2037 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2038 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2039 EHCI_PAGE_SIZE, &dma); 2040 #ifdef EHCI_DEBUG 2041 if (err) 2042 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2043 #endif 2044 if (err) 2045 return (NULL); 2046 s = splusb(); 2047 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2048 offs = i * EHCI_SQTD_SIZE; 2049 sqtd = KERNADDR(&dma, offs); 2050 sqtd->physaddr = DMAADDR(&dma, offs); 2051 sqtd->nextqtd = sc->sc_freeqtds; 2052 sc->sc_freeqtds = sqtd; 2053 } 2054 splx(s); 2055 } 2056 2057 s = splusb(); 2058 sqtd = sc->sc_freeqtds; 2059 sc->sc_freeqtds = sqtd->nextqtd; 2060 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2061 sqtd->nextqtd = NULL; 2062 sqtd->xfer = NULL; 2063 splx(s); 2064 2065 return (sqtd); 2066 } 2067 2068 void 2069 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2070 { 2071 int s; 2072 2073 s = splusb(); 2074 sqtd->nextqtd = sc->sc_freeqtds; 2075 sc->sc_freeqtds = sqtd; 2076 splx(s); 2077 } 2078 2079 usbd_status 2080 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2081 int alen, int rd, usbd_xfer_handle xfer, 2082 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2083 { 2084 ehci_soft_qtd_t *next, *cur; 2085 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2086 u_int32_t qtdstatus; 2087 int len, curlen; 2088 int i; 2089 usb_dma_t *dma = &xfer->dmabuf; 2090 2091 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2092 2093 len = alen; 2094 dataphys = DMAADDR(dma, 0); 2095 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2096 qtdstatus = htole32( 2097 EHCI_QTD_ACTIVE | 2098 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2099 EHCI_QTD_SET_CERR(3) 2100 /* IOC set below */ 2101 /* BYTES set below */ 2102 /* XXX Data toggle */ 2103 ); 2104 2105 cur = ehci_alloc_sqtd(sc); 2106 *sp = cur; 2107 if (cur == NULL) 2108 goto nomem; 2109 for (;;) { 2110 dataphyspage = EHCI_PAGE(dataphys); 2111 /* The EHCI hardware can handle at most 5 pages. */ 2112 if (dataphyslastpage - dataphyspage < 2113 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2114 /* we can handle it in this QTD */ 2115 curlen = len; 2116 } else { 2117 /* must use multiple TDs, fill as much as possible. */ 2118 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2119 EHCI_PAGE_OFFSET(dataphys); 2120 #ifdef DIAGNOSTIC 2121 if (curlen > len) { 2122 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2123 "len=0x%x offs=0x%x\n", curlen, len, 2124 EHCI_PAGE_OFFSET(dataphys)); 2125 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2126 dataphyslastpage, dataphyspage, 2127 dataphys); 2128 curlen = len; 2129 } 2130 #endif 2131 2132 /* XXX true for EHCI? */ 2133 /* the length must be a multiple of the max size */ 2134 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2135 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2136 "curlen=%d\n", curlen)); 2137 #ifdef DIAGNOSTIC 2138 if (curlen == 0) 2139 panic("ehci_alloc_std: curlen == 0"); 2140 #endif 2141 } 2142 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2143 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2144 dataphys, dataphyslastpage, 2145 len, curlen)); 2146 len -= curlen; 2147 2148 if (len != 0) { 2149 next = ehci_alloc_sqtd(sc); 2150 if (next == NULL) 2151 goto nomem; 2152 nextphys = next->physaddr; 2153 } else { 2154 next = NULL; 2155 nextphys = EHCI_NULL; 2156 } 2157 2158 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2159 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2160 if (i != 0) /* use offset only in first buffer */ 2161 a = EHCI_PAGE(a); 2162 cur->qtd.qtd_buffer[i] = htole32(a); 2163 cur->qtd.qtd_buffer_hi[i] = 0; 2164 #ifdef DIAGNOSTIC 2165 if (i >= EHCI_QTD_NBUFFERS) { 2166 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2167 goto nomem; 2168 } 2169 #endif 2170 } 2171 cur->nextqtd = next; 2172 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2173 cur->qtd.qtd_status = 2174 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2175 cur->xfer = xfer; 2176 cur->len = curlen; 2177 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2178 dataphys, dataphys + curlen)); 2179 if (len == 0) 2180 break; 2181 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2182 dataphys += curlen; 2183 cur = next; 2184 } 2185 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2186 *ep = cur; 2187 2188 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2189 *sp, *ep)); 2190 2191 return (USBD_NORMAL_COMPLETION); 2192 2193 nomem: 2194 /* XXX free chain */ 2195 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2196 return (USBD_NOMEM); 2197 } 2198 2199 Static void 2200 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2201 ehci_soft_qtd_t *sqtdend) 2202 { 2203 ehci_soft_qtd_t *p; 2204 int i; 2205 2206 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2207 sqtd, sqtdend)); 2208 2209 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2210 p = sqtd->nextqtd; 2211 ehci_free_sqtd(sc, sqtd); 2212 } 2213 } 2214 2215 /****************/ 2216 2217 /* 2218 * Close a reqular pipe. 2219 * Assumes that there are no pending transactions. 2220 */ 2221 void 2222 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2223 { 2224 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2225 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2226 ehci_soft_qh_t *sqh = epipe->sqh; 2227 int s; 2228 2229 s = splusb(); 2230 ehci_rem_qh(sc, sqh, head); 2231 splx(s); 2232 ehci_free_sqh(sc, epipe->sqh); 2233 } 2234 2235 /* 2236 * Abort a device request. 2237 * If this routine is called at splusb() it guarantees that the request 2238 * will be removed from the hardware scheduling and that the callback 2239 * for it will be called with USBD_CANCELLED status. 2240 * It's impossible to guarantee that the requested transfer will not 2241 * have happened since the hardware runs concurrently. 2242 * If the transaction has already happened we rely on the ordinary 2243 * interrupt processing to process it. 2244 * XXX This is most probably wrong. 2245 */ 2246 void 2247 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2248 { 2249 #define exfer EXFER(xfer) 2250 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2251 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2252 ehci_soft_qh_t *sqh = epipe->sqh; 2253 ehci_soft_qtd_t *sqtd; 2254 ehci_physaddr_t cur; 2255 u_int32_t qhstatus; 2256 int s; 2257 int hit; 2258 2259 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2260 2261 if (sc->sc_dying) { 2262 /* If we're dying, just do the software part. */ 2263 s = splusb(); 2264 xfer->status = status; /* make software ignore it */ 2265 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2266 usb_transfer_complete(xfer); 2267 splx(s); 2268 return; 2269 } 2270 2271 if (xfer->device->bus->intr_context || !curproc) 2272 panic("ehci_abort_xfer: not in process context"); 2273 2274 /* 2275 * Step 1: Make interrupt routine and hardware ignore xfer. 2276 */ 2277 s = splusb(); 2278 xfer->status = status; /* make software ignore it */ 2279 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2280 qhstatus = sqh->qh.qh_qtd.qtd_status; 2281 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2282 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2283 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2284 if (sqtd == exfer->sqtdend) 2285 break; 2286 } 2287 splx(s); 2288 2289 /* 2290 * Step 2: Wait until we know hardware has finished any possible 2291 * use of the xfer. Also make sure the soft interrupt routine 2292 * has run. 2293 */ 2294 ehci_sync_hc(sc); 2295 s = splusb(); 2296 sc->sc_softwake = 1; 2297 usb_schedsoftintr(&sc->sc_bus); 2298 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2299 splx(s); 2300 2301 /* 2302 * Step 3: Remove any vestiges of the xfer from the hardware. 2303 * The complication here is that the hardware may have executed 2304 * beyond the xfer we're trying to abort. So as we're scanning 2305 * the TDs of this xfer we check if the hardware points to 2306 * any of them. 2307 */ 2308 s = splusb(); /* XXX why? */ 2309 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2310 hit = 0; 2311 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2312 hit |= cur == sqtd->physaddr; 2313 if (sqtd == exfer->sqtdend) 2314 break; 2315 } 2316 sqtd = sqtd->nextqtd; 2317 /* Zap curqtd register if hardware pointed inside the xfer. */ 2318 if (hit && sqtd != NULL) { 2319 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2320 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2321 sqh->qh.qh_qtd.qtd_status = qhstatus; 2322 } else { 2323 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2324 } 2325 2326 /* 2327 * Step 4: Execute callback. 2328 */ 2329 #ifdef DIAGNOSTIC 2330 exfer->isdone = 1; 2331 #endif 2332 usb_transfer_complete(xfer); 2333 2334 splx(s); 2335 #undef exfer 2336 } 2337 2338 void 2339 ehci_timeout(void *addr) 2340 { 2341 struct ehci_xfer *exfer = addr; 2342 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2343 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2344 2345 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2346 #ifdef USB_DEBUG 2347 if (ehcidebug > 1) 2348 usbd_dump_pipe(exfer->xfer.pipe); 2349 #endif 2350 2351 if (sc->sc_dying) { 2352 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2353 return; 2354 } 2355 2356 /* Execute the abort in a process context. */ 2357 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2358 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2359 } 2360 2361 void 2362 ehci_timeout_task(void *addr) 2363 { 2364 usbd_xfer_handle xfer = addr; 2365 int s; 2366 2367 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2368 2369 s = splusb(); 2370 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2371 splx(s); 2372 } 2373 2374 /************************/ 2375 2376 Static usbd_status 2377 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2378 { 2379 usbd_status err; 2380 2381 /* Insert last in queue. */ 2382 err = usb_insert_transfer(xfer); 2383 if (err) 2384 return (err); 2385 2386 /* Pipe isn't running, start first */ 2387 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2388 } 2389 2390 Static usbd_status 2391 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2392 { 2393 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2394 usbd_status err; 2395 2396 if (sc->sc_dying) 2397 return (USBD_IOERROR); 2398 2399 #ifdef DIAGNOSTIC 2400 if (!(xfer->rqflags & URQ_REQUEST)) { 2401 /* XXX panic */ 2402 printf("ehci_device_ctrl_transfer: not a request\n"); 2403 return (USBD_INVAL); 2404 } 2405 #endif 2406 2407 err = ehci_device_request(xfer); 2408 if (err) 2409 return (err); 2410 2411 if (sc->sc_bus.use_polling) 2412 ehci_waitintr(sc, xfer); 2413 return (USBD_IN_PROGRESS); 2414 } 2415 2416 void 2417 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2418 { 2419 struct ehci_xfer *ex = EXFER(xfer); 2420 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2421 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2422 2423 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2424 2425 #ifdef DIAGNOSTIC 2426 if (!(xfer->rqflags & URQ_REQUEST)) { 2427 panic("ehci_ctrl_done: not a request"); 2428 } 2429 #endif 2430 2431 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2432 ehci_del_intr_list(ex); /* remove from active list */ 2433 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2434 } 2435 2436 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2437 } 2438 2439 /* Abort a device control request. */ 2440 Static void 2441 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2442 { 2443 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2444 ehci_abort_xfer(xfer, USBD_CANCELLED); 2445 } 2446 2447 /* Close a device control pipe. */ 2448 Static void 2449 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2450 { 2451 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2452 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2453 2454 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2455 ehci_close_pipe(pipe, sc->sc_async_head); 2456 } 2457 2458 usbd_status 2459 ehci_device_request(usbd_xfer_handle xfer) 2460 { 2461 #define exfer EXFER(xfer) 2462 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2463 usb_device_request_t *req = &xfer->request; 2464 usbd_device_handle dev = epipe->pipe.device; 2465 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2466 int addr = dev->address; 2467 ehci_soft_qtd_t *setup, *stat, *next; 2468 ehci_soft_qh_t *sqh; 2469 int isread; 2470 int len; 2471 usbd_status err; 2472 int s; 2473 2474 isread = req->bmRequestType & UT_READ; 2475 len = UGETW(req->wLength); 2476 2477 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2478 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2479 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2480 UGETW(req->wIndex), len, addr, 2481 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2482 2483 setup = ehci_alloc_sqtd(sc); 2484 if (setup == NULL) { 2485 err = USBD_NOMEM; 2486 goto bad1; 2487 } 2488 stat = ehci_alloc_sqtd(sc); 2489 if (stat == NULL) { 2490 err = USBD_NOMEM; 2491 goto bad2; 2492 } 2493 2494 sqh = epipe->sqh; 2495 epipe->u.ctl.length = len; 2496 2497 /* XXX 2498 * Since we're messing with the QH we must know the HC is in sync. 2499 * This needs to go away since it slows down control transfers. 2500 * Removing it entails: 2501 * - fill the QH only once with addr & wMaxPacketSize 2502 * - put the correct data toggles in the qtds and set DTC 2503 */ 2504 /* ehci_sync_hc(sc); */ 2505 /* Update device address and length since they may have changed. */ 2506 /* XXX This only needs to be done once, but it's too early in open. */ 2507 /* XXXX Should not touch ED here! */ 2508 sqh->qh.qh_endp = 2509 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2510 htole32( 2511 EHCI_QH_SET_ADDR(addr) | 2512 /* EHCI_QH_DTC | */ 2513 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2514 ); 2515 /* Clear toggle */ 2516 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2517 2518 /* Set up data transaction */ 2519 if (len != 0) { 2520 ehci_soft_qtd_t *end; 2521 2522 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2523 &next, &end); 2524 if (err) 2525 goto bad3; 2526 end->nextqtd = stat; 2527 end->qtd.qtd_next = 2528 end->qtd.qtd_altnext = htole32(stat->physaddr); 2529 /* Start toggle at 1. */ 2530 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2531 } else { 2532 next = stat; 2533 } 2534 2535 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2536 2537 setup->qtd.qtd_status = htole32( 2538 EHCI_QTD_ACTIVE | 2539 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2540 EHCI_QTD_SET_CERR(3) | 2541 EHCI_QTD_SET_BYTES(sizeof *req) 2542 ); 2543 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2544 setup->qtd.qtd_buffer_hi[0] = 0; 2545 setup->nextqtd = next; 2546 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2547 setup->xfer = xfer; 2548 setup->len = sizeof *req; 2549 2550 stat->qtd.qtd_status = htole32( 2551 EHCI_QTD_ACTIVE | 2552 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2553 EHCI_QTD_SET_CERR(3) | 2554 EHCI_QTD_IOC 2555 ); 2556 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2557 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2558 stat->nextqtd = NULL; 2559 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2560 stat->xfer = xfer; 2561 stat->len = 0; 2562 2563 #ifdef EHCI_DEBUG 2564 if (ehcidebug > 5) { 2565 DPRINTF(("ehci_device_request:\n")); 2566 ehci_dump_sqh(sqh); 2567 ehci_dump_sqtds(setup); 2568 } 2569 #endif 2570 2571 exfer->sqtdstart = setup; 2572 exfer->sqtdend = stat; 2573 #ifdef DIAGNOSTIC 2574 if (!exfer->isdone) { 2575 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2576 } 2577 exfer->isdone = 0; 2578 #endif 2579 2580 /* Insert qTD in QH list. */ 2581 s = splusb(); 2582 ehci_set_qh_qtd(sqh, setup); 2583 if (xfer->timeout && !sc->sc_bus.use_polling) { 2584 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2585 ehci_timeout, xfer); 2586 } 2587 ehci_add_intr_list(sc, exfer); 2588 xfer->status = USBD_IN_PROGRESS; 2589 splx(s); 2590 2591 #ifdef EHCI_DEBUG 2592 if (ehcidebug > 10) { 2593 DPRINTF(("ehci_device_request: status=%x\n", 2594 EOREAD4(sc, EHCI_USBSTS))); 2595 delay(10000); 2596 ehci_dump_regs(sc); 2597 ehci_dump_sqh(sc->sc_async_head); 2598 ehci_dump_sqh(sqh); 2599 ehci_dump_sqtds(setup); 2600 } 2601 #endif 2602 2603 return (USBD_NORMAL_COMPLETION); 2604 2605 bad3: 2606 ehci_free_sqtd(sc, stat); 2607 bad2: 2608 ehci_free_sqtd(sc, setup); 2609 bad1: 2610 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2611 xfer->status = err; 2612 usb_transfer_complete(xfer); 2613 return (err); 2614 #undef exfer 2615 } 2616 2617 /************************/ 2618 2619 Static usbd_status 2620 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2621 { 2622 usbd_status err; 2623 2624 /* Insert last in queue. */ 2625 err = usb_insert_transfer(xfer); 2626 if (err) 2627 return (err); 2628 2629 /* Pipe isn't running, start first */ 2630 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2631 } 2632 2633 usbd_status 2634 ehci_device_bulk_start(usbd_xfer_handle xfer) 2635 { 2636 #define exfer EXFER(xfer) 2637 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2638 usbd_device_handle dev = epipe->pipe.device; 2639 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2640 ehci_soft_qtd_t *data, *dataend; 2641 ehci_soft_qh_t *sqh; 2642 usbd_status err; 2643 int len, isread, endpt; 2644 int s; 2645 2646 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2647 xfer, xfer->length, xfer->flags)); 2648 2649 if (sc->sc_dying) 2650 return (USBD_IOERROR); 2651 2652 #ifdef DIAGNOSTIC 2653 if (xfer->rqflags & URQ_REQUEST) 2654 panic("ehci_device_bulk_transfer: a request"); 2655 #endif 2656 2657 len = xfer->length; 2658 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2659 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2660 sqh = epipe->sqh; 2661 2662 epipe->u.bulk.length = len; 2663 2664 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2665 &dataend); 2666 if (err) { 2667 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2668 xfer->status = err; 2669 usb_transfer_complete(xfer); 2670 return (err); 2671 } 2672 2673 #ifdef EHCI_DEBUG 2674 if (ehcidebug > 5) { 2675 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2676 ehci_dump_sqh(sqh); 2677 ehci_dump_sqtds(data); 2678 } 2679 #endif 2680 2681 /* Set up interrupt info. */ 2682 exfer->sqtdstart = data; 2683 exfer->sqtdend = dataend; 2684 #ifdef DIAGNOSTIC 2685 if (!exfer->isdone) { 2686 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2687 } 2688 exfer->isdone = 0; 2689 #endif 2690 2691 s = splusb(); 2692 ehci_set_qh_qtd(sqh, data); 2693 if (xfer->timeout && !sc->sc_bus.use_polling) { 2694 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2695 ehci_timeout, xfer); 2696 } 2697 ehci_add_intr_list(sc, exfer); 2698 xfer->status = USBD_IN_PROGRESS; 2699 splx(s); 2700 2701 #ifdef EHCI_DEBUG 2702 if (ehcidebug > 10) { 2703 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2704 delay(10000); 2705 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2706 ehci_dump_regs(sc); 2707 #if 0 2708 printf("async_head:\n"); 2709 ehci_dump_sqh(sc->sc_async_head); 2710 #endif 2711 printf("sqh:\n"); 2712 ehci_dump_sqh(sqh); 2713 ehci_dump_sqtds(data); 2714 } 2715 #endif 2716 2717 if (sc->sc_bus.use_polling) 2718 ehci_waitintr(sc, xfer); 2719 2720 return (USBD_IN_PROGRESS); 2721 #undef exfer 2722 } 2723 2724 Static void 2725 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2726 { 2727 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2728 ehci_abort_xfer(xfer, USBD_CANCELLED); 2729 } 2730 2731 /* 2732 * Close a device bulk pipe. 2733 */ 2734 Static void 2735 ehci_device_bulk_close(usbd_pipe_handle pipe) 2736 { 2737 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2738 2739 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2740 ehci_close_pipe(pipe, sc->sc_async_head); 2741 } 2742 2743 void 2744 ehci_device_bulk_done(usbd_xfer_handle xfer) 2745 { 2746 struct ehci_xfer *ex = EXFER(xfer); 2747 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2748 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2749 2750 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2751 xfer, xfer->actlen)); 2752 2753 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2754 ehci_del_intr_list(ex); /* remove from active list */ 2755 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2756 } 2757 2758 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2759 } 2760 2761 /************************/ 2762 2763 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2764 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2765 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2766 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2767 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2768 2769 /************************/ 2770 2771 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2772 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2773 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2774 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2775 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2776
Indexes created Wed Sep 24 05:09:52 GMT 2025