ehci.c revision 1.51
1 /* $NetBSD: ehci.c,v 1.51 2003/12/29 08:17:10 toshii Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart (at) augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 1.0 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/docs/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.51 2003/12/29 08:17:10 toshii Exp $"); 56 57 #include "ohci.h" 58 #include "uhci.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/malloc.h> 64 #include <sys/device.h> 65 #include <sys/select.h> 66 #include <sys/proc.h> 67 #include <sys/queue.h> 68 69 #include <machine/bus.h> 70 #include <machine/endian.h> 71 72 #include <dev/usb/usb.h> 73 #include <dev/usb/usbdi.h> 74 #include <dev/usb/usbdivar.h> 75 #include <dev/usb/usb_mem.h> 76 #include <dev/usb/usb_quirks.h> 77 78 #include <dev/usb/ehcireg.h> 79 #include <dev/usb/ehcivar.h> 80 81 #ifdef EHCI_DEBUG 82 #define DPRINTF(x) if (ehcidebug) printf x 83 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 84 int ehcidebug = 0; 85 #ifndef __NetBSD__ 86 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 87 #endif 88 #else 89 #define DPRINTF(x) 90 #define DPRINTFN(n,x) 91 #endif 92 93 struct ehci_pipe { 94 struct usbd_pipe pipe; 95 ehci_soft_qh_t *sqh; 96 union { 97 ehci_soft_qtd_t *qtd; 98 /* ehci_soft_itd_t *itd; */ 99 } tail; 100 union { 101 /* Control pipe */ 102 struct { 103 usb_dma_t reqdma; 104 u_int length; 105 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 106 } ctl; 107 /* Interrupt pipe */ 108 /* XXX */ 109 /* Bulk pipe */ 110 struct { 111 u_int length; 112 } bulk; 113 /* Iso pipe */ 114 /* XXX */ 115 } u; 116 }; 117 118 Static void ehci_shutdown(void *); 119 Static void ehci_power(int, void *); 120 121 Static usbd_status ehci_open(usbd_pipe_handle); 122 Static void ehci_poll(struct usbd_bus *); 123 Static void ehci_softintr(void *); 124 Static int ehci_intr1(ehci_softc_t *); 125 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 126 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 127 Static void ehci_idone(struct ehci_xfer *); 128 Static void ehci_timeout(void *); 129 Static void ehci_timeout_task(void *); 130 131 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 132 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 133 134 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 135 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 136 137 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 139 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ehci_root_ctrl_close(usbd_pipe_handle); 141 Static void ehci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 145 Static void ehci_root_intr_abort(usbd_xfer_handle); 146 Static void ehci_root_intr_close(usbd_pipe_handle); 147 Static void ehci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 151 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ehci_device_ctrl_close(usbd_pipe_handle); 153 Static void ehci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 157 Static void ehci_device_bulk_abort(usbd_xfer_handle); 158 Static void ehci_device_bulk_close(usbd_pipe_handle); 159 Static void ehci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 163 Static void ehci_device_intr_abort(usbd_xfer_handle); 164 Static void ehci_device_intr_close(usbd_pipe_handle); 165 Static void ehci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 169 Static void ehci_device_isoc_abort(usbd_xfer_handle); 170 Static void ehci_device_isoc_close(usbd_pipe_handle); 171 Static void ehci_device_isoc_done(usbd_xfer_handle); 172 173 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 174 Static void ehci_noop(usbd_pipe_handle pipe); 175 176 Static int ehci_str(usb_string_descriptor_t *, int, char *); 177 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 178 Static void ehci_pcd_able(ehci_softc_t *, int); 179 Static void ehci_pcd_enable(void *); 180 Static void ehci_disown(ehci_softc_t *, int, int); 181 182 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 183 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 184 185 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 186 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 187 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 188 ehci_softc_t *, int, int, usbd_xfer_handle, 189 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 190 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 191 ehci_soft_qtd_t *); 192 193 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 194 195 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 196 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 197 ehci_soft_qh_t *); 198 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 199 Static void ehci_sync_hc(ehci_softc_t *); 200 201 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 202 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 203 204 #ifdef EHCI_DEBUG 205 Static void ehci_dump_regs(ehci_softc_t *); 206 Static void ehci_dump(void); 207 Static ehci_softc_t *theehci; 208 Static void ehci_dump_link(ehci_link_t, int); 209 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 210 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 211 Static void ehci_dump_qtd(ehci_qtd_t *); 212 Static void ehci_dump_sqh(ehci_soft_qh_t *); 213 #ifdef DIAGNOSTIC 214 Static void ehci_dump_exfer(struct ehci_xfer *); 215 #endif 216 #endif 217 218 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 219 220 #define EHCI_INTR_ENDPT 1 221 222 #define ehci_add_intr_list(sc, ex) \ 223 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 224 #define ehci_del_intr_list(ex) \ 225 do { \ 226 LIST_REMOVE((ex), inext); \ 227 (ex)->inext.le_prev = NULL; \ 228 } while (0) 229 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 230 231 Static struct usbd_bus_methods ehci_bus_methods = { 232 ehci_open, 233 ehci_softintr, 234 ehci_poll, 235 ehci_allocm, 236 ehci_freem, 237 ehci_allocx, 238 ehci_freex, 239 }; 240 241 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 242 ehci_root_ctrl_transfer, 243 ehci_root_ctrl_start, 244 ehci_root_ctrl_abort, 245 ehci_root_ctrl_close, 246 ehci_noop, 247 ehci_root_ctrl_done, 248 }; 249 250 Static struct usbd_pipe_methods ehci_root_intr_methods = { 251 ehci_root_intr_transfer, 252 ehci_root_intr_start, 253 ehci_root_intr_abort, 254 ehci_root_intr_close, 255 ehci_noop, 256 ehci_root_intr_done, 257 }; 258 259 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 260 ehci_device_ctrl_transfer, 261 ehci_device_ctrl_start, 262 ehci_device_ctrl_abort, 263 ehci_device_ctrl_close, 264 ehci_noop, 265 ehci_device_ctrl_done, 266 }; 267 268 Static struct usbd_pipe_methods ehci_device_intr_methods = { 269 ehci_device_intr_transfer, 270 ehci_device_intr_start, 271 ehci_device_intr_abort, 272 ehci_device_intr_close, 273 ehci_device_clear_toggle, 274 ehci_device_intr_done, 275 }; 276 277 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 278 ehci_device_bulk_transfer, 279 ehci_device_bulk_start, 280 ehci_device_bulk_abort, 281 ehci_device_bulk_close, 282 ehci_device_clear_toggle, 283 ehci_device_bulk_done, 284 }; 285 286 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 287 ehci_device_isoc_transfer, 288 ehci_device_isoc_start, 289 ehci_device_isoc_abort, 290 ehci_device_isoc_close, 291 ehci_noop, 292 ehci_device_isoc_done, 293 }; 294 295 usbd_status 296 ehci_init(ehci_softc_t *sc) 297 { 298 u_int32_t version, sparams, cparams, hcr; 299 u_int i; 300 usbd_status err; 301 ehci_soft_qh_t *sqh; 302 303 DPRINTF(("ehci_init: start\n")); 304 #ifdef EHCI_DEBUG 305 theehci = sc; 306 #endif 307 308 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 309 310 version = EREAD2(sc, EHCI_HCIVERSION); 311 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 312 version >> 8, version & 0xff); 313 314 sparams = EREAD4(sc, EHCI_HCSPARAMS); 315 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 316 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 317 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 318 aprint_error("%s: wrong number of companions (%d != %d)\n", 319 USBDEVNAME(sc->sc_bus.bdev), 320 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 321 #if NOHCI == 0 || NUHCI == 0 322 aprint_error("%s: ohci or uhci probably not configured\n", 323 USBDEVNAME(sc->sc_bus.bdev)); 324 #endif 325 return (USBD_IOERROR); 326 } 327 if (sc->sc_ncomp > 0) { 328 aprint_normal("%s: companion controller%s, %d port%s each:", 329 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 330 EHCI_HCS_N_PCC(sparams), 331 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 332 for (i = 0; i < sc->sc_ncomp; i++) 333 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 334 aprint_normal("\n"); 335 } 336 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 337 cparams = EREAD4(sc, EHCI_HCCPARAMS); 338 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 339 340 if (EHCI_HCC_64BIT(cparams)) { 341 /* MUST clear segment register if 64 bit capable. */ 342 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 343 } 344 345 sc->sc_bus.usbrev = USBREV_2_0; 346 347 /* Reset the controller */ 348 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 349 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 350 usb_delay_ms(&sc->sc_bus, 1); 351 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 352 for (i = 0; i < 100; i++) { 353 usb_delay_ms(&sc->sc_bus, 1); 354 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 355 if (!hcr) 356 break; 357 } 358 if (hcr) { 359 aprint_error("%s: reset timeout\n", 360 USBDEVNAME(sc->sc_bus.bdev)); 361 return (USBD_IOERROR); 362 } 363 364 /* frame list size at default, read back what we got and use that */ 365 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 366 case 0: sc->sc_flsize = 1024*4; break; 367 case 1: sc->sc_flsize = 512*4; break; 368 case 2: sc->sc_flsize = 256*4; break; 369 case 3: return (USBD_IOERROR); 370 } 371 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 372 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 373 if (err) 374 return (err); 375 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 376 377 /* Set up the bus struct. */ 378 sc->sc_bus.methods = &ehci_bus_methods; 379 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 380 381 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 382 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 383 384 sc->sc_eintrs = EHCI_NORMAL_INTRS; 385 386 /* Allocate dummy QH that starts the async list. */ 387 sqh = ehci_alloc_sqh(sc); 388 if (sqh == NULL) { 389 err = USBD_NOMEM; 390 goto bad1; 391 } 392 /* Fill the QH */ 393 sqh->qh.qh_endp = 394 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 395 sqh->qh.qh_link = 396 htole32(sqh->physaddr | EHCI_LINK_QH); 397 sqh->qh.qh_curqtd = EHCI_NULL; 398 sqh->next = NULL; 399 /* Fill the overlay qTD */ 400 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 401 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 402 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 403 sqh->sqtd = NULL; 404 #ifdef EHCI_DEBUG 405 if (ehcidebug) { 406 ehci_dump_sqh(sqh); 407 } 408 #endif 409 410 /* Point to async list */ 411 sc->sc_async_head = sqh; 412 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 413 414 usb_callout_init(sc->sc_tmo_pcd); 415 416 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 417 418 /* Enable interrupts */ 419 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 420 421 /* Turn on controller */ 422 EOWRITE4(sc, EHCI_USBCMD, 423 EHCI_CMD_ITC_8 | /* 8 microframes */ 424 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 425 EHCI_CMD_ASE | 426 /* EHCI_CMD_PSE | */ 427 EHCI_CMD_RS); 428 429 /* Take over port ownership */ 430 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 431 432 for (i = 0; i < 100; i++) { 433 usb_delay_ms(&sc->sc_bus, 1); 434 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 435 if (!hcr) 436 break; 437 } 438 if (hcr) { 439 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 440 return (USBD_IOERROR); 441 } 442 443 return (USBD_NORMAL_COMPLETION); 444 445 #if 0 446 bad2: 447 ehci_free_sqh(sc, sc->sc_async_head); 448 #endif 449 bad1: 450 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 451 return (err); 452 } 453 454 int 455 ehci_intr(void *v) 456 { 457 ehci_softc_t *sc = v; 458 459 if (sc == NULL || sc->sc_dying) 460 return (0); 461 462 /* If we get an interrupt while polling, then just ignore it. */ 463 if (sc->sc_bus.use_polling) { 464 #ifdef DIAGNOSTIC 465 printf("ehci_intr: ignored interrupt while polling\n"); 466 #endif 467 return (0); 468 } 469 470 return (ehci_intr1(sc)); 471 } 472 473 Static int 474 ehci_intr1(ehci_softc_t *sc) 475 { 476 u_int32_t intrs, eintrs; 477 478 DPRINTFN(20,("ehci_intr1: enter\n")); 479 480 /* In case the interrupt occurs before initialization has completed. */ 481 if (sc == NULL) { 482 #ifdef DIAGNOSTIC 483 printf("ehci_intr: sc == NULL\n"); 484 #endif 485 return (0); 486 } 487 488 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 489 490 if (!intrs) 491 return (0); 492 493 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 494 eintrs = intrs & sc->sc_eintrs; 495 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 496 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 497 (u_int)eintrs)); 498 if (!eintrs) 499 return (0); 500 501 sc->sc_bus.intr_context++; 502 sc->sc_bus.no_intrs++; 503 if (eintrs & EHCI_STS_IAA) { 504 DPRINTF(("ehci_intr1: door bell\n")); 505 wakeup(&sc->sc_async_head); 506 eintrs &= ~EHCI_STS_IAA; 507 } 508 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 509 DPRINTFN(5,("ehci_intr1: %s %s\n", 510 eintrs & EHCI_STS_INT ? "INT" : "", 511 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 512 usb_schedsoftintr(&sc->sc_bus); 513 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 514 } 515 if (eintrs & EHCI_STS_HSE) { 516 printf("%s: unrecoverable error, controller halted\n", 517 USBDEVNAME(sc->sc_bus.bdev)); 518 /* XXX what else */ 519 } 520 if (eintrs & EHCI_STS_PCD) { 521 ehci_pcd(sc, sc->sc_intrxfer); 522 /* 523 * Disable PCD interrupt for now, because it will be 524 * on until the port has been reset. 525 */ 526 ehci_pcd_able(sc, 0); 527 /* Do not allow RHSC interrupts > 1 per second */ 528 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 529 eintrs &= ~EHCI_STS_PCD; 530 } 531 532 sc->sc_bus.intr_context--; 533 534 if (eintrs != 0) { 535 /* Block unprocessed interrupts. */ 536 sc->sc_eintrs &= ~eintrs; 537 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 538 printf("%s: blocking intrs 0x%x\n", 539 USBDEVNAME(sc->sc_bus.bdev), eintrs); 540 } 541 542 return (1); 543 } 544 545 void 546 ehci_pcd_able(ehci_softc_t *sc, int on) 547 { 548 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 549 if (on) 550 sc->sc_eintrs |= EHCI_STS_PCD; 551 else 552 sc->sc_eintrs &= ~EHCI_STS_PCD; 553 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 554 } 555 556 void 557 ehci_pcd_enable(void *v_sc) 558 { 559 ehci_softc_t *sc = v_sc; 560 561 ehci_pcd_able(sc, 1); 562 } 563 564 void 565 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 566 { 567 usbd_pipe_handle pipe; 568 u_char *p; 569 int i, m; 570 571 if (xfer == NULL) { 572 /* Just ignore the change. */ 573 return; 574 } 575 576 pipe = xfer->pipe; 577 578 p = KERNADDR(&xfer->dmabuf, 0); 579 m = min(sc->sc_noport, xfer->length * 8 - 1); 580 memset(p, 0, xfer->length); 581 for (i = 1; i <= m; i++) { 582 /* Pick out CHANGE bits from the status reg. */ 583 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 584 p[i/8] |= 1 << (i%8); 585 } 586 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 587 xfer->actlen = xfer->length; 588 xfer->status = USBD_NORMAL_COMPLETION; 589 590 usb_transfer_complete(xfer); 591 } 592 593 void 594 ehci_softintr(void *v) 595 { 596 ehci_softc_t *sc = v; 597 struct ehci_xfer *ex; 598 599 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 600 sc->sc_bus.intr_context)); 601 602 sc->sc_bus.intr_context++; 603 604 /* 605 * The only explanation I can think of for why EHCI is as brain dead 606 * as UHCI interrupt-wise is that Intel was involved in both. 607 * An interrupt just tells us that something is done, we have no 608 * clue what, so we need to scan through all active transfers. :-( 609 */ 610 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 611 ehci_check_intr(sc, ex); 612 613 if (sc->sc_softwake) { 614 sc->sc_softwake = 0; 615 wakeup(&sc->sc_softwake); 616 } 617 618 sc->sc_bus.intr_context--; 619 } 620 621 /* Check for an interrupt. */ 622 void 623 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 624 { 625 ehci_soft_qtd_t *sqtd, *lsqtd; 626 u_int32_t status; 627 628 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 629 630 if (ex->sqtdstart == NULL) { 631 printf("ehci_check_intr: sqtdstart=NULL\n"); 632 return; 633 } 634 lsqtd = ex->sqtdend; 635 #ifdef DIAGNOSTIC 636 if (lsqtd == NULL) { 637 printf("ehci_check_intr: sqtd==0\n"); 638 return; 639 } 640 #endif 641 /* 642 * If the last TD is still active we need to check whether there 643 * is a an error somewhere in the middle, or whether there was a 644 * short packet (SPD and not ACTIVE). 645 */ 646 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 647 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 648 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 649 status = le32toh(sqtd->qtd.qtd_status); 650 /* If there's an active QTD the xfer isn't done. */ 651 if (status & EHCI_QTD_ACTIVE) 652 break; 653 /* Any kind of error makes the xfer done. */ 654 if (status & EHCI_QTD_HALTED) 655 goto done; 656 /* We want short packets, and it is short: it's done */ 657 if (EHCI_QTD_SET_BYTES(status) != 0) 658 goto done; 659 } 660 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 661 ex, ex->sqtdstart)); 662 return; 663 } 664 done: 665 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 666 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 667 ehci_idone(ex); 668 } 669 670 void 671 ehci_idone(struct ehci_xfer *ex) 672 { 673 usbd_xfer_handle xfer = &ex->xfer; 674 #ifdef EHCI_DEBUG 675 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 676 #endif 677 ehci_soft_qtd_t *sqtd; 678 u_int32_t status = 0, nstatus; 679 int actlen; 680 681 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 682 #ifdef DIAGNOSTIC 683 { 684 int s = splhigh(); 685 if (ex->isdone) { 686 splx(s); 687 #ifdef EHCI_DEBUG 688 printf("ehci_idone: ex is done!\n "); 689 ehci_dump_exfer(ex); 690 #else 691 printf("ehci_idone: ex=%p is done!\n", ex); 692 #endif 693 return; 694 } 695 ex->isdone = 1; 696 splx(s); 697 } 698 #endif 699 700 if (xfer->status == USBD_CANCELLED || 701 xfer->status == USBD_TIMEOUT) { 702 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 703 return; 704 } 705 706 #ifdef EHCI_DEBUG 707 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 708 if (ehcidebug > 10) 709 ehci_dump_sqtds(ex->sqtdstart); 710 #endif 711 712 /* The transfer is done, compute actual length and status. */ 713 actlen = 0; 714 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 715 nstatus = le32toh(sqtd->qtd.qtd_status); 716 if (nstatus & EHCI_QTD_ACTIVE) 717 break; 718 719 status = nstatus; 720 /* halt is ok if descriptor is last, and complete */ 721 if (sqtd->qtd.qtd_next == EHCI_NULL && 722 EHCI_QTD_GET_BYTES(status) == 0) 723 status &= ~EHCI_QTD_HALTED; 724 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 725 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 726 } 727 728 /* If there are left over TDs we need to update the toggle. */ 729 if (sqtd != NULL) { 730 if (!(xfer->rqflags & URQ_REQUEST)) 731 printf("ehci_idone: need toggle update\n"); 732 #if 0 733 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 734 #endif 735 } 736 737 status &= EHCI_QTD_STATERRS; 738 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 739 xfer->length, actlen, status)); 740 xfer->actlen = actlen; 741 if (status != 0) { 742 #ifdef EHCI_DEBUG 743 char sbuf[128]; 744 745 bitmask_snprintf((u_int32_t)status, 746 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 747 "\7HALTED", 748 sbuf, sizeof(sbuf)); 749 750 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 751 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 752 "status 0x%s\n", 753 xfer->pipe->device->address, 754 xfer->pipe->endpoint->edesc->bEndpointAddress, 755 sbuf)); 756 if (ehcidebug > 2) { 757 ehci_dump_sqh(epipe->sqh); 758 ehci_dump_sqtds(ex->sqtdstart); 759 } 760 #endif 761 if (status == EHCI_QTD_HALTED) 762 xfer->status = USBD_STALLED; 763 else 764 xfer->status = USBD_IOERROR; /* more info XXX */ 765 } else { 766 xfer->status = USBD_NORMAL_COMPLETION; 767 } 768 769 usb_transfer_complete(xfer); 770 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 771 } 772 773 /* 774 * Wait here until controller claims to have an interrupt. 775 * Then call ehci_intr and return. Use timeout to avoid waiting 776 * too long. 777 */ 778 void 779 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 780 { 781 int timo = xfer->timeout; 782 int usecs; 783 u_int32_t intrs; 784 785 xfer->status = USBD_IN_PROGRESS; 786 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 787 usb_delay_ms(&sc->sc_bus, 1); 788 if (sc->sc_dying) 789 break; 790 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 791 sc->sc_eintrs; 792 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 793 #ifdef OHCI_DEBUG 794 if (ehcidebug > 15) 795 ehci_dump_regs(sc); 796 #endif 797 if (intrs) { 798 ehci_intr1(sc); 799 if (xfer->status != USBD_IN_PROGRESS) 800 return; 801 } 802 } 803 804 /* Timeout */ 805 DPRINTF(("ehci_waitintr: timeout\n")); 806 xfer->status = USBD_TIMEOUT; 807 usb_transfer_complete(xfer); 808 /* XXX should free TD */ 809 } 810 811 void 812 ehci_poll(struct usbd_bus *bus) 813 { 814 ehci_softc_t *sc = (ehci_softc_t *)bus; 815 #ifdef EHCI_DEBUG 816 static int last; 817 int new; 818 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 819 if (new != last) { 820 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 821 last = new; 822 } 823 #endif 824 825 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 826 ehci_intr1(sc); 827 } 828 829 int 830 ehci_detach(struct ehci_softc *sc, int flags) 831 { 832 int rv = 0; 833 834 if (sc->sc_child != NULL) 835 rv = config_detach(sc->sc_child, flags); 836 837 if (rv != 0) 838 return (rv); 839 840 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 841 842 if (sc->sc_powerhook != NULL) 843 powerhook_disestablish(sc->sc_powerhook); 844 if (sc->sc_shutdownhook != NULL) 845 shutdownhook_disestablish(sc->sc_shutdownhook); 846 847 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 848 849 /* XXX free other data structures XXX */ 850 851 return (rv); 852 } 853 854 855 int 856 ehci_activate(device_ptr_t self, enum devact act) 857 { 858 struct ehci_softc *sc = (struct ehci_softc *)self; 859 int rv = 0; 860 861 switch (act) { 862 case DVACT_ACTIVATE: 863 return (EOPNOTSUPP); 864 865 case DVACT_DEACTIVATE: 866 if (sc->sc_child != NULL) 867 rv = config_deactivate(sc->sc_child); 868 sc->sc_dying = 1; 869 break; 870 } 871 return (rv); 872 } 873 874 /* 875 * Handle suspend/resume. 876 * 877 * We need to switch to polling mode here, because this routine is 878 * called from an intterupt context. This is all right since we 879 * are almost suspended anyway. 880 */ 881 void 882 ehci_power(int why, void *v) 883 { 884 ehci_softc_t *sc = v; 885 //u_int32_t ctl; 886 int s; 887 888 #ifdef EHCI_DEBUG 889 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 890 ehci_dump_regs(sc); 891 #endif 892 893 s = splhardusb(); 894 switch (why) { 895 case PWR_SUSPEND: 896 case PWR_STANDBY: 897 sc->sc_bus.use_polling++; 898 #if 0 899 OOO 900 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 901 if (sc->sc_control == 0) { 902 /* 903 * Preserve register values, in case that APM BIOS 904 * does not recover them. 905 */ 906 sc->sc_control = ctl; 907 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 908 } 909 ctl |= EHCI_HCFS_SUSPEND; 910 OWRITE4(sc, EHCI_CONTROL, ctl); 911 #endif 912 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 913 sc->sc_bus.use_polling--; 914 break; 915 case PWR_RESUME: 916 sc->sc_bus.use_polling++; 917 #if 0 918 OOO 919 /* Some broken BIOSes do not recover these values */ 920 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 921 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 922 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 923 if (sc->sc_intre) 924 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 925 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 926 if (sc->sc_control) 927 ctl = sc->sc_control; 928 else 929 ctl = OREAD4(sc, EHCI_CONTROL); 930 ctl |= EHCI_HCFS_RESUME; 931 OWRITE4(sc, EHCI_CONTROL, ctl); 932 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 933 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 934 OWRITE4(sc, EHCI_CONTROL, ctl); 935 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 936 sc->sc_control = sc->sc_intre = 0; 937 #endif 938 sc->sc_bus.use_polling--; 939 break; 940 case PWR_SOFTSUSPEND: 941 case PWR_SOFTSTANDBY: 942 case PWR_SOFTRESUME: 943 break; 944 } 945 splx(s); 946 } 947 948 /* 949 * Shut down the controller when the system is going down. 950 */ 951 void 952 ehci_shutdown(void *v) 953 { 954 ehci_softc_t *sc = v; 955 956 DPRINTF(("ehci_shutdown: stopping the HC\n")); 957 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 958 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 959 } 960 961 usbd_status 962 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 963 { 964 struct ehci_softc *sc = (struct ehci_softc *)bus; 965 usbd_status err; 966 967 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 968 #ifdef EHCI_DEBUG 969 if (err) 970 printf("ehci_allocm: usb_allocmem()=%d\n", err); 971 #endif 972 return (err); 973 } 974 975 void 976 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 977 { 978 struct ehci_softc *sc = (struct ehci_softc *)bus; 979 980 usb_freemem(&sc->sc_bus, dma); 981 } 982 983 usbd_xfer_handle 984 ehci_allocx(struct usbd_bus *bus) 985 { 986 struct ehci_softc *sc = (struct ehci_softc *)bus; 987 usbd_xfer_handle xfer; 988 989 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 990 if (xfer != NULL) { 991 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 992 #ifdef DIAGNOSTIC 993 if (xfer->busy_free != XFER_FREE) { 994 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 995 xfer->busy_free); 996 } 997 #endif 998 } else { 999 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1000 } 1001 if (xfer != NULL) { 1002 memset(xfer, 0, sizeof (struct ehci_xfer)); 1003 #ifdef DIAGNOSTIC 1004 EXFER(xfer)->isdone = 1; 1005 xfer->busy_free = XFER_BUSY; 1006 #endif 1007 } 1008 return (xfer); 1009 } 1010 1011 void 1012 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1013 { 1014 struct ehci_softc *sc = (struct ehci_softc *)bus; 1015 1016 #ifdef DIAGNOSTIC 1017 if (xfer->busy_free != XFER_BUSY) { 1018 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1019 xfer->busy_free); 1020 return; 1021 } 1022 xfer->busy_free = XFER_FREE; 1023 if (!EXFER(xfer)->isdone) { 1024 printf("ehci_freex: !isdone\n"); 1025 return; 1026 } 1027 #endif 1028 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1029 } 1030 1031 Static void 1032 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1033 { 1034 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1035 1036 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1037 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1038 #ifdef USB_DEBUG 1039 if (ehcidebug) 1040 usbd_dump_pipe(pipe); 1041 #endif 1042 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1043 } 1044 1045 Static void 1046 ehci_noop(usbd_pipe_handle pipe) 1047 { 1048 } 1049 1050 #ifdef EHCI_DEBUG 1051 void 1052 ehci_dump_regs(ehci_softc_t *sc) 1053 { 1054 int i; 1055 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1056 EOREAD4(sc, EHCI_USBCMD), 1057 EOREAD4(sc, EHCI_USBSTS), 1058 EOREAD4(sc, EHCI_USBINTR)); 1059 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1060 EOREAD4(sc, EHCI_FRINDEX), 1061 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1062 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1063 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1064 for (i = 1; i <= sc->sc_noport; i++) 1065 printf("port %d status=0x%08x\n", i, 1066 EOREAD4(sc, EHCI_PORTSC(i))); 1067 } 1068 1069 /* 1070 * Unused function - this is meant to be called from a kernel 1071 * debugger. 1072 */ 1073 void 1074 ehci_dump() 1075 { 1076 ehci_dump_regs(theehci); 1077 } 1078 1079 void 1080 ehci_dump_link(ehci_link_t link, int type) 1081 { 1082 link = le32toh(link); 1083 printf("0x%08x", link); 1084 if (link & EHCI_LINK_TERMINATE) 1085 printf("<T>"); 1086 else { 1087 printf("<"); 1088 if (type) { 1089 switch (EHCI_LINK_TYPE(link)) { 1090 case EHCI_LINK_ITD: printf("ITD"); break; 1091 case EHCI_LINK_QH: printf("QH"); break; 1092 case EHCI_LINK_SITD: printf("SITD"); break; 1093 case EHCI_LINK_FSTN: printf("FSTN"); break; 1094 } 1095 } 1096 printf(">"); 1097 } 1098 } 1099 1100 void 1101 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1102 { 1103 int i; 1104 u_int32_t stop; 1105 1106 stop = 0; 1107 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1108 ehci_dump_sqtd(sqtd); 1109 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1110 } 1111 if (sqtd) 1112 printf("dump aborted, too many TDs\n"); 1113 } 1114 1115 void 1116 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1117 { 1118 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1119 ehci_dump_qtd(&sqtd->qtd); 1120 } 1121 1122 void 1123 ehci_dump_qtd(ehci_qtd_t *qtd) 1124 { 1125 u_int32_t s; 1126 char sbuf[128]; 1127 1128 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1129 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1130 printf("\n"); 1131 s = le32toh(qtd->qtd_status); 1132 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1133 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1134 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1135 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1136 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1137 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1138 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1139 EHCI_QTD_GET_PID(s), sbuf); 1140 for (s = 0; s < 5; s++) 1141 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1142 } 1143 1144 void 1145 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1146 { 1147 ehci_qh_t *qh = &sqh->qh; 1148 u_int32_t endp, endphub; 1149 1150 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1151 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1152 endp = le32toh(qh->qh_endp); 1153 printf(" endp=0x%08x\n", endp); 1154 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1155 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1156 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1157 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1158 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1159 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1160 EHCI_QH_GET_NRL(endp)); 1161 endphub = le32toh(qh->qh_endphub); 1162 printf(" endphub=0x%08x\n", endphub); 1163 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1164 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1165 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1166 EHCI_QH_GET_MULT(endphub)); 1167 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1168 printf("Overlay qTD:\n"); 1169 ehci_dump_qtd(&qh->qh_qtd); 1170 } 1171 1172 #ifdef DIAGNOSTIC 1173 Static void 1174 ehci_dump_exfer(struct ehci_xfer *ex) 1175 { 1176 printf("ehci_dump_exfer: ex=%p\n", ex); 1177 } 1178 #endif 1179 #endif 1180 1181 usbd_status 1182 ehci_open(usbd_pipe_handle pipe) 1183 { 1184 usbd_device_handle dev = pipe->device; 1185 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1186 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1187 u_int8_t addr = dev->address; 1188 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1189 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1190 ehci_soft_qh_t *sqh; 1191 usbd_status err; 1192 int s; 1193 int speed, naks; 1194 1195 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1196 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1197 1198 if (sc->sc_dying) 1199 return (USBD_IOERROR); 1200 1201 if (addr == sc->sc_addr) { 1202 switch (ed->bEndpointAddress) { 1203 case USB_CONTROL_ENDPOINT: 1204 pipe->methods = &ehci_root_ctrl_methods; 1205 break; 1206 case UE_DIR_IN | EHCI_INTR_ENDPT: 1207 pipe->methods = &ehci_root_intr_methods; 1208 break; 1209 default: 1210 return (USBD_INVAL); 1211 } 1212 return (USBD_NORMAL_COMPLETION); 1213 } 1214 1215 /* XXX All this stuff is only valid for async. */ 1216 switch (dev->speed) { 1217 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1218 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1219 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1220 default: panic("ehci_open: bad device speed %d", dev->speed); 1221 } 1222 naks = 8; /* XXX */ 1223 sqh = ehci_alloc_sqh(sc); 1224 if (sqh == NULL) 1225 goto bad0; 1226 /* qh_link filled when the QH is added */ 1227 sqh->qh.qh_endp = htole32( 1228 EHCI_QH_SET_ADDR(addr) | 1229 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1230 EHCI_QH_SET_EPS(speed) | /* XXX */ 1231 /* XXX EHCI_QH_DTC ? */ 1232 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1233 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1234 EHCI_QH_CTL : 0) | 1235 EHCI_QH_SET_NRL(naks) 1236 ); 1237 sqh->qh.qh_endphub = htole32( 1238 EHCI_QH_SET_MULT(1) 1239 /* XXX TT stuff */ 1240 /* XXX interrupt mask */ 1241 ); 1242 sqh->qh.qh_curqtd = EHCI_NULL; 1243 /* Fill the overlay qTD */ 1244 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1245 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1246 sqh->qh.qh_qtd.qtd_status = htole32(0); 1247 1248 epipe->sqh = sqh; 1249 1250 switch (xfertype) { 1251 case UE_CONTROL: 1252 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1253 0, &epipe->u.ctl.reqdma); 1254 #ifdef EHCI_DEBUG 1255 if (err) 1256 printf("ehci_open: usb_allocmem()=%d\n", err); 1257 #endif 1258 if (err) 1259 goto bad1; 1260 pipe->methods = &ehci_device_ctrl_methods; 1261 s = splusb(); 1262 ehci_add_qh(sqh, sc->sc_async_head); 1263 splx(s); 1264 break; 1265 case UE_BULK: 1266 pipe->methods = &ehci_device_bulk_methods; 1267 s = splusb(); 1268 ehci_add_qh(sqh, sc->sc_async_head); 1269 splx(s); 1270 break; 1271 case UE_INTERRUPT: 1272 pipe->methods = &ehci_device_intr_methods; 1273 return (USBD_INVAL); 1274 case UE_ISOCHRONOUS: 1275 pipe->methods = &ehci_device_isoc_methods; 1276 return (USBD_INVAL); 1277 default: 1278 return (USBD_INVAL); 1279 } 1280 return (USBD_NORMAL_COMPLETION); 1281 1282 bad1: 1283 ehci_free_sqh(sc, sqh); 1284 bad0: 1285 return (USBD_NOMEM); 1286 } 1287 1288 /* 1289 * Add an ED to the schedule. Called at splusb(). 1290 */ 1291 void 1292 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1293 { 1294 SPLUSBCHECK; 1295 1296 sqh->next = head->next; 1297 sqh->qh.qh_link = head->qh.qh_link; 1298 head->next = sqh; 1299 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1300 1301 #ifdef EHCI_DEBUG 1302 if (ehcidebug > 5) { 1303 printf("ehci_add_qh:\n"); 1304 ehci_dump_sqh(sqh); 1305 } 1306 #endif 1307 } 1308 1309 /* 1310 * Remove an ED from the schedule. Called at splusb(). 1311 */ 1312 void 1313 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1314 { 1315 ehci_soft_qh_t *p; 1316 1317 SPLUSBCHECK; 1318 /* XXX */ 1319 for (p = head; p != NULL && p->next != sqh; p = p->next) 1320 ; 1321 if (p == NULL) 1322 panic("ehci_rem_qh: ED not found"); 1323 p->next = sqh->next; 1324 p->qh.qh_link = sqh->qh.qh_link; 1325 1326 ehci_sync_hc(sc); 1327 } 1328 1329 void 1330 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1331 { 1332 /* Halt while we are messing. */ 1333 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1334 sqh->qh.qh_curqtd = 0; 1335 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1336 sqh->sqtd = sqtd; 1337 /* Keep toggle, clear the rest, including length. */ 1338 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1339 } 1340 1341 /* 1342 * Ensure that the HC has released all references to the QH. We do this 1343 * by asking for a Async Advance Doorbell interrupt and then we wait for 1344 * the interrupt. 1345 * To make this easier we first obtain exclusive use of the doorbell. 1346 */ 1347 void 1348 ehci_sync_hc(ehci_softc_t *sc) 1349 { 1350 int s, error; 1351 1352 if (sc->sc_dying) { 1353 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1354 return; 1355 } 1356 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1357 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1358 s = splhardusb(); 1359 /* ask for doorbell */ 1360 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1361 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1362 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1363 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1364 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1365 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1366 splx(s); 1367 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1368 #ifdef DIAGNOSTIC 1369 if (error) 1370 printf("ehci_sync_hc: tsleep() = %d\n", error); 1371 #endif 1372 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1373 } 1374 1375 /***********/ 1376 1377 /* 1378 * Data structures and routines to emulate the root hub. 1379 */ 1380 Static usb_device_descriptor_t ehci_devd = { 1381 USB_DEVICE_DESCRIPTOR_SIZE, 1382 UDESC_DEVICE, /* type */ 1383 {0x00, 0x02}, /* USB version */ 1384 UDCLASS_HUB, /* class */ 1385 UDSUBCLASS_HUB, /* subclass */ 1386 UDPROTO_HSHUBSTT, /* protocol */ 1387 64, /* max packet */ 1388 {0},{0},{0x00,0x01}, /* device id */ 1389 1,2,0, /* string indicies */ 1390 1 /* # of configurations */ 1391 }; 1392 1393 Static usb_device_qualifier_t ehci_odevd = { 1394 USB_DEVICE_DESCRIPTOR_SIZE, 1395 UDESC_DEVICE_QUALIFIER, /* type */ 1396 {0x00, 0x02}, /* USB version */ 1397 UDCLASS_HUB, /* class */ 1398 UDSUBCLASS_HUB, /* subclass */ 1399 UDPROTO_FSHUB, /* protocol */ 1400 64, /* max packet */ 1401 1, /* # of configurations */ 1402 0 1403 }; 1404 1405 Static usb_config_descriptor_t ehci_confd = { 1406 USB_CONFIG_DESCRIPTOR_SIZE, 1407 UDESC_CONFIG, 1408 {USB_CONFIG_DESCRIPTOR_SIZE + 1409 USB_INTERFACE_DESCRIPTOR_SIZE + 1410 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1411 1, 1412 1, 1413 0, 1414 UC_SELF_POWERED, 1415 0 /* max power */ 1416 }; 1417 1418 Static usb_interface_descriptor_t ehci_ifcd = { 1419 USB_INTERFACE_DESCRIPTOR_SIZE, 1420 UDESC_INTERFACE, 1421 0, 1422 0, 1423 1, 1424 UICLASS_HUB, 1425 UISUBCLASS_HUB, 1426 UIPROTO_HSHUBSTT, 1427 0 1428 }; 1429 1430 Static usb_endpoint_descriptor_t ehci_endpd = { 1431 USB_ENDPOINT_DESCRIPTOR_SIZE, 1432 UDESC_ENDPOINT, 1433 UE_DIR_IN | EHCI_INTR_ENDPT, 1434 UE_INTERRUPT, 1435 {8, 0}, /* max packet */ 1436 255 1437 }; 1438 1439 Static usb_hub_descriptor_t ehci_hubd = { 1440 USB_HUB_DESCRIPTOR_SIZE, 1441 UDESC_HUB, 1442 0, 1443 {0,0}, 1444 0, 1445 0, 1446 {0}, 1447 }; 1448 1449 Static int 1450 ehci_str(p, l, s) 1451 usb_string_descriptor_t *p; 1452 int l; 1453 char *s; 1454 { 1455 int i; 1456 1457 if (l == 0) 1458 return (0); 1459 p->bLength = 2 * strlen(s) + 2; 1460 if (l == 1) 1461 return (1); 1462 p->bDescriptorType = UDESC_STRING; 1463 l -= 2; 1464 for (i = 0; s[i] && l > 1; i++, l -= 2) 1465 USETW2(p->bString[i], 0, s[i]); 1466 return (2*i+2); 1467 } 1468 1469 /* 1470 * Simulate a hardware hub by handling all the necessary requests. 1471 */ 1472 Static usbd_status 1473 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1474 { 1475 usbd_status err; 1476 1477 /* Insert last in queue. */ 1478 err = usb_insert_transfer(xfer); 1479 if (err) 1480 return (err); 1481 1482 /* Pipe isn't running, start first */ 1483 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1484 } 1485 1486 Static usbd_status 1487 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1488 { 1489 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1490 usb_device_request_t *req; 1491 void *buf = NULL; 1492 int port, i; 1493 int s, len, value, index, l, totlen = 0; 1494 usb_port_status_t ps; 1495 usb_hub_descriptor_t hubd; 1496 usbd_status err; 1497 u_int32_t v; 1498 1499 if (sc->sc_dying) 1500 return (USBD_IOERROR); 1501 1502 #ifdef DIAGNOSTIC 1503 if (!(xfer->rqflags & URQ_REQUEST)) 1504 /* XXX panic */ 1505 return (USBD_INVAL); 1506 #endif 1507 req = &xfer->request; 1508 1509 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1510 req->bmRequestType, req->bRequest)); 1511 1512 len = UGETW(req->wLength); 1513 value = UGETW(req->wValue); 1514 index = UGETW(req->wIndex); 1515 1516 if (len != 0) 1517 buf = KERNADDR(&xfer->dmabuf, 0); 1518 1519 #define C(x,y) ((x) | ((y) << 8)) 1520 switch(C(req->bRequest, req->bmRequestType)) { 1521 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1522 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1523 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1524 /* 1525 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1526 * for the integrated root hub. 1527 */ 1528 break; 1529 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1530 if (len > 0) { 1531 *(u_int8_t *)buf = sc->sc_conf; 1532 totlen = 1; 1533 } 1534 break; 1535 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1536 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1537 switch(value >> 8) { 1538 case UDESC_DEVICE: 1539 if ((value & 0xff) != 0) { 1540 err = USBD_IOERROR; 1541 goto ret; 1542 } 1543 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1544 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1545 memcpy(buf, &ehci_devd, l); 1546 break; 1547 /* 1548 * We can't really operate at another speed, but the spec says 1549 * we need this descriptor. 1550 */ 1551 case UDESC_DEVICE_QUALIFIER: 1552 if ((value & 0xff) != 0) { 1553 err = USBD_IOERROR; 1554 goto ret; 1555 } 1556 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1557 memcpy(buf, &ehci_odevd, l); 1558 break; 1559 /* 1560 * We can't really operate at another speed, but the spec says 1561 * we need this descriptor. 1562 */ 1563 case UDESC_OTHER_SPEED_CONFIGURATION: 1564 case UDESC_CONFIG: 1565 if ((value & 0xff) != 0) { 1566 err = USBD_IOERROR; 1567 goto ret; 1568 } 1569 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1570 memcpy(buf, &ehci_confd, l); 1571 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1572 value >> 8; 1573 buf = (char *)buf + l; 1574 len -= l; 1575 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1576 totlen += l; 1577 memcpy(buf, &ehci_ifcd, l); 1578 buf = (char *)buf + l; 1579 len -= l; 1580 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1581 totlen += l; 1582 memcpy(buf, &ehci_endpd, l); 1583 break; 1584 case UDESC_STRING: 1585 if (len == 0) 1586 break; 1587 *(u_int8_t *)buf = 0; 1588 totlen = 1; 1589 switch (value & 0xff) { 1590 case 1: /* Vendor */ 1591 totlen = ehci_str(buf, len, sc->sc_vendor); 1592 break; 1593 case 2: /* Product */ 1594 totlen = ehci_str(buf, len, "EHCI root hub"); 1595 break; 1596 } 1597 break; 1598 default: 1599 err = USBD_IOERROR; 1600 goto ret; 1601 } 1602 break; 1603 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1604 if (len > 0) { 1605 *(u_int8_t *)buf = 0; 1606 totlen = 1; 1607 } 1608 break; 1609 case C(UR_GET_STATUS, UT_READ_DEVICE): 1610 if (len > 1) { 1611 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1612 totlen = 2; 1613 } 1614 break; 1615 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1616 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1617 if (len > 1) { 1618 USETW(((usb_status_t *)buf)->wStatus, 0); 1619 totlen = 2; 1620 } 1621 break; 1622 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1623 if (value >= USB_MAX_DEVICES) { 1624 err = USBD_IOERROR; 1625 goto ret; 1626 } 1627 sc->sc_addr = value; 1628 break; 1629 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1630 if (value != 0 && value != 1) { 1631 err = USBD_IOERROR; 1632 goto ret; 1633 } 1634 sc->sc_conf = value; 1635 break; 1636 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1637 break; 1638 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1639 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1640 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1641 err = USBD_IOERROR; 1642 goto ret; 1643 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1644 break; 1645 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1646 break; 1647 /* Hub requests */ 1648 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1649 break; 1650 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1651 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1652 "port=%d feature=%d\n", 1653 index, value)); 1654 if (index < 1 || index > sc->sc_noport) { 1655 err = USBD_IOERROR; 1656 goto ret; 1657 } 1658 port = EHCI_PORTSC(index); 1659 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1660 switch(value) { 1661 case UHF_PORT_ENABLE: 1662 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1663 break; 1664 case UHF_PORT_SUSPEND: 1665 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1666 break; 1667 case UHF_PORT_POWER: 1668 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1669 break; 1670 case UHF_PORT_TEST: 1671 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1672 "%d\n", index)); 1673 break; 1674 case UHF_PORT_INDICATOR: 1675 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1676 "%d\n", index)); 1677 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1678 break; 1679 case UHF_C_PORT_CONNECTION: 1680 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1681 break; 1682 case UHF_C_PORT_ENABLE: 1683 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1684 break; 1685 case UHF_C_PORT_SUSPEND: 1686 /* how? */ 1687 break; 1688 case UHF_C_PORT_OVER_CURRENT: 1689 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1690 break; 1691 case UHF_C_PORT_RESET: 1692 sc->sc_isreset = 0; 1693 break; 1694 default: 1695 err = USBD_IOERROR; 1696 goto ret; 1697 } 1698 #if 0 1699 switch(value) { 1700 case UHF_C_PORT_CONNECTION: 1701 case UHF_C_PORT_ENABLE: 1702 case UHF_C_PORT_SUSPEND: 1703 case UHF_C_PORT_OVER_CURRENT: 1704 case UHF_C_PORT_RESET: 1705 /* Enable RHSC interrupt if condition is cleared. */ 1706 if ((OREAD4(sc, port) >> 16) == 0) 1707 ehci_pcd_able(sc, 1); 1708 break; 1709 default: 1710 break; 1711 } 1712 #endif 1713 break; 1714 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1715 if ((value & 0xff) != 0) { 1716 err = USBD_IOERROR; 1717 goto ret; 1718 } 1719 hubd = ehci_hubd; 1720 hubd.bNbrPorts = sc->sc_noport; 1721 v = EOREAD4(sc, EHCI_HCSPARAMS); 1722 USETW(hubd.wHubCharacteristics, 1723 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1724 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1725 ? UHD_PORT_IND : 0); 1726 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1727 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1728 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1729 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1730 l = min(len, hubd.bDescLength); 1731 totlen = l; 1732 memcpy(buf, &hubd, l); 1733 break; 1734 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1735 if (len != 4) { 1736 err = USBD_IOERROR; 1737 goto ret; 1738 } 1739 memset(buf, 0, len); /* ? XXX */ 1740 totlen = len; 1741 break; 1742 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1743 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1744 index)); 1745 if (index < 1 || index > sc->sc_noport) { 1746 err = USBD_IOERROR; 1747 goto ret; 1748 } 1749 if (len != 4) { 1750 err = USBD_IOERROR; 1751 goto ret; 1752 } 1753 v = EOREAD4(sc, EHCI_PORTSC(index)); 1754 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1755 v)); 1756 i = UPS_HIGH_SPEED; 1757 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1758 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1759 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1760 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1761 if (v & EHCI_PS_PR) i |= UPS_RESET; 1762 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1763 USETW(ps.wPortStatus, i); 1764 i = 0; 1765 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1766 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1767 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1768 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1769 USETW(ps.wPortChange, i); 1770 l = min(len, sizeof ps); 1771 memcpy(buf, &ps, l); 1772 totlen = l; 1773 break; 1774 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1775 err = USBD_IOERROR; 1776 goto ret; 1777 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1778 break; 1779 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1780 if (index < 1 || index > sc->sc_noport) { 1781 err = USBD_IOERROR; 1782 goto ret; 1783 } 1784 port = EHCI_PORTSC(index); 1785 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1786 switch(value) { 1787 case UHF_PORT_ENABLE: 1788 EOWRITE4(sc, port, v | EHCI_PS_PE); 1789 break; 1790 case UHF_PORT_SUSPEND: 1791 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1792 break; 1793 case UHF_PORT_RESET: 1794 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1795 index)); 1796 if (EHCI_PS_IS_LOWSPEED(v)) { 1797 /* Low speed device, give up ownership. */ 1798 ehci_disown(sc, index, 1); 1799 break; 1800 } 1801 /* Start reset sequence. */ 1802 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1803 EOWRITE4(sc, port, v | EHCI_PS_PR); 1804 /* Wait for reset to complete. */ 1805 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1806 if (sc->sc_dying) { 1807 err = USBD_IOERROR; 1808 goto ret; 1809 } 1810 /* Terminate reset sequence. */ 1811 EOWRITE4(sc, port, v); 1812 /* Wait for HC to complete reset. */ 1813 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1814 if (sc->sc_dying) { 1815 err = USBD_IOERROR; 1816 goto ret; 1817 } 1818 v = EOREAD4(sc, port); 1819 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1820 if (v & EHCI_PS_PR) { 1821 printf("%s: port reset timeout\n", 1822 USBDEVNAME(sc->sc_bus.bdev)); 1823 return (USBD_TIMEOUT); 1824 } 1825 if (!(v & EHCI_PS_PE)) { 1826 /* Not a high speed device, give up ownership.*/ 1827 ehci_disown(sc, index, 0); 1828 break; 1829 } 1830 sc->sc_isreset = 1; 1831 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1832 index, v)); 1833 break; 1834 case UHF_PORT_POWER: 1835 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1836 "%d\n", index)); 1837 EOWRITE4(sc, port, v | EHCI_PS_PP); 1838 break; 1839 case UHF_PORT_TEST: 1840 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1841 "%d\n", index)); 1842 break; 1843 case UHF_PORT_INDICATOR: 1844 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1845 "%d\n", index)); 1846 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1847 break; 1848 default: 1849 err = USBD_IOERROR; 1850 goto ret; 1851 } 1852 break; 1853 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1854 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1855 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1856 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1857 break; 1858 default: 1859 err = USBD_IOERROR; 1860 goto ret; 1861 } 1862 xfer->actlen = totlen; 1863 err = USBD_NORMAL_COMPLETION; 1864 ret: 1865 xfer->status = err; 1866 s = splusb(); 1867 usb_transfer_complete(xfer); 1868 splx(s); 1869 return (USBD_IN_PROGRESS); 1870 } 1871 1872 void 1873 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1874 { 1875 int port; 1876 u_int32_t v; 1877 1878 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1879 #ifdef DIAGNOSTIC 1880 if (sc->sc_npcomp != 0) { 1881 int i = (index-1) / sc->sc_npcomp; 1882 if (i >= sc->sc_ncomp) 1883 printf("%s: strange port\n", 1884 USBDEVNAME(sc->sc_bus.bdev)); 1885 else 1886 printf("%s: handing over %s speed device on " 1887 "port %d to %s\n", 1888 USBDEVNAME(sc->sc_bus.bdev), 1889 lowspeed ? "low" : "full", 1890 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1891 } else { 1892 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1893 } 1894 #endif 1895 port = EHCI_PORTSC(index); 1896 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1897 EOWRITE4(sc, port, v | EHCI_PS_PO); 1898 } 1899 1900 /* Abort a root control request. */ 1901 Static void 1902 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1903 { 1904 /* Nothing to do, all transfers are synchronous. */ 1905 } 1906 1907 /* Close the root pipe. */ 1908 Static void 1909 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1910 { 1911 DPRINTF(("ehci_root_ctrl_close\n")); 1912 /* Nothing to do. */ 1913 } 1914 1915 void 1916 ehci_root_intr_done(usbd_xfer_handle xfer) 1917 { 1918 xfer->hcpriv = NULL; 1919 } 1920 1921 Static usbd_status 1922 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1923 { 1924 usbd_status err; 1925 1926 /* Insert last in queue. */ 1927 err = usb_insert_transfer(xfer); 1928 if (err) 1929 return (err); 1930 1931 /* Pipe isn't running, start first */ 1932 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1933 } 1934 1935 Static usbd_status 1936 ehci_root_intr_start(usbd_xfer_handle xfer) 1937 { 1938 usbd_pipe_handle pipe = xfer->pipe; 1939 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1940 1941 if (sc->sc_dying) 1942 return (USBD_IOERROR); 1943 1944 sc->sc_intrxfer = xfer; 1945 1946 return (USBD_IN_PROGRESS); 1947 } 1948 1949 /* Abort a root interrupt request. */ 1950 Static void 1951 ehci_root_intr_abort(usbd_xfer_handle xfer) 1952 { 1953 int s; 1954 1955 if (xfer->pipe->intrxfer == xfer) { 1956 DPRINTF(("ehci_root_intr_abort: remove\n")); 1957 xfer->pipe->intrxfer = NULL; 1958 } 1959 xfer->status = USBD_CANCELLED; 1960 s = splusb(); 1961 usb_transfer_complete(xfer); 1962 splx(s); 1963 } 1964 1965 /* Close the root pipe. */ 1966 Static void 1967 ehci_root_intr_close(usbd_pipe_handle pipe) 1968 { 1969 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1970 1971 DPRINTF(("ehci_root_intr_close\n")); 1972 1973 sc->sc_intrxfer = NULL; 1974 } 1975 1976 void 1977 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1978 { 1979 xfer->hcpriv = NULL; 1980 } 1981 1982 /************************/ 1983 1984 ehci_soft_qh_t * 1985 ehci_alloc_sqh(ehci_softc_t *sc) 1986 { 1987 ehci_soft_qh_t *sqh; 1988 usbd_status err; 1989 int i, offs; 1990 usb_dma_t dma; 1991 1992 if (sc->sc_freeqhs == NULL) { 1993 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1994 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1995 EHCI_PAGE_SIZE, &dma); 1996 #ifdef EHCI_DEBUG 1997 if (err) 1998 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1999 #endif 2000 if (err) 2001 return (NULL); 2002 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2003 offs = i * EHCI_SQH_SIZE; 2004 sqh = KERNADDR(&dma, offs); 2005 sqh->physaddr = DMAADDR(&dma, offs); 2006 sqh->next = sc->sc_freeqhs; 2007 sc->sc_freeqhs = sqh; 2008 } 2009 } 2010 sqh = sc->sc_freeqhs; 2011 sc->sc_freeqhs = sqh->next; 2012 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2013 sqh->next = NULL; 2014 return (sqh); 2015 } 2016 2017 void 2018 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2019 { 2020 sqh->next = sc->sc_freeqhs; 2021 sc->sc_freeqhs = sqh; 2022 } 2023 2024 ehci_soft_qtd_t * 2025 ehci_alloc_sqtd(ehci_softc_t *sc) 2026 { 2027 ehci_soft_qtd_t *sqtd; 2028 usbd_status err; 2029 int i, offs; 2030 usb_dma_t dma; 2031 int s; 2032 2033 if (sc->sc_freeqtds == NULL) { 2034 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2035 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2036 EHCI_PAGE_SIZE, &dma); 2037 #ifdef EHCI_DEBUG 2038 if (err) 2039 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2040 #endif 2041 if (err) 2042 return (NULL); 2043 s = splusb(); 2044 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2045 offs = i * EHCI_SQTD_SIZE; 2046 sqtd = KERNADDR(&dma, offs); 2047 sqtd->physaddr = DMAADDR(&dma, offs); 2048 sqtd->nextqtd = sc->sc_freeqtds; 2049 sc->sc_freeqtds = sqtd; 2050 } 2051 splx(s); 2052 } 2053 2054 s = splusb(); 2055 sqtd = sc->sc_freeqtds; 2056 sc->sc_freeqtds = sqtd->nextqtd; 2057 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2058 sqtd->nextqtd = NULL; 2059 sqtd->xfer = NULL; 2060 splx(s); 2061 2062 return (sqtd); 2063 } 2064 2065 void 2066 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2067 { 2068 int s; 2069 2070 s = splusb(); 2071 sqtd->nextqtd = sc->sc_freeqtds; 2072 sc->sc_freeqtds = sqtd; 2073 splx(s); 2074 } 2075 2076 usbd_status 2077 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2078 int alen, int rd, usbd_xfer_handle xfer, 2079 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2080 { 2081 ehci_soft_qtd_t *next, *cur; 2082 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2083 u_int32_t qtdstatus; 2084 int len, curlen; 2085 int i; 2086 usb_dma_t *dma = &xfer->dmabuf; 2087 2088 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2089 2090 len = alen; 2091 dataphys = DMAADDR(dma, 0); 2092 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2093 qtdstatus = htole32( 2094 EHCI_QTD_ACTIVE | 2095 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2096 EHCI_QTD_SET_CERR(3) 2097 /* IOC set below */ 2098 /* BYTES set below */ 2099 /* XXX Data toggle */ 2100 ); 2101 2102 cur = ehci_alloc_sqtd(sc); 2103 *sp = cur; 2104 if (cur == NULL) 2105 goto nomem; 2106 for (;;) { 2107 dataphyspage = EHCI_PAGE(dataphys); 2108 /* The EHCI hardware can handle at most 5 pages. */ 2109 if (dataphyslastpage - dataphyspage < 2110 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2111 /* we can handle it in this QTD */ 2112 curlen = len; 2113 } else { 2114 /* must use multiple TDs, fill as much as possible. */ 2115 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2116 EHCI_PAGE_OFFSET(dataphys); 2117 #ifdef DIAGNOSTIC 2118 if (curlen > len) { 2119 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2120 "len=0x%x offs=0x%x\n", curlen, len, 2121 EHCI_PAGE_OFFSET(dataphys)); 2122 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2123 dataphyslastpage, dataphyspage, 2124 dataphys); 2125 curlen = len; 2126 } 2127 #endif 2128 2129 /* XXX true for EHCI? */ 2130 /* the length must be a multiple of the max size */ 2131 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2132 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2133 "curlen=%d\n", curlen)); 2134 #ifdef DIAGNOSTIC 2135 if (curlen == 0) 2136 panic("ehci_alloc_std: curlen == 0"); 2137 #endif 2138 } 2139 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2140 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2141 dataphys, dataphyslastpage, 2142 len, curlen)); 2143 len -= curlen; 2144 2145 if (len != 0) { 2146 next = ehci_alloc_sqtd(sc); 2147 if (next == NULL) 2148 goto nomem; 2149 nextphys = next->physaddr; 2150 } else { 2151 next = NULL; 2152 nextphys = EHCI_NULL; 2153 } 2154 2155 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2156 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2157 if (i != 0) /* use offset only in first buffer */ 2158 a = EHCI_PAGE(a); 2159 cur->qtd.qtd_buffer[i] = htole32(a); 2160 cur->qtd.qtd_buffer_hi[i] = 0; 2161 #ifdef DIAGNOSTIC 2162 if (i >= EHCI_QTD_NBUFFERS) { 2163 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2164 goto nomem; 2165 } 2166 #endif 2167 } 2168 cur->nextqtd = next; 2169 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2170 cur->qtd.qtd_status = 2171 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2172 cur->xfer = xfer; 2173 cur->len = curlen; 2174 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2175 dataphys, dataphys + curlen)); 2176 if (len == 0) 2177 break; 2178 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2179 dataphys += curlen; 2180 cur = next; 2181 } 2182 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2183 *ep = cur; 2184 2185 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2186 *sp, *ep)); 2187 2188 return (USBD_NORMAL_COMPLETION); 2189 2190 nomem: 2191 /* XXX free chain */ 2192 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2193 return (USBD_NOMEM); 2194 } 2195 2196 Static void 2197 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2198 ehci_soft_qtd_t *sqtdend) 2199 { 2200 ehci_soft_qtd_t *p; 2201 int i; 2202 2203 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2204 sqtd, sqtdend)); 2205 2206 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2207 p = sqtd->nextqtd; 2208 ehci_free_sqtd(sc, sqtd); 2209 } 2210 } 2211 2212 /****************/ 2213 2214 /* 2215 * Close a reqular pipe. 2216 * Assumes that there are no pending transactions. 2217 */ 2218 void 2219 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2220 { 2221 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2222 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2223 ehci_soft_qh_t *sqh = epipe->sqh; 2224 int s; 2225 2226 s = splusb(); 2227 ehci_rem_qh(sc, sqh, head); 2228 splx(s); 2229 ehci_free_sqh(sc, epipe->sqh); 2230 } 2231 2232 /* 2233 * Abort a device request. 2234 * If this routine is called at splusb() it guarantees that the request 2235 * will be removed from the hardware scheduling and that the callback 2236 * for it will be called with USBD_CANCELLED status. 2237 * It's impossible to guarantee that the requested transfer will not 2238 * have happened since the hardware runs concurrently. 2239 * If the transaction has already happened we rely on the ordinary 2240 * interrupt processing to process it. 2241 * XXX This is most probably wrong. 2242 */ 2243 void 2244 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2245 { 2246 #define exfer EXFER(xfer) 2247 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2248 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2249 ehci_soft_qh_t *sqh = epipe->sqh; 2250 ehci_soft_qtd_t *sqtd; 2251 ehci_physaddr_t cur; 2252 u_int32_t qhstatus; 2253 int s; 2254 int hit; 2255 2256 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2257 2258 if (sc->sc_dying) { 2259 /* If we're dying, just do the software part. */ 2260 s = splusb(); 2261 xfer->status = status; /* make software ignore it */ 2262 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2263 usb_transfer_complete(xfer); 2264 splx(s); 2265 return; 2266 } 2267 2268 if (xfer->device->bus->intr_context || !curproc) 2269 panic("ehci_abort_xfer: not in process context"); 2270 2271 /* 2272 * Step 1: Make interrupt routine and hardware ignore xfer. 2273 */ 2274 s = splusb(); 2275 xfer->status = status; /* make software ignore it */ 2276 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2277 qhstatus = sqh->qh.qh_qtd.qtd_status; 2278 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2279 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2280 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2281 if (sqtd == exfer->sqtdend) 2282 break; 2283 } 2284 splx(s); 2285 2286 /* 2287 * Step 2: Wait until we know hardware has finished any possible 2288 * use of the xfer. Also make sure the soft interrupt routine 2289 * has run. 2290 */ 2291 ehci_sync_hc(sc); 2292 s = splusb(); 2293 sc->sc_softwake = 1; 2294 usb_schedsoftintr(&sc->sc_bus); 2295 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2296 splx(s); 2297 2298 /* 2299 * Step 3: Remove any vestiges of the xfer from the hardware. 2300 * The complication here is that the hardware may have executed 2301 * beyond the xfer we're trying to abort. So as we're scanning 2302 * the TDs of this xfer we check if the hardware points to 2303 * any of them. 2304 */ 2305 s = splusb(); /* XXX why? */ 2306 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2307 hit = 0; 2308 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2309 hit |= cur == sqtd->physaddr; 2310 if (sqtd == exfer->sqtdend) 2311 break; 2312 } 2313 sqtd = sqtd->nextqtd; 2314 /* Zap curqtd register if hardware pointed inside the xfer. */ 2315 if (hit && sqtd != NULL) { 2316 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2317 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2318 sqh->qh.qh_qtd.qtd_status = qhstatus; 2319 } else { 2320 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2321 } 2322 2323 /* 2324 * Step 4: Execute callback. 2325 */ 2326 #ifdef DIAGNOSTIC 2327 exfer->isdone = 1; 2328 #endif 2329 usb_transfer_complete(xfer); 2330 2331 splx(s); 2332 #undef exfer 2333 } 2334 2335 void 2336 ehci_timeout(void *addr) 2337 { 2338 struct ehci_xfer *exfer = addr; 2339 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2340 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2341 2342 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2343 #ifdef USB_DEBUG 2344 if (ehcidebug > 1) 2345 usbd_dump_pipe(exfer->xfer.pipe); 2346 #endif 2347 2348 if (sc->sc_dying) { 2349 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2350 return; 2351 } 2352 2353 /* Execute the abort in a process context. */ 2354 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2355 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2356 } 2357 2358 void 2359 ehci_timeout_task(void *addr) 2360 { 2361 usbd_xfer_handle xfer = addr; 2362 int s; 2363 2364 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2365 2366 s = splusb(); 2367 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2368 splx(s); 2369 } 2370 2371 /************************/ 2372 2373 Static usbd_status 2374 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2375 { 2376 usbd_status err; 2377 2378 /* Insert last in queue. */ 2379 err = usb_insert_transfer(xfer); 2380 if (err) 2381 return (err); 2382 2383 /* Pipe isn't running, start first */ 2384 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2385 } 2386 2387 Static usbd_status 2388 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2389 { 2390 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2391 usbd_status err; 2392 2393 if (sc->sc_dying) 2394 return (USBD_IOERROR); 2395 2396 #ifdef DIAGNOSTIC 2397 if (!(xfer->rqflags & URQ_REQUEST)) { 2398 /* XXX panic */ 2399 printf("ehci_device_ctrl_transfer: not a request\n"); 2400 return (USBD_INVAL); 2401 } 2402 #endif 2403 2404 err = ehci_device_request(xfer); 2405 if (err) 2406 return (err); 2407 2408 if (sc->sc_bus.use_polling) 2409 ehci_waitintr(sc, xfer); 2410 return (USBD_IN_PROGRESS); 2411 } 2412 2413 void 2414 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2415 { 2416 struct ehci_xfer *ex = EXFER(xfer); 2417 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2418 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2419 2420 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2421 2422 #ifdef DIAGNOSTIC 2423 if (!(xfer->rqflags & URQ_REQUEST)) { 2424 panic("ehci_ctrl_done: not a request"); 2425 } 2426 #endif 2427 2428 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2429 ehci_del_intr_list(ex); /* remove from active list */ 2430 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2431 } 2432 2433 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2434 } 2435 2436 /* Abort a device control request. */ 2437 Static void 2438 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2439 { 2440 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2441 ehci_abort_xfer(xfer, USBD_CANCELLED); 2442 } 2443 2444 /* Close a device control pipe. */ 2445 Static void 2446 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2447 { 2448 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2449 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2450 2451 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2452 ehci_close_pipe(pipe, sc->sc_async_head); 2453 } 2454 2455 usbd_status 2456 ehci_device_request(usbd_xfer_handle xfer) 2457 { 2458 #define exfer EXFER(xfer) 2459 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2460 usb_device_request_t *req = &xfer->request; 2461 usbd_device_handle dev = epipe->pipe.device; 2462 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2463 int addr = dev->address; 2464 ehci_soft_qtd_t *setup, *stat, *next; 2465 ehci_soft_qh_t *sqh; 2466 int isread; 2467 int len; 2468 usbd_status err; 2469 int s; 2470 2471 isread = req->bmRequestType & UT_READ; 2472 len = UGETW(req->wLength); 2473 2474 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2475 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2476 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2477 UGETW(req->wIndex), len, addr, 2478 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2479 2480 setup = ehci_alloc_sqtd(sc); 2481 if (setup == NULL) { 2482 err = USBD_NOMEM; 2483 goto bad1; 2484 } 2485 stat = ehci_alloc_sqtd(sc); 2486 if (stat == NULL) { 2487 err = USBD_NOMEM; 2488 goto bad2; 2489 } 2490 2491 sqh = epipe->sqh; 2492 epipe->u.ctl.length = len; 2493 2494 /* XXX 2495 * Since we're messing with the QH we must know the HC is in sync. 2496 * This needs to go away since it slows down control transfers. 2497 * Removing it entails: 2498 * - fill the QH only once with addr & wMaxPacketSize 2499 * - put the correct data toggles in the qtds and set DTC 2500 */ 2501 /* ehci_sync_hc(sc); */ 2502 /* Update device address and length since they may have changed. */ 2503 /* XXX This only needs to be done once, but it's too early in open. */ 2504 /* XXXX Should not touch ED here! */ 2505 sqh->qh.qh_endp = 2506 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2507 htole32( 2508 EHCI_QH_SET_ADDR(addr) | 2509 /* EHCI_QH_DTC | */ 2510 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2511 ); 2512 /* Clear toggle */ 2513 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2514 2515 /* Set up data transaction */ 2516 if (len != 0) { 2517 ehci_soft_qtd_t *end; 2518 2519 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2520 &next, &end); 2521 if (err) 2522 goto bad3; 2523 end->nextqtd = stat; 2524 end->qtd.qtd_next = 2525 end->qtd.qtd_altnext = htole32(stat->physaddr); 2526 /* Start toggle at 1. */ 2527 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2528 } else { 2529 next = stat; 2530 } 2531 2532 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2533 2534 setup->qtd.qtd_status = htole32( 2535 EHCI_QTD_ACTIVE | 2536 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2537 EHCI_QTD_SET_CERR(3) | 2538 EHCI_QTD_SET_BYTES(sizeof *req) 2539 ); 2540 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2541 setup->qtd.qtd_buffer_hi[0] = 0; 2542 setup->nextqtd = next; 2543 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2544 setup->xfer = xfer; 2545 setup->len = sizeof *req; 2546 2547 stat->qtd.qtd_status = htole32( 2548 EHCI_QTD_ACTIVE | 2549 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2550 EHCI_QTD_SET_CERR(3) | 2551 EHCI_QTD_IOC 2552 ); 2553 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2554 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2555 stat->nextqtd = NULL; 2556 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2557 stat->xfer = xfer; 2558 stat->len = 0; 2559 2560 #ifdef EHCI_DEBUG 2561 if (ehcidebug > 5) { 2562 DPRINTF(("ehci_device_request:\n")); 2563 ehci_dump_sqh(sqh); 2564 ehci_dump_sqtds(setup); 2565 } 2566 #endif 2567 2568 exfer->sqtdstart = setup; 2569 exfer->sqtdend = stat; 2570 #ifdef DIAGNOSTIC 2571 if (!exfer->isdone) { 2572 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2573 } 2574 exfer->isdone = 0; 2575 #endif 2576 2577 /* Insert qTD in QH list. */ 2578 s = splusb(); 2579 ehci_set_qh_qtd(sqh, setup); 2580 if (xfer->timeout && !sc->sc_bus.use_polling) { 2581 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2582 ehci_timeout, xfer); 2583 } 2584 ehci_add_intr_list(sc, exfer); 2585 xfer->status = USBD_IN_PROGRESS; 2586 splx(s); 2587 2588 #ifdef EHCI_DEBUG 2589 if (ehcidebug > 10) { 2590 DPRINTF(("ehci_device_request: status=%x\n", 2591 EOREAD4(sc, EHCI_USBSTS))); 2592 delay(10000); 2593 ehci_dump_regs(sc); 2594 ehci_dump_sqh(sc->sc_async_head); 2595 ehci_dump_sqh(sqh); 2596 ehci_dump_sqtds(setup); 2597 } 2598 #endif 2599 2600 return (USBD_NORMAL_COMPLETION); 2601 2602 bad3: 2603 ehci_free_sqtd(sc, stat); 2604 bad2: 2605 ehci_free_sqtd(sc, setup); 2606 bad1: 2607 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2608 xfer->status = err; 2609 usb_transfer_complete(xfer); 2610 return (err); 2611 #undef exfer 2612 } 2613 2614 /************************/ 2615 2616 Static usbd_status 2617 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2618 { 2619 usbd_status err; 2620 2621 /* Insert last in queue. */ 2622 err = usb_insert_transfer(xfer); 2623 if (err) 2624 return (err); 2625 2626 /* Pipe isn't running, start first */ 2627 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2628 } 2629 2630 usbd_status 2631 ehci_device_bulk_start(usbd_xfer_handle xfer) 2632 { 2633 #define exfer EXFER(xfer) 2634 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2635 usbd_device_handle dev = epipe->pipe.device; 2636 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2637 ehci_soft_qtd_t *data, *dataend; 2638 ehci_soft_qh_t *sqh; 2639 usbd_status err; 2640 int len, isread, endpt; 2641 int s; 2642 2643 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2644 xfer, xfer->length, xfer->flags)); 2645 2646 if (sc->sc_dying) 2647 return (USBD_IOERROR); 2648 2649 #ifdef DIAGNOSTIC 2650 if (xfer->rqflags & URQ_REQUEST) 2651 panic("ehci_device_bulk_transfer: a request"); 2652 #endif 2653 2654 len = xfer->length; 2655 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2656 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2657 sqh = epipe->sqh; 2658 2659 epipe->u.bulk.length = len; 2660 2661 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2662 &dataend); 2663 if (err) { 2664 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2665 xfer->status = err; 2666 usb_transfer_complete(xfer); 2667 return (err); 2668 } 2669 2670 #ifdef EHCI_DEBUG 2671 if (ehcidebug > 5) { 2672 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2673 ehci_dump_sqh(sqh); 2674 ehci_dump_sqtds(data); 2675 } 2676 #endif 2677 2678 /* Set up interrupt info. */ 2679 exfer->sqtdstart = data; 2680 exfer->sqtdend = dataend; 2681 #ifdef DIAGNOSTIC 2682 if (!exfer->isdone) { 2683 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2684 } 2685 exfer->isdone = 0; 2686 #endif 2687 2688 s = splusb(); 2689 ehci_set_qh_qtd(sqh, data); 2690 if (xfer->timeout && !sc->sc_bus.use_polling) { 2691 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2692 ehci_timeout, xfer); 2693 } 2694 ehci_add_intr_list(sc, exfer); 2695 xfer->status = USBD_IN_PROGRESS; 2696 splx(s); 2697 2698 #ifdef EHCI_DEBUG 2699 if (ehcidebug > 10) { 2700 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2701 delay(10000); 2702 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2703 ehci_dump_regs(sc); 2704 #if 0 2705 printf("async_head:\n"); 2706 ehci_dump_sqh(sc->sc_async_head); 2707 #endif 2708 printf("sqh:\n"); 2709 ehci_dump_sqh(sqh); 2710 ehci_dump_sqtds(data); 2711 } 2712 #endif 2713 2714 if (sc->sc_bus.use_polling) 2715 ehci_waitintr(sc, xfer); 2716 2717 return (USBD_IN_PROGRESS); 2718 #undef exfer 2719 } 2720 2721 Static void 2722 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2723 { 2724 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2725 ehci_abort_xfer(xfer, USBD_CANCELLED); 2726 } 2727 2728 /* 2729 * Close a device bulk pipe. 2730 */ 2731 Static void 2732 ehci_device_bulk_close(usbd_pipe_handle pipe) 2733 { 2734 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2735 2736 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2737 ehci_close_pipe(pipe, sc->sc_async_head); 2738 } 2739 2740 void 2741 ehci_device_bulk_done(usbd_xfer_handle xfer) 2742 { 2743 struct ehci_xfer *ex = EXFER(xfer); 2744 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2745 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2746 2747 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2748 xfer, xfer->actlen)); 2749 2750 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2751 ehci_del_intr_list(ex); /* remove from active list */ 2752 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2753 } 2754 2755 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2756 } 2757 2758 /************************/ 2759 2760 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2761 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2762 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2763 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2764 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2765 2766 /************************/ 2767 2768 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2769 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2770 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2771 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2772 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2773
Indexes created Wed Sep 24 05:09:52 GMT 2025