ehci.c revision 1.53
1 /* $NetBSD: ehci.c,v 1.53 2004/01/09 09:19:33 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) There might also be some issues with the data toggle, it was not 58 * completely tested to work properly under all condistions. If wrong 59 * toggle would be sent/recvd, bulk data transfers would stop working. 60 * 61 * 4) The meaty part to implement is the support for USB 2.0 hubs. 62 * They are quite compolicated since the need to be able to do 63 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 64 * So the hub driver needs to handle and schedule these things, to 65 * assign place in frame where different devices get to go. See chapter 66 * on hubs in USB 2.0 for details. 67 * 68 * 5) command failures are not recovered correctly 69 * 70 * 6) usb_frag_freelist gets corrupted and system panics at next allocation 71 with 72 73 ehci0 at pci0 dev 16 function 3: VIA Technologies product 0x3104 (rev. 0x82) 74 umass0: Cypress Semiconductor USB2.0 Storage Device, rev 2.00/0.01, addr 2 75 umass0: using SCSI over Bulk-Only 76 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.53 2004/01/09 09:19:33 chs Exp $"); 81 82 #include "ohci.h" 83 #include "uhci.h" 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/malloc.h> 89 #include <sys/device.h> 90 #include <sys/select.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 94 #include <machine/bus.h> 95 #include <machine/endian.h> 96 97 #include <dev/usb/usb.h> 98 #include <dev/usb/usbdi.h> 99 #include <dev/usb/usbdivar.h> 100 #include <dev/usb/usb_mem.h> 101 #include <dev/usb/usb_quirks.h> 102 103 #include <dev/usb/ehcireg.h> 104 #include <dev/usb/ehcivar.h> 105 106 #ifdef EHCI_DEBUG 107 #define DPRINTF(x) if (ehcidebug) printf x 108 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 109 int ehcidebug = 0; 110 #ifndef __NetBSD__ 111 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 112 #endif 113 #else 114 #define DPRINTF(x) 115 #define DPRINTFN(n,x) 116 #endif 117 118 struct ehci_pipe { 119 struct usbd_pipe pipe; 120 ehci_soft_qh_t *sqh; 121 union { 122 ehci_soft_qtd_t *qtd; 123 /* ehci_soft_itd_t *itd; */ 124 } tail; 125 union { 126 /* Control pipe */ 127 struct { 128 usb_dma_t reqdma; 129 u_int length; 130 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 131 } ctl; 132 /* Interrupt pipe */ 133 /* XXX */ 134 /* Bulk pipe */ 135 struct { 136 u_int length; 137 } bulk; 138 /* Iso pipe */ 139 /* XXX */ 140 } u; 141 }; 142 143 Static void ehci_shutdown(void *); 144 Static void ehci_power(int, void *); 145 146 Static usbd_status ehci_open(usbd_pipe_handle); 147 Static void ehci_poll(struct usbd_bus *); 148 Static void ehci_softintr(void *); 149 Static int ehci_intr1(ehci_softc_t *); 150 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 151 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 152 Static void ehci_idone(struct ehci_xfer *); 153 Static void ehci_timeout(void *); 154 Static void ehci_timeout_task(void *); 155 156 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 157 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 158 159 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 160 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 161 162 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 164 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 165 Static void ehci_root_ctrl_close(usbd_pipe_handle); 166 Static void ehci_root_ctrl_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 170 Static void ehci_root_intr_abort(usbd_xfer_handle); 171 Static void ehci_root_intr_close(usbd_pipe_handle); 172 Static void ehci_root_intr_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 176 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 177 Static void ehci_device_ctrl_close(usbd_pipe_handle); 178 Static void ehci_device_ctrl_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 182 Static void ehci_device_bulk_abort(usbd_xfer_handle); 183 Static void ehci_device_bulk_close(usbd_pipe_handle); 184 Static void ehci_device_bulk_done(usbd_xfer_handle); 185 186 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 187 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 188 Static void ehci_device_intr_abort(usbd_xfer_handle); 189 Static void ehci_device_intr_close(usbd_pipe_handle); 190 Static void ehci_device_intr_done(usbd_xfer_handle); 191 192 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 193 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 194 Static void ehci_device_isoc_abort(usbd_xfer_handle); 195 Static void ehci_device_isoc_close(usbd_pipe_handle); 196 Static void ehci_device_isoc_done(usbd_xfer_handle); 197 198 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 199 Static void ehci_noop(usbd_pipe_handle pipe); 200 201 Static int ehci_str(usb_string_descriptor_t *, int, char *); 202 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 203 Static void ehci_pcd_able(ehci_softc_t *, int); 204 Static void ehci_pcd_enable(void *); 205 Static void ehci_disown(ehci_softc_t *, int, int); 206 207 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 208 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 209 210 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 211 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 212 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 213 ehci_softc_t *, int, int, usbd_xfer_handle, 214 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 215 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 216 ehci_soft_qtd_t *); 217 218 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 219 220 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 221 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 222 ehci_soft_qh_t *); 223 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 224 Static void ehci_sync_hc(ehci_softc_t *); 225 226 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 227 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 228 229 #ifdef EHCI_DEBUG 230 Static void ehci_dump_regs(ehci_softc_t *); 231 Static void ehci_dump(void); 232 Static ehci_softc_t *theehci; 233 Static void ehci_dump_link(ehci_link_t, int); 234 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 235 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 236 Static void ehci_dump_qtd(ehci_qtd_t *); 237 Static void ehci_dump_sqh(ehci_soft_qh_t *); 238 #ifdef DIAGNOSTIC 239 Static void ehci_dump_exfer(struct ehci_xfer *); 240 #endif 241 #endif 242 243 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 244 245 #define EHCI_INTR_ENDPT 1 246 247 #define ehci_add_intr_list(sc, ex) \ 248 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 249 #define ehci_del_intr_list(ex) \ 250 do { \ 251 LIST_REMOVE((ex), inext); \ 252 (ex)->inext.le_prev = NULL; \ 253 } while (0) 254 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 255 256 Static struct usbd_bus_methods ehci_bus_methods = { 257 ehci_open, 258 ehci_softintr, 259 ehci_poll, 260 ehci_allocm, 261 ehci_freem, 262 ehci_allocx, 263 ehci_freex, 264 }; 265 266 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 267 ehci_root_ctrl_transfer, 268 ehci_root_ctrl_start, 269 ehci_root_ctrl_abort, 270 ehci_root_ctrl_close, 271 ehci_noop, 272 ehci_root_ctrl_done, 273 }; 274 275 Static struct usbd_pipe_methods ehci_root_intr_methods = { 276 ehci_root_intr_transfer, 277 ehci_root_intr_start, 278 ehci_root_intr_abort, 279 ehci_root_intr_close, 280 ehci_noop, 281 ehci_root_intr_done, 282 }; 283 284 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 285 ehci_device_ctrl_transfer, 286 ehci_device_ctrl_start, 287 ehci_device_ctrl_abort, 288 ehci_device_ctrl_close, 289 ehci_noop, 290 ehci_device_ctrl_done, 291 }; 292 293 Static struct usbd_pipe_methods ehci_device_intr_methods = { 294 ehci_device_intr_transfer, 295 ehci_device_intr_start, 296 ehci_device_intr_abort, 297 ehci_device_intr_close, 298 ehci_device_clear_toggle, 299 ehci_device_intr_done, 300 }; 301 302 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 303 ehci_device_bulk_transfer, 304 ehci_device_bulk_start, 305 ehci_device_bulk_abort, 306 ehci_device_bulk_close, 307 ehci_device_clear_toggle, 308 ehci_device_bulk_done, 309 }; 310 311 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 312 ehci_device_isoc_transfer, 313 ehci_device_isoc_start, 314 ehci_device_isoc_abort, 315 ehci_device_isoc_close, 316 ehci_noop, 317 ehci_device_isoc_done, 318 }; 319 320 usbd_status 321 ehci_init(ehci_softc_t *sc) 322 { 323 u_int32_t version, sparams, cparams, hcr; 324 u_int i; 325 usbd_status err; 326 ehci_soft_qh_t *sqh; 327 328 DPRINTF(("ehci_init: start\n")); 329 #ifdef EHCI_DEBUG 330 theehci = sc; 331 #endif 332 333 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 334 335 version = EREAD2(sc, EHCI_HCIVERSION); 336 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 337 version >> 8, version & 0xff); 338 339 sparams = EREAD4(sc, EHCI_HCSPARAMS); 340 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 341 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 342 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 343 aprint_error("%s: wrong number of companions (%d != %d)\n", 344 USBDEVNAME(sc->sc_bus.bdev), 345 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 346 #if NOHCI == 0 || NUHCI == 0 347 aprint_error("%s: ohci or uhci probably not configured\n", 348 USBDEVNAME(sc->sc_bus.bdev)); 349 #endif 350 return (USBD_IOERROR); 351 } 352 if (sc->sc_ncomp > 0) { 353 aprint_normal("%s: companion controller%s, %d port%s each:", 354 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 355 EHCI_HCS_N_PCC(sparams), 356 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 357 for (i = 0; i < sc->sc_ncomp; i++) 358 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 359 aprint_normal("\n"); 360 } 361 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 362 cparams = EREAD4(sc, EHCI_HCCPARAMS); 363 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 364 365 if (EHCI_HCC_64BIT(cparams)) { 366 /* MUST clear segment register if 64 bit capable. */ 367 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 368 } 369 370 sc->sc_bus.usbrev = USBREV_2_0; 371 372 /* Reset the controller */ 373 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 374 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 375 usb_delay_ms(&sc->sc_bus, 1); 376 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 377 for (i = 0; i < 100; i++) { 378 usb_delay_ms(&sc->sc_bus, 1); 379 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 380 if (!hcr) 381 break; 382 } 383 if (hcr) { 384 aprint_error("%s: reset timeout\n", 385 USBDEVNAME(sc->sc_bus.bdev)); 386 return (USBD_IOERROR); 387 } 388 389 /* frame list size at default, read back what we got and use that */ 390 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 391 case 0: sc->sc_flsize = 1024*4; break; 392 case 1: sc->sc_flsize = 512*4; break; 393 case 2: sc->sc_flsize = 256*4; break; 394 case 3: return (USBD_IOERROR); 395 } 396 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 397 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 398 if (err) 399 return (err); 400 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 401 402 /* Set up the bus struct. */ 403 sc->sc_bus.methods = &ehci_bus_methods; 404 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 405 406 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 407 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 408 409 sc->sc_eintrs = EHCI_NORMAL_INTRS; 410 411 /* Allocate dummy QH that starts the async list. */ 412 sqh = ehci_alloc_sqh(sc); 413 if (sqh == NULL) { 414 err = USBD_NOMEM; 415 goto bad1; 416 } 417 /* Fill the QH */ 418 sqh->qh.qh_endp = 419 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 420 sqh->qh.qh_link = 421 htole32(sqh->physaddr | EHCI_LINK_QH); 422 sqh->qh.qh_curqtd = EHCI_NULL; 423 sqh->next = NULL; 424 /* Fill the overlay qTD */ 425 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 426 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 427 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 428 sqh->sqtd = NULL; 429 #ifdef EHCI_DEBUG 430 if (ehcidebug) { 431 ehci_dump_sqh(sqh); 432 } 433 #endif 434 435 /* Point to async list */ 436 sc->sc_async_head = sqh; 437 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 438 439 usb_callout_init(sc->sc_tmo_pcd); 440 441 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 442 443 /* Enable interrupts */ 444 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 445 446 /* Turn on controller */ 447 EOWRITE4(sc, EHCI_USBCMD, 448 EHCI_CMD_ITC_8 | /* 8 microframes */ 449 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 450 EHCI_CMD_ASE | 451 /* EHCI_CMD_PSE | */ 452 EHCI_CMD_RS); 453 454 /* Take over port ownership */ 455 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 456 457 for (i = 0; i < 100; i++) { 458 usb_delay_ms(&sc->sc_bus, 1); 459 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 460 if (!hcr) 461 break; 462 } 463 if (hcr) { 464 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 465 return (USBD_IOERROR); 466 } 467 468 return (USBD_NORMAL_COMPLETION); 469 470 #if 0 471 bad2: 472 ehci_free_sqh(sc, sc->sc_async_head); 473 #endif 474 bad1: 475 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 476 return (err); 477 } 478 479 int 480 ehci_intr(void *v) 481 { 482 ehci_softc_t *sc = v; 483 484 if (sc == NULL || sc->sc_dying) 485 return (0); 486 487 /* If we get an interrupt while polling, then just ignore it. */ 488 if (sc->sc_bus.use_polling) { 489 #ifdef DIAGNOSTIC 490 printf("ehci_intr: ignored interrupt while polling\n"); 491 #endif 492 return (0); 493 } 494 495 return (ehci_intr1(sc)); 496 } 497 498 Static int 499 ehci_intr1(ehci_softc_t *sc) 500 { 501 u_int32_t intrs, eintrs; 502 503 DPRINTFN(20,("ehci_intr1: enter\n")); 504 505 /* In case the interrupt occurs before initialization has completed. */ 506 if (sc == NULL) { 507 #ifdef DIAGNOSTIC 508 printf("ehci_intr: sc == NULL\n"); 509 #endif 510 return (0); 511 } 512 513 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 514 515 if (!intrs) 516 return (0); 517 518 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 519 eintrs = intrs & sc->sc_eintrs; 520 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 521 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 522 (u_int)eintrs)); 523 if (!eintrs) 524 return (0); 525 526 sc->sc_bus.intr_context++; 527 sc->sc_bus.no_intrs++; 528 if (eintrs & EHCI_STS_IAA) { 529 DPRINTF(("ehci_intr1: door bell\n")); 530 wakeup(&sc->sc_async_head); 531 eintrs &= ~EHCI_STS_IAA; 532 } 533 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 534 DPRINTFN(5,("ehci_intr1: %s %s\n", 535 eintrs & EHCI_STS_INT ? "INT" : "", 536 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 537 usb_schedsoftintr(&sc->sc_bus); 538 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 539 } 540 if (eintrs & EHCI_STS_HSE) { 541 printf("%s: unrecoverable error, controller halted\n", 542 USBDEVNAME(sc->sc_bus.bdev)); 543 /* XXX what else */ 544 } 545 if (eintrs & EHCI_STS_PCD) { 546 ehci_pcd(sc, sc->sc_intrxfer); 547 /* 548 * Disable PCD interrupt for now, because it will be 549 * on until the port has been reset. 550 */ 551 ehci_pcd_able(sc, 0); 552 /* Do not allow RHSC interrupts > 1 per second */ 553 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 554 eintrs &= ~EHCI_STS_PCD; 555 } 556 557 sc->sc_bus.intr_context--; 558 559 if (eintrs != 0) { 560 /* Block unprocessed interrupts. */ 561 sc->sc_eintrs &= ~eintrs; 562 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 563 printf("%s: blocking intrs 0x%x\n", 564 USBDEVNAME(sc->sc_bus.bdev), eintrs); 565 } 566 567 return (1); 568 } 569 570 void 571 ehci_pcd_able(ehci_softc_t *sc, int on) 572 { 573 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 574 if (on) 575 sc->sc_eintrs |= EHCI_STS_PCD; 576 else 577 sc->sc_eintrs &= ~EHCI_STS_PCD; 578 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 579 } 580 581 void 582 ehci_pcd_enable(void *v_sc) 583 { 584 ehci_softc_t *sc = v_sc; 585 586 ehci_pcd_able(sc, 1); 587 } 588 589 void 590 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 591 { 592 usbd_pipe_handle pipe; 593 u_char *p; 594 int i, m; 595 596 if (xfer == NULL) { 597 /* Just ignore the change. */ 598 return; 599 } 600 601 pipe = xfer->pipe; 602 603 p = KERNADDR(&xfer->dmabuf, 0); 604 m = min(sc->sc_noport, xfer->length * 8 - 1); 605 memset(p, 0, xfer->length); 606 for (i = 1; i <= m; i++) { 607 /* Pick out CHANGE bits from the status reg. */ 608 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 609 p[i/8] |= 1 << (i%8); 610 } 611 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 612 xfer->actlen = xfer->length; 613 xfer->status = USBD_NORMAL_COMPLETION; 614 615 usb_transfer_complete(xfer); 616 } 617 618 void 619 ehci_softintr(void *v) 620 { 621 ehci_softc_t *sc = v; 622 struct ehci_xfer *ex, *nextex; 623 624 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 625 sc->sc_bus.intr_context)); 626 627 sc->sc_bus.intr_context++; 628 629 /* 630 * The only explanation I can think of for why EHCI is as brain dead 631 * as UHCI interrupt-wise is that Intel was involved in both. 632 * An interrupt just tells us that something is done, we have no 633 * clue what, so we need to scan through all active transfers. :-( 634 */ 635 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 636 nextex = LIST_NEXT(ex, inext); 637 ehci_check_intr(sc, ex); 638 } 639 640 if (sc->sc_softwake) { 641 sc->sc_softwake = 0; 642 wakeup(&sc->sc_softwake); 643 } 644 645 sc->sc_bus.intr_context--; 646 } 647 648 /* Check for an interrupt. */ 649 void 650 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 651 { 652 ehci_soft_qtd_t *sqtd, *lsqtd; 653 u_int32_t status; 654 655 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 656 657 if (ex->sqtdstart == NULL) { 658 printf("ehci_check_intr: sqtdstart=NULL\n"); 659 return; 660 } 661 lsqtd = ex->sqtdend; 662 #ifdef DIAGNOSTIC 663 if (lsqtd == NULL) { 664 printf("ehci_check_intr: sqtd==0\n"); 665 return; 666 } 667 #endif 668 /* 669 * If the last TD is still active we need to check whether there 670 * is a an error somewhere in the middle, or whether there was a 671 * short packet (SPD and not ACTIVE). 672 */ 673 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 674 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 675 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 676 status = le32toh(sqtd->qtd.qtd_status); 677 /* If there's an active QTD the xfer isn't done. */ 678 if (status & EHCI_QTD_ACTIVE) 679 break; 680 /* Any kind of error makes the xfer done. */ 681 if (status & EHCI_QTD_HALTED) 682 goto done; 683 /* We want short packets, and it is short: it's done */ 684 if (EHCI_QTD_SET_BYTES(status) != 0) 685 goto done; 686 } 687 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 688 ex, ex->sqtdstart)); 689 return; 690 } 691 done: 692 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 693 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 694 ehci_idone(ex); 695 } 696 697 void 698 ehci_idone(struct ehci_xfer *ex) 699 { 700 usbd_xfer_handle xfer = &ex->xfer; 701 #ifdef EHCI_DEBUG 702 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 703 #endif 704 ehci_soft_qtd_t *sqtd; 705 u_int32_t status = 0, nstatus; 706 int actlen; 707 708 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 709 #ifdef DIAGNOSTIC 710 { 711 int s = splhigh(); 712 if (ex->isdone) { 713 splx(s); 714 #ifdef EHCI_DEBUG 715 printf("ehci_idone: ex is done!\n "); 716 ehci_dump_exfer(ex); 717 #else 718 printf("ehci_idone: ex=%p is done!\n", ex); 719 #endif 720 return; 721 } 722 ex->isdone = 1; 723 splx(s); 724 } 725 #endif 726 727 if (xfer->status == USBD_CANCELLED || 728 xfer->status == USBD_TIMEOUT) { 729 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 730 return; 731 } 732 733 #ifdef EHCI_DEBUG 734 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 735 if (ehcidebug > 10) 736 ehci_dump_sqtds(ex->sqtdstart); 737 #endif 738 739 /* The transfer is done, compute actual length and status. */ 740 actlen = 0; 741 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 742 nstatus = le32toh(sqtd->qtd.qtd_status); 743 if (nstatus & EHCI_QTD_ACTIVE) 744 break; 745 746 status = nstatus; 747 /* halt is ok if descriptor is last, and complete */ 748 if (sqtd->qtd.qtd_next == EHCI_NULL && 749 EHCI_QTD_GET_BYTES(status) == 0) 750 status &= ~EHCI_QTD_HALTED; 751 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 752 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 753 } 754 755 /* If there are left over TDs we need to update the toggle. */ 756 if (sqtd != NULL) { 757 if (!(xfer->rqflags & URQ_REQUEST)) 758 printf("ehci_idone: need toggle update\n"); 759 #if 0 760 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 761 #endif 762 } 763 764 status &= EHCI_QTD_STATERRS; 765 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 766 xfer->length, actlen, status)); 767 xfer->actlen = actlen; 768 if (status != 0) { 769 #ifdef EHCI_DEBUG 770 char sbuf[128]; 771 772 bitmask_snprintf((u_int32_t)status, 773 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 774 "\7HALTED", 775 sbuf, sizeof(sbuf)); 776 777 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 778 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 779 "status 0x%s\n", 780 xfer->pipe->device->address, 781 xfer->pipe->endpoint->edesc->bEndpointAddress, 782 sbuf)); 783 if (ehcidebug > 2) { 784 ehci_dump_sqh(epipe->sqh); 785 ehci_dump_sqtds(ex->sqtdstart); 786 } 787 #endif 788 if (status == EHCI_QTD_HALTED) 789 xfer->status = USBD_STALLED; 790 else 791 xfer->status = USBD_IOERROR; /* more info XXX */ 792 } else { 793 xfer->status = USBD_NORMAL_COMPLETION; 794 } 795 796 usb_transfer_complete(xfer); 797 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 798 } 799 800 /* 801 * Wait here until controller claims to have an interrupt. 802 * Then call ehci_intr and return. Use timeout to avoid waiting 803 * too long. 804 */ 805 void 806 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 807 { 808 int timo = xfer->timeout; 809 int usecs; 810 u_int32_t intrs; 811 812 xfer->status = USBD_IN_PROGRESS; 813 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 814 usb_delay_ms(&sc->sc_bus, 1); 815 if (sc->sc_dying) 816 break; 817 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 818 sc->sc_eintrs; 819 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 820 #ifdef OHCI_DEBUG 821 if (ehcidebug > 15) 822 ehci_dump_regs(sc); 823 #endif 824 if (intrs) { 825 ehci_intr1(sc); 826 if (xfer->status != USBD_IN_PROGRESS) 827 return; 828 } 829 } 830 831 /* Timeout */ 832 DPRINTF(("ehci_waitintr: timeout\n")); 833 xfer->status = USBD_TIMEOUT; 834 usb_transfer_complete(xfer); 835 /* XXX should free TD */ 836 } 837 838 void 839 ehci_poll(struct usbd_bus *bus) 840 { 841 ehci_softc_t *sc = (ehci_softc_t *)bus; 842 #ifdef EHCI_DEBUG 843 static int last; 844 int new; 845 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 846 if (new != last) { 847 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 848 last = new; 849 } 850 #endif 851 852 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 853 ehci_intr1(sc); 854 } 855 856 int 857 ehci_detach(struct ehci_softc *sc, int flags) 858 { 859 int rv = 0; 860 861 if (sc->sc_child != NULL) 862 rv = config_detach(sc->sc_child, flags); 863 864 if (rv != 0) 865 return (rv); 866 867 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 868 869 if (sc->sc_powerhook != NULL) 870 powerhook_disestablish(sc->sc_powerhook); 871 if (sc->sc_shutdownhook != NULL) 872 shutdownhook_disestablish(sc->sc_shutdownhook); 873 874 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 875 876 /* XXX free other data structures XXX */ 877 878 return (rv); 879 } 880 881 882 int 883 ehci_activate(device_ptr_t self, enum devact act) 884 { 885 struct ehci_softc *sc = (struct ehci_softc *)self; 886 int rv = 0; 887 888 switch (act) { 889 case DVACT_ACTIVATE: 890 return (EOPNOTSUPP); 891 892 case DVACT_DEACTIVATE: 893 if (sc->sc_child != NULL) 894 rv = config_deactivate(sc->sc_child); 895 sc->sc_dying = 1; 896 break; 897 } 898 return (rv); 899 } 900 901 /* 902 * Handle suspend/resume. 903 * 904 * We need to switch to polling mode here, because this routine is 905 * called from an intterupt context. This is all right since we 906 * are almost suspended anyway. 907 */ 908 void 909 ehci_power(int why, void *v) 910 { 911 ehci_softc_t *sc = v; 912 //u_int32_t ctl; 913 int s; 914 915 #ifdef EHCI_DEBUG 916 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 917 ehci_dump_regs(sc); 918 #endif 919 920 s = splhardusb(); 921 switch (why) { 922 case PWR_SUSPEND: 923 case PWR_STANDBY: 924 sc->sc_bus.use_polling++; 925 #if 0 926 OOO 927 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 928 if (sc->sc_control == 0) { 929 /* 930 * Preserve register values, in case that APM BIOS 931 * does not recover them. 932 */ 933 sc->sc_control = ctl; 934 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 935 } 936 ctl |= EHCI_HCFS_SUSPEND; 937 OWRITE4(sc, EHCI_CONTROL, ctl); 938 #endif 939 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 940 sc->sc_bus.use_polling--; 941 break; 942 case PWR_RESUME: 943 sc->sc_bus.use_polling++; 944 #if 0 945 OOO 946 /* Some broken BIOSes do not recover these values */ 947 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 948 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 949 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 950 if (sc->sc_intre) 951 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 952 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 953 if (sc->sc_control) 954 ctl = sc->sc_control; 955 else 956 ctl = OREAD4(sc, EHCI_CONTROL); 957 ctl |= EHCI_HCFS_RESUME; 958 OWRITE4(sc, EHCI_CONTROL, ctl); 959 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 960 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 961 OWRITE4(sc, EHCI_CONTROL, ctl); 962 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 963 sc->sc_control = sc->sc_intre = 0; 964 #endif 965 sc->sc_bus.use_polling--; 966 break; 967 case PWR_SOFTSUSPEND: 968 case PWR_SOFTSTANDBY: 969 case PWR_SOFTRESUME: 970 break; 971 } 972 splx(s); 973 } 974 975 /* 976 * Shut down the controller when the system is going down. 977 */ 978 void 979 ehci_shutdown(void *v) 980 { 981 ehci_softc_t *sc = v; 982 983 DPRINTF(("ehci_shutdown: stopping the HC\n")); 984 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 985 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 986 } 987 988 usbd_status 989 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 990 { 991 struct ehci_softc *sc = (struct ehci_softc *)bus; 992 usbd_status err; 993 994 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 995 #ifdef EHCI_DEBUG 996 if (err) 997 printf("ehci_allocm: usb_allocmem()=%d\n", err); 998 #endif 999 return (err); 1000 } 1001 1002 void 1003 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1004 { 1005 struct ehci_softc *sc = (struct ehci_softc *)bus; 1006 1007 usb_freemem(&sc->sc_bus, dma); 1008 } 1009 1010 usbd_xfer_handle 1011 ehci_allocx(struct usbd_bus *bus) 1012 { 1013 struct ehci_softc *sc = (struct ehci_softc *)bus; 1014 usbd_xfer_handle xfer; 1015 1016 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1017 if (xfer != NULL) { 1018 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1019 #ifdef DIAGNOSTIC 1020 if (xfer->busy_free != XFER_FREE) { 1021 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1022 xfer->busy_free); 1023 } 1024 #endif 1025 } else { 1026 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1027 } 1028 if (xfer != NULL) { 1029 memset(xfer, 0, sizeof (struct ehci_xfer)); 1030 #ifdef DIAGNOSTIC 1031 EXFER(xfer)->isdone = 1; 1032 xfer->busy_free = XFER_BUSY; 1033 #endif 1034 } 1035 return (xfer); 1036 } 1037 1038 void 1039 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1040 { 1041 struct ehci_softc *sc = (struct ehci_softc *)bus; 1042 1043 #ifdef DIAGNOSTIC 1044 if (xfer->busy_free != XFER_BUSY) { 1045 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1046 xfer->busy_free); 1047 return; 1048 } 1049 xfer->busy_free = XFER_FREE; 1050 if (!EXFER(xfer)->isdone) { 1051 printf("ehci_freex: !isdone\n"); 1052 return; 1053 } 1054 #endif 1055 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1056 } 1057 1058 Static void 1059 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1060 { 1061 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1062 1063 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1064 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1065 #ifdef USB_DEBUG 1066 if (ehcidebug) 1067 usbd_dump_pipe(pipe); 1068 #endif 1069 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1070 } 1071 1072 Static void 1073 ehci_noop(usbd_pipe_handle pipe) 1074 { 1075 } 1076 1077 #ifdef EHCI_DEBUG 1078 void 1079 ehci_dump_regs(ehci_softc_t *sc) 1080 { 1081 int i; 1082 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1083 EOREAD4(sc, EHCI_USBCMD), 1084 EOREAD4(sc, EHCI_USBSTS), 1085 EOREAD4(sc, EHCI_USBINTR)); 1086 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1087 EOREAD4(sc, EHCI_FRINDEX), 1088 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1089 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1090 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1091 for (i = 1; i <= sc->sc_noport; i++) 1092 printf("port %d status=0x%08x\n", i, 1093 EOREAD4(sc, EHCI_PORTSC(i))); 1094 } 1095 1096 /* 1097 * Unused function - this is meant to be called from a kernel 1098 * debugger. 1099 */ 1100 void 1101 ehci_dump() 1102 { 1103 ehci_dump_regs(theehci); 1104 } 1105 1106 void 1107 ehci_dump_link(ehci_link_t link, int type) 1108 { 1109 link = le32toh(link); 1110 printf("0x%08x", link); 1111 if (link & EHCI_LINK_TERMINATE) 1112 printf("<T>"); 1113 else { 1114 printf("<"); 1115 if (type) { 1116 switch (EHCI_LINK_TYPE(link)) { 1117 case EHCI_LINK_ITD: printf("ITD"); break; 1118 case EHCI_LINK_QH: printf("QH"); break; 1119 case EHCI_LINK_SITD: printf("SITD"); break; 1120 case EHCI_LINK_FSTN: printf("FSTN"); break; 1121 } 1122 } 1123 printf(">"); 1124 } 1125 } 1126 1127 void 1128 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1129 { 1130 int i; 1131 u_int32_t stop; 1132 1133 stop = 0; 1134 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1135 ehci_dump_sqtd(sqtd); 1136 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1137 } 1138 if (sqtd) 1139 printf("dump aborted, too many TDs\n"); 1140 } 1141 1142 void 1143 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1144 { 1145 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1146 ehci_dump_qtd(&sqtd->qtd); 1147 } 1148 1149 void 1150 ehci_dump_qtd(ehci_qtd_t *qtd) 1151 { 1152 u_int32_t s; 1153 char sbuf[128]; 1154 1155 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1156 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1157 printf("\n"); 1158 s = le32toh(qtd->qtd_status); 1159 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1160 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1161 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1162 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1163 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1164 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1165 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1166 EHCI_QTD_GET_PID(s), sbuf); 1167 for (s = 0; s < 5; s++) 1168 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1169 } 1170 1171 void 1172 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1173 { 1174 ehci_qh_t *qh = &sqh->qh; 1175 u_int32_t endp, endphub; 1176 1177 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1178 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1179 endp = le32toh(qh->qh_endp); 1180 printf(" endp=0x%08x\n", endp); 1181 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1182 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1183 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1184 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1185 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1186 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1187 EHCI_QH_GET_NRL(endp)); 1188 endphub = le32toh(qh->qh_endphub); 1189 printf(" endphub=0x%08x\n", endphub); 1190 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1191 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1192 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1193 EHCI_QH_GET_MULT(endphub)); 1194 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1195 printf("Overlay qTD:\n"); 1196 ehci_dump_qtd(&qh->qh_qtd); 1197 } 1198 1199 #ifdef DIAGNOSTIC 1200 Static void 1201 ehci_dump_exfer(struct ehci_xfer *ex) 1202 { 1203 printf("ehci_dump_exfer: ex=%p\n", ex); 1204 } 1205 #endif 1206 #endif 1207 1208 usbd_status 1209 ehci_open(usbd_pipe_handle pipe) 1210 { 1211 usbd_device_handle dev = pipe->device; 1212 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1213 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1214 u_int8_t addr = dev->address; 1215 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1216 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1217 ehci_soft_qh_t *sqh; 1218 usbd_status err; 1219 int s; 1220 int speed, naks; 1221 1222 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1223 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1224 1225 if (sc->sc_dying) 1226 return (USBD_IOERROR); 1227 1228 if (addr == sc->sc_addr) { 1229 switch (ed->bEndpointAddress) { 1230 case USB_CONTROL_ENDPOINT: 1231 pipe->methods = &ehci_root_ctrl_methods; 1232 break; 1233 case UE_DIR_IN | EHCI_INTR_ENDPT: 1234 pipe->methods = &ehci_root_intr_methods; 1235 break; 1236 default: 1237 return (USBD_INVAL); 1238 } 1239 return (USBD_NORMAL_COMPLETION); 1240 } 1241 1242 /* XXX All this stuff is only valid for async. */ 1243 switch (dev->speed) { 1244 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1245 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1246 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1247 default: panic("ehci_open: bad device speed %d", dev->speed); 1248 } 1249 naks = 8; /* XXX */ 1250 sqh = ehci_alloc_sqh(sc); 1251 if (sqh == NULL) 1252 goto bad0; 1253 /* qh_link filled when the QH is added */ 1254 sqh->qh.qh_endp = htole32( 1255 EHCI_QH_SET_ADDR(addr) | 1256 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1257 EHCI_QH_SET_EPS(speed) | /* XXX */ 1258 /* XXX EHCI_QH_DTC ? */ 1259 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1260 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1261 EHCI_QH_CTL : 0) | 1262 EHCI_QH_SET_NRL(naks) 1263 ); 1264 sqh->qh.qh_endphub = htole32( 1265 EHCI_QH_SET_MULT(1) 1266 /* XXX TT stuff */ 1267 /* XXX interrupt mask */ 1268 ); 1269 sqh->qh.qh_curqtd = EHCI_NULL; 1270 /* Fill the overlay qTD */ 1271 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1272 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1273 sqh->qh.qh_qtd.qtd_status = htole32(0); 1274 1275 epipe->sqh = sqh; 1276 1277 switch (xfertype) { 1278 case UE_CONTROL: 1279 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1280 0, &epipe->u.ctl.reqdma); 1281 #ifdef EHCI_DEBUG 1282 if (err) 1283 printf("ehci_open: usb_allocmem()=%d\n", err); 1284 #endif 1285 if (err) 1286 goto bad1; 1287 pipe->methods = &ehci_device_ctrl_methods; 1288 s = splusb(); 1289 ehci_add_qh(sqh, sc->sc_async_head); 1290 splx(s); 1291 break; 1292 case UE_BULK: 1293 pipe->methods = &ehci_device_bulk_methods; 1294 s = splusb(); 1295 ehci_add_qh(sqh, sc->sc_async_head); 1296 splx(s); 1297 break; 1298 case UE_INTERRUPT: 1299 pipe->methods = &ehci_device_intr_methods; 1300 return (USBD_INVAL); 1301 case UE_ISOCHRONOUS: 1302 pipe->methods = &ehci_device_isoc_methods; 1303 return (USBD_INVAL); 1304 default: 1305 return (USBD_INVAL); 1306 } 1307 return (USBD_NORMAL_COMPLETION); 1308 1309 bad1: 1310 ehci_free_sqh(sc, sqh); 1311 bad0: 1312 return (USBD_NOMEM); 1313 } 1314 1315 /* 1316 * Add an ED to the schedule. Called at splusb(). 1317 */ 1318 void 1319 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1320 { 1321 SPLUSBCHECK; 1322 1323 sqh->next = head->next; 1324 sqh->qh.qh_link = head->qh.qh_link; 1325 head->next = sqh; 1326 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1327 1328 #ifdef EHCI_DEBUG 1329 if (ehcidebug > 5) { 1330 printf("ehci_add_qh:\n"); 1331 ehci_dump_sqh(sqh); 1332 } 1333 #endif 1334 } 1335 1336 /* 1337 * Remove an ED from the schedule. Called at splusb(). 1338 */ 1339 void 1340 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1341 { 1342 ehci_soft_qh_t *p; 1343 1344 SPLUSBCHECK; 1345 /* XXX */ 1346 for (p = head; p != NULL && p->next != sqh; p = p->next) 1347 ; 1348 if (p == NULL) 1349 panic("ehci_rem_qh: ED not found"); 1350 p->next = sqh->next; 1351 p->qh.qh_link = sqh->qh.qh_link; 1352 1353 ehci_sync_hc(sc); 1354 } 1355 1356 void 1357 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1358 { 1359 /* Halt while we are messing. */ 1360 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1361 sqh->qh.qh_curqtd = 0; 1362 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1363 sqh->sqtd = sqtd; 1364 /* Keep toggle, clear the rest, including length. */ 1365 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1366 } 1367 1368 /* 1369 * Ensure that the HC has released all references to the QH. We do this 1370 * by asking for a Async Advance Doorbell interrupt and then we wait for 1371 * the interrupt. 1372 * To make this easier we first obtain exclusive use of the doorbell. 1373 */ 1374 void 1375 ehci_sync_hc(ehci_softc_t *sc) 1376 { 1377 int s, error; 1378 1379 if (sc->sc_dying) { 1380 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1381 return; 1382 } 1383 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1384 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1385 s = splhardusb(); 1386 /* ask for doorbell */ 1387 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1388 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1389 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1390 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1391 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1392 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1393 splx(s); 1394 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1395 #ifdef DIAGNOSTIC 1396 if (error) 1397 printf("ehci_sync_hc: tsleep() = %d\n", error); 1398 #endif 1399 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1400 } 1401 1402 /***********/ 1403 1404 /* 1405 * Data structures and routines to emulate the root hub. 1406 */ 1407 Static usb_device_descriptor_t ehci_devd = { 1408 USB_DEVICE_DESCRIPTOR_SIZE, 1409 UDESC_DEVICE, /* type */ 1410 {0x00, 0x02}, /* USB version */ 1411 UDCLASS_HUB, /* class */ 1412 UDSUBCLASS_HUB, /* subclass */ 1413 UDPROTO_HSHUBSTT, /* protocol */ 1414 64, /* max packet */ 1415 {0},{0},{0x00,0x01}, /* device id */ 1416 1,2,0, /* string indicies */ 1417 1 /* # of configurations */ 1418 }; 1419 1420 Static usb_device_qualifier_t ehci_odevd = { 1421 USB_DEVICE_DESCRIPTOR_SIZE, 1422 UDESC_DEVICE_QUALIFIER, /* type */ 1423 {0x00, 0x02}, /* USB version */ 1424 UDCLASS_HUB, /* class */ 1425 UDSUBCLASS_HUB, /* subclass */ 1426 UDPROTO_FSHUB, /* protocol */ 1427 64, /* max packet */ 1428 1, /* # of configurations */ 1429 0 1430 }; 1431 1432 Static usb_config_descriptor_t ehci_confd = { 1433 USB_CONFIG_DESCRIPTOR_SIZE, 1434 UDESC_CONFIG, 1435 {USB_CONFIG_DESCRIPTOR_SIZE + 1436 USB_INTERFACE_DESCRIPTOR_SIZE + 1437 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1438 1, 1439 1, 1440 0, 1441 UC_SELF_POWERED, 1442 0 /* max power */ 1443 }; 1444 1445 Static usb_interface_descriptor_t ehci_ifcd = { 1446 USB_INTERFACE_DESCRIPTOR_SIZE, 1447 UDESC_INTERFACE, 1448 0, 1449 0, 1450 1, 1451 UICLASS_HUB, 1452 UISUBCLASS_HUB, 1453 UIPROTO_HSHUBSTT, 1454 0 1455 }; 1456 1457 Static usb_endpoint_descriptor_t ehci_endpd = { 1458 USB_ENDPOINT_DESCRIPTOR_SIZE, 1459 UDESC_ENDPOINT, 1460 UE_DIR_IN | EHCI_INTR_ENDPT, 1461 UE_INTERRUPT, 1462 {8, 0}, /* max packet */ 1463 255 1464 }; 1465 1466 Static usb_hub_descriptor_t ehci_hubd = { 1467 USB_HUB_DESCRIPTOR_SIZE, 1468 UDESC_HUB, 1469 0, 1470 {0,0}, 1471 0, 1472 0, 1473 {0}, 1474 }; 1475 1476 Static int 1477 ehci_str(p, l, s) 1478 usb_string_descriptor_t *p; 1479 int l; 1480 char *s; 1481 { 1482 int i; 1483 1484 if (l == 0) 1485 return (0); 1486 p->bLength = 2 * strlen(s) + 2; 1487 if (l == 1) 1488 return (1); 1489 p->bDescriptorType = UDESC_STRING; 1490 l -= 2; 1491 for (i = 0; s[i] && l > 1; i++, l -= 2) 1492 USETW2(p->bString[i], 0, s[i]); 1493 return (2*i+2); 1494 } 1495 1496 /* 1497 * Simulate a hardware hub by handling all the necessary requests. 1498 */ 1499 Static usbd_status 1500 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1501 { 1502 usbd_status err; 1503 1504 /* Insert last in queue. */ 1505 err = usb_insert_transfer(xfer); 1506 if (err) 1507 return (err); 1508 1509 /* Pipe isn't running, start first */ 1510 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1511 } 1512 1513 Static usbd_status 1514 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1515 { 1516 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1517 usb_device_request_t *req; 1518 void *buf = NULL; 1519 int port, i; 1520 int s, len, value, index, l, totlen = 0; 1521 usb_port_status_t ps; 1522 usb_hub_descriptor_t hubd; 1523 usbd_status err; 1524 u_int32_t v; 1525 1526 if (sc->sc_dying) 1527 return (USBD_IOERROR); 1528 1529 #ifdef DIAGNOSTIC 1530 if (!(xfer->rqflags & URQ_REQUEST)) 1531 /* XXX panic */ 1532 return (USBD_INVAL); 1533 #endif 1534 req = &xfer->request; 1535 1536 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1537 req->bmRequestType, req->bRequest)); 1538 1539 len = UGETW(req->wLength); 1540 value = UGETW(req->wValue); 1541 index = UGETW(req->wIndex); 1542 1543 if (len != 0) 1544 buf = KERNADDR(&xfer->dmabuf, 0); 1545 1546 #define C(x,y) ((x) | ((y) << 8)) 1547 switch(C(req->bRequest, req->bmRequestType)) { 1548 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1549 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1550 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1551 /* 1552 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1553 * for the integrated root hub. 1554 */ 1555 break; 1556 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1557 if (len > 0) { 1558 *(u_int8_t *)buf = sc->sc_conf; 1559 totlen = 1; 1560 } 1561 break; 1562 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1563 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1564 switch(value >> 8) { 1565 case UDESC_DEVICE: 1566 if ((value & 0xff) != 0) { 1567 err = USBD_IOERROR; 1568 goto ret; 1569 } 1570 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1571 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1572 memcpy(buf, &ehci_devd, l); 1573 break; 1574 /* 1575 * We can't really operate at another speed, but the spec says 1576 * we need this descriptor. 1577 */ 1578 case UDESC_DEVICE_QUALIFIER: 1579 if ((value & 0xff) != 0) { 1580 err = USBD_IOERROR; 1581 goto ret; 1582 } 1583 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1584 memcpy(buf, &ehci_odevd, l); 1585 break; 1586 /* 1587 * We can't really operate at another speed, but the spec says 1588 * we need this descriptor. 1589 */ 1590 case UDESC_OTHER_SPEED_CONFIGURATION: 1591 case UDESC_CONFIG: 1592 if ((value & 0xff) != 0) { 1593 err = USBD_IOERROR; 1594 goto ret; 1595 } 1596 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1597 memcpy(buf, &ehci_confd, l); 1598 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1599 value >> 8; 1600 buf = (char *)buf + l; 1601 len -= l; 1602 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1603 totlen += l; 1604 memcpy(buf, &ehci_ifcd, l); 1605 buf = (char *)buf + l; 1606 len -= l; 1607 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1608 totlen += l; 1609 memcpy(buf, &ehci_endpd, l); 1610 break; 1611 case UDESC_STRING: 1612 if (len == 0) 1613 break; 1614 *(u_int8_t *)buf = 0; 1615 totlen = 1; 1616 switch (value & 0xff) { 1617 case 1: /* Vendor */ 1618 totlen = ehci_str(buf, len, sc->sc_vendor); 1619 break; 1620 case 2: /* Product */ 1621 totlen = ehci_str(buf, len, "EHCI root hub"); 1622 break; 1623 } 1624 break; 1625 default: 1626 err = USBD_IOERROR; 1627 goto ret; 1628 } 1629 break; 1630 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1631 if (len > 0) { 1632 *(u_int8_t *)buf = 0; 1633 totlen = 1; 1634 } 1635 break; 1636 case C(UR_GET_STATUS, UT_READ_DEVICE): 1637 if (len > 1) { 1638 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1639 totlen = 2; 1640 } 1641 break; 1642 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1643 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1644 if (len > 1) { 1645 USETW(((usb_status_t *)buf)->wStatus, 0); 1646 totlen = 2; 1647 } 1648 break; 1649 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1650 if (value >= USB_MAX_DEVICES) { 1651 err = USBD_IOERROR; 1652 goto ret; 1653 } 1654 sc->sc_addr = value; 1655 break; 1656 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1657 if (value != 0 && value != 1) { 1658 err = USBD_IOERROR; 1659 goto ret; 1660 } 1661 sc->sc_conf = value; 1662 break; 1663 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1664 break; 1665 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1666 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1667 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1668 err = USBD_IOERROR; 1669 goto ret; 1670 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1671 break; 1672 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1673 break; 1674 /* Hub requests */ 1675 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1676 break; 1677 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1678 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1679 "port=%d feature=%d\n", 1680 index, value)); 1681 if (index < 1 || index > sc->sc_noport) { 1682 err = USBD_IOERROR; 1683 goto ret; 1684 } 1685 port = EHCI_PORTSC(index); 1686 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1687 switch(value) { 1688 case UHF_PORT_ENABLE: 1689 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1690 break; 1691 case UHF_PORT_SUSPEND: 1692 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1693 break; 1694 case UHF_PORT_POWER: 1695 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1696 break; 1697 case UHF_PORT_TEST: 1698 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1699 "%d\n", index)); 1700 break; 1701 case UHF_PORT_INDICATOR: 1702 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1703 "%d\n", index)); 1704 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1705 break; 1706 case UHF_C_PORT_CONNECTION: 1707 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1708 break; 1709 case UHF_C_PORT_ENABLE: 1710 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1711 break; 1712 case UHF_C_PORT_SUSPEND: 1713 /* how? */ 1714 break; 1715 case UHF_C_PORT_OVER_CURRENT: 1716 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1717 break; 1718 case UHF_C_PORT_RESET: 1719 sc->sc_isreset = 0; 1720 break; 1721 default: 1722 err = USBD_IOERROR; 1723 goto ret; 1724 } 1725 #if 0 1726 switch(value) { 1727 case UHF_C_PORT_CONNECTION: 1728 case UHF_C_PORT_ENABLE: 1729 case UHF_C_PORT_SUSPEND: 1730 case UHF_C_PORT_OVER_CURRENT: 1731 case UHF_C_PORT_RESET: 1732 /* Enable RHSC interrupt if condition is cleared. */ 1733 if ((OREAD4(sc, port) >> 16) == 0) 1734 ehci_pcd_able(sc, 1); 1735 break; 1736 default: 1737 break; 1738 } 1739 #endif 1740 break; 1741 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1742 if ((value & 0xff) != 0) { 1743 err = USBD_IOERROR; 1744 goto ret; 1745 } 1746 hubd = ehci_hubd; 1747 hubd.bNbrPorts = sc->sc_noport; 1748 v = EOREAD4(sc, EHCI_HCSPARAMS); 1749 USETW(hubd.wHubCharacteristics, 1750 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1751 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1752 ? UHD_PORT_IND : 0); 1753 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1754 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1755 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1756 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1757 l = min(len, hubd.bDescLength); 1758 totlen = l; 1759 memcpy(buf, &hubd, l); 1760 break; 1761 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1762 if (len != 4) { 1763 err = USBD_IOERROR; 1764 goto ret; 1765 } 1766 memset(buf, 0, len); /* ? XXX */ 1767 totlen = len; 1768 break; 1769 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1770 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1771 index)); 1772 if (index < 1 || index > sc->sc_noport) { 1773 err = USBD_IOERROR; 1774 goto ret; 1775 } 1776 if (len != 4) { 1777 err = USBD_IOERROR; 1778 goto ret; 1779 } 1780 v = EOREAD4(sc, EHCI_PORTSC(index)); 1781 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1782 v)); 1783 i = UPS_HIGH_SPEED; 1784 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1785 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1786 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1787 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1788 if (v & EHCI_PS_PR) i |= UPS_RESET; 1789 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1790 USETW(ps.wPortStatus, i); 1791 i = 0; 1792 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1793 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1794 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1795 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1796 USETW(ps.wPortChange, i); 1797 l = min(len, sizeof ps); 1798 memcpy(buf, &ps, l); 1799 totlen = l; 1800 break; 1801 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1802 err = USBD_IOERROR; 1803 goto ret; 1804 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1805 break; 1806 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1807 if (index < 1 || index > sc->sc_noport) { 1808 err = USBD_IOERROR; 1809 goto ret; 1810 } 1811 port = EHCI_PORTSC(index); 1812 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1813 switch(value) { 1814 case UHF_PORT_ENABLE: 1815 EOWRITE4(sc, port, v | EHCI_PS_PE); 1816 break; 1817 case UHF_PORT_SUSPEND: 1818 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1819 break; 1820 case UHF_PORT_RESET: 1821 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1822 index)); 1823 if (EHCI_PS_IS_LOWSPEED(v)) { 1824 /* Low speed device, give up ownership. */ 1825 ehci_disown(sc, index, 1); 1826 break; 1827 } 1828 /* Start reset sequence. */ 1829 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1830 EOWRITE4(sc, port, v | EHCI_PS_PR); 1831 /* Wait for reset to complete. */ 1832 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1833 if (sc->sc_dying) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 /* Terminate reset sequence. */ 1838 EOWRITE4(sc, port, v); 1839 /* Wait for HC to complete reset. */ 1840 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1841 if (sc->sc_dying) { 1842 err = USBD_IOERROR; 1843 goto ret; 1844 } 1845 v = EOREAD4(sc, port); 1846 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1847 if (v & EHCI_PS_PR) { 1848 printf("%s: port reset timeout\n", 1849 USBDEVNAME(sc->sc_bus.bdev)); 1850 return (USBD_TIMEOUT); 1851 } 1852 if (!(v & EHCI_PS_PE)) { 1853 /* Not a high speed device, give up ownership.*/ 1854 ehci_disown(sc, index, 0); 1855 break; 1856 } 1857 sc->sc_isreset = 1; 1858 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1859 index, v)); 1860 break; 1861 case UHF_PORT_POWER: 1862 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1863 "%d\n", index)); 1864 EOWRITE4(sc, port, v | EHCI_PS_PP); 1865 break; 1866 case UHF_PORT_TEST: 1867 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1868 "%d\n", index)); 1869 break; 1870 case UHF_PORT_INDICATOR: 1871 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1872 "%d\n", index)); 1873 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1874 break; 1875 default: 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 break; 1880 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1881 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1882 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1883 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1884 break; 1885 default: 1886 err = USBD_IOERROR; 1887 goto ret; 1888 } 1889 xfer->actlen = totlen; 1890 err = USBD_NORMAL_COMPLETION; 1891 ret: 1892 xfer->status = err; 1893 s = splusb(); 1894 usb_transfer_complete(xfer); 1895 splx(s); 1896 return (USBD_IN_PROGRESS); 1897 } 1898 1899 void 1900 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1901 { 1902 int port; 1903 u_int32_t v; 1904 1905 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1906 #ifdef DIAGNOSTIC 1907 if (sc->sc_npcomp != 0) { 1908 int i = (index-1) / sc->sc_npcomp; 1909 if (i >= sc->sc_ncomp) 1910 printf("%s: strange port\n", 1911 USBDEVNAME(sc->sc_bus.bdev)); 1912 else 1913 printf("%s: handing over %s speed device on " 1914 "port %d to %s\n", 1915 USBDEVNAME(sc->sc_bus.bdev), 1916 lowspeed ? "low" : "full", 1917 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1918 } else { 1919 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1920 } 1921 #endif 1922 port = EHCI_PORTSC(index); 1923 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1924 EOWRITE4(sc, port, v | EHCI_PS_PO); 1925 } 1926 1927 /* Abort a root control request. */ 1928 Static void 1929 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1930 { 1931 /* Nothing to do, all transfers are synchronous. */ 1932 } 1933 1934 /* Close the root pipe. */ 1935 Static void 1936 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1937 { 1938 DPRINTF(("ehci_root_ctrl_close\n")); 1939 /* Nothing to do. */ 1940 } 1941 1942 void 1943 ehci_root_intr_done(usbd_xfer_handle xfer) 1944 { 1945 xfer->hcpriv = NULL; 1946 } 1947 1948 Static usbd_status 1949 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1950 { 1951 usbd_status err; 1952 1953 /* Insert last in queue. */ 1954 err = usb_insert_transfer(xfer); 1955 if (err) 1956 return (err); 1957 1958 /* Pipe isn't running, start first */ 1959 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1960 } 1961 1962 Static usbd_status 1963 ehci_root_intr_start(usbd_xfer_handle xfer) 1964 { 1965 usbd_pipe_handle pipe = xfer->pipe; 1966 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1967 1968 if (sc->sc_dying) 1969 return (USBD_IOERROR); 1970 1971 sc->sc_intrxfer = xfer; 1972 1973 return (USBD_IN_PROGRESS); 1974 } 1975 1976 /* Abort a root interrupt request. */ 1977 Static void 1978 ehci_root_intr_abort(usbd_xfer_handle xfer) 1979 { 1980 int s; 1981 1982 if (xfer->pipe->intrxfer == xfer) { 1983 DPRINTF(("ehci_root_intr_abort: remove\n")); 1984 xfer->pipe->intrxfer = NULL; 1985 } 1986 xfer->status = USBD_CANCELLED; 1987 s = splusb(); 1988 usb_transfer_complete(xfer); 1989 splx(s); 1990 } 1991 1992 /* Close the root pipe. */ 1993 Static void 1994 ehci_root_intr_close(usbd_pipe_handle pipe) 1995 { 1996 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1997 1998 DPRINTF(("ehci_root_intr_close\n")); 1999 2000 sc->sc_intrxfer = NULL; 2001 } 2002 2003 void 2004 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2005 { 2006 xfer->hcpriv = NULL; 2007 } 2008 2009 /************************/ 2010 2011 ehci_soft_qh_t * 2012 ehci_alloc_sqh(ehci_softc_t *sc) 2013 { 2014 ehci_soft_qh_t *sqh; 2015 usbd_status err; 2016 int i, offs; 2017 usb_dma_t dma; 2018 2019 if (sc->sc_freeqhs == NULL) { 2020 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2021 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2022 EHCI_PAGE_SIZE, &dma); 2023 #ifdef EHCI_DEBUG 2024 if (err) 2025 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2026 #endif 2027 if (err) 2028 return (NULL); 2029 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2030 offs = i * EHCI_SQH_SIZE; 2031 sqh = KERNADDR(&dma, offs); 2032 sqh->physaddr = DMAADDR(&dma, offs); 2033 sqh->next = sc->sc_freeqhs; 2034 sc->sc_freeqhs = sqh; 2035 } 2036 } 2037 sqh = sc->sc_freeqhs; 2038 sc->sc_freeqhs = sqh->next; 2039 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2040 sqh->next = NULL; 2041 return (sqh); 2042 } 2043 2044 void 2045 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2046 { 2047 sqh->next = sc->sc_freeqhs; 2048 sc->sc_freeqhs = sqh; 2049 } 2050 2051 ehci_soft_qtd_t * 2052 ehci_alloc_sqtd(ehci_softc_t *sc) 2053 { 2054 ehci_soft_qtd_t *sqtd; 2055 usbd_status err; 2056 int i, offs; 2057 usb_dma_t dma; 2058 int s; 2059 2060 if (sc->sc_freeqtds == NULL) { 2061 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2062 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2063 EHCI_PAGE_SIZE, &dma); 2064 #ifdef EHCI_DEBUG 2065 if (err) 2066 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2067 #endif 2068 if (err) 2069 return (NULL); 2070 s = splusb(); 2071 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2072 offs = i * EHCI_SQTD_SIZE; 2073 sqtd = KERNADDR(&dma, offs); 2074 sqtd->physaddr = DMAADDR(&dma, offs); 2075 sqtd->nextqtd = sc->sc_freeqtds; 2076 sc->sc_freeqtds = sqtd; 2077 } 2078 splx(s); 2079 } 2080 2081 s = splusb(); 2082 sqtd = sc->sc_freeqtds; 2083 sc->sc_freeqtds = sqtd->nextqtd; 2084 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2085 sqtd->nextqtd = NULL; 2086 sqtd->xfer = NULL; 2087 splx(s); 2088 2089 return (sqtd); 2090 } 2091 2092 void 2093 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2094 { 2095 int s; 2096 2097 s = splusb(); 2098 sqtd->nextqtd = sc->sc_freeqtds; 2099 sc->sc_freeqtds = sqtd; 2100 splx(s); 2101 } 2102 2103 usbd_status 2104 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2105 int alen, int rd, usbd_xfer_handle xfer, 2106 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2107 { 2108 ehci_soft_qtd_t *next, *cur; 2109 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2110 u_int32_t qtdstatus; 2111 int len, curlen; 2112 int i; 2113 usb_dma_t *dma = &xfer->dmabuf; 2114 2115 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2116 2117 len = alen; 2118 dataphys = DMAADDR(dma, 0); 2119 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2120 qtdstatus = htole32( 2121 EHCI_QTD_ACTIVE | 2122 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2123 EHCI_QTD_SET_CERR(3) 2124 /* IOC set below */ 2125 /* BYTES set below */ 2126 /* XXX Data toggle */ 2127 ); 2128 2129 cur = ehci_alloc_sqtd(sc); 2130 *sp = cur; 2131 if (cur == NULL) 2132 goto nomem; 2133 for (;;) { 2134 dataphyspage = EHCI_PAGE(dataphys); 2135 /* The EHCI hardware can handle at most 5 pages. */ 2136 if (dataphyslastpage - dataphyspage < 2137 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2138 /* we can handle it in this QTD */ 2139 curlen = len; 2140 } else { 2141 /* must use multiple TDs, fill as much as possible. */ 2142 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2143 EHCI_PAGE_OFFSET(dataphys); 2144 #ifdef DIAGNOSTIC 2145 if (curlen > len) { 2146 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2147 "len=0x%x offs=0x%x\n", curlen, len, 2148 EHCI_PAGE_OFFSET(dataphys)); 2149 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2150 dataphyslastpage, dataphyspage, 2151 dataphys); 2152 curlen = len; 2153 } 2154 #endif 2155 2156 /* XXX true for EHCI? */ 2157 /* the length must be a multiple of the max size */ 2158 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2159 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2160 "curlen=%d\n", curlen)); 2161 #ifdef DIAGNOSTIC 2162 if (curlen == 0) 2163 panic("ehci_alloc_std: curlen == 0"); 2164 #endif 2165 } 2166 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2167 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2168 dataphys, dataphyslastpage, 2169 len, curlen)); 2170 len -= curlen; 2171 2172 if (len != 0) { 2173 next = ehci_alloc_sqtd(sc); 2174 if (next == NULL) 2175 goto nomem; 2176 nextphys = next->physaddr; 2177 } else { 2178 next = NULL; 2179 nextphys = EHCI_NULL; 2180 } 2181 2182 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2183 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2184 if (i != 0) /* use offset only in first buffer */ 2185 a = EHCI_PAGE(a); 2186 cur->qtd.qtd_buffer[i] = htole32(a); 2187 cur->qtd.qtd_buffer_hi[i] = 0; 2188 #ifdef DIAGNOSTIC 2189 if (i >= EHCI_QTD_NBUFFERS) { 2190 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2191 goto nomem; 2192 } 2193 #endif 2194 } 2195 cur->nextqtd = next; 2196 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2197 cur->qtd.qtd_status = 2198 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2199 cur->xfer = xfer; 2200 cur->len = curlen; 2201 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2202 dataphys, dataphys + curlen)); 2203 if (len == 0) 2204 break; 2205 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2206 dataphys += curlen; 2207 cur = next; 2208 } 2209 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2210 *ep = cur; 2211 2212 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2213 *sp, *ep)); 2214 2215 return (USBD_NORMAL_COMPLETION); 2216 2217 nomem: 2218 /* XXX free chain */ 2219 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2220 return (USBD_NOMEM); 2221 } 2222 2223 Static void 2224 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2225 ehci_soft_qtd_t *sqtdend) 2226 { 2227 ehci_soft_qtd_t *p; 2228 int i; 2229 2230 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2231 sqtd, sqtdend)); 2232 2233 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2234 p = sqtd->nextqtd; 2235 ehci_free_sqtd(sc, sqtd); 2236 } 2237 } 2238 2239 /****************/ 2240 2241 /* 2242 * Close a reqular pipe. 2243 * Assumes that there are no pending transactions. 2244 */ 2245 void 2246 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2247 { 2248 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2249 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2250 ehci_soft_qh_t *sqh = epipe->sqh; 2251 int s; 2252 2253 s = splusb(); 2254 ehci_rem_qh(sc, sqh, head); 2255 splx(s); 2256 ehci_free_sqh(sc, epipe->sqh); 2257 } 2258 2259 /* 2260 * Abort a device request. 2261 * If this routine is called at splusb() it guarantees that the request 2262 * will be removed from the hardware scheduling and that the callback 2263 * for it will be called with USBD_CANCELLED status. 2264 * It's impossible to guarantee that the requested transfer will not 2265 * have happened since the hardware runs concurrently. 2266 * If the transaction has already happened we rely on the ordinary 2267 * interrupt processing to process it. 2268 * XXX This is most probably wrong. 2269 */ 2270 void 2271 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2272 { 2273 #define exfer EXFER(xfer) 2274 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2275 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2276 ehci_soft_qh_t *sqh = epipe->sqh; 2277 ehci_soft_qtd_t *sqtd; 2278 ehci_physaddr_t cur; 2279 u_int32_t qhstatus; 2280 int s; 2281 int hit; 2282 2283 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2284 2285 if (sc->sc_dying) { 2286 /* If we're dying, just do the software part. */ 2287 s = splusb(); 2288 xfer->status = status; /* make software ignore it */ 2289 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2290 usb_transfer_complete(xfer); 2291 splx(s); 2292 return; 2293 } 2294 2295 if (xfer->device->bus->intr_context || !curproc) 2296 panic("ehci_abort_xfer: not in process context"); 2297 2298 /* 2299 * Step 1: Make interrupt routine and hardware ignore xfer. 2300 */ 2301 s = splusb(); 2302 xfer->status = status; /* make software ignore it */ 2303 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2304 qhstatus = sqh->qh.qh_qtd.qtd_status; 2305 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2306 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2307 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2308 if (sqtd == exfer->sqtdend) 2309 break; 2310 } 2311 splx(s); 2312 2313 /* 2314 * Step 2: Wait until we know hardware has finished any possible 2315 * use of the xfer. Also make sure the soft interrupt routine 2316 * has run. 2317 */ 2318 ehci_sync_hc(sc); 2319 s = splusb(); 2320 sc->sc_softwake = 1; 2321 usb_schedsoftintr(&sc->sc_bus); 2322 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2323 splx(s); 2324 2325 /* 2326 * Step 3: Remove any vestiges of the xfer from the hardware. 2327 * The complication here is that the hardware may have executed 2328 * beyond the xfer we're trying to abort. So as we're scanning 2329 * the TDs of this xfer we check if the hardware points to 2330 * any of them. 2331 */ 2332 s = splusb(); /* XXX why? */ 2333 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2334 hit = 0; 2335 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2336 hit |= cur == sqtd->physaddr; 2337 if (sqtd == exfer->sqtdend) 2338 break; 2339 } 2340 sqtd = sqtd->nextqtd; 2341 /* Zap curqtd register if hardware pointed inside the xfer. */ 2342 if (hit && sqtd != NULL) { 2343 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2344 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2345 sqh->qh.qh_qtd.qtd_status = qhstatus; 2346 } else { 2347 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2348 } 2349 2350 /* 2351 * Step 4: Execute callback. 2352 */ 2353 #ifdef DIAGNOSTIC 2354 exfer->isdone = 1; 2355 #endif 2356 usb_transfer_complete(xfer); 2357 2358 splx(s); 2359 #undef exfer 2360 } 2361 2362 void 2363 ehci_timeout(void *addr) 2364 { 2365 struct ehci_xfer *exfer = addr; 2366 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2367 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2368 2369 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2370 #ifdef USB_DEBUG 2371 if (ehcidebug > 1) 2372 usbd_dump_pipe(exfer->xfer.pipe); 2373 #endif 2374 2375 if (sc->sc_dying) { 2376 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2377 return; 2378 } 2379 2380 /* Execute the abort in a process context. */ 2381 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2382 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2383 } 2384 2385 void 2386 ehci_timeout_task(void *addr) 2387 { 2388 usbd_xfer_handle xfer = addr; 2389 int s; 2390 2391 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2392 2393 s = splusb(); 2394 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2395 splx(s); 2396 } 2397 2398 /************************/ 2399 2400 Static usbd_status 2401 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2402 { 2403 usbd_status err; 2404 2405 /* Insert last in queue. */ 2406 err = usb_insert_transfer(xfer); 2407 if (err) 2408 return (err); 2409 2410 /* Pipe isn't running, start first */ 2411 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2412 } 2413 2414 Static usbd_status 2415 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2416 { 2417 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2418 usbd_status err; 2419 2420 if (sc->sc_dying) 2421 return (USBD_IOERROR); 2422 2423 #ifdef DIAGNOSTIC 2424 if (!(xfer->rqflags & URQ_REQUEST)) { 2425 /* XXX panic */ 2426 printf("ehci_device_ctrl_transfer: not a request\n"); 2427 return (USBD_INVAL); 2428 } 2429 #endif 2430 2431 err = ehci_device_request(xfer); 2432 if (err) 2433 return (err); 2434 2435 if (sc->sc_bus.use_polling) 2436 ehci_waitintr(sc, xfer); 2437 return (USBD_IN_PROGRESS); 2438 } 2439 2440 void 2441 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2442 { 2443 struct ehci_xfer *ex = EXFER(xfer); 2444 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2445 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2446 2447 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2448 2449 #ifdef DIAGNOSTIC 2450 if (!(xfer->rqflags & URQ_REQUEST)) { 2451 panic("ehci_ctrl_done: not a request"); 2452 } 2453 #endif 2454 2455 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2456 ehci_del_intr_list(ex); /* remove from active list */ 2457 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2458 } 2459 2460 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2461 } 2462 2463 /* Abort a device control request. */ 2464 Static void 2465 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2466 { 2467 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2468 ehci_abort_xfer(xfer, USBD_CANCELLED); 2469 } 2470 2471 /* Close a device control pipe. */ 2472 Static void 2473 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2474 { 2475 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2476 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2477 2478 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2479 ehci_close_pipe(pipe, sc->sc_async_head); 2480 } 2481 2482 usbd_status 2483 ehci_device_request(usbd_xfer_handle xfer) 2484 { 2485 #define exfer EXFER(xfer) 2486 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2487 usb_device_request_t *req = &xfer->request; 2488 usbd_device_handle dev = epipe->pipe.device; 2489 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2490 int addr = dev->address; 2491 ehci_soft_qtd_t *setup, *stat, *next; 2492 ehci_soft_qh_t *sqh; 2493 int isread; 2494 int len; 2495 usbd_status err; 2496 int s; 2497 2498 isread = req->bmRequestType & UT_READ; 2499 len = UGETW(req->wLength); 2500 2501 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2502 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2503 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2504 UGETW(req->wIndex), len, addr, 2505 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2506 2507 setup = ehci_alloc_sqtd(sc); 2508 if (setup == NULL) { 2509 err = USBD_NOMEM; 2510 goto bad1; 2511 } 2512 stat = ehci_alloc_sqtd(sc); 2513 if (stat == NULL) { 2514 err = USBD_NOMEM; 2515 goto bad2; 2516 } 2517 2518 sqh = epipe->sqh; 2519 epipe->u.ctl.length = len; 2520 2521 /* XXX 2522 * Since we're messing with the QH we must know the HC is in sync. 2523 * This needs to go away since it slows down control transfers. 2524 * Removing it entails: 2525 * - fill the QH only once with addr & wMaxPacketSize 2526 * - put the correct data toggles in the qtds and set DTC 2527 */ 2528 /* ehci_sync_hc(sc); */ 2529 /* Update device address and length since they may have changed. */ 2530 /* XXX This only needs to be done once, but it's too early in open. */ 2531 /* XXXX Should not touch ED here! */ 2532 sqh->qh.qh_endp = 2533 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2534 htole32( 2535 EHCI_QH_SET_ADDR(addr) | 2536 /* EHCI_QH_DTC | */ 2537 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2538 ); 2539 /* Clear toggle */ 2540 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2541 2542 /* Set up data transaction */ 2543 if (len != 0) { 2544 ehci_soft_qtd_t *end; 2545 2546 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2547 &next, &end); 2548 if (err) 2549 goto bad3; 2550 end->nextqtd = stat; 2551 end->qtd.qtd_next = 2552 end->qtd.qtd_altnext = htole32(stat->physaddr); 2553 /* Start toggle at 1. */ 2554 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2555 } else { 2556 next = stat; 2557 } 2558 2559 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2560 2561 setup->qtd.qtd_status = htole32( 2562 EHCI_QTD_ACTIVE | 2563 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2564 EHCI_QTD_SET_CERR(3) | 2565 EHCI_QTD_SET_BYTES(sizeof *req) 2566 ); 2567 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2568 setup->qtd.qtd_buffer_hi[0] = 0; 2569 setup->nextqtd = next; 2570 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2571 setup->xfer = xfer; 2572 setup->len = sizeof *req; 2573 2574 stat->qtd.qtd_status = htole32( 2575 EHCI_QTD_ACTIVE | 2576 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2577 EHCI_QTD_SET_CERR(3) | 2578 EHCI_QTD_IOC 2579 ); 2580 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2581 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2582 stat->nextqtd = NULL; 2583 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2584 stat->xfer = xfer; 2585 stat->len = 0; 2586 2587 #ifdef EHCI_DEBUG 2588 if (ehcidebug > 5) { 2589 DPRINTF(("ehci_device_request:\n")); 2590 ehci_dump_sqh(sqh); 2591 ehci_dump_sqtds(setup); 2592 } 2593 #endif 2594 2595 exfer->sqtdstart = setup; 2596 exfer->sqtdend = stat; 2597 #ifdef DIAGNOSTIC 2598 if (!exfer->isdone) { 2599 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2600 } 2601 exfer->isdone = 0; 2602 #endif 2603 2604 /* Insert qTD in QH list. */ 2605 s = splusb(); 2606 ehci_set_qh_qtd(sqh, setup); 2607 if (xfer->timeout && !sc->sc_bus.use_polling) { 2608 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2609 ehci_timeout, xfer); 2610 } 2611 ehci_add_intr_list(sc, exfer); 2612 xfer->status = USBD_IN_PROGRESS; 2613 splx(s); 2614 2615 #ifdef EHCI_DEBUG 2616 if (ehcidebug > 10) { 2617 DPRINTF(("ehci_device_request: status=%x\n", 2618 EOREAD4(sc, EHCI_USBSTS))); 2619 delay(10000); 2620 ehci_dump_regs(sc); 2621 ehci_dump_sqh(sc->sc_async_head); 2622 ehci_dump_sqh(sqh); 2623 ehci_dump_sqtds(setup); 2624 } 2625 #endif 2626 2627 return (USBD_NORMAL_COMPLETION); 2628 2629 bad3: 2630 ehci_free_sqtd(sc, stat); 2631 bad2: 2632 ehci_free_sqtd(sc, setup); 2633 bad1: 2634 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2635 xfer->status = err; 2636 usb_transfer_complete(xfer); 2637 return (err); 2638 #undef exfer 2639 } 2640 2641 /************************/ 2642 2643 Static usbd_status 2644 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2645 { 2646 usbd_status err; 2647 2648 /* Insert last in queue. */ 2649 err = usb_insert_transfer(xfer); 2650 if (err) 2651 return (err); 2652 2653 /* Pipe isn't running, start first */ 2654 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2655 } 2656 2657 usbd_status 2658 ehci_device_bulk_start(usbd_xfer_handle xfer) 2659 { 2660 #define exfer EXFER(xfer) 2661 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2662 usbd_device_handle dev = epipe->pipe.device; 2663 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2664 ehci_soft_qtd_t *data, *dataend; 2665 ehci_soft_qh_t *sqh; 2666 usbd_status err; 2667 int len, isread, endpt; 2668 int s; 2669 2670 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2671 xfer, xfer->length, xfer->flags)); 2672 2673 if (sc->sc_dying) 2674 return (USBD_IOERROR); 2675 2676 #ifdef DIAGNOSTIC 2677 if (xfer->rqflags & URQ_REQUEST) 2678 panic("ehci_device_bulk_transfer: a request"); 2679 #endif 2680 2681 len = xfer->length; 2682 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2683 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2684 sqh = epipe->sqh; 2685 2686 epipe->u.bulk.length = len; 2687 2688 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2689 &dataend); 2690 if (err) { 2691 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2692 xfer->status = err; 2693 usb_transfer_complete(xfer); 2694 return (err); 2695 } 2696 2697 #ifdef EHCI_DEBUG 2698 if (ehcidebug > 5) { 2699 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2700 ehci_dump_sqh(sqh); 2701 ehci_dump_sqtds(data); 2702 } 2703 #endif 2704 2705 /* Set up interrupt info. */ 2706 exfer->sqtdstart = data; 2707 exfer->sqtdend = dataend; 2708 #ifdef DIAGNOSTIC 2709 if (!exfer->isdone) { 2710 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2711 } 2712 exfer->isdone = 0; 2713 #endif 2714 2715 s = splusb(); 2716 ehci_set_qh_qtd(sqh, data); 2717 if (xfer->timeout && !sc->sc_bus.use_polling) { 2718 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2719 ehci_timeout, xfer); 2720 } 2721 ehci_add_intr_list(sc, exfer); 2722 xfer->status = USBD_IN_PROGRESS; 2723 splx(s); 2724 2725 #ifdef EHCI_DEBUG 2726 if (ehcidebug > 10) { 2727 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2728 delay(10000); 2729 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2730 ehci_dump_regs(sc); 2731 #if 0 2732 printf("async_head:\n"); 2733 ehci_dump_sqh(sc->sc_async_head); 2734 #endif 2735 printf("sqh:\n"); 2736 ehci_dump_sqh(sqh); 2737 ehci_dump_sqtds(data); 2738 } 2739 #endif 2740 2741 if (sc->sc_bus.use_polling) 2742 ehci_waitintr(sc, xfer); 2743 2744 return (USBD_IN_PROGRESS); 2745 #undef exfer 2746 } 2747 2748 Static void 2749 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2750 { 2751 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2752 ehci_abort_xfer(xfer, USBD_CANCELLED); 2753 } 2754 2755 /* 2756 * Close a device bulk pipe. 2757 */ 2758 Static void 2759 ehci_device_bulk_close(usbd_pipe_handle pipe) 2760 { 2761 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2762 2763 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2764 ehci_close_pipe(pipe, sc->sc_async_head); 2765 } 2766 2767 void 2768 ehci_device_bulk_done(usbd_xfer_handle xfer) 2769 { 2770 struct ehci_xfer *ex = EXFER(xfer); 2771 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2772 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2773 2774 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2775 xfer, xfer->actlen)); 2776 2777 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2778 ehci_del_intr_list(ex); /* remove from active list */ 2779 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2780 } 2781 2782 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2783 } 2784 2785 /************************/ 2786 2787 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2788 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2789 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2790 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2791 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2792 2793 /************************/ 2794 2795 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2796 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2797 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2798 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2799 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2800
Indexes created Tue Sep 23 07:09:52 GMT 2025