ehci.c revision 1.54
1 /* $NetBSD: ehci.c,v 1.54 2004/01/17 13:15:05 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) There might also be some issues with the data toggle, it was not 58 * completely tested to work properly under all condistions. If wrong 59 * toggle would be sent/recvd, bulk data transfers would stop working. 60 * 61 * 4) The meaty part to implement is the support for USB 2.0 hubs. 62 * They are quite compolicated since the need to be able to do 63 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 64 * So the hub driver needs to handle and schedule these things, to 65 * assign place in frame where different devices get to go. See chapter 66 * on hubs in USB 2.0 for details. 67 * 68 * 5) command failures are not recovered correctly 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.54 2004/01/17 13:15:05 jdolecek Exp $"); 73 74 #include "ohci.h" 75 #include "uhci.h" 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <sys/select.h> 83 #include <sys/proc.h> 84 #include <sys/queue.h> 85 86 #include <machine/bus.h> 87 #include <machine/endian.h> 88 89 #include <dev/usb/usb.h> 90 #include <dev/usb/usbdi.h> 91 #include <dev/usb/usbdivar.h> 92 #include <dev/usb/usb_mem.h> 93 #include <dev/usb/usb_quirks.h> 94 95 #include <dev/usb/ehcireg.h> 96 #include <dev/usb/ehcivar.h> 97 98 #ifdef EHCI_DEBUG 99 #define DPRINTF(x) if (ehcidebug) printf x 100 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 101 int ehcidebug = 0; 102 #ifndef __NetBSD__ 103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 104 #endif 105 #else 106 #define DPRINTF(x) 107 #define DPRINTFN(n,x) 108 #endif 109 110 struct ehci_pipe { 111 struct usbd_pipe pipe; 112 ehci_soft_qh_t *sqh; 113 union { 114 ehci_soft_qtd_t *qtd; 115 /* ehci_soft_itd_t *itd; */ 116 } tail; 117 union { 118 /* Control pipe */ 119 struct { 120 usb_dma_t reqdma; 121 u_int length; 122 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 123 } ctl; 124 /* Interrupt pipe */ 125 /* XXX */ 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 213 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 214 ehci_soft_qh_t *); 215 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 216 Static void ehci_sync_hc(ehci_softc_t *); 217 218 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 219 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 220 221 #ifdef EHCI_DEBUG 222 Static void ehci_dump_regs(ehci_softc_t *); 223 Static void ehci_dump(void); 224 Static ehci_softc_t *theehci; 225 Static void ehci_dump_link(ehci_link_t, int); 226 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 227 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 228 Static void ehci_dump_qtd(ehci_qtd_t *); 229 Static void ehci_dump_sqh(ehci_soft_qh_t *); 230 #ifdef DIAGNOSTIC 231 Static void ehci_dump_exfer(struct ehci_xfer *); 232 #endif 233 #endif 234 235 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 236 237 #define EHCI_INTR_ENDPT 1 238 239 #define ehci_add_intr_list(sc, ex) \ 240 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 241 #define ehci_del_intr_list(ex) \ 242 do { \ 243 LIST_REMOVE((ex), inext); \ 244 (ex)->inext.le_prev = NULL; \ 245 } while (0) 246 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 247 248 Static struct usbd_bus_methods ehci_bus_methods = { 249 ehci_open, 250 ehci_softintr, 251 ehci_poll, 252 ehci_allocm, 253 ehci_freem, 254 ehci_allocx, 255 ehci_freex, 256 }; 257 258 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 259 ehci_root_ctrl_transfer, 260 ehci_root_ctrl_start, 261 ehci_root_ctrl_abort, 262 ehci_root_ctrl_close, 263 ehci_noop, 264 ehci_root_ctrl_done, 265 }; 266 267 Static struct usbd_pipe_methods ehci_root_intr_methods = { 268 ehci_root_intr_transfer, 269 ehci_root_intr_start, 270 ehci_root_intr_abort, 271 ehci_root_intr_close, 272 ehci_noop, 273 ehci_root_intr_done, 274 }; 275 276 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 277 ehci_device_ctrl_transfer, 278 ehci_device_ctrl_start, 279 ehci_device_ctrl_abort, 280 ehci_device_ctrl_close, 281 ehci_noop, 282 ehci_device_ctrl_done, 283 }; 284 285 Static struct usbd_pipe_methods ehci_device_intr_methods = { 286 ehci_device_intr_transfer, 287 ehci_device_intr_start, 288 ehci_device_intr_abort, 289 ehci_device_intr_close, 290 ehci_device_clear_toggle, 291 ehci_device_intr_done, 292 }; 293 294 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 295 ehci_device_bulk_transfer, 296 ehci_device_bulk_start, 297 ehci_device_bulk_abort, 298 ehci_device_bulk_close, 299 ehci_device_clear_toggle, 300 ehci_device_bulk_done, 301 }; 302 303 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 304 ehci_device_isoc_transfer, 305 ehci_device_isoc_start, 306 ehci_device_isoc_abort, 307 ehci_device_isoc_close, 308 ehci_noop, 309 ehci_device_isoc_done, 310 }; 311 312 usbd_status 313 ehci_init(ehci_softc_t *sc) 314 { 315 u_int32_t version, sparams, cparams, hcr; 316 u_int i; 317 usbd_status err; 318 ehci_soft_qh_t *sqh; 319 320 DPRINTF(("ehci_init: start\n")); 321 #ifdef EHCI_DEBUG 322 theehci = sc; 323 #endif 324 325 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 326 327 version = EREAD2(sc, EHCI_HCIVERSION); 328 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 329 version >> 8, version & 0xff); 330 331 sparams = EREAD4(sc, EHCI_HCSPARAMS); 332 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 333 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 334 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 335 aprint_error("%s: wrong number of companions (%d != %d)\n", 336 USBDEVNAME(sc->sc_bus.bdev), 337 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 338 #if NOHCI == 0 || NUHCI == 0 339 aprint_error("%s: ohci or uhci probably not configured\n", 340 USBDEVNAME(sc->sc_bus.bdev)); 341 #endif 342 return (USBD_IOERROR); 343 } 344 if (sc->sc_ncomp > 0) { 345 aprint_normal("%s: companion controller%s, %d port%s each:", 346 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 347 EHCI_HCS_N_PCC(sparams), 348 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 349 for (i = 0; i < sc->sc_ncomp; i++) 350 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 351 aprint_normal("\n"); 352 } 353 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 354 cparams = EREAD4(sc, EHCI_HCCPARAMS); 355 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 356 357 if (EHCI_HCC_64BIT(cparams)) { 358 /* MUST clear segment register if 64 bit capable. */ 359 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 360 } 361 362 sc->sc_bus.usbrev = USBREV_2_0; 363 364 /* Reset the controller */ 365 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 366 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 367 usb_delay_ms(&sc->sc_bus, 1); 368 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 369 for (i = 0; i < 100; i++) { 370 usb_delay_ms(&sc->sc_bus, 1); 371 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 372 if (!hcr) 373 break; 374 } 375 if (hcr) { 376 aprint_error("%s: reset timeout\n", 377 USBDEVNAME(sc->sc_bus.bdev)); 378 return (USBD_IOERROR); 379 } 380 381 /* frame list size at default, read back what we got and use that */ 382 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 383 case 0: sc->sc_flsize = 1024*4; break; 384 case 1: sc->sc_flsize = 512*4; break; 385 case 2: sc->sc_flsize = 256*4; break; 386 case 3: return (USBD_IOERROR); 387 } 388 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 389 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 390 if (err) 391 return (err); 392 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 393 394 /* Set up the bus struct. */ 395 sc->sc_bus.methods = &ehci_bus_methods; 396 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 397 398 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 399 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 400 401 sc->sc_eintrs = EHCI_NORMAL_INTRS; 402 403 /* Allocate dummy QH that starts the async list. */ 404 sqh = ehci_alloc_sqh(sc); 405 if (sqh == NULL) { 406 err = USBD_NOMEM; 407 goto bad1; 408 } 409 /* Fill the QH */ 410 sqh->qh.qh_endp = 411 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 412 sqh->qh.qh_link = 413 htole32(sqh->physaddr | EHCI_LINK_QH); 414 sqh->qh.qh_curqtd = EHCI_NULL; 415 sqh->next = NULL; 416 /* Fill the overlay qTD */ 417 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 418 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 419 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 420 sqh->sqtd = NULL; 421 #ifdef EHCI_DEBUG 422 if (ehcidebug) { 423 ehci_dump_sqh(sqh); 424 } 425 #endif 426 427 /* Point to async list */ 428 sc->sc_async_head = sqh; 429 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 430 431 usb_callout_init(sc->sc_tmo_pcd); 432 433 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 434 435 /* Enable interrupts */ 436 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 437 438 /* Turn on controller */ 439 EOWRITE4(sc, EHCI_USBCMD, 440 EHCI_CMD_ITC_8 | /* 8 microframes */ 441 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 442 EHCI_CMD_ASE | 443 /* EHCI_CMD_PSE | */ 444 EHCI_CMD_RS); 445 446 /* Take over port ownership */ 447 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 448 449 for (i = 0; i < 100; i++) { 450 usb_delay_ms(&sc->sc_bus, 1); 451 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 452 if (!hcr) 453 break; 454 } 455 if (hcr) { 456 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 457 return (USBD_IOERROR); 458 } 459 460 return (USBD_NORMAL_COMPLETION); 461 462 #if 0 463 bad2: 464 ehci_free_sqh(sc, sc->sc_async_head); 465 #endif 466 bad1: 467 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 468 return (err); 469 } 470 471 int 472 ehci_intr(void *v) 473 { 474 ehci_softc_t *sc = v; 475 476 if (sc == NULL || sc->sc_dying) 477 return (0); 478 479 /* If we get an interrupt while polling, then just ignore it. */ 480 if (sc->sc_bus.use_polling) { 481 #ifdef DIAGNOSTIC 482 printf("ehci_intr: ignored interrupt while polling\n"); 483 #endif 484 return (0); 485 } 486 487 return (ehci_intr1(sc)); 488 } 489 490 Static int 491 ehci_intr1(ehci_softc_t *sc) 492 { 493 u_int32_t intrs, eintrs; 494 495 DPRINTFN(20,("ehci_intr1: enter\n")); 496 497 /* In case the interrupt occurs before initialization has completed. */ 498 if (sc == NULL) { 499 #ifdef DIAGNOSTIC 500 printf("ehci_intr: sc == NULL\n"); 501 #endif 502 return (0); 503 } 504 505 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 506 507 if (!intrs) 508 return (0); 509 510 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 511 eintrs = intrs & sc->sc_eintrs; 512 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 513 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 514 (u_int)eintrs)); 515 if (!eintrs) 516 return (0); 517 518 sc->sc_bus.intr_context++; 519 sc->sc_bus.no_intrs++; 520 if (eintrs & EHCI_STS_IAA) { 521 DPRINTF(("ehci_intr1: door bell\n")); 522 wakeup(&sc->sc_async_head); 523 eintrs &= ~EHCI_STS_IAA; 524 } 525 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 526 DPRINTFN(5,("ehci_intr1: %s %s\n", 527 eintrs & EHCI_STS_INT ? "INT" : "", 528 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 529 usb_schedsoftintr(&sc->sc_bus); 530 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 531 } 532 if (eintrs & EHCI_STS_HSE) { 533 printf("%s: unrecoverable error, controller halted\n", 534 USBDEVNAME(sc->sc_bus.bdev)); 535 /* XXX what else */ 536 } 537 if (eintrs & EHCI_STS_PCD) { 538 ehci_pcd(sc, sc->sc_intrxfer); 539 /* 540 * Disable PCD interrupt for now, because it will be 541 * on until the port has been reset. 542 */ 543 ehci_pcd_able(sc, 0); 544 /* Do not allow RHSC interrupts > 1 per second */ 545 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 546 eintrs &= ~EHCI_STS_PCD; 547 } 548 549 sc->sc_bus.intr_context--; 550 551 if (eintrs != 0) { 552 /* Block unprocessed interrupts. */ 553 sc->sc_eintrs &= ~eintrs; 554 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 555 printf("%s: blocking intrs 0x%x\n", 556 USBDEVNAME(sc->sc_bus.bdev), eintrs); 557 } 558 559 return (1); 560 } 561 562 void 563 ehci_pcd_able(ehci_softc_t *sc, int on) 564 { 565 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 566 if (on) 567 sc->sc_eintrs |= EHCI_STS_PCD; 568 else 569 sc->sc_eintrs &= ~EHCI_STS_PCD; 570 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 571 } 572 573 void 574 ehci_pcd_enable(void *v_sc) 575 { 576 ehci_softc_t *sc = v_sc; 577 578 ehci_pcd_able(sc, 1); 579 } 580 581 void 582 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 583 { 584 usbd_pipe_handle pipe; 585 u_char *p; 586 int i, m; 587 588 if (xfer == NULL) { 589 /* Just ignore the change. */ 590 return; 591 } 592 593 pipe = xfer->pipe; 594 595 p = KERNADDR(&xfer->dmabuf, 0); 596 m = min(sc->sc_noport, xfer->length * 8 - 1); 597 memset(p, 0, xfer->length); 598 for (i = 1; i <= m; i++) { 599 /* Pick out CHANGE bits from the status reg. */ 600 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 601 p[i/8] |= 1 << (i%8); 602 } 603 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 604 xfer->actlen = xfer->length; 605 xfer->status = USBD_NORMAL_COMPLETION; 606 607 usb_transfer_complete(xfer); 608 } 609 610 void 611 ehci_softintr(void *v) 612 { 613 ehci_softc_t *sc = v; 614 struct ehci_xfer *ex, *nextex; 615 616 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 617 sc->sc_bus.intr_context)); 618 619 sc->sc_bus.intr_context++; 620 621 /* 622 * The only explanation I can think of for why EHCI is as brain dead 623 * as UHCI interrupt-wise is that Intel was involved in both. 624 * An interrupt just tells us that something is done, we have no 625 * clue what, so we need to scan through all active transfers. :-( 626 */ 627 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 628 nextex = LIST_NEXT(ex, inext); 629 ehci_check_intr(sc, ex); 630 } 631 632 if (sc->sc_softwake) { 633 sc->sc_softwake = 0; 634 wakeup(&sc->sc_softwake); 635 } 636 637 sc->sc_bus.intr_context--; 638 } 639 640 /* Check for an interrupt. */ 641 void 642 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 643 { 644 ehci_soft_qtd_t *sqtd, *lsqtd; 645 u_int32_t status; 646 647 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 648 649 if (ex->sqtdstart == NULL) { 650 printf("ehci_check_intr: sqtdstart=NULL\n"); 651 return; 652 } 653 lsqtd = ex->sqtdend; 654 #ifdef DIAGNOSTIC 655 if (lsqtd == NULL) { 656 printf("ehci_check_intr: sqtd==0\n"); 657 return; 658 } 659 #endif 660 /* 661 * If the last TD is still active we need to check whether there 662 * is a an error somewhere in the middle, or whether there was a 663 * short packet (SPD and not ACTIVE). 664 */ 665 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 666 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 667 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 668 status = le32toh(sqtd->qtd.qtd_status); 669 /* If there's an active QTD the xfer isn't done. */ 670 if (status & EHCI_QTD_ACTIVE) 671 break; 672 /* Any kind of error makes the xfer done. */ 673 if (status & EHCI_QTD_HALTED) 674 goto done; 675 /* We want short packets, and it is short: it's done */ 676 if (EHCI_QTD_SET_BYTES(status) != 0) 677 goto done; 678 } 679 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 680 ex, ex->sqtdstart)); 681 return; 682 } 683 done: 684 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 685 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 686 ehci_idone(ex); 687 } 688 689 void 690 ehci_idone(struct ehci_xfer *ex) 691 { 692 usbd_xfer_handle xfer = &ex->xfer; 693 #ifdef EHCI_DEBUG 694 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 695 #endif 696 ehci_soft_qtd_t *sqtd; 697 u_int32_t status = 0, nstatus; 698 int actlen; 699 700 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 701 #ifdef DIAGNOSTIC 702 { 703 int s = splhigh(); 704 if (ex->isdone) { 705 splx(s); 706 #ifdef EHCI_DEBUG 707 printf("ehci_idone: ex is done!\n "); 708 ehci_dump_exfer(ex); 709 #else 710 printf("ehci_idone: ex=%p is done!\n", ex); 711 #endif 712 return; 713 } 714 ex->isdone = 1; 715 splx(s); 716 } 717 #endif 718 719 if (xfer->status == USBD_CANCELLED || 720 xfer->status == USBD_TIMEOUT) { 721 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 722 return; 723 } 724 725 #ifdef EHCI_DEBUG 726 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 727 if (ehcidebug > 10) 728 ehci_dump_sqtds(ex->sqtdstart); 729 #endif 730 731 /* The transfer is done, compute actual length and status. */ 732 actlen = 0; 733 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 734 nstatus = le32toh(sqtd->qtd.qtd_status); 735 if (nstatus & EHCI_QTD_ACTIVE) 736 break; 737 738 status = nstatus; 739 /* halt is ok if descriptor is last, and complete */ 740 if (sqtd->qtd.qtd_next == EHCI_NULL && 741 EHCI_QTD_GET_BYTES(status) == 0) 742 status &= ~EHCI_QTD_HALTED; 743 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 744 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 745 } 746 747 /* If there are left over TDs we need to update the toggle. */ 748 if (sqtd != NULL) { 749 if (!(xfer->rqflags & URQ_REQUEST)) 750 printf("ehci_idone: need toggle update\n"); 751 #if 0 752 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 753 #endif 754 } 755 756 status &= EHCI_QTD_STATERRS; 757 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 758 xfer->length, actlen, status)); 759 xfer->actlen = actlen; 760 if (status != 0) { 761 #ifdef EHCI_DEBUG 762 char sbuf[128]; 763 764 bitmask_snprintf((u_int32_t)status, 765 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 766 "\7HALTED", 767 sbuf, sizeof(sbuf)); 768 769 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 770 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 771 "status 0x%s\n", 772 xfer->pipe->device->address, 773 xfer->pipe->endpoint->edesc->bEndpointAddress, 774 sbuf)); 775 if (ehcidebug > 2) { 776 ehci_dump_sqh(epipe->sqh); 777 ehci_dump_sqtds(ex->sqtdstart); 778 } 779 #endif 780 if (status == EHCI_QTD_HALTED) 781 xfer->status = USBD_STALLED; 782 else 783 xfer->status = USBD_IOERROR; /* more info XXX */ 784 } else { 785 xfer->status = USBD_NORMAL_COMPLETION; 786 } 787 788 usb_transfer_complete(xfer); 789 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 790 } 791 792 /* 793 * Wait here until controller claims to have an interrupt. 794 * Then call ehci_intr and return. Use timeout to avoid waiting 795 * too long. 796 */ 797 void 798 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 799 { 800 int timo = xfer->timeout; 801 int usecs; 802 u_int32_t intrs; 803 804 xfer->status = USBD_IN_PROGRESS; 805 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 806 usb_delay_ms(&sc->sc_bus, 1); 807 if (sc->sc_dying) 808 break; 809 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 810 sc->sc_eintrs; 811 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 812 #ifdef OHCI_DEBUG 813 if (ehcidebug > 15) 814 ehci_dump_regs(sc); 815 #endif 816 if (intrs) { 817 ehci_intr1(sc); 818 if (xfer->status != USBD_IN_PROGRESS) 819 return; 820 } 821 } 822 823 /* Timeout */ 824 DPRINTF(("ehci_waitintr: timeout\n")); 825 xfer->status = USBD_TIMEOUT; 826 usb_transfer_complete(xfer); 827 /* XXX should free TD */ 828 } 829 830 void 831 ehci_poll(struct usbd_bus *bus) 832 { 833 ehci_softc_t *sc = (ehci_softc_t *)bus; 834 #ifdef EHCI_DEBUG 835 static int last; 836 int new; 837 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 838 if (new != last) { 839 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 840 last = new; 841 } 842 #endif 843 844 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 845 ehci_intr1(sc); 846 } 847 848 int 849 ehci_detach(struct ehci_softc *sc, int flags) 850 { 851 int rv = 0; 852 853 if (sc->sc_child != NULL) 854 rv = config_detach(sc->sc_child, flags); 855 856 if (rv != 0) 857 return (rv); 858 859 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 860 861 if (sc->sc_powerhook != NULL) 862 powerhook_disestablish(sc->sc_powerhook); 863 if (sc->sc_shutdownhook != NULL) 864 shutdownhook_disestablish(sc->sc_shutdownhook); 865 866 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 867 868 /* XXX free other data structures XXX */ 869 870 return (rv); 871 } 872 873 874 int 875 ehci_activate(device_ptr_t self, enum devact act) 876 { 877 struct ehci_softc *sc = (struct ehci_softc *)self; 878 int rv = 0; 879 880 switch (act) { 881 case DVACT_ACTIVATE: 882 return (EOPNOTSUPP); 883 884 case DVACT_DEACTIVATE: 885 if (sc->sc_child != NULL) 886 rv = config_deactivate(sc->sc_child); 887 sc->sc_dying = 1; 888 break; 889 } 890 return (rv); 891 } 892 893 /* 894 * Handle suspend/resume. 895 * 896 * We need to switch to polling mode here, because this routine is 897 * called from an intterupt context. This is all right since we 898 * are almost suspended anyway. 899 */ 900 void 901 ehci_power(int why, void *v) 902 { 903 ehci_softc_t *sc = v; 904 //u_int32_t ctl; 905 int s; 906 907 #ifdef EHCI_DEBUG 908 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 909 ehci_dump_regs(sc); 910 #endif 911 912 s = splhardusb(); 913 switch (why) { 914 case PWR_SUSPEND: 915 case PWR_STANDBY: 916 sc->sc_bus.use_polling++; 917 #if 0 918 OOO 919 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 920 if (sc->sc_control == 0) { 921 /* 922 * Preserve register values, in case that APM BIOS 923 * does not recover them. 924 */ 925 sc->sc_control = ctl; 926 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 927 } 928 ctl |= EHCI_HCFS_SUSPEND; 929 OWRITE4(sc, EHCI_CONTROL, ctl); 930 #endif 931 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 932 sc->sc_bus.use_polling--; 933 break; 934 case PWR_RESUME: 935 sc->sc_bus.use_polling++; 936 #if 0 937 OOO 938 /* Some broken BIOSes do not recover these values */ 939 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 940 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 941 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 942 if (sc->sc_intre) 943 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 944 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 945 if (sc->sc_control) 946 ctl = sc->sc_control; 947 else 948 ctl = OREAD4(sc, EHCI_CONTROL); 949 ctl |= EHCI_HCFS_RESUME; 950 OWRITE4(sc, EHCI_CONTROL, ctl); 951 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 952 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 953 OWRITE4(sc, EHCI_CONTROL, ctl); 954 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 955 sc->sc_control = sc->sc_intre = 0; 956 #endif 957 sc->sc_bus.use_polling--; 958 break; 959 case PWR_SOFTSUSPEND: 960 case PWR_SOFTSTANDBY: 961 case PWR_SOFTRESUME: 962 break; 963 } 964 splx(s); 965 } 966 967 /* 968 * Shut down the controller when the system is going down. 969 */ 970 void 971 ehci_shutdown(void *v) 972 { 973 ehci_softc_t *sc = v; 974 975 DPRINTF(("ehci_shutdown: stopping the HC\n")); 976 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 977 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 978 } 979 980 usbd_status 981 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 982 { 983 struct ehci_softc *sc = (struct ehci_softc *)bus; 984 usbd_status err; 985 986 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 987 #ifdef EHCI_DEBUG 988 if (err) 989 printf("ehci_allocm: usb_allocmem()=%d\n", err); 990 #endif 991 return (err); 992 } 993 994 void 995 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 996 { 997 struct ehci_softc *sc = (struct ehci_softc *)bus; 998 999 usb_freemem(&sc->sc_bus, dma); 1000 } 1001 1002 usbd_xfer_handle 1003 ehci_allocx(struct usbd_bus *bus) 1004 { 1005 struct ehci_softc *sc = (struct ehci_softc *)bus; 1006 usbd_xfer_handle xfer; 1007 1008 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1009 if (xfer != NULL) { 1010 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1011 #ifdef DIAGNOSTIC 1012 if (xfer->busy_free != XFER_FREE) { 1013 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1014 xfer->busy_free); 1015 } 1016 #endif 1017 } else { 1018 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1019 } 1020 if (xfer != NULL) { 1021 memset(xfer, 0, sizeof (struct ehci_xfer)); 1022 #ifdef DIAGNOSTIC 1023 EXFER(xfer)->isdone = 1; 1024 xfer->busy_free = XFER_BUSY; 1025 #endif 1026 } 1027 return (xfer); 1028 } 1029 1030 void 1031 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1032 { 1033 struct ehci_softc *sc = (struct ehci_softc *)bus; 1034 1035 #ifdef DIAGNOSTIC 1036 if (xfer->busy_free != XFER_BUSY) { 1037 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1038 xfer->busy_free); 1039 return; 1040 } 1041 xfer->busy_free = XFER_FREE; 1042 if (!EXFER(xfer)->isdone) { 1043 printf("ehci_freex: !isdone\n"); 1044 return; 1045 } 1046 #endif 1047 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1048 } 1049 1050 Static void 1051 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1052 { 1053 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1054 1055 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1056 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1057 #ifdef USB_DEBUG 1058 if (ehcidebug) 1059 usbd_dump_pipe(pipe); 1060 #endif 1061 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1062 } 1063 1064 Static void 1065 ehci_noop(usbd_pipe_handle pipe) 1066 { 1067 } 1068 1069 #ifdef EHCI_DEBUG 1070 void 1071 ehci_dump_regs(ehci_softc_t *sc) 1072 { 1073 int i; 1074 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1075 EOREAD4(sc, EHCI_USBCMD), 1076 EOREAD4(sc, EHCI_USBSTS), 1077 EOREAD4(sc, EHCI_USBINTR)); 1078 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1079 EOREAD4(sc, EHCI_FRINDEX), 1080 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1081 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1082 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1083 for (i = 1; i <= sc->sc_noport; i++) 1084 printf("port %d status=0x%08x\n", i, 1085 EOREAD4(sc, EHCI_PORTSC(i))); 1086 } 1087 1088 /* 1089 * Unused function - this is meant to be called from a kernel 1090 * debugger. 1091 */ 1092 void 1093 ehci_dump() 1094 { 1095 ehci_dump_regs(theehci); 1096 } 1097 1098 void 1099 ehci_dump_link(ehci_link_t link, int type) 1100 { 1101 link = le32toh(link); 1102 printf("0x%08x", link); 1103 if (link & EHCI_LINK_TERMINATE) 1104 printf("<T>"); 1105 else { 1106 printf("<"); 1107 if (type) { 1108 switch (EHCI_LINK_TYPE(link)) { 1109 case EHCI_LINK_ITD: printf("ITD"); break; 1110 case EHCI_LINK_QH: printf("QH"); break; 1111 case EHCI_LINK_SITD: printf("SITD"); break; 1112 case EHCI_LINK_FSTN: printf("FSTN"); break; 1113 } 1114 } 1115 printf(">"); 1116 } 1117 } 1118 1119 void 1120 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1121 { 1122 int i; 1123 u_int32_t stop; 1124 1125 stop = 0; 1126 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1127 ehci_dump_sqtd(sqtd); 1128 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1129 } 1130 if (sqtd) 1131 printf("dump aborted, too many TDs\n"); 1132 } 1133 1134 void 1135 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1136 { 1137 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1138 ehci_dump_qtd(&sqtd->qtd); 1139 } 1140 1141 void 1142 ehci_dump_qtd(ehci_qtd_t *qtd) 1143 { 1144 u_int32_t s; 1145 char sbuf[128]; 1146 1147 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1148 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1149 printf("\n"); 1150 s = le32toh(qtd->qtd_status); 1151 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1152 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1153 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1154 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1155 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1156 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1157 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1158 EHCI_QTD_GET_PID(s), sbuf); 1159 for (s = 0; s < 5; s++) 1160 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1161 } 1162 1163 void 1164 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1165 { 1166 ehci_qh_t *qh = &sqh->qh; 1167 u_int32_t endp, endphub; 1168 1169 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1170 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1171 endp = le32toh(qh->qh_endp); 1172 printf(" endp=0x%08x\n", endp); 1173 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1174 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1175 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1176 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1177 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1178 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1179 EHCI_QH_GET_NRL(endp)); 1180 endphub = le32toh(qh->qh_endphub); 1181 printf(" endphub=0x%08x\n", endphub); 1182 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1183 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1184 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1185 EHCI_QH_GET_MULT(endphub)); 1186 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1187 printf("Overlay qTD:\n"); 1188 ehci_dump_qtd(&qh->qh_qtd); 1189 } 1190 1191 #ifdef DIAGNOSTIC 1192 Static void 1193 ehci_dump_exfer(struct ehci_xfer *ex) 1194 { 1195 printf("ehci_dump_exfer: ex=%p\n", ex); 1196 } 1197 #endif 1198 #endif 1199 1200 usbd_status 1201 ehci_open(usbd_pipe_handle pipe) 1202 { 1203 usbd_device_handle dev = pipe->device; 1204 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1205 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1206 u_int8_t addr = dev->address; 1207 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1208 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1209 ehci_soft_qh_t *sqh; 1210 usbd_status err; 1211 int s; 1212 int speed, naks; 1213 1214 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1215 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1216 1217 if (sc->sc_dying) 1218 return (USBD_IOERROR); 1219 1220 if (addr == sc->sc_addr) { 1221 switch (ed->bEndpointAddress) { 1222 case USB_CONTROL_ENDPOINT: 1223 pipe->methods = &ehci_root_ctrl_methods; 1224 break; 1225 case UE_DIR_IN | EHCI_INTR_ENDPT: 1226 pipe->methods = &ehci_root_intr_methods; 1227 break; 1228 default: 1229 return (USBD_INVAL); 1230 } 1231 return (USBD_NORMAL_COMPLETION); 1232 } 1233 1234 /* XXX All this stuff is only valid for async. */ 1235 switch (dev->speed) { 1236 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1237 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1238 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1239 default: panic("ehci_open: bad device speed %d", dev->speed); 1240 } 1241 naks = 8; /* XXX */ 1242 sqh = ehci_alloc_sqh(sc); 1243 if (sqh == NULL) 1244 goto bad0; 1245 /* qh_link filled when the QH is added */ 1246 sqh->qh.qh_endp = htole32( 1247 EHCI_QH_SET_ADDR(addr) | 1248 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1249 EHCI_QH_SET_EPS(speed) | /* XXX */ 1250 /* XXX EHCI_QH_DTC ? */ 1251 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1252 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1253 EHCI_QH_CTL : 0) | 1254 EHCI_QH_SET_NRL(naks) 1255 ); 1256 sqh->qh.qh_endphub = htole32( 1257 EHCI_QH_SET_MULT(1) 1258 /* XXX TT stuff */ 1259 /* XXX interrupt mask */ 1260 ); 1261 sqh->qh.qh_curqtd = EHCI_NULL; 1262 /* Fill the overlay qTD */ 1263 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1264 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1265 sqh->qh.qh_qtd.qtd_status = htole32(0); 1266 1267 epipe->sqh = sqh; 1268 1269 switch (xfertype) { 1270 case UE_CONTROL: 1271 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1272 0, &epipe->u.ctl.reqdma); 1273 #ifdef EHCI_DEBUG 1274 if (err) 1275 printf("ehci_open: usb_allocmem()=%d\n", err); 1276 #endif 1277 if (err) 1278 goto bad1; 1279 pipe->methods = &ehci_device_ctrl_methods; 1280 s = splusb(); 1281 ehci_add_qh(sqh, sc->sc_async_head); 1282 splx(s); 1283 break; 1284 case UE_BULK: 1285 pipe->methods = &ehci_device_bulk_methods; 1286 s = splusb(); 1287 ehci_add_qh(sqh, sc->sc_async_head); 1288 splx(s); 1289 break; 1290 case UE_INTERRUPT: 1291 pipe->methods = &ehci_device_intr_methods; 1292 return (USBD_INVAL); 1293 case UE_ISOCHRONOUS: 1294 pipe->methods = &ehci_device_isoc_methods; 1295 return (USBD_INVAL); 1296 default: 1297 return (USBD_INVAL); 1298 } 1299 return (USBD_NORMAL_COMPLETION); 1300 1301 bad1: 1302 ehci_free_sqh(sc, sqh); 1303 bad0: 1304 return (USBD_NOMEM); 1305 } 1306 1307 /* 1308 * Add an ED to the schedule. Called at splusb(). 1309 */ 1310 void 1311 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1312 { 1313 SPLUSBCHECK; 1314 1315 sqh->next = head->next; 1316 sqh->qh.qh_link = head->qh.qh_link; 1317 head->next = sqh; 1318 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1319 1320 #ifdef EHCI_DEBUG 1321 if (ehcidebug > 5) { 1322 printf("ehci_add_qh:\n"); 1323 ehci_dump_sqh(sqh); 1324 } 1325 #endif 1326 } 1327 1328 /* 1329 * Remove an ED from the schedule. Called at splusb(). 1330 */ 1331 void 1332 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1333 { 1334 ehci_soft_qh_t *p; 1335 1336 SPLUSBCHECK; 1337 /* XXX */ 1338 for (p = head; p != NULL && p->next != sqh; p = p->next) 1339 ; 1340 if (p == NULL) 1341 panic("ehci_rem_qh: ED not found"); 1342 p->next = sqh->next; 1343 p->qh.qh_link = sqh->qh.qh_link; 1344 1345 ehci_sync_hc(sc); 1346 } 1347 1348 void 1349 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1350 { 1351 /* Halt while we are messing. */ 1352 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1353 sqh->qh.qh_curqtd = 0; 1354 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1355 sqh->sqtd = sqtd; 1356 /* Keep toggle, clear the rest, including length. */ 1357 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1358 } 1359 1360 /* 1361 * Ensure that the HC has released all references to the QH. We do this 1362 * by asking for a Async Advance Doorbell interrupt and then we wait for 1363 * the interrupt. 1364 * To make this easier we first obtain exclusive use of the doorbell. 1365 */ 1366 void 1367 ehci_sync_hc(ehci_softc_t *sc) 1368 { 1369 int s, error; 1370 1371 if (sc->sc_dying) { 1372 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1373 return; 1374 } 1375 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1376 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1377 s = splhardusb(); 1378 /* ask for doorbell */ 1379 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1380 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1381 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1382 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1383 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1384 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1385 splx(s); 1386 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1387 #ifdef DIAGNOSTIC 1388 if (error) 1389 printf("ehci_sync_hc: tsleep() = %d\n", error); 1390 #endif 1391 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1392 } 1393 1394 /***********/ 1395 1396 /* 1397 * Data structures and routines to emulate the root hub. 1398 */ 1399 Static usb_device_descriptor_t ehci_devd = { 1400 USB_DEVICE_DESCRIPTOR_SIZE, 1401 UDESC_DEVICE, /* type */ 1402 {0x00, 0x02}, /* USB version */ 1403 UDCLASS_HUB, /* class */ 1404 UDSUBCLASS_HUB, /* subclass */ 1405 UDPROTO_HSHUBSTT, /* protocol */ 1406 64, /* max packet */ 1407 {0},{0},{0x00,0x01}, /* device id */ 1408 1,2,0, /* string indicies */ 1409 1 /* # of configurations */ 1410 }; 1411 1412 Static usb_device_qualifier_t ehci_odevd = { 1413 USB_DEVICE_DESCRIPTOR_SIZE, 1414 UDESC_DEVICE_QUALIFIER, /* type */ 1415 {0x00, 0x02}, /* USB version */ 1416 UDCLASS_HUB, /* class */ 1417 UDSUBCLASS_HUB, /* subclass */ 1418 UDPROTO_FSHUB, /* protocol */ 1419 64, /* max packet */ 1420 1, /* # of configurations */ 1421 0 1422 }; 1423 1424 Static usb_config_descriptor_t ehci_confd = { 1425 USB_CONFIG_DESCRIPTOR_SIZE, 1426 UDESC_CONFIG, 1427 {USB_CONFIG_DESCRIPTOR_SIZE + 1428 USB_INTERFACE_DESCRIPTOR_SIZE + 1429 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1430 1, 1431 1, 1432 0, 1433 UC_SELF_POWERED, 1434 0 /* max power */ 1435 }; 1436 1437 Static usb_interface_descriptor_t ehci_ifcd = { 1438 USB_INTERFACE_DESCRIPTOR_SIZE, 1439 UDESC_INTERFACE, 1440 0, 1441 0, 1442 1, 1443 UICLASS_HUB, 1444 UISUBCLASS_HUB, 1445 UIPROTO_HSHUBSTT, 1446 0 1447 }; 1448 1449 Static usb_endpoint_descriptor_t ehci_endpd = { 1450 USB_ENDPOINT_DESCRIPTOR_SIZE, 1451 UDESC_ENDPOINT, 1452 UE_DIR_IN | EHCI_INTR_ENDPT, 1453 UE_INTERRUPT, 1454 {8, 0}, /* max packet */ 1455 255 1456 }; 1457 1458 Static usb_hub_descriptor_t ehci_hubd = { 1459 USB_HUB_DESCRIPTOR_SIZE, 1460 UDESC_HUB, 1461 0, 1462 {0,0}, 1463 0, 1464 0, 1465 {0}, 1466 }; 1467 1468 Static int 1469 ehci_str(p, l, s) 1470 usb_string_descriptor_t *p; 1471 int l; 1472 char *s; 1473 { 1474 int i; 1475 1476 if (l == 0) 1477 return (0); 1478 p->bLength = 2 * strlen(s) + 2; 1479 if (l == 1) 1480 return (1); 1481 p->bDescriptorType = UDESC_STRING; 1482 l -= 2; 1483 for (i = 0; s[i] && l > 1; i++, l -= 2) 1484 USETW2(p->bString[i], 0, s[i]); 1485 return (2*i+2); 1486 } 1487 1488 /* 1489 * Simulate a hardware hub by handling all the necessary requests. 1490 */ 1491 Static usbd_status 1492 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1493 { 1494 usbd_status err; 1495 1496 /* Insert last in queue. */ 1497 err = usb_insert_transfer(xfer); 1498 if (err) 1499 return (err); 1500 1501 /* Pipe isn't running, start first */ 1502 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1503 } 1504 1505 Static usbd_status 1506 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1507 { 1508 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1509 usb_device_request_t *req; 1510 void *buf = NULL; 1511 int port, i; 1512 int s, len, value, index, l, totlen = 0; 1513 usb_port_status_t ps; 1514 usb_hub_descriptor_t hubd; 1515 usbd_status err; 1516 u_int32_t v; 1517 1518 if (sc->sc_dying) 1519 return (USBD_IOERROR); 1520 1521 #ifdef DIAGNOSTIC 1522 if (!(xfer->rqflags & URQ_REQUEST)) 1523 /* XXX panic */ 1524 return (USBD_INVAL); 1525 #endif 1526 req = &xfer->request; 1527 1528 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1529 req->bmRequestType, req->bRequest)); 1530 1531 len = UGETW(req->wLength); 1532 value = UGETW(req->wValue); 1533 index = UGETW(req->wIndex); 1534 1535 if (len != 0) 1536 buf = KERNADDR(&xfer->dmabuf, 0); 1537 1538 #define C(x,y) ((x) | ((y) << 8)) 1539 switch(C(req->bRequest, req->bmRequestType)) { 1540 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1541 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1542 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1543 /* 1544 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1545 * for the integrated root hub. 1546 */ 1547 break; 1548 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1549 if (len > 0) { 1550 *(u_int8_t *)buf = sc->sc_conf; 1551 totlen = 1; 1552 } 1553 break; 1554 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1555 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1556 switch(value >> 8) { 1557 case UDESC_DEVICE: 1558 if ((value & 0xff) != 0) { 1559 err = USBD_IOERROR; 1560 goto ret; 1561 } 1562 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1563 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1564 memcpy(buf, &ehci_devd, l); 1565 break; 1566 /* 1567 * We can't really operate at another speed, but the spec says 1568 * we need this descriptor. 1569 */ 1570 case UDESC_DEVICE_QUALIFIER: 1571 if ((value & 0xff) != 0) { 1572 err = USBD_IOERROR; 1573 goto ret; 1574 } 1575 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1576 memcpy(buf, &ehci_odevd, l); 1577 break; 1578 /* 1579 * We can't really operate at another speed, but the spec says 1580 * we need this descriptor. 1581 */ 1582 case UDESC_OTHER_SPEED_CONFIGURATION: 1583 case UDESC_CONFIG: 1584 if ((value & 0xff) != 0) { 1585 err = USBD_IOERROR; 1586 goto ret; 1587 } 1588 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1589 memcpy(buf, &ehci_confd, l); 1590 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1591 value >> 8; 1592 buf = (char *)buf + l; 1593 len -= l; 1594 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1595 totlen += l; 1596 memcpy(buf, &ehci_ifcd, l); 1597 buf = (char *)buf + l; 1598 len -= l; 1599 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1600 totlen += l; 1601 memcpy(buf, &ehci_endpd, l); 1602 break; 1603 case UDESC_STRING: 1604 if (len == 0) 1605 break; 1606 *(u_int8_t *)buf = 0; 1607 totlen = 1; 1608 switch (value & 0xff) { 1609 case 1: /* Vendor */ 1610 totlen = ehci_str(buf, len, sc->sc_vendor); 1611 break; 1612 case 2: /* Product */ 1613 totlen = ehci_str(buf, len, "EHCI root hub"); 1614 break; 1615 } 1616 break; 1617 default: 1618 err = USBD_IOERROR; 1619 goto ret; 1620 } 1621 break; 1622 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1623 if (len > 0) { 1624 *(u_int8_t *)buf = 0; 1625 totlen = 1; 1626 } 1627 break; 1628 case C(UR_GET_STATUS, UT_READ_DEVICE): 1629 if (len > 1) { 1630 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1631 totlen = 2; 1632 } 1633 break; 1634 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1635 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1636 if (len > 1) { 1637 USETW(((usb_status_t *)buf)->wStatus, 0); 1638 totlen = 2; 1639 } 1640 break; 1641 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1642 if (value >= USB_MAX_DEVICES) { 1643 err = USBD_IOERROR; 1644 goto ret; 1645 } 1646 sc->sc_addr = value; 1647 break; 1648 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1649 if (value != 0 && value != 1) { 1650 err = USBD_IOERROR; 1651 goto ret; 1652 } 1653 sc->sc_conf = value; 1654 break; 1655 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1656 break; 1657 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1658 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1659 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1660 err = USBD_IOERROR; 1661 goto ret; 1662 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1663 break; 1664 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1665 break; 1666 /* Hub requests */ 1667 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1668 break; 1669 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1670 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1671 "port=%d feature=%d\n", 1672 index, value)); 1673 if (index < 1 || index > sc->sc_noport) { 1674 err = USBD_IOERROR; 1675 goto ret; 1676 } 1677 port = EHCI_PORTSC(index); 1678 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1679 switch(value) { 1680 case UHF_PORT_ENABLE: 1681 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1682 break; 1683 case UHF_PORT_SUSPEND: 1684 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1685 break; 1686 case UHF_PORT_POWER: 1687 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1688 break; 1689 case UHF_PORT_TEST: 1690 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1691 "%d\n", index)); 1692 break; 1693 case UHF_PORT_INDICATOR: 1694 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1695 "%d\n", index)); 1696 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1697 break; 1698 case UHF_C_PORT_CONNECTION: 1699 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1700 break; 1701 case UHF_C_PORT_ENABLE: 1702 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1703 break; 1704 case UHF_C_PORT_SUSPEND: 1705 /* how? */ 1706 break; 1707 case UHF_C_PORT_OVER_CURRENT: 1708 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1709 break; 1710 case UHF_C_PORT_RESET: 1711 sc->sc_isreset = 0; 1712 break; 1713 default: 1714 err = USBD_IOERROR; 1715 goto ret; 1716 } 1717 #if 0 1718 switch(value) { 1719 case UHF_C_PORT_CONNECTION: 1720 case UHF_C_PORT_ENABLE: 1721 case UHF_C_PORT_SUSPEND: 1722 case UHF_C_PORT_OVER_CURRENT: 1723 case UHF_C_PORT_RESET: 1724 /* Enable RHSC interrupt if condition is cleared. */ 1725 if ((OREAD4(sc, port) >> 16) == 0) 1726 ehci_pcd_able(sc, 1); 1727 break; 1728 default: 1729 break; 1730 } 1731 #endif 1732 break; 1733 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1734 if ((value & 0xff) != 0) { 1735 err = USBD_IOERROR; 1736 goto ret; 1737 } 1738 hubd = ehci_hubd; 1739 hubd.bNbrPorts = sc->sc_noport; 1740 v = EOREAD4(sc, EHCI_HCSPARAMS); 1741 USETW(hubd.wHubCharacteristics, 1742 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1743 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1744 ? UHD_PORT_IND : 0); 1745 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1746 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1747 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1748 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1749 l = min(len, hubd.bDescLength); 1750 totlen = l; 1751 memcpy(buf, &hubd, l); 1752 break; 1753 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1754 if (len != 4) { 1755 err = USBD_IOERROR; 1756 goto ret; 1757 } 1758 memset(buf, 0, len); /* ? XXX */ 1759 totlen = len; 1760 break; 1761 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1762 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1763 index)); 1764 if (index < 1 || index > sc->sc_noport) { 1765 err = USBD_IOERROR; 1766 goto ret; 1767 } 1768 if (len != 4) { 1769 err = USBD_IOERROR; 1770 goto ret; 1771 } 1772 v = EOREAD4(sc, EHCI_PORTSC(index)); 1773 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1774 v)); 1775 i = UPS_HIGH_SPEED; 1776 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1777 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1778 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1779 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1780 if (v & EHCI_PS_PR) i |= UPS_RESET; 1781 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1782 USETW(ps.wPortStatus, i); 1783 i = 0; 1784 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1785 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1786 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1787 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1788 USETW(ps.wPortChange, i); 1789 l = min(len, sizeof ps); 1790 memcpy(buf, &ps, l); 1791 totlen = l; 1792 break; 1793 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1794 err = USBD_IOERROR; 1795 goto ret; 1796 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1797 break; 1798 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1799 if (index < 1 || index > sc->sc_noport) { 1800 err = USBD_IOERROR; 1801 goto ret; 1802 } 1803 port = EHCI_PORTSC(index); 1804 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1805 switch(value) { 1806 case UHF_PORT_ENABLE: 1807 EOWRITE4(sc, port, v | EHCI_PS_PE); 1808 break; 1809 case UHF_PORT_SUSPEND: 1810 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1811 break; 1812 case UHF_PORT_RESET: 1813 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1814 index)); 1815 if (EHCI_PS_IS_LOWSPEED(v)) { 1816 /* Low speed device, give up ownership. */ 1817 ehci_disown(sc, index, 1); 1818 break; 1819 } 1820 /* Start reset sequence. */ 1821 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1822 EOWRITE4(sc, port, v | EHCI_PS_PR); 1823 /* Wait for reset to complete. */ 1824 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1825 if (sc->sc_dying) { 1826 err = USBD_IOERROR; 1827 goto ret; 1828 } 1829 /* Terminate reset sequence. */ 1830 EOWRITE4(sc, port, v); 1831 /* Wait for HC to complete reset. */ 1832 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1833 if (sc->sc_dying) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 v = EOREAD4(sc, port); 1838 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1839 if (v & EHCI_PS_PR) { 1840 printf("%s: port reset timeout\n", 1841 USBDEVNAME(sc->sc_bus.bdev)); 1842 return (USBD_TIMEOUT); 1843 } 1844 if (!(v & EHCI_PS_PE)) { 1845 /* Not a high speed device, give up ownership.*/ 1846 ehci_disown(sc, index, 0); 1847 break; 1848 } 1849 sc->sc_isreset = 1; 1850 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1851 index, v)); 1852 break; 1853 case UHF_PORT_POWER: 1854 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1855 "%d\n", index)); 1856 EOWRITE4(sc, port, v | EHCI_PS_PP); 1857 break; 1858 case UHF_PORT_TEST: 1859 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1860 "%d\n", index)); 1861 break; 1862 case UHF_PORT_INDICATOR: 1863 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1864 "%d\n", index)); 1865 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1866 break; 1867 default: 1868 err = USBD_IOERROR; 1869 goto ret; 1870 } 1871 break; 1872 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1873 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1874 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1875 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1876 break; 1877 default: 1878 err = USBD_IOERROR; 1879 goto ret; 1880 } 1881 xfer->actlen = totlen; 1882 err = USBD_NORMAL_COMPLETION; 1883 ret: 1884 xfer->status = err; 1885 s = splusb(); 1886 usb_transfer_complete(xfer); 1887 splx(s); 1888 return (USBD_IN_PROGRESS); 1889 } 1890 1891 void 1892 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1893 { 1894 int port; 1895 u_int32_t v; 1896 1897 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1898 #ifdef DIAGNOSTIC 1899 if (sc->sc_npcomp != 0) { 1900 int i = (index-1) / sc->sc_npcomp; 1901 if (i >= sc->sc_ncomp) 1902 printf("%s: strange port\n", 1903 USBDEVNAME(sc->sc_bus.bdev)); 1904 else 1905 printf("%s: handing over %s speed device on " 1906 "port %d to %s\n", 1907 USBDEVNAME(sc->sc_bus.bdev), 1908 lowspeed ? "low" : "full", 1909 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1910 } else { 1911 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1912 } 1913 #endif 1914 port = EHCI_PORTSC(index); 1915 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1916 EOWRITE4(sc, port, v | EHCI_PS_PO); 1917 } 1918 1919 /* Abort a root control request. */ 1920 Static void 1921 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1922 { 1923 /* Nothing to do, all transfers are synchronous. */ 1924 } 1925 1926 /* Close the root pipe. */ 1927 Static void 1928 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1929 { 1930 DPRINTF(("ehci_root_ctrl_close\n")); 1931 /* Nothing to do. */ 1932 } 1933 1934 void 1935 ehci_root_intr_done(usbd_xfer_handle xfer) 1936 { 1937 xfer->hcpriv = NULL; 1938 } 1939 1940 Static usbd_status 1941 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1942 { 1943 usbd_status err; 1944 1945 /* Insert last in queue. */ 1946 err = usb_insert_transfer(xfer); 1947 if (err) 1948 return (err); 1949 1950 /* Pipe isn't running, start first */ 1951 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1952 } 1953 1954 Static usbd_status 1955 ehci_root_intr_start(usbd_xfer_handle xfer) 1956 { 1957 usbd_pipe_handle pipe = xfer->pipe; 1958 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1959 1960 if (sc->sc_dying) 1961 return (USBD_IOERROR); 1962 1963 sc->sc_intrxfer = xfer; 1964 1965 return (USBD_IN_PROGRESS); 1966 } 1967 1968 /* Abort a root interrupt request. */ 1969 Static void 1970 ehci_root_intr_abort(usbd_xfer_handle xfer) 1971 { 1972 int s; 1973 1974 if (xfer->pipe->intrxfer == xfer) { 1975 DPRINTF(("ehci_root_intr_abort: remove\n")); 1976 xfer->pipe->intrxfer = NULL; 1977 } 1978 xfer->status = USBD_CANCELLED; 1979 s = splusb(); 1980 usb_transfer_complete(xfer); 1981 splx(s); 1982 } 1983 1984 /* Close the root pipe. */ 1985 Static void 1986 ehci_root_intr_close(usbd_pipe_handle pipe) 1987 { 1988 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1989 1990 DPRINTF(("ehci_root_intr_close\n")); 1991 1992 sc->sc_intrxfer = NULL; 1993 } 1994 1995 void 1996 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1997 { 1998 xfer->hcpriv = NULL; 1999 } 2000 2001 /************************/ 2002 2003 ehci_soft_qh_t * 2004 ehci_alloc_sqh(ehci_softc_t *sc) 2005 { 2006 ehci_soft_qh_t *sqh; 2007 usbd_status err; 2008 int i, offs; 2009 usb_dma_t dma; 2010 2011 if (sc->sc_freeqhs == NULL) { 2012 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2013 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2014 EHCI_PAGE_SIZE, &dma); 2015 #ifdef EHCI_DEBUG 2016 if (err) 2017 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2018 #endif 2019 if (err) 2020 return (NULL); 2021 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2022 offs = i * EHCI_SQH_SIZE; 2023 sqh = KERNADDR(&dma, offs); 2024 sqh->physaddr = DMAADDR(&dma, offs); 2025 sqh->next = sc->sc_freeqhs; 2026 sc->sc_freeqhs = sqh; 2027 } 2028 } 2029 sqh = sc->sc_freeqhs; 2030 sc->sc_freeqhs = sqh->next; 2031 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2032 sqh->next = NULL; 2033 return (sqh); 2034 } 2035 2036 void 2037 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2038 { 2039 sqh->next = sc->sc_freeqhs; 2040 sc->sc_freeqhs = sqh; 2041 } 2042 2043 ehci_soft_qtd_t * 2044 ehci_alloc_sqtd(ehci_softc_t *sc) 2045 { 2046 ehci_soft_qtd_t *sqtd; 2047 usbd_status err; 2048 int i, offs; 2049 usb_dma_t dma; 2050 int s; 2051 2052 if (sc->sc_freeqtds == NULL) { 2053 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2054 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2055 EHCI_PAGE_SIZE, &dma); 2056 #ifdef EHCI_DEBUG 2057 if (err) 2058 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2059 #endif 2060 if (err) 2061 return (NULL); 2062 s = splusb(); 2063 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2064 offs = i * EHCI_SQTD_SIZE; 2065 sqtd = KERNADDR(&dma, offs); 2066 sqtd->physaddr = DMAADDR(&dma, offs); 2067 sqtd->nextqtd = sc->sc_freeqtds; 2068 sc->sc_freeqtds = sqtd; 2069 } 2070 splx(s); 2071 } 2072 2073 s = splusb(); 2074 sqtd = sc->sc_freeqtds; 2075 sc->sc_freeqtds = sqtd->nextqtd; 2076 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2077 sqtd->nextqtd = NULL; 2078 sqtd->xfer = NULL; 2079 splx(s); 2080 2081 return (sqtd); 2082 } 2083 2084 void 2085 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2086 { 2087 int s; 2088 2089 s = splusb(); 2090 sqtd->nextqtd = sc->sc_freeqtds; 2091 sc->sc_freeqtds = sqtd; 2092 splx(s); 2093 } 2094 2095 usbd_status 2096 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2097 int alen, int rd, usbd_xfer_handle xfer, 2098 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2099 { 2100 ehci_soft_qtd_t *next, *cur; 2101 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2102 u_int32_t qtdstatus; 2103 int len, curlen; 2104 int i; 2105 usb_dma_t *dma = &xfer->dmabuf; 2106 2107 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2108 2109 len = alen; 2110 dataphys = DMAADDR(dma, 0); 2111 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2112 qtdstatus = htole32( 2113 EHCI_QTD_ACTIVE | 2114 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2115 EHCI_QTD_SET_CERR(3) 2116 /* IOC set below */ 2117 /* BYTES set below */ 2118 /* XXX Data toggle */ 2119 ); 2120 2121 cur = ehci_alloc_sqtd(sc); 2122 *sp = cur; 2123 if (cur == NULL) 2124 goto nomem; 2125 for (;;) { 2126 dataphyspage = EHCI_PAGE(dataphys); 2127 /* The EHCI hardware can handle at most 5 pages. */ 2128 if (dataphyslastpage - dataphyspage < 2129 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2130 /* we can handle it in this QTD */ 2131 curlen = len; 2132 } else { 2133 /* must use multiple TDs, fill as much as possible. */ 2134 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2135 EHCI_PAGE_OFFSET(dataphys); 2136 #ifdef DIAGNOSTIC 2137 if (curlen > len) { 2138 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2139 "len=0x%x offs=0x%x\n", curlen, len, 2140 EHCI_PAGE_OFFSET(dataphys)); 2141 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2142 dataphyslastpage, dataphyspage, 2143 dataphys); 2144 curlen = len; 2145 } 2146 #endif 2147 2148 /* XXX true for EHCI? */ 2149 /* the length must be a multiple of the max size */ 2150 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2151 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2152 "curlen=%d\n", curlen)); 2153 #ifdef DIAGNOSTIC 2154 if (curlen == 0) 2155 panic("ehci_alloc_std: curlen == 0"); 2156 #endif 2157 } 2158 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2159 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2160 dataphys, dataphyslastpage, 2161 len, curlen)); 2162 len -= curlen; 2163 2164 if (len != 0) { 2165 next = ehci_alloc_sqtd(sc); 2166 if (next == NULL) 2167 goto nomem; 2168 nextphys = next->physaddr; 2169 } else { 2170 next = NULL; 2171 nextphys = EHCI_NULL; 2172 } 2173 2174 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2175 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2176 if (i != 0) /* use offset only in first buffer */ 2177 a = EHCI_PAGE(a); 2178 cur->qtd.qtd_buffer[i] = htole32(a); 2179 cur->qtd.qtd_buffer_hi[i] = 0; 2180 #ifdef DIAGNOSTIC 2181 if (i >= EHCI_QTD_NBUFFERS) { 2182 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2183 goto nomem; 2184 } 2185 #endif 2186 } 2187 cur->nextqtd = next; 2188 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2189 cur->qtd.qtd_status = 2190 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2191 cur->xfer = xfer; 2192 cur->len = curlen; 2193 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2194 dataphys, dataphys + curlen)); 2195 if (len == 0) 2196 break; 2197 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2198 dataphys += curlen; 2199 cur = next; 2200 } 2201 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2202 *ep = cur; 2203 2204 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2205 *sp, *ep)); 2206 2207 return (USBD_NORMAL_COMPLETION); 2208 2209 nomem: 2210 /* XXX free chain */ 2211 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2212 return (USBD_NOMEM); 2213 } 2214 2215 Static void 2216 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2217 ehci_soft_qtd_t *sqtdend) 2218 { 2219 ehci_soft_qtd_t *p; 2220 int i; 2221 2222 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2223 sqtd, sqtdend)); 2224 2225 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2226 p = sqtd->nextqtd; 2227 ehci_free_sqtd(sc, sqtd); 2228 } 2229 } 2230 2231 /****************/ 2232 2233 /* 2234 * Close a reqular pipe. 2235 * Assumes that there are no pending transactions. 2236 */ 2237 void 2238 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2239 { 2240 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2241 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2242 ehci_soft_qh_t *sqh = epipe->sqh; 2243 int s; 2244 2245 s = splusb(); 2246 ehci_rem_qh(sc, sqh, head); 2247 splx(s); 2248 ehci_free_sqh(sc, epipe->sqh); 2249 } 2250 2251 /* 2252 * Abort a device request. 2253 * If this routine is called at splusb() it guarantees that the request 2254 * will be removed from the hardware scheduling and that the callback 2255 * for it will be called with USBD_CANCELLED status. 2256 * It's impossible to guarantee that the requested transfer will not 2257 * have happened since the hardware runs concurrently. 2258 * If the transaction has already happened we rely on the ordinary 2259 * interrupt processing to process it. 2260 * XXX This is most probably wrong. 2261 */ 2262 void 2263 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2264 { 2265 #define exfer EXFER(xfer) 2266 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2267 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2268 ehci_soft_qh_t *sqh = epipe->sqh; 2269 ehci_soft_qtd_t *sqtd; 2270 ehci_physaddr_t cur; 2271 u_int32_t qhstatus; 2272 int s; 2273 int hit; 2274 2275 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2276 2277 if (sc->sc_dying) { 2278 /* If we're dying, just do the software part. */ 2279 s = splusb(); 2280 xfer->status = status; /* make software ignore it */ 2281 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2282 usb_transfer_complete(xfer); 2283 splx(s); 2284 return; 2285 } 2286 2287 if (xfer->device->bus->intr_context || !curproc) 2288 panic("ehci_abort_xfer: not in process context"); 2289 2290 /* 2291 * Step 1: Make interrupt routine and hardware ignore xfer. 2292 */ 2293 s = splusb(); 2294 xfer->status = status; /* make software ignore it */ 2295 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2296 qhstatus = sqh->qh.qh_qtd.qtd_status; 2297 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2298 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2299 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2300 if (sqtd == exfer->sqtdend) 2301 break; 2302 } 2303 splx(s); 2304 2305 /* 2306 * Step 2: Wait until we know hardware has finished any possible 2307 * use of the xfer. Also make sure the soft interrupt routine 2308 * has run. 2309 */ 2310 ehci_sync_hc(sc); 2311 s = splusb(); 2312 sc->sc_softwake = 1; 2313 usb_schedsoftintr(&sc->sc_bus); 2314 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2315 splx(s); 2316 2317 /* 2318 * Step 3: Remove any vestiges of the xfer from the hardware. 2319 * The complication here is that the hardware may have executed 2320 * beyond the xfer we're trying to abort. So as we're scanning 2321 * the TDs of this xfer we check if the hardware points to 2322 * any of them. 2323 */ 2324 s = splusb(); /* XXX why? */ 2325 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2326 hit = 0; 2327 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2328 hit |= cur == sqtd->physaddr; 2329 if (sqtd == exfer->sqtdend) 2330 break; 2331 } 2332 sqtd = sqtd->nextqtd; 2333 /* Zap curqtd register if hardware pointed inside the xfer. */ 2334 if (hit && sqtd != NULL) { 2335 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2336 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2337 sqh->qh.qh_qtd.qtd_status = qhstatus; 2338 } else { 2339 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2340 } 2341 2342 /* 2343 * Step 4: Execute callback. 2344 */ 2345 #ifdef DIAGNOSTIC 2346 exfer->isdone = 1; 2347 #endif 2348 usb_transfer_complete(xfer); 2349 2350 splx(s); 2351 #undef exfer 2352 } 2353 2354 void 2355 ehci_timeout(void *addr) 2356 { 2357 struct ehci_xfer *exfer = addr; 2358 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2359 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2360 2361 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2362 #ifdef USB_DEBUG 2363 if (ehcidebug > 1) 2364 usbd_dump_pipe(exfer->xfer.pipe); 2365 #endif 2366 2367 if (sc->sc_dying) { 2368 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2369 return; 2370 } 2371 2372 /* Execute the abort in a process context. */ 2373 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2374 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2375 } 2376 2377 void 2378 ehci_timeout_task(void *addr) 2379 { 2380 usbd_xfer_handle xfer = addr; 2381 int s; 2382 2383 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2384 2385 s = splusb(); 2386 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2387 splx(s); 2388 } 2389 2390 /************************/ 2391 2392 Static usbd_status 2393 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2394 { 2395 usbd_status err; 2396 2397 /* Insert last in queue. */ 2398 err = usb_insert_transfer(xfer); 2399 if (err) 2400 return (err); 2401 2402 /* Pipe isn't running, start first */ 2403 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2404 } 2405 2406 Static usbd_status 2407 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2408 { 2409 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2410 usbd_status err; 2411 2412 if (sc->sc_dying) 2413 return (USBD_IOERROR); 2414 2415 #ifdef DIAGNOSTIC 2416 if (!(xfer->rqflags & URQ_REQUEST)) { 2417 /* XXX panic */ 2418 printf("ehci_device_ctrl_transfer: not a request\n"); 2419 return (USBD_INVAL); 2420 } 2421 #endif 2422 2423 err = ehci_device_request(xfer); 2424 if (err) 2425 return (err); 2426 2427 if (sc->sc_bus.use_polling) 2428 ehci_waitintr(sc, xfer); 2429 return (USBD_IN_PROGRESS); 2430 } 2431 2432 void 2433 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2434 { 2435 struct ehci_xfer *ex = EXFER(xfer); 2436 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2437 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2438 2439 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2440 2441 #ifdef DIAGNOSTIC 2442 if (!(xfer->rqflags & URQ_REQUEST)) { 2443 panic("ehci_ctrl_done: not a request"); 2444 } 2445 #endif 2446 2447 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2448 ehci_del_intr_list(ex); /* remove from active list */ 2449 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2450 } 2451 2452 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2453 } 2454 2455 /* Abort a device control request. */ 2456 Static void 2457 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2458 { 2459 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2460 ehci_abort_xfer(xfer, USBD_CANCELLED); 2461 } 2462 2463 /* Close a device control pipe. */ 2464 Static void 2465 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2466 { 2467 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2468 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2469 2470 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2471 ehci_close_pipe(pipe, sc->sc_async_head); 2472 } 2473 2474 usbd_status 2475 ehci_device_request(usbd_xfer_handle xfer) 2476 { 2477 #define exfer EXFER(xfer) 2478 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2479 usb_device_request_t *req = &xfer->request; 2480 usbd_device_handle dev = epipe->pipe.device; 2481 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2482 int addr = dev->address; 2483 ehci_soft_qtd_t *setup, *stat, *next; 2484 ehci_soft_qh_t *sqh; 2485 int isread; 2486 int len; 2487 usbd_status err; 2488 int s; 2489 2490 isread = req->bmRequestType & UT_READ; 2491 len = UGETW(req->wLength); 2492 2493 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2494 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2495 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2496 UGETW(req->wIndex), len, addr, 2497 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2498 2499 setup = ehci_alloc_sqtd(sc); 2500 if (setup == NULL) { 2501 err = USBD_NOMEM; 2502 goto bad1; 2503 } 2504 stat = ehci_alloc_sqtd(sc); 2505 if (stat == NULL) { 2506 err = USBD_NOMEM; 2507 goto bad2; 2508 } 2509 2510 sqh = epipe->sqh; 2511 epipe->u.ctl.length = len; 2512 2513 /* XXX 2514 * Since we're messing with the QH we must know the HC is in sync. 2515 * This needs to go away since it slows down control transfers. 2516 * Removing it entails: 2517 * - fill the QH only once with addr & wMaxPacketSize 2518 * - put the correct data toggles in the qtds and set DTC 2519 */ 2520 /* ehci_sync_hc(sc); */ 2521 /* Update device address and length since they may have changed. */ 2522 /* XXX This only needs to be done once, but it's too early in open. */ 2523 /* XXXX Should not touch ED here! */ 2524 sqh->qh.qh_endp = 2525 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2526 htole32( 2527 EHCI_QH_SET_ADDR(addr) | 2528 /* EHCI_QH_DTC | */ 2529 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2530 ); 2531 /* Clear toggle */ 2532 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2533 2534 /* Set up data transaction */ 2535 if (len != 0) { 2536 ehci_soft_qtd_t *end; 2537 2538 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2539 &next, &end); 2540 if (err) 2541 goto bad3; 2542 end->nextqtd = stat; 2543 end->qtd.qtd_next = 2544 end->qtd.qtd_altnext = htole32(stat->physaddr); 2545 /* Start toggle at 1. */ 2546 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2547 } else { 2548 next = stat; 2549 } 2550 2551 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2552 2553 setup->qtd.qtd_status = htole32( 2554 EHCI_QTD_ACTIVE | 2555 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2556 EHCI_QTD_SET_CERR(3) | 2557 EHCI_QTD_SET_BYTES(sizeof *req) 2558 ); 2559 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2560 setup->qtd.qtd_buffer_hi[0] = 0; 2561 setup->nextqtd = next; 2562 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2563 setup->xfer = xfer; 2564 setup->len = sizeof *req; 2565 2566 stat->qtd.qtd_status = htole32( 2567 EHCI_QTD_ACTIVE | 2568 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2569 EHCI_QTD_SET_CERR(3) | 2570 EHCI_QTD_IOC 2571 ); 2572 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2573 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2574 stat->nextqtd = NULL; 2575 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2576 stat->xfer = xfer; 2577 stat->len = 0; 2578 2579 #ifdef EHCI_DEBUG 2580 if (ehcidebug > 5) { 2581 DPRINTF(("ehci_device_request:\n")); 2582 ehci_dump_sqh(sqh); 2583 ehci_dump_sqtds(setup); 2584 } 2585 #endif 2586 2587 exfer->sqtdstart = setup; 2588 exfer->sqtdend = stat; 2589 #ifdef DIAGNOSTIC 2590 if (!exfer->isdone) { 2591 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2592 } 2593 exfer->isdone = 0; 2594 #endif 2595 2596 /* Insert qTD in QH list. */ 2597 s = splusb(); 2598 ehci_set_qh_qtd(sqh, setup); 2599 if (xfer->timeout && !sc->sc_bus.use_polling) { 2600 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2601 ehci_timeout, xfer); 2602 } 2603 ehci_add_intr_list(sc, exfer); 2604 xfer->status = USBD_IN_PROGRESS; 2605 splx(s); 2606 2607 #ifdef EHCI_DEBUG 2608 if (ehcidebug > 10) { 2609 DPRINTF(("ehci_device_request: status=%x\n", 2610 EOREAD4(sc, EHCI_USBSTS))); 2611 delay(10000); 2612 ehci_dump_regs(sc); 2613 ehci_dump_sqh(sc->sc_async_head); 2614 ehci_dump_sqh(sqh); 2615 ehci_dump_sqtds(setup); 2616 } 2617 #endif 2618 2619 return (USBD_NORMAL_COMPLETION); 2620 2621 bad3: 2622 ehci_free_sqtd(sc, stat); 2623 bad2: 2624 ehci_free_sqtd(sc, setup); 2625 bad1: 2626 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2627 xfer->status = err; 2628 usb_transfer_complete(xfer); 2629 return (err); 2630 #undef exfer 2631 } 2632 2633 /************************/ 2634 2635 Static usbd_status 2636 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2637 { 2638 usbd_status err; 2639 2640 /* Insert last in queue. */ 2641 err = usb_insert_transfer(xfer); 2642 if (err) 2643 return (err); 2644 2645 /* Pipe isn't running, start first */ 2646 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2647 } 2648 2649 usbd_status 2650 ehci_device_bulk_start(usbd_xfer_handle xfer) 2651 { 2652 #define exfer EXFER(xfer) 2653 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2654 usbd_device_handle dev = epipe->pipe.device; 2655 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2656 ehci_soft_qtd_t *data, *dataend; 2657 ehci_soft_qh_t *sqh; 2658 usbd_status err; 2659 int len, isread, endpt; 2660 int s; 2661 2662 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2663 xfer, xfer->length, xfer->flags)); 2664 2665 if (sc->sc_dying) 2666 return (USBD_IOERROR); 2667 2668 #ifdef DIAGNOSTIC 2669 if (xfer->rqflags & URQ_REQUEST) 2670 panic("ehci_device_bulk_transfer: a request"); 2671 #endif 2672 2673 len = xfer->length; 2674 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2675 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2676 sqh = epipe->sqh; 2677 2678 epipe->u.bulk.length = len; 2679 2680 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2681 &dataend); 2682 if (err) { 2683 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2684 xfer->status = err; 2685 usb_transfer_complete(xfer); 2686 return (err); 2687 } 2688 2689 #ifdef EHCI_DEBUG 2690 if (ehcidebug > 5) { 2691 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2692 ehci_dump_sqh(sqh); 2693 ehci_dump_sqtds(data); 2694 } 2695 #endif 2696 2697 /* Set up interrupt info. */ 2698 exfer->sqtdstart = data; 2699 exfer->sqtdend = dataend; 2700 #ifdef DIAGNOSTIC 2701 if (!exfer->isdone) { 2702 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2703 } 2704 exfer->isdone = 0; 2705 #endif 2706 2707 s = splusb(); 2708 ehci_set_qh_qtd(sqh, data); 2709 if (xfer->timeout && !sc->sc_bus.use_polling) { 2710 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2711 ehci_timeout, xfer); 2712 } 2713 ehci_add_intr_list(sc, exfer); 2714 xfer->status = USBD_IN_PROGRESS; 2715 splx(s); 2716 2717 #ifdef EHCI_DEBUG 2718 if (ehcidebug > 10) { 2719 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2720 delay(10000); 2721 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2722 ehci_dump_regs(sc); 2723 #if 0 2724 printf("async_head:\n"); 2725 ehci_dump_sqh(sc->sc_async_head); 2726 #endif 2727 printf("sqh:\n"); 2728 ehci_dump_sqh(sqh); 2729 ehci_dump_sqtds(data); 2730 } 2731 #endif 2732 2733 if (sc->sc_bus.use_polling) 2734 ehci_waitintr(sc, xfer); 2735 2736 return (USBD_IN_PROGRESS); 2737 #undef exfer 2738 } 2739 2740 Static void 2741 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2742 { 2743 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2744 ehci_abort_xfer(xfer, USBD_CANCELLED); 2745 } 2746 2747 /* 2748 * Close a device bulk pipe. 2749 */ 2750 Static void 2751 ehci_device_bulk_close(usbd_pipe_handle pipe) 2752 { 2753 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2754 2755 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2756 ehci_close_pipe(pipe, sc->sc_async_head); 2757 } 2758 2759 void 2760 ehci_device_bulk_done(usbd_xfer_handle xfer) 2761 { 2762 struct ehci_xfer *ex = EXFER(xfer); 2763 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2764 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2765 2766 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2767 xfer, xfer->actlen)); 2768 2769 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2770 ehci_del_intr_list(ex); /* remove from active list */ 2771 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2772 } 2773 2774 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2775 } 2776 2777 /************************/ 2778 2779 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2780 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2781 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2782 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2783 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2784 2785 /************************/ 2786 2787 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2788 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2789 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2790 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2791 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2792
Indexes created Wed Oct 01 19:09:53 GMT 2025