ehci.c revision 1.54.2.13.2.1
1 /* $NetBSD: ehci.c,v 1.54.2.13.2.1 2005/05/13 17:09:31 riz Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite compolicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.54.2.13.2.1 2005/05/13 17:09:31 riz Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) if (ehcidebug) printf x 96 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 363 USB_MEM_RESERVE); 364 365 /* Reset the controller */ 366 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 367 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 368 usb_delay_ms(&sc->sc_bus, 1); 369 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 370 for (i = 0; i < 100; i++) { 371 usb_delay_ms(&sc->sc_bus, 1); 372 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 373 if (!hcr) 374 break; 375 } 376 if (hcr) { 377 aprint_error("%s: reset timeout\n", 378 USBDEVNAME(sc->sc_bus.bdev)); 379 return (USBD_IOERROR); 380 } 381 382 /* frame list size at default, read back what we got and use that */ 383 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 384 case 0: sc->sc_flsize = 1024*4; break; 385 case 1: sc->sc_flsize = 512*4; break; 386 case 2: sc->sc_flsize = 256*4; break; 387 case 3: return (USBD_IOERROR); 388 } 389 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 390 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 391 if (err) 392 return (err); 393 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 394 395 /* Set up the bus struct. */ 396 sc->sc_bus.methods = &ehci_bus_methods; 397 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 398 399 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 400 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 401 402 sc->sc_eintrs = EHCI_NORMAL_INTRS; 403 404 /* Allocate dummy QH that starts the async list. */ 405 sqh = ehci_alloc_sqh(sc); 406 if (sqh == NULL) { 407 err = USBD_NOMEM; 408 goto bad1; 409 } 410 /* Fill the QH */ 411 sqh->qh.qh_endp = 412 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 413 sqh->qh.qh_link = 414 htole32(sqh->physaddr | EHCI_LINK_QH); 415 sqh->qh.qh_curqtd = EHCI_NULL; 416 sqh->next = NULL; 417 /* Fill the overlay qTD */ 418 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 419 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 420 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 421 sqh->sqtd = NULL; 422 #ifdef EHCI_DEBUG 423 if (ehcidebug) { 424 ehci_dump_sqh(sqh); 425 } 426 #endif 427 428 /* Point to async list */ 429 sc->sc_async_head = sqh; 430 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 431 432 usb_callout_init(sc->sc_tmo_pcd); 433 434 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 435 436 /* Enable interrupts */ 437 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 438 439 /* Turn on controller */ 440 EOWRITE4(sc, EHCI_USBCMD, 441 EHCI_CMD_ITC_8 | /* 8 microframes */ 442 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 443 EHCI_CMD_ASE | 444 /* EHCI_CMD_PSE | */ 445 EHCI_CMD_RS); 446 447 /* Take over port ownership */ 448 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 449 450 for (i = 0; i < 100; i++) { 451 usb_delay_ms(&sc->sc_bus, 1); 452 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 453 if (!hcr) 454 break; 455 } 456 if (hcr) { 457 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 458 return (USBD_IOERROR); 459 } 460 461 return (USBD_NORMAL_COMPLETION); 462 463 #if 0 464 bad2: 465 ehci_free_sqh(sc, sc->sc_async_head); 466 #endif 467 bad1: 468 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 469 return (err); 470 } 471 472 int 473 ehci_intr(void *v) 474 { 475 ehci_softc_t *sc = v; 476 477 if (sc == NULL || sc->sc_dying) 478 return (0); 479 480 /* If we get an interrupt while polling, then just ignore it. */ 481 if (sc->sc_bus.use_polling) { 482 #ifdef DIAGNOSTIC 483 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 484 #endif 485 return (0); 486 } 487 488 return (ehci_intr1(sc)); 489 } 490 491 Static int 492 ehci_intr1(ehci_softc_t *sc) 493 { 494 u_int32_t intrs, eintrs; 495 496 DPRINTFN(20,("ehci_intr1: enter\n")); 497 498 /* In case the interrupt occurs before initialization has completed. */ 499 if (sc == NULL) { 500 #ifdef DIAGNOSTIC 501 printf("ehci_intr: sc == NULL\n"); 502 #endif 503 return (0); 504 } 505 506 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 507 508 if (!intrs) 509 return (0); 510 511 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 512 eintrs = intrs & sc->sc_eintrs; 513 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 514 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 515 (u_int)eintrs)); 516 if (!eintrs) 517 return (0); 518 519 sc->sc_bus.intr_context++; 520 sc->sc_bus.no_intrs++; 521 if (eintrs & EHCI_STS_IAA) { 522 DPRINTF(("ehci_intr1: door bell\n")); 523 wakeup(&sc->sc_async_head); 524 eintrs &= ~EHCI_STS_IAA; 525 } 526 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 527 DPRINTFN(5,("ehci_intr1: %s %s\n", 528 eintrs & EHCI_STS_INT ? "INT" : "", 529 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 530 usb_schedsoftintr(&sc->sc_bus); 531 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 532 } 533 if (eintrs & EHCI_STS_HSE) { 534 printf("%s: unrecoverable error, controller halted\n", 535 USBDEVNAME(sc->sc_bus.bdev)); 536 /* XXX what else */ 537 } 538 if (eintrs & EHCI_STS_PCD) { 539 ehci_pcd(sc, sc->sc_intrxfer); 540 /* 541 * Disable PCD interrupt for now, because it will be 542 * on until the port has been reset. 543 */ 544 ehci_pcd_able(sc, 0); 545 /* Do not allow RHSC interrupts > 1 per second */ 546 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 547 eintrs &= ~EHCI_STS_PCD; 548 } 549 550 sc->sc_bus.intr_context--; 551 552 if (eintrs != 0) { 553 /* Block unprocessed interrupts. */ 554 sc->sc_eintrs &= ~eintrs; 555 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 556 printf("%s: blocking intrs 0x%x\n", 557 USBDEVNAME(sc->sc_bus.bdev), eintrs); 558 } 559 560 return (1); 561 } 562 563 void 564 ehci_pcd_able(ehci_softc_t *sc, int on) 565 { 566 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 567 if (on) 568 sc->sc_eintrs |= EHCI_STS_PCD; 569 else 570 sc->sc_eintrs &= ~EHCI_STS_PCD; 571 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 572 } 573 574 void 575 ehci_pcd_enable(void *v_sc) 576 { 577 ehci_softc_t *sc = v_sc; 578 579 ehci_pcd_able(sc, 1); 580 } 581 582 void 583 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 584 { 585 usbd_pipe_handle pipe; 586 u_char *p; 587 int i, m; 588 589 if (xfer == NULL) { 590 /* Just ignore the change. */ 591 return; 592 } 593 594 pipe = xfer->pipe; 595 596 p = KERNADDR(&xfer->dmabuf, 0); 597 m = min(sc->sc_noport, xfer->length * 8 - 1); 598 memset(p, 0, xfer->length); 599 for (i = 1; i <= m; i++) { 600 /* Pick out CHANGE bits from the status reg. */ 601 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 602 p[i/8] |= 1 << (i%8); 603 } 604 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 605 xfer->actlen = xfer->length; 606 xfer->status = USBD_NORMAL_COMPLETION; 607 608 usb_transfer_complete(xfer); 609 } 610 611 void 612 ehci_softintr(void *v) 613 { 614 ehci_softc_t *sc = v; 615 struct ehci_xfer *ex, *nextex; 616 617 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 618 sc->sc_bus.intr_context)); 619 620 sc->sc_bus.intr_context++; 621 622 /* 623 * The only explanation I can think of for why EHCI is as brain dead 624 * as UHCI interrupt-wise is that Intel was involved in both. 625 * An interrupt just tells us that something is done, we have no 626 * clue what, so we need to scan through all active transfers. :-( 627 */ 628 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 629 nextex = LIST_NEXT(ex, inext); 630 ehci_check_intr(sc, ex); 631 } 632 633 if (sc->sc_softwake) { 634 sc->sc_softwake = 0; 635 wakeup(&sc->sc_softwake); 636 } 637 638 sc->sc_bus.intr_context--; 639 } 640 641 /* Check for an interrupt. */ 642 void 643 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 644 { 645 ehci_soft_qtd_t *sqtd, *lsqtd; 646 u_int32_t status; 647 648 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 649 650 if (ex->sqtdstart == NULL) { 651 printf("ehci_check_intr: sqtdstart=NULL\n"); 652 return; 653 } 654 lsqtd = ex->sqtdend; 655 #ifdef DIAGNOSTIC 656 if (lsqtd == NULL) { 657 printf("ehci_check_intr: sqtd==0\n"); 658 return; 659 } 660 #endif 661 /* 662 * If the last TD is still active we need to check whether there 663 * is a an error somewhere in the middle, or whether there was a 664 * short packet (SPD and not ACTIVE). 665 */ 666 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 667 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 668 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 669 status = le32toh(sqtd->qtd.qtd_status); 670 /* If there's an active QTD the xfer isn't done. */ 671 if (status & EHCI_QTD_ACTIVE) 672 break; 673 /* Any kind of error makes the xfer done. */ 674 if (status & EHCI_QTD_HALTED) 675 goto done; 676 /* We want short packets, and it is short: it's done */ 677 if (EHCI_QTD_GET_BYTES(status) != 0) 678 goto done; 679 } 680 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 681 ex, ex->sqtdstart)); 682 return; 683 } 684 done: 685 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 686 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 687 ehci_idone(ex); 688 } 689 690 void 691 ehci_idone(struct ehci_xfer *ex) 692 { 693 usbd_xfer_handle xfer = &ex->xfer; 694 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 695 ehci_soft_qtd_t *sqtd; 696 u_int32_t status = 0, nstatus; 697 int actlen; 698 699 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 700 #ifdef DIAGNOSTIC 701 { 702 int s = splhigh(); 703 if (ex->isdone) { 704 splx(s); 705 #ifdef EHCI_DEBUG 706 printf("ehci_idone: ex is done!\n "); 707 ehci_dump_exfer(ex); 708 #else 709 printf("ehci_idone: ex=%p is done!\n", ex); 710 #endif 711 return; 712 } 713 ex->isdone = 1; 714 splx(s); 715 } 716 #endif 717 718 if (xfer->status == USBD_CANCELLED || 719 xfer->status == USBD_TIMEOUT) { 720 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 721 return; 722 } 723 724 #ifdef EHCI_DEBUG 725 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 726 if (ehcidebug > 10) 727 ehci_dump_sqtds(ex->sqtdstart); 728 #endif 729 730 /* The transfer is done, compute actual length and status. */ 731 actlen = 0; 732 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 733 nstatus = le32toh(sqtd->qtd.qtd_status); 734 if (nstatus & EHCI_QTD_ACTIVE) 735 break; 736 737 status = nstatus; 738 /* halt is ok if descriptor is last, and complete */ 739 if (sqtd->qtd.qtd_next == EHCI_NULL && 740 EHCI_QTD_GET_BYTES(status) == 0) 741 status &= ~EHCI_QTD_HALTED; 742 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 743 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 744 } 745 746 /* If there are left over TDs we need to update the toggle. */ 747 if (sqtd != NULL) { 748 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 749 #if 0 750 ehci_dump_sqh(epipe->sqh); 751 ehci_dump_sqtds(ex->sqtdstart); 752 #endif 753 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 754 } 755 756 status &= EHCI_QTD_STATERRS; 757 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 758 xfer->length, actlen, status)); 759 xfer->actlen = actlen; 760 if (status != 0) { 761 #ifdef EHCI_DEBUG 762 char sbuf[128]; 763 764 bitmask_snprintf((u_int32_t)status, 765 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 766 "\3MISSED", sbuf, sizeof(sbuf)); 767 768 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 769 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 770 "status 0x%s\n", 771 xfer->pipe->device->address, 772 xfer->pipe->endpoint->edesc->bEndpointAddress, 773 sbuf)); 774 if (ehcidebug > 2) { 775 ehci_dump_sqh(epipe->sqh); 776 ehci_dump_sqtds(ex->sqtdstart); 777 } 778 #endif 779 if (status == EHCI_QTD_HALTED) 780 xfer->status = USBD_STALLED; 781 else 782 xfer->status = USBD_IOERROR; /* more info XXX */ 783 } else { 784 xfer->status = USBD_NORMAL_COMPLETION; 785 } 786 787 usb_transfer_complete(xfer); 788 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 789 } 790 791 /* 792 * Wait here until controller claims to have an interrupt. 793 * Then call ehci_intr and return. Use timeout to avoid waiting 794 * too long. 795 */ 796 void 797 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 798 { 799 int timo = xfer->timeout; 800 int usecs; 801 u_int32_t intrs; 802 803 xfer->status = USBD_IN_PROGRESS; 804 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 805 usb_delay_ms(&sc->sc_bus, 1); 806 if (sc->sc_dying) 807 break; 808 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 809 sc->sc_eintrs; 810 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 811 #ifdef EHCI_DEBUG 812 if (ehcidebug > 15) 813 ehci_dump_regs(sc); 814 #endif 815 if (intrs) { 816 ehci_intr1(sc); 817 if (xfer->status != USBD_IN_PROGRESS) 818 return; 819 } 820 } 821 822 /* Timeout */ 823 DPRINTF(("ehci_waitintr: timeout\n")); 824 xfer->status = USBD_TIMEOUT; 825 usb_transfer_complete(xfer); 826 /* XXX should free TD */ 827 } 828 829 void 830 ehci_poll(struct usbd_bus *bus) 831 { 832 ehci_softc_t *sc = (ehci_softc_t *)bus; 833 #ifdef EHCI_DEBUG 834 static int last; 835 int new; 836 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 837 if (new != last) { 838 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 839 last = new; 840 } 841 #endif 842 843 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 844 ehci_intr1(sc); 845 } 846 847 int 848 ehci_detach(struct ehci_softc *sc, int flags) 849 { 850 int rv = 0; 851 852 if (sc->sc_child != NULL) 853 rv = config_detach(sc->sc_child, flags); 854 855 if (rv != 0) 856 return (rv); 857 858 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 859 860 if (sc->sc_powerhook != NULL) 861 powerhook_disestablish(sc->sc_powerhook); 862 if (sc->sc_shutdownhook != NULL) 863 shutdownhook_disestablish(sc->sc_shutdownhook); 864 865 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 866 867 /* XXX free other data structures XXX */ 868 869 return (rv); 870 } 871 872 873 int 874 ehci_activate(device_ptr_t self, enum devact act) 875 { 876 struct ehci_softc *sc = (struct ehci_softc *)self; 877 int rv = 0; 878 879 switch (act) { 880 case DVACT_ACTIVATE: 881 return (EOPNOTSUPP); 882 883 case DVACT_DEACTIVATE: 884 if (sc->sc_child != NULL) 885 rv = config_deactivate(sc->sc_child); 886 sc->sc_dying = 1; 887 break; 888 } 889 return (rv); 890 } 891 892 /* 893 * Handle suspend/resume. 894 * 895 * We need to switch to polling mode here, because this routine is 896 * called from an intterupt context. This is all right since we 897 * are almost suspended anyway. 898 */ 899 void 900 ehci_power(int why, void *v) 901 { 902 ehci_softc_t *sc = v; 903 //u_int32_t ctl; 904 int s; 905 906 #ifdef EHCI_DEBUG 907 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 908 ehci_dump_regs(sc); 909 #endif 910 911 s = splhardusb(); 912 switch (why) { 913 case PWR_SUSPEND: 914 case PWR_STANDBY: 915 sc->sc_bus.use_polling++; 916 #if 0 917 OOO 918 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 919 if (sc->sc_control == 0) { 920 /* 921 * Preserve register values, in case that APM BIOS 922 * does not recover them. 923 */ 924 sc->sc_control = ctl; 925 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 926 } 927 ctl |= EHCI_HCFS_SUSPEND; 928 OWRITE4(sc, EHCI_CONTROL, ctl); 929 #endif 930 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 931 sc->sc_bus.use_polling--; 932 break; 933 case PWR_RESUME: 934 sc->sc_bus.use_polling++; 935 #if 0 936 OOO 937 /* Some broken BIOSes do not recover these values */ 938 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 939 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 940 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 941 if (sc->sc_intre) 942 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 943 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 944 if (sc->sc_control) 945 ctl = sc->sc_control; 946 else 947 ctl = OREAD4(sc, EHCI_CONTROL); 948 ctl |= EHCI_HCFS_RESUME; 949 OWRITE4(sc, EHCI_CONTROL, ctl); 950 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 951 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 952 OWRITE4(sc, EHCI_CONTROL, ctl); 953 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 954 sc->sc_control = sc->sc_intre = 0; 955 #endif 956 sc->sc_bus.use_polling--; 957 break; 958 case PWR_SOFTSUSPEND: 959 case PWR_SOFTSTANDBY: 960 case PWR_SOFTRESUME: 961 break; 962 } 963 splx(s); 964 } 965 966 /* 967 * Shut down the controller when the system is going down. 968 */ 969 void 970 ehci_shutdown(void *v) 971 { 972 ehci_softc_t *sc = v; 973 974 DPRINTF(("ehci_shutdown: stopping the HC\n")); 975 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 976 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 977 } 978 979 usbd_status 980 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 981 { 982 struct ehci_softc *sc = (struct ehci_softc *)bus; 983 usbd_status err; 984 985 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 986 if (err == USBD_NOMEM) 987 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 988 #ifdef EHCI_DEBUG 989 if (err) 990 printf("ehci_allocm: usb_allocmem()=%d\n", err); 991 #endif 992 return (err); 993 } 994 995 void 996 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 997 { 998 struct ehci_softc *sc = (struct ehci_softc *)bus; 999 1000 if (dma->block->flags & USB_DMA_RESERVE) { 1001 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1002 dma); 1003 return; 1004 } 1005 usb_freemem(&sc->sc_bus, dma); 1006 } 1007 1008 usbd_xfer_handle 1009 ehci_allocx(struct usbd_bus *bus) 1010 { 1011 struct ehci_softc *sc = (struct ehci_softc *)bus; 1012 usbd_xfer_handle xfer; 1013 1014 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1015 if (xfer != NULL) { 1016 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1017 #ifdef DIAGNOSTIC 1018 if (xfer->busy_free != XFER_FREE) { 1019 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1020 xfer->busy_free); 1021 } 1022 #endif 1023 } else { 1024 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1025 } 1026 if (xfer != NULL) { 1027 memset(xfer, 0, sizeof (struct ehci_xfer)); 1028 #ifdef DIAGNOSTIC 1029 EXFER(xfer)->isdone = 1; 1030 xfer->busy_free = XFER_BUSY; 1031 #endif 1032 } 1033 return (xfer); 1034 } 1035 1036 void 1037 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1038 { 1039 struct ehci_softc *sc = (struct ehci_softc *)bus; 1040 1041 #ifdef DIAGNOSTIC 1042 if (xfer->busy_free != XFER_BUSY) { 1043 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1044 xfer->busy_free); 1045 return; 1046 } 1047 xfer->busy_free = XFER_FREE; 1048 if (!EXFER(xfer)->isdone) { 1049 printf("ehci_freex: !isdone\n"); 1050 return; 1051 } 1052 #endif 1053 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1054 } 1055 1056 Static void 1057 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1058 { 1059 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1060 1061 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1062 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1063 #ifdef USB_DEBUG 1064 if (ehcidebug) 1065 usbd_dump_pipe(pipe); 1066 #endif 1067 epipe->nexttoggle = 0; 1068 } 1069 1070 Static void 1071 ehci_noop(usbd_pipe_handle pipe) 1072 { 1073 } 1074 1075 #ifdef EHCI_DEBUG 1076 void 1077 ehci_dump_regs(ehci_softc_t *sc) 1078 { 1079 int i; 1080 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1081 EOREAD4(sc, EHCI_USBCMD), 1082 EOREAD4(sc, EHCI_USBSTS), 1083 EOREAD4(sc, EHCI_USBINTR)); 1084 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1085 EOREAD4(sc, EHCI_FRINDEX), 1086 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1087 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1088 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1089 for (i = 1; i <= sc->sc_noport; i++) 1090 printf("port %d status=0x%08x\n", i, 1091 EOREAD4(sc, EHCI_PORTSC(i))); 1092 } 1093 1094 /* 1095 * Unused function - this is meant to be called from a kernel 1096 * debugger. 1097 */ 1098 void 1099 ehci_dump() 1100 { 1101 ehci_dump_regs(theehci); 1102 } 1103 1104 void 1105 ehci_dump_link(ehci_link_t link, int type) 1106 { 1107 link = le32toh(link); 1108 printf("0x%08x", link); 1109 if (link & EHCI_LINK_TERMINATE) 1110 printf("<T>"); 1111 else { 1112 printf("<"); 1113 if (type) { 1114 switch (EHCI_LINK_TYPE(link)) { 1115 case EHCI_LINK_ITD: printf("ITD"); break; 1116 case EHCI_LINK_QH: printf("QH"); break; 1117 case EHCI_LINK_SITD: printf("SITD"); break; 1118 case EHCI_LINK_FSTN: printf("FSTN"); break; 1119 } 1120 } 1121 printf(">"); 1122 } 1123 } 1124 1125 void 1126 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1127 { 1128 int i; 1129 u_int32_t stop; 1130 1131 stop = 0; 1132 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1133 ehci_dump_sqtd(sqtd); 1134 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1135 } 1136 if (sqtd) 1137 printf("dump aborted, too many TDs\n"); 1138 } 1139 1140 void 1141 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1142 { 1143 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1144 ehci_dump_qtd(&sqtd->qtd); 1145 } 1146 1147 void 1148 ehci_dump_qtd(ehci_qtd_t *qtd) 1149 { 1150 u_int32_t s; 1151 char sbuf[128]; 1152 1153 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1154 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1155 printf("\n"); 1156 s = le32toh(qtd->qtd_status); 1157 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1158 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1159 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1160 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1161 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1162 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1163 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1164 EHCI_QTD_GET_PID(s), sbuf); 1165 for (s = 0; s < 5; s++) 1166 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1167 } 1168 1169 void 1170 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1171 { 1172 ehci_qh_t *qh = &sqh->qh; 1173 u_int32_t endp, endphub; 1174 1175 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1176 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1177 endp = le32toh(qh->qh_endp); 1178 printf(" endp=0x%08x\n", endp); 1179 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1180 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1181 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1182 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1183 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1184 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1185 EHCI_QH_GET_NRL(endp)); 1186 endphub = le32toh(qh->qh_endphub); 1187 printf(" endphub=0x%08x\n", endphub); 1188 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1189 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1190 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1191 EHCI_QH_GET_MULT(endphub)); 1192 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1193 printf("Overlay qTD:\n"); 1194 ehci_dump_qtd(&qh->qh_qtd); 1195 } 1196 1197 #ifdef DIAGNOSTIC 1198 Static void 1199 ehci_dump_exfer(struct ehci_xfer *ex) 1200 { 1201 printf("ehci_dump_exfer: ex=%p\n", ex); 1202 } 1203 #endif 1204 #endif 1205 1206 usbd_status 1207 ehci_open(usbd_pipe_handle pipe) 1208 { 1209 usbd_device_handle dev = pipe->device; 1210 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1211 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1212 u_int8_t addr = dev->address; 1213 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1214 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1215 ehci_soft_qh_t *sqh; 1216 usbd_status err; 1217 int s; 1218 int speed, naks; 1219 1220 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1221 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1222 1223 if (sc->sc_dying) 1224 return (USBD_IOERROR); 1225 1226 epipe->nexttoggle = 0; 1227 1228 if (addr == sc->sc_addr) { 1229 switch (ed->bEndpointAddress) { 1230 case USB_CONTROL_ENDPOINT: 1231 pipe->methods = &ehci_root_ctrl_methods; 1232 break; 1233 case UE_DIR_IN | EHCI_INTR_ENDPT: 1234 pipe->methods = &ehci_root_intr_methods; 1235 break; 1236 default: 1237 return (USBD_INVAL); 1238 } 1239 return (USBD_NORMAL_COMPLETION); 1240 } 1241 1242 /* XXX All this stuff is only valid for async. */ 1243 switch (dev->speed) { 1244 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1245 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1246 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1247 default: panic("ehci_open: bad device speed %d", dev->speed); 1248 } 1249 naks = 8; /* XXX */ 1250 sqh = ehci_alloc_sqh(sc); 1251 if (sqh == NULL) 1252 goto bad0; 1253 /* qh_link filled when the QH is added */ 1254 sqh->qh.qh_endp = htole32( 1255 EHCI_QH_SET_ADDR(addr) | 1256 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1257 EHCI_QH_SET_EPS(speed) | 1258 EHCI_QH_DTC | 1259 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1260 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1261 EHCI_QH_CTL : 0) | 1262 EHCI_QH_SET_NRL(naks) 1263 ); 1264 sqh->qh.qh_endphub = htole32( 1265 EHCI_QH_SET_MULT(1) 1266 /* XXX TT stuff */ 1267 /* XXX interrupt mask */ 1268 ); 1269 sqh->qh.qh_curqtd = EHCI_NULL; 1270 /* Fill the overlay qTD */ 1271 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1272 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1273 sqh->qh.qh_qtd.qtd_status = htole32(0); 1274 1275 epipe->sqh = sqh; 1276 1277 switch (xfertype) { 1278 case UE_CONTROL: 1279 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1280 0, &epipe->u.ctl.reqdma); 1281 #ifdef EHCI_DEBUG 1282 if (err) 1283 printf("ehci_open: usb_allocmem()=%d\n", err); 1284 #endif 1285 if (err) 1286 goto bad1; 1287 pipe->methods = &ehci_device_ctrl_methods; 1288 s = splusb(); 1289 ehci_add_qh(sqh, sc->sc_async_head); 1290 splx(s); 1291 break; 1292 case UE_BULK: 1293 pipe->methods = &ehci_device_bulk_methods; 1294 s = splusb(); 1295 ehci_add_qh(sqh, sc->sc_async_head); 1296 splx(s); 1297 break; 1298 case UE_INTERRUPT: 1299 pipe->methods = &ehci_device_intr_methods; 1300 return (USBD_INVAL); 1301 case UE_ISOCHRONOUS: 1302 pipe->methods = &ehci_device_isoc_methods; 1303 return (USBD_INVAL); 1304 default: 1305 return (USBD_INVAL); 1306 } 1307 return (USBD_NORMAL_COMPLETION); 1308 1309 bad1: 1310 ehci_free_sqh(sc, sqh); 1311 bad0: 1312 return (USBD_NOMEM); 1313 } 1314 1315 /* 1316 * Add an ED to the schedule. Called at splusb(). 1317 */ 1318 void 1319 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1320 { 1321 SPLUSBCHECK; 1322 1323 sqh->next = head->next; 1324 sqh->qh.qh_link = head->qh.qh_link; 1325 head->next = sqh; 1326 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1327 1328 #ifdef EHCI_DEBUG 1329 if (ehcidebug > 5) { 1330 printf("ehci_add_qh:\n"); 1331 ehci_dump_sqh(sqh); 1332 } 1333 #endif 1334 } 1335 1336 /* 1337 * Remove an ED from the schedule. Called at splusb(). 1338 */ 1339 void 1340 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1341 { 1342 ehci_soft_qh_t *p; 1343 1344 SPLUSBCHECK; 1345 /* XXX */ 1346 for (p = head; p != NULL && p->next != sqh; p = p->next) 1347 ; 1348 if (p == NULL) 1349 panic("ehci_rem_qh: ED not found"); 1350 p->next = sqh->next; 1351 p->qh.qh_link = sqh->qh.qh_link; 1352 1353 ehci_sync_hc(sc); 1354 } 1355 1356 void 1357 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1358 { 1359 /* Halt while we are messing. */ 1360 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1361 sqh->qh.qh_curqtd = 0; 1362 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1363 sqh->sqtd = sqtd; 1364 /* Clear halt */ 1365 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1366 } 1367 1368 /* 1369 * Ensure that the HC has released all references to the QH. We do this 1370 * by asking for a Async Advance Doorbell interrupt and then we wait for 1371 * the interrupt. 1372 * To make this easier we first obtain exclusive use of the doorbell. 1373 */ 1374 void 1375 ehci_sync_hc(ehci_softc_t *sc) 1376 { 1377 int s, error; 1378 1379 if (sc->sc_dying) { 1380 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1381 return; 1382 } 1383 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1384 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1385 s = splhardusb(); 1386 /* ask for doorbell */ 1387 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1388 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1389 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1390 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1391 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1392 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1393 splx(s); 1394 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1395 #ifdef DIAGNOSTIC 1396 if (error) 1397 printf("ehci_sync_hc: tsleep() = %d\n", error); 1398 #endif 1399 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1400 } 1401 1402 /***********/ 1403 1404 /* 1405 * Data structures and routines to emulate the root hub. 1406 */ 1407 Static usb_device_descriptor_t ehci_devd = { 1408 USB_DEVICE_DESCRIPTOR_SIZE, 1409 UDESC_DEVICE, /* type */ 1410 {0x00, 0x02}, /* USB version */ 1411 UDCLASS_HUB, /* class */ 1412 UDSUBCLASS_HUB, /* subclass */ 1413 UDPROTO_HSHUBSTT, /* protocol */ 1414 64, /* max packet */ 1415 {0},{0},{0x00,0x01}, /* device id */ 1416 1,2,0, /* string indicies */ 1417 1 /* # of configurations */ 1418 }; 1419 1420 Static usb_device_qualifier_t ehci_odevd = { 1421 USB_DEVICE_DESCRIPTOR_SIZE, 1422 UDESC_DEVICE_QUALIFIER, /* type */ 1423 {0x00, 0x02}, /* USB version */ 1424 UDCLASS_HUB, /* class */ 1425 UDSUBCLASS_HUB, /* subclass */ 1426 UDPROTO_FSHUB, /* protocol */ 1427 64, /* max packet */ 1428 1, /* # of configurations */ 1429 0 1430 }; 1431 1432 Static usb_config_descriptor_t ehci_confd = { 1433 USB_CONFIG_DESCRIPTOR_SIZE, 1434 UDESC_CONFIG, 1435 {USB_CONFIG_DESCRIPTOR_SIZE + 1436 USB_INTERFACE_DESCRIPTOR_SIZE + 1437 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1438 1, 1439 1, 1440 0, 1441 UC_SELF_POWERED, 1442 0 /* max power */ 1443 }; 1444 1445 Static usb_interface_descriptor_t ehci_ifcd = { 1446 USB_INTERFACE_DESCRIPTOR_SIZE, 1447 UDESC_INTERFACE, 1448 0, 1449 0, 1450 1, 1451 UICLASS_HUB, 1452 UISUBCLASS_HUB, 1453 UIPROTO_HSHUBSTT, 1454 0 1455 }; 1456 1457 Static usb_endpoint_descriptor_t ehci_endpd = { 1458 USB_ENDPOINT_DESCRIPTOR_SIZE, 1459 UDESC_ENDPOINT, 1460 UE_DIR_IN | EHCI_INTR_ENDPT, 1461 UE_INTERRUPT, 1462 {8, 0}, /* max packet */ 1463 255 1464 }; 1465 1466 Static usb_hub_descriptor_t ehci_hubd = { 1467 USB_HUB_DESCRIPTOR_SIZE, 1468 UDESC_HUB, 1469 0, 1470 {0,0}, 1471 0, 1472 0, 1473 {0}, 1474 }; 1475 1476 Static int 1477 ehci_str(p, l, s) 1478 usb_string_descriptor_t *p; 1479 int l; 1480 char *s; 1481 { 1482 int i; 1483 1484 if (l == 0) 1485 return (0); 1486 p->bLength = 2 * strlen(s) + 2; 1487 if (l == 1) 1488 return (1); 1489 p->bDescriptorType = UDESC_STRING; 1490 l -= 2; 1491 for (i = 0; s[i] && l > 1; i++, l -= 2) 1492 USETW2(p->bString[i], 0, s[i]); 1493 return (2*i+2); 1494 } 1495 1496 /* 1497 * Simulate a hardware hub by handling all the necessary requests. 1498 */ 1499 Static usbd_status 1500 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1501 { 1502 usbd_status err; 1503 1504 /* Insert last in queue. */ 1505 err = usb_insert_transfer(xfer); 1506 if (err) 1507 return (err); 1508 1509 /* Pipe isn't running, start first */ 1510 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1511 } 1512 1513 Static usbd_status 1514 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1515 { 1516 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1517 usb_device_request_t *req; 1518 void *buf = NULL; 1519 int port, i; 1520 int s, len, value, index, l, totlen = 0; 1521 usb_port_status_t ps; 1522 usb_hub_descriptor_t hubd; 1523 usbd_status err; 1524 u_int32_t v; 1525 1526 if (sc->sc_dying) 1527 return (USBD_IOERROR); 1528 1529 #ifdef DIAGNOSTIC 1530 if (!(xfer->rqflags & URQ_REQUEST)) 1531 /* XXX panic */ 1532 return (USBD_INVAL); 1533 #endif 1534 req = &xfer->request; 1535 1536 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1537 req->bmRequestType, req->bRequest)); 1538 1539 len = UGETW(req->wLength); 1540 value = UGETW(req->wValue); 1541 index = UGETW(req->wIndex); 1542 1543 if (len != 0) 1544 buf = KERNADDR(&xfer->dmabuf, 0); 1545 1546 #define C(x,y) ((x) | ((y) << 8)) 1547 switch(C(req->bRequest, req->bmRequestType)) { 1548 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1549 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1550 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1551 /* 1552 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1553 * for the integrated root hub. 1554 */ 1555 break; 1556 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1557 if (len > 0) { 1558 *(u_int8_t *)buf = sc->sc_conf; 1559 totlen = 1; 1560 } 1561 break; 1562 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1563 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1564 switch(value >> 8) { 1565 case UDESC_DEVICE: 1566 if ((value & 0xff) != 0) { 1567 err = USBD_IOERROR; 1568 goto ret; 1569 } 1570 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1571 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1572 memcpy(buf, &ehci_devd, l); 1573 break; 1574 /* 1575 * We can't really operate at another speed, but the spec says 1576 * we need this descriptor. 1577 */ 1578 case UDESC_DEVICE_QUALIFIER: 1579 if ((value & 0xff) != 0) { 1580 err = USBD_IOERROR; 1581 goto ret; 1582 } 1583 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1584 memcpy(buf, &ehci_odevd, l); 1585 break; 1586 /* 1587 * We can't really operate at another speed, but the spec says 1588 * we need this descriptor. 1589 */ 1590 case UDESC_OTHER_SPEED_CONFIGURATION: 1591 case UDESC_CONFIG: 1592 if ((value & 0xff) != 0) { 1593 err = USBD_IOERROR; 1594 goto ret; 1595 } 1596 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1597 memcpy(buf, &ehci_confd, l); 1598 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1599 value >> 8; 1600 buf = (char *)buf + l; 1601 len -= l; 1602 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1603 totlen += l; 1604 memcpy(buf, &ehci_ifcd, l); 1605 buf = (char *)buf + l; 1606 len -= l; 1607 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1608 totlen += l; 1609 memcpy(buf, &ehci_endpd, l); 1610 break; 1611 case UDESC_STRING: 1612 if (len == 0) 1613 break; 1614 *(u_int8_t *)buf = 0; 1615 totlen = 1; 1616 switch (value & 0xff) { 1617 case 1: /* Vendor */ 1618 totlen = ehci_str(buf, len, sc->sc_vendor); 1619 break; 1620 case 2: /* Product */ 1621 totlen = ehci_str(buf, len, "EHCI root hub"); 1622 break; 1623 } 1624 break; 1625 default: 1626 err = USBD_IOERROR; 1627 goto ret; 1628 } 1629 break; 1630 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1631 if (len > 0) { 1632 *(u_int8_t *)buf = 0; 1633 totlen = 1; 1634 } 1635 break; 1636 case C(UR_GET_STATUS, UT_READ_DEVICE): 1637 if (len > 1) { 1638 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1639 totlen = 2; 1640 } 1641 break; 1642 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1643 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1644 if (len > 1) { 1645 USETW(((usb_status_t *)buf)->wStatus, 0); 1646 totlen = 2; 1647 } 1648 break; 1649 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1650 if (value >= USB_MAX_DEVICES) { 1651 err = USBD_IOERROR; 1652 goto ret; 1653 } 1654 sc->sc_addr = value; 1655 break; 1656 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1657 if (value != 0 && value != 1) { 1658 err = USBD_IOERROR; 1659 goto ret; 1660 } 1661 sc->sc_conf = value; 1662 break; 1663 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1664 break; 1665 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1666 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1667 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1668 err = USBD_IOERROR; 1669 goto ret; 1670 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1671 break; 1672 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1673 break; 1674 /* Hub requests */ 1675 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1676 break; 1677 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1678 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1679 "port=%d feature=%d\n", 1680 index, value)); 1681 if (index < 1 || index > sc->sc_noport) { 1682 err = USBD_IOERROR; 1683 goto ret; 1684 } 1685 port = EHCI_PORTSC(index); 1686 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1687 switch(value) { 1688 case UHF_PORT_ENABLE: 1689 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1690 break; 1691 case UHF_PORT_SUSPEND: 1692 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1693 break; 1694 case UHF_PORT_POWER: 1695 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1696 break; 1697 case UHF_PORT_TEST: 1698 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1699 "%d\n", index)); 1700 break; 1701 case UHF_PORT_INDICATOR: 1702 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1703 "%d\n", index)); 1704 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1705 break; 1706 case UHF_C_PORT_CONNECTION: 1707 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1708 break; 1709 case UHF_C_PORT_ENABLE: 1710 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1711 break; 1712 case UHF_C_PORT_SUSPEND: 1713 /* how? */ 1714 break; 1715 case UHF_C_PORT_OVER_CURRENT: 1716 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1717 break; 1718 case UHF_C_PORT_RESET: 1719 sc->sc_isreset = 0; 1720 break; 1721 default: 1722 err = USBD_IOERROR; 1723 goto ret; 1724 } 1725 #if 0 1726 switch(value) { 1727 case UHF_C_PORT_CONNECTION: 1728 case UHF_C_PORT_ENABLE: 1729 case UHF_C_PORT_SUSPEND: 1730 case UHF_C_PORT_OVER_CURRENT: 1731 case UHF_C_PORT_RESET: 1732 /* Enable RHSC interrupt if condition is cleared. */ 1733 if ((OREAD4(sc, port) >> 16) == 0) 1734 ehci_pcd_able(sc, 1); 1735 break; 1736 default: 1737 break; 1738 } 1739 #endif 1740 break; 1741 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1742 if ((value & 0xff) != 0) { 1743 err = USBD_IOERROR; 1744 goto ret; 1745 } 1746 hubd = ehci_hubd; 1747 hubd.bNbrPorts = sc->sc_noport; 1748 v = EOREAD4(sc, EHCI_HCSPARAMS); 1749 USETW(hubd.wHubCharacteristics, 1750 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1751 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1752 ? UHD_PORT_IND : 0); 1753 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1754 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1755 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1756 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1757 l = min(len, hubd.bDescLength); 1758 totlen = l; 1759 memcpy(buf, &hubd, l); 1760 break; 1761 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1762 if (len != 4) { 1763 err = USBD_IOERROR; 1764 goto ret; 1765 } 1766 memset(buf, 0, len); /* ? XXX */ 1767 totlen = len; 1768 break; 1769 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1770 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1771 index)); 1772 if (index < 1 || index > sc->sc_noport) { 1773 err = USBD_IOERROR; 1774 goto ret; 1775 } 1776 if (len != 4) { 1777 err = USBD_IOERROR; 1778 goto ret; 1779 } 1780 v = EOREAD4(sc, EHCI_PORTSC(index)); 1781 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1782 v)); 1783 i = UPS_HIGH_SPEED; 1784 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1785 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1786 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1787 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1788 if (v & EHCI_PS_PR) i |= UPS_RESET; 1789 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1790 USETW(ps.wPortStatus, i); 1791 i = 0; 1792 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1793 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1794 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1795 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1796 USETW(ps.wPortChange, i); 1797 l = min(len, sizeof ps); 1798 memcpy(buf, &ps, l); 1799 totlen = l; 1800 break; 1801 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1802 err = USBD_IOERROR; 1803 goto ret; 1804 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1805 break; 1806 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1807 if (index < 1 || index > sc->sc_noport) { 1808 err = USBD_IOERROR; 1809 goto ret; 1810 } 1811 port = EHCI_PORTSC(index); 1812 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1813 switch(value) { 1814 case UHF_PORT_ENABLE: 1815 EOWRITE4(sc, port, v | EHCI_PS_PE); 1816 break; 1817 case UHF_PORT_SUSPEND: 1818 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1819 break; 1820 case UHF_PORT_RESET: 1821 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1822 index)); 1823 if (EHCI_PS_IS_LOWSPEED(v)) { 1824 /* Low speed device, give up ownership. */ 1825 ehci_disown(sc, index, 1); 1826 break; 1827 } 1828 /* Start reset sequence. */ 1829 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1830 EOWRITE4(sc, port, v | EHCI_PS_PR); 1831 /* Wait for reset to complete. */ 1832 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1833 if (sc->sc_dying) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 /* Terminate reset sequence. */ 1838 EOWRITE4(sc, port, v); 1839 /* Wait for HC to complete reset. */ 1840 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1841 if (sc->sc_dying) { 1842 err = USBD_IOERROR; 1843 goto ret; 1844 } 1845 v = EOREAD4(sc, port); 1846 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1847 if (v & EHCI_PS_PR) { 1848 printf("%s: port reset timeout\n", 1849 USBDEVNAME(sc->sc_bus.bdev)); 1850 return (USBD_TIMEOUT); 1851 } 1852 if (!(v & EHCI_PS_PE)) { 1853 /* Not a high speed device, give up ownership.*/ 1854 ehci_disown(sc, index, 0); 1855 break; 1856 } 1857 sc->sc_isreset = 1; 1858 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1859 index, v)); 1860 break; 1861 case UHF_PORT_POWER: 1862 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1863 "%d\n", index)); 1864 EOWRITE4(sc, port, v | EHCI_PS_PP); 1865 break; 1866 case UHF_PORT_TEST: 1867 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1868 "%d\n", index)); 1869 break; 1870 case UHF_PORT_INDICATOR: 1871 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1872 "%d\n", index)); 1873 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1874 break; 1875 default: 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 break; 1880 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1881 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1882 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1883 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1884 break; 1885 default: 1886 err = USBD_IOERROR; 1887 goto ret; 1888 } 1889 xfer->actlen = totlen; 1890 err = USBD_NORMAL_COMPLETION; 1891 ret: 1892 xfer->status = err; 1893 s = splusb(); 1894 usb_transfer_complete(xfer); 1895 splx(s); 1896 return (USBD_IN_PROGRESS); 1897 } 1898 1899 void 1900 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1901 { 1902 int port; 1903 u_int32_t v; 1904 1905 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1906 #ifdef DIAGNOSTIC 1907 if (sc->sc_npcomp != 0) { 1908 int i = (index-1) / sc->sc_npcomp; 1909 if (i >= sc->sc_ncomp) 1910 printf("%s: strange port\n", 1911 USBDEVNAME(sc->sc_bus.bdev)); 1912 else 1913 printf("%s: handing over %s speed device on " 1914 "port %d to %s\n", 1915 USBDEVNAME(sc->sc_bus.bdev), 1916 lowspeed ? "low" : "full", 1917 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1918 } else { 1919 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1920 } 1921 #endif 1922 port = EHCI_PORTSC(index); 1923 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1924 EOWRITE4(sc, port, v | EHCI_PS_PO); 1925 } 1926 1927 /* Abort a root control request. */ 1928 Static void 1929 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1930 { 1931 /* Nothing to do, all transfers are synchronous. */ 1932 } 1933 1934 /* Close the root pipe. */ 1935 Static void 1936 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1937 { 1938 DPRINTF(("ehci_root_ctrl_close\n")); 1939 /* Nothing to do. */ 1940 } 1941 1942 void 1943 ehci_root_intr_done(usbd_xfer_handle xfer) 1944 { 1945 xfer->hcpriv = NULL; 1946 } 1947 1948 Static usbd_status 1949 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1950 { 1951 usbd_status err; 1952 1953 /* Insert last in queue. */ 1954 err = usb_insert_transfer(xfer); 1955 if (err) 1956 return (err); 1957 1958 /* Pipe isn't running, start first */ 1959 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1960 } 1961 1962 Static usbd_status 1963 ehci_root_intr_start(usbd_xfer_handle xfer) 1964 { 1965 usbd_pipe_handle pipe = xfer->pipe; 1966 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1967 1968 if (sc->sc_dying) 1969 return (USBD_IOERROR); 1970 1971 sc->sc_intrxfer = xfer; 1972 1973 return (USBD_IN_PROGRESS); 1974 } 1975 1976 /* Abort a root interrupt request. */ 1977 Static void 1978 ehci_root_intr_abort(usbd_xfer_handle xfer) 1979 { 1980 int s; 1981 1982 if (xfer->pipe->intrxfer == xfer) { 1983 DPRINTF(("ehci_root_intr_abort: remove\n")); 1984 xfer->pipe->intrxfer = NULL; 1985 } 1986 xfer->status = USBD_CANCELLED; 1987 s = splusb(); 1988 usb_transfer_complete(xfer); 1989 splx(s); 1990 } 1991 1992 /* Close the root pipe. */ 1993 Static void 1994 ehci_root_intr_close(usbd_pipe_handle pipe) 1995 { 1996 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1997 1998 DPRINTF(("ehci_root_intr_close\n")); 1999 2000 sc->sc_intrxfer = NULL; 2001 } 2002 2003 void 2004 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2005 { 2006 xfer->hcpriv = NULL; 2007 } 2008 2009 /************************/ 2010 2011 ehci_soft_qh_t * 2012 ehci_alloc_sqh(ehci_softc_t *sc) 2013 { 2014 ehci_soft_qh_t *sqh; 2015 usbd_status err; 2016 int i, offs; 2017 usb_dma_t dma; 2018 2019 if (sc->sc_freeqhs == NULL) { 2020 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2021 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2022 EHCI_PAGE_SIZE, &dma); 2023 #ifdef EHCI_DEBUG 2024 if (err) 2025 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2026 #endif 2027 if (err) 2028 return (NULL); 2029 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2030 offs = i * EHCI_SQH_SIZE; 2031 sqh = KERNADDR(&dma, offs); 2032 sqh->physaddr = DMAADDR(&dma, offs); 2033 sqh->next = sc->sc_freeqhs; 2034 sc->sc_freeqhs = sqh; 2035 } 2036 } 2037 sqh = sc->sc_freeqhs; 2038 sc->sc_freeqhs = sqh->next; 2039 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2040 sqh->next = NULL; 2041 return (sqh); 2042 } 2043 2044 void 2045 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2046 { 2047 sqh->next = sc->sc_freeqhs; 2048 sc->sc_freeqhs = sqh; 2049 } 2050 2051 ehci_soft_qtd_t * 2052 ehci_alloc_sqtd(ehci_softc_t *sc) 2053 { 2054 ehci_soft_qtd_t *sqtd; 2055 usbd_status err; 2056 int i, offs; 2057 usb_dma_t dma; 2058 int s; 2059 2060 if (sc->sc_freeqtds == NULL) { 2061 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2062 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2063 EHCI_PAGE_SIZE, &dma); 2064 #ifdef EHCI_DEBUG 2065 if (err) 2066 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2067 #endif 2068 if (err) 2069 return (NULL); 2070 s = splusb(); 2071 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2072 offs = i * EHCI_SQTD_SIZE; 2073 sqtd = KERNADDR(&dma, offs); 2074 sqtd->physaddr = DMAADDR(&dma, offs); 2075 sqtd->nextqtd = sc->sc_freeqtds; 2076 sc->sc_freeqtds = sqtd; 2077 } 2078 splx(s); 2079 } 2080 2081 s = splusb(); 2082 sqtd = sc->sc_freeqtds; 2083 sc->sc_freeqtds = sqtd->nextqtd; 2084 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2085 sqtd->nextqtd = NULL; 2086 sqtd->xfer = NULL; 2087 splx(s); 2088 2089 return (sqtd); 2090 } 2091 2092 void 2093 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2094 { 2095 int s; 2096 2097 s = splusb(); 2098 sqtd->nextqtd = sc->sc_freeqtds; 2099 sc->sc_freeqtds = sqtd; 2100 splx(s); 2101 } 2102 2103 usbd_status 2104 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2105 int alen, int rd, usbd_xfer_handle xfer, 2106 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2107 { 2108 ehci_soft_qtd_t *next, *cur; 2109 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2110 u_int32_t qtdstatus; 2111 int len, curlen, mps; 2112 int i, tog; 2113 usb_dma_t *dma = &xfer->dmabuf; 2114 2115 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2116 2117 len = alen; 2118 dataphys = DMAADDR(dma, 0); 2119 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2120 #if 0 2121 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2122 epipe->nexttoggle); 2123 #endif 2124 qtdstatus = EHCI_QTD_ACTIVE | 2125 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2126 EHCI_QTD_SET_CERR(3) 2127 /* IOC set below */ 2128 /* BYTES set below */ 2129 ; 2130 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2131 tog = epipe->nexttoggle; 2132 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2133 2134 cur = ehci_alloc_sqtd(sc); 2135 *sp = cur; 2136 if (cur == NULL) 2137 goto nomem; 2138 for (;;) { 2139 dataphyspage = EHCI_PAGE(dataphys); 2140 /* The EHCI hardware can handle at most 5 pages. */ 2141 if (dataphyslastpage - dataphyspage < 2142 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2143 /* we can handle it in this QTD */ 2144 curlen = len; 2145 } else { 2146 /* must use multiple TDs, fill as much as possible. */ 2147 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2148 EHCI_PAGE_OFFSET(dataphys); 2149 #ifdef DIAGNOSTIC 2150 if (curlen > len) { 2151 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2152 "len=0x%x offs=0x%x\n", curlen, len, 2153 EHCI_PAGE_OFFSET(dataphys)); 2154 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2155 dataphyslastpage, dataphyspage, 2156 dataphys); 2157 curlen = len; 2158 } 2159 #endif 2160 /* the length must be a multiple of the max size */ 2161 curlen -= curlen % mps; 2162 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2163 "curlen=%d\n", curlen)); 2164 #ifdef DIAGNOSTIC 2165 if (curlen == 0) 2166 panic("ehci_alloc_std: curlen == 0"); 2167 #endif 2168 } 2169 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2170 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2171 dataphys, dataphyslastpage, 2172 len, curlen)); 2173 len -= curlen; 2174 2175 if (len != 0) { 2176 next = ehci_alloc_sqtd(sc); 2177 if (next == NULL) 2178 goto nomem; 2179 nextphys = htole32(next->physaddr); 2180 } else { 2181 next = NULL; 2182 nextphys = EHCI_NULL; 2183 } 2184 2185 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2186 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2187 if (i != 0) /* use offset only in first buffer */ 2188 a = EHCI_PAGE(a); 2189 cur->qtd.qtd_buffer[i] = htole32(a); 2190 cur->qtd.qtd_buffer_hi[i] = 0; 2191 #ifdef DIAGNOSTIC 2192 if (i >= EHCI_QTD_NBUFFERS) { 2193 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2194 goto nomem; 2195 } 2196 #endif 2197 } 2198 cur->nextqtd = next; 2199 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2200 cur->qtd.qtd_status = 2201 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2202 cur->xfer = xfer; 2203 cur->len = curlen; 2204 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2205 dataphys, dataphys + curlen)); 2206 /* adjust the toggle based on the number of packets in this 2207 qtd */ 2208 if (((curlen + mps - 1) / mps) & 1) { 2209 tog ^= 1; 2210 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2211 } 2212 if (len == 0) 2213 break; 2214 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2215 dataphys += curlen; 2216 cur = next; 2217 } 2218 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2219 *ep = cur; 2220 epipe->nexttoggle = tog; 2221 2222 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2223 *sp, *ep)); 2224 2225 return (USBD_NORMAL_COMPLETION); 2226 2227 nomem: 2228 /* XXX free chain */ 2229 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2230 return (USBD_NOMEM); 2231 } 2232 2233 Static void 2234 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2235 ehci_soft_qtd_t *sqtdend) 2236 { 2237 ehci_soft_qtd_t *p; 2238 int i; 2239 2240 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2241 sqtd, sqtdend)); 2242 2243 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2244 p = sqtd->nextqtd; 2245 ehci_free_sqtd(sc, sqtd); 2246 } 2247 } 2248 2249 /****************/ 2250 2251 /* 2252 * Close a reqular pipe. 2253 * Assumes that there are no pending transactions. 2254 */ 2255 void 2256 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2257 { 2258 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2259 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2260 ehci_soft_qh_t *sqh = epipe->sqh; 2261 int s; 2262 2263 s = splusb(); 2264 ehci_rem_qh(sc, sqh, head); 2265 splx(s); 2266 ehci_free_sqh(sc, epipe->sqh); 2267 } 2268 2269 /* 2270 * Abort a device request. 2271 * If this routine is called at splusb() it guarantees that the request 2272 * will be removed from the hardware scheduling and that the callback 2273 * for it will be called with USBD_CANCELLED status. 2274 * It's impossible to guarantee that the requested transfer will not 2275 * have happened since the hardware runs concurrently. 2276 * If the transaction has already happened we rely on the ordinary 2277 * interrupt processing to process it. 2278 * XXX This is most probably wrong. 2279 */ 2280 void 2281 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2282 { 2283 #define exfer EXFER(xfer) 2284 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2285 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2286 ehci_soft_qh_t *sqh = epipe->sqh; 2287 ehci_soft_qtd_t *sqtd; 2288 ehci_physaddr_t cur; 2289 u_int32_t qhstatus; 2290 int s; 2291 int hit; 2292 2293 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2294 2295 if (sc->sc_dying) { 2296 /* If we're dying, just do the software part. */ 2297 s = splusb(); 2298 xfer->status = status; /* make software ignore it */ 2299 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2300 usb_transfer_complete(xfer); 2301 splx(s); 2302 return; 2303 } 2304 2305 if (xfer->device->bus->intr_context || !curproc) 2306 panic("ehci_abort_xfer: not in process context"); 2307 2308 /* 2309 * Step 1: Make interrupt routine and hardware ignore xfer. 2310 */ 2311 s = splusb(); 2312 xfer->status = status; /* make software ignore it */ 2313 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2314 qhstatus = sqh->qh.qh_qtd.qtd_status; 2315 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2316 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2317 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2318 if (sqtd == exfer->sqtdend) 2319 break; 2320 } 2321 splx(s); 2322 2323 /* 2324 * Step 2: Wait until we know hardware has finished any possible 2325 * use of the xfer. Also make sure the soft interrupt routine 2326 * has run. 2327 */ 2328 ehci_sync_hc(sc); 2329 s = splusb(); 2330 sc->sc_softwake = 1; 2331 usb_schedsoftintr(&sc->sc_bus); 2332 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2333 splx(s); 2334 2335 /* 2336 * Step 3: Remove any vestiges of the xfer from the hardware. 2337 * The complication here is that the hardware may have executed 2338 * beyond the xfer we're trying to abort. So as we're scanning 2339 * the TDs of this xfer we check if the hardware points to 2340 * any of them. 2341 */ 2342 s = splusb(); /* XXX why? */ 2343 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2344 hit = 0; 2345 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2346 hit |= cur == sqtd->physaddr; 2347 if (sqtd == exfer->sqtdend) 2348 break; 2349 } 2350 sqtd = sqtd->nextqtd; 2351 /* Zap curqtd register if hardware pointed inside the xfer. */ 2352 if (hit && sqtd != NULL) { 2353 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2354 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2355 sqh->qh.qh_qtd.qtd_status = qhstatus; 2356 } else { 2357 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2358 } 2359 2360 /* 2361 * Step 4: Execute callback. 2362 */ 2363 #ifdef DIAGNOSTIC 2364 exfer->isdone = 1; 2365 #endif 2366 usb_transfer_complete(xfer); 2367 2368 splx(s); 2369 #undef exfer 2370 } 2371 2372 void 2373 ehci_timeout(void *addr) 2374 { 2375 struct ehci_xfer *exfer = addr; 2376 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2377 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2378 2379 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2380 #ifdef USB_DEBUG 2381 if (ehcidebug > 1) 2382 usbd_dump_pipe(exfer->xfer.pipe); 2383 #endif 2384 2385 if (sc->sc_dying) { 2386 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2387 return; 2388 } 2389 2390 /* Execute the abort in a process context. */ 2391 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2392 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2393 } 2394 2395 void 2396 ehci_timeout_task(void *addr) 2397 { 2398 usbd_xfer_handle xfer = addr; 2399 int s; 2400 2401 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2402 2403 s = splusb(); 2404 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2405 splx(s); 2406 } 2407 2408 /************************/ 2409 2410 Static usbd_status 2411 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2412 { 2413 usbd_status err; 2414 2415 /* Insert last in queue. */ 2416 err = usb_insert_transfer(xfer); 2417 if (err) 2418 return (err); 2419 2420 /* Pipe isn't running, start first */ 2421 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2422 } 2423 2424 Static usbd_status 2425 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2426 { 2427 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2428 usbd_status err; 2429 2430 if (sc->sc_dying) 2431 return (USBD_IOERROR); 2432 2433 #ifdef DIAGNOSTIC 2434 if (!(xfer->rqflags & URQ_REQUEST)) { 2435 /* XXX panic */ 2436 printf("ehci_device_ctrl_transfer: not a request\n"); 2437 return (USBD_INVAL); 2438 } 2439 #endif 2440 2441 err = ehci_device_request(xfer); 2442 if (err) 2443 return (err); 2444 2445 if (sc->sc_bus.use_polling) 2446 ehci_waitintr(sc, xfer); 2447 return (USBD_IN_PROGRESS); 2448 } 2449 2450 void 2451 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2452 { 2453 struct ehci_xfer *ex = EXFER(xfer); 2454 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2455 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2456 2457 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2458 2459 #ifdef DIAGNOSTIC 2460 if (!(xfer->rqflags & URQ_REQUEST)) { 2461 panic("ehci_ctrl_done: not a request"); 2462 } 2463 #endif 2464 2465 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2466 ehci_del_intr_list(ex); /* remove from active list */ 2467 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2468 } 2469 2470 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2471 } 2472 2473 /* Abort a device control request. */ 2474 Static void 2475 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2476 { 2477 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2478 ehci_abort_xfer(xfer, USBD_CANCELLED); 2479 } 2480 2481 /* Close a device control pipe. */ 2482 Static void 2483 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2484 { 2485 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2486 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2487 2488 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2489 ehci_close_pipe(pipe, sc->sc_async_head); 2490 } 2491 2492 usbd_status 2493 ehci_device_request(usbd_xfer_handle xfer) 2494 { 2495 #define exfer EXFER(xfer) 2496 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2497 usb_device_request_t *req = &xfer->request; 2498 usbd_device_handle dev = epipe->pipe.device; 2499 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2500 int addr = dev->address; 2501 ehci_soft_qtd_t *setup, *stat, *next; 2502 ehci_soft_qh_t *sqh; 2503 int isread; 2504 int len; 2505 usbd_status err; 2506 int s; 2507 2508 isread = req->bmRequestType & UT_READ; 2509 len = UGETW(req->wLength); 2510 2511 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2512 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2513 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2514 UGETW(req->wIndex), len, addr, 2515 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2516 2517 setup = ehci_alloc_sqtd(sc); 2518 if (setup == NULL) { 2519 err = USBD_NOMEM; 2520 goto bad1; 2521 } 2522 stat = ehci_alloc_sqtd(sc); 2523 if (stat == NULL) { 2524 err = USBD_NOMEM; 2525 goto bad2; 2526 } 2527 2528 sqh = epipe->sqh; 2529 epipe->u.ctl.length = len; 2530 2531 /* Update device address and length since they may have changed 2532 during the setup of the control pipe in usbd_new_device(). */ 2533 /* XXX This only needs to be done once, but it's too early in open. */ 2534 /* XXXX Should not touch ED here! */ 2535 sqh->qh.qh_endp = 2536 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2537 htole32( 2538 EHCI_QH_SET_ADDR(addr) | 2539 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2540 ); 2541 2542 /* Set up data transaction */ 2543 if (len != 0) { 2544 ehci_soft_qtd_t *end; 2545 2546 /* Start toggle at 1. */ 2547 epipe->nexttoggle = 1; 2548 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2549 &next, &end); 2550 if (err) 2551 goto bad3; 2552 end->nextqtd = stat; 2553 end->qtd.qtd_next = 2554 end->qtd.qtd_altnext = htole32(stat->physaddr); 2555 } else { 2556 next = stat; 2557 } 2558 2559 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2560 2561 /* Clear toggle */ 2562 setup->qtd.qtd_status = htole32( 2563 EHCI_QTD_ACTIVE | 2564 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2565 EHCI_QTD_SET_CERR(3) | 2566 EHCI_QTD_SET_TOGGLE(0) | 2567 EHCI_QTD_SET_BYTES(sizeof *req) 2568 ); 2569 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2570 setup->qtd.qtd_buffer_hi[0] = 0; 2571 setup->nextqtd = next; 2572 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2573 setup->xfer = xfer; 2574 setup->len = sizeof *req; 2575 2576 stat->qtd.qtd_status = htole32( 2577 EHCI_QTD_ACTIVE | 2578 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2579 EHCI_QTD_SET_CERR(3) | 2580 EHCI_QTD_SET_TOGGLE(1) | 2581 EHCI_QTD_IOC 2582 ); 2583 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2584 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2585 stat->nextqtd = NULL; 2586 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2587 stat->xfer = xfer; 2588 stat->len = 0; 2589 2590 #ifdef EHCI_DEBUG 2591 if (ehcidebug > 5) { 2592 DPRINTF(("ehci_device_request:\n")); 2593 ehci_dump_sqh(sqh); 2594 ehci_dump_sqtds(setup); 2595 } 2596 #endif 2597 2598 exfer->sqtdstart = setup; 2599 exfer->sqtdend = stat; 2600 #ifdef DIAGNOSTIC 2601 if (!exfer->isdone) { 2602 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2603 } 2604 exfer->isdone = 0; 2605 #endif 2606 2607 /* Insert qTD in QH list. */ 2608 s = splusb(); 2609 ehci_set_qh_qtd(sqh, setup); 2610 if (xfer->timeout && !sc->sc_bus.use_polling) { 2611 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2612 ehci_timeout, xfer); 2613 } 2614 ehci_add_intr_list(sc, exfer); 2615 xfer->status = USBD_IN_PROGRESS; 2616 splx(s); 2617 2618 #ifdef EHCI_DEBUG 2619 if (ehcidebug > 10) { 2620 DPRINTF(("ehci_device_request: status=%x\n", 2621 EOREAD4(sc, EHCI_USBSTS))); 2622 delay(10000); 2623 ehci_dump_regs(sc); 2624 ehci_dump_sqh(sc->sc_async_head); 2625 ehci_dump_sqh(sqh); 2626 ehci_dump_sqtds(setup); 2627 } 2628 #endif 2629 2630 return (USBD_NORMAL_COMPLETION); 2631 2632 bad3: 2633 ehci_free_sqtd(sc, stat); 2634 bad2: 2635 ehci_free_sqtd(sc, setup); 2636 bad1: 2637 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2638 xfer->status = err; 2639 usb_transfer_complete(xfer); 2640 return (err); 2641 #undef exfer 2642 } 2643 2644 /************************/ 2645 2646 Static usbd_status 2647 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2648 { 2649 usbd_status err; 2650 2651 /* Insert last in queue. */ 2652 err = usb_insert_transfer(xfer); 2653 if (err) 2654 return (err); 2655 2656 /* Pipe isn't running, start first */ 2657 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2658 } 2659 2660 usbd_status 2661 ehci_device_bulk_start(usbd_xfer_handle xfer) 2662 { 2663 #define exfer EXFER(xfer) 2664 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2665 usbd_device_handle dev = epipe->pipe.device; 2666 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2667 ehci_soft_qtd_t *data, *dataend; 2668 ehci_soft_qh_t *sqh; 2669 usbd_status err; 2670 int len, isread, endpt; 2671 int s; 2672 2673 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2674 xfer, xfer->length, xfer->flags)); 2675 2676 if (sc->sc_dying) 2677 return (USBD_IOERROR); 2678 2679 #ifdef DIAGNOSTIC 2680 if (xfer->rqflags & URQ_REQUEST) 2681 panic("ehci_device_bulk_transfer: a request"); 2682 #endif 2683 2684 len = xfer->length; 2685 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2686 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2687 sqh = epipe->sqh; 2688 2689 epipe->u.bulk.length = len; 2690 2691 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2692 &dataend); 2693 if (err) { 2694 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2695 xfer->status = err; 2696 usb_transfer_complete(xfer); 2697 return (err); 2698 } 2699 2700 #ifdef EHCI_DEBUG 2701 if (ehcidebug > 5) { 2702 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2703 ehci_dump_sqh(sqh); 2704 ehci_dump_sqtds(data); 2705 } 2706 #endif 2707 2708 /* Set up interrupt info. */ 2709 exfer->sqtdstart = data; 2710 exfer->sqtdend = dataend; 2711 #ifdef DIAGNOSTIC 2712 if (!exfer->isdone) { 2713 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2714 } 2715 exfer->isdone = 0; 2716 #endif 2717 2718 s = splusb(); 2719 ehci_set_qh_qtd(sqh, data); 2720 if (xfer->timeout && !sc->sc_bus.use_polling) { 2721 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2722 ehci_timeout, xfer); 2723 } 2724 ehci_add_intr_list(sc, exfer); 2725 xfer->status = USBD_IN_PROGRESS; 2726 splx(s); 2727 2728 #ifdef EHCI_DEBUG 2729 if (ehcidebug > 10) { 2730 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2731 delay(10000); 2732 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2733 ehci_dump_regs(sc); 2734 #if 0 2735 printf("async_head:\n"); 2736 ehci_dump_sqh(sc->sc_async_head); 2737 #endif 2738 printf("sqh:\n"); 2739 ehci_dump_sqh(sqh); 2740 ehci_dump_sqtds(data); 2741 } 2742 #endif 2743 2744 if (sc->sc_bus.use_polling) 2745 ehci_waitintr(sc, xfer); 2746 2747 return (USBD_IN_PROGRESS); 2748 #undef exfer 2749 } 2750 2751 Static void 2752 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2753 { 2754 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2755 ehci_abort_xfer(xfer, USBD_CANCELLED); 2756 } 2757 2758 /* 2759 * Close a device bulk pipe. 2760 */ 2761 Static void 2762 ehci_device_bulk_close(usbd_pipe_handle pipe) 2763 { 2764 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2765 2766 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2767 ehci_close_pipe(pipe, sc->sc_async_head); 2768 } 2769 2770 void 2771 ehci_device_bulk_done(usbd_xfer_handle xfer) 2772 { 2773 struct ehci_xfer *ex = EXFER(xfer); 2774 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2775 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2776 2777 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2778 xfer, xfer->actlen)); 2779 2780 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2781 ehci_del_intr_list(ex); /* remove from active list */ 2782 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2783 } 2784 2785 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2786 } 2787 2788 /************************/ 2789 2790 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2791 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2792 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2793 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2794 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2795 2796 /************************/ 2797 2798 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2799 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2800 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2801 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2802 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2803
Indexes created Thu Oct 02 01:09:59 GMT 2025