ehci.c revision 1.54.2.13.2.2
1 /* $NetBSD: ehci.c,v 1.54.2.13.2.2 2005/05/13 23:13:08 riz Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite compolicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.54.2.13.2.2 2005/05/13 23:13:08 riz Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) if (ehcidebug) printf x 96 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 363 USB_MEM_RESERVE); 364 365 /* Reset the controller */ 366 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 367 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 368 usb_delay_ms(&sc->sc_bus, 1); 369 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 370 for (i = 0; i < 100; i++) { 371 usb_delay_ms(&sc->sc_bus, 1); 372 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 373 if (!hcr) 374 break; 375 } 376 if (hcr) { 377 aprint_error("%s: reset timeout\n", 378 USBDEVNAME(sc->sc_bus.bdev)); 379 return (USBD_IOERROR); 380 } 381 382 /* frame list size at default, read back what we got and use that */ 383 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 384 case 0: sc->sc_flsize = 1024*4; break; 385 case 1: sc->sc_flsize = 512*4; break; 386 case 2: sc->sc_flsize = 256*4; break; 387 case 3: return (USBD_IOERROR); 388 } 389 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 390 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 391 if (err) 392 return (err); 393 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 394 395 /* Set up the bus struct. */ 396 sc->sc_bus.methods = &ehci_bus_methods; 397 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 398 399 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 400 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 401 402 sc->sc_eintrs = EHCI_NORMAL_INTRS; 403 404 /* Allocate dummy QH that starts the async list. */ 405 sqh = ehci_alloc_sqh(sc); 406 if (sqh == NULL) { 407 err = USBD_NOMEM; 408 goto bad1; 409 } 410 /* Fill the QH */ 411 sqh->qh.qh_endp = 412 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 413 sqh->qh.qh_link = 414 htole32(sqh->physaddr | EHCI_LINK_QH); 415 sqh->qh.qh_curqtd = EHCI_NULL; 416 sqh->next = NULL; 417 /* Fill the overlay qTD */ 418 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 419 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 420 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 421 sqh->sqtd = NULL; 422 #ifdef EHCI_DEBUG 423 if (ehcidebug) { 424 ehci_dump_sqh(sqh); 425 } 426 #endif 427 428 /* Point to async list */ 429 sc->sc_async_head = sqh; 430 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 431 432 usb_callout_init(sc->sc_tmo_pcd); 433 434 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 435 436 /* Enable interrupts */ 437 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 438 439 /* Turn on controller */ 440 EOWRITE4(sc, EHCI_USBCMD, 441 EHCI_CMD_ITC_8 | /* 8 microframes */ 442 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 443 EHCI_CMD_ASE | 444 /* EHCI_CMD_PSE | */ 445 EHCI_CMD_RS); 446 447 /* Take over port ownership */ 448 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 449 450 for (i = 0; i < 100; i++) { 451 usb_delay_ms(&sc->sc_bus, 1); 452 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 453 if (!hcr) 454 break; 455 } 456 if (hcr) { 457 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 458 return (USBD_IOERROR); 459 } 460 461 return (USBD_NORMAL_COMPLETION); 462 463 #if 0 464 bad2: 465 ehci_free_sqh(sc, sc->sc_async_head); 466 #endif 467 bad1: 468 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 469 return (err); 470 } 471 472 int 473 ehci_intr(void *v) 474 { 475 ehci_softc_t *sc = v; 476 477 if (sc == NULL || sc->sc_dying) 478 return (0); 479 480 /* If we get an interrupt while polling, then just ignore it. */ 481 if (sc->sc_bus.use_polling) { 482 #ifdef DIAGNOSTIC 483 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 484 #endif 485 return (0); 486 } 487 488 return (ehci_intr1(sc)); 489 } 490 491 Static int 492 ehci_intr1(ehci_softc_t *sc) 493 { 494 u_int32_t intrs, eintrs; 495 496 DPRINTFN(20,("ehci_intr1: enter\n")); 497 498 /* In case the interrupt occurs before initialization has completed. */ 499 if (sc == NULL) { 500 #ifdef DIAGNOSTIC 501 printf("ehci_intr: sc == NULL\n"); 502 #endif 503 return (0); 504 } 505 506 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 507 508 if (!intrs) 509 return (0); 510 511 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 512 eintrs = intrs & sc->sc_eintrs; 513 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 514 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 515 (u_int)eintrs)); 516 if (!eintrs) 517 return (0); 518 519 sc->sc_bus.intr_context++; 520 sc->sc_bus.no_intrs++; 521 if (eintrs & EHCI_STS_IAA) { 522 DPRINTF(("ehci_intr1: door bell\n")); 523 wakeup(&sc->sc_async_head); 524 eintrs &= ~EHCI_STS_IAA; 525 } 526 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 527 DPRINTFN(5,("ehci_intr1: %s %s\n", 528 eintrs & EHCI_STS_INT ? "INT" : "", 529 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 530 usb_schedsoftintr(&sc->sc_bus); 531 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 532 } 533 if (eintrs & EHCI_STS_HSE) { 534 printf("%s: unrecoverable error, controller halted\n", 535 USBDEVNAME(sc->sc_bus.bdev)); 536 /* XXX what else */ 537 } 538 if (eintrs & EHCI_STS_PCD) { 539 ehci_pcd(sc, sc->sc_intrxfer); 540 /* 541 * Disable PCD interrupt for now, because it will be 542 * on until the port has been reset. 543 */ 544 ehci_pcd_able(sc, 0); 545 /* Do not allow RHSC interrupts > 1 per second */ 546 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 547 eintrs &= ~EHCI_STS_PCD; 548 } 549 550 sc->sc_bus.intr_context--; 551 552 if (eintrs != 0) { 553 /* Block unprocessed interrupts. */ 554 sc->sc_eintrs &= ~eintrs; 555 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 556 printf("%s: blocking intrs 0x%x\n", 557 USBDEVNAME(sc->sc_bus.bdev), eintrs); 558 } 559 560 return (1); 561 } 562 563 void 564 ehci_pcd_able(ehci_softc_t *sc, int on) 565 { 566 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 567 if (on) 568 sc->sc_eintrs |= EHCI_STS_PCD; 569 else 570 sc->sc_eintrs &= ~EHCI_STS_PCD; 571 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 572 } 573 574 void 575 ehci_pcd_enable(void *v_sc) 576 { 577 ehci_softc_t *sc = v_sc; 578 579 ehci_pcd_able(sc, 1); 580 } 581 582 void 583 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 584 { 585 usbd_pipe_handle pipe; 586 u_char *p; 587 int i, m; 588 589 if (xfer == NULL) { 590 /* Just ignore the change. */ 591 return; 592 } 593 594 pipe = xfer->pipe; 595 596 p = KERNADDR(&xfer->dmabuf, 0); 597 m = min(sc->sc_noport, xfer->length * 8 - 1); 598 memset(p, 0, xfer->length); 599 for (i = 1; i <= m; i++) { 600 /* Pick out CHANGE bits from the status reg. */ 601 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 602 p[i/8] |= 1 << (i%8); 603 } 604 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 605 xfer->actlen = xfer->length; 606 xfer->status = USBD_NORMAL_COMPLETION; 607 608 usb_transfer_complete(xfer); 609 } 610 611 void 612 ehci_softintr(void *v) 613 { 614 ehci_softc_t *sc = v; 615 struct ehci_xfer *ex, *nextex; 616 617 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 618 sc->sc_bus.intr_context)); 619 620 sc->sc_bus.intr_context++; 621 622 /* 623 * The only explanation I can think of for why EHCI is as brain dead 624 * as UHCI interrupt-wise is that Intel was involved in both. 625 * An interrupt just tells us that something is done, we have no 626 * clue what, so we need to scan through all active transfers. :-( 627 */ 628 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 629 nextex = LIST_NEXT(ex, inext); 630 ehci_check_intr(sc, ex); 631 } 632 633 if (sc->sc_softwake) { 634 sc->sc_softwake = 0; 635 wakeup(&sc->sc_softwake); 636 } 637 638 sc->sc_bus.intr_context--; 639 } 640 641 /* Check for an interrupt. */ 642 void 643 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 644 { 645 ehci_soft_qtd_t *sqtd, *lsqtd; 646 u_int32_t status; 647 648 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 649 650 if (ex->sqtdstart == NULL) { 651 printf("ehci_check_intr: sqtdstart=NULL\n"); 652 return; 653 } 654 lsqtd = ex->sqtdend; 655 #ifdef DIAGNOSTIC 656 if (lsqtd == NULL) { 657 printf("ehci_check_intr: sqtd==0\n"); 658 return; 659 } 660 #endif 661 /* 662 * If the last TD is still active we need to check whether there 663 * is a an error somewhere in the middle, or whether there was a 664 * short packet (SPD and not ACTIVE). 665 */ 666 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 667 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 668 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 669 status = le32toh(sqtd->qtd.qtd_status); 670 /* If there's an active QTD the xfer isn't done. */ 671 if (status & EHCI_QTD_ACTIVE) 672 break; 673 /* Any kind of error makes the xfer done. */ 674 if (status & EHCI_QTD_HALTED) 675 goto done; 676 /* We want short packets, and it is short: it's done */ 677 if (EHCI_QTD_GET_BYTES(status) != 0) 678 goto done; 679 } 680 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 681 ex, ex->sqtdstart)); 682 return; 683 } 684 done: 685 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 686 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 687 ehci_idone(ex); 688 } 689 690 void 691 ehci_idone(struct ehci_xfer *ex) 692 { 693 usbd_xfer_handle xfer = &ex->xfer; 694 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 695 ehci_soft_qtd_t *sqtd; 696 u_int32_t status = 0, nstatus; 697 int actlen; 698 699 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 700 #ifdef DIAGNOSTIC 701 { 702 int s = splhigh(); 703 if (ex->isdone) { 704 splx(s); 705 #ifdef EHCI_DEBUG 706 printf("ehci_idone: ex is done!\n "); 707 ehci_dump_exfer(ex); 708 #else 709 printf("ehci_idone: ex=%p is done!\n", ex); 710 #endif 711 return; 712 } 713 ex->isdone = 1; 714 splx(s); 715 } 716 #endif 717 718 if (xfer->status == USBD_CANCELLED || 719 xfer->status == USBD_TIMEOUT) { 720 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 721 return; 722 } 723 724 #ifdef EHCI_DEBUG 725 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 726 if (ehcidebug > 10) 727 ehci_dump_sqtds(ex->sqtdstart); 728 #endif 729 730 /* The transfer is done, compute actual length and status. */ 731 actlen = 0; 732 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 733 nstatus = le32toh(sqtd->qtd.qtd_status); 734 if (nstatus & EHCI_QTD_ACTIVE) 735 break; 736 737 status = nstatus; 738 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 739 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 740 } 741 742 /* If there are left over TDs we need to update the toggle. */ 743 if (sqtd != NULL) { 744 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 745 #if 0 746 ehci_dump_sqh(epipe->sqh); 747 ehci_dump_sqtds(ex->sqtdstart); 748 #endif 749 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 750 } 751 752 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 753 xfer->length, actlen, status)); 754 xfer->actlen = actlen; 755 if (status & EHCI_QTD_HALTED) { 756 #ifdef EHCI_DEBUG 757 char sbuf[128]; 758 759 bitmask_snprintf((u_int32_t)status, 760 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 761 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 762 763 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 764 "status 0x%s\n", 765 xfer->pipe->device->address, 766 xfer->pipe->endpoint->edesc->bEndpointAddress, 767 sbuf)); 768 if (ehcidebug > 2) { 769 ehci_dump_sqh(epipe->sqh); 770 ehci_dump_sqtds(ex->sqtdstart); 771 } 772 #endif 773 /* low&full speed has an extra error flag */ 774 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 775 EHCI_QH_SPEED_HIGH) 776 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 777 else 778 status &= EHCI_QTD_STATERRS; 779 if (status == 0) /* no other errors means a stall */ 780 xfer->status = USBD_STALLED; 781 else 782 xfer->status = USBD_IOERROR; /* more info XXX */ 783 /* XXX need to reset TT on missed microframe */ 784 if (status & EHCI_QTD_MISSEDMICRO) { 785 ehci_softc_t *sc = (ehci_softc_t *) 786 xfer->pipe->device->bus; 787 788 printf("%s: missed microframe, TT reset not " 789 "implemented, hub might be inoperational\n", 790 USBDEVNAME(sc->sc_bus.bdev)); 791 } 792 } else { 793 xfer->status = USBD_NORMAL_COMPLETION; 794 } 795 796 usb_transfer_complete(xfer); 797 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 798 } 799 800 /* 801 * Wait here until controller claims to have an interrupt. 802 * Then call ehci_intr and return. Use timeout to avoid waiting 803 * too long. 804 */ 805 void 806 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 807 { 808 int timo = xfer->timeout; 809 int usecs; 810 u_int32_t intrs; 811 812 xfer->status = USBD_IN_PROGRESS; 813 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 814 usb_delay_ms(&sc->sc_bus, 1); 815 if (sc->sc_dying) 816 break; 817 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 818 sc->sc_eintrs; 819 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 820 #ifdef EHCI_DEBUG 821 if (ehcidebug > 15) 822 ehci_dump_regs(sc); 823 #endif 824 if (intrs) { 825 ehci_intr1(sc); 826 if (xfer->status != USBD_IN_PROGRESS) 827 return; 828 } 829 } 830 831 /* Timeout */ 832 DPRINTF(("ehci_waitintr: timeout\n")); 833 xfer->status = USBD_TIMEOUT; 834 usb_transfer_complete(xfer); 835 /* XXX should free TD */ 836 } 837 838 void 839 ehci_poll(struct usbd_bus *bus) 840 { 841 ehci_softc_t *sc = (ehci_softc_t *)bus; 842 #ifdef EHCI_DEBUG 843 static int last; 844 int new; 845 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 846 if (new != last) { 847 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 848 last = new; 849 } 850 #endif 851 852 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 853 ehci_intr1(sc); 854 } 855 856 int 857 ehci_detach(struct ehci_softc *sc, int flags) 858 { 859 int rv = 0; 860 861 if (sc->sc_child != NULL) 862 rv = config_detach(sc->sc_child, flags); 863 864 if (rv != 0) 865 return (rv); 866 867 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 868 869 if (sc->sc_powerhook != NULL) 870 powerhook_disestablish(sc->sc_powerhook); 871 if (sc->sc_shutdownhook != NULL) 872 shutdownhook_disestablish(sc->sc_shutdownhook); 873 874 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 875 876 /* XXX free other data structures XXX */ 877 878 return (rv); 879 } 880 881 882 int 883 ehci_activate(device_ptr_t self, enum devact act) 884 { 885 struct ehci_softc *sc = (struct ehci_softc *)self; 886 int rv = 0; 887 888 switch (act) { 889 case DVACT_ACTIVATE: 890 return (EOPNOTSUPP); 891 892 case DVACT_DEACTIVATE: 893 if (sc->sc_child != NULL) 894 rv = config_deactivate(sc->sc_child); 895 sc->sc_dying = 1; 896 break; 897 } 898 return (rv); 899 } 900 901 /* 902 * Handle suspend/resume. 903 * 904 * We need to switch to polling mode here, because this routine is 905 * called from an intterupt context. This is all right since we 906 * are almost suspended anyway. 907 */ 908 void 909 ehci_power(int why, void *v) 910 { 911 ehci_softc_t *sc = v; 912 //u_int32_t ctl; 913 int s; 914 915 #ifdef EHCI_DEBUG 916 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 917 ehci_dump_regs(sc); 918 #endif 919 920 s = splhardusb(); 921 switch (why) { 922 case PWR_SUSPEND: 923 case PWR_STANDBY: 924 sc->sc_bus.use_polling++; 925 #if 0 926 OOO 927 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 928 if (sc->sc_control == 0) { 929 /* 930 * Preserve register values, in case that APM BIOS 931 * does not recover them. 932 */ 933 sc->sc_control = ctl; 934 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 935 } 936 ctl |= EHCI_HCFS_SUSPEND; 937 OWRITE4(sc, EHCI_CONTROL, ctl); 938 #endif 939 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 940 sc->sc_bus.use_polling--; 941 break; 942 case PWR_RESUME: 943 sc->sc_bus.use_polling++; 944 #if 0 945 OOO 946 /* Some broken BIOSes do not recover these values */ 947 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 948 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 949 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 950 if (sc->sc_intre) 951 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 952 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 953 if (sc->sc_control) 954 ctl = sc->sc_control; 955 else 956 ctl = OREAD4(sc, EHCI_CONTROL); 957 ctl |= EHCI_HCFS_RESUME; 958 OWRITE4(sc, EHCI_CONTROL, ctl); 959 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 960 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 961 OWRITE4(sc, EHCI_CONTROL, ctl); 962 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 963 sc->sc_control = sc->sc_intre = 0; 964 #endif 965 sc->sc_bus.use_polling--; 966 break; 967 case PWR_SOFTSUSPEND: 968 case PWR_SOFTSTANDBY: 969 case PWR_SOFTRESUME: 970 break; 971 } 972 splx(s); 973 } 974 975 /* 976 * Shut down the controller when the system is going down. 977 */ 978 void 979 ehci_shutdown(void *v) 980 { 981 ehci_softc_t *sc = v; 982 983 DPRINTF(("ehci_shutdown: stopping the HC\n")); 984 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 985 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 986 } 987 988 usbd_status 989 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 990 { 991 struct ehci_softc *sc = (struct ehci_softc *)bus; 992 usbd_status err; 993 994 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 995 if (err == USBD_NOMEM) 996 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 997 #ifdef EHCI_DEBUG 998 if (err) 999 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1000 #endif 1001 return (err); 1002 } 1003 1004 void 1005 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1006 { 1007 struct ehci_softc *sc = (struct ehci_softc *)bus; 1008 1009 if (dma->block->flags & USB_DMA_RESERVE) { 1010 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1011 dma); 1012 return; 1013 } 1014 usb_freemem(&sc->sc_bus, dma); 1015 } 1016 1017 usbd_xfer_handle 1018 ehci_allocx(struct usbd_bus *bus) 1019 { 1020 struct ehci_softc *sc = (struct ehci_softc *)bus; 1021 usbd_xfer_handle xfer; 1022 1023 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1024 if (xfer != NULL) { 1025 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1026 #ifdef DIAGNOSTIC 1027 if (xfer->busy_free != XFER_FREE) { 1028 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1029 xfer->busy_free); 1030 } 1031 #endif 1032 } else { 1033 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1034 } 1035 if (xfer != NULL) { 1036 memset(xfer, 0, sizeof (struct ehci_xfer)); 1037 #ifdef DIAGNOSTIC 1038 EXFER(xfer)->isdone = 1; 1039 xfer->busy_free = XFER_BUSY; 1040 #endif 1041 } 1042 return (xfer); 1043 } 1044 1045 void 1046 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1047 { 1048 struct ehci_softc *sc = (struct ehci_softc *)bus; 1049 1050 #ifdef DIAGNOSTIC 1051 if (xfer->busy_free != XFER_BUSY) { 1052 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1053 xfer->busy_free); 1054 return; 1055 } 1056 xfer->busy_free = XFER_FREE; 1057 if (!EXFER(xfer)->isdone) { 1058 printf("ehci_freex: !isdone\n"); 1059 return; 1060 } 1061 #endif 1062 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1063 } 1064 1065 Static void 1066 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1067 { 1068 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1069 1070 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1071 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1072 #ifdef USB_DEBUG 1073 if (ehcidebug) 1074 usbd_dump_pipe(pipe); 1075 #endif 1076 epipe->nexttoggle = 0; 1077 } 1078 1079 Static void 1080 ehci_noop(usbd_pipe_handle pipe) 1081 { 1082 } 1083 1084 #ifdef EHCI_DEBUG 1085 void 1086 ehci_dump_regs(ehci_softc_t *sc) 1087 { 1088 int i; 1089 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1090 EOREAD4(sc, EHCI_USBCMD), 1091 EOREAD4(sc, EHCI_USBSTS), 1092 EOREAD4(sc, EHCI_USBINTR)); 1093 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1094 EOREAD4(sc, EHCI_FRINDEX), 1095 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1096 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1097 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1098 for (i = 1; i <= sc->sc_noport; i++) 1099 printf("port %d status=0x%08x\n", i, 1100 EOREAD4(sc, EHCI_PORTSC(i))); 1101 } 1102 1103 /* 1104 * Unused function - this is meant to be called from a kernel 1105 * debugger. 1106 */ 1107 void 1108 ehci_dump() 1109 { 1110 ehci_dump_regs(theehci); 1111 } 1112 1113 void 1114 ehci_dump_link(ehci_link_t link, int type) 1115 { 1116 link = le32toh(link); 1117 printf("0x%08x", link); 1118 if (link & EHCI_LINK_TERMINATE) 1119 printf("<T>"); 1120 else { 1121 printf("<"); 1122 if (type) { 1123 switch (EHCI_LINK_TYPE(link)) { 1124 case EHCI_LINK_ITD: printf("ITD"); break; 1125 case EHCI_LINK_QH: printf("QH"); break; 1126 case EHCI_LINK_SITD: printf("SITD"); break; 1127 case EHCI_LINK_FSTN: printf("FSTN"); break; 1128 } 1129 } 1130 printf(">"); 1131 } 1132 } 1133 1134 void 1135 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1136 { 1137 int i; 1138 u_int32_t stop; 1139 1140 stop = 0; 1141 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1142 ehci_dump_sqtd(sqtd); 1143 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1144 } 1145 if (sqtd) 1146 printf("dump aborted, too many TDs\n"); 1147 } 1148 1149 void 1150 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1151 { 1152 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1153 ehci_dump_qtd(&sqtd->qtd); 1154 } 1155 1156 void 1157 ehci_dump_qtd(ehci_qtd_t *qtd) 1158 { 1159 u_int32_t s; 1160 char sbuf[128]; 1161 1162 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1163 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1164 printf("\n"); 1165 s = le32toh(qtd->qtd_status); 1166 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1167 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1168 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1169 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1170 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1171 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1172 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1173 EHCI_QTD_GET_PID(s), sbuf); 1174 for (s = 0; s < 5; s++) 1175 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1176 } 1177 1178 void 1179 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1180 { 1181 ehci_qh_t *qh = &sqh->qh; 1182 u_int32_t endp, endphub; 1183 1184 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1185 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1186 endp = le32toh(qh->qh_endp); 1187 printf(" endp=0x%08x\n", endp); 1188 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1189 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1190 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1191 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1192 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1193 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1194 EHCI_QH_GET_NRL(endp)); 1195 endphub = le32toh(qh->qh_endphub); 1196 printf(" endphub=0x%08x\n", endphub); 1197 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1198 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1199 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1200 EHCI_QH_GET_MULT(endphub)); 1201 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1202 printf("Overlay qTD:\n"); 1203 ehci_dump_qtd(&qh->qh_qtd); 1204 } 1205 1206 #ifdef DIAGNOSTIC 1207 Static void 1208 ehci_dump_exfer(struct ehci_xfer *ex) 1209 { 1210 printf("ehci_dump_exfer: ex=%p\n", ex); 1211 } 1212 #endif 1213 #endif 1214 1215 usbd_status 1216 ehci_open(usbd_pipe_handle pipe) 1217 { 1218 usbd_device_handle dev = pipe->device; 1219 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1220 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1221 u_int8_t addr = dev->address; 1222 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1223 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1224 ehci_soft_qh_t *sqh; 1225 usbd_status err; 1226 int s; 1227 int speed, naks; 1228 1229 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1230 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1231 1232 if (sc->sc_dying) 1233 return (USBD_IOERROR); 1234 1235 epipe->nexttoggle = 0; 1236 1237 if (addr == sc->sc_addr) { 1238 switch (ed->bEndpointAddress) { 1239 case USB_CONTROL_ENDPOINT: 1240 pipe->methods = &ehci_root_ctrl_methods; 1241 break; 1242 case UE_DIR_IN | EHCI_INTR_ENDPT: 1243 pipe->methods = &ehci_root_intr_methods; 1244 break; 1245 default: 1246 return (USBD_INVAL); 1247 } 1248 return (USBD_NORMAL_COMPLETION); 1249 } 1250 1251 /* XXX All this stuff is only valid for async. */ 1252 switch (dev->speed) { 1253 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1254 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1255 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1256 default: panic("ehci_open: bad device speed %d", dev->speed); 1257 } 1258 naks = 8; /* XXX */ 1259 sqh = ehci_alloc_sqh(sc); 1260 if (sqh == NULL) 1261 goto bad0; 1262 /* qh_link filled when the QH is added */ 1263 sqh->qh.qh_endp = htole32( 1264 EHCI_QH_SET_ADDR(addr) | 1265 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1266 EHCI_QH_SET_EPS(speed) | 1267 EHCI_QH_DTC | 1268 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1269 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1270 EHCI_QH_CTL : 0) | 1271 EHCI_QH_SET_NRL(naks) 1272 ); 1273 sqh->qh.qh_endphub = htole32( 1274 EHCI_QH_SET_MULT(1) 1275 /* XXX TT stuff */ 1276 /* XXX interrupt mask */ 1277 ); 1278 sqh->qh.qh_curqtd = EHCI_NULL; 1279 /* Fill the overlay qTD */ 1280 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1281 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1282 sqh->qh.qh_qtd.qtd_status = htole32(0); 1283 1284 epipe->sqh = sqh; 1285 1286 switch (xfertype) { 1287 case UE_CONTROL: 1288 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1289 0, &epipe->u.ctl.reqdma); 1290 #ifdef EHCI_DEBUG 1291 if (err) 1292 printf("ehci_open: usb_allocmem()=%d\n", err); 1293 #endif 1294 if (err) 1295 goto bad1; 1296 pipe->methods = &ehci_device_ctrl_methods; 1297 s = splusb(); 1298 ehci_add_qh(sqh, sc->sc_async_head); 1299 splx(s); 1300 break; 1301 case UE_BULK: 1302 pipe->methods = &ehci_device_bulk_methods; 1303 s = splusb(); 1304 ehci_add_qh(sqh, sc->sc_async_head); 1305 splx(s); 1306 break; 1307 case UE_INTERRUPT: 1308 pipe->methods = &ehci_device_intr_methods; 1309 return (USBD_INVAL); 1310 case UE_ISOCHRONOUS: 1311 pipe->methods = &ehci_device_isoc_methods; 1312 return (USBD_INVAL); 1313 default: 1314 return (USBD_INVAL); 1315 } 1316 return (USBD_NORMAL_COMPLETION); 1317 1318 bad1: 1319 ehci_free_sqh(sc, sqh); 1320 bad0: 1321 return (USBD_NOMEM); 1322 } 1323 1324 /* 1325 * Add an ED to the schedule. Called at splusb(). 1326 */ 1327 void 1328 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1329 { 1330 SPLUSBCHECK; 1331 1332 sqh->next = head->next; 1333 sqh->qh.qh_link = head->qh.qh_link; 1334 head->next = sqh; 1335 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1336 1337 #ifdef EHCI_DEBUG 1338 if (ehcidebug > 5) { 1339 printf("ehci_add_qh:\n"); 1340 ehci_dump_sqh(sqh); 1341 } 1342 #endif 1343 } 1344 1345 /* 1346 * Remove an ED from the schedule. Called at splusb(). 1347 */ 1348 void 1349 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1350 { 1351 ehci_soft_qh_t *p; 1352 1353 SPLUSBCHECK; 1354 /* XXX */ 1355 for (p = head; p != NULL && p->next != sqh; p = p->next) 1356 ; 1357 if (p == NULL) 1358 panic("ehci_rem_qh: ED not found"); 1359 p->next = sqh->next; 1360 p->qh.qh_link = sqh->qh.qh_link; 1361 1362 ehci_sync_hc(sc); 1363 } 1364 1365 void 1366 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1367 { 1368 /* Halt while we are messing. */ 1369 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1370 sqh->qh.qh_curqtd = 0; 1371 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1372 sqh->sqtd = sqtd; 1373 /* Clear halt */ 1374 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1375 } 1376 1377 /* 1378 * Ensure that the HC has released all references to the QH. We do this 1379 * by asking for a Async Advance Doorbell interrupt and then we wait for 1380 * the interrupt. 1381 * To make this easier we first obtain exclusive use of the doorbell. 1382 */ 1383 void 1384 ehci_sync_hc(ehci_softc_t *sc) 1385 { 1386 int s, error; 1387 1388 if (sc->sc_dying) { 1389 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1390 return; 1391 } 1392 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1393 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1394 s = splhardusb(); 1395 /* ask for doorbell */ 1396 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1397 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1398 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1399 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1400 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1401 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1402 splx(s); 1403 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1404 #ifdef DIAGNOSTIC 1405 if (error) 1406 printf("ehci_sync_hc: tsleep() = %d\n", error); 1407 #endif 1408 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1409 } 1410 1411 /***********/ 1412 1413 /* 1414 * Data structures and routines to emulate the root hub. 1415 */ 1416 Static usb_device_descriptor_t ehci_devd = { 1417 USB_DEVICE_DESCRIPTOR_SIZE, 1418 UDESC_DEVICE, /* type */ 1419 {0x00, 0x02}, /* USB version */ 1420 UDCLASS_HUB, /* class */ 1421 UDSUBCLASS_HUB, /* subclass */ 1422 UDPROTO_HSHUBSTT, /* protocol */ 1423 64, /* max packet */ 1424 {0},{0},{0x00,0x01}, /* device id */ 1425 1,2,0, /* string indicies */ 1426 1 /* # of configurations */ 1427 }; 1428 1429 Static usb_device_qualifier_t ehci_odevd = { 1430 USB_DEVICE_DESCRIPTOR_SIZE, 1431 UDESC_DEVICE_QUALIFIER, /* type */ 1432 {0x00, 0x02}, /* USB version */ 1433 UDCLASS_HUB, /* class */ 1434 UDSUBCLASS_HUB, /* subclass */ 1435 UDPROTO_FSHUB, /* protocol */ 1436 64, /* max packet */ 1437 1, /* # of configurations */ 1438 0 1439 }; 1440 1441 Static usb_config_descriptor_t ehci_confd = { 1442 USB_CONFIG_DESCRIPTOR_SIZE, 1443 UDESC_CONFIG, 1444 {USB_CONFIG_DESCRIPTOR_SIZE + 1445 USB_INTERFACE_DESCRIPTOR_SIZE + 1446 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1447 1, 1448 1, 1449 0, 1450 UC_SELF_POWERED, 1451 0 /* max power */ 1452 }; 1453 1454 Static usb_interface_descriptor_t ehci_ifcd = { 1455 USB_INTERFACE_DESCRIPTOR_SIZE, 1456 UDESC_INTERFACE, 1457 0, 1458 0, 1459 1, 1460 UICLASS_HUB, 1461 UISUBCLASS_HUB, 1462 UIPROTO_HSHUBSTT, 1463 0 1464 }; 1465 1466 Static usb_endpoint_descriptor_t ehci_endpd = { 1467 USB_ENDPOINT_DESCRIPTOR_SIZE, 1468 UDESC_ENDPOINT, 1469 UE_DIR_IN | EHCI_INTR_ENDPT, 1470 UE_INTERRUPT, 1471 {8, 0}, /* max packet */ 1472 255 1473 }; 1474 1475 Static usb_hub_descriptor_t ehci_hubd = { 1476 USB_HUB_DESCRIPTOR_SIZE, 1477 UDESC_HUB, 1478 0, 1479 {0,0}, 1480 0, 1481 0, 1482 {0}, 1483 }; 1484 1485 Static int 1486 ehci_str(p, l, s) 1487 usb_string_descriptor_t *p; 1488 int l; 1489 char *s; 1490 { 1491 int i; 1492 1493 if (l == 0) 1494 return (0); 1495 p->bLength = 2 * strlen(s) + 2; 1496 if (l == 1) 1497 return (1); 1498 p->bDescriptorType = UDESC_STRING; 1499 l -= 2; 1500 for (i = 0; s[i] && l > 1; i++, l -= 2) 1501 USETW2(p->bString[i], 0, s[i]); 1502 return (2*i+2); 1503 } 1504 1505 /* 1506 * Simulate a hardware hub by handling all the necessary requests. 1507 */ 1508 Static usbd_status 1509 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1510 { 1511 usbd_status err; 1512 1513 /* Insert last in queue. */ 1514 err = usb_insert_transfer(xfer); 1515 if (err) 1516 return (err); 1517 1518 /* Pipe isn't running, start first */ 1519 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1520 } 1521 1522 Static usbd_status 1523 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1524 { 1525 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1526 usb_device_request_t *req; 1527 void *buf = NULL; 1528 int port, i; 1529 int s, len, value, index, l, totlen = 0; 1530 usb_port_status_t ps; 1531 usb_hub_descriptor_t hubd; 1532 usbd_status err; 1533 u_int32_t v; 1534 1535 if (sc->sc_dying) 1536 return (USBD_IOERROR); 1537 1538 #ifdef DIAGNOSTIC 1539 if (!(xfer->rqflags & URQ_REQUEST)) 1540 /* XXX panic */ 1541 return (USBD_INVAL); 1542 #endif 1543 req = &xfer->request; 1544 1545 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1546 req->bmRequestType, req->bRequest)); 1547 1548 len = UGETW(req->wLength); 1549 value = UGETW(req->wValue); 1550 index = UGETW(req->wIndex); 1551 1552 if (len != 0) 1553 buf = KERNADDR(&xfer->dmabuf, 0); 1554 1555 #define C(x,y) ((x) | ((y) << 8)) 1556 switch(C(req->bRequest, req->bmRequestType)) { 1557 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1558 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1559 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1560 /* 1561 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1562 * for the integrated root hub. 1563 */ 1564 break; 1565 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1566 if (len > 0) { 1567 *(u_int8_t *)buf = sc->sc_conf; 1568 totlen = 1; 1569 } 1570 break; 1571 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1572 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1573 switch(value >> 8) { 1574 case UDESC_DEVICE: 1575 if ((value & 0xff) != 0) { 1576 err = USBD_IOERROR; 1577 goto ret; 1578 } 1579 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1580 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1581 memcpy(buf, &ehci_devd, l); 1582 break; 1583 /* 1584 * We can't really operate at another speed, but the spec says 1585 * we need this descriptor. 1586 */ 1587 case UDESC_DEVICE_QUALIFIER: 1588 if ((value & 0xff) != 0) { 1589 err = USBD_IOERROR; 1590 goto ret; 1591 } 1592 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1593 memcpy(buf, &ehci_odevd, l); 1594 break; 1595 /* 1596 * We can't really operate at another speed, but the spec says 1597 * we need this descriptor. 1598 */ 1599 case UDESC_OTHER_SPEED_CONFIGURATION: 1600 case UDESC_CONFIG: 1601 if ((value & 0xff) != 0) { 1602 err = USBD_IOERROR; 1603 goto ret; 1604 } 1605 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1606 memcpy(buf, &ehci_confd, l); 1607 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1608 value >> 8; 1609 buf = (char *)buf + l; 1610 len -= l; 1611 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1612 totlen += l; 1613 memcpy(buf, &ehci_ifcd, l); 1614 buf = (char *)buf + l; 1615 len -= l; 1616 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1617 totlen += l; 1618 memcpy(buf, &ehci_endpd, l); 1619 break; 1620 case UDESC_STRING: 1621 if (len == 0) 1622 break; 1623 *(u_int8_t *)buf = 0; 1624 totlen = 1; 1625 switch (value & 0xff) { 1626 case 1: /* Vendor */ 1627 totlen = ehci_str(buf, len, sc->sc_vendor); 1628 break; 1629 case 2: /* Product */ 1630 totlen = ehci_str(buf, len, "EHCI root hub"); 1631 break; 1632 } 1633 break; 1634 default: 1635 err = USBD_IOERROR; 1636 goto ret; 1637 } 1638 break; 1639 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1640 if (len > 0) { 1641 *(u_int8_t *)buf = 0; 1642 totlen = 1; 1643 } 1644 break; 1645 case C(UR_GET_STATUS, UT_READ_DEVICE): 1646 if (len > 1) { 1647 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1648 totlen = 2; 1649 } 1650 break; 1651 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1652 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1653 if (len > 1) { 1654 USETW(((usb_status_t *)buf)->wStatus, 0); 1655 totlen = 2; 1656 } 1657 break; 1658 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1659 if (value >= USB_MAX_DEVICES) { 1660 err = USBD_IOERROR; 1661 goto ret; 1662 } 1663 sc->sc_addr = value; 1664 break; 1665 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1666 if (value != 0 && value != 1) { 1667 err = USBD_IOERROR; 1668 goto ret; 1669 } 1670 sc->sc_conf = value; 1671 break; 1672 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1673 break; 1674 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1675 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1676 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1677 err = USBD_IOERROR; 1678 goto ret; 1679 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1680 break; 1681 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1682 break; 1683 /* Hub requests */ 1684 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1685 break; 1686 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1687 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1688 "port=%d feature=%d\n", 1689 index, value)); 1690 if (index < 1 || index > sc->sc_noport) { 1691 err = USBD_IOERROR; 1692 goto ret; 1693 } 1694 port = EHCI_PORTSC(index); 1695 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1696 switch(value) { 1697 case UHF_PORT_ENABLE: 1698 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1699 break; 1700 case UHF_PORT_SUSPEND: 1701 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1702 break; 1703 case UHF_PORT_POWER: 1704 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1705 break; 1706 case UHF_PORT_TEST: 1707 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1708 "%d\n", index)); 1709 break; 1710 case UHF_PORT_INDICATOR: 1711 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1712 "%d\n", index)); 1713 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1714 break; 1715 case UHF_C_PORT_CONNECTION: 1716 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1717 break; 1718 case UHF_C_PORT_ENABLE: 1719 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1720 break; 1721 case UHF_C_PORT_SUSPEND: 1722 /* how? */ 1723 break; 1724 case UHF_C_PORT_OVER_CURRENT: 1725 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1726 break; 1727 case UHF_C_PORT_RESET: 1728 sc->sc_isreset = 0; 1729 break; 1730 default: 1731 err = USBD_IOERROR; 1732 goto ret; 1733 } 1734 #if 0 1735 switch(value) { 1736 case UHF_C_PORT_CONNECTION: 1737 case UHF_C_PORT_ENABLE: 1738 case UHF_C_PORT_SUSPEND: 1739 case UHF_C_PORT_OVER_CURRENT: 1740 case UHF_C_PORT_RESET: 1741 /* Enable RHSC interrupt if condition is cleared. */ 1742 if ((OREAD4(sc, port) >> 16) == 0) 1743 ehci_pcd_able(sc, 1); 1744 break; 1745 default: 1746 break; 1747 } 1748 #endif 1749 break; 1750 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1751 if ((value & 0xff) != 0) { 1752 err = USBD_IOERROR; 1753 goto ret; 1754 } 1755 hubd = ehci_hubd; 1756 hubd.bNbrPorts = sc->sc_noport; 1757 v = EOREAD4(sc, EHCI_HCSPARAMS); 1758 USETW(hubd.wHubCharacteristics, 1759 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1760 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1761 ? UHD_PORT_IND : 0); 1762 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1763 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1764 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1765 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1766 l = min(len, hubd.bDescLength); 1767 totlen = l; 1768 memcpy(buf, &hubd, l); 1769 break; 1770 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1771 if (len != 4) { 1772 err = USBD_IOERROR; 1773 goto ret; 1774 } 1775 memset(buf, 0, len); /* ? XXX */ 1776 totlen = len; 1777 break; 1778 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1779 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1780 index)); 1781 if (index < 1 || index > sc->sc_noport) { 1782 err = USBD_IOERROR; 1783 goto ret; 1784 } 1785 if (len != 4) { 1786 err = USBD_IOERROR; 1787 goto ret; 1788 } 1789 v = EOREAD4(sc, EHCI_PORTSC(index)); 1790 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1791 v)); 1792 i = UPS_HIGH_SPEED; 1793 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1794 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1795 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1796 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1797 if (v & EHCI_PS_PR) i |= UPS_RESET; 1798 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1799 USETW(ps.wPortStatus, i); 1800 i = 0; 1801 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1802 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1803 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1804 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1805 USETW(ps.wPortChange, i); 1806 l = min(len, sizeof ps); 1807 memcpy(buf, &ps, l); 1808 totlen = l; 1809 break; 1810 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1811 err = USBD_IOERROR; 1812 goto ret; 1813 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1814 break; 1815 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1816 if (index < 1 || index > sc->sc_noport) { 1817 err = USBD_IOERROR; 1818 goto ret; 1819 } 1820 port = EHCI_PORTSC(index); 1821 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1822 switch(value) { 1823 case UHF_PORT_ENABLE: 1824 EOWRITE4(sc, port, v | EHCI_PS_PE); 1825 break; 1826 case UHF_PORT_SUSPEND: 1827 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1828 break; 1829 case UHF_PORT_RESET: 1830 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1831 index)); 1832 if (EHCI_PS_IS_LOWSPEED(v)) { 1833 /* Low speed device, give up ownership. */ 1834 ehci_disown(sc, index, 1); 1835 break; 1836 } 1837 /* Start reset sequence. */ 1838 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1839 EOWRITE4(sc, port, v | EHCI_PS_PR); 1840 /* Wait for reset to complete. */ 1841 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1842 if (sc->sc_dying) { 1843 err = USBD_IOERROR; 1844 goto ret; 1845 } 1846 /* Terminate reset sequence. */ 1847 EOWRITE4(sc, port, v); 1848 /* Wait for HC to complete reset. */ 1849 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1850 if (sc->sc_dying) { 1851 err = USBD_IOERROR; 1852 goto ret; 1853 } 1854 v = EOREAD4(sc, port); 1855 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1856 if (v & EHCI_PS_PR) { 1857 printf("%s: port reset timeout\n", 1858 USBDEVNAME(sc->sc_bus.bdev)); 1859 return (USBD_TIMEOUT); 1860 } 1861 if (!(v & EHCI_PS_PE)) { 1862 /* Not a high speed device, give up ownership.*/ 1863 ehci_disown(sc, index, 0); 1864 break; 1865 } 1866 sc->sc_isreset = 1; 1867 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1868 index, v)); 1869 break; 1870 case UHF_PORT_POWER: 1871 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1872 "%d\n", index)); 1873 EOWRITE4(sc, port, v | EHCI_PS_PP); 1874 break; 1875 case UHF_PORT_TEST: 1876 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1877 "%d\n", index)); 1878 break; 1879 case UHF_PORT_INDICATOR: 1880 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1881 "%d\n", index)); 1882 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1883 break; 1884 default: 1885 err = USBD_IOERROR; 1886 goto ret; 1887 } 1888 break; 1889 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1890 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1891 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1892 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1893 break; 1894 default: 1895 err = USBD_IOERROR; 1896 goto ret; 1897 } 1898 xfer->actlen = totlen; 1899 err = USBD_NORMAL_COMPLETION; 1900 ret: 1901 xfer->status = err; 1902 s = splusb(); 1903 usb_transfer_complete(xfer); 1904 splx(s); 1905 return (USBD_IN_PROGRESS); 1906 } 1907 1908 void 1909 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1910 { 1911 int port; 1912 u_int32_t v; 1913 1914 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1915 #ifdef DIAGNOSTIC 1916 if (sc->sc_npcomp != 0) { 1917 int i = (index-1) / sc->sc_npcomp; 1918 if (i >= sc->sc_ncomp) 1919 printf("%s: strange port\n", 1920 USBDEVNAME(sc->sc_bus.bdev)); 1921 else 1922 printf("%s: handing over %s speed device on " 1923 "port %d to %s\n", 1924 USBDEVNAME(sc->sc_bus.bdev), 1925 lowspeed ? "low" : "full", 1926 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1927 } else { 1928 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1929 } 1930 #endif 1931 port = EHCI_PORTSC(index); 1932 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1933 EOWRITE4(sc, port, v | EHCI_PS_PO); 1934 } 1935 1936 /* Abort a root control request. */ 1937 Static void 1938 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1939 { 1940 /* Nothing to do, all transfers are synchronous. */ 1941 } 1942 1943 /* Close the root pipe. */ 1944 Static void 1945 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1946 { 1947 DPRINTF(("ehci_root_ctrl_close\n")); 1948 /* Nothing to do. */ 1949 } 1950 1951 void 1952 ehci_root_intr_done(usbd_xfer_handle xfer) 1953 { 1954 xfer->hcpriv = NULL; 1955 } 1956 1957 Static usbd_status 1958 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1959 { 1960 usbd_status err; 1961 1962 /* Insert last in queue. */ 1963 err = usb_insert_transfer(xfer); 1964 if (err) 1965 return (err); 1966 1967 /* Pipe isn't running, start first */ 1968 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1969 } 1970 1971 Static usbd_status 1972 ehci_root_intr_start(usbd_xfer_handle xfer) 1973 { 1974 usbd_pipe_handle pipe = xfer->pipe; 1975 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1976 1977 if (sc->sc_dying) 1978 return (USBD_IOERROR); 1979 1980 sc->sc_intrxfer = xfer; 1981 1982 return (USBD_IN_PROGRESS); 1983 } 1984 1985 /* Abort a root interrupt request. */ 1986 Static void 1987 ehci_root_intr_abort(usbd_xfer_handle xfer) 1988 { 1989 int s; 1990 1991 if (xfer->pipe->intrxfer == xfer) { 1992 DPRINTF(("ehci_root_intr_abort: remove\n")); 1993 xfer->pipe->intrxfer = NULL; 1994 } 1995 xfer->status = USBD_CANCELLED; 1996 s = splusb(); 1997 usb_transfer_complete(xfer); 1998 splx(s); 1999 } 2000 2001 /* Close the root pipe. */ 2002 Static void 2003 ehci_root_intr_close(usbd_pipe_handle pipe) 2004 { 2005 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2006 2007 DPRINTF(("ehci_root_intr_close\n")); 2008 2009 sc->sc_intrxfer = NULL; 2010 } 2011 2012 void 2013 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2014 { 2015 xfer->hcpriv = NULL; 2016 } 2017 2018 /************************/ 2019 2020 ehci_soft_qh_t * 2021 ehci_alloc_sqh(ehci_softc_t *sc) 2022 { 2023 ehci_soft_qh_t *sqh; 2024 usbd_status err; 2025 int i, offs; 2026 usb_dma_t dma; 2027 2028 if (sc->sc_freeqhs == NULL) { 2029 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2030 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2031 EHCI_PAGE_SIZE, &dma); 2032 #ifdef EHCI_DEBUG 2033 if (err) 2034 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2035 #endif 2036 if (err) 2037 return (NULL); 2038 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2039 offs = i * EHCI_SQH_SIZE; 2040 sqh = KERNADDR(&dma, offs); 2041 sqh->physaddr = DMAADDR(&dma, offs); 2042 sqh->next = sc->sc_freeqhs; 2043 sc->sc_freeqhs = sqh; 2044 } 2045 } 2046 sqh = sc->sc_freeqhs; 2047 sc->sc_freeqhs = sqh->next; 2048 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2049 sqh->next = NULL; 2050 return (sqh); 2051 } 2052 2053 void 2054 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2055 { 2056 sqh->next = sc->sc_freeqhs; 2057 sc->sc_freeqhs = sqh; 2058 } 2059 2060 ehci_soft_qtd_t * 2061 ehci_alloc_sqtd(ehci_softc_t *sc) 2062 { 2063 ehci_soft_qtd_t *sqtd; 2064 usbd_status err; 2065 int i, offs; 2066 usb_dma_t dma; 2067 int s; 2068 2069 if (sc->sc_freeqtds == NULL) { 2070 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2071 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2072 EHCI_PAGE_SIZE, &dma); 2073 #ifdef EHCI_DEBUG 2074 if (err) 2075 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2076 #endif 2077 if (err) 2078 return (NULL); 2079 s = splusb(); 2080 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2081 offs = i * EHCI_SQTD_SIZE; 2082 sqtd = KERNADDR(&dma, offs); 2083 sqtd->physaddr = DMAADDR(&dma, offs); 2084 sqtd->nextqtd = sc->sc_freeqtds; 2085 sc->sc_freeqtds = sqtd; 2086 } 2087 splx(s); 2088 } 2089 2090 s = splusb(); 2091 sqtd = sc->sc_freeqtds; 2092 sc->sc_freeqtds = sqtd->nextqtd; 2093 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2094 sqtd->nextqtd = NULL; 2095 sqtd->xfer = NULL; 2096 splx(s); 2097 2098 return (sqtd); 2099 } 2100 2101 void 2102 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2103 { 2104 int s; 2105 2106 s = splusb(); 2107 sqtd->nextqtd = sc->sc_freeqtds; 2108 sc->sc_freeqtds = sqtd; 2109 splx(s); 2110 } 2111 2112 usbd_status 2113 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2114 int alen, int rd, usbd_xfer_handle xfer, 2115 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2116 { 2117 ehci_soft_qtd_t *next, *cur; 2118 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2119 u_int32_t qtdstatus; 2120 int len, curlen, mps; 2121 int i, tog; 2122 usb_dma_t *dma = &xfer->dmabuf; 2123 2124 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2125 2126 len = alen; 2127 dataphys = DMAADDR(dma, 0); 2128 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2129 #if 0 2130 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2131 epipe->nexttoggle); 2132 #endif 2133 qtdstatus = EHCI_QTD_ACTIVE | 2134 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2135 EHCI_QTD_SET_CERR(3) 2136 /* IOC set below */ 2137 /* BYTES set below */ 2138 ; 2139 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2140 tog = epipe->nexttoggle; 2141 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2142 2143 cur = ehci_alloc_sqtd(sc); 2144 *sp = cur; 2145 if (cur == NULL) 2146 goto nomem; 2147 for (;;) { 2148 dataphyspage = EHCI_PAGE(dataphys); 2149 /* The EHCI hardware can handle at most 5 pages. */ 2150 if (dataphyslastpage - dataphyspage < 2151 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2152 /* we can handle it in this QTD */ 2153 curlen = len; 2154 } else { 2155 /* must use multiple TDs, fill as much as possible. */ 2156 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2157 EHCI_PAGE_OFFSET(dataphys); 2158 #ifdef DIAGNOSTIC 2159 if (curlen > len) { 2160 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2161 "len=0x%x offs=0x%x\n", curlen, len, 2162 EHCI_PAGE_OFFSET(dataphys)); 2163 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2164 dataphyslastpage, dataphyspage, 2165 dataphys); 2166 curlen = len; 2167 } 2168 #endif 2169 /* the length must be a multiple of the max size */ 2170 curlen -= curlen % mps; 2171 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2172 "curlen=%d\n", curlen)); 2173 #ifdef DIAGNOSTIC 2174 if (curlen == 0) 2175 panic("ehci_alloc_std: curlen == 0"); 2176 #endif 2177 } 2178 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2179 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2180 dataphys, dataphyslastpage, 2181 len, curlen)); 2182 len -= curlen; 2183 2184 if (len != 0) { 2185 next = ehci_alloc_sqtd(sc); 2186 if (next == NULL) 2187 goto nomem; 2188 nextphys = htole32(next->physaddr); 2189 } else { 2190 next = NULL; 2191 nextphys = EHCI_NULL; 2192 } 2193 2194 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2195 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2196 if (i != 0) /* use offset only in first buffer */ 2197 a = EHCI_PAGE(a); 2198 cur->qtd.qtd_buffer[i] = htole32(a); 2199 cur->qtd.qtd_buffer_hi[i] = 0; 2200 #ifdef DIAGNOSTIC 2201 if (i >= EHCI_QTD_NBUFFERS) { 2202 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2203 goto nomem; 2204 } 2205 #endif 2206 } 2207 cur->nextqtd = next; 2208 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2209 cur->qtd.qtd_status = 2210 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2211 cur->xfer = xfer; 2212 cur->len = curlen; 2213 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2214 dataphys, dataphys + curlen)); 2215 /* adjust the toggle based on the number of packets in this 2216 qtd */ 2217 if (((curlen + mps - 1) / mps) & 1) { 2218 tog ^= 1; 2219 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2220 } 2221 if (len == 0) 2222 break; 2223 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2224 dataphys += curlen; 2225 cur = next; 2226 } 2227 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2228 *ep = cur; 2229 epipe->nexttoggle = tog; 2230 2231 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2232 *sp, *ep)); 2233 2234 return (USBD_NORMAL_COMPLETION); 2235 2236 nomem: 2237 /* XXX free chain */ 2238 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2239 return (USBD_NOMEM); 2240 } 2241 2242 Static void 2243 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2244 ehci_soft_qtd_t *sqtdend) 2245 { 2246 ehci_soft_qtd_t *p; 2247 int i; 2248 2249 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2250 sqtd, sqtdend)); 2251 2252 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2253 p = sqtd->nextqtd; 2254 ehci_free_sqtd(sc, sqtd); 2255 } 2256 } 2257 2258 /****************/ 2259 2260 /* 2261 * Close a reqular pipe. 2262 * Assumes that there are no pending transactions. 2263 */ 2264 void 2265 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2266 { 2267 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2268 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2269 ehci_soft_qh_t *sqh = epipe->sqh; 2270 int s; 2271 2272 s = splusb(); 2273 ehci_rem_qh(sc, sqh, head); 2274 splx(s); 2275 ehci_free_sqh(sc, epipe->sqh); 2276 } 2277 2278 /* 2279 * Abort a device request. 2280 * If this routine is called at splusb() it guarantees that the request 2281 * will be removed from the hardware scheduling and that the callback 2282 * for it will be called with USBD_CANCELLED status. 2283 * It's impossible to guarantee that the requested transfer will not 2284 * have happened since the hardware runs concurrently. 2285 * If the transaction has already happened we rely on the ordinary 2286 * interrupt processing to process it. 2287 * XXX This is most probably wrong. 2288 */ 2289 void 2290 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2291 { 2292 #define exfer EXFER(xfer) 2293 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2294 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2295 ehci_soft_qh_t *sqh = epipe->sqh; 2296 ehci_soft_qtd_t *sqtd; 2297 ehci_physaddr_t cur; 2298 u_int32_t qhstatus; 2299 int s; 2300 int hit; 2301 2302 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2303 2304 if (sc->sc_dying) { 2305 /* If we're dying, just do the software part. */ 2306 s = splusb(); 2307 xfer->status = status; /* make software ignore it */ 2308 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2309 usb_transfer_complete(xfer); 2310 splx(s); 2311 return; 2312 } 2313 2314 if (xfer->device->bus->intr_context || !curproc) 2315 panic("ehci_abort_xfer: not in process context"); 2316 2317 /* 2318 * Step 1: Make interrupt routine and hardware ignore xfer. 2319 */ 2320 s = splusb(); 2321 xfer->status = status; /* make software ignore it */ 2322 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2323 qhstatus = sqh->qh.qh_qtd.qtd_status; 2324 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2325 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2326 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2327 if (sqtd == exfer->sqtdend) 2328 break; 2329 } 2330 splx(s); 2331 2332 /* 2333 * Step 2: Wait until we know hardware has finished any possible 2334 * use of the xfer. Also make sure the soft interrupt routine 2335 * has run. 2336 */ 2337 ehci_sync_hc(sc); 2338 s = splusb(); 2339 sc->sc_softwake = 1; 2340 usb_schedsoftintr(&sc->sc_bus); 2341 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2342 splx(s); 2343 2344 /* 2345 * Step 3: Remove any vestiges of the xfer from the hardware. 2346 * The complication here is that the hardware may have executed 2347 * beyond the xfer we're trying to abort. So as we're scanning 2348 * the TDs of this xfer we check if the hardware points to 2349 * any of them. 2350 */ 2351 s = splusb(); /* XXX why? */ 2352 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2353 hit = 0; 2354 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2355 hit |= cur == sqtd->physaddr; 2356 if (sqtd == exfer->sqtdend) 2357 break; 2358 } 2359 sqtd = sqtd->nextqtd; 2360 /* Zap curqtd register if hardware pointed inside the xfer. */ 2361 if (hit && sqtd != NULL) { 2362 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2363 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2364 sqh->qh.qh_qtd.qtd_status = qhstatus; 2365 } else { 2366 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2367 } 2368 2369 /* 2370 * Step 4: Execute callback. 2371 */ 2372 #ifdef DIAGNOSTIC 2373 exfer->isdone = 1; 2374 #endif 2375 usb_transfer_complete(xfer); 2376 2377 splx(s); 2378 #undef exfer 2379 } 2380 2381 void 2382 ehci_timeout(void *addr) 2383 { 2384 struct ehci_xfer *exfer = addr; 2385 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2386 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2387 2388 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2389 #ifdef USB_DEBUG 2390 if (ehcidebug > 1) 2391 usbd_dump_pipe(exfer->xfer.pipe); 2392 #endif 2393 2394 if (sc->sc_dying) { 2395 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2396 return; 2397 } 2398 2399 /* Execute the abort in a process context. */ 2400 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2401 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2402 } 2403 2404 void 2405 ehci_timeout_task(void *addr) 2406 { 2407 usbd_xfer_handle xfer = addr; 2408 int s; 2409 2410 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2411 2412 s = splusb(); 2413 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2414 splx(s); 2415 } 2416 2417 /************************/ 2418 2419 Static usbd_status 2420 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2421 { 2422 usbd_status err; 2423 2424 /* Insert last in queue. */ 2425 err = usb_insert_transfer(xfer); 2426 if (err) 2427 return (err); 2428 2429 /* Pipe isn't running, start first */ 2430 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2431 } 2432 2433 Static usbd_status 2434 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2435 { 2436 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2437 usbd_status err; 2438 2439 if (sc->sc_dying) 2440 return (USBD_IOERROR); 2441 2442 #ifdef DIAGNOSTIC 2443 if (!(xfer->rqflags & URQ_REQUEST)) { 2444 /* XXX panic */ 2445 printf("ehci_device_ctrl_transfer: not a request\n"); 2446 return (USBD_INVAL); 2447 } 2448 #endif 2449 2450 err = ehci_device_request(xfer); 2451 if (err) 2452 return (err); 2453 2454 if (sc->sc_bus.use_polling) 2455 ehci_waitintr(sc, xfer); 2456 return (USBD_IN_PROGRESS); 2457 } 2458 2459 void 2460 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2461 { 2462 struct ehci_xfer *ex = EXFER(xfer); 2463 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2464 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2465 2466 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2467 2468 #ifdef DIAGNOSTIC 2469 if (!(xfer->rqflags & URQ_REQUEST)) { 2470 panic("ehci_ctrl_done: not a request"); 2471 } 2472 #endif 2473 2474 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2475 ehci_del_intr_list(ex); /* remove from active list */ 2476 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2477 } 2478 2479 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2480 } 2481 2482 /* Abort a device control request. */ 2483 Static void 2484 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2485 { 2486 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2487 ehci_abort_xfer(xfer, USBD_CANCELLED); 2488 } 2489 2490 /* Close a device control pipe. */ 2491 Static void 2492 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2493 { 2494 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2495 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2496 2497 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2498 ehci_close_pipe(pipe, sc->sc_async_head); 2499 } 2500 2501 usbd_status 2502 ehci_device_request(usbd_xfer_handle xfer) 2503 { 2504 #define exfer EXFER(xfer) 2505 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2506 usb_device_request_t *req = &xfer->request; 2507 usbd_device_handle dev = epipe->pipe.device; 2508 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2509 int addr = dev->address; 2510 ehci_soft_qtd_t *setup, *stat, *next; 2511 ehci_soft_qh_t *sqh; 2512 int isread; 2513 int len; 2514 usbd_status err; 2515 int s; 2516 2517 isread = req->bmRequestType & UT_READ; 2518 len = UGETW(req->wLength); 2519 2520 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2521 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2522 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2523 UGETW(req->wIndex), len, addr, 2524 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2525 2526 setup = ehci_alloc_sqtd(sc); 2527 if (setup == NULL) { 2528 err = USBD_NOMEM; 2529 goto bad1; 2530 } 2531 stat = ehci_alloc_sqtd(sc); 2532 if (stat == NULL) { 2533 err = USBD_NOMEM; 2534 goto bad2; 2535 } 2536 2537 sqh = epipe->sqh; 2538 epipe->u.ctl.length = len; 2539 2540 /* Update device address and length since they may have changed 2541 during the setup of the control pipe in usbd_new_device(). */ 2542 /* XXX This only needs to be done once, but it's too early in open. */ 2543 /* XXXX Should not touch ED here! */ 2544 sqh->qh.qh_endp = 2545 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2546 htole32( 2547 EHCI_QH_SET_ADDR(addr) | 2548 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2549 ); 2550 2551 /* Set up data transaction */ 2552 if (len != 0) { 2553 ehci_soft_qtd_t *end; 2554 2555 /* Start toggle at 1. */ 2556 epipe->nexttoggle = 1; 2557 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2558 &next, &end); 2559 if (err) 2560 goto bad3; 2561 end->nextqtd = stat; 2562 end->qtd.qtd_next = 2563 end->qtd.qtd_altnext = htole32(stat->physaddr); 2564 } else { 2565 next = stat; 2566 } 2567 2568 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2569 2570 /* Clear toggle */ 2571 setup->qtd.qtd_status = htole32( 2572 EHCI_QTD_ACTIVE | 2573 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2574 EHCI_QTD_SET_CERR(3) | 2575 EHCI_QTD_SET_TOGGLE(0) | 2576 EHCI_QTD_SET_BYTES(sizeof *req) 2577 ); 2578 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2579 setup->qtd.qtd_buffer_hi[0] = 0; 2580 setup->nextqtd = next; 2581 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2582 setup->xfer = xfer; 2583 setup->len = sizeof *req; 2584 2585 stat->qtd.qtd_status = htole32( 2586 EHCI_QTD_ACTIVE | 2587 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2588 EHCI_QTD_SET_CERR(3) | 2589 EHCI_QTD_SET_TOGGLE(1) | 2590 EHCI_QTD_IOC 2591 ); 2592 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2593 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2594 stat->nextqtd = NULL; 2595 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2596 stat->xfer = xfer; 2597 stat->len = 0; 2598 2599 #ifdef EHCI_DEBUG 2600 if (ehcidebug > 5) { 2601 DPRINTF(("ehci_device_request:\n")); 2602 ehci_dump_sqh(sqh); 2603 ehci_dump_sqtds(setup); 2604 } 2605 #endif 2606 2607 exfer->sqtdstart = setup; 2608 exfer->sqtdend = stat; 2609 #ifdef DIAGNOSTIC 2610 if (!exfer->isdone) { 2611 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2612 } 2613 exfer->isdone = 0; 2614 #endif 2615 2616 /* Insert qTD in QH list. */ 2617 s = splusb(); 2618 ehci_set_qh_qtd(sqh, setup); 2619 if (xfer->timeout && !sc->sc_bus.use_polling) { 2620 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2621 ehci_timeout, xfer); 2622 } 2623 ehci_add_intr_list(sc, exfer); 2624 xfer->status = USBD_IN_PROGRESS; 2625 splx(s); 2626 2627 #ifdef EHCI_DEBUG 2628 if (ehcidebug > 10) { 2629 DPRINTF(("ehci_device_request: status=%x\n", 2630 EOREAD4(sc, EHCI_USBSTS))); 2631 delay(10000); 2632 ehci_dump_regs(sc); 2633 ehci_dump_sqh(sc->sc_async_head); 2634 ehci_dump_sqh(sqh); 2635 ehci_dump_sqtds(setup); 2636 } 2637 #endif 2638 2639 return (USBD_NORMAL_COMPLETION); 2640 2641 bad3: 2642 ehci_free_sqtd(sc, stat); 2643 bad2: 2644 ehci_free_sqtd(sc, setup); 2645 bad1: 2646 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2647 xfer->status = err; 2648 usb_transfer_complete(xfer); 2649 return (err); 2650 #undef exfer 2651 } 2652 2653 /************************/ 2654 2655 Static usbd_status 2656 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2657 { 2658 usbd_status err; 2659 2660 /* Insert last in queue. */ 2661 err = usb_insert_transfer(xfer); 2662 if (err) 2663 return (err); 2664 2665 /* Pipe isn't running, start first */ 2666 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2667 } 2668 2669 usbd_status 2670 ehci_device_bulk_start(usbd_xfer_handle xfer) 2671 { 2672 #define exfer EXFER(xfer) 2673 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2674 usbd_device_handle dev = epipe->pipe.device; 2675 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2676 ehci_soft_qtd_t *data, *dataend; 2677 ehci_soft_qh_t *sqh; 2678 usbd_status err; 2679 int len, isread, endpt; 2680 int s; 2681 2682 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2683 xfer, xfer->length, xfer->flags)); 2684 2685 if (sc->sc_dying) 2686 return (USBD_IOERROR); 2687 2688 #ifdef DIAGNOSTIC 2689 if (xfer->rqflags & URQ_REQUEST) 2690 panic("ehci_device_bulk_transfer: a request"); 2691 #endif 2692 2693 len = xfer->length; 2694 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2695 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2696 sqh = epipe->sqh; 2697 2698 epipe->u.bulk.length = len; 2699 2700 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2701 &dataend); 2702 if (err) { 2703 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2704 xfer->status = err; 2705 usb_transfer_complete(xfer); 2706 return (err); 2707 } 2708 2709 #ifdef EHCI_DEBUG 2710 if (ehcidebug > 5) { 2711 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2712 ehci_dump_sqh(sqh); 2713 ehci_dump_sqtds(data); 2714 } 2715 #endif 2716 2717 /* Set up interrupt info. */ 2718 exfer->sqtdstart = data; 2719 exfer->sqtdend = dataend; 2720 #ifdef DIAGNOSTIC 2721 if (!exfer->isdone) { 2722 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2723 } 2724 exfer->isdone = 0; 2725 #endif 2726 2727 s = splusb(); 2728 ehci_set_qh_qtd(sqh, data); 2729 if (xfer->timeout && !sc->sc_bus.use_polling) { 2730 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2731 ehci_timeout, xfer); 2732 } 2733 ehci_add_intr_list(sc, exfer); 2734 xfer->status = USBD_IN_PROGRESS; 2735 splx(s); 2736 2737 #ifdef EHCI_DEBUG 2738 if (ehcidebug > 10) { 2739 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2740 delay(10000); 2741 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2742 ehci_dump_regs(sc); 2743 #if 0 2744 printf("async_head:\n"); 2745 ehci_dump_sqh(sc->sc_async_head); 2746 #endif 2747 printf("sqh:\n"); 2748 ehci_dump_sqh(sqh); 2749 ehci_dump_sqtds(data); 2750 } 2751 #endif 2752 2753 if (sc->sc_bus.use_polling) 2754 ehci_waitintr(sc, xfer); 2755 2756 return (USBD_IN_PROGRESS); 2757 #undef exfer 2758 } 2759 2760 Static void 2761 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2762 { 2763 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2764 ehci_abort_xfer(xfer, USBD_CANCELLED); 2765 } 2766 2767 /* 2768 * Close a device bulk pipe. 2769 */ 2770 Static void 2771 ehci_device_bulk_close(usbd_pipe_handle pipe) 2772 { 2773 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2774 2775 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2776 ehci_close_pipe(pipe, sc->sc_async_head); 2777 } 2778 2779 void 2780 ehci_device_bulk_done(usbd_xfer_handle xfer) 2781 { 2782 struct ehci_xfer *ex = EXFER(xfer); 2783 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2784 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2785 2786 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2787 xfer, xfer->actlen)); 2788 2789 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2790 ehci_del_intr_list(ex); /* remove from active list */ 2791 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2792 } 2793 2794 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2795 } 2796 2797 /************************/ 2798 2799 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2800 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2801 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2802 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2803 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2804 2805 /************************/ 2806 2807 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2808 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2809 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2810 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2811 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2812
Indexes created Wed Oct 01 19:09:53 GMT 2025