ehci.c revision 1.54.2.2
1 /* $NetBSD: ehci.c,v 1.54.2.2 2004/06/24 08:19:06 tron Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) There might also be some issues with the data toggle, it was not 58 * completely tested to work properly under all condistions. If wrong 59 * toggle would be sent/recvd, bulk data transfers would stop working. 60 * 61 * 4) The meaty part to implement is the support for USB 2.0 hubs. 62 * They are quite compolicated since the need to be able to do 63 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 64 * So the hub driver needs to handle and schedule these things, to 65 * assign place in frame where different devices get to go. See chapter 66 * on hubs in USB 2.0 for details. 67 * 68 * 5) command failures are not recovered correctly 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.54.2.2 2004/06/24 08:19:06 tron Exp $"); 73 74 #include "ohci.h" 75 #include "uhci.h" 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <sys/select.h> 83 #include <sys/proc.h> 84 #include <sys/queue.h> 85 86 #include <machine/bus.h> 87 #include <machine/endian.h> 88 89 #include <dev/usb/usb.h> 90 #include <dev/usb/usbdi.h> 91 #include <dev/usb/usbdivar.h> 92 #include <dev/usb/usb_mem.h> 93 #include <dev/usb/usb_quirks.h> 94 95 #include <dev/usb/ehcireg.h> 96 #include <dev/usb/ehcivar.h> 97 98 #ifdef EHCI_DEBUG 99 #define DPRINTF(x) if (ehcidebug) printf x 100 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 101 int ehcidebug = 0; 102 #ifndef __NetBSD__ 103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 104 #endif 105 #else 106 #define DPRINTF(x) 107 #define DPRINTFN(n,x) 108 #endif 109 110 struct ehci_pipe { 111 struct usbd_pipe pipe; 112 int nexttoggle; 113 114 ehci_soft_qh_t *sqh; 115 union { 116 ehci_soft_qtd_t *qtd; 117 /* ehci_soft_itd_t *itd; */ 118 } tail; 119 union { 120 /* Control pipe */ 121 struct { 122 usb_dma_t reqdma; 123 u_int length; 124 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 125 } ctl; 126 /* Interrupt pipe */ 127 /* XXX */ 128 /* Bulk pipe */ 129 struct { 130 u_int length; 131 } bulk; 132 /* Iso pipe */ 133 /* XXX */ 134 } u; 135 }; 136 137 Static void ehci_shutdown(void *); 138 Static void ehci_power(int, void *); 139 140 Static usbd_status ehci_open(usbd_pipe_handle); 141 Static void ehci_poll(struct usbd_bus *); 142 Static void ehci_softintr(void *); 143 Static int ehci_intr1(ehci_softc_t *); 144 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 145 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 146 Static void ehci_idone(struct ehci_xfer *); 147 Static void ehci_timeout(void *); 148 Static void ehci_timeout_task(void *); 149 150 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 151 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 152 153 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 154 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 155 156 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 158 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 159 Static void ehci_root_ctrl_close(usbd_pipe_handle); 160 Static void ehci_root_ctrl_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 164 Static void ehci_root_intr_abort(usbd_xfer_handle); 165 Static void ehci_root_intr_close(usbd_pipe_handle); 166 Static void ehci_root_intr_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 170 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 171 Static void ehci_device_ctrl_close(usbd_pipe_handle); 172 Static void ehci_device_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 176 Static void ehci_device_bulk_abort(usbd_xfer_handle); 177 Static void ehci_device_bulk_close(usbd_pipe_handle); 178 Static void ehci_device_bulk_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 182 Static void ehci_device_intr_abort(usbd_xfer_handle); 183 Static void ehci_device_intr_close(usbd_pipe_handle); 184 Static void ehci_device_intr_done(usbd_xfer_handle); 185 186 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 187 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 188 Static void ehci_device_isoc_abort(usbd_xfer_handle); 189 Static void ehci_device_isoc_close(usbd_pipe_handle); 190 Static void ehci_device_isoc_done(usbd_xfer_handle); 191 192 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 193 Static void ehci_noop(usbd_pipe_handle pipe); 194 195 Static int ehci_str(usb_string_descriptor_t *, int, char *); 196 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 197 Static void ehci_pcd_able(ehci_softc_t *, int); 198 Static void ehci_pcd_enable(void *); 199 Static void ehci_disown(ehci_softc_t *, int, int); 200 201 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 202 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 203 204 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 205 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 206 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 207 ehci_softc_t *, int, int, usbd_xfer_handle, 208 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 209 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 210 ehci_soft_qtd_t *); 211 212 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 213 214 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 215 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 216 ehci_soft_qh_t *); 217 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 218 Static void ehci_sync_hc(ehci_softc_t *); 219 220 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 221 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 222 223 #ifdef EHCI_DEBUG 224 Static void ehci_dump_regs(ehci_softc_t *); 225 Static void ehci_dump(void); 226 Static ehci_softc_t *theehci; 227 Static void ehci_dump_link(ehci_link_t, int); 228 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 229 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 230 Static void ehci_dump_qtd(ehci_qtd_t *); 231 Static void ehci_dump_sqh(ehci_soft_qh_t *); 232 #ifdef DIAGNOSTIC 233 Static void ehci_dump_exfer(struct ehci_xfer *); 234 #endif 235 #endif 236 237 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 238 239 #define EHCI_INTR_ENDPT 1 240 241 #define ehci_add_intr_list(sc, ex) \ 242 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 243 #define ehci_del_intr_list(ex) \ 244 do { \ 245 LIST_REMOVE((ex), inext); \ 246 (ex)->inext.le_prev = NULL; \ 247 } while (0) 248 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 249 250 Static struct usbd_bus_methods ehci_bus_methods = { 251 ehci_open, 252 ehci_softintr, 253 ehci_poll, 254 ehci_allocm, 255 ehci_freem, 256 ehci_allocx, 257 ehci_freex, 258 }; 259 260 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 261 ehci_root_ctrl_transfer, 262 ehci_root_ctrl_start, 263 ehci_root_ctrl_abort, 264 ehci_root_ctrl_close, 265 ehci_noop, 266 ehci_root_ctrl_done, 267 }; 268 269 Static struct usbd_pipe_methods ehci_root_intr_methods = { 270 ehci_root_intr_transfer, 271 ehci_root_intr_start, 272 ehci_root_intr_abort, 273 ehci_root_intr_close, 274 ehci_noop, 275 ehci_root_intr_done, 276 }; 277 278 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 279 ehci_device_ctrl_transfer, 280 ehci_device_ctrl_start, 281 ehci_device_ctrl_abort, 282 ehci_device_ctrl_close, 283 ehci_noop, 284 ehci_device_ctrl_done, 285 }; 286 287 Static struct usbd_pipe_methods ehci_device_intr_methods = { 288 ehci_device_intr_transfer, 289 ehci_device_intr_start, 290 ehci_device_intr_abort, 291 ehci_device_intr_close, 292 ehci_device_clear_toggle, 293 ehci_device_intr_done, 294 }; 295 296 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 297 ehci_device_bulk_transfer, 298 ehci_device_bulk_start, 299 ehci_device_bulk_abort, 300 ehci_device_bulk_close, 301 ehci_device_clear_toggle, 302 ehci_device_bulk_done, 303 }; 304 305 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 306 ehci_device_isoc_transfer, 307 ehci_device_isoc_start, 308 ehci_device_isoc_abort, 309 ehci_device_isoc_close, 310 ehci_noop, 311 ehci_device_isoc_done, 312 }; 313 314 usbd_status 315 ehci_init(ehci_softc_t *sc) 316 { 317 u_int32_t version, sparams, cparams, hcr; 318 u_int i; 319 usbd_status err; 320 ehci_soft_qh_t *sqh; 321 322 DPRINTF(("ehci_init: start\n")); 323 #ifdef EHCI_DEBUG 324 theehci = sc; 325 #endif 326 327 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 328 329 version = EREAD2(sc, EHCI_HCIVERSION); 330 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 331 version >> 8, version & 0xff); 332 333 sparams = EREAD4(sc, EHCI_HCSPARAMS); 334 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 335 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 336 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 337 aprint_error("%s: wrong number of companions (%d != %d)\n", 338 USBDEVNAME(sc->sc_bus.bdev), 339 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 340 #if NOHCI == 0 || NUHCI == 0 341 aprint_error("%s: ohci or uhci probably not configured\n", 342 USBDEVNAME(sc->sc_bus.bdev)); 343 #endif 344 return (USBD_IOERROR); 345 } 346 if (sc->sc_ncomp > 0) { 347 aprint_normal("%s: companion controller%s, %d port%s each:", 348 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 349 EHCI_HCS_N_PCC(sparams), 350 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 351 for (i = 0; i < sc->sc_ncomp; i++) 352 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 353 aprint_normal("\n"); 354 } 355 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 356 cparams = EREAD4(sc, EHCI_HCCPARAMS); 357 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 358 359 if (EHCI_HCC_64BIT(cparams)) { 360 /* MUST clear segment register if 64 bit capable. */ 361 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 362 } 363 364 sc->sc_bus.usbrev = USBREV_2_0; 365 366 /* Reset the controller */ 367 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 368 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 369 usb_delay_ms(&sc->sc_bus, 1); 370 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 371 for (i = 0; i < 100; i++) { 372 usb_delay_ms(&sc->sc_bus, 1); 373 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 374 if (!hcr) 375 break; 376 } 377 if (hcr) { 378 aprint_error("%s: reset timeout\n", 379 USBDEVNAME(sc->sc_bus.bdev)); 380 return (USBD_IOERROR); 381 } 382 383 /* frame list size at default, read back what we got and use that */ 384 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 385 case 0: sc->sc_flsize = 1024*4; break; 386 case 1: sc->sc_flsize = 512*4; break; 387 case 2: sc->sc_flsize = 256*4; break; 388 case 3: return (USBD_IOERROR); 389 } 390 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 391 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 392 if (err) 393 return (err); 394 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 395 396 /* Set up the bus struct. */ 397 sc->sc_bus.methods = &ehci_bus_methods; 398 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 399 400 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 401 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 402 403 sc->sc_eintrs = EHCI_NORMAL_INTRS; 404 405 /* Allocate dummy QH that starts the async list. */ 406 sqh = ehci_alloc_sqh(sc); 407 if (sqh == NULL) { 408 err = USBD_NOMEM; 409 goto bad1; 410 } 411 /* Fill the QH */ 412 sqh->qh.qh_endp = 413 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 414 sqh->qh.qh_link = 415 htole32(sqh->physaddr | EHCI_LINK_QH); 416 sqh->qh.qh_curqtd = EHCI_NULL; 417 sqh->next = NULL; 418 /* Fill the overlay qTD */ 419 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 420 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 421 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 422 sqh->sqtd = NULL; 423 #ifdef EHCI_DEBUG 424 if (ehcidebug) { 425 ehci_dump_sqh(sqh); 426 } 427 #endif 428 429 /* Point to async list */ 430 sc->sc_async_head = sqh; 431 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 432 433 usb_callout_init(sc->sc_tmo_pcd); 434 435 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 436 437 /* Enable interrupts */ 438 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 439 440 /* Turn on controller */ 441 EOWRITE4(sc, EHCI_USBCMD, 442 EHCI_CMD_ITC_8 | /* 8 microframes */ 443 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 444 EHCI_CMD_ASE | 445 /* EHCI_CMD_PSE | */ 446 EHCI_CMD_RS); 447 448 /* Take over port ownership */ 449 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 450 451 for (i = 0; i < 100; i++) { 452 usb_delay_ms(&sc->sc_bus, 1); 453 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 454 if (!hcr) 455 break; 456 } 457 if (hcr) { 458 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 459 return (USBD_IOERROR); 460 } 461 462 return (USBD_NORMAL_COMPLETION); 463 464 #if 0 465 bad2: 466 ehci_free_sqh(sc, sc->sc_async_head); 467 #endif 468 bad1: 469 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 470 return (err); 471 } 472 473 int 474 ehci_intr(void *v) 475 { 476 ehci_softc_t *sc = v; 477 478 if (sc == NULL || sc->sc_dying) 479 return (0); 480 481 /* If we get an interrupt while polling, then just ignore it. */ 482 if (sc->sc_bus.use_polling) { 483 #ifdef DIAGNOSTIC 484 printf("ehci_intr: ignored interrupt while polling\n"); 485 #endif 486 return (0); 487 } 488 489 return (ehci_intr1(sc)); 490 } 491 492 Static int 493 ehci_intr1(ehci_softc_t *sc) 494 { 495 u_int32_t intrs, eintrs; 496 497 DPRINTFN(20,("ehci_intr1: enter\n")); 498 499 /* In case the interrupt occurs before initialization has completed. */ 500 if (sc == NULL) { 501 #ifdef DIAGNOSTIC 502 printf("ehci_intr: sc == NULL\n"); 503 #endif 504 return (0); 505 } 506 507 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 508 509 if (!intrs) 510 return (0); 511 512 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 513 eintrs = intrs & sc->sc_eintrs; 514 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 515 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 516 (u_int)eintrs)); 517 if (!eintrs) 518 return (0); 519 520 sc->sc_bus.intr_context++; 521 sc->sc_bus.no_intrs++; 522 if (eintrs & EHCI_STS_IAA) { 523 DPRINTF(("ehci_intr1: door bell\n")); 524 wakeup(&sc->sc_async_head); 525 eintrs &= ~EHCI_STS_IAA; 526 } 527 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 528 DPRINTFN(5,("ehci_intr1: %s %s\n", 529 eintrs & EHCI_STS_INT ? "INT" : "", 530 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 531 usb_schedsoftintr(&sc->sc_bus); 532 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 533 } 534 if (eintrs & EHCI_STS_HSE) { 535 printf("%s: unrecoverable error, controller halted\n", 536 USBDEVNAME(sc->sc_bus.bdev)); 537 /* XXX what else */ 538 } 539 if (eintrs & EHCI_STS_PCD) { 540 ehci_pcd(sc, sc->sc_intrxfer); 541 /* 542 * Disable PCD interrupt for now, because it will be 543 * on until the port has been reset. 544 */ 545 ehci_pcd_able(sc, 0); 546 /* Do not allow RHSC interrupts > 1 per second */ 547 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 548 eintrs &= ~EHCI_STS_PCD; 549 } 550 551 sc->sc_bus.intr_context--; 552 553 if (eintrs != 0) { 554 /* Block unprocessed interrupts. */ 555 sc->sc_eintrs &= ~eintrs; 556 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 557 printf("%s: blocking intrs 0x%x\n", 558 USBDEVNAME(sc->sc_bus.bdev), eintrs); 559 } 560 561 return (1); 562 } 563 564 void 565 ehci_pcd_able(ehci_softc_t *sc, int on) 566 { 567 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 568 if (on) 569 sc->sc_eintrs |= EHCI_STS_PCD; 570 else 571 sc->sc_eintrs &= ~EHCI_STS_PCD; 572 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 573 } 574 575 void 576 ehci_pcd_enable(void *v_sc) 577 { 578 ehci_softc_t *sc = v_sc; 579 580 ehci_pcd_able(sc, 1); 581 } 582 583 void 584 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 585 { 586 usbd_pipe_handle pipe; 587 u_char *p; 588 int i, m; 589 590 if (xfer == NULL) { 591 /* Just ignore the change. */ 592 return; 593 } 594 595 pipe = xfer->pipe; 596 597 p = KERNADDR(&xfer->dmabuf, 0); 598 m = min(sc->sc_noport, xfer->length * 8 - 1); 599 memset(p, 0, xfer->length); 600 for (i = 1; i <= m; i++) { 601 /* Pick out CHANGE bits from the status reg. */ 602 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 603 p[i/8] |= 1 << (i%8); 604 } 605 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 606 xfer->actlen = xfer->length; 607 xfer->status = USBD_NORMAL_COMPLETION; 608 609 usb_transfer_complete(xfer); 610 } 611 612 void 613 ehci_softintr(void *v) 614 { 615 ehci_softc_t *sc = v; 616 struct ehci_xfer *ex, *nextex; 617 618 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 619 sc->sc_bus.intr_context)); 620 621 sc->sc_bus.intr_context++; 622 623 /* 624 * The only explanation I can think of for why EHCI is as brain dead 625 * as UHCI interrupt-wise is that Intel was involved in both. 626 * An interrupt just tells us that something is done, we have no 627 * clue what, so we need to scan through all active transfers. :-( 628 */ 629 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 630 nextex = LIST_NEXT(ex, inext); 631 ehci_check_intr(sc, ex); 632 } 633 634 if (sc->sc_softwake) { 635 sc->sc_softwake = 0; 636 wakeup(&sc->sc_softwake); 637 } 638 639 sc->sc_bus.intr_context--; 640 } 641 642 /* Check for an interrupt. */ 643 void 644 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 645 { 646 ehci_soft_qtd_t *sqtd, *lsqtd; 647 u_int32_t status; 648 649 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 650 651 if (ex->sqtdstart == NULL) { 652 printf("ehci_check_intr: sqtdstart=NULL\n"); 653 return; 654 } 655 lsqtd = ex->sqtdend; 656 #ifdef DIAGNOSTIC 657 if (lsqtd == NULL) { 658 printf("ehci_check_intr: sqtd==0\n"); 659 return; 660 } 661 #endif 662 /* 663 * If the last TD is still active we need to check whether there 664 * is a an error somewhere in the middle, or whether there was a 665 * short packet (SPD and not ACTIVE). 666 */ 667 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 668 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 669 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 670 status = le32toh(sqtd->qtd.qtd_status); 671 /* If there's an active QTD the xfer isn't done. */ 672 if (status & EHCI_QTD_ACTIVE) 673 break; 674 /* Any kind of error makes the xfer done. */ 675 if (status & EHCI_QTD_HALTED) 676 goto done; 677 /* We want short packets, and it is short: it's done */ 678 if (EHCI_QTD_SET_BYTES(status) != 0) 679 goto done; 680 } 681 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 682 ex, ex->sqtdstart)); 683 return; 684 } 685 done: 686 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 687 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 688 ehci_idone(ex); 689 } 690 691 void 692 ehci_idone(struct ehci_xfer *ex) 693 { 694 usbd_xfer_handle xfer = &ex->xfer; 695 #ifdef EHCI_DEBUG 696 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 697 #endif 698 ehci_soft_qtd_t *sqtd; 699 u_int32_t status = 0, nstatus; 700 int actlen; 701 702 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 703 #ifdef DIAGNOSTIC 704 { 705 int s = splhigh(); 706 if (ex->isdone) { 707 splx(s); 708 #ifdef EHCI_DEBUG 709 printf("ehci_idone: ex is done!\n "); 710 ehci_dump_exfer(ex); 711 #else 712 printf("ehci_idone: ex=%p is done!\n", ex); 713 #endif 714 return; 715 } 716 ex->isdone = 1; 717 splx(s); 718 } 719 #endif 720 721 if (xfer->status == USBD_CANCELLED || 722 xfer->status == USBD_TIMEOUT) { 723 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 724 return; 725 } 726 727 #ifdef EHCI_DEBUG 728 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 729 if (ehcidebug > 10) 730 ehci_dump_sqtds(ex->sqtdstart); 731 #endif 732 733 /* The transfer is done, compute actual length and status. */ 734 actlen = 0; 735 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 736 nstatus = le32toh(sqtd->qtd.qtd_status); 737 if (nstatus & EHCI_QTD_ACTIVE) 738 break; 739 740 status = nstatus; 741 /* halt is ok if descriptor is last, and complete */ 742 if (sqtd->qtd.qtd_next == EHCI_NULL && 743 EHCI_QTD_GET_BYTES(status) == 0) 744 status &= ~EHCI_QTD_HALTED; 745 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 746 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 747 } 748 749 /* If there are left over TDs we need to update the toggle. */ 750 if (sqtd != NULL) { 751 if (!(xfer->rqflags & URQ_REQUEST)) 752 printf("ehci_idone: need toggle update\n"); 753 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(status); 754 } 755 756 status &= EHCI_QTD_STATERRS; 757 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 758 xfer->length, actlen, status)); 759 xfer->actlen = actlen; 760 if (status != 0) { 761 #ifdef EHCI_DEBUG 762 char sbuf[128]; 763 764 bitmask_snprintf((u_int32_t)status, 765 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 766 "\7HALTED", 767 sbuf, sizeof(sbuf)); 768 769 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 770 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 771 "status 0x%s\n", 772 xfer->pipe->device->address, 773 xfer->pipe->endpoint->edesc->bEndpointAddress, 774 sbuf)); 775 if (ehcidebug > 2) { 776 ehci_dump_sqh(epipe->sqh); 777 ehci_dump_sqtds(ex->sqtdstart); 778 } 779 #endif 780 if (status == EHCI_QTD_HALTED) 781 xfer->status = USBD_STALLED; 782 else 783 xfer->status = USBD_IOERROR; /* more info XXX */ 784 } else { 785 xfer->status = USBD_NORMAL_COMPLETION; 786 } 787 788 usb_transfer_complete(xfer); 789 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 790 } 791 792 /* 793 * Wait here until controller claims to have an interrupt. 794 * Then call ehci_intr and return. Use timeout to avoid waiting 795 * too long. 796 */ 797 void 798 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 799 { 800 int timo = xfer->timeout; 801 int usecs; 802 u_int32_t intrs; 803 804 xfer->status = USBD_IN_PROGRESS; 805 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 806 usb_delay_ms(&sc->sc_bus, 1); 807 if (sc->sc_dying) 808 break; 809 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 810 sc->sc_eintrs; 811 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 812 #ifdef OHCI_DEBUG 813 if (ehcidebug > 15) 814 ehci_dump_regs(sc); 815 #endif 816 if (intrs) { 817 ehci_intr1(sc); 818 if (xfer->status != USBD_IN_PROGRESS) 819 return; 820 } 821 } 822 823 /* Timeout */ 824 DPRINTF(("ehci_waitintr: timeout\n")); 825 xfer->status = USBD_TIMEOUT; 826 usb_transfer_complete(xfer); 827 /* XXX should free TD */ 828 } 829 830 void 831 ehci_poll(struct usbd_bus *bus) 832 { 833 ehci_softc_t *sc = (ehci_softc_t *)bus; 834 #ifdef EHCI_DEBUG 835 static int last; 836 int new; 837 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 838 if (new != last) { 839 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 840 last = new; 841 } 842 #endif 843 844 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 845 ehci_intr1(sc); 846 } 847 848 int 849 ehci_detach(struct ehci_softc *sc, int flags) 850 { 851 int rv = 0; 852 853 if (sc->sc_child != NULL) 854 rv = config_detach(sc->sc_child, flags); 855 856 if (rv != 0) 857 return (rv); 858 859 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 860 861 if (sc->sc_powerhook != NULL) 862 powerhook_disestablish(sc->sc_powerhook); 863 if (sc->sc_shutdownhook != NULL) 864 shutdownhook_disestablish(sc->sc_shutdownhook); 865 866 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 867 868 /* XXX free other data structures XXX */ 869 870 return (rv); 871 } 872 873 874 int 875 ehci_activate(device_ptr_t self, enum devact act) 876 { 877 struct ehci_softc *sc = (struct ehci_softc *)self; 878 int rv = 0; 879 880 switch (act) { 881 case DVACT_ACTIVATE: 882 return (EOPNOTSUPP); 883 884 case DVACT_DEACTIVATE: 885 if (sc->sc_child != NULL) 886 rv = config_deactivate(sc->sc_child); 887 sc->sc_dying = 1; 888 break; 889 } 890 return (rv); 891 } 892 893 /* 894 * Handle suspend/resume. 895 * 896 * We need to switch to polling mode here, because this routine is 897 * called from an intterupt context. This is all right since we 898 * are almost suspended anyway. 899 */ 900 void 901 ehci_power(int why, void *v) 902 { 903 ehci_softc_t *sc = v; 904 //u_int32_t ctl; 905 int s; 906 907 #ifdef EHCI_DEBUG 908 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 909 ehci_dump_regs(sc); 910 #endif 911 912 s = splhardusb(); 913 switch (why) { 914 case PWR_SUSPEND: 915 case PWR_STANDBY: 916 sc->sc_bus.use_polling++; 917 #if 0 918 OOO 919 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 920 if (sc->sc_control == 0) { 921 /* 922 * Preserve register values, in case that APM BIOS 923 * does not recover them. 924 */ 925 sc->sc_control = ctl; 926 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 927 } 928 ctl |= EHCI_HCFS_SUSPEND; 929 OWRITE4(sc, EHCI_CONTROL, ctl); 930 #endif 931 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 932 sc->sc_bus.use_polling--; 933 break; 934 case PWR_RESUME: 935 sc->sc_bus.use_polling++; 936 #if 0 937 OOO 938 /* Some broken BIOSes do not recover these values */ 939 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 940 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 941 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 942 if (sc->sc_intre) 943 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 944 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 945 if (sc->sc_control) 946 ctl = sc->sc_control; 947 else 948 ctl = OREAD4(sc, EHCI_CONTROL); 949 ctl |= EHCI_HCFS_RESUME; 950 OWRITE4(sc, EHCI_CONTROL, ctl); 951 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 952 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 953 OWRITE4(sc, EHCI_CONTROL, ctl); 954 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 955 sc->sc_control = sc->sc_intre = 0; 956 #endif 957 sc->sc_bus.use_polling--; 958 break; 959 case PWR_SOFTSUSPEND: 960 case PWR_SOFTSTANDBY: 961 case PWR_SOFTRESUME: 962 break; 963 } 964 splx(s); 965 } 966 967 /* 968 * Shut down the controller when the system is going down. 969 */ 970 void 971 ehci_shutdown(void *v) 972 { 973 ehci_softc_t *sc = v; 974 975 DPRINTF(("ehci_shutdown: stopping the HC\n")); 976 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 977 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 978 } 979 980 usbd_status 981 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 982 { 983 struct ehci_softc *sc = (struct ehci_softc *)bus; 984 usbd_status err; 985 986 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 987 #ifdef EHCI_DEBUG 988 if (err) 989 printf("ehci_allocm: usb_allocmem()=%d\n", err); 990 #endif 991 return (err); 992 } 993 994 void 995 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 996 { 997 struct ehci_softc *sc = (struct ehci_softc *)bus; 998 999 usb_freemem(&sc->sc_bus, dma); 1000 } 1001 1002 usbd_xfer_handle 1003 ehci_allocx(struct usbd_bus *bus) 1004 { 1005 struct ehci_softc *sc = (struct ehci_softc *)bus; 1006 usbd_xfer_handle xfer; 1007 1008 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1009 if (xfer != NULL) { 1010 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1011 #ifdef DIAGNOSTIC 1012 if (xfer->busy_free != XFER_FREE) { 1013 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1014 xfer->busy_free); 1015 } 1016 #endif 1017 } else { 1018 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1019 } 1020 if (xfer != NULL) { 1021 memset(xfer, 0, sizeof (struct ehci_xfer)); 1022 #ifdef DIAGNOSTIC 1023 EXFER(xfer)->isdone = 1; 1024 xfer->busy_free = XFER_BUSY; 1025 #endif 1026 } 1027 return (xfer); 1028 } 1029 1030 void 1031 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1032 { 1033 struct ehci_softc *sc = (struct ehci_softc *)bus; 1034 1035 #ifdef DIAGNOSTIC 1036 if (xfer->busy_free != XFER_BUSY) { 1037 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1038 xfer->busy_free); 1039 return; 1040 } 1041 xfer->busy_free = XFER_FREE; 1042 if (!EXFER(xfer)->isdone) { 1043 printf("ehci_freex: !isdone\n"); 1044 return; 1045 } 1046 #endif 1047 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1048 } 1049 1050 Static void 1051 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1052 { 1053 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1054 1055 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1056 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1057 #ifdef USB_DEBUG 1058 if (ehcidebug) 1059 usbd_dump_pipe(pipe); 1060 #endif 1061 epipe->nexttoggle = 0; 1062 } 1063 1064 Static void 1065 ehci_noop(usbd_pipe_handle pipe) 1066 { 1067 } 1068 1069 #ifdef EHCI_DEBUG 1070 void 1071 ehci_dump_regs(ehci_softc_t *sc) 1072 { 1073 int i; 1074 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1075 EOREAD4(sc, EHCI_USBCMD), 1076 EOREAD4(sc, EHCI_USBSTS), 1077 EOREAD4(sc, EHCI_USBINTR)); 1078 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1079 EOREAD4(sc, EHCI_FRINDEX), 1080 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1081 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1082 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1083 for (i = 1; i <= sc->sc_noport; i++) 1084 printf("port %d status=0x%08x\n", i, 1085 EOREAD4(sc, EHCI_PORTSC(i))); 1086 } 1087 1088 /* 1089 * Unused function - this is meant to be called from a kernel 1090 * debugger. 1091 */ 1092 void 1093 ehci_dump() 1094 { 1095 ehci_dump_regs(theehci); 1096 } 1097 1098 void 1099 ehci_dump_link(ehci_link_t link, int type) 1100 { 1101 link = le32toh(link); 1102 printf("0x%08x", link); 1103 if (link & EHCI_LINK_TERMINATE) 1104 printf("<T>"); 1105 else { 1106 printf("<"); 1107 if (type) { 1108 switch (EHCI_LINK_TYPE(link)) { 1109 case EHCI_LINK_ITD: printf("ITD"); break; 1110 case EHCI_LINK_QH: printf("QH"); break; 1111 case EHCI_LINK_SITD: printf("SITD"); break; 1112 case EHCI_LINK_FSTN: printf("FSTN"); break; 1113 } 1114 } 1115 printf(">"); 1116 } 1117 } 1118 1119 void 1120 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1121 { 1122 int i; 1123 u_int32_t stop; 1124 1125 stop = 0; 1126 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1127 ehci_dump_sqtd(sqtd); 1128 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1129 } 1130 if (sqtd) 1131 printf("dump aborted, too many TDs\n"); 1132 } 1133 1134 void 1135 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1136 { 1137 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1138 ehci_dump_qtd(&sqtd->qtd); 1139 } 1140 1141 void 1142 ehci_dump_qtd(ehci_qtd_t *qtd) 1143 { 1144 u_int32_t s; 1145 char sbuf[128]; 1146 1147 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1148 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1149 printf("\n"); 1150 s = le32toh(qtd->qtd_status); 1151 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1152 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1153 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1154 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1155 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1156 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1157 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1158 EHCI_QTD_GET_PID(s), sbuf); 1159 for (s = 0; s < 5; s++) 1160 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1161 } 1162 1163 void 1164 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1165 { 1166 ehci_qh_t *qh = &sqh->qh; 1167 u_int32_t endp, endphub; 1168 1169 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1170 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1171 endp = le32toh(qh->qh_endp); 1172 printf(" endp=0x%08x\n", endp); 1173 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1174 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1175 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1176 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1177 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1178 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1179 EHCI_QH_GET_NRL(endp)); 1180 endphub = le32toh(qh->qh_endphub); 1181 printf(" endphub=0x%08x\n", endphub); 1182 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1183 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1184 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1185 EHCI_QH_GET_MULT(endphub)); 1186 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1187 printf("Overlay qTD:\n"); 1188 ehci_dump_qtd(&qh->qh_qtd); 1189 } 1190 1191 #ifdef DIAGNOSTIC 1192 Static void 1193 ehci_dump_exfer(struct ehci_xfer *ex) 1194 { 1195 printf("ehci_dump_exfer: ex=%p\n", ex); 1196 } 1197 #endif 1198 #endif 1199 1200 usbd_status 1201 ehci_open(usbd_pipe_handle pipe) 1202 { 1203 usbd_device_handle dev = pipe->device; 1204 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1205 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1206 u_int8_t addr = dev->address; 1207 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1208 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1209 ehci_soft_qh_t *sqh; 1210 usbd_status err; 1211 int s; 1212 int speed, naks; 1213 1214 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1215 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1216 1217 if (sc->sc_dying) 1218 return (USBD_IOERROR); 1219 1220 epipe->nexttoggle = 0; 1221 1222 if (addr == sc->sc_addr) { 1223 switch (ed->bEndpointAddress) { 1224 case USB_CONTROL_ENDPOINT: 1225 pipe->methods = &ehci_root_ctrl_methods; 1226 break; 1227 case UE_DIR_IN | EHCI_INTR_ENDPT: 1228 pipe->methods = &ehci_root_intr_methods; 1229 break; 1230 default: 1231 return (USBD_INVAL); 1232 } 1233 return (USBD_NORMAL_COMPLETION); 1234 } 1235 1236 /* XXX All this stuff is only valid for async. */ 1237 switch (dev->speed) { 1238 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1239 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1240 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1241 default: panic("ehci_open: bad device speed %d", dev->speed); 1242 } 1243 naks = 8; /* XXX */ 1244 sqh = ehci_alloc_sqh(sc); 1245 if (sqh == NULL) 1246 goto bad0; 1247 /* qh_link filled when the QH is added */ 1248 sqh->qh.qh_endp = htole32( 1249 EHCI_QH_SET_ADDR(addr) | 1250 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1251 EHCI_QH_SET_EPS(speed) | 1252 EHCI_QH_DTC | 1253 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1254 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1255 EHCI_QH_CTL : 0) | 1256 EHCI_QH_SET_NRL(naks) 1257 ); 1258 printf("sqh=%p endp=%08x\n", sqh, sqh->qh.qh_endp); 1259 sqh->qh.qh_endphub = htole32( 1260 EHCI_QH_SET_MULT(1) 1261 /* XXX TT stuff */ 1262 /* XXX interrupt mask */ 1263 ); 1264 sqh->qh.qh_curqtd = EHCI_NULL; 1265 /* Fill the overlay qTD */ 1266 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1267 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1268 sqh->qh.qh_qtd.qtd_status = htole32(0); 1269 1270 epipe->sqh = sqh; 1271 1272 switch (xfertype) { 1273 case UE_CONTROL: 1274 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1275 0, &epipe->u.ctl.reqdma); 1276 #ifdef EHCI_DEBUG 1277 if (err) 1278 printf("ehci_open: usb_allocmem()=%d\n", err); 1279 #endif 1280 if (err) 1281 goto bad1; 1282 pipe->methods = &ehci_device_ctrl_methods; 1283 s = splusb(); 1284 ehci_add_qh(sqh, sc->sc_async_head); 1285 splx(s); 1286 break; 1287 case UE_BULK: 1288 pipe->methods = &ehci_device_bulk_methods; 1289 s = splusb(); 1290 ehci_add_qh(sqh, sc->sc_async_head); 1291 splx(s); 1292 break; 1293 case UE_INTERRUPT: 1294 pipe->methods = &ehci_device_intr_methods; 1295 return (USBD_INVAL); 1296 case UE_ISOCHRONOUS: 1297 pipe->methods = &ehci_device_isoc_methods; 1298 return (USBD_INVAL); 1299 default: 1300 return (USBD_INVAL); 1301 } 1302 return (USBD_NORMAL_COMPLETION); 1303 1304 bad1: 1305 ehci_free_sqh(sc, sqh); 1306 bad0: 1307 return (USBD_NOMEM); 1308 } 1309 1310 /* 1311 * Add an ED to the schedule. Called at splusb(). 1312 */ 1313 void 1314 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1315 { 1316 SPLUSBCHECK; 1317 1318 sqh->next = head->next; 1319 sqh->qh.qh_link = head->qh.qh_link; 1320 head->next = sqh; 1321 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1322 1323 #ifdef EHCI_DEBUG 1324 if (ehcidebug > 5) { 1325 printf("ehci_add_qh:\n"); 1326 ehci_dump_sqh(sqh); 1327 } 1328 #endif 1329 } 1330 1331 /* 1332 * Remove an ED from the schedule. Called at splusb(). 1333 */ 1334 void 1335 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1336 { 1337 ehci_soft_qh_t *p; 1338 1339 SPLUSBCHECK; 1340 /* XXX */ 1341 for (p = head; p != NULL && p->next != sqh; p = p->next) 1342 ; 1343 if (p == NULL) 1344 panic("ehci_rem_qh: ED not found"); 1345 p->next = sqh->next; 1346 p->qh.qh_link = sqh->qh.qh_link; 1347 1348 ehci_sync_hc(sc); 1349 } 1350 1351 void 1352 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1353 { 1354 /* Halt while we are messing. */ 1355 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1356 sqh->qh.qh_curqtd = 0; 1357 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1358 sqh->sqtd = sqtd; 1359 /* Keep toggle, clear the rest, including length. */ 1360 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1361 } 1362 1363 /* 1364 * Ensure that the HC has released all references to the QH. We do this 1365 * by asking for a Async Advance Doorbell interrupt and then we wait for 1366 * the interrupt. 1367 * To make this easier we first obtain exclusive use of the doorbell. 1368 */ 1369 void 1370 ehci_sync_hc(ehci_softc_t *sc) 1371 { 1372 int s, error; 1373 1374 if (sc->sc_dying) { 1375 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1376 return; 1377 } 1378 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1379 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1380 s = splhardusb(); 1381 /* ask for doorbell */ 1382 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1383 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1384 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1385 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1386 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1387 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1388 splx(s); 1389 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1390 #ifdef DIAGNOSTIC 1391 if (error) 1392 printf("ehci_sync_hc: tsleep() = %d\n", error); 1393 #endif 1394 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1395 } 1396 1397 /***********/ 1398 1399 /* 1400 * Data structures and routines to emulate the root hub. 1401 */ 1402 Static usb_device_descriptor_t ehci_devd = { 1403 USB_DEVICE_DESCRIPTOR_SIZE, 1404 UDESC_DEVICE, /* type */ 1405 {0x00, 0x02}, /* USB version */ 1406 UDCLASS_HUB, /* class */ 1407 UDSUBCLASS_HUB, /* subclass */ 1408 UDPROTO_HSHUBSTT, /* protocol */ 1409 64, /* max packet */ 1410 {0},{0},{0x00,0x01}, /* device id */ 1411 1,2,0, /* string indicies */ 1412 1 /* # of configurations */ 1413 }; 1414 1415 Static usb_device_qualifier_t ehci_odevd = { 1416 USB_DEVICE_DESCRIPTOR_SIZE, 1417 UDESC_DEVICE_QUALIFIER, /* type */ 1418 {0x00, 0x02}, /* USB version */ 1419 UDCLASS_HUB, /* class */ 1420 UDSUBCLASS_HUB, /* subclass */ 1421 UDPROTO_FSHUB, /* protocol */ 1422 64, /* max packet */ 1423 1, /* # of configurations */ 1424 0 1425 }; 1426 1427 Static usb_config_descriptor_t ehci_confd = { 1428 USB_CONFIG_DESCRIPTOR_SIZE, 1429 UDESC_CONFIG, 1430 {USB_CONFIG_DESCRIPTOR_SIZE + 1431 USB_INTERFACE_DESCRIPTOR_SIZE + 1432 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1433 1, 1434 1, 1435 0, 1436 UC_SELF_POWERED, 1437 0 /* max power */ 1438 }; 1439 1440 Static usb_interface_descriptor_t ehci_ifcd = { 1441 USB_INTERFACE_DESCRIPTOR_SIZE, 1442 UDESC_INTERFACE, 1443 0, 1444 0, 1445 1, 1446 UICLASS_HUB, 1447 UISUBCLASS_HUB, 1448 UIPROTO_HSHUBSTT, 1449 0 1450 }; 1451 1452 Static usb_endpoint_descriptor_t ehci_endpd = { 1453 USB_ENDPOINT_DESCRIPTOR_SIZE, 1454 UDESC_ENDPOINT, 1455 UE_DIR_IN | EHCI_INTR_ENDPT, 1456 UE_INTERRUPT, 1457 {8, 0}, /* max packet */ 1458 255 1459 }; 1460 1461 Static usb_hub_descriptor_t ehci_hubd = { 1462 USB_HUB_DESCRIPTOR_SIZE, 1463 UDESC_HUB, 1464 0, 1465 {0,0}, 1466 0, 1467 0, 1468 {0}, 1469 }; 1470 1471 Static int 1472 ehci_str(p, l, s) 1473 usb_string_descriptor_t *p; 1474 int l; 1475 char *s; 1476 { 1477 int i; 1478 1479 if (l == 0) 1480 return (0); 1481 p->bLength = 2 * strlen(s) + 2; 1482 if (l == 1) 1483 return (1); 1484 p->bDescriptorType = UDESC_STRING; 1485 l -= 2; 1486 for (i = 0; s[i] && l > 1; i++, l -= 2) 1487 USETW2(p->bString[i], 0, s[i]); 1488 return (2*i+2); 1489 } 1490 1491 /* 1492 * Simulate a hardware hub by handling all the necessary requests. 1493 */ 1494 Static usbd_status 1495 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1496 { 1497 usbd_status err; 1498 1499 /* Insert last in queue. */ 1500 err = usb_insert_transfer(xfer); 1501 if (err) 1502 return (err); 1503 1504 /* Pipe isn't running, start first */ 1505 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1506 } 1507 1508 Static usbd_status 1509 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1510 { 1511 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1512 usb_device_request_t *req; 1513 void *buf = NULL; 1514 int port, i; 1515 int s, len, value, index, l, totlen = 0; 1516 usb_port_status_t ps; 1517 usb_hub_descriptor_t hubd; 1518 usbd_status err; 1519 u_int32_t v; 1520 1521 if (sc->sc_dying) 1522 return (USBD_IOERROR); 1523 1524 #ifdef DIAGNOSTIC 1525 if (!(xfer->rqflags & URQ_REQUEST)) 1526 /* XXX panic */ 1527 return (USBD_INVAL); 1528 #endif 1529 req = &xfer->request; 1530 1531 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1532 req->bmRequestType, req->bRequest)); 1533 1534 len = UGETW(req->wLength); 1535 value = UGETW(req->wValue); 1536 index = UGETW(req->wIndex); 1537 1538 if (len != 0) 1539 buf = KERNADDR(&xfer->dmabuf, 0); 1540 1541 #define C(x,y) ((x) | ((y) << 8)) 1542 switch(C(req->bRequest, req->bmRequestType)) { 1543 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1544 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1545 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1546 /* 1547 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1548 * for the integrated root hub. 1549 */ 1550 break; 1551 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1552 if (len > 0) { 1553 *(u_int8_t *)buf = sc->sc_conf; 1554 totlen = 1; 1555 } 1556 break; 1557 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1558 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1559 switch(value >> 8) { 1560 case UDESC_DEVICE: 1561 if ((value & 0xff) != 0) { 1562 err = USBD_IOERROR; 1563 goto ret; 1564 } 1565 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1566 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1567 memcpy(buf, &ehci_devd, l); 1568 break; 1569 /* 1570 * We can't really operate at another speed, but the spec says 1571 * we need this descriptor. 1572 */ 1573 case UDESC_DEVICE_QUALIFIER: 1574 if ((value & 0xff) != 0) { 1575 err = USBD_IOERROR; 1576 goto ret; 1577 } 1578 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1579 memcpy(buf, &ehci_odevd, l); 1580 break; 1581 /* 1582 * We can't really operate at another speed, but the spec says 1583 * we need this descriptor. 1584 */ 1585 case UDESC_OTHER_SPEED_CONFIGURATION: 1586 case UDESC_CONFIG: 1587 if ((value & 0xff) != 0) { 1588 err = USBD_IOERROR; 1589 goto ret; 1590 } 1591 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1592 memcpy(buf, &ehci_confd, l); 1593 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1594 value >> 8; 1595 buf = (char *)buf + l; 1596 len -= l; 1597 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1598 totlen += l; 1599 memcpy(buf, &ehci_ifcd, l); 1600 buf = (char *)buf + l; 1601 len -= l; 1602 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1603 totlen += l; 1604 memcpy(buf, &ehci_endpd, l); 1605 break; 1606 case UDESC_STRING: 1607 if (len == 0) 1608 break; 1609 *(u_int8_t *)buf = 0; 1610 totlen = 1; 1611 switch (value & 0xff) { 1612 case 1: /* Vendor */ 1613 totlen = ehci_str(buf, len, sc->sc_vendor); 1614 break; 1615 case 2: /* Product */ 1616 totlen = ehci_str(buf, len, "EHCI root hub"); 1617 break; 1618 } 1619 break; 1620 default: 1621 err = USBD_IOERROR; 1622 goto ret; 1623 } 1624 break; 1625 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1626 if (len > 0) { 1627 *(u_int8_t *)buf = 0; 1628 totlen = 1; 1629 } 1630 break; 1631 case C(UR_GET_STATUS, UT_READ_DEVICE): 1632 if (len > 1) { 1633 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1634 totlen = 2; 1635 } 1636 break; 1637 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1638 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1639 if (len > 1) { 1640 USETW(((usb_status_t *)buf)->wStatus, 0); 1641 totlen = 2; 1642 } 1643 break; 1644 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1645 if (value >= USB_MAX_DEVICES) { 1646 err = USBD_IOERROR; 1647 goto ret; 1648 } 1649 sc->sc_addr = value; 1650 break; 1651 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1652 if (value != 0 && value != 1) { 1653 err = USBD_IOERROR; 1654 goto ret; 1655 } 1656 sc->sc_conf = value; 1657 break; 1658 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1659 break; 1660 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1661 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1662 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1663 err = USBD_IOERROR; 1664 goto ret; 1665 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1666 break; 1667 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1668 break; 1669 /* Hub requests */ 1670 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1671 break; 1672 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1673 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1674 "port=%d feature=%d\n", 1675 index, value)); 1676 if (index < 1 || index > sc->sc_noport) { 1677 err = USBD_IOERROR; 1678 goto ret; 1679 } 1680 port = EHCI_PORTSC(index); 1681 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1682 switch(value) { 1683 case UHF_PORT_ENABLE: 1684 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1685 break; 1686 case UHF_PORT_SUSPEND: 1687 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1688 break; 1689 case UHF_PORT_POWER: 1690 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1691 break; 1692 case UHF_PORT_TEST: 1693 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1694 "%d\n", index)); 1695 break; 1696 case UHF_PORT_INDICATOR: 1697 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1698 "%d\n", index)); 1699 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1700 break; 1701 case UHF_C_PORT_CONNECTION: 1702 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1703 break; 1704 case UHF_C_PORT_ENABLE: 1705 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1706 break; 1707 case UHF_C_PORT_SUSPEND: 1708 /* how? */ 1709 break; 1710 case UHF_C_PORT_OVER_CURRENT: 1711 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1712 break; 1713 case UHF_C_PORT_RESET: 1714 sc->sc_isreset = 0; 1715 break; 1716 default: 1717 err = USBD_IOERROR; 1718 goto ret; 1719 } 1720 #if 0 1721 switch(value) { 1722 case UHF_C_PORT_CONNECTION: 1723 case UHF_C_PORT_ENABLE: 1724 case UHF_C_PORT_SUSPEND: 1725 case UHF_C_PORT_OVER_CURRENT: 1726 case UHF_C_PORT_RESET: 1727 /* Enable RHSC interrupt if condition is cleared. */ 1728 if ((OREAD4(sc, port) >> 16) == 0) 1729 ehci_pcd_able(sc, 1); 1730 break; 1731 default: 1732 break; 1733 } 1734 #endif 1735 break; 1736 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1737 if ((value & 0xff) != 0) { 1738 err = USBD_IOERROR; 1739 goto ret; 1740 } 1741 hubd = ehci_hubd; 1742 hubd.bNbrPorts = sc->sc_noport; 1743 v = EOREAD4(sc, EHCI_HCSPARAMS); 1744 USETW(hubd.wHubCharacteristics, 1745 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1746 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1747 ? UHD_PORT_IND : 0); 1748 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1749 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1750 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1751 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1752 l = min(len, hubd.bDescLength); 1753 totlen = l; 1754 memcpy(buf, &hubd, l); 1755 break; 1756 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1757 if (len != 4) { 1758 err = USBD_IOERROR; 1759 goto ret; 1760 } 1761 memset(buf, 0, len); /* ? XXX */ 1762 totlen = len; 1763 break; 1764 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1765 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1766 index)); 1767 if (index < 1 || index > sc->sc_noport) { 1768 err = USBD_IOERROR; 1769 goto ret; 1770 } 1771 if (len != 4) { 1772 err = USBD_IOERROR; 1773 goto ret; 1774 } 1775 v = EOREAD4(sc, EHCI_PORTSC(index)); 1776 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1777 v)); 1778 i = UPS_HIGH_SPEED; 1779 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1780 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1781 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1782 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1783 if (v & EHCI_PS_PR) i |= UPS_RESET; 1784 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1785 USETW(ps.wPortStatus, i); 1786 i = 0; 1787 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1788 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1789 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1790 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1791 USETW(ps.wPortChange, i); 1792 l = min(len, sizeof ps); 1793 memcpy(buf, &ps, l); 1794 totlen = l; 1795 break; 1796 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1797 err = USBD_IOERROR; 1798 goto ret; 1799 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1800 break; 1801 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1802 if (index < 1 || index > sc->sc_noport) { 1803 err = USBD_IOERROR; 1804 goto ret; 1805 } 1806 port = EHCI_PORTSC(index); 1807 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1808 switch(value) { 1809 case UHF_PORT_ENABLE: 1810 EOWRITE4(sc, port, v | EHCI_PS_PE); 1811 break; 1812 case UHF_PORT_SUSPEND: 1813 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1814 break; 1815 case UHF_PORT_RESET: 1816 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1817 index)); 1818 if (EHCI_PS_IS_LOWSPEED(v)) { 1819 /* Low speed device, give up ownership. */ 1820 ehci_disown(sc, index, 1); 1821 break; 1822 } 1823 /* Start reset sequence. */ 1824 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1825 EOWRITE4(sc, port, v | EHCI_PS_PR); 1826 /* Wait for reset to complete. */ 1827 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1828 if (sc->sc_dying) { 1829 err = USBD_IOERROR; 1830 goto ret; 1831 } 1832 /* Terminate reset sequence. */ 1833 EOWRITE4(sc, port, v); 1834 /* Wait for HC to complete reset. */ 1835 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1836 if (sc->sc_dying) { 1837 err = USBD_IOERROR; 1838 goto ret; 1839 } 1840 v = EOREAD4(sc, port); 1841 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1842 if (v & EHCI_PS_PR) { 1843 printf("%s: port reset timeout\n", 1844 USBDEVNAME(sc->sc_bus.bdev)); 1845 return (USBD_TIMEOUT); 1846 } 1847 if (!(v & EHCI_PS_PE)) { 1848 /* Not a high speed device, give up ownership.*/ 1849 ehci_disown(sc, index, 0); 1850 break; 1851 } 1852 sc->sc_isreset = 1; 1853 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1854 index, v)); 1855 break; 1856 case UHF_PORT_POWER: 1857 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1858 "%d\n", index)); 1859 EOWRITE4(sc, port, v | EHCI_PS_PP); 1860 break; 1861 case UHF_PORT_TEST: 1862 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1863 "%d\n", index)); 1864 break; 1865 case UHF_PORT_INDICATOR: 1866 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1867 "%d\n", index)); 1868 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1869 break; 1870 default: 1871 err = USBD_IOERROR; 1872 goto ret; 1873 } 1874 break; 1875 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1876 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1877 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1878 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1879 break; 1880 default: 1881 err = USBD_IOERROR; 1882 goto ret; 1883 } 1884 xfer->actlen = totlen; 1885 err = USBD_NORMAL_COMPLETION; 1886 ret: 1887 xfer->status = err; 1888 s = splusb(); 1889 usb_transfer_complete(xfer); 1890 splx(s); 1891 return (USBD_IN_PROGRESS); 1892 } 1893 1894 void 1895 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1896 { 1897 int port; 1898 u_int32_t v; 1899 1900 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1901 #ifdef DIAGNOSTIC 1902 if (sc->sc_npcomp != 0) { 1903 int i = (index-1) / sc->sc_npcomp; 1904 if (i >= sc->sc_ncomp) 1905 printf("%s: strange port\n", 1906 USBDEVNAME(sc->sc_bus.bdev)); 1907 else 1908 printf("%s: handing over %s speed device on " 1909 "port %d to %s\n", 1910 USBDEVNAME(sc->sc_bus.bdev), 1911 lowspeed ? "low" : "full", 1912 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1913 } else { 1914 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1915 } 1916 #endif 1917 port = EHCI_PORTSC(index); 1918 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1919 EOWRITE4(sc, port, v | EHCI_PS_PO); 1920 } 1921 1922 /* Abort a root control request. */ 1923 Static void 1924 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1925 { 1926 /* Nothing to do, all transfers are synchronous. */ 1927 } 1928 1929 /* Close the root pipe. */ 1930 Static void 1931 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1932 { 1933 DPRINTF(("ehci_root_ctrl_close\n")); 1934 /* Nothing to do. */ 1935 } 1936 1937 void 1938 ehci_root_intr_done(usbd_xfer_handle xfer) 1939 { 1940 xfer->hcpriv = NULL; 1941 } 1942 1943 Static usbd_status 1944 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1945 { 1946 usbd_status err; 1947 1948 /* Insert last in queue. */ 1949 err = usb_insert_transfer(xfer); 1950 if (err) 1951 return (err); 1952 1953 /* Pipe isn't running, start first */ 1954 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1955 } 1956 1957 Static usbd_status 1958 ehci_root_intr_start(usbd_xfer_handle xfer) 1959 { 1960 usbd_pipe_handle pipe = xfer->pipe; 1961 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1962 1963 if (sc->sc_dying) 1964 return (USBD_IOERROR); 1965 1966 sc->sc_intrxfer = xfer; 1967 1968 return (USBD_IN_PROGRESS); 1969 } 1970 1971 /* Abort a root interrupt request. */ 1972 Static void 1973 ehci_root_intr_abort(usbd_xfer_handle xfer) 1974 { 1975 int s; 1976 1977 if (xfer->pipe->intrxfer == xfer) { 1978 DPRINTF(("ehci_root_intr_abort: remove\n")); 1979 xfer->pipe->intrxfer = NULL; 1980 } 1981 xfer->status = USBD_CANCELLED; 1982 s = splusb(); 1983 usb_transfer_complete(xfer); 1984 splx(s); 1985 } 1986 1987 /* Close the root pipe. */ 1988 Static void 1989 ehci_root_intr_close(usbd_pipe_handle pipe) 1990 { 1991 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1992 1993 DPRINTF(("ehci_root_intr_close\n")); 1994 1995 sc->sc_intrxfer = NULL; 1996 } 1997 1998 void 1999 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2000 { 2001 xfer->hcpriv = NULL; 2002 } 2003 2004 /************************/ 2005 2006 ehci_soft_qh_t * 2007 ehci_alloc_sqh(ehci_softc_t *sc) 2008 { 2009 ehci_soft_qh_t *sqh; 2010 usbd_status err; 2011 int i, offs; 2012 usb_dma_t dma; 2013 2014 if (sc->sc_freeqhs == NULL) { 2015 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2016 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2017 EHCI_PAGE_SIZE, &dma); 2018 #ifdef EHCI_DEBUG 2019 if (err) 2020 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2021 #endif 2022 if (err) 2023 return (NULL); 2024 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2025 offs = i * EHCI_SQH_SIZE; 2026 sqh = KERNADDR(&dma, offs); 2027 sqh->physaddr = DMAADDR(&dma, offs); 2028 sqh->next = sc->sc_freeqhs; 2029 sc->sc_freeqhs = sqh; 2030 } 2031 } 2032 sqh = sc->sc_freeqhs; 2033 sc->sc_freeqhs = sqh->next; 2034 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2035 sqh->next = NULL; 2036 return (sqh); 2037 } 2038 2039 void 2040 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2041 { 2042 sqh->next = sc->sc_freeqhs; 2043 sc->sc_freeqhs = sqh; 2044 } 2045 2046 ehci_soft_qtd_t * 2047 ehci_alloc_sqtd(ehci_softc_t *sc) 2048 { 2049 ehci_soft_qtd_t *sqtd; 2050 usbd_status err; 2051 int i, offs; 2052 usb_dma_t dma; 2053 int s; 2054 2055 if (sc->sc_freeqtds == NULL) { 2056 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2057 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2058 EHCI_PAGE_SIZE, &dma); 2059 #ifdef EHCI_DEBUG 2060 if (err) 2061 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2062 #endif 2063 if (err) 2064 return (NULL); 2065 s = splusb(); 2066 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2067 offs = i * EHCI_SQTD_SIZE; 2068 sqtd = KERNADDR(&dma, offs); 2069 sqtd->physaddr = DMAADDR(&dma, offs); 2070 sqtd->nextqtd = sc->sc_freeqtds; 2071 sc->sc_freeqtds = sqtd; 2072 } 2073 splx(s); 2074 } 2075 2076 s = splusb(); 2077 sqtd = sc->sc_freeqtds; 2078 sc->sc_freeqtds = sqtd->nextqtd; 2079 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2080 sqtd->nextqtd = NULL; 2081 sqtd->xfer = NULL; 2082 splx(s); 2083 2084 return (sqtd); 2085 } 2086 2087 void 2088 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2089 { 2090 int s; 2091 2092 s = splusb(); 2093 sqtd->nextqtd = sc->sc_freeqtds; 2094 sc->sc_freeqtds = sqtd; 2095 splx(s); 2096 } 2097 2098 usbd_status 2099 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2100 int alen, int rd, usbd_xfer_handle xfer, 2101 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2102 { 2103 ehci_soft_qtd_t *next, *cur; 2104 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2105 u_int32_t qtdstatus; 2106 int len, curlen, mps; 2107 int i, tog; 2108 usb_dma_t *dma = &xfer->dmabuf; 2109 2110 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2111 2112 len = alen; 2113 dataphys = DMAADDR(dma, 0); 2114 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2115 #if 0 2116 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2117 epipe->nexttoggle); 2118 #endif 2119 qtdstatus = htole32( 2120 EHCI_QTD_ACTIVE | 2121 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2122 EHCI_QTD_SET_CERR(3) 2123 /* IOC set below */ 2124 /* BYTES set below */ 2125 ); 2126 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2127 tog = epipe->nexttoggle; 2128 if (tog) 2129 qtdstatus |= EHCI_QTD_TOGGLE; 2130 2131 cur = ehci_alloc_sqtd(sc); 2132 *sp = cur; 2133 if (cur == NULL) 2134 goto nomem; 2135 for (;;) { 2136 dataphyspage = EHCI_PAGE(dataphys); 2137 /* The EHCI hardware can handle at most 5 pages. */ 2138 if (dataphyslastpage - dataphyspage < 2139 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2140 /* we can handle it in this QTD */ 2141 curlen = len; 2142 } else { 2143 /* must use multiple TDs, fill as much as possible. */ 2144 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2145 EHCI_PAGE_OFFSET(dataphys); 2146 #ifdef DIAGNOSTIC 2147 if (curlen > len) { 2148 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2149 "len=0x%x offs=0x%x\n", curlen, len, 2150 EHCI_PAGE_OFFSET(dataphys)); 2151 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2152 dataphyslastpage, dataphyspage, 2153 dataphys); 2154 curlen = len; 2155 } 2156 #endif 2157 /* the length must be a multiple of the max size */ 2158 curlen -= curlen % mps; 2159 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2160 "curlen=%d\n", curlen)); 2161 #ifdef DIAGNOSTIC 2162 if (curlen == 0) 2163 panic("ehci_alloc_std: curlen == 0"); 2164 #endif 2165 } 2166 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2167 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2168 dataphys, dataphyslastpage, 2169 len, curlen)); 2170 len -= curlen; 2171 2172 if (len != 0) { 2173 next = ehci_alloc_sqtd(sc); 2174 if (next == NULL) 2175 goto nomem; 2176 nextphys = next->physaddr; 2177 } else { 2178 next = NULL; 2179 nextphys = EHCI_NULL; 2180 } 2181 2182 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2183 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2184 if (i != 0) /* use offset only in first buffer */ 2185 a = EHCI_PAGE(a); 2186 cur->qtd.qtd_buffer[i] = htole32(a); 2187 cur->qtd.qtd_buffer_hi[i] = 0; 2188 #ifdef DIAGNOSTIC 2189 if (i >= EHCI_QTD_NBUFFERS) { 2190 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2191 goto nomem; 2192 } 2193 #endif 2194 } 2195 cur->nextqtd = next; 2196 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2197 cur->qtd.qtd_status = 2198 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2199 cur->xfer = xfer; 2200 cur->len = curlen; 2201 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2202 dataphys, dataphys + curlen)); 2203 /* adjust the toggle based on the number of packets in this 2204 qtd */ 2205 if (((curlen + mps - 1) / mps) & 1) { 2206 tog ^= 1; 2207 qtdstatus ^= EHCI_QTD_TOGGLE; 2208 } 2209 if (len == 0) 2210 break; 2211 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2212 dataphys += curlen; 2213 cur = next; 2214 } 2215 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2216 *ep = cur; 2217 epipe->nexttoggle = tog; 2218 2219 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2220 *sp, *ep)); 2221 2222 return (USBD_NORMAL_COMPLETION); 2223 2224 nomem: 2225 /* XXX free chain */ 2226 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2227 return (USBD_NOMEM); 2228 } 2229 2230 Static void 2231 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2232 ehci_soft_qtd_t *sqtdend) 2233 { 2234 ehci_soft_qtd_t *p; 2235 int i; 2236 2237 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2238 sqtd, sqtdend)); 2239 2240 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2241 p = sqtd->nextqtd; 2242 ehci_free_sqtd(sc, sqtd); 2243 } 2244 } 2245 2246 /****************/ 2247 2248 /* 2249 * Close a reqular pipe. 2250 * Assumes that there are no pending transactions. 2251 */ 2252 void 2253 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2254 { 2255 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2256 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2257 ehci_soft_qh_t *sqh = epipe->sqh; 2258 int s; 2259 2260 s = splusb(); 2261 ehci_rem_qh(sc, sqh, head); 2262 splx(s); 2263 ehci_free_sqh(sc, epipe->sqh); 2264 } 2265 2266 /* 2267 * Abort a device request. 2268 * If this routine is called at splusb() it guarantees that the request 2269 * will be removed from the hardware scheduling and that the callback 2270 * for it will be called with USBD_CANCELLED status. 2271 * It's impossible to guarantee that the requested transfer will not 2272 * have happened since the hardware runs concurrently. 2273 * If the transaction has already happened we rely on the ordinary 2274 * interrupt processing to process it. 2275 * XXX This is most probably wrong. 2276 */ 2277 void 2278 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2279 { 2280 #define exfer EXFER(xfer) 2281 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2282 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2283 ehci_soft_qh_t *sqh = epipe->sqh; 2284 ehci_soft_qtd_t *sqtd; 2285 ehci_physaddr_t cur; 2286 u_int32_t qhstatus; 2287 int s; 2288 int hit; 2289 2290 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2291 2292 if (sc->sc_dying) { 2293 /* If we're dying, just do the software part. */ 2294 s = splusb(); 2295 xfer->status = status; /* make software ignore it */ 2296 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2297 usb_transfer_complete(xfer); 2298 splx(s); 2299 return; 2300 } 2301 2302 if (xfer->device->bus->intr_context || !curproc) 2303 panic("ehci_abort_xfer: not in process context"); 2304 2305 /* 2306 * Step 1: Make interrupt routine and hardware ignore xfer. 2307 */ 2308 s = splusb(); 2309 xfer->status = status; /* make software ignore it */ 2310 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2311 qhstatus = sqh->qh.qh_qtd.qtd_status; 2312 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2313 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2314 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2315 if (sqtd == exfer->sqtdend) 2316 break; 2317 } 2318 splx(s); 2319 2320 /* 2321 * Step 2: Wait until we know hardware has finished any possible 2322 * use of the xfer. Also make sure the soft interrupt routine 2323 * has run. 2324 */ 2325 ehci_sync_hc(sc); 2326 s = splusb(); 2327 sc->sc_softwake = 1; 2328 usb_schedsoftintr(&sc->sc_bus); 2329 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2330 splx(s); 2331 2332 /* 2333 * Step 3: Remove any vestiges of the xfer from the hardware. 2334 * The complication here is that the hardware may have executed 2335 * beyond the xfer we're trying to abort. So as we're scanning 2336 * the TDs of this xfer we check if the hardware points to 2337 * any of them. 2338 */ 2339 s = splusb(); /* XXX why? */ 2340 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2341 hit = 0; 2342 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2343 hit |= cur == sqtd->physaddr; 2344 if (sqtd == exfer->sqtdend) 2345 break; 2346 } 2347 sqtd = sqtd->nextqtd; 2348 /* Zap curqtd register if hardware pointed inside the xfer. */ 2349 if (hit && sqtd != NULL) { 2350 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2351 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2352 sqh->qh.qh_qtd.qtd_status = qhstatus; 2353 } else { 2354 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2355 } 2356 2357 /* 2358 * Step 4: Execute callback. 2359 */ 2360 #ifdef DIAGNOSTIC 2361 exfer->isdone = 1; 2362 #endif 2363 usb_transfer_complete(xfer); 2364 2365 splx(s); 2366 #undef exfer 2367 } 2368 2369 void 2370 ehci_timeout(void *addr) 2371 { 2372 struct ehci_xfer *exfer = addr; 2373 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2374 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2375 2376 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2377 #ifdef USB_DEBUG 2378 if (ehcidebug > 1) 2379 usbd_dump_pipe(exfer->xfer.pipe); 2380 #endif 2381 2382 if (sc->sc_dying) { 2383 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2384 return; 2385 } 2386 2387 /* Execute the abort in a process context. */ 2388 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2389 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2390 } 2391 2392 void 2393 ehci_timeout_task(void *addr) 2394 { 2395 usbd_xfer_handle xfer = addr; 2396 int s; 2397 2398 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2399 2400 s = splusb(); 2401 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2402 splx(s); 2403 } 2404 2405 /************************/ 2406 2407 Static usbd_status 2408 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2409 { 2410 usbd_status err; 2411 2412 /* Insert last in queue. */ 2413 err = usb_insert_transfer(xfer); 2414 if (err) 2415 return (err); 2416 2417 /* Pipe isn't running, start first */ 2418 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2419 } 2420 2421 Static usbd_status 2422 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2423 { 2424 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2425 usbd_status err; 2426 2427 if (sc->sc_dying) 2428 return (USBD_IOERROR); 2429 2430 #ifdef DIAGNOSTIC 2431 if (!(xfer->rqflags & URQ_REQUEST)) { 2432 /* XXX panic */ 2433 printf("ehci_device_ctrl_transfer: not a request\n"); 2434 return (USBD_INVAL); 2435 } 2436 #endif 2437 2438 err = ehci_device_request(xfer); 2439 if (err) 2440 return (err); 2441 2442 if (sc->sc_bus.use_polling) 2443 ehci_waitintr(sc, xfer); 2444 return (USBD_IN_PROGRESS); 2445 } 2446 2447 void 2448 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2449 { 2450 struct ehci_xfer *ex = EXFER(xfer); 2451 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2452 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2453 2454 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2455 2456 #ifdef DIAGNOSTIC 2457 if (!(xfer->rqflags & URQ_REQUEST)) { 2458 panic("ehci_ctrl_done: not a request"); 2459 } 2460 #endif 2461 2462 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2463 ehci_del_intr_list(ex); /* remove from active list */ 2464 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2465 } 2466 2467 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2468 } 2469 2470 /* Abort a device control request. */ 2471 Static void 2472 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2473 { 2474 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2475 ehci_abort_xfer(xfer, USBD_CANCELLED); 2476 } 2477 2478 /* Close a device control pipe. */ 2479 Static void 2480 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2481 { 2482 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2483 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2484 2485 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2486 ehci_close_pipe(pipe, sc->sc_async_head); 2487 } 2488 2489 usbd_status 2490 ehci_device_request(usbd_xfer_handle xfer) 2491 { 2492 #define exfer EXFER(xfer) 2493 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2494 usb_device_request_t *req = &xfer->request; 2495 usbd_device_handle dev = epipe->pipe.device; 2496 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2497 int addr = dev->address; 2498 ehci_soft_qtd_t *setup, *stat, *next; 2499 ehci_soft_qh_t *sqh; 2500 int isread; 2501 int len; 2502 usbd_status err; 2503 int s; 2504 2505 isread = req->bmRequestType & UT_READ; 2506 len = UGETW(req->wLength); 2507 2508 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2509 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2510 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2511 UGETW(req->wIndex), len, addr, 2512 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2513 2514 setup = ehci_alloc_sqtd(sc); 2515 if (setup == NULL) { 2516 err = USBD_NOMEM; 2517 goto bad1; 2518 } 2519 stat = ehci_alloc_sqtd(sc); 2520 if (stat == NULL) { 2521 err = USBD_NOMEM; 2522 goto bad2; 2523 } 2524 2525 sqh = epipe->sqh; 2526 epipe->u.ctl.length = len; 2527 2528 /* XXX 2529 * Since we're messing with the QH we must know the HC is in sync. 2530 * This needs to go away since it slows down control transfers. 2531 * Removing it entails: 2532 * - fill the QH only once with addr & wMaxPacketSize 2533 */ 2534 /* ehci_sync_hc(sc); */ 2535 /* Update device address and length since they may have changed. */ 2536 /* XXX This only needs to be done once, but it's too early in open. */ 2537 /* XXXX Should not touch ED here! */ 2538 sqh->qh.qh_endp = 2539 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2540 htole32( 2541 EHCI_QH_SET_ADDR(addr) | 2542 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2543 ); 2544 printf("sqh=%p endp=%08x\n", sqh, sqh->qh.qh_endp); 2545 2546 /* Set up data transaction */ 2547 if (len != 0) { 2548 ehci_soft_qtd_t *end; 2549 2550 /* Start toggle at 1. */ 2551 epipe->nexttoggle = 1; 2552 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2553 &next, &end); 2554 if (err) 2555 goto bad3; 2556 end->nextqtd = stat; 2557 end->qtd.qtd_next = 2558 end->qtd.qtd_altnext = htole32(stat->physaddr); 2559 } else { 2560 next = stat; 2561 } 2562 2563 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2564 2565 /* Clear toggle */ 2566 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2567 setup->qtd.qtd_status = htole32( 2568 EHCI_QTD_ACTIVE | 2569 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2570 EHCI_QTD_SET_CERR(3) | 2571 EHCI_QTD_SET_BYTES(sizeof *req) 2572 ); 2573 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2574 setup->qtd.qtd_buffer_hi[0] = 0; 2575 setup->nextqtd = next; 2576 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2577 setup->xfer = xfer; 2578 setup->len = sizeof *req; 2579 2580 stat->qtd.qtd_status = htole32( 2581 EHCI_QTD_ACTIVE | 2582 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2583 EHCI_QTD_SET_CERR(3) | 2584 EHCI_QTD_TOGGLE | 2585 EHCI_QTD_IOC 2586 ); 2587 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2588 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2589 stat->nextqtd = NULL; 2590 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2591 stat->xfer = xfer; 2592 stat->len = 0; 2593 2594 #ifdef EHCI_DEBUG 2595 if (ehcidebug > 5) { 2596 DPRINTF(("ehci_device_request:\n")); 2597 ehci_dump_sqh(sqh); 2598 ehci_dump_sqtds(setup); 2599 } 2600 #endif 2601 2602 exfer->sqtdstart = setup; 2603 exfer->sqtdend = stat; 2604 #ifdef DIAGNOSTIC 2605 if (!exfer->isdone) { 2606 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2607 } 2608 exfer->isdone = 0; 2609 #endif 2610 2611 /* Insert qTD in QH list. */ 2612 s = splusb(); 2613 ehci_set_qh_qtd(sqh, setup); 2614 if (xfer->timeout && !sc->sc_bus.use_polling) { 2615 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2616 ehci_timeout, xfer); 2617 } 2618 ehci_add_intr_list(sc, exfer); 2619 xfer->status = USBD_IN_PROGRESS; 2620 splx(s); 2621 2622 #ifdef EHCI_DEBUG 2623 if (ehcidebug > 10) { 2624 DPRINTF(("ehci_device_request: status=%x\n", 2625 EOREAD4(sc, EHCI_USBSTS))); 2626 delay(10000); 2627 ehci_dump_regs(sc); 2628 ehci_dump_sqh(sc->sc_async_head); 2629 ehci_dump_sqh(sqh); 2630 ehci_dump_sqtds(setup); 2631 } 2632 #endif 2633 2634 return (USBD_NORMAL_COMPLETION); 2635 2636 bad3: 2637 ehci_free_sqtd(sc, stat); 2638 bad2: 2639 ehci_free_sqtd(sc, setup); 2640 bad1: 2641 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2642 xfer->status = err; 2643 usb_transfer_complete(xfer); 2644 return (err); 2645 #undef exfer 2646 } 2647 2648 /************************/ 2649 2650 Static usbd_status 2651 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2652 { 2653 usbd_status err; 2654 2655 /* Insert last in queue. */ 2656 err = usb_insert_transfer(xfer); 2657 if (err) 2658 return (err); 2659 2660 /* Pipe isn't running, start first */ 2661 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2662 } 2663 2664 usbd_status 2665 ehci_device_bulk_start(usbd_xfer_handle xfer) 2666 { 2667 #define exfer EXFER(xfer) 2668 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2669 usbd_device_handle dev = epipe->pipe.device; 2670 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2671 ehci_soft_qtd_t *data, *dataend; 2672 ehci_soft_qh_t *sqh; 2673 usbd_status err; 2674 int len, isread, endpt; 2675 int s; 2676 2677 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2678 xfer, xfer->length, xfer->flags)); 2679 2680 if (sc->sc_dying) 2681 return (USBD_IOERROR); 2682 2683 #ifdef DIAGNOSTIC 2684 if (xfer->rqflags & URQ_REQUEST) 2685 panic("ehci_device_bulk_transfer: a request"); 2686 #endif 2687 2688 len = xfer->length; 2689 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2690 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2691 sqh = epipe->sqh; 2692 2693 epipe->u.bulk.length = len; 2694 2695 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2696 &dataend); 2697 if (err) { 2698 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2699 xfer->status = err; 2700 usb_transfer_complete(xfer); 2701 return (err); 2702 } 2703 2704 #ifdef EHCI_DEBUG 2705 if (ehcidebug > 5) { 2706 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2707 ehci_dump_sqh(sqh); 2708 ehci_dump_sqtds(data); 2709 } 2710 #endif 2711 2712 /* Set up interrupt info. */ 2713 exfer->sqtdstart = data; 2714 exfer->sqtdend = dataend; 2715 #ifdef DIAGNOSTIC 2716 if (!exfer->isdone) { 2717 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2718 } 2719 exfer->isdone = 0; 2720 #endif 2721 2722 s = splusb(); 2723 ehci_set_qh_qtd(sqh, data); 2724 if (xfer->timeout && !sc->sc_bus.use_polling) { 2725 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2726 ehci_timeout, xfer); 2727 } 2728 ehci_add_intr_list(sc, exfer); 2729 xfer->status = USBD_IN_PROGRESS; 2730 splx(s); 2731 2732 #ifdef EHCI_DEBUG 2733 if (ehcidebug > 10) { 2734 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2735 delay(10000); 2736 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2737 ehci_dump_regs(sc); 2738 #if 0 2739 printf("async_head:\n"); 2740 ehci_dump_sqh(sc->sc_async_head); 2741 #endif 2742 printf("sqh:\n"); 2743 ehci_dump_sqh(sqh); 2744 ehci_dump_sqtds(data); 2745 } 2746 #endif 2747 2748 if (sc->sc_bus.use_polling) 2749 ehci_waitintr(sc, xfer); 2750 2751 return (USBD_IN_PROGRESS); 2752 #undef exfer 2753 } 2754 2755 Static void 2756 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2757 { 2758 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2759 ehci_abort_xfer(xfer, USBD_CANCELLED); 2760 } 2761 2762 /* 2763 * Close a device bulk pipe. 2764 */ 2765 Static void 2766 ehci_device_bulk_close(usbd_pipe_handle pipe) 2767 { 2768 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2769 2770 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2771 ehci_close_pipe(pipe, sc->sc_async_head); 2772 } 2773 2774 void 2775 ehci_device_bulk_done(usbd_xfer_handle xfer) 2776 { 2777 struct ehci_xfer *ex = EXFER(xfer); 2778 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2779 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2780 2781 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2782 xfer, xfer->actlen)); 2783 2784 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2785 ehci_del_intr_list(ex); /* remove from active list */ 2786 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2787 } 2788 2789 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2790 } 2791 2792 /************************/ 2793 2794 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2795 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2796 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2797 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2798 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2799 2800 /************************/ 2801 2802 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2803 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2804 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2805 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2806 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2807
Indexes created Wed Oct 01 19:09:53 GMT 2025