ehci.c revision 1.58
1 /* $NetBSD: ehci.c,v 1.58 2004/06/22 08:55:25 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) There might also be some issues with the data toggle, it was not 58 * completely tested to work properly under all condistions. If wrong 59 * toggle would be sent/recvd, bulk data transfers would stop working. 60 * 61 * 4) The meaty part to implement is the support for USB 2.0 hubs. 62 * They are quite compolicated since the need to be able to do 63 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 64 * So the hub driver needs to handle and schedule these things, to 65 * assign place in frame where different devices get to go. See chapter 66 * on hubs in USB 2.0 for details. 67 * 68 * 5) command failures are not recovered correctly 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.58 2004/06/22 08:55:25 mycroft Exp $"); 73 74 #include "ohci.h" 75 #include "uhci.h" 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <sys/select.h> 83 #include <sys/proc.h> 84 #include <sys/queue.h> 85 86 #include <machine/bus.h> 87 #include <machine/endian.h> 88 89 #include <dev/usb/usb.h> 90 #include <dev/usb/usbdi.h> 91 #include <dev/usb/usbdivar.h> 92 #include <dev/usb/usb_mem.h> 93 #include <dev/usb/usb_quirks.h> 94 95 #include <dev/usb/ehcireg.h> 96 #include <dev/usb/ehcivar.h> 97 98 #ifdef EHCI_DEBUG 99 #define DPRINTF(x) if (ehcidebug) printf x 100 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 101 int ehcidebug = 0; 102 #ifndef __NetBSD__ 103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 104 #endif 105 #else 106 #define DPRINTF(x) 107 #define DPRINTFN(n,x) 108 #endif 109 110 struct ehci_pipe { 111 struct usbd_pipe pipe; 112 int nexttoggle; 113 114 ehci_soft_qh_t *sqh; 115 union { 116 ehci_soft_qtd_t *qtd; 117 /* ehci_soft_itd_t *itd; */ 118 } tail; 119 union { 120 /* Control pipe */ 121 struct { 122 usb_dma_t reqdma; 123 u_int length; 124 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 125 } ctl; 126 /* Interrupt pipe */ 127 /* XXX */ 128 /* Bulk pipe */ 129 struct { 130 u_int length; 131 } bulk; 132 /* Iso pipe */ 133 /* XXX */ 134 } u; 135 }; 136 137 Static void ehci_shutdown(void *); 138 Static void ehci_power(int, void *); 139 140 Static usbd_status ehci_open(usbd_pipe_handle); 141 Static void ehci_poll(struct usbd_bus *); 142 Static void ehci_softintr(void *); 143 Static int ehci_intr1(ehci_softc_t *); 144 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 145 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 146 Static void ehci_idone(struct ehci_xfer *); 147 Static void ehci_timeout(void *); 148 Static void ehci_timeout_task(void *); 149 150 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 151 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 152 153 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 154 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 155 156 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 157 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 158 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 159 Static void ehci_root_ctrl_close(usbd_pipe_handle); 160 Static void ehci_root_ctrl_done(usbd_xfer_handle); 161 162 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 163 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 164 Static void ehci_root_intr_abort(usbd_xfer_handle); 165 Static void ehci_root_intr_close(usbd_pipe_handle); 166 Static void ehci_root_intr_done(usbd_xfer_handle); 167 168 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 170 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 171 Static void ehci_device_ctrl_close(usbd_pipe_handle); 172 Static void ehci_device_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 175 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 176 Static void ehci_device_bulk_abort(usbd_xfer_handle); 177 Static void ehci_device_bulk_close(usbd_pipe_handle); 178 Static void ehci_device_bulk_done(usbd_xfer_handle); 179 180 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 181 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 182 Static void ehci_device_intr_abort(usbd_xfer_handle); 183 Static void ehci_device_intr_close(usbd_pipe_handle); 184 Static void ehci_device_intr_done(usbd_xfer_handle); 185 186 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 187 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 188 Static void ehci_device_isoc_abort(usbd_xfer_handle); 189 Static void ehci_device_isoc_close(usbd_pipe_handle); 190 Static void ehci_device_isoc_done(usbd_xfer_handle); 191 192 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 193 Static void ehci_noop(usbd_pipe_handle pipe); 194 195 Static int ehci_str(usb_string_descriptor_t *, int, char *); 196 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 197 Static void ehci_pcd_able(ehci_softc_t *, int); 198 Static void ehci_pcd_enable(void *); 199 Static void ehci_disown(ehci_softc_t *, int, int); 200 201 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 202 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 203 204 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 205 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 206 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 207 ehci_softc_t *, int, int, usbd_xfer_handle, 208 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 209 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 210 ehci_soft_qtd_t *); 211 212 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 213 214 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 215 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 216 ehci_soft_qh_t *); 217 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 218 Static void ehci_sync_hc(ehci_softc_t *); 219 220 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 221 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 222 223 #ifdef EHCI_DEBUG 224 Static void ehci_dump_regs(ehci_softc_t *); 225 Static void ehci_dump(void); 226 Static ehci_softc_t *theehci; 227 Static void ehci_dump_link(ehci_link_t, int); 228 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 229 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 230 Static void ehci_dump_qtd(ehci_qtd_t *); 231 Static void ehci_dump_sqh(ehci_soft_qh_t *); 232 #ifdef DIAGNOSTIC 233 Static void ehci_dump_exfer(struct ehci_xfer *); 234 #endif 235 #endif 236 237 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 238 239 #define EHCI_INTR_ENDPT 1 240 241 #define ehci_add_intr_list(sc, ex) \ 242 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 243 #define ehci_del_intr_list(ex) \ 244 do { \ 245 LIST_REMOVE((ex), inext); \ 246 (ex)->inext.le_prev = NULL; \ 247 } while (0) 248 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 249 250 Static struct usbd_bus_methods ehci_bus_methods = { 251 ehci_open, 252 ehci_softintr, 253 ehci_poll, 254 ehci_allocm, 255 ehci_freem, 256 ehci_allocx, 257 ehci_freex, 258 }; 259 260 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 261 ehci_root_ctrl_transfer, 262 ehci_root_ctrl_start, 263 ehci_root_ctrl_abort, 264 ehci_root_ctrl_close, 265 ehci_noop, 266 ehci_root_ctrl_done, 267 }; 268 269 Static struct usbd_pipe_methods ehci_root_intr_methods = { 270 ehci_root_intr_transfer, 271 ehci_root_intr_start, 272 ehci_root_intr_abort, 273 ehci_root_intr_close, 274 ehci_noop, 275 ehci_root_intr_done, 276 }; 277 278 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 279 ehci_device_ctrl_transfer, 280 ehci_device_ctrl_start, 281 ehci_device_ctrl_abort, 282 ehci_device_ctrl_close, 283 ehci_noop, 284 ehci_device_ctrl_done, 285 }; 286 287 Static struct usbd_pipe_methods ehci_device_intr_methods = { 288 ehci_device_intr_transfer, 289 ehci_device_intr_start, 290 ehci_device_intr_abort, 291 ehci_device_intr_close, 292 ehci_device_clear_toggle, 293 ehci_device_intr_done, 294 }; 295 296 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 297 ehci_device_bulk_transfer, 298 ehci_device_bulk_start, 299 ehci_device_bulk_abort, 300 ehci_device_bulk_close, 301 ehci_device_clear_toggle, 302 ehci_device_bulk_done, 303 }; 304 305 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 306 ehci_device_isoc_transfer, 307 ehci_device_isoc_start, 308 ehci_device_isoc_abort, 309 ehci_device_isoc_close, 310 ehci_noop, 311 ehci_device_isoc_done, 312 }; 313 314 usbd_status 315 ehci_init(ehci_softc_t *sc) 316 { 317 u_int32_t version, sparams, cparams, hcr; 318 u_int i; 319 usbd_status err; 320 ehci_soft_qh_t *sqh; 321 322 DPRINTF(("ehci_init: start\n")); 323 #ifdef EHCI_DEBUG 324 theehci = sc; 325 #endif 326 327 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 328 329 version = EREAD2(sc, EHCI_HCIVERSION); 330 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 331 version >> 8, version & 0xff); 332 333 sparams = EREAD4(sc, EHCI_HCSPARAMS); 334 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 335 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 336 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 337 aprint_error("%s: wrong number of companions (%d != %d)\n", 338 USBDEVNAME(sc->sc_bus.bdev), 339 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 340 #if NOHCI == 0 || NUHCI == 0 341 aprint_error("%s: ohci or uhci probably not configured\n", 342 USBDEVNAME(sc->sc_bus.bdev)); 343 #endif 344 return (USBD_IOERROR); 345 } 346 if (sc->sc_ncomp > 0) { 347 aprint_normal("%s: companion controller%s, %d port%s each:", 348 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 349 EHCI_HCS_N_PCC(sparams), 350 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 351 for (i = 0; i < sc->sc_ncomp; i++) 352 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 353 aprint_normal("\n"); 354 } 355 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 356 cparams = EREAD4(sc, EHCI_HCCPARAMS); 357 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 358 359 if (EHCI_HCC_64BIT(cparams)) { 360 /* MUST clear segment register if 64 bit capable. */ 361 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 362 } 363 364 sc->sc_bus.usbrev = USBREV_2_0; 365 366 /* Reset the controller */ 367 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 368 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 369 usb_delay_ms(&sc->sc_bus, 1); 370 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 371 for (i = 0; i < 100; i++) { 372 usb_delay_ms(&sc->sc_bus, 1); 373 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 374 if (!hcr) 375 break; 376 } 377 if (hcr) { 378 aprint_error("%s: reset timeout\n", 379 USBDEVNAME(sc->sc_bus.bdev)); 380 return (USBD_IOERROR); 381 } 382 383 /* frame list size at default, read back what we got and use that */ 384 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 385 case 0: sc->sc_flsize = 1024*4; break; 386 case 1: sc->sc_flsize = 512*4; break; 387 case 2: sc->sc_flsize = 256*4; break; 388 case 3: return (USBD_IOERROR); 389 } 390 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 391 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 392 if (err) 393 return (err); 394 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 395 396 /* Set up the bus struct. */ 397 sc->sc_bus.methods = &ehci_bus_methods; 398 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 399 400 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 401 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 402 403 sc->sc_eintrs = EHCI_NORMAL_INTRS; 404 405 /* Allocate dummy QH that starts the async list. */ 406 sqh = ehci_alloc_sqh(sc); 407 if (sqh == NULL) { 408 err = USBD_NOMEM; 409 goto bad1; 410 } 411 /* Fill the QH */ 412 sqh->qh.qh_endp = 413 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 414 sqh->qh.qh_link = 415 htole32(sqh->physaddr | EHCI_LINK_QH); 416 sqh->qh.qh_curqtd = EHCI_NULL; 417 sqh->next = NULL; 418 /* Fill the overlay qTD */ 419 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 420 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 421 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 422 sqh->sqtd = NULL; 423 #ifdef EHCI_DEBUG 424 if (ehcidebug) { 425 ehci_dump_sqh(sqh); 426 } 427 #endif 428 429 /* Point to async list */ 430 sc->sc_async_head = sqh; 431 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 432 433 usb_callout_init(sc->sc_tmo_pcd); 434 435 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 436 437 /* Enable interrupts */ 438 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 439 440 /* Turn on controller */ 441 EOWRITE4(sc, EHCI_USBCMD, 442 EHCI_CMD_ITC_8 | /* 8 microframes */ 443 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 444 EHCI_CMD_ASE | 445 /* EHCI_CMD_PSE | */ 446 EHCI_CMD_RS); 447 448 /* Take over port ownership */ 449 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 450 451 for (i = 0; i < 100; i++) { 452 usb_delay_ms(&sc->sc_bus, 1); 453 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 454 if (!hcr) 455 break; 456 } 457 if (hcr) { 458 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 459 return (USBD_IOERROR); 460 } 461 462 return (USBD_NORMAL_COMPLETION); 463 464 #if 0 465 bad2: 466 ehci_free_sqh(sc, sc->sc_async_head); 467 #endif 468 bad1: 469 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 470 return (err); 471 } 472 473 int 474 ehci_intr(void *v) 475 { 476 ehci_softc_t *sc = v; 477 478 if (sc == NULL || sc->sc_dying) 479 return (0); 480 481 /* If we get an interrupt while polling, then just ignore it. */ 482 if (sc->sc_bus.use_polling) { 483 #ifdef DIAGNOSTIC 484 printf("ehci_intr: ignored interrupt while polling\n"); 485 #endif 486 return (0); 487 } 488 489 return (ehci_intr1(sc)); 490 } 491 492 Static int 493 ehci_intr1(ehci_softc_t *sc) 494 { 495 u_int32_t intrs, eintrs; 496 497 DPRINTFN(20,("ehci_intr1: enter\n")); 498 499 /* In case the interrupt occurs before initialization has completed. */ 500 if (sc == NULL) { 501 #ifdef DIAGNOSTIC 502 printf("ehci_intr: sc == NULL\n"); 503 #endif 504 return (0); 505 } 506 507 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 508 509 if (!intrs) 510 return (0); 511 512 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 513 eintrs = intrs & sc->sc_eintrs; 514 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 515 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 516 (u_int)eintrs)); 517 if (!eintrs) 518 return (0); 519 520 sc->sc_bus.intr_context++; 521 sc->sc_bus.no_intrs++; 522 if (eintrs & EHCI_STS_IAA) { 523 DPRINTF(("ehci_intr1: door bell\n")); 524 wakeup(&sc->sc_async_head); 525 eintrs &= ~EHCI_STS_IAA; 526 } 527 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 528 DPRINTFN(5,("ehci_intr1: %s %s\n", 529 eintrs & EHCI_STS_INT ? "INT" : "", 530 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 531 usb_schedsoftintr(&sc->sc_bus); 532 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 533 } 534 if (eintrs & EHCI_STS_HSE) { 535 printf("%s: unrecoverable error, controller halted\n", 536 USBDEVNAME(sc->sc_bus.bdev)); 537 /* XXX what else */ 538 } 539 if (eintrs & EHCI_STS_PCD) { 540 ehci_pcd(sc, sc->sc_intrxfer); 541 /* 542 * Disable PCD interrupt for now, because it will be 543 * on until the port has been reset. 544 */ 545 ehci_pcd_able(sc, 0); 546 /* Do not allow RHSC interrupts > 1 per second */ 547 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 548 eintrs &= ~EHCI_STS_PCD; 549 } 550 551 sc->sc_bus.intr_context--; 552 553 if (eintrs != 0) { 554 /* Block unprocessed interrupts. */ 555 sc->sc_eintrs &= ~eintrs; 556 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 557 printf("%s: blocking intrs 0x%x\n", 558 USBDEVNAME(sc->sc_bus.bdev), eintrs); 559 } 560 561 return (1); 562 } 563 564 void 565 ehci_pcd_able(ehci_softc_t *sc, int on) 566 { 567 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 568 if (on) 569 sc->sc_eintrs |= EHCI_STS_PCD; 570 else 571 sc->sc_eintrs &= ~EHCI_STS_PCD; 572 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 573 } 574 575 void 576 ehci_pcd_enable(void *v_sc) 577 { 578 ehci_softc_t *sc = v_sc; 579 580 ehci_pcd_able(sc, 1); 581 } 582 583 void 584 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 585 { 586 usbd_pipe_handle pipe; 587 u_char *p; 588 int i, m; 589 590 if (xfer == NULL) { 591 /* Just ignore the change. */ 592 return; 593 } 594 595 pipe = xfer->pipe; 596 597 p = KERNADDR(&xfer->dmabuf, 0); 598 m = min(sc->sc_noport, xfer->length * 8 - 1); 599 memset(p, 0, xfer->length); 600 for (i = 1; i <= m; i++) { 601 /* Pick out CHANGE bits from the status reg. */ 602 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 603 p[i/8] |= 1 << (i%8); 604 } 605 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 606 xfer->actlen = xfer->length; 607 xfer->status = USBD_NORMAL_COMPLETION; 608 609 usb_transfer_complete(xfer); 610 } 611 612 void 613 ehci_softintr(void *v) 614 { 615 ehci_softc_t *sc = v; 616 struct ehci_xfer *ex, *nextex; 617 618 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 619 sc->sc_bus.intr_context)); 620 621 sc->sc_bus.intr_context++; 622 623 /* 624 * The only explanation I can think of for why EHCI is as brain dead 625 * as UHCI interrupt-wise is that Intel was involved in both. 626 * An interrupt just tells us that something is done, we have no 627 * clue what, so we need to scan through all active transfers. :-( 628 */ 629 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 630 nextex = LIST_NEXT(ex, inext); 631 ehci_check_intr(sc, ex); 632 } 633 634 if (sc->sc_softwake) { 635 sc->sc_softwake = 0; 636 wakeup(&sc->sc_softwake); 637 } 638 639 sc->sc_bus.intr_context--; 640 } 641 642 /* Check for an interrupt. */ 643 void 644 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 645 { 646 ehci_soft_qtd_t *sqtd, *lsqtd; 647 u_int32_t status; 648 649 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 650 651 if (ex->sqtdstart == NULL) { 652 printf("ehci_check_intr: sqtdstart=NULL\n"); 653 return; 654 } 655 lsqtd = ex->sqtdend; 656 #ifdef DIAGNOSTIC 657 if (lsqtd == NULL) { 658 printf("ehci_check_intr: sqtd==0\n"); 659 return; 660 } 661 #endif 662 /* 663 * If the last TD is still active we need to check whether there 664 * is a an error somewhere in the middle, or whether there was a 665 * short packet (SPD and not ACTIVE). 666 */ 667 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 668 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 669 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 670 status = le32toh(sqtd->qtd.qtd_status); 671 /* If there's an active QTD the xfer isn't done. */ 672 if (status & EHCI_QTD_ACTIVE) 673 break; 674 /* Any kind of error makes the xfer done. */ 675 if (status & EHCI_QTD_HALTED) 676 goto done; 677 /* We want short packets, and it is short: it's done */ 678 if (EHCI_QTD_GET_BYTES(status) != 0) 679 goto done; 680 } 681 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 682 ex, ex->sqtdstart)); 683 return; 684 } 685 done: 686 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 687 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 688 ehci_idone(ex); 689 } 690 691 void 692 ehci_idone(struct ehci_xfer *ex) 693 { 694 usbd_xfer_handle xfer = &ex->xfer; 695 #ifdef EHCI_DEBUG 696 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 697 #endif 698 ehci_soft_qtd_t *sqtd; 699 u_int32_t status = 0, nstatus; 700 int actlen; 701 702 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 703 #ifdef DIAGNOSTIC 704 { 705 int s = splhigh(); 706 if (ex->isdone) { 707 splx(s); 708 #ifdef EHCI_DEBUG 709 printf("ehci_idone: ex is done!\n "); 710 ehci_dump_exfer(ex); 711 #else 712 printf("ehci_idone: ex=%p is done!\n", ex); 713 #endif 714 return; 715 } 716 ex->isdone = 1; 717 splx(s); 718 } 719 #endif 720 721 if (xfer->status == USBD_CANCELLED || 722 xfer->status == USBD_TIMEOUT) { 723 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 724 return; 725 } 726 727 #ifdef EHCI_DEBUG 728 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 729 if (ehcidebug > 10) 730 ehci_dump_sqtds(ex->sqtdstart); 731 #endif 732 733 /* The transfer is done, compute actual length and status. */ 734 actlen = 0; 735 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 736 nstatus = le32toh(sqtd->qtd.qtd_status); 737 if (nstatus & EHCI_QTD_ACTIVE) 738 break; 739 740 status = nstatus; 741 /* halt is ok if descriptor is last, and complete */ 742 if (sqtd->qtd.qtd_next == EHCI_NULL && 743 EHCI_QTD_GET_BYTES(status) == 0) 744 status &= ~EHCI_QTD_HALTED; 745 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 746 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 747 } 748 749 /* If there are left over TDs we need to update the toggle. */ 750 if (sqtd != NULL) { 751 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 752 #if 0 753 ehci_dump_sqh(epipe->sqh); 754 ehci_dump_sqtds(ex->sqtdstart); 755 #endif 756 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 757 } 758 759 status &= EHCI_QTD_STATERRS; 760 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 761 xfer->length, actlen, status)); 762 xfer->actlen = actlen; 763 if (status != 0) { 764 #ifdef EHCI_DEBUG 765 char sbuf[128]; 766 767 bitmask_snprintf((u_int32_t)status, 768 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 769 "\7HALTED", 770 sbuf, sizeof(sbuf)); 771 772 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 773 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 774 "status 0x%s\n", 775 xfer->pipe->device->address, 776 xfer->pipe->endpoint->edesc->bEndpointAddress, 777 sbuf)); 778 if (ehcidebug > 2) { 779 ehci_dump_sqh(epipe->sqh); 780 ehci_dump_sqtds(ex->sqtdstart); 781 } 782 #endif 783 if (status == EHCI_QTD_HALTED) 784 xfer->status = USBD_STALLED; 785 else 786 xfer->status = USBD_IOERROR; /* more info XXX */ 787 } else { 788 xfer->status = USBD_NORMAL_COMPLETION; 789 } 790 791 usb_transfer_complete(xfer); 792 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 793 } 794 795 /* 796 * Wait here until controller claims to have an interrupt. 797 * Then call ehci_intr and return. Use timeout to avoid waiting 798 * too long. 799 */ 800 void 801 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 802 { 803 int timo = xfer->timeout; 804 int usecs; 805 u_int32_t intrs; 806 807 xfer->status = USBD_IN_PROGRESS; 808 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 809 usb_delay_ms(&sc->sc_bus, 1); 810 if (sc->sc_dying) 811 break; 812 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 813 sc->sc_eintrs; 814 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 815 #ifdef OHCI_DEBUG 816 if (ehcidebug > 15) 817 ehci_dump_regs(sc); 818 #endif 819 if (intrs) { 820 ehci_intr1(sc); 821 if (xfer->status != USBD_IN_PROGRESS) 822 return; 823 } 824 } 825 826 /* Timeout */ 827 DPRINTF(("ehci_waitintr: timeout\n")); 828 xfer->status = USBD_TIMEOUT; 829 usb_transfer_complete(xfer); 830 /* XXX should free TD */ 831 } 832 833 void 834 ehci_poll(struct usbd_bus *bus) 835 { 836 ehci_softc_t *sc = (ehci_softc_t *)bus; 837 #ifdef EHCI_DEBUG 838 static int last; 839 int new; 840 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 841 if (new != last) { 842 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 843 last = new; 844 } 845 #endif 846 847 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 848 ehci_intr1(sc); 849 } 850 851 int 852 ehci_detach(struct ehci_softc *sc, int flags) 853 { 854 int rv = 0; 855 856 if (sc->sc_child != NULL) 857 rv = config_detach(sc->sc_child, flags); 858 859 if (rv != 0) 860 return (rv); 861 862 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 863 864 if (sc->sc_powerhook != NULL) 865 powerhook_disestablish(sc->sc_powerhook); 866 if (sc->sc_shutdownhook != NULL) 867 shutdownhook_disestablish(sc->sc_shutdownhook); 868 869 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 870 871 /* XXX free other data structures XXX */ 872 873 return (rv); 874 } 875 876 877 int 878 ehci_activate(device_ptr_t self, enum devact act) 879 { 880 struct ehci_softc *sc = (struct ehci_softc *)self; 881 int rv = 0; 882 883 switch (act) { 884 case DVACT_ACTIVATE: 885 return (EOPNOTSUPP); 886 887 case DVACT_DEACTIVATE: 888 if (sc->sc_child != NULL) 889 rv = config_deactivate(sc->sc_child); 890 sc->sc_dying = 1; 891 break; 892 } 893 return (rv); 894 } 895 896 /* 897 * Handle suspend/resume. 898 * 899 * We need to switch to polling mode here, because this routine is 900 * called from an intterupt context. This is all right since we 901 * are almost suspended anyway. 902 */ 903 void 904 ehci_power(int why, void *v) 905 { 906 ehci_softc_t *sc = v; 907 //u_int32_t ctl; 908 int s; 909 910 #ifdef EHCI_DEBUG 911 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 912 ehci_dump_regs(sc); 913 #endif 914 915 s = splhardusb(); 916 switch (why) { 917 case PWR_SUSPEND: 918 case PWR_STANDBY: 919 sc->sc_bus.use_polling++; 920 #if 0 921 OOO 922 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 923 if (sc->sc_control == 0) { 924 /* 925 * Preserve register values, in case that APM BIOS 926 * does not recover them. 927 */ 928 sc->sc_control = ctl; 929 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 930 } 931 ctl |= EHCI_HCFS_SUSPEND; 932 OWRITE4(sc, EHCI_CONTROL, ctl); 933 #endif 934 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 935 sc->sc_bus.use_polling--; 936 break; 937 case PWR_RESUME: 938 sc->sc_bus.use_polling++; 939 #if 0 940 OOO 941 /* Some broken BIOSes do not recover these values */ 942 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 943 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 944 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 945 if (sc->sc_intre) 946 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 947 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 948 if (sc->sc_control) 949 ctl = sc->sc_control; 950 else 951 ctl = OREAD4(sc, EHCI_CONTROL); 952 ctl |= EHCI_HCFS_RESUME; 953 OWRITE4(sc, EHCI_CONTROL, ctl); 954 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 955 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 956 OWRITE4(sc, EHCI_CONTROL, ctl); 957 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 958 sc->sc_control = sc->sc_intre = 0; 959 #endif 960 sc->sc_bus.use_polling--; 961 break; 962 case PWR_SOFTSUSPEND: 963 case PWR_SOFTSTANDBY: 964 case PWR_SOFTRESUME: 965 break; 966 } 967 splx(s); 968 } 969 970 /* 971 * Shut down the controller when the system is going down. 972 */ 973 void 974 ehci_shutdown(void *v) 975 { 976 ehci_softc_t *sc = v; 977 978 DPRINTF(("ehci_shutdown: stopping the HC\n")); 979 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 980 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 981 } 982 983 usbd_status 984 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 985 { 986 struct ehci_softc *sc = (struct ehci_softc *)bus; 987 usbd_status err; 988 989 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 990 #ifdef EHCI_DEBUG 991 if (err) 992 printf("ehci_allocm: usb_allocmem()=%d\n", err); 993 #endif 994 return (err); 995 } 996 997 void 998 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 999 { 1000 struct ehci_softc *sc = (struct ehci_softc *)bus; 1001 1002 usb_freemem(&sc->sc_bus, dma); 1003 } 1004 1005 usbd_xfer_handle 1006 ehci_allocx(struct usbd_bus *bus) 1007 { 1008 struct ehci_softc *sc = (struct ehci_softc *)bus; 1009 usbd_xfer_handle xfer; 1010 1011 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1012 if (xfer != NULL) { 1013 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1014 #ifdef DIAGNOSTIC 1015 if (xfer->busy_free != XFER_FREE) { 1016 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1017 xfer->busy_free); 1018 } 1019 #endif 1020 } else { 1021 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1022 } 1023 if (xfer != NULL) { 1024 memset(xfer, 0, sizeof (struct ehci_xfer)); 1025 #ifdef DIAGNOSTIC 1026 EXFER(xfer)->isdone = 1; 1027 xfer->busy_free = XFER_BUSY; 1028 #endif 1029 } 1030 return (xfer); 1031 } 1032 1033 void 1034 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1035 { 1036 struct ehci_softc *sc = (struct ehci_softc *)bus; 1037 1038 #ifdef DIAGNOSTIC 1039 if (xfer->busy_free != XFER_BUSY) { 1040 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1041 xfer->busy_free); 1042 return; 1043 } 1044 xfer->busy_free = XFER_FREE; 1045 if (!EXFER(xfer)->isdone) { 1046 printf("ehci_freex: !isdone\n"); 1047 return; 1048 } 1049 #endif 1050 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1051 } 1052 1053 Static void 1054 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1055 { 1056 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1057 1058 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1059 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1060 #ifdef USB_DEBUG 1061 if (ehcidebug) 1062 usbd_dump_pipe(pipe); 1063 #endif 1064 epipe->nexttoggle = 0; 1065 } 1066 1067 Static void 1068 ehci_noop(usbd_pipe_handle pipe) 1069 { 1070 } 1071 1072 #ifdef EHCI_DEBUG 1073 void 1074 ehci_dump_regs(ehci_softc_t *sc) 1075 { 1076 int i; 1077 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1078 EOREAD4(sc, EHCI_USBCMD), 1079 EOREAD4(sc, EHCI_USBSTS), 1080 EOREAD4(sc, EHCI_USBINTR)); 1081 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1082 EOREAD4(sc, EHCI_FRINDEX), 1083 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1084 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1085 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1086 for (i = 1; i <= sc->sc_noport; i++) 1087 printf("port %d status=0x%08x\n", i, 1088 EOREAD4(sc, EHCI_PORTSC(i))); 1089 } 1090 1091 /* 1092 * Unused function - this is meant to be called from a kernel 1093 * debugger. 1094 */ 1095 void 1096 ehci_dump() 1097 { 1098 ehci_dump_regs(theehci); 1099 } 1100 1101 void 1102 ehci_dump_link(ehci_link_t link, int type) 1103 { 1104 link = le32toh(link); 1105 printf("0x%08x", link); 1106 if (link & EHCI_LINK_TERMINATE) 1107 printf("<T>"); 1108 else { 1109 printf("<"); 1110 if (type) { 1111 switch (EHCI_LINK_TYPE(link)) { 1112 case EHCI_LINK_ITD: printf("ITD"); break; 1113 case EHCI_LINK_QH: printf("QH"); break; 1114 case EHCI_LINK_SITD: printf("SITD"); break; 1115 case EHCI_LINK_FSTN: printf("FSTN"); break; 1116 } 1117 } 1118 printf(">"); 1119 } 1120 } 1121 1122 void 1123 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1124 { 1125 int i; 1126 u_int32_t stop; 1127 1128 stop = 0; 1129 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1130 ehci_dump_sqtd(sqtd); 1131 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1132 } 1133 if (sqtd) 1134 printf("dump aborted, too many TDs\n"); 1135 } 1136 1137 void 1138 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1139 { 1140 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1141 ehci_dump_qtd(&sqtd->qtd); 1142 } 1143 1144 void 1145 ehci_dump_qtd(ehci_qtd_t *qtd) 1146 { 1147 u_int32_t s; 1148 char sbuf[128]; 1149 1150 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1151 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1152 printf("\n"); 1153 s = le32toh(qtd->qtd_status); 1154 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1155 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1156 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1157 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1158 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1159 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1160 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1161 EHCI_QTD_GET_PID(s), sbuf); 1162 for (s = 0; s < 5; s++) 1163 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1164 } 1165 1166 void 1167 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1168 { 1169 ehci_qh_t *qh = &sqh->qh; 1170 u_int32_t endp, endphub; 1171 1172 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1173 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1174 endp = le32toh(qh->qh_endp); 1175 printf(" endp=0x%08x\n", endp); 1176 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1177 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1178 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1179 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1180 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1181 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1182 EHCI_QH_GET_NRL(endp)); 1183 endphub = le32toh(qh->qh_endphub); 1184 printf(" endphub=0x%08x\n", endphub); 1185 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1186 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1187 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1188 EHCI_QH_GET_MULT(endphub)); 1189 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1190 printf("Overlay qTD:\n"); 1191 ehci_dump_qtd(&qh->qh_qtd); 1192 } 1193 1194 #ifdef DIAGNOSTIC 1195 Static void 1196 ehci_dump_exfer(struct ehci_xfer *ex) 1197 { 1198 printf("ehci_dump_exfer: ex=%p\n", ex); 1199 } 1200 #endif 1201 #endif 1202 1203 usbd_status 1204 ehci_open(usbd_pipe_handle pipe) 1205 { 1206 usbd_device_handle dev = pipe->device; 1207 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1208 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1209 u_int8_t addr = dev->address; 1210 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1211 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1212 ehci_soft_qh_t *sqh; 1213 usbd_status err; 1214 int s; 1215 int speed, naks; 1216 1217 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1218 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1219 1220 if (sc->sc_dying) 1221 return (USBD_IOERROR); 1222 1223 epipe->nexttoggle = 0; 1224 1225 if (addr == sc->sc_addr) { 1226 switch (ed->bEndpointAddress) { 1227 case USB_CONTROL_ENDPOINT: 1228 pipe->methods = &ehci_root_ctrl_methods; 1229 break; 1230 case UE_DIR_IN | EHCI_INTR_ENDPT: 1231 pipe->methods = &ehci_root_intr_methods; 1232 break; 1233 default: 1234 return (USBD_INVAL); 1235 } 1236 return (USBD_NORMAL_COMPLETION); 1237 } 1238 1239 /* XXX All this stuff is only valid for async. */ 1240 switch (dev->speed) { 1241 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1242 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1243 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1244 default: panic("ehci_open: bad device speed %d", dev->speed); 1245 } 1246 naks = 8; /* XXX */ 1247 sqh = ehci_alloc_sqh(sc); 1248 if (sqh == NULL) 1249 goto bad0; 1250 /* qh_link filled when the QH is added */ 1251 sqh->qh.qh_endp = htole32( 1252 EHCI_QH_SET_ADDR(addr) | 1253 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1254 EHCI_QH_SET_EPS(speed) | 1255 EHCI_QH_DTC | 1256 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1257 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1258 EHCI_QH_CTL : 0) | 1259 EHCI_QH_SET_NRL(naks) 1260 ); 1261 sqh->qh.qh_endphub = htole32( 1262 EHCI_QH_SET_MULT(1) 1263 /* XXX TT stuff */ 1264 /* XXX interrupt mask */ 1265 ); 1266 sqh->qh.qh_curqtd = EHCI_NULL; 1267 /* Fill the overlay qTD */ 1268 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1269 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1270 sqh->qh.qh_qtd.qtd_status = htole32(0); 1271 1272 epipe->sqh = sqh; 1273 1274 switch (xfertype) { 1275 case UE_CONTROL: 1276 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1277 0, &epipe->u.ctl.reqdma); 1278 #ifdef EHCI_DEBUG 1279 if (err) 1280 printf("ehci_open: usb_allocmem()=%d\n", err); 1281 #endif 1282 if (err) 1283 goto bad1; 1284 pipe->methods = &ehci_device_ctrl_methods; 1285 s = splusb(); 1286 ehci_add_qh(sqh, sc->sc_async_head); 1287 splx(s); 1288 break; 1289 case UE_BULK: 1290 pipe->methods = &ehci_device_bulk_methods; 1291 s = splusb(); 1292 ehci_add_qh(sqh, sc->sc_async_head); 1293 splx(s); 1294 break; 1295 case UE_INTERRUPT: 1296 pipe->methods = &ehci_device_intr_methods; 1297 return (USBD_INVAL); 1298 case UE_ISOCHRONOUS: 1299 pipe->methods = &ehci_device_isoc_methods; 1300 return (USBD_INVAL); 1301 default: 1302 return (USBD_INVAL); 1303 } 1304 return (USBD_NORMAL_COMPLETION); 1305 1306 bad1: 1307 ehci_free_sqh(sc, sqh); 1308 bad0: 1309 return (USBD_NOMEM); 1310 } 1311 1312 /* 1313 * Add an ED to the schedule. Called at splusb(). 1314 */ 1315 void 1316 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1317 { 1318 SPLUSBCHECK; 1319 1320 sqh->next = head->next; 1321 sqh->qh.qh_link = head->qh.qh_link; 1322 head->next = sqh; 1323 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1324 1325 #ifdef EHCI_DEBUG 1326 if (ehcidebug > 5) { 1327 printf("ehci_add_qh:\n"); 1328 ehci_dump_sqh(sqh); 1329 } 1330 #endif 1331 } 1332 1333 /* 1334 * Remove an ED from the schedule. Called at splusb(). 1335 */ 1336 void 1337 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1338 { 1339 ehci_soft_qh_t *p; 1340 1341 SPLUSBCHECK; 1342 /* XXX */ 1343 for (p = head; p != NULL && p->next != sqh; p = p->next) 1344 ; 1345 if (p == NULL) 1346 panic("ehci_rem_qh: ED not found"); 1347 p->next = sqh->next; 1348 p->qh.qh_link = sqh->qh.qh_link; 1349 1350 ehci_sync_hc(sc); 1351 } 1352 1353 void 1354 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1355 { 1356 /* Halt while we are messing. */ 1357 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1358 sqh->qh.qh_curqtd = 0; 1359 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1360 sqh->sqtd = sqtd; 1361 /* Keep toggle, clear the rest, including length. */ 1362 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1363 } 1364 1365 /* 1366 * Ensure that the HC has released all references to the QH. We do this 1367 * by asking for a Async Advance Doorbell interrupt and then we wait for 1368 * the interrupt. 1369 * To make this easier we first obtain exclusive use of the doorbell. 1370 */ 1371 void 1372 ehci_sync_hc(ehci_softc_t *sc) 1373 { 1374 int s, error; 1375 1376 if (sc->sc_dying) { 1377 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1378 return; 1379 } 1380 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1381 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1382 s = splhardusb(); 1383 /* ask for doorbell */ 1384 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1385 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1386 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1387 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1388 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1389 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1390 splx(s); 1391 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1392 #ifdef DIAGNOSTIC 1393 if (error) 1394 printf("ehci_sync_hc: tsleep() = %d\n", error); 1395 #endif 1396 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1397 } 1398 1399 /***********/ 1400 1401 /* 1402 * Data structures and routines to emulate the root hub. 1403 */ 1404 Static usb_device_descriptor_t ehci_devd = { 1405 USB_DEVICE_DESCRIPTOR_SIZE, 1406 UDESC_DEVICE, /* type */ 1407 {0x00, 0x02}, /* USB version */ 1408 UDCLASS_HUB, /* class */ 1409 UDSUBCLASS_HUB, /* subclass */ 1410 UDPROTO_HSHUBSTT, /* protocol */ 1411 64, /* max packet */ 1412 {0},{0},{0x00,0x01}, /* device id */ 1413 1,2,0, /* string indicies */ 1414 1 /* # of configurations */ 1415 }; 1416 1417 Static usb_device_qualifier_t ehci_odevd = { 1418 USB_DEVICE_DESCRIPTOR_SIZE, 1419 UDESC_DEVICE_QUALIFIER, /* type */ 1420 {0x00, 0x02}, /* USB version */ 1421 UDCLASS_HUB, /* class */ 1422 UDSUBCLASS_HUB, /* subclass */ 1423 UDPROTO_FSHUB, /* protocol */ 1424 64, /* max packet */ 1425 1, /* # of configurations */ 1426 0 1427 }; 1428 1429 Static usb_config_descriptor_t ehci_confd = { 1430 USB_CONFIG_DESCRIPTOR_SIZE, 1431 UDESC_CONFIG, 1432 {USB_CONFIG_DESCRIPTOR_SIZE + 1433 USB_INTERFACE_DESCRIPTOR_SIZE + 1434 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1435 1, 1436 1, 1437 0, 1438 UC_SELF_POWERED, 1439 0 /* max power */ 1440 }; 1441 1442 Static usb_interface_descriptor_t ehci_ifcd = { 1443 USB_INTERFACE_DESCRIPTOR_SIZE, 1444 UDESC_INTERFACE, 1445 0, 1446 0, 1447 1, 1448 UICLASS_HUB, 1449 UISUBCLASS_HUB, 1450 UIPROTO_HSHUBSTT, 1451 0 1452 }; 1453 1454 Static usb_endpoint_descriptor_t ehci_endpd = { 1455 USB_ENDPOINT_DESCRIPTOR_SIZE, 1456 UDESC_ENDPOINT, 1457 UE_DIR_IN | EHCI_INTR_ENDPT, 1458 UE_INTERRUPT, 1459 {8, 0}, /* max packet */ 1460 255 1461 }; 1462 1463 Static usb_hub_descriptor_t ehci_hubd = { 1464 USB_HUB_DESCRIPTOR_SIZE, 1465 UDESC_HUB, 1466 0, 1467 {0,0}, 1468 0, 1469 0, 1470 {0}, 1471 }; 1472 1473 Static int 1474 ehci_str(p, l, s) 1475 usb_string_descriptor_t *p; 1476 int l; 1477 char *s; 1478 { 1479 int i; 1480 1481 if (l == 0) 1482 return (0); 1483 p->bLength = 2 * strlen(s) + 2; 1484 if (l == 1) 1485 return (1); 1486 p->bDescriptorType = UDESC_STRING; 1487 l -= 2; 1488 for (i = 0; s[i] && l > 1; i++, l -= 2) 1489 USETW2(p->bString[i], 0, s[i]); 1490 return (2*i+2); 1491 } 1492 1493 /* 1494 * Simulate a hardware hub by handling all the necessary requests. 1495 */ 1496 Static usbd_status 1497 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1498 { 1499 usbd_status err; 1500 1501 /* Insert last in queue. */ 1502 err = usb_insert_transfer(xfer); 1503 if (err) 1504 return (err); 1505 1506 /* Pipe isn't running, start first */ 1507 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1508 } 1509 1510 Static usbd_status 1511 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1512 { 1513 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1514 usb_device_request_t *req; 1515 void *buf = NULL; 1516 int port, i; 1517 int s, len, value, index, l, totlen = 0; 1518 usb_port_status_t ps; 1519 usb_hub_descriptor_t hubd; 1520 usbd_status err; 1521 u_int32_t v; 1522 1523 if (sc->sc_dying) 1524 return (USBD_IOERROR); 1525 1526 #ifdef DIAGNOSTIC 1527 if (!(xfer->rqflags & URQ_REQUEST)) 1528 /* XXX panic */ 1529 return (USBD_INVAL); 1530 #endif 1531 req = &xfer->request; 1532 1533 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1534 req->bmRequestType, req->bRequest)); 1535 1536 len = UGETW(req->wLength); 1537 value = UGETW(req->wValue); 1538 index = UGETW(req->wIndex); 1539 1540 if (len != 0) 1541 buf = KERNADDR(&xfer->dmabuf, 0); 1542 1543 #define C(x,y) ((x) | ((y) << 8)) 1544 switch(C(req->bRequest, req->bmRequestType)) { 1545 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1546 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1547 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1548 /* 1549 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1550 * for the integrated root hub. 1551 */ 1552 break; 1553 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1554 if (len > 0) { 1555 *(u_int8_t *)buf = sc->sc_conf; 1556 totlen = 1; 1557 } 1558 break; 1559 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1560 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1561 switch(value >> 8) { 1562 case UDESC_DEVICE: 1563 if ((value & 0xff) != 0) { 1564 err = USBD_IOERROR; 1565 goto ret; 1566 } 1567 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1568 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1569 memcpy(buf, &ehci_devd, l); 1570 break; 1571 /* 1572 * We can't really operate at another speed, but the spec says 1573 * we need this descriptor. 1574 */ 1575 case UDESC_DEVICE_QUALIFIER: 1576 if ((value & 0xff) != 0) { 1577 err = USBD_IOERROR; 1578 goto ret; 1579 } 1580 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1581 memcpy(buf, &ehci_odevd, l); 1582 break; 1583 /* 1584 * We can't really operate at another speed, but the spec says 1585 * we need this descriptor. 1586 */ 1587 case UDESC_OTHER_SPEED_CONFIGURATION: 1588 case UDESC_CONFIG: 1589 if ((value & 0xff) != 0) { 1590 err = USBD_IOERROR; 1591 goto ret; 1592 } 1593 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1594 memcpy(buf, &ehci_confd, l); 1595 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1596 value >> 8; 1597 buf = (char *)buf + l; 1598 len -= l; 1599 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1600 totlen += l; 1601 memcpy(buf, &ehci_ifcd, l); 1602 buf = (char *)buf + l; 1603 len -= l; 1604 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1605 totlen += l; 1606 memcpy(buf, &ehci_endpd, l); 1607 break; 1608 case UDESC_STRING: 1609 if (len == 0) 1610 break; 1611 *(u_int8_t *)buf = 0; 1612 totlen = 1; 1613 switch (value & 0xff) { 1614 case 1: /* Vendor */ 1615 totlen = ehci_str(buf, len, sc->sc_vendor); 1616 break; 1617 case 2: /* Product */ 1618 totlen = ehci_str(buf, len, "EHCI root hub"); 1619 break; 1620 } 1621 break; 1622 default: 1623 err = USBD_IOERROR; 1624 goto ret; 1625 } 1626 break; 1627 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1628 if (len > 0) { 1629 *(u_int8_t *)buf = 0; 1630 totlen = 1; 1631 } 1632 break; 1633 case C(UR_GET_STATUS, UT_READ_DEVICE): 1634 if (len > 1) { 1635 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1636 totlen = 2; 1637 } 1638 break; 1639 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1640 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1641 if (len > 1) { 1642 USETW(((usb_status_t *)buf)->wStatus, 0); 1643 totlen = 2; 1644 } 1645 break; 1646 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1647 if (value >= USB_MAX_DEVICES) { 1648 err = USBD_IOERROR; 1649 goto ret; 1650 } 1651 sc->sc_addr = value; 1652 break; 1653 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1654 if (value != 0 && value != 1) { 1655 err = USBD_IOERROR; 1656 goto ret; 1657 } 1658 sc->sc_conf = value; 1659 break; 1660 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1661 break; 1662 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1663 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1664 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1665 err = USBD_IOERROR; 1666 goto ret; 1667 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1668 break; 1669 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1670 break; 1671 /* Hub requests */ 1672 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1673 break; 1674 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1675 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1676 "port=%d feature=%d\n", 1677 index, value)); 1678 if (index < 1 || index > sc->sc_noport) { 1679 err = USBD_IOERROR; 1680 goto ret; 1681 } 1682 port = EHCI_PORTSC(index); 1683 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1684 switch(value) { 1685 case UHF_PORT_ENABLE: 1686 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1687 break; 1688 case UHF_PORT_SUSPEND: 1689 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1690 break; 1691 case UHF_PORT_POWER: 1692 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1693 break; 1694 case UHF_PORT_TEST: 1695 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1696 "%d\n", index)); 1697 break; 1698 case UHF_PORT_INDICATOR: 1699 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1700 "%d\n", index)); 1701 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1702 break; 1703 case UHF_C_PORT_CONNECTION: 1704 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1705 break; 1706 case UHF_C_PORT_ENABLE: 1707 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1708 break; 1709 case UHF_C_PORT_SUSPEND: 1710 /* how? */ 1711 break; 1712 case UHF_C_PORT_OVER_CURRENT: 1713 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1714 break; 1715 case UHF_C_PORT_RESET: 1716 sc->sc_isreset = 0; 1717 break; 1718 default: 1719 err = USBD_IOERROR; 1720 goto ret; 1721 } 1722 #if 0 1723 switch(value) { 1724 case UHF_C_PORT_CONNECTION: 1725 case UHF_C_PORT_ENABLE: 1726 case UHF_C_PORT_SUSPEND: 1727 case UHF_C_PORT_OVER_CURRENT: 1728 case UHF_C_PORT_RESET: 1729 /* Enable RHSC interrupt if condition is cleared. */ 1730 if ((OREAD4(sc, port) >> 16) == 0) 1731 ehci_pcd_able(sc, 1); 1732 break; 1733 default: 1734 break; 1735 } 1736 #endif 1737 break; 1738 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1739 if ((value & 0xff) != 0) { 1740 err = USBD_IOERROR; 1741 goto ret; 1742 } 1743 hubd = ehci_hubd; 1744 hubd.bNbrPorts = sc->sc_noport; 1745 v = EOREAD4(sc, EHCI_HCSPARAMS); 1746 USETW(hubd.wHubCharacteristics, 1747 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1748 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1749 ? UHD_PORT_IND : 0); 1750 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1751 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1752 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1753 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1754 l = min(len, hubd.bDescLength); 1755 totlen = l; 1756 memcpy(buf, &hubd, l); 1757 break; 1758 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1759 if (len != 4) { 1760 err = USBD_IOERROR; 1761 goto ret; 1762 } 1763 memset(buf, 0, len); /* ? XXX */ 1764 totlen = len; 1765 break; 1766 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1767 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1768 index)); 1769 if (index < 1 || index > sc->sc_noport) { 1770 err = USBD_IOERROR; 1771 goto ret; 1772 } 1773 if (len != 4) { 1774 err = USBD_IOERROR; 1775 goto ret; 1776 } 1777 v = EOREAD4(sc, EHCI_PORTSC(index)); 1778 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1779 v)); 1780 i = UPS_HIGH_SPEED; 1781 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1782 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1783 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1784 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1785 if (v & EHCI_PS_PR) i |= UPS_RESET; 1786 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1787 USETW(ps.wPortStatus, i); 1788 i = 0; 1789 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1790 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1791 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1792 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1793 USETW(ps.wPortChange, i); 1794 l = min(len, sizeof ps); 1795 memcpy(buf, &ps, l); 1796 totlen = l; 1797 break; 1798 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1799 err = USBD_IOERROR; 1800 goto ret; 1801 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1802 break; 1803 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1804 if (index < 1 || index > sc->sc_noport) { 1805 err = USBD_IOERROR; 1806 goto ret; 1807 } 1808 port = EHCI_PORTSC(index); 1809 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1810 switch(value) { 1811 case UHF_PORT_ENABLE: 1812 EOWRITE4(sc, port, v | EHCI_PS_PE); 1813 break; 1814 case UHF_PORT_SUSPEND: 1815 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1816 break; 1817 case UHF_PORT_RESET: 1818 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1819 index)); 1820 if (EHCI_PS_IS_LOWSPEED(v)) { 1821 /* Low speed device, give up ownership. */ 1822 ehci_disown(sc, index, 1); 1823 break; 1824 } 1825 /* Start reset sequence. */ 1826 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1827 EOWRITE4(sc, port, v | EHCI_PS_PR); 1828 /* Wait for reset to complete. */ 1829 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1830 if (sc->sc_dying) { 1831 err = USBD_IOERROR; 1832 goto ret; 1833 } 1834 /* Terminate reset sequence. */ 1835 EOWRITE4(sc, port, v); 1836 /* Wait for HC to complete reset. */ 1837 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1838 if (sc->sc_dying) { 1839 err = USBD_IOERROR; 1840 goto ret; 1841 } 1842 v = EOREAD4(sc, port); 1843 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1844 if (v & EHCI_PS_PR) { 1845 printf("%s: port reset timeout\n", 1846 USBDEVNAME(sc->sc_bus.bdev)); 1847 return (USBD_TIMEOUT); 1848 } 1849 if (!(v & EHCI_PS_PE)) { 1850 /* Not a high speed device, give up ownership.*/ 1851 ehci_disown(sc, index, 0); 1852 break; 1853 } 1854 sc->sc_isreset = 1; 1855 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1856 index, v)); 1857 break; 1858 case UHF_PORT_POWER: 1859 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1860 "%d\n", index)); 1861 EOWRITE4(sc, port, v | EHCI_PS_PP); 1862 break; 1863 case UHF_PORT_TEST: 1864 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1865 "%d\n", index)); 1866 break; 1867 case UHF_PORT_INDICATOR: 1868 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1869 "%d\n", index)); 1870 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1871 break; 1872 default: 1873 err = USBD_IOERROR; 1874 goto ret; 1875 } 1876 break; 1877 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1878 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1879 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1880 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1881 break; 1882 default: 1883 err = USBD_IOERROR; 1884 goto ret; 1885 } 1886 xfer->actlen = totlen; 1887 err = USBD_NORMAL_COMPLETION; 1888 ret: 1889 xfer->status = err; 1890 s = splusb(); 1891 usb_transfer_complete(xfer); 1892 splx(s); 1893 return (USBD_IN_PROGRESS); 1894 } 1895 1896 void 1897 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1898 { 1899 int port; 1900 u_int32_t v; 1901 1902 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1903 #ifdef DIAGNOSTIC 1904 if (sc->sc_npcomp != 0) { 1905 int i = (index-1) / sc->sc_npcomp; 1906 if (i >= sc->sc_ncomp) 1907 printf("%s: strange port\n", 1908 USBDEVNAME(sc->sc_bus.bdev)); 1909 else 1910 printf("%s: handing over %s speed device on " 1911 "port %d to %s\n", 1912 USBDEVNAME(sc->sc_bus.bdev), 1913 lowspeed ? "low" : "full", 1914 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1915 } else { 1916 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1917 } 1918 #endif 1919 port = EHCI_PORTSC(index); 1920 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1921 EOWRITE4(sc, port, v | EHCI_PS_PO); 1922 } 1923 1924 /* Abort a root control request. */ 1925 Static void 1926 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1927 { 1928 /* Nothing to do, all transfers are synchronous. */ 1929 } 1930 1931 /* Close the root pipe. */ 1932 Static void 1933 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1934 { 1935 DPRINTF(("ehci_root_ctrl_close\n")); 1936 /* Nothing to do. */ 1937 } 1938 1939 void 1940 ehci_root_intr_done(usbd_xfer_handle xfer) 1941 { 1942 xfer->hcpriv = NULL; 1943 } 1944 1945 Static usbd_status 1946 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1947 { 1948 usbd_status err; 1949 1950 /* Insert last in queue. */ 1951 err = usb_insert_transfer(xfer); 1952 if (err) 1953 return (err); 1954 1955 /* Pipe isn't running, start first */ 1956 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1957 } 1958 1959 Static usbd_status 1960 ehci_root_intr_start(usbd_xfer_handle xfer) 1961 { 1962 usbd_pipe_handle pipe = xfer->pipe; 1963 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1964 1965 if (sc->sc_dying) 1966 return (USBD_IOERROR); 1967 1968 sc->sc_intrxfer = xfer; 1969 1970 return (USBD_IN_PROGRESS); 1971 } 1972 1973 /* Abort a root interrupt request. */ 1974 Static void 1975 ehci_root_intr_abort(usbd_xfer_handle xfer) 1976 { 1977 int s; 1978 1979 if (xfer->pipe->intrxfer == xfer) { 1980 DPRINTF(("ehci_root_intr_abort: remove\n")); 1981 xfer->pipe->intrxfer = NULL; 1982 } 1983 xfer->status = USBD_CANCELLED; 1984 s = splusb(); 1985 usb_transfer_complete(xfer); 1986 splx(s); 1987 } 1988 1989 /* Close the root pipe. */ 1990 Static void 1991 ehci_root_intr_close(usbd_pipe_handle pipe) 1992 { 1993 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1994 1995 DPRINTF(("ehci_root_intr_close\n")); 1996 1997 sc->sc_intrxfer = NULL; 1998 } 1999 2000 void 2001 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2002 { 2003 xfer->hcpriv = NULL; 2004 } 2005 2006 /************************/ 2007 2008 ehci_soft_qh_t * 2009 ehci_alloc_sqh(ehci_softc_t *sc) 2010 { 2011 ehci_soft_qh_t *sqh; 2012 usbd_status err; 2013 int i, offs; 2014 usb_dma_t dma; 2015 2016 if (sc->sc_freeqhs == NULL) { 2017 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2018 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2019 EHCI_PAGE_SIZE, &dma); 2020 #ifdef EHCI_DEBUG 2021 if (err) 2022 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2023 #endif 2024 if (err) 2025 return (NULL); 2026 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2027 offs = i * EHCI_SQH_SIZE; 2028 sqh = KERNADDR(&dma, offs); 2029 sqh->physaddr = DMAADDR(&dma, offs); 2030 sqh->next = sc->sc_freeqhs; 2031 sc->sc_freeqhs = sqh; 2032 } 2033 } 2034 sqh = sc->sc_freeqhs; 2035 sc->sc_freeqhs = sqh->next; 2036 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2037 sqh->next = NULL; 2038 return (sqh); 2039 } 2040 2041 void 2042 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2043 { 2044 sqh->next = sc->sc_freeqhs; 2045 sc->sc_freeqhs = sqh; 2046 } 2047 2048 ehci_soft_qtd_t * 2049 ehci_alloc_sqtd(ehci_softc_t *sc) 2050 { 2051 ehci_soft_qtd_t *sqtd; 2052 usbd_status err; 2053 int i, offs; 2054 usb_dma_t dma; 2055 int s; 2056 2057 if (sc->sc_freeqtds == NULL) { 2058 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2059 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2060 EHCI_PAGE_SIZE, &dma); 2061 #ifdef EHCI_DEBUG 2062 if (err) 2063 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2064 #endif 2065 if (err) 2066 return (NULL); 2067 s = splusb(); 2068 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2069 offs = i * EHCI_SQTD_SIZE; 2070 sqtd = KERNADDR(&dma, offs); 2071 sqtd->physaddr = DMAADDR(&dma, offs); 2072 sqtd->nextqtd = sc->sc_freeqtds; 2073 sc->sc_freeqtds = sqtd; 2074 } 2075 splx(s); 2076 } 2077 2078 s = splusb(); 2079 sqtd = sc->sc_freeqtds; 2080 sc->sc_freeqtds = sqtd->nextqtd; 2081 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2082 sqtd->nextqtd = NULL; 2083 sqtd->xfer = NULL; 2084 splx(s); 2085 2086 return (sqtd); 2087 } 2088 2089 void 2090 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2091 { 2092 int s; 2093 2094 s = splusb(); 2095 sqtd->nextqtd = sc->sc_freeqtds; 2096 sc->sc_freeqtds = sqtd; 2097 splx(s); 2098 } 2099 2100 usbd_status 2101 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2102 int alen, int rd, usbd_xfer_handle xfer, 2103 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2104 { 2105 ehci_soft_qtd_t *next, *cur; 2106 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2107 u_int32_t qtdstatus; 2108 int len, curlen, mps; 2109 int i, tog; 2110 usb_dma_t *dma = &xfer->dmabuf; 2111 2112 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2113 2114 len = alen; 2115 dataphys = DMAADDR(dma, 0); 2116 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2117 #if 0 2118 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2119 epipe->nexttoggle); 2120 #endif 2121 qtdstatus = htole32( 2122 EHCI_QTD_ACTIVE | 2123 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2124 EHCI_QTD_SET_CERR(3) 2125 /* IOC set below */ 2126 /* BYTES set below */ 2127 ); 2128 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2129 tog = epipe->nexttoggle; 2130 if (tog) 2131 qtdstatus |= EHCI_QTD_TOGGLE; 2132 2133 cur = ehci_alloc_sqtd(sc); 2134 *sp = cur; 2135 if (cur == NULL) 2136 goto nomem; 2137 for (;;) { 2138 dataphyspage = EHCI_PAGE(dataphys); 2139 /* The EHCI hardware can handle at most 5 pages. */ 2140 if (dataphyslastpage - dataphyspage < 2141 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2142 /* we can handle it in this QTD */ 2143 curlen = len; 2144 } else { 2145 /* must use multiple TDs, fill as much as possible. */ 2146 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2147 EHCI_PAGE_OFFSET(dataphys); 2148 #ifdef DIAGNOSTIC 2149 if (curlen > len) { 2150 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2151 "len=0x%x offs=0x%x\n", curlen, len, 2152 EHCI_PAGE_OFFSET(dataphys)); 2153 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2154 dataphyslastpage, dataphyspage, 2155 dataphys); 2156 curlen = len; 2157 } 2158 #endif 2159 /* the length must be a multiple of the max size */ 2160 curlen -= curlen % mps; 2161 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2162 "curlen=%d\n", curlen)); 2163 #ifdef DIAGNOSTIC 2164 if (curlen == 0) 2165 panic("ehci_alloc_std: curlen == 0"); 2166 #endif 2167 } 2168 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2169 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2170 dataphys, dataphyslastpage, 2171 len, curlen)); 2172 len -= curlen; 2173 2174 if (len != 0) { 2175 next = ehci_alloc_sqtd(sc); 2176 if (next == NULL) 2177 goto nomem; 2178 nextphys = next->physaddr; 2179 } else { 2180 next = NULL; 2181 nextphys = EHCI_NULL; 2182 } 2183 2184 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2185 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2186 if (i != 0) /* use offset only in first buffer */ 2187 a = EHCI_PAGE(a); 2188 cur->qtd.qtd_buffer[i] = htole32(a); 2189 cur->qtd.qtd_buffer_hi[i] = 0; 2190 #ifdef DIAGNOSTIC 2191 if (i >= EHCI_QTD_NBUFFERS) { 2192 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2193 goto nomem; 2194 } 2195 #endif 2196 } 2197 cur->nextqtd = next; 2198 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2199 cur->qtd.qtd_status = 2200 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2201 cur->xfer = xfer; 2202 cur->len = curlen; 2203 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2204 dataphys, dataphys + curlen)); 2205 /* adjust the toggle based on the number of packets in this 2206 qtd */ 2207 if (((curlen + mps - 1) / mps) & 1) { 2208 tog ^= 1; 2209 qtdstatus ^= EHCI_QTD_TOGGLE; 2210 } 2211 if (len == 0) 2212 break; 2213 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2214 dataphys += curlen; 2215 cur = next; 2216 } 2217 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2218 *ep = cur; 2219 epipe->nexttoggle = tog; 2220 2221 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2222 *sp, *ep)); 2223 2224 return (USBD_NORMAL_COMPLETION); 2225 2226 nomem: 2227 /* XXX free chain */ 2228 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2229 return (USBD_NOMEM); 2230 } 2231 2232 Static void 2233 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2234 ehci_soft_qtd_t *sqtdend) 2235 { 2236 ehci_soft_qtd_t *p; 2237 int i; 2238 2239 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2240 sqtd, sqtdend)); 2241 2242 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2243 p = sqtd->nextqtd; 2244 ehci_free_sqtd(sc, sqtd); 2245 } 2246 } 2247 2248 /****************/ 2249 2250 /* 2251 * Close a reqular pipe. 2252 * Assumes that there are no pending transactions. 2253 */ 2254 void 2255 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2256 { 2257 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2258 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2259 ehci_soft_qh_t *sqh = epipe->sqh; 2260 int s; 2261 2262 s = splusb(); 2263 ehci_rem_qh(sc, sqh, head); 2264 splx(s); 2265 ehci_free_sqh(sc, epipe->sqh); 2266 } 2267 2268 /* 2269 * Abort a device request. 2270 * If this routine is called at splusb() it guarantees that the request 2271 * will be removed from the hardware scheduling and that the callback 2272 * for it will be called with USBD_CANCELLED status. 2273 * It's impossible to guarantee that the requested transfer will not 2274 * have happened since the hardware runs concurrently. 2275 * If the transaction has already happened we rely on the ordinary 2276 * interrupt processing to process it. 2277 * XXX This is most probably wrong. 2278 */ 2279 void 2280 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2281 { 2282 #define exfer EXFER(xfer) 2283 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2284 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2285 ehci_soft_qh_t *sqh = epipe->sqh; 2286 ehci_soft_qtd_t *sqtd; 2287 ehci_physaddr_t cur; 2288 u_int32_t qhstatus; 2289 int s; 2290 int hit; 2291 2292 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2293 2294 if (sc->sc_dying) { 2295 /* If we're dying, just do the software part. */ 2296 s = splusb(); 2297 xfer->status = status; /* make software ignore it */ 2298 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2299 usb_transfer_complete(xfer); 2300 splx(s); 2301 return; 2302 } 2303 2304 if (xfer->device->bus->intr_context || !curproc) 2305 panic("ehci_abort_xfer: not in process context"); 2306 2307 /* 2308 * Step 1: Make interrupt routine and hardware ignore xfer. 2309 */ 2310 s = splusb(); 2311 xfer->status = status; /* make software ignore it */ 2312 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2313 qhstatus = sqh->qh.qh_qtd.qtd_status; 2314 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2315 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2316 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2317 if (sqtd == exfer->sqtdend) 2318 break; 2319 } 2320 splx(s); 2321 2322 /* 2323 * Step 2: Wait until we know hardware has finished any possible 2324 * use of the xfer. Also make sure the soft interrupt routine 2325 * has run. 2326 */ 2327 ehci_sync_hc(sc); 2328 s = splusb(); 2329 sc->sc_softwake = 1; 2330 usb_schedsoftintr(&sc->sc_bus); 2331 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2332 splx(s); 2333 2334 /* 2335 * Step 3: Remove any vestiges of the xfer from the hardware. 2336 * The complication here is that the hardware may have executed 2337 * beyond the xfer we're trying to abort. So as we're scanning 2338 * the TDs of this xfer we check if the hardware points to 2339 * any of them. 2340 */ 2341 s = splusb(); /* XXX why? */ 2342 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2343 hit = 0; 2344 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2345 hit |= cur == sqtd->physaddr; 2346 if (sqtd == exfer->sqtdend) 2347 break; 2348 } 2349 sqtd = sqtd->nextqtd; 2350 /* Zap curqtd register if hardware pointed inside the xfer. */ 2351 if (hit && sqtd != NULL) { 2352 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2353 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2354 sqh->qh.qh_qtd.qtd_status = qhstatus; 2355 } else { 2356 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2357 } 2358 2359 /* 2360 * Step 4: Execute callback. 2361 */ 2362 #ifdef DIAGNOSTIC 2363 exfer->isdone = 1; 2364 #endif 2365 usb_transfer_complete(xfer); 2366 2367 splx(s); 2368 #undef exfer 2369 } 2370 2371 void 2372 ehci_timeout(void *addr) 2373 { 2374 struct ehci_xfer *exfer = addr; 2375 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2376 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2377 2378 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2379 #ifdef USB_DEBUG 2380 if (ehcidebug > 1) 2381 usbd_dump_pipe(exfer->xfer.pipe); 2382 #endif 2383 2384 if (sc->sc_dying) { 2385 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2386 return; 2387 } 2388 2389 /* Execute the abort in a process context. */ 2390 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2391 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2392 } 2393 2394 void 2395 ehci_timeout_task(void *addr) 2396 { 2397 usbd_xfer_handle xfer = addr; 2398 int s; 2399 2400 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2401 2402 s = splusb(); 2403 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2404 splx(s); 2405 } 2406 2407 /************************/ 2408 2409 Static usbd_status 2410 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2411 { 2412 usbd_status err; 2413 2414 /* Insert last in queue. */ 2415 err = usb_insert_transfer(xfer); 2416 if (err) 2417 return (err); 2418 2419 /* Pipe isn't running, start first */ 2420 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2421 } 2422 2423 Static usbd_status 2424 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2425 { 2426 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2427 usbd_status err; 2428 2429 if (sc->sc_dying) 2430 return (USBD_IOERROR); 2431 2432 #ifdef DIAGNOSTIC 2433 if (!(xfer->rqflags & URQ_REQUEST)) { 2434 /* XXX panic */ 2435 printf("ehci_device_ctrl_transfer: not a request\n"); 2436 return (USBD_INVAL); 2437 } 2438 #endif 2439 2440 err = ehci_device_request(xfer); 2441 if (err) 2442 return (err); 2443 2444 if (sc->sc_bus.use_polling) 2445 ehci_waitintr(sc, xfer); 2446 return (USBD_IN_PROGRESS); 2447 } 2448 2449 void 2450 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2451 { 2452 struct ehci_xfer *ex = EXFER(xfer); 2453 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2454 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2455 2456 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2457 2458 #ifdef DIAGNOSTIC 2459 if (!(xfer->rqflags & URQ_REQUEST)) { 2460 panic("ehci_ctrl_done: not a request"); 2461 } 2462 #endif 2463 2464 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2465 ehci_del_intr_list(ex); /* remove from active list */ 2466 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2467 } 2468 2469 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2470 } 2471 2472 /* Abort a device control request. */ 2473 Static void 2474 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2475 { 2476 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2477 ehci_abort_xfer(xfer, USBD_CANCELLED); 2478 } 2479 2480 /* Close a device control pipe. */ 2481 Static void 2482 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2483 { 2484 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2485 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2486 2487 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2488 ehci_close_pipe(pipe, sc->sc_async_head); 2489 } 2490 2491 usbd_status 2492 ehci_device_request(usbd_xfer_handle xfer) 2493 { 2494 #define exfer EXFER(xfer) 2495 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2496 usb_device_request_t *req = &xfer->request; 2497 usbd_device_handle dev = epipe->pipe.device; 2498 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2499 int addr = dev->address; 2500 ehci_soft_qtd_t *setup, *stat, *next; 2501 ehci_soft_qh_t *sqh; 2502 int isread; 2503 int len; 2504 usbd_status err; 2505 int s; 2506 2507 isread = req->bmRequestType & UT_READ; 2508 len = UGETW(req->wLength); 2509 2510 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2511 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2512 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2513 UGETW(req->wIndex), len, addr, 2514 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2515 2516 setup = ehci_alloc_sqtd(sc); 2517 if (setup == NULL) { 2518 err = USBD_NOMEM; 2519 goto bad1; 2520 } 2521 stat = ehci_alloc_sqtd(sc); 2522 if (stat == NULL) { 2523 err = USBD_NOMEM; 2524 goto bad2; 2525 } 2526 2527 sqh = epipe->sqh; 2528 epipe->u.ctl.length = len; 2529 2530 /* XXX 2531 * Since we're messing with the QH we must know the HC is in sync. 2532 * This needs to go away since it slows down control transfers. 2533 * Removing it entails: 2534 * - fill the QH only once with addr & wMaxPacketSize 2535 */ 2536 /* ehci_sync_hc(sc); */ 2537 /* Update device address and length since they may have changed. */ 2538 /* XXX This only needs to be done once, but it's too early in open. */ 2539 /* XXXX Should not touch ED here! */ 2540 sqh->qh.qh_endp = 2541 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2542 htole32( 2543 EHCI_QH_SET_ADDR(addr) | 2544 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2545 ); 2546 2547 /* Set up data transaction */ 2548 if (len != 0) { 2549 ehci_soft_qtd_t *end; 2550 2551 /* Start toggle at 1. */ 2552 epipe->nexttoggle = 1; 2553 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2554 &next, &end); 2555 if (err) 2556 goto bad3; 2557 end->nextqtd = stat; 2558 end->qtd.qtd_next = 2559 end->qtd.qtd_altnext = htole32(stat->physaddr); 2560 } else { 2561 next = stat; 2562 } 2563 2564 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2565 2566 /* Clear toggle */ 2567 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2568 setup->qtd.qtd_status = htole32( 2569 EHCI_QTD_ACTIVE | 2570 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2571 EHCI_QTD_SET_CERR(3) | 2572 EHCI_QTD_SET_BYTES(sizeof *req) 2573 ); 2574 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2575 setup->qtd.qtd_buffer_hi[0] = 0; 2576 setup->nextqtd = next; 2577 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2578 setup->xfer = xfer; 2579 setup->len = sizeof *req; 2580 2581 stat->qtd.qtd_status = htole32( 2582 EHCI_QTD_ACTIVE | 2583 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2584 EHCI_QTD_SET_CERR(3) | 2585 EHCI_QTD_TOGGLE | 2586 EHCI_QTD_IOC 2587 ); 2588 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2589 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2590 stat->nextqtd = NULL; 2591 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2592 stat->xfer = xfer; 2593 stat->len = 0; 2594 2595 #ifdef EHCI_DEBUG 2596 if (ehcidebug > 5) { 2597 DPRINTF(("ehci_device_request:\n")); 2598 ehci_dump_sqh(sqh); 2599 ehci_dump_sqtds(setup); 2600 } 2601 #endif 2602 2603 exfer->sqtdstart = setup; 2604 exfer->sqtdend = stat; 2605 #ifdef DIAGNOSTIC 2606 if (!exfer->isdone) { 2607 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2608 } 2609 exfer->isdone = 0; 2610 #endif 2611 2612 /* Insert qTD in QH list. */ 2613 s = splusb(); 2614 ehci_set_qh_qtd(sqh, setup); 2615 if (xfer->timeout && !sc->sc_bus.use_polling) { 2616 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2617 ehci_timeout, xfer); 2618 } 2619 ehci_add_intr_list(sc, exfer); 2620 xfer->status = USBD_IN_PROGRESS; 2621 splx(s); 2622 2623 #ifdef EHCI_DEBUG 2624 if (ehcidebug > 10) { 2625 DPRINTF(("ehci_device_request: status=%x\n", 2626 EOREAD4(sc, EHCI_USBSTS))); 2627 delay(10000); 2628 ehci_dump_regs(sc); 2629 ehci_dump_sqh(sc->sc_async_head); 2630 ehci_dump_sqh(sqh); 2631 ehci_dump_sqtds(setup); 2632 } 2633 #endif 2634 2635 return (USBD_NORMAL_COMPLETION); 2636 2637 bad3: 2638 ehci_free_sqtd(sc, stat); 2639 bad2: 2640 ehci_free_sqtd(sc, setup); 2641 bad1: 2642 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2643 xfer->status = err; 2644 usb_transfer_complete(xfer); 2645 return (err); 2646 #undef exfer 2647 } 2648 2649 /************************/ 2650 2651 Static usbd_status 2652 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2653 { 2654 usbd_status err; 2655 2656 /* Insert last in queue. */ 2657 err = usb_insert_transfer(xfer); 2658 if (err) 2659 return (err); 2660 2661 /* Pipe isn't running, start first */ 2662 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2663 } 2664 2665 usbd_status 2666 ehci_device_bulk_start(usbd_xfer_handle xfer) 2667 { 2668 #define exfer EXFER(xfer) 2669 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2670 usbd_device_handle dev = epipe->pipe.device; 2671 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2672 ehci_soft_qtd_t *data, *dataend; 2673 ehci_soft_qh_t *sqh; 2674 usbd_status err; 2675 int len, isread, endpt; 2676 int s; 2677 2678 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2679 xfer, xfer->length, xfer->flags)); 2680 2681 if (sc->sc_dying) 2682 return (USBD_IOERROR); 2683 2684 #ifdef DIAGNOSTIC 2685 if (xfer->rqflags & URQ_REQUEST) 2686 panic("ehci_device_bulk_transfer: a request"); 2687 #endif 2688 2689 len = xfer->length; 2690 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2691 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2692 sqh = epipe->sqh; 2693 2694 epipe->u.bulk.length = len; 2695 2696 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2697 &dataend); 2698 if (err) { 2699 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2700 xfer->status = err; 2701 usb_transfer_complete(xfer); 2702 return (err); 2703 } 2704 2705 #ifdef EHCI_DEBUG 2706 if (ehcidebug > 5) { 2707 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2708 ehci_dump_sqh(sqh); 2709 ehci_dump_sqtds(data); 2710 } 2711 #endif 2712 2713 /* Set up interrupt info. */ 2714 exfer->sqtdstart = data; 2715 exfer->sqtdend = dataend; 2716 #ifdef DIAGNOSTIC 2717 if (!exfer->isdone) { 2718 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2719 } 2720 exfer->isdone = 0; 2721 #endif 2722 2723 s = splusb(); 2724 ehci_set_qh_qtd(sqh, data); 2725 if (xfer->timeout && !sc->sc_bus.use_polling) { 2726 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2727 ehci_timeout, xfer); 2728 } 2729 ehci_add_intr_list(sc, exfer); 2730 xfer->status = USBD_IN_PROGRESS; 2731 splx(s); 2732 2733 #ifdef EHCI_DEBUG 2734 if (ehcidebug > 10) { 2735 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2736 delay(10000); 2737 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2738 ehci_dump_regs(sc); 2739 #if 0 2740 printf("async_head:\n"); 2741 ehci_dump_sqh(sc->sc_async_head); 2742 #endif 2743 printf("sqh:\n"); 2744 ehci_dump_sqh(sqh); 2745 ehci_dump_sqtds(data); 2746 } 2747 #endif 2748 2749 if (sc->sc_bus.use_polling) 2750 ehci_waitintr(sc, xfer); 2751 2752 return (USBD_IN_PROGRESS); 2753 #undef exfer 2754 } 2755 2756 Static void 2757 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2758 { 2759 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2760 ehci_abort_xfer(xfer, USBD_CANCELLED); 2761 } 2762 2763 /* 2764 * Close a device bulk pipe. 2765 */ 2766 Static void 2767 ehci_device_bulk_close(usbd_pipe_handle pipe) 2768 { 2769 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2770 2771 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2772 ehci_close_pipe(pipe, sc->sc_async_head); 2773 } 2774 2775 void 2776 ehci_device_bulk_done(usbd_xfer_handle xfer) 2777 { 2778 struct ehci_xfer *ex = EXFER(xfer); 2779 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2780 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2781 2782 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2783 xfer, xfer->actlen)); 2784 2785 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2786 ehci_del_intr_list(ex); /* remove from active list */ 2787 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2788 } 2789 2790 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2791 } 2792 2793 /************************/ 2794 2795 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2796 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2797 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2798 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2799 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2800 2801 /************************/ 2802 2803 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2804 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2805 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2806 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2807 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2808
Indexes created Mon Sep 22 13:09:51 GMT 2025