ehci.c revision 1.61
1 /* $NetBSD: ehci.c,v 1.61 2004/06/22 18:05:18 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite compolicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.61 2004/06/22 18:05:18 mycroft Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) if (ehcidebug) printf x 96 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 /* Reset the controller */ 363 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 364 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 365 usb_delay_ms(&sc->sc_bus, 1); 366 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 367 for (i = 0; i < 100; i++) { 368 usb_delay_ms(&sc->sc_bus, 1); 369 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 370 if (!hcr) 371 break; 372 } 373 if (hcr) { 374 aprint_error("%s: reset timeout\n", 375 USBDEVNAME(sc->sc_bus.bdev)); 376 return (USBD_IOERROR); 377 } 378 379 /* frame list size at default, read back what we got and use that */ 380 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 381 case 0: sc->sc_flsize = 1024*4; break; 382 case 1: sc->sc_flsize = 512*4; break; 383 case 2: sc->sc_flsize = 256*4; break; 384 case 3: return (USBD_IOERROR); 385 } 386 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 387 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 388 if (err) 389 return (err); 390 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 391 392 /* Set up the bus struct. */ 393 sc->sc_bus.methods = &ehci_bus_methods; 394 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 395 396 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 397 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 398 399 sc->sc_eintrs = EHCI_NORMAL_INTRS; 400 401 /* Allocate dummy QH that starts the async list. */ 402 sqh = ehci_alloc_sqh(sc); 403 if (sqh == NULL) { 404 err = USBD_NOMEM; 405 goto bad1; 406 } 407 /* Fill the QH */ 408 sqh->qh.qh_endp = 409 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 410 sqh->qh.qh_link = 411 htole32(sqh->physaddr | EHCI_LINK_QH); 412 sqh->qh.qh_curqtd = EHCI_NULL; 413 sqh->next = NULL; 414 /* Fill the overlay qTD */ 415 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 416 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 417 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 418 sqh->sqtd = NULL; 419 #ifdef EHCI_DEBUG 420 if (ehcidebug) { 421 ehci_dump_sqh(sqh); 422 } 423 #endif 424 425 /* Point to async list */ 426 sc->sc_async_head = sqh; 427 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 428 429 usb_callout_init(sc->sc_tmo_pcd); 430 431 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 432 433 /* Enable interrupts */ 434 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 435 436 /* Turn on controller */ 437 EOWRITE4(sc, EHCI_USBCMD, 438 EHCI_CMD_ITC_8 | /* 8 microframes */ 439 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 440 EHCI_CMD_ASE | 441 /* EHCI_CMD_PSE | */ 442 EHCI_CMD_RS); 443 444 /* Take over port ownership */ 445 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 446 447 for (i = 0; i < 100; i++) { 448 usb_delay_ms(&sc->sc_bus, 1); 449 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 450 if (!hcr) 451 break; 452 } 453 if (hcr) { 454 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 455 return (USBD_IOERROR); 456 } 457 458 return (USBD_NORMAL_COMPLETION); 459 460 #if 0 461 bad2: 462 ehci_free_sqh(sc, sc->sc_async_head); 463 #endif 464 bad1: 465 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 466 return (err); 467 } 468 469 int 470 ehci_intr(void *v) 471 { 472 ehci_softc_t *sc = v; 473 474 if (sc == NULL || sc->sc_dying) 475 return (0); 476 477 /* If we get an interrupt while polling, then just ignore it. */ 478 if (sc->sc_bus.use_polling) { 479 #ifdef DIAGNOSTIC 480 printf("ehci_intr: ignored interrupt while polling\n"); 481 #endif 482 return (0); 483 } 484 485 return (ehci_intr1(sc)); 486 } 487 488 Static int 489 ehci_intr1(ehci_softc_t *sc) 490 { 491 u_int32_t intrs, eintrs; 492 493 DPRINTFN(20,("ehci_intr1: enter\n")); 494 495 /* In case the interrupt occurs before initialization has completed. */ 496 if (sc == NULL) { 497 #ifdef DIAGNOSTIC 498 printf("ehci_intr: sc == NULL\n"); 499 #endif 500 return (0); 501 } 502 503 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 504 505 if (!intrs) 506 return (0); 507 508 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 509 eintrs = intrs & sc->sc_eintrs; 510 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 511 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 512 (u_int)eintrs)); 513 if (!eintrs) 514 return (0); 515 516 sc->sc_bus.intr_context++; 517 sc->sc_bus.no_intrs++; 518 if (eintrs & EHCI_STS_IAA) { 519 DPRINTF(("ehci_intr1: door bell\n")); 520 wakeup(&sc->sc_async_head); 521 eintrs &= ~EHCI_STS_IAA; 522 } 523 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 524 DPRINTFN(5,("ehci_intr1: %s %s\n", 525 eintrs & EHCI_STS_INT ? "INT" : "", 526 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 527 usb_schedsoftintr(&sc->sc_bus); 528 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 529 } 530 if (eintrs & EHCI_STS_HSE) { 531 printf("%s: unrecoverable error, controller halted\n", 532 USBDEVNAME(sc->sc_bus.bdev)); 533 /* XXX what else */ 534 } 535 if (eintrs & EHCI_STS_PCD) { 536 ehci_pcd(sc, sc->sc_intrxfer); 537 /* 538 * Disable PCD interrupt for now, because it will be 539 * on until the port has been reset. 540 */ 541 ehci_pcd_able(sc, 0); 542 /* Do not allow RHSC interrupts > 1 per second */ 543 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 544 eintrs &= ~EHCI_STS_PCD; 545 } 546 547 sc->sc_bus.intr_context--; 548 549 if (eintrs != 0) { 550 /* Block unprocessed interrupts. */ 551 sc->sc_eintrs &= ~eintrs; 552 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 553 printf("%s: blocking intrs 0x%x\n", 554 USBDEVNAME(sc->sc_bus.bdev), eintrs); 555 } 556 557 return (1); 558 } 559 560 void 561 ehci_pcd_able(ehci_softc_t *sc, int on) 562 { 563 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 564 if (on) 565 sc->sc_eintrs |= EHCI_STS_PCD; 566 else 567 sc->sc_eintrs &= ~EHCI_STS_PCD; 568 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 569 } 570 571 void 572 ehci_pcd_enable(void *v_sc) 573 { 574 ehci_softc_t *sc = v_sc; 575 576 ehci_pcd_able(sc, 1); 577 } 578 579 void 580 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 581 { 582 usbd_pipe_handle pipe; 583 u_char *p; 584 int i, m; 585 586 if (xfer == NULL) { 587 /* Just ignore the change. */ 588 return; 589 } 590 591 pipe = xfer->pipe; 592 593 p = KERNADDR(&xfer->dmabuf, 0); 594 m = min(sc->sc_noport, xfer->length * 8 - 1); 595 memset(p, 0, xfer->length); 596 for (i = 1; i <= m; i++) { 597 /* Pick out CHANGE bits from the status reg. */ 598 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 599 p[i/8] |= 1 << (i%8); 600 } 601 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 602 xfer->actlen = xfer->length; 603 xfer->status = USBD_NORMAL_COMPLETION; 604 605 usb_transfer_complete(xfer); 606 } 607 608 void 609 ehci_softintr(void *v) 610 { 611 ehci_softc_t *sc = v; 612 struct ehci_xfer *ex, *nextex; 613 614 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 615 sc->sc_bus.intr_context)); 616 617 sc->sc_bus.intr_context++; 618 619 /* 620 * The only explanation I can think of for why EHCI is as brain dead 621 * as UHCI interrupt-wise is that Intel was involved in both. 622 * An interrupt just tells us that something is done, we have no 623 * clue what, so we need to scan through all active transfers. :-( 624 */ 625 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 626 nextex = LIST_NEXT(ex, inext); 627 ehci_check_intr(sc, ex); 628 } 629 630 if (sc->sc_softwake) { 631 sc->sc_softwake = 0; 632 wakeup(&sc->sc_softwake); 633 } 634 635 sc->sc_bus.intr_context--; 636 } 637 638 /* Check for an interrupt. */ 639 void 640 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 641 { 642 ehci_soft_qtd_t *sqtd, *lsqtd; 643 u_int32_t status; 644 645 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 646 647 if (ex->sqtdstart == NULL) { 648 printf("ehci_check_intr: sqtdstart=NULL\n"); 649 return; 650 } 651 lsqtd = ex->sqtdend; 652 #ifdef DIAGNOSTIC 653 if (lsqtd == NULL) { 654 printf("ehci_check_intr: sqtd==0\n"); 655 return; 656 } 657 #endif 658 /* 659 * If the last TD is still active we need to check whether there 660 * is a an error somewhere in the middle, or whether there was a 661 * short packet (SPD and not ACTIVE). 662 */ 663 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 664 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 665 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 666 status = le32toh(sqtd->qtd.qtd_status); 667 /* If there's an active QTD the xfer isn't done. */ 668 if (status & EHCI_QTD_ACTIVE) 669 break; 670 /* Any kind of error makes the xfer done. */ 671 if (status & EHCI_QTD_HALTED) 672 goto done; 673 /* We want short packets, and it is short: it's done */ 674 if (EHCI_QTD_GET_BYTES(status) != 0) 675 goto done; 676 } 677 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 678 ex, ex->sqtdstart)); 679 return; 680 } 681 done: 682 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 683 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 684 ehci_idone(ex); 685 } 686 687 void 688 ehci_idone(struct ehci_xfer *ex) 689 { 690 usbd_xfer_handle xfer = &ex->xfer; 691 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 692 ehci_soft_qtd_t *sqtd; 693 u_int32_t status = 0, nstatus; 694 int actlen; 695 696 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 697 #ifdef DIAGNOSTIC 698 { 699 int s = splhigh(); 700 if (ex->isdone) { 701 splx(s); 702 #ifdef EHCI_DEBUG 703 printf("ehci_idone: ex is done!\n "); 704 ehci_dump_exfer(ex); 705 #else 706 printf("ehci_idone: ex=%p is done!\n", ex); 707 #endif 708 return; 709 } 710 ex->isdone = 1; 711 splx(s); 712 } 713 #endif 714 715 if (xfer->status == USBD_CANCELLED || 716 xfer->status == USBD_TIMEOUT) { 717 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 718 return; 719 } 720 721 #ifdef EHCI_DEBUG 722 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 723 if (ehcidebug > 10) 724 ehci_dump_sqtds(ex->sqtdstart); 725 #endif 726 727 /* The transfer is done, compute actual length and status. */ 728 actlen = 0; 729 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 730 nstatus = le32toh(sqtd->qtd.qtd_status); 731 if (nstatus & EHCI_QTD_ACTIVE) 732 break; 733 734 status = nstatus; 735 /* halt is ok if descriptor is last, and complete */ 736 if (sqtd->qtd.qtd_next == EHCI_NULL && 737 EHCI_QTD_GET_BYTES(status) == 0) 738 status &= ~EHCI_QTD_HALTED; 739 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 740 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 741 } 742 743 /* If there are left over TDs we need to update the toggle. */ 744 if (sqtd != NULL) { 745 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 746 #if 0 747 ehci_dump_sqh(epipe->sqh); 748 ehci_dump_sqtds(ex->sqtdstart); 749 #endif 750 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 751 } 752 753 status &= EHCI_QTD_STATERRS; 754 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 755 xfer->length, actlen, status)); 756 xfer->actlen = actlen; 757 if (status != 0) { 758 #ifdef EHCI_DEBUG 759 char sbuf[128]; 760 761 bitmask_snprintf((u_int32_t)status, 762 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 763 "\7HALTED", 764 sbuf, sizeof(sbuf)); 765 766 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 767 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 768 "status 0x%s\n", 769 xfer->pipe->device->address, 770 xfer->pipe->endpoint->edesc->bEndpointAddress, 771 sbuf)); 772 if (ehcidebug > 2) { 773 ehci_dump_sqh(epipe->sqh); 774 ehci_dump_sqtds(ex->sqtdstart); 775 } 776 #endif 777 if (status == EHCI_QTD_HALTED) 778 xfer->status = USBD_STALLED; 779 else 780 xfer->status = USBD_IOERROR; /* more info XXX */ 781 } else { 782 xfer->status = USBD_NORMAL_COMPLETION; 783 } 784 785 usb_transfer_complete(xfer); 786 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 787 } 788 789 /* 790 * Wait here until controller claims to have an interrupt. 791 * Then call ehci_intr and return. Use timeout to avoid waiting 792 * too long. 793 */ 794 void 795 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 796 { 797 int timo = xfer->timeout; 798 int usecs; 799 u_int32_t intrs; 800 801 xfer->status = USBD_IN_PROGRESS; 802 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 803 usb_delay_ms(&sc->sc_bus, 1); 804 if (sc->sc_dying) 805 break; 806 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 807 sc->sc_eintrs; 808 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 809 #ifdef OHCI_DEBUG 810 if (ehcidebug > 15) 811 ehci_dump_regs(sc); 812 #endif 813 if (intrs) { 814 ehci_intr1(sc); 815 if (xfer->status != USBD_IN_PROGRESS) 816 return; 817 } 818 } 819 820 /* Timeout */ 821 DPRINTF(("ehci_waitintr: timeout\n")); 822 xfer->status = USBD_TIMEOUT; 823 usb_transfer_complete(xfer); 824 /* XXX should free TD */ 825 } 826 827 void 828 ehci_poll(struct usbd_bus *bus) 829 { 830 ehci_softc_t *sc = (ehci_softc_t *)bus; 831 #ifdef EHCI_DEBUG 832 static int last; 833 int new; 834 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 835 if (new != last) { 836 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 837 last = new; 838 } 839 #endif 840 841 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 842 ehci_intr1(sc); 843 } 844 845 int 846 ehci_detach(struct ehci_softc *sc, int flags) 847 { 848 int rv = 0; 849 850 if (sc->sc_child != NULL) 851 rv = config_detach(sc->sc_child, flags); 852 853 if (rv != 0) 854 return (rv); 855 856 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 857 858 if (sc->sc_powerhook != NULL) 859 powerhook_disestablish(sc->sc_powerhook); 860 if (sc->sc_shutdownhook != NULL) 861 shutdownhook_disestablish(sc->sc_shutdownhook); 862 863 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 864 865 /* XXX free other data structures XXX */ 866 867 return (rv); 868 } 869 870 871 int 872 ehci_activate(device_ptr_t self, enum devact act) 873 { 874 struct ehci_softc *sc = (struct ehci_softc *)self; 875 int rv = 0; 876 877 switch (act) { 878 case DVACT_ACTIVATE: 879 return (EOPNOTSUPP); 880 881 case DVACT_DEACTIVATE: 882 if (sc->sc_child != NULL) 883 rv = config_deactivate(sc->sc_child); 884 sc->sc_dying = 1; 885 break; 886 } 887 return (rv); 888 } 889 890 /* 891 * Handle suspend/resume. 892 * 893 * We need to switch to polling mode here, because this routine is 894 * called from an intterupt context. This is all right since we 895 * are almost suspended anyway. 896 */ 897 void 898 ehci_power(int why, void *v) 899 { 900 ehci_softc_t *sc = v; 901 //u_int32_t ctl; 902 int s; 903 904 #ifdef EHCI_DEBUG 905 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 906 ehci_dump_regs(sc); 907 #endif 908 909 s = splhardusb(); 910 switch (why) { 911 case PWR_SUSPEND: 912 case PWR_STANDBY: 913 sc->sc_bus.use_polling++; 914 #if 0 915 OOO 916 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 917 if (sc->sc_control == 0) { 918 /* 919 * Preserve register values, in case that APM BIOS 920 * does not recover them. 921 */ 922 sc->sc_control = ctl; 923 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 924 } 925 ctl |= EHCI_HCFS_SUSPEND; 926 OWRITE4(sc, EHCI_CONTROL, ctl); 927 #endif 928 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 929 sc->sc_bus.use_polling--; 930 break; 931 case PWR_RESUME: 932 sc->sc_bus.use_polling++; 933 #if 0 934 OOO 935 /* Some broken BIOSes do not recover these values */ 936 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 937 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 938 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 939 if (sc->sc_intre) 940 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 941 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 942 if (sc->sc_control) 943 ctl = sc->sc_control; 944 else 945 ctl = OREAD4(sc, EHCI_CONTROL); 946 ctl |= EHCI_HCFS_RESUME; 947 OWRITE4(sc, EHCI_CONTROL, ctl); 948 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 949 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 950 OWRITE4(sc, EHCI_CONTROL, ctl); 951 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 952 sc->sc_control = sc->sc_intre = 0; 953 #endif 954 sc->sc_bus.use_polling--; 955 break; 956 case PWR_SOFTSUSPEND: 957 case PWR_SOFTSTANDBY: 958 case PWR_SOFTRESUME: 959 break; 960 } 961 splx(s); 962 } 963 964 /* 965 * Shut down the controller when the system is going down. 966 */ 967 void 968 ehci_shutdown(void *v) 969 { 970 ehci_softc_t *sc = v; 971 972 DPRINTF(("ehci_shutdown: stopping the HC\n")); 973 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 974 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 975 } 976 977 usbd_status 978 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 979 { 980 struct ehci_softc *sc = (struct ehci_softc *)bus; 981 usbd_status err; 982 983 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 984 #ifdef EHCI_DEBUG 985 if (err) 986 printf("ehci_allocm: usb_allocmem()=%d\n", err); 987 #endif 988 return (err); 989 } 990 991 void 992 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 993 { 994 struct ehci_softc *sc = (struct ehci_softc *)bus; 995 996 usb_freemem(&sc->sc_bus, dma); 997 } 998 999 usbd_xfer_handle 1000 ehci_allocx(struct usbd_bus *bus) 1001 { 1002 struct ehci_softc *sc = (struct ehci_softc *)bus; 1003 usbd_xfer_handle xfer; 1004 1005 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1006 if (xfer != NULL) { 1007 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1008 #ifdef DIAGNOSTIC 1009 if (xfer->busy_free != XFER_FREE) { 1010 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1011 xfer->busy_free); 1012 } 1013 #endif 1014 } else { 1015 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1016 } 1017 if (xfer != NULL) { 1018 memset(xfer, 0, sizeof (struct ehci_xfer)); 1019 #ifdef DIAGNOSTIC 1020 EXFER(xfer)->isdone = 1; 1021 xfer->busy_free = XFER_BUSY; 1022 #endif 1023 } 1024 return (xfer); 1025 } 1026 1027 void 1028 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1029 { 1030 struct ehci_softc *sc = (struct ehci_softc *)bus; 1031 1032 #ifdef DIAGNOSTIC 1033 if (xfer->busy_free != XFER_BUSY) { 1034 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1035 xfer->busy_free); 1036 return; 1037 } 1038 xfer->busy_free = XFER_FREE; 1039 if (!EXFER(xfer)->isdone) { 1040 printf("ehci_freex: !isdone\n"); 1041 return; 1042 } 1043 #endif 1044 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1045 } 1046 1047 Static void 1048 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1049 { 1050 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1051 1052 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1053 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1054 #ifdef USB_DEBUG 1055 if (ehcidebug) 1056 usbd_dump_pipe(pipe); 1057 #endif 1058 epipe->nexttoggle = 0; 1059 } 1060 1061 Static void 1062 ehci_noop(usbd_pipe_handle pipe) 1063 { 1064 } 1065 1066 #ifdef EHCI_DEBUG 1067 void 1068 ehci_dump_regs(ehci_softc_t *sc) 1069 { 1070 int i; 1071 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1072 EOREAD4(sc, EHCI_USBCMD), 1073 EOREAD4(sc, EHCI_USBSTS), 1074 EOREAD4(sc, EHCI_USBINTR)); 1075 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1076 EOREAD4(sc, EHCI_FRINDEX), 1077 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1078 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1079 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1080 for (i = 1; i <= sc->sc_noport; i++) 1081 printf("port %d status=0x%08x\n", i, 1082 EOREAD4(sc, EHCI_PORTSC(i))); 1083 } 1084 1085 /* 1086 * Unused function - this is meant to be called from a kernel 1087 * debugger. 1088 */ 1089 void 1090 ehci_dump() 1091 { 1092 ehci_dump_regs(theehci); 1093 } 1094 1095 void 1096 ehci_dump_link(ehci_link_t link, int type) 1097 { 1098 link = le32toh(link); 1099 printf("0x%08x", link); 1100 if (link & EHCI_LINK_TERMINATE) 1101 printf("<T>"); 1102 else { 1103 printf("<"); 1104 if (type) { 1105 switch (EHCI_LINK_TYPE(link)) { 1106 case EHCI_LINK_ITD: printf("ITD"); break; 1107 case EHCI_LINK_QH: printf("QH"); break; 1108 case EHCI_LINK_SITD: printf("SITD"); break; 1109 case EHCI_LINK_FSTN: printf("FSTN"); break; 1110 } 1111 } 1112 printf(">"); 1113 } 1114 } 1115 1116 void 1117 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1118 { 1119 int i; 1120 u_int32_t stop; 1121 1122 stop = 0; 1123 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1124 ehci_dump_sqtd(sqtd); 1125 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1126 } 1127 if (sqtd) 1128 printf("dump aborted, too many TDs\n"); 1129 } 1130 1131 void 1132 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1133 { 1134 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1135 ehci_dump_qtd(&sqtd->qtd); 1136 } 1137 1138 void 1139 ehci_dump_qtd(ehci_qtd_t *qtd) 1140 { 1141 u_int32_t s; 1142 char sbuf[128]; 1143 1144 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1145 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1146 printf("\n"); 1147 s = le32toh(qtd->qtd_status); 1148 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1149 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1150 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1151 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1152 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1153 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1154 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1155 EHCI_QTD_GET_PID(s), sbuf); 1156 for (s = 0; s < 5; s++) 1157 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1158 } 1159 1160 void 1161 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1162 { 1163 ehci_qh_t *qh = &sqh->qh; 1164 u_int32_t endp, endphub; 1165 1166 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1167 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1168 endp = le32toh(qh->qh_endp); 1169 printf(" endp=0x%08x\n", endp); 1170 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1171 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1172 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1173 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1174 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1175 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1176 EHCI_QH_GET_NRL(endp)); 1177 endphub = le32toh(qh->qh_endphub); 1178 printf(" endphub=0x%08x\n", endphub); 1179 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1180 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1181 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1182 EHCI_QH_GET_MULT(endphub)); 1183 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1184 printf("Overlay qTD:\n"); 1185 ehci_dump_qtd(&qh->qh_qtd); 1186 } 1187 1188 #ifdef DIAGNOSTIC 1189 Static void 1190 ehci_dump_exfer(struct ehci_xfer *ex) 1191 { 1192 printf("ehci_dump_exfer: ex=%p\n", ex); 1193 } 1194 #endif 1195 #endif 1196 1197 usbd_status 1198 ehci_open(usbd_pipe_handle pipe) 1199 { 1200 usbd_device_handle dev = pipe->device; 1201 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1202 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1203 u_int8_t addr = dev->address; 1204 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1205 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1206 ehci_soft_qh_t *sqh; 1207 usbd_status err; 1208 int s; 1209 int speed, naks; 1210 1211 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1212 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1213 1214 if (sc->sc_dying) 1215 return (USBD_IOERROR); 1216 1217 epipe->nexttoggle = 0; 1218 1219 if (addr == sc->sc_addr) { 1220 switch (ed->bEndpointAddress) { 1221 case USB_CONTROL_ENDPOINT: 1222 pipe->methods = &ehci_root_ctrl_methods; 1223 break; 1224 case UE_DIR_IN | EHCI_INTR_ENDPT: 1225 pipe->methods = &ehci_root_intr_methods; 1226 break; 1227 default: 1228 return (USBD_INVAL); 1229 } 1230 return (USBD_NORMAL_COMPLETION); 1231 } 1232 1233 /* XXX All this stuff is only valid for async. */ 1234 switch (dev->speed) { 1235 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1236 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1237 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1238 default: panic("ehci_open: bad device speed %d", dev->speed); 1239 } 1240 naks = 8; /* XXX */ 1241 sqh = ehci_alloc_sqh(sc); 1242 if (sqh == NULL) 1243 goto bad0; 1244 /* qh_link filled when the QH is added */ 1245 sqh->qh.qh_endp = htole32( 1246 EHCI_QH_SET_ADDR(addr) | 1247 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1248 EHCI_QH_SET_EPS(speed) | 1249 EHCI_QH_DTC | 1250 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1251 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1252 EHCI_QH_CTL : 0) | 1253 EHCI_QH_SET_NRL(naks) 1254 ); 1255 sqh->qh.qh_endphub = htole32( 1256 EHCI_QH_SET_MULT(1) 1257 /* XXX TT stuff */ 1258 /* XXX interrupt mask */ 1259 ); 1260 sqh->qh.qh_curqtd = EHCI_NULL; 1261 /* Fill the overlay qTD */ 1262 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1263 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1264 sqh->qh.qh_qtd.qtd_status = htole32(0); 1265 1266 epipe->sqh = sqh; 1267 1268 switch (xfertype) { 1269 case UE_CONTROL: 1270 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1271 0, &epipe->u.ctl.reqdma); 1272 #ifdef EHCI_DEBUG 1273 if (err) 1274 printf("ehci_open: usb_allocmem()=%d\n", err); 1275 #endif 1276 if (err) 1277 goto bad1; 1278 pipe->methods = &ehci_device_ctrl_methods; 1279 s = splusb(); 1280 ehci_add_qh(sqh, sc->sc_async_head); 1281 splx(s); 1282 break; 1283 case UE_BULK: 1284 pipe->methods = &ehci_device_bulk_methods; 1285 s = splusb(); 1286 ehci_add_qh(sqh, sc->sc_async_head); 1287 splx(s); 1288 break; 1289 case UE_INTERRUPT: 1290 pipe->methods = &ehci_device_intr_methods; 1291 return (USBD_INVAL); 1292 case UE_ISOCHRONOUS: 1293 pipe->methods = &ehci_device_isoc_methods; 1294 return (USBD_INVAL); 1295 default: 1296 return (USBD_INVAL); 1297 } 1298 return (USBD_NORMAL_COMPLETION); 1299 1300 bad1: 1301 ehci_free_sqh(sc, sqh); 1302 bad0: 1303 return (USBD_NOMEM); 1304 } 1305 1306 /* 1307 * Add an ED to the schedule. Called at splusb(). 1308 */ 1309 void 1310 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1311 { 1312 SPLUSBCHECK; 1313 1314 sqh->next = head->next; 1315 sqh->qh.qh_link = head->qh.qh_link; 1316 head->next = sqh; 1317 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1318 1319 #ifdef EHCI_DEBUG 1320 if (ehcidebug > 5) { 1321 printf("ehci_add_qh:\n"); 1322 ehci_dump_sqh(sqh); 1323 } 1324 #endif 1325 } 1326 1327 /* 1328 * Remove an ED from the schedule. Called at splusb(). 1329 */ 1330 void 1331 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1332 { 1333 ehci_soft_qh_t *p; 1334 1335 SPLUSBCHECK; 1336 /* XXX */ 1337 for (p = head; p != NULL && p->next != sqh; p = p->next) 1338 ; 1339 if (p == NULL) 1340 panic("ehci_rem_qh: ED not found"); 1341 p->next = sqh->next; 1342 p->qh.qh_link = sqh->qh.qh_link; 1343 1344 ehci_sync_hc(sc); 1345 } 1346 1347 void 1348 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1349 { 1350 /* Halt while we are messing. */ 1351 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1352 sqh->qh.qh_curqtd = 0; 1353 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1354 sqh->sqtd = sqtd; 1355 /* Keep toggle, clear the rest, including length. */ 1356 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1357 } 1358 1359 /* 1360 * Ensure that the HC has released all references to the QH. We do this 1361 * by asking for a Async Advance Doorbell interrupt and then we wait for 1362 * the interrupt. 1363 * To make this easier we first obtain exclusive use of the doorbell. 1364 */ 1365 void 1366 ehci_sync_hc(ehci_softc_t *sc) 1367 { 1368 int s, error; 1369 1370 if (sc->sc_dying) { 1371 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1372 return; 1373 } 1374 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1375 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1376 s = splhardusb(); 1377 /* ask for doorbell */ 1378 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1379 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1380 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1381 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1382 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1383 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1384 splx(s); 1385 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1386 #ifdef DIAGNOSTIC 1387 if (error) 1388 printf("ehci_sync_hc: tsleep() = %d\n", error); 1389 #endif 1390 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1391 } 1392 1393 /***********/ 1394 1395 /* 1396 * Data structures and routines to emulate the root hub. 1397 */ 1398 Static usb_device_descriptor_t ehci_devd = { 1399 USB_DEVICE_DESCRIPTOR_SIZE, 1400 UDESC_DEVICE, /* type */ 1401 {0x00, 0x02}, /* USB version */ 1402 UDCLASS_HUB, /* class */ 1403 UDSUBCLASS_HUB, /* subclass */ 1404 UDPROTO_HSHUBSTT, /* protocol */ 1405 64, /* max packet */ 1406 {0},{0},{0x00,0x01}, /* device id */ 1407 1,2,0, /* string indicies */ 1408 1 /* # of configurations */ 1409 }; 1410 1411 Static usb_device_qualifier_t ehci_odevd = { 1412 USB_DEVICE_DESCRIPTOR_SIZE, 1413 UDESC_DEVICE_QUALIFIER, /* type */ 1414 {0x00, 0x02}, /* USB version */ 1415 UDCLASS_HUB, /* class */ 1416 UDSUBCLASS_HUB, /* subclass */ 1417 UDPROTO_FSHUB, /* protocol */ 1418 64, /* max packet */ 1419 1, /* # of configurations */ 1420 0 1421 }; 1422 1423 Static usb_config_descriptor_t ehci_confd = { 1424 USB_CONFIG_DESCRIPTOR_SIZE, 1425 UDESC_CONFIG, 1426 {USB_CONFIG_DESCRIPTOR_SIZE + 1427 USB_INTERFACE_DESCRIPTOR_SIZE + 1428 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1429 1, 1430 1, 1431 0, 1432 UC_SELF_POWERED, 1433 0 /* max power */ 1434 }; 1435 1436 Static usb_interface_descriptor_t ehci_ifcd = { 1437 USB_INTERFACE_DESCRIPTOR_SIZE, 1438 UDESC_INTERFACE, 1439 0, 1440 0, 1441 1, 1442 UICLASS_HUB, 1443 UISUBCLASS_HUB, 1444 UIPROTO_HSHUBSTT, 1445 0 1446 }; 1447 1448 Static usb_endpoint_descriptor_t ehci_endpd = { 1449 USB_ENDPOINT_DESCRIPTOR_SIZE, 1450 UDESC_ENDPOINT, 1451 UE_DIR_IN | EHCI_INTR_ENDPT, 1452 UE_INTERRUPT, 1453 {8, 0}, /* max packet */ 1454 255 1455 }; 1456 1457 Static usb_hub_descriptor_t ehci_hubd = { 1458 USB_HUB_DESCRIPTOR_SIZE, 1459 UDESC_HUB, 1460 0, 1461 {0,0}, 1462 0, 1463 0, 1464 {0}, 1465 }; 1466 1467 Static int 1468 ehci_str(p, l, s) 1469 usb_string_descriptor_t *p; 1470 int l; 1471 char *s; 1472 { 1473 int i; 1474 1475 if (l == 0) 1476 return (0); 1477 p->bLength = 2 * strlen(s) + 2; 1478 if (l == 1) 1479 return (1); 1480 p->bDescriptorType = UDESC_STRING; 1481 l -= 2; 1482 for (i = 0; s[i] && l > 1; i++, l -= 2) 1483 USETW2(p->bString[i], 0, s[i]); 1484 return (2*i+2); 1485 } 1486 1487 /* 1488 * Simulate a hardware hub by handling all the necessary requests. 1489 */ 1490 Static usbd_status 1491 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1492 { 1493 usbd_status err; 1494 1495 /* Insert last in queue. */ 1496 err = usb_insert_transfer(xfer); 1497 if (err) 1498 return (err); 1499 1500 /* Pipe isn't running, start first */ 1501 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1502 } 1503 1504 Static usbd_status 1505 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1506 { 1507 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1508 usb_device_request_t *req; 1509 void *buf = NULL; 1510 int port, i; 1511 int s, len, value, index, l, totlen = 0; 1512 usb_port_status_t ps; 1513 usb_hub_descriptor_t hubd; 1514 usbd_status err; 1515 u_int32_t v; 1516 1517 if (sc->sc_dying) 1518 return (USBD_IOERROR); 1519 1520 #ifdef DIAGNOSTIC 1521 if (!(xfer->rqflags & URQ_REQUEST)) 1522 /* XXX panic */ 1523 return (USBD_INVAL); 1524 #endif 1525 req = &xfer->request; 1526 1527 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1528 req->bmRequestType, req->bRequest)); 1529 1530 len = UGETW(req->wLength); 1531 value = UGETW(req->wValue); 1532 index = UGETW(req->wIndex); 1533 1534 if (len != 0) 1535 buf = KERNADDR(&xfer->dmabuf, 0); 1536 1537 #define C(x,y) ((x) | ((y) << 8)) 1538 switch(C(req->bRequest, req->bmRequestType)) { 1539 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1540 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1541 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1542 /* 1543 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1544 * for the integrated root hub. 1545 */ 1546 break; 1547 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1548 if (len > 0) { 1549 *(u_int8_t *)buf = sc->sc_conf; 1550 totlen = 1; 1551 } 1552 break; 1553 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1554 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1555 switch(value >> 8) { 1556 case UDESC_DEVICE: 1557 if ((value & 0xff) != 0) { 1558 err = USBD_IOERROR; 1559 goto ret; 1560 } 1561 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1562 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1563 memcpy(buf, &ehci_devd, l); 1564 break; 1565 /* 1566 * We can't really operate at another speed, but the spec says 1567 * we need this descriptor. 1568 */ 1569 case UDESC_DEVICE_QUALIFIER: 1570 if ((value & 0xff) != 0) { 1571 err = USBD_IOERROR; 1572 goto ret; 1573 } 1574 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1575 memcpy(buf, &ehci_odevd, l); 1576 break; 1577 /* 1578 * We can't really operate at another speed, but the spec says 1579 * we need this descriptor. 1580 */ 1581 case UDESC_OTHER_SPEED_CONFIGURATION: 1582 case UDESC_CONFIG: 1583 if ((value & 0xff) != 0) { 1584 err = USBD_IOERROR; 1585 goto ret; 1586 } 1587 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1588 memcpy(buf, &ehci_confd, l); 1589 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1590 value >> 8; 1591 buf = (char *)buf + l; 1592 len -= l; 1593 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1594 totlen += l; 1595 memcpy(buf, &ehci_ifcd, l); 1596 buf = (char *)buf + l; 1597 len -= l; 1598 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1599 totlen += l; 1600 memcpy(buf, &ehci_endpd, l); 1601 break; 1602 case UDESC_STRING: 1603 if (len == 0) 1604 break; 1605 *(u_int8_t *)buf = 0; 1606 totlen = 1; 1607 switch (value & 0xff) { 1608 case 1: /* Vendor */ 1609 totlen = ehci_str(buf, len, sc->sc_vendor); 1610 break; 1611 case 2: /* Product */ 1612 totlen = ehci_str(buf, len, "EHCI root hub"); 1613 break; 1614 } 1615 break; 1616 default: 1617 err = USBD_IOERROR; 1618 goto ret; 1619 } 1620 break; 1621 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1622 if (len > 0) { 1623 *(u_int8_t *)buf = 0; 1624 totlen = 1; 1625 } 1626 break; 1627 case C(UR_GET_STATUS, UT_READ_DEVICE): 1628 if (len > 1) { 1629 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1630 totlen = 2; 1631 } 1632 break; 1633 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1634 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1635 if (len > 1) { 1636 USETW(((usb_status_t *)buf)->wStatus, 0); 1637 totlen = 2; 1638 } 1639 break; 1640 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1641 if (value >= USB_MAX_DEVICES) { 1642 err = USBD_IOERROR; 1643 goto ret; 1644 } 1645 sc->sc_addr = value; 1646 break; 1647 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1648 if (value != 0 && value != 1) { 1649 err = USBD_IOERROR; 1650 goto ret; 1651 } 1652 sc->sc_conf = value; 1653 break; 1654 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1655 break; 1656 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1657 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1658 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1659 err = USBD_IOERROR; 1660 goto ret; 1661 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1662 break; 1663 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1664 break; 1665 /* Hub requests */ 1666 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1667 break; 1668 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1669 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1670 "port=%d feature=%d\n", 1671 index, value)); 1672 if (index < 1 || index > sc->sc_noport) { 1673 err = USBD_IOERROR; 1674 goto ret; 1675 } 1676 port = EHCI_PORTSC(index); 1677 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1678 switch(value) { 1679 case UHF_PORT_ENABLE: 1680 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1681 break; 1682 case UHF_PORT_SUSPEND: 1683 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1684 break; 1685 case UHF_PORT_POWER: 1686 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1687 break; 1688 case UHF_PORT_TEST: 1689 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1690 "%d\n", index)); 1691 break; 1692 case UHF_PORT_INDICATOR: 1693 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1694 "%d\n", index)); 1695 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1696 break; 1697 case UHF_C_PORT_CONNECTION: 1698 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1699 break; 1700 case UHF_C_PORT_ENABLE: 1701 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1702 break; 1703 case UHF_C_PORT_SUSPEND: 1704 /* how? */ 1705 break; 1706 case UHF_C_PORT_OVER_CURRENT: 1707 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1708 break; 1709 case UHF_C_PORT_RESET: 1710 sc->sc_isreset = 0; 1711 break; 1712 default: 1713 err = USBD_IOERROR; 1714 goto ret; 1715 } 1716 #if 0 1717 switch(value) { 1718 case UHF_C_PORT_CONNECTION: 1719 case UHF_C_PORT_ENABLE: 1720 case UHF_C_PORT_SUSPEND: 1721 case UHF_C_PORT_OVER_CURRENT: 1722 case UHF_C_PORT_RESET: 1723 /* Enable RHSC interrupt if condition is cleared. */ 1724 if ((OREAD4(sc, port) >> 16) == 0) 1725 ehci_pcd_able(sc, 1); 1726 break; 1727 default: 1728 break; 1729 } 1730 #endif 1731 break; 1732 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1733 if ((value & 0xff) != 0) { 1734 err = USBD_IOERROR; 1735 goto ret; 1736 } 1737 hubd = ehci_hubd; 1738 hubd.bNbrPorts = sc->sc_noport; 1739 v = EOREAD4(sc, EHCI_HCSPARAMS); 1740 USETW(hubd.wHubCharacteristics, 1741 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1742 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1743 ? UHD_PORT_IND : 0); 1744 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1745 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1746 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1747 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1748 l = min(len, hubd.bDescLength); 1749 totlen = l; 1750 memcpy(buf, &hubd, l); 1751 break; 1752 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1753 if (len != 4) { 1754 err = USBD_IOERROR; 1755 goto ret; 1756 } 1757 memset(buf, 0, len); /* ? XXX */ 1758 totlen = len; 1759 break; 1760 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1761 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1762 index)); 1763 if (index < 1 || index > sc->sc_noport) { 1764 err = USBD_IOERROR; 1765 goto ret; 1766 } 1767 if (len != 4) { 1768 err = USBD_IOERROR; 1769 goto ret; 1770 } 1771 v = EOREAD4(sc, EHCI_PORTSC(index)); 1772 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1773 v)); 1774 i = UPS_HIGH_SPEED; 1775 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1776 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1777 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1778 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1779 if (v & EHCI_PS_PR) i |= UPS_RESET; 1780 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1781 USETW(ps.wPortStatus, i); 1782 i = 0; 1783 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1784 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1785 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1786 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1787 USETW(ps.wPortChange, i); 1788 l = min(len, sizeof ps); 1789 memcpy(buf, &ps, l); 1790 totlen = l; 1791 break; 1792 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1793 err = USBD_IOERROR; 1794 goto ret; 1795 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1796 break; 1797 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1798 if (index < 1 || index > sc->sc_noport) { 1799 err = USBD_IOERROR; 1800 goto ret; 1801 } 1802 port = EHCI_PORTSC(index); 1803 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1804 switch(value) { 1805 case UHF_PORT_ENABLE: 1806 EOWRITE4(sc, port, v | EHCI_PS_PE); 1807 break; 1808 case UHF_PORT_SUSPEND: 1809 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1810 break; 1811 case UHF_PORT_RESET: 1812 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1813 index)); 1814 if (EHCI_PS_IS_LOWSPEED(v)) { 1815 /* Low speed device, give up ownership. */ 1816 ehci_disown(sc, index, 1); 1817 break; 1818 } 1819 /* Start reset sequence. */ 1820 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1821 EOWRITE4(sc, port, v | EHCI_PS_PR); 1822 /* Wait for reset to complete. */ 1823 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1824 if (sc->sc_dying) { 1825 err = USBD_IOERROR; 1826 goto ret; 1827 } 1828 /* Terminate reset sequence. */ 1829 EOWRITE4(sc, port, v); 1830 /* Wait for HC to complete reset. */ 1831 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1832 if (sc->sc_dying) { 1833 err = USBD_IOERROR; 1834 goto ret; 1835 } 1836 v = EOREAD4(sc, port); 1837 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1838 if (v & EHCI_PS_PR) { 1839 printf("%s: port reset timeout\n", 1840 USBDEVNAME(sc->sc_bus.bdev)); 1841 return (USBD_TIMEOUT); 1842 } 1843 if (!(v & EHCI_PS_PE)) { 1844 /* Not a high speed device, give up ownership.*/ 1845 ehci_disown(sc, index, 0); 1846 break; 1847 } 1848 sc->sc_isreset = 1; 1849 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1850 index, v)); 1851 break; 1852 case UHF_PORT_POWER: 1853 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1854 "%d\n", index)); 1855 EOWRITE4(sc, port, v | EHCI_PS_PP); 1856 break; 1857 case UHF_PORT_TEST: 1858 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1859 "%d\n", index)); 1860 break; 1861 case UHF_PORT_INDICATOR: 1862 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1863 "%d\n", index)); 1864 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1865 break; 1866 default: 1867 err = USBD_IOERROR; 1868 goto ret; 1869 } 1870 break; 1871 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1872 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1873 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1874 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1875 break; 1876 default: 1877 err = USBD_IOERROR; 1878 goto ret; 1879 } 1880 xfer->actlen = totlen; 1881 err = USBD_NORMAL_COMPLETION; 1882 ret: 1883 xfer->status = err; 1884 s = splusb(); 1885 usb_transfer_complete(xfer); 1886 splx(s); 1887 return (USBD_IN_PROGRESS); 1888 } 1889 1890 void 1891 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1892 { 1893 int port; 1894 u_int32_t v; 1895 1896 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1897 #ifdef DIAGNOSTIC 1898 if (sc->sc_npcomp != 0) { 1899 int i = (index-1) / sc->sc_npcomp; 1900 if (i >= sc->sc_ncomp) 1901 printf("%s: strange port\n", 1902 USBDEVNAME(sc->sc_bus.bdev)); 1903 else 1904 printf("%s: handing over %s speed device on " 1905 "port %d to %s\n", 1906 USBDEVNAME(sc->sc_bus.bdev), 1907 lowspeed ? "low" : "full", 1908 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1909 } else { 1910 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1911 } 1912 #endif 1913 port = EHCI_PORTSC(index); 1914 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1915 EOWRITE4(sc, port, v | EHCI_PS_PO); 1916 } 1917 1918 /* Abort a root control request. */ 1919 Static void 1920 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1921 { 1922 /* Nothing to do, all transfers are synchronous. */ 1923 } 1924 1925 /* Close the root pipe. */ 1926 Static void 1927 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1928 { 1929 DPRINTF(("ehci_root_ctrl_close\n")); 1930 /* Nothing to do. */ 1931 } 1932 1933 void 1934 ehci_root_intr_done(usbd_xfer_handle xfer) 1935 { 1936 xfer->hcpriv = NULL; 1937 } 1938 1939 Static usbd_status 1940 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1941 { 1942 usbd_status err; 1943 1944 /* Insert last in queue. */ 1945 err = usb_insert_transfer(xfer); 1946 if (err) 1947 return (err); 1948 1949 /* Pipe isn't running, start first */ 1950 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1951 } 1952 1953 Static usbd_status 1954 ehci_root_intr_start(usbd_xfer_handle xfer) 1955 { 1956 usbd_pipe_handle pipe = xfer->pipe; 1957 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1958 1959 if (sc->sc_dying) 1960 return (USBD_IOERROR); 1961 1962 sc->sc_intrxfer = xfer; 1963 1964 return (USBD_IN_PROGRESS); 1965 } 1966 1967 /* Abort a root interrupt request. */ 1968 Static void 1969 ehci_root_intr_abort(usbd_xfer_handle xfer) 1970 { 1971 int s; 1972 1973 if (xfer->pipe->intrxfer == xfer) { 1974 DPRINTF(("ehci_root_intr_abort: remove\n")); 1975 xfer->pipe->intrxfer = NULL; 1976 } 1977 xfer->status = USBD_CANCELLED; 1978 s = splusb(); 1979 usb_transfer_complete(xfer); 1980 splx(s); 1981 } 1982 1983 /* Close the root pipe. */ 1984 Static void 1985 ehci_root_intr_close(usbd_pipe_handle pipe) 1986 { 1987 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1988 1989 DPRINTF(("ehci_root_intr_close\n")); 1990 1991 sc->sc_intrxfer = NULL; 1992 } 1993 1994 void 1995 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1996 { 1997 xfer->hcpriv = NULL; 1998 } 1999 2000 /************************/ 2001 2002 ehci_soft_qh_t * 2003 ehci_alloc_sqh(ehci_softc_t *sc) 2004 { 2005 ehci_soft_qh_t *sqh; 2006 usbd_status err; 2007 int i, offs; 2008 usb_dma_t dma; 2009 2010 if (sc->sc_freeqhs == NULL) { 2011 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2012 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2013 EHCI_PAGE_SIZE, &dma); 2014 #ifdef EHCI_DEBUG 2015 if (err) 2016 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2017 #endif 2018 if (err) 2019 return (NULL); 2020 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2021 offs = i * EHCI_SQH_SIZE; 2022 sqh = KERNADDR(&dma, offs); 2023 sqh->physaddr = DMAADDR(&dma, offs); 2024 sqh->next = sc->sc_freeqhs; 2025 sc->sc_freeqhs = sqh; 2026 } 2027 } 2028 sqh = sc->sc_freeqhs; 2029 sc->sc_freeqhs = sqh->next; 2030 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2031 sqh->next = NULL; 2032 return (sqh); 2033 } 2034 2035 void 2036 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2037 { 2038 sqh->next = sc->sc_freeqhs; 2039 sc->sc_freeqhs = sqh; 2040 } 2041 2042 ehci_soft_qtd_t * 2043 ehci_alloc_sqtd(ehci_softc_t *sc) 2044 { 2045 ehci_soft_qtd_t *sqtd; 2046 usbd_status err; 2047 int i, offs; 2048 usb_dma_t dma; 2049 int s; 2050 2051 if (sc->sc_freeqtds == NULL) { 2052 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2053 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2054 EHCI_PAGE_SIZE, &dma); 2055 #ifdef EHCI_DEBUG 2056 if (err) 2057 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2058 #endif 2059 if (err) 2060 return (NULL); 2061 s = splusb(); 2062 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2063 offs = i * EHCI_SQTD_SIZE; 2064 sqtd = KERNADDR(&dma, offs); 2065 sqtd->physaddr = DMAADDR(&dma, offs); 2066 sqtd->nextqtd = sc->sc_freeqtds; 2067 sc->sc_freeqtds = sqtd; 2068 } 2069 splx(s); 2070 } 2071 2072 s = splusb(); 2073 sqtd = sc->sc_freeqtds; 2074 sc->sc_freeqtds = sqtd->nextqtd; 2075 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2076 sqtd->nextqtd = NULL; 2077 sqtd->xfer = NULL; 2078 splx(s); 2079 2080 return (sqtd); 2081 } 2082 2083 void 2084 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2085 { 2086 int s; 2087 2088 s = splusb(); 2089 sqtd->nextqtd = sc->sc_freeqtds; 2090 sc->sc_freeqtds = sqtd; 2091 splx(s); 2092 } 2093 2094 usbd_status 2095 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2096 int alen, int rd, usbd_xfer_handle xfer, 2097 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2098 { 2099 ehci_soft_qtd_t *next, *cur; 2100 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2101 u_int32_t qtdstatus; 2102 int len, curlen, mps; 2103 int i, tog; 2104 usb_dma_t *dma = &xfer->dmabuf; 2105 2106 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2107 2108 len = alen; 2109 dataphys = DMAADDR(dma, 0); 2110 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2111 #if 0 2112 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2113 epipe->nexttoggle); 2114 #endif 2115 qtdstatus = htole32( 2116 EHCI_QTD_ACTIVE | 2117 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2118 EHCI_QTD_SET_CERR(3) 2119 /* IOC set below */ 2120 /* BYTES set below */ 2121 ); 2122 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2123 tog = epipe->nexttoggle; 2124 if (tog) 2125 qtdstatus |= EHCI_QTD_TOGGLE; 2126 2127 cur = ehci_alloc_sqtd(sc); 2128 *sp = cur; 2129 if (cur == NULL) 2130 goto nomem; 2131 for (;;) { 2132 dataphyspage = EHCI_PAGE(dataphys); 2133 /* The EHCI hardware can handle at most 5 pages. */ 2134 if (dataphyslastpage - dataphyspage < 2135 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2136 /* we can handle it in this QTD */ 2137 curlen = len; 2138 } else { 2139 /* must use multiple TDs, fill as much as possible. */ 2140 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2141 EHCI_PAGE_OFFSET(dataphys); 2142 #ifdef DIAGNOSTIC 2143 if (curlen > len) { 2144 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2145 "len=0x%x offs=0x%x\n", curlen, len, 2146 EHCI_PAGE_OFFSET(dataphys)); 2147 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2148 dataphyslastpage, dataphyspage, 2149 dataphys); 2150 curlen = len; 2151 } 2152 #endif 2153 /* the length must be a multiple of the max size */ 2154 curlen -= curlen % mps; 2155 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2156 "curlen=%d\n", curlen)); 2157 #ifdef DIAGNOSTIC 2158 if (curlen == 0) 2159 panic("ehci_alloc_std: curlen == 0"); 2160 #endif 2161 } 2162 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2163 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2164 dataphys, dataphyslastpage, 2165 len, curlen)); 2166 len -= curlen; 2167 2168 if (len != 0) { 2169 next = ehci_alloc_sqtd(sc); 2170 if (next == NULL) 2171 goto nomem; 2172 nextphys = next->physaddr; 2173 } else { 2174 next = NULL; 2175 nextphys = EHCI_NULL; 2176 } 2177 2178 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2179 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2180 if (i != 0) /* use offset only in first buffer */ 2181 a = EHCI_PAGE(a); 2182 cur->qtd.qtd_buffer[i] = htole32(a); 2183 cur->qtd.qtd_buffer_hi[i] = 0; 2184 #ifdef DIAGNOSTIC 2185 if (i >= EHCI_QTD_NBUFFERS) { 2186 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2187 goto nomem; 2188 } 2189 #endif 2190 } 2191 cur->nextqtd = next; 2192 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2193 cur->qtd.qtd_status = 2194 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2195 cur->xfer = xfer; 2196 cur->len = curlen; 2197 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2198 dataphys, dataphys + curlen)); 2199 /* adjust the toggle based on the number of packets in this 2200 qtd */ 2201 if (((curlen + mps - 1) / mps) & 1) { 2202 tog ^= 1; 2203 qtdstatus ^= EHCI_QTD_TOGGLE; 2204 } 2205 if (len == 0) 2206 break; 2207 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2208 dataphys += curlen; 2209 cur = next; 2210 } 2211 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2212 *ep = cur; 2213 epipe->nexttoggle = tog; 2214 2215 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2216 *sp, *ep)); 2217 2218 return (USBD_NORMAL_COMPLETION); 2219 2220 nomem: 2221 /* XXX free chain */ 2222 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2223 return (USBD_NOMEM); 2224 } 2225 2226 Static void 2227 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2228 ehci_soft_qtd_t *sqtdend) 2229 { 2230 ehci_soft_qtd_t *p; 2231 int i; 2232 2233 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2234 sqtd, sqtdend)); 2235 2236 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2237 p = sqtd->nextqtd; 2238 ehci_free_sqtd(sc, sqtd); 2239 } 2240 } 2241 2242 /****************/ 2243 2244 /* 2245 * Close a reqular pipe. 2246 * Assumes that there are no pending transactions. 2247 */ 2248 void 2249 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2250 { 2251 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2252 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2253 ehci_soft_qh_t *sqh = epipe->sqh; 2254 int s; 2255 2256 s = splusb(); 2257 ehci_rem_qh(sc, sqh, head); 2258 splx(s); 2259 ehci_free_sqh(sc, epipe->sqh); 2260 } 2261 2262 /* 2263 * Abort a device request. 2264 * If this routine is called at splusb() it guarantees that the request 2265 * will be removed from the hardware scheduling and that the callback 2266 * for it will be called with USBD_CANCELLED status. 2267 * It's impossible to guarantee that the requested transfer will not 2268 * have happened since the hardware runs concurrently. 2269 * If the transaction has already happened we rely on the ordinary 2270 * interrupt processing to process it. 2271 * XXX This is most probably wrong. 2272 */ 2273 void 2274 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2275 { 2276 #define exfer EXFER(xfer) 2277 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2278 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2279 ehci_soft_qh_t *sqh = epipe->sqh; 2280 ehci_soft_qtd_t *sqtd; 2281 ehci_physaddr_t cur; 2282 u_int32_t qhstatus; 2283 int s; 2284 int hit; 2285 2286 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2287 2288 if (sc->sc_dying) { 2289 /* If we're dying, just do the software part. */ 2290 s = splusb(); 2291 xfer->status = status; /* make software ignore it */ 2292 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2293 usb_transfer_complete(xfer); 2294 splx(s); 2295 return; 2296 } 2297 2298 if (xfer->device->bus->intr_context || !curproc) 2299 panic("ehci_abort_xfer: not in process context"); 2300 2301 /* 2302 * Step 1: Make interrupt routine and hardware ignore xfer. 2303 */ 2304 s = splusb(); 2305 xfer->status = status; /* make software ignore it */ 2306 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2307 qhstatus = sqh->qh.qh_qtd.qtd_status; 2308 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2309 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2310 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2311 if (sqtd == exfer->sqtdend) 2312 break; 2313 } 2314 splx(s); 2315 2316 /* 2317 * Step 2: Wait until we know hardware has finished any possible 2318 * use of the xfer. Also make sure the soft interrupt routine 2319 * has run. 2320 */ 2321 ehci_sync_hc(sc); 2322 s = splusb(); 2323 sc->sc_softwake = 1; 2324 usb_schedsoftintr(&sc->sc_bus); 2325 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2326 splx(s); 2327 2328 /* 2329 * Step 3: Remove any vestiges of the xfer from the hardware. 2330 * The complication here is that the hardware may have executed 2331 * beyond the xfer we're trying to abort. So as we're scanning 2332 * the TDs of this xfer we check if the hardware points to 2333 * any of them. 2334 */ 2335 s = splusb(); /* XXX why? */ 2336 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2337 hit = 0; 2338 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2339 hit |= cur == sqtd->physaddr; 2340 if (sqtd == exfer->sqtdend) 2341 break; 2342 } 2343 sqtd = sqtd->nextqtd; 2344 /* Zap curqtd register if hardware pointed inside the xfer. */ 2345 if (hit && sqtd != NULL) { 2346 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2347 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2348 sqh->qh.qh_qtd.qtd_status = qhstatus; 2349 } else { 2350 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2351 } 2352 2353 /* 2354 * Step 4: Execute callback. 2355 */ 2356 #ifdef DIAGNOSTIC 2357 exfer->isdone = 1; 2358 #endif 2359 usb_transfer_complete(xfer); 2360 2361 splx(s); 2362 #undef exfer 2363 } 2364 2365 void 2366 ehci_timeout(void *addr) 2367 { 2368 struct ehci_xfer *exfer = addr; 2369 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2370 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2371 2372 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2373 #ifdef USB_DEBUG 2374 if (ehcidebug > 1) 2375 usbd_dump_pipe(exfer->xfer.pipe); 2376 #endif 2377 2378 if (sc->sc_dying) { 2379 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2380 return; 2381 } 2382 2383 /* Execute the abort in a process context. */ 2384 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2385 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2386 } 2387 2388 void 2389 ehci_timeout_task(void *addr) 2390 { 2391 usbd_xfer_handle xfer = addr; 2392 int s; 2393 2394 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2395 2396 s = splusb(); 2397 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2398 splx(s); 2399 } 2400 2401 /************************/ 2402 2403 Static usbd_status 2404 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2405 { 2406 usbd_status err; 2407 2408 /* Insert last in queue. */ 2409 err = usb_insert_transfer(xfer); 2410 if (err) 2411 return (err); 2412 2413 /* Pipe isn't running, start first */ 2414 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2415 } 2416 2417 Static usbd_status 2418 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2419 { 2420 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2421 usbd_status err; 2422 2423 if (sc->sc_dying) 2424 return (USBD_IOERROR); 2425 2426 #ifdef DIAGNOSTIC 2427 if (!(xfer->rqflags & URQ_REQUEST)) { 2428 /* XXX panic */ 2429 printf("ehci_device_ctrl_transfer: not a request\n"); 2430 return (USBD_INVAL); 2431 } 2432 #endif 2433 2434 err = ehci_device_request(xfer); 2435 if (err) 2436 return (err); 2437 2438 if (sc->sc_bus.use_polling) 2439 ehci_waitintr(sc, xfer); 2440 return (USBD_IN_PROGRESS); 2441 } 2442 2443 void 2444 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2445 { 2446 struct ehci_xfer *ex = EXFER(xfer); 2447 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2448 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2449 2450 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2451 2452 #ifdef DIAGNOSTIC 2453 if (!(xfer->rqflags & URQ_REQUEST)) { 2454 panic("ehci_ctrl_done: not a request"); 2455 } 2456 #endif 2457 2458 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2459 ehci_del_intr_list(ex); /* remove from active list */ 2460 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2461 } 2462 2463 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2464 } 2465 2466 /* Abort a device control request. */ 2467 Static void 2468 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2469 { 2470 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2471 ehci_abort_xfer(xfer, USBD_CANCELLED); 2472 } 2473 2474 /* Close a device control pipe. */ 2475 Static void 2476 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2477 { 2478 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2479 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2480 2481 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2482 ehci_close_pipe(pipe, sc->sc_async_head); 2483 } 2484 2485 usbd_status 2486 ehci_device_request(usbd_xfer_handle xfer) 2487 { 2488 #define exfer EXFER(xfer) 2489 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2490 usb_device_request_t *req = &xfer->request; 2491 usbd_device_handle dev = epipe->pipe.device; 2492 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2493 int addr = dev->address; 2494 ehci_soft_qtd_t *setup, *stat, *next; 2495 ehci_soft_qh_t *sqh; 2496 int isread; 2497 int len; 2498 usbd_status err; 2499 int s; 2500 2501 isread = req->bmRequestType & UT_READ; 2502 len = UGETW(req->wLength); 2503 2504 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2505 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2506 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2507 UGETW(req->wIndex), len, addr, 2508 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2509 2510 setup = ehci_alloc_sqtd(sc); 2511 if (setup == NULL) { 2512 err = USBD_NOMEM; 2513 goto bad1; 2514 } 2515 stat = ehci_alloc_sqtd(sc); 2516 if (stat == NULL) { 2517 err = USBD_NOMEM; 2518 goto bad2; 2519 } 2520 2521 sqh = epipe->sqh; 2522 epipe->u.ctl.length = len; 2523 2524 /* XXX 2525 * Since we're messing with the QH we must know the HC is in sync. 2526 * This needs to go away since it slows down control transfers. 2527 * Removing it entails: 2528 * - fill the QH only once with addr & wMaxPacketSize 2529 */ 2530 /* ehci_sync_hc(sc); */ 2531 /* Update device address and length since they may have changed. */ 2532 /* XXX This only needs to be done once, but it's too early in open. */ 2533 /* XXXX Should not touch ED here! */ 2534 sqh->qh.qh_endp = 2535 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2536 htole32( 2537 EHCI_QH_SET_ADDR(addr) | 2538 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2539 ); 2540 2541 /* Set up data transaction */ 2542 if (len != 0) { 2543 ehci_soft_qtd_t *end; 2544 2545 /* Start toggle at 1. */ 2546 epipe->nexttoggle = 1; 2547 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2548 &next, &end); 2549 if (err) 2550 goto bad3; 2551 end->nextqtd = stat; 2552 end->qtd.qtd_next = 2553 end->qtd.qtd_altnext = htole32(stat->physaddr); 2554 } else { 2555 next = stat; 2556 } 2557 2558 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2559 2560 /* Clear toggle */ 2561 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2562 setup->qtd.qtd_status = htole32( 2563 EHCI_QTD_ACTIVE | 2564 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2565 EHCI_QTD_SET_CERR(3) | 2566 EHCI_QTD_SET_BYTES(sizeof *req) 2567 ); 2568 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2569 setup->qtd.qtd_buffer_hi[0] = 0; 2570 setup->nextqtd = next; 2571 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2572 setup->xfer = xfer; 2573 setup->len = sizeof *req; 2574 2575 stat->qtd.qtd_status = htole32( 2576 EHCI_QTD_ACTIVE | 2577 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2578 EHCI_QTD_SET_CERR(3) | 2579 EHCI_QTD_TOGGLE | 2580 EHCI_QTD_IOC 2581 ); 2582 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2583 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2584 stat->nextqtd = NULL; 2585 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2586 stat->xfer = xfer; 2587 stat->len = 0; 2588 2589 #ifdef EHCI_DEBUG 2590 if (ehcidebug > 5) { 2591 DPRINTF(("ehci_device_request:\n")); 2592 ehci_dump_sqh(sqh); 2593 ehci_dump_sqtds(setup); 2594 } 2595 #endif 2596 2597 exfer->sqtdstart = setup; 2598 exfer->sqtdend = stat; 2599 #ifdef DIAGNOSTIC 2600 if (!exfer->isdone) { 2601 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2602 } 2603 exfer->isdone = 0; 2604 #endif 2605 2606 /* Insert qTD in QH list. */ 2607 s = splusb(); 2608 ehci_set_qh_qtd(sqh, setup); 2609 if (xfer->timeout && !sc->sc_bus.use_polling) { 2610 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2611 ehci_timeout, xfer); 2612 } 2613 ehci_add_intr_list(sc, exfer); 2614 xfer->status = USBD_IN_PROGRESS; 2615 splx(s); 2616 2617 #ifdef EHCI_DEBUG 2618 if (ehcidebug > 10) { 2619 DPRINTF(("ehci_device_request: status=%x\n", 2620 EOREAD4(sc, EHCI_USBSTS))); 2621 delay(10000); 2622 ehci_dump_regs(sc); 2623 ehci_dump_sqh(sc->sc_async_head); 2624 ehci_dump_sqh(sqh); 2625 ehci_dump_sqtds(setup); 2626 } 2627 #endif 2628 2629 return (USBD_NORMAL_COMPLETION); 2630 2631 bad3: 2632 ehci_free_sqtd(sc, stat); 2633 bad2: 2634 ehci_free_sqtd(sc, setup); 2635 bad1: 2636 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2637 xfer->status = err; 2638 usb_transfer_complete(xfer); 2639 return (err); 2640 #undef exfer 2641 } 2642 2643 /************************/ 2644 2645 Static usbd_status 2646 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2647 { 2648 usbd_status err; 2649 2650 /* Insert last in queue. */ 2651 err = usb_insert_transfer(xfer); 2652 if (err) 2653 return (err); 2654 2655 /* Pipe isn't running, start first */ 2656 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2657 } 2658 2659 usbd_status 2660 ehci_device_bulk_start(usbd_xfer_handle xfer) 2661 { 2662 #define exfer EXFER(xfer) 2663 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2664 usbd_device_handle dev = epipe->pipe.device; 2665 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2666 ehci_soft_qtd_t *data, *dataend; 2667 ehci_soft_qh_t *sqh; 2668 usbd_status err; 2669 int len, isread, endpt; 2670 int s; 2671 2672 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2673 xfer, xfer->length, xfer->flags)); 2674 2675 if (sc->sc_dying) 2676 return (USBD_IOERROR); 2677 2678 #ifdef DIAGNOSTIC 2679 if (xfer->rqflags & URQ_REQUEST) 2680 panic("ehci_device_bulk_transfer: a request"); 2681 #endif 2682 2683 len = xfer->length; 2684 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2685 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2686 sqh = epipe->sqh; 2687 2688 epipe->u.bulk.length = len; 2689 2690 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2691 &dataend); 2692 if (err) { 2693 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2694 xfer->status = err; 2695 usb_transfer_complete(xfer); 2696 return (err); 2697 } 2698 2699 #ifdef EHCI_DEBUG 2700 if (ehcidebug > 5) { 2701 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2702 ehci_dump_sqh(sqh); 2703 ehci_dump_sqtds(data); 2704 } 2705 #endif 2706 2707 /* Set up interrupt info. */ 2708 exfer->sqtdstart = data; 2709 exfer->sqtdend = dataend; 2710 #ifdef DIAGNOSTIC 2711 if (!exfer->isdone) { 2712 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2713 } 2714 exfer->isdone = 0; 2715 #endif 2716 2717 s = splusb(); 2718 ehci_set_qh_qtd(sqh, data); 2719 if (xfer->timeout && !sc->sc_bus.use_polling) { 2720 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2721 ehci_timeout, xfer); 2722 } 2723 ehci_add_intr_list(sc, exfer); 2724 xfer->status = USBD_IN_PROGRESS; 2725 splx(s); 2726 2727 #ifdef EHCI_DEBUG 2728 if (ehcidebug > 10) { 2729 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2730 delay(10000); 2731 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2732 ehci_dump_regs(sc); 2733 #if 0 2734 printf("async_head:\n"); 2735 ehci_dump_sqh(sc->sc_async_head); 2736 #endif 2737 printf("sqh:\n"); 2738 ehci_dump_sqh(sqh); 2739 ehci_dump_sqtds(data); 2740 } 2741 #endif 2742 2743 if (sc->sc_bus.use_polling) 2744 ehci_waitintr(sc, xfer); 2745 2746 return (USBD_IN_PROGRESS); 2747 #undef exfer 2748 } 2749 2750 Static void 2751 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2752 { 2753 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2754 ehci_abort_xfer(xfer, USBD_CANCELLED); 2755 } 2756 2757 /* 2758 * Close a device bulk pipe. 2759 */ 2760 Static void 2761 ehci_device_bulk_close(usbd_pipe_handle pipe) 2762 { 2763 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2764 2765 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2766 ehci_close_pipe(pipe, sc->sc_async_head); 2767 } 2768 2769 void 2770 ehci_device_bulk_done(usbd_xfer_handle xfer) 2771 { 2772 struct ehci_xfer *ex = EXFER(xfer); 2773 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2774 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2775 2776 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2777 xfer, xfer->actlen)); 2778 2779 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2780 ehci_del_intr_list(ex); /* remove from active list */ 2781 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2782 } 2783 2784 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2785 } 2786 2787 /************************/ 2788 2789 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2790 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2791 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2792 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2793 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2794 2795 /************************/ 2796 2797 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2798 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2799 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2800 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2801 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2802
Indexes created Tue Sep 23 13:09:54 GMT 2025