ehci.c revision 1.67
1 /* $NetBSD: ehci.c,v 1.67 2004/07/06 04:18:05 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite compolicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.67 2004/07/06 04:18:05 mycroft Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) if (ehcidebug) printf x 96 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 /* Reset the controller */ 363 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 364 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 365 usb_delay_ms(&sc->sc_bus, 1); 366 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 367 for (i = 0; i < 100; i++) { 368 usb_delay_ms(&sc->sc_bus, 1); 369 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 370 if (!hcr) 371 break; 372 } 373 if (hcr) { 374 aprint_error("%s: reset timeout\n", 375 USBDEVNAME(sc->sc_bus.bdev)); 376 return (USBD_IOERROR); 377 } 378 379 /* frame list size at default, read back what we got and use that */ 380 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 381 case 0: sc->sc_flsize = 1024*4; break; 382 case 1: sc->sc_flsize = 512*4; break; 383 case 2: sc->sc_flsize = 256*4; break; 384 case 3: return (USBD_IOERROR); 385 } 386 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 387 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 388 if (err) 389 return (err); 390 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 391 392 /* Set up the bus struct. */ 393 sc->sc_bus.methods = &ehci_bus_methods; 394 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 395 396 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 397 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 398 399 sc->sc_eintrs = EHCI_NORMAL_INTRS; 400 401 /* Allocate dummy QH that starts the async list. */ 402 sqh = ehci_alloc_sqh(sc); 403 if (sqh == NULL) { 404 err = USBD_NOMEM; 405 goto bad1; 406 } 407 /* Fill the QH */ 408 sqh->qh.qh_endp = 409 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 410 sqh->qh.qh_link = 411 htole32(sqh->physaddr | EHCI_LINK_QH); 412 sqh->qh.qh_curqtd = EHCI_NULL; 413 sqh->next = NULL; 414 /* Fill the overlay qTD */ 415 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 416 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 417 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 418 sqh->sqtd = NULL; 419 #ifdef EHCI_DEBUG 420 if (ehcidebug) { 421 ehci_dump_sqh(sqh); 422 } 423 #endif 424 425 /* Point to async list */ 426 sc->sc_async_head = sqh; 427 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 428 429 usb_callout_init(sc->sc_tmo_pcd); 430 431 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 432 433 /* Enable interrupts */ 434 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 435 436 /* Turn on controller */ 437 EOWRITE4(sc, EHCI_USBCMD, 438 EHCI_CMD_ITC_8 | /* 8 microframes */ 439 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 440 EHCI_CMD_ASE | 441 /* EHCI_CMD_PSE | */ 442 EHCI_CMD_RS); 443 444 /* Take over port ownership */ 445 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 446 447 for (i = 0; i < 100; i++) { 448 usb_delay_ms(&sc->sc_bus, 1); 449 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 450 if (!hcr) 451 break; 452 } 453 if (hcr) { 454 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 455 return (USBD_IOERROR); 456 } 457 458 return (USBD_NORMAL_COMPLETION); 459 460 #if 0 461 bad2: 462 ehci_free_sqh(sc, sc->sc_async_head); 463 #endif 464 bad1: 465 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 466 return (err); 467 } 468 469 int 470 ehci_intr(void *v) 471 { 472 ehci_softc_t *sc = v; 473 474 if (sc == NULL || sc->sc_dying) 475 return (0); 476 477 /* If we get an interrupt while polling, then just ignore it. */ 478 if (sc->sc_bus.use_polling) { 479 #ifdef DIAGNOSTIC 480 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 481 #endif 482 return (0); 483 } 484 485 return (ehci_intr1(sc)); 486 } 487 488 Static int 489 ehci_intr1(ehci_softc_t *sc) 490 { 491 u_int32_t intrs, eintrs; 492 493 DPRINTFN(20,("ehci_intr1: enter\n")); 494 495 /* In case the interrupt occurs before initialization has completed. */ 496 if (sc == NULL) { 497 #ifdef DIAGNOSTIC 498 printf("ehci_intr: sc == NULL\n"); 499 #endif 500 return (0); 501 } 502 503 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 504 505 if (!intrs) 506 return (0); 507 508 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 509 eintrs = intrs & sc->sc_eintrs; 510 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 511 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 512 (u_int)eintrs)); 513 if (!eintrs) 514 return (0); 515 516 sc->sc_bus.intr_context++; 517 sc->sc_bus.no_intrs++; 518 if (eintrs & EHCI_STS_IAA) { 519 DPRINTF(("ehci_intr1: door bell\n")); 520 wakeup(&sc->sc_async_head); 521 eintrs &= ~EHCI_STS_IAA; 522 } 523 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 524 DPRINTFN(5,("ehci_intr1: %s %s\n", 525 eintrs & EHCI_STS_INT ? "INT" : "", 526 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 527 usb_schedsoftintr(&sc->sc_bus); 528 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 529 } 530 if (eintrs & EHCI_STS_HSE) { 531 printf("%s: unrecoverable error, controller halted\n", 532 USBDEVNAME(sc->sc_bus.bdev)); 533 /* XXX what else */ 534 } 535 if (eintrs & EHCI_STS_PCD) { 536 ehci_pcd(sc, sc->sc_intrxfer); 537 /* 538 * Disable PCD interrupt for now, because it will be 539 * on until the port has been reset. 540 */ 541 ehci_pcd_able(sc, 0); 542 /* Do not allow RHSC interrupts > 1 per second */ 543 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 544 eintrs &= ~EHCI_STS_PCD; 545 } 546 547 sc->sc_bus.intr_context--; 548 549 if (eintrs != 0) { 550 /* Block unprocessed interrupts. */ 551 sc->sc_eintrs &= ~eintrs; 552 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 553 printf("%s: blocking intrs 0x%x\n", 554 USBDEVNAME(sc->sc_bus.bdev), eintrs); 555 } 556 557 return (1); 558 } 559 560 void 561 ehci_pcd_able(ehci_softc_t *sc, int on) 562 { 563 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 564 if (on) 565 sc->sc_eintrs |= EHCI_STS_PCD; 566 else 567 sc->sc_eintrs &= ~EHCI_STS_PCD; 568 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 569 } 570 571 void 572 ehci_pcd_enable(void *v_sc) 573 { 574 ehci_softc_t *sc = v_sc; 575 576 ehci_pcd_able(sc, 1); 577 } 578 579 void 580 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 581 { 582 usbd_pipe_handle pipe; 583 u_char *p; 584 int i, m; 585 586 if (xfer == NULL) { 587 /* Just ignore the change. */ 588 return; 589 } 590 591 pipe = xfer->pipe; 592 593 p = KERNADDR(&xfer->dmabuf, 0); 594 m = min(sc->sc_noport, xfer->length * 8 - 1); 595 memset(p, 0, xfer->length); 596 for (i = 1; i <= m; i++) { 597 /* Pick out CHANGE bits from the status reg. */ 598 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 599 p[i/8] |= 1 << (i%8); 600 } 601 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 602 xfer->actlen = xfer->length; 603 xfer->status = USBD_NORMAL_COMPLETION; 604 605 usb_transfer_complete(xfer); 606 } 607 608 void 609 ehci_softintr(void *v) 610 { 611 ehci_softc_t *sc = v; 612 struct ehci_xfer *ex, *nextex; 613 614 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 615 sc->sc_bus.intr_context)); 616 617 sc->sc_bus.intr_context++; 618 619 /* 620 * The only explanation I can think of for why EHCI is as brain dead 621 * as UHCI interrupt-wise is that Intel was involved in both. 622 * An interrupt just tells us that something is done, we have no 623 * clue what, so we need to scan through all active transfers. :-( 624 */ 625 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 626 nextex = LIST_NEXT(ex, inext); 627 ehci_check_intr(sc, ex); 628 } 629 630 if (sc->sc_softwake) { 631 sc->sc_softwake = 0; 632 wakeup(&sc->sc_softwake); 633 } 634 635 sc->sc_bus.intr_context--; 636 } 637 638 /* Check for an interrupt. */ 639 void 640 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 641 { 642 ehci_soft_qtd_t *sqtd, *lsqtd; 643 u_int32_t status; 644 645 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 646 647 if (ex->sqtdstart == NULL) { 648 printf("ehci_check_intr: sqtdstart=NULL\n"); 649 return; 650 } 651 lsqtd = ex->sqtdend; 652 #ifdef DIAGNOSTIC 653 if (lsqtd == NULL) { 654 printf("ehci_check_intr: sqtd==0\n"); 655 return; 656 } 657 #endif 658 /* 659 * If the last TD is still active we need to check whether there 660 * is a an error somewhere in the middle, or whether there was a 661 * short packet (SPD and not ACTIVE). 662 */ 663 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 664 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 665 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 666 status = le32toh(sqtd->qtd.qtd_status); 667 /* If there's an active QTD the xfer isn't done. */ 668 if (status & EHCI_QTD_ACTIVE) 669 break; 670 /* Any kind of error makes the xfer done. */ 671 if (status & EHCI_QTD_HALTED) 672 goto done; 673 /* We want short packets, and it is short: it's done */ 674 if (EHCI_QTD_GET_BYTES(status) != 0) 675 goto done; 676 } 677 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 678 ex, ex->sqtdstart)); 679 return; 680 } 681 done: 682 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 683 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 684 ehci_idone(ex); 685 } 686 687 void 688 ehci_idone(struct ehci_xfer *ex) 689 { 690 usbd_xfer_handle xfer = &ex->xfer; 691 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 692 ehci_soft_qtd_t *sqtd; 693 u_int32_t status = 0, nstatus; 694 int actlen; 695 696 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 697 #ifdef DIAGNOSTIC 698 { 699 int s = splhigh(); 700 if (ex->isdone) { 701 splx(s); 702 #ifdef EHCI_DEBUG 703 printf("ehci_idone: ex is done!\n "); 704 ehci_dump_exfer(ex); 705 #else 706 printf("ehci_idone: ex=%p is done!\n", ex); 707 #endif 708 return; 709 } 710 ex->isdone = 1; 711 splx(s); 712 } 713 #endif 714 715 if (xfer->status == USBD_CANCELLED || 716 xfer->status == USBD_TIMEOUT) { 717 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 718 return; 719 } 720 721 #ifdef EHCI_DEBUG 722 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 723 if (ehcidebug > 10) 724 ehci_dump_sqtds(ex->sqtdstart); 725 #endif 726 727 /* The transfer is done, compute actual length and status. */ 728 actlen = 0; 729 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 730 nstatus = le32toh(sqtd->qtd.qtd_status); 731 if (nstatus & EHCI_QTD_ACTIVE) 732 break; 733 734 status = nstatus; 735 /* halt is ok if descriptor is last, and complete */ 736 if (sqtd->qtd.qtd_next == EHCI_NULL && 737 EHCI_QTD_GET_BYTES(status) == 0) 738 status &= ~EHCI_QTD_HALTED; 739 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 740 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 741 } 742 743 /* If there are left over TDs we need to update the toggle. */ 744 if (sqtd != NULL) { 745 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 746 #if 0 747 ehci_dump_sqh(epipe->sqh); 748 ehci_dump_sqtds(ex->sqtdstart); 749 #endif 750 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 751 } 752 753 status &= EHCI_QTD_STATERRS; 754 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 755 xfer->length, actlen, status)); 756 xfer->actlen = actlen; 757 if (status != 0) { 758 #ifdef EHCI_DEBUG 759 char sbuf[128]; 760 761 bitmask_snprintf((u_int32_t)status, 762 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 763 "\3MISSED", sbuf, sizeof(sbuf)); 764 765 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 766 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 767 "status 0x%s\n", 768 xfer->pipe->device->address, 769 xfer->pipe->endpoint->edesc->bEndpointAddress, 770 sbuf)); 771 if (ehcidebug > 2) { 772 ehci_dump_sqh(epipe->sqh); 773 ehci_dump_sqtds(ex->sqtdstart); 774 } 775 #endif 776 if (status == EHCI_QTD_HALTED) 777 xfer->status = USBD_STALLED; 778 else 779 xfer->status = USBD_IOERROR; /* more info XXX */ 780 } else { 781 xfer->status = USBD_NORMAL_COMPLETION; 782 } 783 784 usb_transfer_complete(xfer); 785 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 786 } 787 788 /* 789 * Wait here until controller claims to have an interrupt. 790 * Then call ehci_intr and return. Use timeout to avoid waiting 791 * too long. 792 */ 793 void 794 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 795 { 796 int timo = xfer->timeout; 797 int usecs; 798 u_int32_t intrs; 799 800 xfer->status = USBD_IN_PROGRESS; 801 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 802 usb_delay_ms(&sc->sc_bus, 1); 803 if (sc->sc_dying) 804 break; 805 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 806 sc->sc_eintrs; 807 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 808 #ifdef OHCI_DEBUG 809 if (ehcidebug > 15) 810 ehci_dump_regs(sc); 811 #endif 812 if (intrs) { 813 ehci_intr1(sc); 814 if (xfer->status != USBD_IN_PROGRESS) 815 return; 816 } 817 } 818 819 /* Timeout */ 820 DPRINTF(("ehci_waitintr: timeout\n")); 821 xfer->status = USBD_TIMEOUT; 822 usb_transfer_complete(xfer); 823 /* XXX should free TD */ 824 } 825 826 void 827 ehci_poll(struct usbd_bus *bus) 828 { 829 ehci_softc_t *sc = (ehci_softc_t *)bus; 830 #ifdef EHCI_DEBUG 831 static int last; 832 int new; 833 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 834 if (new != last) { 835 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 836 last = new; 837 } 838 #endif 839 840 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 841 ehci_intr1(sc); 842 } 843 844 int 845 ehci_detach(struct ehci_softc *sc, int flags) 846 { 847 int rv = 0; 848 849 if (sc->sc_child != NULL) 850 rv = config_detach(sc->sc_child, flags); 851 852 if (rv != 0) 853 return (rv); 854 855 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 856 857 if (sc->sc_powerhook != NULL) 858 powerhook_disestablish(sc->sc_powerhook); 859 if (sc->sc_shutdownhook != NULL) 860 shutdownhook_disestablish(sc->sc_shutdownhook); 861 862 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 863 864 /* XXX free other data structures XXX */ 865 866 return (rv); 867 } 868 869 870 int 871 ehci_activate(device_ptr_t self, enum devact act) 872 { 873 struct ehci_softc *sc = (struct ehci_softc *)self; 874 int rv = 0; 875 876 switch (act) { 877 case DVACT_ACTIVATE: 878 return (EOPNOTSUPP); 879 880 case DVACT_DEACTIVATE: 881 if (sc->sc_child != NULL) 882 rv = config_deactivate(sc->sc_child); 883 sc->sc_dying = 1; 884 break; 885 } 886 return (rv); 887 } 888 889 /* 890 * Handle suspend/resume. 891 * 892 * We need to switch to polling mode here, because this routine is 893 * called from an intterupt context. This is all right since we 894 * are almost suspended anyway. 895 */ 896 void 897 ehci_power(int why, void *v) 898 { 899 ehci_softc_t *sc = v; 900 //u_int32_t ctl; 901 int s; 902 903 #ifdef EHCI_DEBUG 904 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 905 ehci_dump_regs(sc); 906 #endif 907 908 s = splhardusb(); 909 switch (why) { 910 case PWR_SUSPEND: 911 case PWR_STANDBY: 912 sc->sc_bus.use_polling++; 913 #if 0 914 OOO 915 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 916 if (sc->sc_control == 0) { 917 /* 918 * Preserve register values, in case that APM BIOS 919 * does not recover them. 920 */ 921 sc->sc_control = ctl; 922 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 923 } 924 ctl |= EHCI_HCFS_SUSPEND; 925 OWRITE4(sc, EHCI_CONTROL, ctl); 926 #endif 927 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 928 sc->sc_bus.use_polling--; 929 break; 930 case PWR_RESUME: 931 sc->sc_bus.use_polling++; 932 #if 0 933 OOO 934 /* Some broken BIOSes do not recover these values */ 935 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 936 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 937 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 938 if (sc->sc_intre) 939 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 940 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 941 if (sc->sc_control) 942 ctl = sc->sc_control; 943 else 944 ctl = OREAD4(sc, EHCI_CONTROL); 945 ctl |= EHCI_HCFS_RESUME; 946 OWRITE4(sc, EHCI_CONTROL, ctl); 947 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 948 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 949 OWRITE4(sc, EHCI_CONTROL, ctl); 950 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 951 sc->sc_control = sc->sc_intre = 0; 952 #endif 953 sc->sc_bus.use_polling--; 954 break; 955 case PWR_SOFTSUSPEND: 956 case PWR_SOFTSTANDBY: 957 case PWR_SOFTRESUME: 958 break; 959 } 960 splx(s); 961 } 962 963 /* 964 * Shut down the controller when the system is going down. 965 */ 966 void 967 ehci_shutdown(void *v) 968 { 969 ehci_softc_t *sc = v; 970 971 DPRINTF(("ehci_shutdown: stopping the HC\n")); 972 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 973 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 974 } 975 976 usbd_status 977 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 978 { 979 struct ehci_softc *sc = (struct ehci_softc *)bus; 980 usbd_status err; 981 982 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 983 #ifdef EHCI_DEBUG 984 if (err) 985 printf("ehci_allocm: usb_allocmem()=%d\n", err); 986 #endif 987 return (err); 988 } 989 990 void 991 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 992 { 993 struct ehci_softc *sc = (struct ehci_softc *)bus; 994 995 usb_freemem(&sc->sc_bus, dma); 996 } 997 998 usbd_xfer_handle 999 ehci_allocx(struct usbd_bus *bus) 1000 { 1001 struct ehci_softc *sc = (struct ehci_softc *)bus; 1002 usbd_xfer_handle xfer; 1003 1004 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1005 if (xfer != NULL) { 1006 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1007 #ifdef DIAGNOSTIC 1008 if (xfer->busy_free != XFER_FREE) { 1009 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1010 xfer->busy_free); 1011 } 1012 #endif 1013 } else { 1014 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1015 } 1016 if (xfer != NULL) { 1017 memset(xfer, 0, sizeof (struct ehci_xfer)); 1018 #ifdef DIAGNOSTIC 1019 EXFER(xfer)->isdone = 1; 1020 xfer->busy_free = XFER_BUSY; 1021 #endif 1022 } 1023 return (xfer); 1024 } 1025 1026 void 1027 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1028 { 1029 struct ehci_softc *sc = (struct ehci_softc *)bus; 1030 1031 #ifdef DIAGNOSTIC 1032 if (xfer->busy_free != XFER_BUSY) { 1033 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1034 xfer->busy_free); 1035 return; 1036 } 1037 xfer->busy_free = XFER_FREE; 1038 if (!EXFER(xfer)->isdone) { 1039 printf("ehci_freex: !isdone\n"); 1040 return; 1041 } 1042 #endif 1043 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1044 } 1045 1046 Static void 1047 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1048 { 1049 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1050 1051 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1052 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1053 #ifdef USB_DEBUG 1054 if (ehcidebug) 1055 usbd_dump_pipe(pipe); 1056 #endif 1057 epipe->nexttoggle = 0; 1058 } 1059 1060 Static void 1061 ehci_noop(usbd_pipe_handle pipe) 1062 { 1063 } 1064 1065 #ifdef EHCI_DEBUG 1066 void 1067 ehci_dump_regs(ehci_softc_t *sc) 1068 { 1069 int i; 1070 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1071 EOREAD4(sc, EHCI_USBCMD), 1072 EOREAD4(sc, EHCI_USBSTS), 1073 EOREAD4(sc, EHCI_USBINTR)); 1074 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1075 EOREAD4(sc, EHCI_FRINDEX), 1076 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1077 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1078 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1079 for (i = 1; i <= sc->sc_noport; i++) 1080 printf("port %d status=0x%08x\n", i, 1081 EOREAD4(sc, EHCI_PORTSC(i))); 1082 } 1083 1084 /* 1085 * Unused function - this is meant to be called from a kernel 1086 * debugger. 1087 */ 1088 void 1089 ehci_dump() 1090 { 1091 ehci_dump_regs(theehci); 1092 } 1093 1094 void 1095 ehci_dump_link(ehci_link_t link, int type) 1096 { 1097 link = le32toh(link); 1098 printf("0x%08x", link); 1099 if (link & EHCI_LINK_TERMINATE) 1100 printf("<T>"); 1101 else { 1102 printf("<"); 1103 if (type) { 1104 switch (EHCI_LINK_TYPE(link)) { 1105 case EHCI_LINK_ITD: printf("ITD"); break; 1106 case EHCI_LINK_QH: printf("QH"); break; 1107 case EHCI_LINK_SITD: printf("SITD"); break; 1108 case EHCI_LINK_FSTN: printf("FSTN"); break; 1109 } 1110 } 1111 printf(">"); 1112 } 1113 } 1114 1115 void 1116 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1117 { 1118 int i; 1119 u_int32_t stop; 1120 1121 stop = 0; 1122 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1123 ehci_dump_sqtd(sqtd); 1124 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1125 } 1126 if (sqtd) 1127 printf("dump aborted, too many TDs\n"); 1128 } 1129 1130 void 1131 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1132 { 1133 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1134 ehci_dump_qtd(&sqtd->qtd); 1135 } 1136 1137 void 1138 ehci_dump_qtd(ehci_qtd_t *qtd) 1139 { 1140 u_int32_t s; 1141 char sbuf[128]; 1142 1143 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1144 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1145 printf("\n"); 1146 s = le32toh(qtd->qtd_status); 1147 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1148 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1149 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1150 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1151 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1152 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1153 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1154 EHCI_QTD_GET_PID(s), sbuf); 1155 for (s = 0; s < 5; s++) 1156 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1157 } 1158 1159 void 1160 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1161 { 1162 ehci_qh_t *qh = &sqh->qh; 1163 u_int32_t endp, endphub; 1164 1165 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1166 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1167 endp = le32toh(qh->qh_endp); 1168 printf(" endp=0x%08x\n", endp); 1169 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1170 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1171 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1172 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1173 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1174 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1175 EHCI_QH_GET_NRL(endp)); 1176 endphub = le32toh(qh->qh_endphub); 1177 printf(" endphub=0x%08x\n", endphub); 1178 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1179 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1180 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1181 EHCI_QH_GET_MULT(endphub)); 1182 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1183 printf("Overlay qTD:\n"); 1184 ehci_dump_qtd(&qh->qh_qtd); 1185 } 1186 1187 #ifdef DIAGNOSTIC 1188 Static void 1189 ehci_dump_exfer(struct ehci_xfer *ex) 1190 { 1191 printf("ehci_dump_exfer: ex=%p\n", ex); 1192 } 1193 #endif 1194 #endif 1195 1196 usbd_status 1197 ehci_open(usbd_pipe_handle pipe) 1198 { 1199 usbd_device_handle dev = pipe->device; 1200 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1201 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1202 u_int8_t addr = dev->address; 1203 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1204 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1205 ehci_soft_qh_t *sqh; 1206 usbd_status err; 1207 int s; 1208 int speed, naks; 1209 1210 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1211 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1212 1213 if (sc->sc_dying) 1214 return (USBD_IOERROR); 1215 1216 epipe->nexttoggle = 0; 1217 1218 if (addr == sc->sc_addr) { 1219 switch (ed->bEndpointAddress) { 1220 case USB_CONTROL_ENDPOINT: 1221 pipe->methods = &ehci_root_ctrl_methods; 1222 break; 1223 case UE_DIR_IN | EHCI_INTR_ENDPT: 1224 pipe->methods = &ehci_root_intr_methods; 1225 break; 1226 default: 1227 return (USBD_INVAL); 1228 } 1229 return (USBD_NORMAL_COMPLETION); 1230 } 1231 1232 /* XXX All this stuff is only valid for async. */ 1233 switch (dev->speed) { 1234 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1235 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1236 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1237 default: panic("ehci_open: bad device speed %d", dev->speed); 1238 } 1239 naks = 8; /* XXX */ 1240 sqh = ehci_alloc_sqh(sc); 1241 if (sqh == NULL) 1242 goto bad0; 1243 /* qh_link filled when the QH is added */ 1244 sqh->qh.qh_endp = htole32( 1245 EHCI_QH_SET_ADDR(addr) | 1246 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1247 EHCI_QH_SET_EPS(speed) | 1248 EHCI_QH_DTC | 1249 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1250 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1251 EHCI_QH_CTL : 0) | 1252 EHCI_QH_SET_NRL(naks) 1253 ); 1254 sqh->qh.qh_endphub = htole32( 1255 EHCI_QH_SET_MULT(1) 1256 /* XXX TT stuff */ 1257 /* XXX interrupt mask */ 1258 ); 1259 sqh->qh.qh_curqtd = EHCI_NULL; 1260 /* Fill the overlay qTD */ 1261 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1262 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1263 sqh->qh.qh_qtd.qtd_status = htole32(0); 1264 1265 epipe->sqh = sqh; 1266 1267 switch (xfertype) { 1268 case UE_CONTROL: 1269 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1270 0, &epipe->u.ctl.reqdma); 1271 #ifdef EHCI_DEBUG 1272 if (err) 1273 printf("ehci_open: usb_allocmem()=%d\n", err); 1274 #endif 1275 if (err) 1276 goto bad1; 1277 pipe->methods = &ehci_device_ctrl_methods; 1278 s = splusb(); 1279 ehci_add_qh(sqh, sc->sc_async_head); 1280 splx(s); 1281 break; 1282 case UE_BULK: 1283 pipe->methods = &ehci_device_bulk_methods; 1284 s = splusb(); 1285 ehci_add_qh(sqh, sc->sc_async_head); 1286 splx(s); 1287 break; 1288 case UE_INTERRUPT: 1289 pipe->methods = &ehci_device_intr_methods; 1290 return (USBD_INVAL); 1291 case UE_ISOCHRONOUS: 1292 pipe->methods = &ehci_device_isoc_methods; 1293 return (USBD_INVAL); 1294 default: 1295 return (USBD_INVAL); 1296 } 1297 return (USBD_NORMAL_COMPLETION); 1298 1299 bad1: 1300 ehci_free_sqh(sc, sqh); 1301 bad0: 1302 return (USBD_NOMEM); 1303 } 1304 1305 /* 1306 * Add an ED to the schedule. Called at splusb(). 1307 */ 1308 void 1309 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1310 { 1311 SPLUSBCHECK; 1312 1313 sqh->next = head->next; 1314 sqh->qh.qh_link = head->qh.qh_link; 1315 head->next = sqh; 1316 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1317 1318 #ifdef EHCI_DEBUG 1319 if (ehcidebug > 5) { 1320 printf("ehci_add_qh:\n"); 1321 ehci_dump_sqh(sqh); 1322 } 1323 #endif 1324 } 1325 1326 /* 1327 * Remove an ED from the schedule. Called at splusb(). 1328 */ 1329 void 1330 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1331 { 1332 ehci_soft_qh_t *p; 1333 1334 SPLUSBCHECK; 1335 /* XXX */ 1336 for (p = head; p != NULL && p->next != sqh; p = p->next) 1337 ; 1338 if (p == NULL) 1339 panic("ehci_rem_qh: ED not found"); 1340 p->next = sqh->next; 1341 p->qh.qh_link = sqh->qh.qh_link; 1342 1343 ehci_sync_hc(sc); 1344 } 1345 1346 void 1347 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1348 { 1349 /* Halt while we are messing. */ 1350 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1351 sqh->qh.qh_curqtd = 0; 1352 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1353 sqh->sqtd = sqtd; 1354 /* Clear halt */ 1355 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1356 } 1357 1358 /* 1359 * Ensure that the HC has released all references to the QH. We do this 1360 * by asking for a Async Advance Doorbell interrupt and then we wait for 1361 * the interrupt. 1362 * To make this easier we first obtain exclusive use of the doorbell. 1363 */ 1364 void 1365 ehci_sync_hc(ehci_softc_t *sc) 1366 { 1367 int s, error; 1368 1369 if (sc->sc_dying) { 1370 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1371 return; 1372 } 1373 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1374 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1375 s = splhardusb(); 1376 /* ask for doorbell */ 1377 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1378 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1379 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1380 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1381 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1382 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1383 splx(s); 1384 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1385 #ifdef DIAGNOSTIC 1386 if (error) 1387 printf("ehci_sync_hc: tsleep() = %d\n", error); 1388 #endif 1389 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1390 } 1391 1392 /***********/ 1393 1394 /* 1395 * Data structures and routines to emulate the root hub. 1396 */ 1397 Static usb_device_descriptor_t ehci_devd = { 1398 USB_DEVICE_DESCRIPTOR_SIZE, 1399 UDESC_DEVICE, /* type */ 1400 {0x00, 0x02}, /* USB version */ 1401 UDCLASS_HUB, /* class */ 1402 UDSUBCLASS_HUB, /* subclass */ 1403 UDPROTO_HSHUBSTT, /* protocol */ 1404 64, /* max packet */ 1405 {0},{0},{0x00,0x01}, /* device id */ 1406 1,2,0, /* string indicies */ 1407 1 /* # of configurations */ 1408 }; 1409 1410 Static usb_device_qualifier_t ehci_odevd = { 1411 USB_DEVICE_DESCRIPTOR_SIZE, 1412 UDESC_DEVICE_QUALIFIER, /* type */ 1413 {0x00, 0x02}, /* USB version */ 1414 UDCLASS_HUB, /* class */ 1415 UDSUBCLASS_HUB, /* subclass */ 1416 UDPROTO_FSHUB, /* protocol */ 1417 64, /* max packet */ 1418 1, /* # of configurations */ 1419 0 1420 }; 1421 1422 Static usb_config_descriptor_t ehci_confd = { 1423 USB_CONFIG_DESCRIPTOR_SIZE, 1424 UDESC_CONFIG, 1425 {USB_CONFIG_DESCRIPTOR_SIZE + 1426 USB_INTERFACE_DESCRIPTOR_SIZE + 1427 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1428 1, 1429 1, 1430 0, 1431 UC_SELF_POWERED, 1432 0 /* max power */ 1433 }; 1434 1435 Static usb_interface_descriptor_t ehci_ifcd = { 1436 USB_INTERFACE_DESCRIPTOR_SIZE, 1437 UDESC_INTERFACE, 1438 0, 1439 0, 1440 1, 1441 UICLASS_HUB, 1442 UISUBCLASS_HUB, 1443 UIPROTO_HSHUBSTT, 1444 0 1445 }; 1446 1447 Static usb_endpoint_descriptor_t ehci_endpd = { 1448 USB_ENDPOINT_DESCRIPTOR_SIZE, 1449 UDESC_ENDPOINT, 1450 UE_DIR_IN | EHCI_INTR_ENDPT, 1451 UE_INTERRUPT, 1452 {8, 0}, /* max packet */ 1453 255 1454 }; 1455 1456 Static usb_hub_descriptor_t ehci_hubd = { 1457 USB_HUB_DESCRIPTOR_SIZE, 1458 UDESC_HUB, 1459 0, 1460 {0,0}, 1461 0, 1462 0, 1463 {0}, 1464 }; 1465 1466 Static int 1467 ehci_str(p, l, s) 1468 usb_string_descriptor_t *p; 1469 int l; 1470 char *s; 1471 { 1472 int i; 1473 1474 if (l == 0) 1475 return (0); 1476 p->bLength = 2 * strlen(s) + 2; 1477 if (l == 1) 1478 return (1); 1479 p->bDescriptorType = UDESC_STRING; 1480 l -= 2; 1481 for (i = 0; s[i] && l > 1; i++, l -= 2) 1482 USETW2(p->bString[i], 0, s[i]); 1483 return (2*i+2); 1484 } 1485 1486 /* 1487 * Simulate a hardware hub by handling all the necessary requests. 1488 */ 1489 Static usbd_status 1490 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1491 { 1492 usbd_status err; 1493 1494 /* Insert last in queue. */ 1495 err = usb_insert_transfer(xfer); 1496 if (err) 1497 return (err); 1498 1499 /* Pipe isn't running, start first */ 1500 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1501 } 1502 1503 Static usbd_status 1504 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1505 { 1506 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1507 usb_device_request_t *req; 1508 void *buf = NULL; 1509 int port, i; 1510 int s, len, value, index, l, totlen = 0; 1511 usb_port_status_t ps; 1512 usb_hub_descriptor_t hubd; 1513 usbd_status err; 1514 u_int32_t v; 1515 1516 if (sc->sc_dying) 1517 return (USBD_IOERROR); 1518 1519 #ifdef DIAGNOSTIC 1520 if (!(xfer->rqflags & URQ_REQUEST)) 1521 /* XXX panic */ 1522 return (USBD_INVAL); 1523 #endif 1524 req = &xfer->request; 1525 1526 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1527 req->bmRequestType, req->bRequest)); 1528 1529 len = UGETW(req->wLength); 1530 value = UGETW(req->wValue); 1531 index = UGETW(req->wIndex); 1532 1533 if (len != 0) 1534 buf = KERNADDR(&xfer->dmabuf, 0); 1535 1536 #define C(x,y) ((x) | ((y) << 8)) 1537 switch(C(req->bRequest, req->bmRequestType)) { 1538 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1539 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1540 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1541 /* 1542 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1543 * for the integrated root hub. 1544 */ 1545 break; 1546 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1547 if (len > 0) { 1548 *(u_int8_t *)buf = sc->sc_conf; 1549 totlen = 1; 1550 } 1551 break; 1552 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1553 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1554 switch(value >> 8) { 1555 case UDESC_DEVICE: 1556 if ((value & 0xff) != 0) { 1557 err = USBD_IOERROR; 1558 goto ret; 1559 } 1560 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1561 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1562 memcpy(buf, &ehci_devd, l); 1563 break; 1564 /* 1565 * We can't really operate at another speed, but the spec says 1566 * we need this descriptor. 1567 */ 1568 case UDESC_DEVICE_QUALIFIER: 1569 if ((value & 0xff) != 0) { 1570 err = USBD_IOERROR; 1571 goto ret; 1572 } 1573 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1574 memcpy(buf, &ehci_odevd, l); 1575 break; 1576 /* 1577 * We can't really operate at another speed, but the spec says 1578 * we need this descriptor. 1579 */ 1580 case UDESC_OTHER_SPEED_CONFIGURATION: 1581 case UDESC_CONFIG: 1582 if ((value & 0xff) != 0) { 1583 err = USBD_IOERROR; 1584 goto ret; 1585 } 1586 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1587 memcpy(buf, &ehci_confd, l); 1588 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1589 value >> 8; 1590 buf = (char *)buf + l; 1591 len -= l; 1592 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1593 totlen += l; 1594 memcpy(buf, &ehci_ifcd, l); 1595 buf = (char *)buf + l; 1596 len -= l; 1597 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1598 totlen += l; 1599 memcpy(buf, &ehci_endpd, l); 1600 break; 1601 case UDESC_STRING: 1602 if (len == 0) 1603 break; 1604 *(u_int8_t *)buf = 0; 1605 totlen = 1; 1606 switch (value & 0xff) { 1607 case 1: /* Vendor */ 1608 totlen = ehci_str(buf, len, sc->sc_vendor); 1609 break; 1610 case 2: /* Product */ 1611 totlen = ehci_str(buf, len, "EHCI root hub"); 1612 break; 1613 } 1614 break; 1615 default: 1616 err = USBD_IOERROR; 1617 goto ret; 1618 } 1619 break; 1620 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1621 if (len > 0) { 1622 *(u_int8_t *)buf = 0; 1623 totlen = 1; 1624 } 1625 break; 1626 case C(UR_GET_STATUS, UT_READ_DEVICE): 1627 if (len > 1) { 1628 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1629 totlen = 2; 1630 } 1631 break; 1632 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1633 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1634 if (len > 1) { 1635 USETW(((usb_status_t *)buf)->wStatus, 0); 1636 totlen = 2; 1637 } 1638 break; 1639 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1640 if (value >= USB_MAX_DEVICES) { 1641 err = USBD_IOERROR; 1642 goto ret; 1643 } 1644 sc->sc_addr = value; 1645 break; 1646 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1647 if (value != 0 && value != 1) { 1648 err = USBD_IOERROR; 1649 goto ret; 1650 } 1651 sc->sc_conf = value; 1652 break; 1653 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1654 break; 1655 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1656 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1657 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1658 err = USBD_IOERROR; 1659 goto ret; 1660 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1661 break; 1662 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1663 break; 1664 /* Hub requests */ 1665 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1666 break; 1667 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1668 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1669 "port=%d feature=%d\n", 1670 index, value)); 1671 if (index < 1 || index > sc->sc_noport) { 1672 err = USBD_IOERROR; 1673 goto ret; 1674 } 1675 port = EHCI_PORTSC(index); 1676 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1677 switch(value) { 1678 case UHF_PORT_ENABLE: 1679 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1680 break; 1681 case UHF_PORT_SUSPEND: 1682 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1683 break; 1684 case UHF_PORT_POWER: 1685 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1686 break; 1687 case UHF_PORT_TEST: 1688 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1689 "%d\n", index)); 1690 break; 1691 case UHF_PORT_INDICATOR: 1692 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1693 "%d\n", index)); 1694 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1695 break; 1696 case UHF_C_PORT_CONNECTION: 1697 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1698 break; 1699 case UHF_C_PORT_ENABLE: 1700 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1701 break; 1702 case UHF_C_PORT_SUSPEND: 1703 /* how? */ 1704 break; 1705 case UHF_C_PORT_OVER_CURRENT: 1706 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1707 break; 1708 case UHF_C_PORT_RESET: 1709 sc->sc_isreset = 0; 1710 break; 1711 default: 1712 err = USBD_IOERROR; 1713 goto ret; 1714 } 1715 #if 0 1716 switch(value) { 1717 case UHF_C_PORT_CONNECTION: 1718 case UHF_C_PORT_ENABLE: 1719 case UHF_C_PORT_SUSPEND: 1720 case UHF_C_PORT_OVER_CURRENT: 1721 case UHF_C_PORT_RESET: 1722 /* Enable RHSC interrupt if condition is cleared. */ 1723 if ((OREAD4(sc, port) >> 16) == 0) 1724 ehci_pcd_able(sc, 1); 1725 break; 1726 default: 1727 break; 1728 } 1729 #endif 1730 break; 1731 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1732 if ((value & 0xff) != 0) { 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 hubd = ehci_hubd; 1737 hubd.bNbrPorts = sc->sc_noport; 1738 v = EOREAD4(sc, EHCI_HCSPARAMS); 1739 USETW(hubd.wHubCharacteristics, 1740 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1741 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1742 ? UHD_PORT_IND : 0); 1743 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1744 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1745 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1746 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1747 l = min(len, hubd.bDescLength); 1748 totlen = l; 1749 memcpy(buf, &hubd, l); 1750 break; 1751 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1752 if (len != 4) { 1753 err = USBD_IOERROR; 1754 goto ret; 1755 } 1756 memset(buf, 0, len); /* ? XXX */ 1757 totlen = len; 1758 break; 1759 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1760 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1761 index)); 1762 if (index < 1 || index > sc->sc_noport) { 1763 err = USBD_IOERROR; 1764 goto ret; 1765 } 1766 if (len != 4) { 1767 err = USBD_IOERROR; 1768 goto ret; 1769 } 1770 v = EOREAD4(sc, EHCI_PORTSC(index)); 1771 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1772 v)); 1773 i = UPS_HIGH_SPEED; 1774 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1775 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1776 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1777 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1778 if (v & EHCI_PS_PR) i |= UPS_RESET; 1779 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1780 USETW(ps.wPortStatus, i); 1781 i = 0; 1782 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1783 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1784 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1785 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1786 USETW(ps.wPortChange, i); 1787 l = min(len, sizeof ps); 1788 memcpy(buf, &ps, l); 1789 totlen = l; 1790 break; 1791 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1792 err = USBD_IOERROR; 1793 goto ret; 1794 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1795 break; 1796 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1797 if (index < 1 || index > sc->sc_noport) { 1798 err = USBD_IOERROR; 1799 goto ret; 1800 } 1801 port = EHCI_PORTSC(index); 1802 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1803 switch(value) { 1804 case UHF_PORT_ENABLE: 1805 EOWRITE4(sc, port, v | EHCI_PS_PE); 1806 break; 1807 case UHF_PORT_SUSPEND: 1808 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1809 break; 1810 case UHF_PORT_RESET: 1811 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1812 index)); 1813 if (EHCI_PS_IS_LOWSPEED(v)) { 1814 /* Low speed device, give up ownership. */ 1815 ehci_disown(sc, index, 1); 1816 break; 1817 } 1818 /* Start reset sequence. */ 1819 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1820 EOWRITE4(sc, port, v | EHCI_PS_PR); 1821 /* Wait for reset to complete. */ 1822 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1823 if (sc->sc_dying) { 1824 err = USBD_IOERROR; 1825 goto ret; 1826 } 1827 /* Terminate reset sequence. */ 1828 EOWRITE4(sc, port, v); 1829 /* Wait for HC to complete reset. */ 1830 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1831 if (sc->sc_dying) { 1832 err = USBD_IOERROR; 1833 goto ret; 1834 } 1835 v = EOREAD4(sc, port); 1836 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1837 if (v & EHCI_PS_PR) { 1838 printf("%s: port reset timeout\n", 1839 USBDEVNAME(sc->sc_bus.bdev)); 1840 return (USBD_TIMEOUT); 1841 } 1842 if (!(v & EHCI_PS_PE)) { 1843 /* Not a high speed device, give up ownership.*/ 1844 ehci_disown(sc, index, 0); 1845 break; 1846 } 1847 sc->sc_isreset = 1; 1848 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1849 index, v)); 1850 break; 1851 case UHF_PORT_POWER: 1852 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1853 "%d\n", index)); 1854 EOWRITE4(sc, port, v | EHCI_PS_PP); 1855 break; 1856 case UHF_PORT_TEST: 1857 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1858 "%d\n", index)); 1859 break; 1860 case UHF_PORT_INDICATOR: 1861 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1862 "%d\n", index)); 1863 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1864 break; 1865 default: 1866 err = USBD_IOERROR; 1867 goto ret; 1868 } 1869 break; 1870 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1871 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1872 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1873 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1874 break; 1875 default: 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 xfer->actlen = totlen; 1880 err = USBD_NORMAL_COMPLETION; 1881 ret: 1882 xfer->status = err; 1883 s = splusb(); 1884 usb_transfer_complete(xfer); 1885 splx(s); 1886 return (USBD_IN_PROGRESS); 1887 } 1888 1889 void 1890 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1891 { 1892 int port; 1893 u_int32_t v; 1894 1895 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1896 #ifdef DIAGNOSTIC 1897 if (sc->sc_npcomp != 0) { 1898 int i = (index-1) / sc->sc_npcomp; 1899 if (i >= sc->sc_ncomp) 1900 printf("%s: strange port\n", 1901 USBDEVNAME(sc->sc_bus.bdev)); 1902 else 1903 printf("%s: handing over %s speed device on " 1904 "port %d to %s\n", 1905 USBDEVNAME(sc->sc_bus.bdev), 1906 lowspeed ? "low" : "full", 1907 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1908 } else { 1909 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1910 } 1911 #endif 1912 port = EHCI_PORTSC(index); 1913 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1914 EOWRITE4(sc, port, v | EHCI_PS_PO); 1915 } 1916 1917 /* Abort a root control request. */ 1918 Static void 1919 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1920 { 1921 /* Nothing to do, all transfers are synchronous. */ 1922 } 1923 1924 /* Close the root pipe. */ 1925 Static void 1926 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1927 { 1928 DPRINTF(("ehci_root_ctrl_close\n")); 1929 /* Nothing to do. */ 1930 } 1931 1932 void 1933 ehci_root_intr_done(usbd_xfer_handle xfer) 1934 { 1935 xfer->hcpriv = NULL; 1936 } 1937 1938 Static usbd_status 1939 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1940 { 1941 usbd_status err; 1942 1943 /* Insert last in queue. */ 1944 err = usb_insert_transfer(xfer); 1945 if (err) 1946 return (err); 1947 1948 /* Pipe isn't running, start first */ 1949 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1950 } 1951 1952 Static usbd_status 1953 ehci_root_intr_start(usbd_xfer_handle xfer) 1954 { 1955 usbd_pipe_handle pipe = xfer->pipe; 1956 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1957 1958 if (sc->sc_dying) 1959 return (USBD_IOERROR); 1960 1961 sc->sc_intrxfer = xfer; 1962 1963 return (USBD_IN_PROGRESS); 1964 } 1965 1966 /* Abort a root interrupt request. */ 1967 Static void 1968 ehci_root_intr_abort(usbd_xfer_handle xfer) 1969 { 1970 int s; 1971 1972 if (xfer->pipe->intrxfer == xfer) { 1973 DPRINTF(("ehci_root_intr_abort: remove\n")); 1974 xfer->pipe->intrxfer = NULL; 1975 } 1976 xfer->status = USBD_CANCELLED; 1977 s = splusb(); 1978 usb_transfer_complete(xfer); 1979 splx(s); 1980 } 1981 1982 /* Close the root pipe. */ 1983 Static void 1984 ehci_root_intr_close(usbd_pipe_handle pipe) 1985 { 1986 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1987 1988 DPRINTF(("ehci_root_intr_close\n")); 1989 1990 sc->sc_intrxfer = NULL; 1991 } 1992 1993 void 1994 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1995 { 1996 xfer->hcpriv = NULL; 1997 } 1998 1999 /************************/ 2000 2001 ehci_soft_qh_t * 2002 ehci_alloc_sqh(ehci_softc_t *sc) 2003 { 2004 ehci_soft_qh_t *sqh; 2005 usbd_status err; 2006 int i, offs; 2007 usb_dma_t dma; 2008 2009 if (sc->sc_freeqhs == NULL) { 2010 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2011 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2012 EHCI_PAGE_SIZE, &dma); 2013 #ifdef EHCI_DEBUG 2014 if (err) 2015 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2016 #endif 2017 if (err) 2018 return (NULL); 2019 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2020 offs = i * EHCI_SQH_SIZE; 2021 sqh = KERNADDR(&dma, offs); 2022 sqh->physaddr = DMAADDR(&dma, offs); 2023 sqh->next = sc->sc_freeqhs; 2024 sc->sc_freeqhs = sqh; 2025 } 2026 } 2027 sqh = sc->sc_freeqhs; 2028 sc->sc_freeqhs = sqh->next; 2029 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2030 sqh->next = NULL; 2031 return (sqh); 2032 } 2033 2034 void 2035 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2036 { 2037 sqh->next = sc->sc_freeqhs; 2038 sc->sc_freeqhs = sqh; 2039 } 2040 2041 ehci_soft_qtd_t * 2042 ehci_alloc_sqtd(ehci_softc_t *sc) 2043 { 2044 ehci_soft_qtd_t *sqtd; 2045 usbd_status err; 2046 int i, offs; 2047 usb_dma_t dma; 2048 int s; 2049 2050 if (sc->sc_freeqtds == NULL) { 2051 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2052 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2053 EHCI_PAGE_SIZE, &dma); 2054 #ifdef EHCI_DEBUG 2055 if (err) 2056 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2057 #endif 2058 if (err) 2059 return (NULL); 2060 s = splusb(); 2061 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2062 offs = i * EHCI_SQTD_SIZE; 2063 sqtd = KERNADDR(&dma, offs); 2064 sqtd->physaddr = DMAADDR(&dma, offs); 2065 sqtd->nextqtd = sc->sc_freeqtds; 2066 sc->sc_freeqtds = sqtd; 2067 } 2068 splx(s); 2069 } 2070 2071 s = splusb(); 2072 sqtd = sc->sc_freeqtds; 2073 sc->sc_freeqtds = sqtd->nextqtd; 2074 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2075 sqtd->nextqtd = NULL; 2076 sqtd->xfer = NULL; 2077 splx(s); 2078 2079 return (sqtd); 2080 } 2081 2082 void 2083 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2084 { 2085 int s; 2086 2087 s = splusb(); 2088 sqtd->nextqtd = sc->sc_freeqtds; 2089 sc->sc_freeqtds = sqtd; 2090 splx(s); 2091 } 2092 2093 usbd_status 2094 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2095 int alen, int rd, usbd_xfer_handle xfer, 2096 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2097 { 2098 ehci_soft_qtd_t *next, *cur; 2099 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2100 u_int32_t qtdstatus; 2101 int len, curlen, mps; 2102 int i, tog; 2103 usb_dma_t *dma = &xfer->dmabuf; 2104 2105 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2106 2107 len = alen; 2108 dataphys = DMAADDR(dma, 0); 2109 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2110 #if 0 2111 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2112 epipe->nexttoggle); 2113 #endif 2114 qtdstatus = EHCI_QTD_ACTIVE | 2115 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2116 EHCI_QTD_SET_CERR(3) 2117 /* IOC set below */ 2118 /* BYTES set below */ 2119 ; 2120 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2121 tog = epipe->nexttoggle; 2122 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2123 2124 cur = ehci_alloc_sqtd(sc); 2125 *sp = cur; 2126 if (cur == NULL) 2127 goto nomem; 2128 for (;;) { 2129 dataphyspage = EHCI_PAGE(dataphys); 2130 /* The EHCI hardware can handle at most 5 pages. */ 2131 if (dataphyslastpage - dataphyspage < 2132 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2133 /* we can handle it in this QTD */ 2134 curlen = len; 2135 } else { 2136 /* must use multiple TDs, fill as much as possible. */ 2137 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2138 EHCI_PAGE_OFFSET(dataphys); 2139 #ifdef DIAGNOSTIC 2140 if (curlen > len) { 2141 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2142 "len=0x%x offs=0x%x\n", curlen, len, 2143 EHCI_PAGE_OFFSET(dataphys)); 2144 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2145 dataphyslastpage, dataphyspage, 2146 dataphys); 2147 curlen = len; 2148 } 2149 #endif 2150 /* the length must be a multiple of the max size */ 2151 curlen -= curlen % mps; 2152 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2153 "curlen=%d\n", curlen)); 2154 #ifdef DIAGNOSTIC 2155 if (curlen == 0) 2156 panic("ehci_alloc_std: curlen == 0"); 2157 #endif 2158 } 2159 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2160 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2161 dataphys, dataphyslastpage, 2162 len, curlen)); 2163 len -= curlen; 2164 2165 if (len != 0) { 2166 next = ehci_alloc_sqtd(sc); 2167 if (next == NULL) 2168 goto nomem; 2169 nextphys = htole32(next->physaddr); 2170 } else { 2171 next = NULL; 2172 nextphys = EHCI_NULL; 2173 } 2174 2175 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2176 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2177 if (i != 0) /* use offset only in first buffer */ 2178 a = EHCI_PAGE(a); 2179 cur->qtd.qtd_buffer[i] = htole32(a); 2180 cur->qtd.qtd_buffer_hi[i] = 0; 2181 #ifdef DIAGNOSTIC 2182 if (i >= EHCI_QTD_NBUFFERS) { 2183 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2184 goto nomem; 2185 } 2186 #endif 2187 } 2188 cur->nextqtd = next; 2189 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2190 cur->qtd.qtd_status = 2191 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2192 cur->xfer = xfer; 2193 cur->len = curlen; 2194 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2195 dataphys, dataphys + curlen)); 2196 /* adjust the toggle based on the number of packets in this 2197 qtd */ 2198 if (((curlen + mps - 1) / mps) & 1) { 2199 tog ^= 1; 2200 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2201 } 2202 if (len == 0) 2203 break; 2204 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2205 dataphys += curlen; 2206 cur = next; 2207 } 2208 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2209 *ep = cur; 2210 epipe->nexttoggle = tog; 2211 2212 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2213 *sp, *ep)); 2214 2215 return (USBD_NORMAL_COMPLETION); 2216 2217 nomem: 2218 /* XXX free chain */ 2219 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2220 return (USBD_NOMEM); 2221 } 2222 2223 Static void 2224 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2225 ehci_soft_qtd_t *sqtdend) 2226 { 2227 ehci_soft_qtd_t *p; 2228 int i; 2229 2230 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2231 sqtd, sqtdend)); 2232 2233 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2234 p = sqtd->nextqtd; 2235 ehci_free_sqtd(sc, sqtd); 2236 } 2237 } 2238 2239 /****************/ 2240 2241 /* 2242 * Close a reqular pipe. 2243 * Assumes that there are no pending transactions. 2244 */ 2245 void 2246 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2247 { 2248 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2249 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2250 ehci_soft_qh_t *sqh = epipe->sqh; 2251 int s; 2252 2253 s = splusb(); 2254 ehci_rem_qh(sc, sqh, head); 2255 splx(s); 2256 ehci_free_sqh(sc, epipe->sqh); 2257 } 2258 2259 /* 2260 * Abort a device request. 2261 * If this routine is called at splusb() it guarantees that the request 2262 * will be removed from the hardware scheduling and that the callback 2263 * for it will be called with USBD_CANCELLED status. 2264 * It's impossible to guarantee that the requested transfer will not 2265 * have happened since the hardware runs concurrently. 2266 * If the transaction has already happened we rely on the ordinary 2267 * interrupt processing to process it. 2268 * XXX This is most probably wrong. 2269 */ 2270 void 2271 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2272 { 2273 #define exfer EXFER(xfer) 2274 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2275 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2276 ehci_soft_qh_t *sqh = epipe->sqh; 2277 ehci_soft_qtd_t *sqtd; 2278 ehci_physaddr_t cur; 2279 u_int32_t qhstatus; 2280 int s; 2281 int hit; 2282 2283 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2284 2285 if (sc->sc_dying) { 2286 /* If we're dying, just do the software part. */ 2287 s = splusb(); 2288 xfer->status = status; /* make software ignore it */ 2289 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2290 usb_transfer_complete(xfer); 2291 splx(s); 2292 return; 2293 } 2294 2295 if (xfer->device->bus->intr_context || !curproc) 2296 panic("ehci_abort_xfer: not in process context"); 2297 2298 /* 2299 * Step 1: Make interrupt routine and hardware ignore xfer. 2300 */ 2301 s = splusb(); 2302 xfer->status = status; /* make software ignore it */ 2303 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2304 qhstatus = sqh->qh.qh_qtd.qtd_status; 2305 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2306 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2307 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2308 if (sqtd == exfer->sqtdend) 2309 break; 2310 } 2311 splx(s); 2312 2313 /* 2314 * Step 2: Wait until we know hardware has finished any possible 2315 * use of the xfer. Also make sure the soft interrupt routine 2316 * has run. 2317 */ 2318 ehci_sync_hc(sc); 2319 s = splusb(); 2320 sc->sc_softwake = 1; 2321 usb_schedsoftintr(&sc->sc_bus); 2322 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2323 splx(s); 2324 2325 /* 2326 * Step 3: Remove any vestiges of the xfer from the hardware. 2327 * The complication here is that the hardware may have executed 2328 * beyond the xfer we're trying to abort. So as we're scanning 2329 * the TDs of this xfer we check if the hardware points to 2330 * any of them. 2331 */ 2332 s = splusb(); /* XXX why? */ 2333 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2334 hit = 0; 2335 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2336 hit |= cur == sqtd->physaddr; 2337 if (sqtd == exfer->sqtdend) 2338 break; 2339 } 2340 sqtd = sqtd->nextqtd; 2341 /* Zap curqtd register if hardware pointed inside the xfer. */ 2342 if (hit && sqtd != NULL) { 2343 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2344 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2345 sqh->qh.qh_qtd.qtd_status = qhstatus; 2346 } else { 2347 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2348 } 2349 2350 /* 2351 * Step 4: Execute callback. 2352 */ 2353 #ifdef DIAGNOSTIC 2354 exfer->isdone = 1; 2355 #endif 2356 usb_transfer_complete(xfer); 2357 2358 splx(s); 2359 #undef exfer 2360 } 2361 2362 void 2363 ehci_timeout(void *addr) 2364 { 2365 struct ehci_xfer *exfer = addr; 2366 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2367 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2368 2369 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2370 #ifdef USB_DEBUG 2371 if (ehcidebug > 1) 2372 usbd_dump_pipe(exfer->xfer.pipe); 2373 #endif 2374 2375 if (sc->sc_dying) { 2376 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2377 return; 2378 } 2379 2380 /* Execute the abort in a process context. */ 2381 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2382 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2383 } 2384 2385 void 2386 ehci_timeout_task(void *addr) 2387 { 2388 usbd_xfer_handle xfer = addr; 2389 int s; 2390 2391 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2392 2393 s = splusb(); 2394 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2395 splx(s); 2396 } 2397 2398 /************************/ 2399 2400 Static usbd_status 2401 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2402 { 2403 usbd_status err; 2404 2405 /* Insert last in queue. */ 2406 err = usb_insert_transfer(xfer); 2407 if (err) 2408 return (err); 2409 2410 /* Pipe isn't running, start first */ 2411 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2412 } 2413 2414 Static usbd_status 2415 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2416 { 2417 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2418 usbd_status err; 2419 2420 if (sc->sc_dying) 2421 return (USBD_IOERROR); 2422 2423 #ifdef DIAGNOSTIC 2424 if (!(xfer->rqflags & URQ_REQUEST)) { 2425 /* XXX panic */ 2426 printf("ehci_device_ctrl_transfer: not a request\n"); 2427 return (USBD_INVAL); 2428 } 2429 #endif 2430 2431 err = ehci_device_request(xfer); 2432 if (err) 2433 return (err); 2434 2435 if (sc->sc_bus.use_polling) 2436 ehci_waitintr(sc, xfer); 2437 return (USBD_IN_PROGRESS); 2438 } 2439 2440 void 2441 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2442 { 2443 struct ehci_xfer *ex = EXFER(xfer); 2444 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2445 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2446 2447 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2448 2449 #ifdef DIAGNOSTIC 2450 if (!(xfer->rqflags & URQ_REQUEST)) { 2451 panic("ehci_ctrl_done: not a request"); 2452 } 2453 #endif 2454 2455 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2456 ehci_del_intr_list(ex); /* remove from active list */ 2457 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2458 } 2459 2460 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2461 } 2462 2463 /* Abort a device control request. */ 2464 Static void 2465 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2466 { 2467 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2468 ehci_abort_xfer(xfer, USBD_CANCELLED); 2469 } 2470 2471 /* Close a device control pipe. */ 2472 Static void 2473 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2474 { 2475 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2476 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2477 2478 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2479 ehci_close_pipe(pipe, sc->sc_async_head); 2480 } 2481 2482 usbd_status 2483 ehci_device_request(usbd_xfer_handle xfer) 2484 { 2485 #define exfer EXFER(xfer) 2486 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2487 usb_device_request_t *req = &xfer->request; 2488 usbd_device_handle dev = epipe->pipe.device; 2489 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2490 int addr = dev->address; 2491 ehci_soft_qtd_t *setup, *stat, *next; 2492 ehci_soft_qh_t *sqh; 2493 int isread; 2494 int len; 2495 usbd_status err; 2496 int s; 2497 2498 isread = req->bmRequestType & UT_READ; 2499 len = UGETW(req->wLength); 2500 2501 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2502 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2503 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2504 UGETW(req->wIndex), len, addr, 2505 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2506 2507 setup = ehci_alloc_sqtd(sc); 2508 if (setup == NULL) { 2509 err = USBD_NOMEM; 2510 goto bad1; 2511 } 2512 stat = ehci_alloc_sqtd(sc); 2513 if (stat == NULL) { 2514 err = USBD_NOMEM; 2515 goto bad2; 2516 } 2517 2518 sqh = epipe->sqh; 2519 epipe->u.ctl.length = len; 2520 2521 /* Update device address and length since they may have changed 2522 during the setup of the control pipe in usbd_new_device(). */ 2523 /* XXX This only needs to be done once, but it's too early in open. */ 2524 /* XXXX Should not touch ED here! */ 2525 sqh->qh.qh_endp = 2526 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2527 htole32( 2528 EHCI_QH_SET_ADDR(addr) | 2529 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2530 ); 2531 2532 /* Set up data transaction */ 2533 if (len != 0) { 2534 ehci_soft_qtd_t *end; 2535 2536 /* Start toggle at 1. */ 2537 epipe->nexttoggle = 1; 2538 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2539 &next, &end); 2540 if (err) 2541 goto bad3; 2542 end->nextqtd = stat; 2543 end->qtd.qtd_next = 2544 end->qtd.qtd_altnext = htole32(stat->physaddr); 2545 } else { 2546 next = stat; 2547 } 2548 2549 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2550 2551 /* Clear toggle */ 2552 setup->qtd.qtd_status = htole32( 2553 EHCI_QTD_ACTIVE | 2554 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2555 EHCI_QTD_SET_CERR(3) | 2556 EHCI_QTD_SET_TOGGLE(0) | 2557 EHCI_QTD_SET_BYTES(sizeof *req) 2558 ); 2559 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2560 setup->qtd.qtd_buffer_hi[0] = 0; 2561 setup->nextqtd = next; 2562 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2563 setup->xfer = xfer; 2564 setup->len = sizeof *req; 2565 2566 stat->qtd.qtd_status = htole32( 2567 EHCI_QTD_ACTIVE | 2568 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2569 EHCI_QTD_SET_CERR(3) | 2570 EHCI_QTD_SET_TOGGLE(1) | 2571 EHCI_QTD_IOC 2572 ); 2573 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2574 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2575 stat->nextqtd = NULL; 2576 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2577 stat->xfer = xfer; 2578 stat->len = 0; 2579 2580 #ifdef EHCI_DEBUG 2581 if (ehcidebug > 5) { 2582 DPRINTF(("ehci_device_request:\n")); 2583 ehci_dump_sqh(sqh); 2584 ehci_dump_sqtds(setup); 2585 } 2586 #endif 2587 2588 exfer->sqtdstart = setup; 2589 exfer->sqtdend = stat; 2590 #ifdef DIAGNOSTIC 2591 if (!exfer->isdone) { 2592 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2593 } 2594 exfer->isdone = 0; 2595 #endif 2596 2597 /* Insert qTD in QH list. */ 2598 s = splusb(); 2599 ehci_set_qh_qtd(sqh, setup); 2600 if (xfer->timeout && !sc->sc_bus.use_polling) { 2601 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2602 ehci_timeout, xfer); 2603 } 2604 ehci_add_intr_list(sc, exfer); 2605 xfer->status = USBD_IN_PROGRESS; 2606 splx(s); 2607 2608 #ifdef EHCI_DEBUG 2609 if (ehcidebug > 10) { 2610 DPRINTF(("ehci_device_request: status=%x\n", 2611 EOREAD4(sc, EHCI_USBSTS))); 2612 delay(10000); 2613 ehci_dump_regs(sc); 2614 ehci_dump_sqh(sc->sc_async_head); 2615 ehci_dump_sqh(sqh); 2616 ehci_dump_sqtds(setup); 2617 } 2618 #endif 2619 2620 return (USBD_NORMAL_COMPLETION); 2621 2622 bad3: 2623 ehci_free_sqtd(sc, stat); 2624 bad2: 2625 ehci_free_sqtd(sc, setup); 2626 bad1: 2627 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2628 xfer->status = err; 2629 usb_transfer_complete(xfer); 2630 return (err); 2631 #undef exfer 2632 } 2633 2634 /************************/ 2635 2636 Static usbd_status 2637 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2638 { 2639 usbd_status err; 2640 2641 /* Insert last in queue. */ 2642 err = usb_insert_transfer(xfer); 2643 if (err) 2644 return (err); 2645 2646 /* Pipe isn't running, start first */ 2647 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2648 } 2649 2650 usbd_status 2651 ehci_device_bulk_start(usbd_xfer_handle xfer) 2652 { 2653 #define exfer EXFER(xfer) 2654 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2655 usbd_device_handle dev = epipe->pipe.device; 2656 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2657 ehci_soft_qtd_t *data, *dataend; 2658 ehci_soft_qh_t *sqh; 2659 usbd_status err; 2660 int len, isread, endpt; 2661 int s; 2662 2663 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2664 xfer, xfer->length, xfer->flags)); 2665 2666 if (sc->sc_dying) 2667 return (USBD_IOERROR); 2668 2669 #ifdef DIAGNOSTIC 2670 if (xfer->rqflags & URQ_REQUEST) 2671 panic("ehci_device_bulk_transfer: a request"); 2672 #endif 2673 2674 len = xfer->length; 2675 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2676 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2677 sqh = epipe->sqh; 2678 2679 epipe->u.bulk.length = len; 2680 2681 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2682 &dataend); 2683 if (err) { 2684 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2685 xfer->status = err; 2686 usb_transfer_complete(xfer); 2687 return (err); 2688 } 2689 2690 #ifdef EHCI_DEBUG 2691 if (ehcidebug > 5) { 2692 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2693 ehci_dump_sqh(sqh); 2694 ehci_dump_sqtds(data); 2695 } 2696 #endif 2697 2698 /* Set up interrupt info. */ 2699 exfer->sqtdstart = data; 2700 exfer->sqtdend = dataend; 2701 #ifdef DIAGNOSTIC 2702 if (!exfer->isdone) { 2703 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2704 } 2705 exfer->isdone = 0; 2706 #endif 2707 2708 s = splusb(); 2709 ehci_set_qh_qtd(sqh, data); 2710 if (xfer->timeout && !sc->sc_bus.use_polling) { 2711 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2712 ehci_timeout, xfer); 2713 } 2714 ehci_add_intr_list(sc, exfer); 2715 xfer->status = USBD_IN_PROGRESS; 2716 splx(s); 2717 2718 #ifdef EHCI_DEBUG 2719 if (ehcidebug > 10) { 2720 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2721 delay(10000); 2722 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2723 ehci_dump_regs(sc); 2724 #if 0 2725 printf("async_head:\n"); 2726 ehci_dump_sqh(sc->sc_async_head); 2727 #endif 2728 printf("sqh:\n"); 2729 ehci_dump_sqh(sqh); 2730 ehci_dump_sqtds(data); 2731 } 2732 #endif 2733 2734 if (sc->sc_bus.use_polling) 2735 ehci_waitintr(sc, xfer); 2736 2737 return (USBD_IN_PROGRESS); 2738 #undef exfer 2739 } 2740 2741 Static void 2742 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2743 { 2744 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2745 ehci_abort_xfer(xfer, USBD_CANCELLED); 2746 } 2747 2748 /* 2749 * Close a device bulk pipe. 2750 */ 2751 Static void 2752 ehci_device_bulk_close(usbd_pipe_handle pipe) 2753 { 2754 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2755 2756 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2757 ehci_close_pipe(pipe, sc->sc_async_head); 2758 } 2759 2760 void 2761 ehci_device_bulk_done(usbd_xfer_handle xfer) 2762 { 2763 struct ehci_xfer *ex = EXFER(xfer); 2764 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2765 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2766 2767 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2768 xfer, xfer->actlen)); 2769 2770 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2771 ehci_del_intr_list(ex); /* remove from active list */ 2772 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2773 } 2774 2775 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2776 } 2777 2778 /************************/ 2779 2780 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2781 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2782 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2783 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2784 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2785 2786 /************************/ 2787 2788 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2789 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2790 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2791 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2792 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2793
Indexes created Mon Sep 22 21:09:42 GMT 2025