ehci.c revision 1.68
1 /* $NetBSD: ehci.c,v 1.68 2004/07/09 05:07:06 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite compolicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.68 2004/07/09 05:07:06 mycroft Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) if (ehcidebug) printf x 96 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 /* Reset the controller */ 363 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 364 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 365 usb_delay_ms(&sc->sc_bus, 1); 366 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 367 for (i = 0; i < 100; i++) { 368 usb_delay_ms(&sc->sc_bus, 1); 369 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 370 if (!hcr) 371 break; 372 } 373 if (hcr) { 374 aprint_error("%s: reset timeout\n", 375 USBDEVNAME(sc->sc_bus.bdev)); 376 return (USBD_IOERROR); 377 } 378 379 /* frame list size at default, read back what we got and use that */ 380 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 381 case 0: sc->sc_flsize = 1024*4; break; 382 case 1: sc->sc_flsize = 512*4; break; 383 case 2: sc->sc_flsize = 256*4; break; 384 case 3: return (USBD_IOERROR); 385 } 386 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 387 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 388 if (err) 389 return (err); 390 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 391 392 /* Set up the bus struct. */ 393 sc->sc_bus.methods = &ehci_bus_methods; 394 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 395 396 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 397 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 398 399 sc->sc_eintrs = EHCI_NORMAL_INTRS; 400 401 /* Allocate dummy QH that starts the async list. */ 402 sqh = ehci_alloc_sqh(sc); 403 if (sqh == NULL) { 404 err = USBD_NOMEM; 405 goto bad1; 406 } 407 /* Fill the QH */ 408 sqh->qh.qh_endp = 409 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 410 sqh->qh.qh_link = 411 htole32(sqh->physaddr | EHCI_LINK_QH); 412 sqh->qh.qh_curqtd = EHCI_NULL; 413 sqh->next = NULL; 414 /* Fill the overlay qTD */ 415 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 416 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 417 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 418 sqh->sqtd = NULL; 419 #ifdef EHCI_DEBUG 420 if (ehcidebug) { 421 ehci_dump_sqh(sqh); 422 } 423 #endif 424 425 /* Point to async list */ 426 sc->sc_async_head = sqh; 427 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 428 429 usb_callout_init(sc->sc_tmo_pcd); 430 431 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 432 433 /* Enable interrupts */ 434 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 435 436 /* Turn on controller */ 437 EOWRITE4(sc, EHCI_USBCMD, 438 EHCI_CMD_ITC_8 | /* 8 microframes */ 439 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 440 EHCI_CMD_ASE | 441 /* EHCI_CMD_PSE | */ 442 EHCI_CMD_RS); 443 444 /* Take over port ownership */ 445 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 446 447 for (i = 0; i < 100; i++) { 448 usb_delay_ms(&sc->sc_bus, 1); 449 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 450 if (!hcr) 451 break; 452 } 453 if (hcr) { 454 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 455 return (USBD_IOERROR); 456 } 457 458 return (USBD_NORMAL_COMPLETION); 459 460 #if 0 461 bad2: 462 ehci_free_sqh(sc, sc->sc_async_head); 463 #endif 464 bad1: 465 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 466 return (err); 467 } 468 469 int 470 ehci_intr(void *v) 471 { 472 ehci_softc_t *sc = v; 473 474 if (sc == NULL || sc->sc_dying) 475 return (0); 476 477 /* If we get an interrupt while polling, then just ignore it. */ 478 if (sc->sc_bus.use_polling) { 479 #ifdef DIAGNOSTIC 480 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 481 #endif 482 return (0); 483 } 484 485 return (ehci_intr1(sc)); 486 } 487 488 Static int 489 ehci_intr1(ehci_softc_t *sc) 490 { 491 u_int32_t intrs, eintrs; 492 493 DPRINTFN(20,("ehci_intr1: enter\n")); 494 495 /* In case the interrupt occurs before initialization has completed. */ 496 if (sc == NULL) { 497 #ifdef DIAGNOSTIC 498 printf("ehci_intr: sc == NULL\n"); 499 #endif 500 return (0); 501 } 502 503 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 504 if (!intrs) 505 return (0); 506 507 eintrs = intrs & sc->sc_eintrs; 508 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 509 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 510 (u_int)eintrs)); 511 if (!eintrs) 512 return (0); 513 514 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 515 sc->sc_bus.intr_context++; 516 sc->sc_bus.no_intrs++; 517 if (eintrs & EHCI_STS_IAA) { 518 DPRINTF(("ehci_intr1: door bell\n")); 519 wakeup(&sc->sc_async_head); 520 eintrs &= ~EHCI_STS_IAA; 521 } 522 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 523 DPRINTFN(5,("ehci_intr1: %s %s\n", 524 eintrs & EHCI_STS_INT ? "INT" : "", 525 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 526 usb_schedsoftintr(&sc->sc_bus); 527 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 528 } 529 if (eintrs & EHCI_STS_HSE) { 530 printf("%s: unrecoverable error, controller halted\n", 531 USBDEVNAME(sc->sc_bus.bdev)); 532 /* XXX what else */ 533 } 534 if (eintrs & EHCI_STS_PCD) { 535 ehci_pcd(sc, sc->sc_intrxfer); 536 /* 537 * Disable PCD interrupt for now, because it will be 538 * on until the port has been reset. 539 */ 540 ehci_pcd_able(sc, 0); 541 /* Do not allow RHSC interrupts > 1 per second */ 542 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 543 eintrs &= ~EHCI_STS_PCD; 544 } 545 546 sc->sc_bus.intr_context--; 547 548 if (eintrs != 0) { 549 /* Block unprocessed interrupts. */ 550 sc->sc_eintrs &= ~eintrs; 551 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 552 printf("%s: blocking intrs 0x%x\n", 553 USBDEVNAME(sc->sc_bus.bdev), eintrs); 554 } 555 556 return (1); 557 } 558 559 void 560 ehci_pcd_able(ehci_softc_t *sc, int on) 561 { 562 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 563 if (on) 564 sc->sc_eintrs |= EHCI_STS_PCD; 565 else 566 sc->sc_eintrs &= ~EHCI_STS_PCD; 567 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 568 } 569 570 void 571 ehci_pcd_enable(void *v_sc) 572 { 573 ehci_softc_t *sc = v_sc; 574 575 ehci_pcd_able(sc, 1); 576 } 577 578 void 579 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 580 { 581 usbd_pipe_handle pipe; 582 u_char *p; 583 int i, m; 584 585 if (xfer == NULL) { 586 /* Just ignore the change. */ 587 return; 588 } 589 590 pipe = xfer->pipe; 591 592 p = KERNADDR(&xfer->dmabuf, 0); 593 m = min(sc->sc_noport, xfer->length * 8 - 1); 594 memset(p, 0, xfer->length); 595 for (i = 1; i <= m; i++) { 596 /* Pick out CHANGE bits from the status reg. */ 597 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 598 p[i/8] |= 1 << (i%8); 599 } 600 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 601 xfer->actlen = xfer->length; 602 xfer->status = USBD_NORMAL_COMPLETION; 603 604 usb_transfer_complete(xfer); 605 } 606 607 void 608 ehci_softintr(void *v) 609 { 610 ehci_softc_t *sc = v; 611 struct ehci_xfer *ex, *nextex; 612 613 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 614 sc->sc_bus.intr_context)); 615 616 sc->sc_bus.intr_context++; 617 618 /* 619 * The only explanation I can think of for why EHCI is as brain dead 620 * as UHCI interrupt-wise is that Intel was involved in both. 621 * An interrupt just tells us that something is done, we have no 622 * clue what, so we need to scan through all active transfers. :-( 623 */ 624 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 625 nextex = LIST_NEXT(ex, inext); 626 ehci_check_intr(sc, ex); 627 } 628 629 if (sc->sc_softwake) { 630 sc->sc_softwake = 0; 631 wakeup(&sc->sc_softwake); 632 } 633 634 sc->sc_bus.intr_context--; 635 } 636 637 /* Check for an interrupt. */ 638 void 639 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 640 { 641 ehci_soft_qtd_t *sqtd, *lsqtd; 642 u_int32_t status; 643 644 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 645 646 if (ex->sqtdstart == NULL) { 647 printf("ehci_check_intr: sqtdstart=NULL\n"); 648 return; 649 } 650 lsqtd = ex->sqtdend; 651 #ifdef DIAGNOSTIC 652 if (lsqtd == NULL) { 653 printf("ehci_check_intr: sqtd==0\n"); 654 return; 655 } 656 #endif 657 /* 658 * If the last TD is still active we need to check whether there 659 * is a an error somewhere in the middle, or whether there was a 660 * short packet (SPD and not ACTIVE). 661 */ 662 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 663 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 664 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 665 status = le32toh(sqtd->qtd.qtd_status); 666 /* If there's an active QTD the xfer isn't done. */ 667 if (status & EHCI_QTD_ACTIVE) 668 break; 669 /* Any kind of error makes the xfer done. */ 670 if (status & EHCI_QTD_HALTED) 671 goto done; 672 /* We want short packets, and it is short: it's done */ 673 if (EHCI_QTD_GET_BYTES(status) != 0) 674 goto done; 675 } 676 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 677 ex, ex->sqtdstart)); 678 return; 679 } 680 done: 681 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 682 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 683 ehci_idone(ex); 684 } 685 686 void 687 ehci_idone(struct ehci_xfer *ex) 688 { 689 usbd_xfer_handle xfer = &ex->xfer; 690 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 691 ehci_soft_qtd_t *sqtd; 692 u_int32_t status = 0, nstatus; 693 int actlen; 694 695 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 696 #ifdef DIAGNOSTIC 697 { 698 int s = splhigh(); 699 if (ex->isdone) { 700 splx(s); 701 #ifdef EHCI_DEBUG 702 printf("ehci_idone: ex is done!\n "); 703 ehci_dump_exfer(ex); 704 #else 705 printf("ehci_idone: ex=%p is done!\n", ex); 706 #endif 707 return; 708 } 709 ex->isdone = 1; 710 splx(s); 711 } 712 #endif 713 714 if (xfer->status == USBD_CANCELLED || 715 xfer->status == USBD_TIMEOUT) { 716 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 717 return; 718 } 719 720 #ifdef EHCI_DEBUG 721 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 722 if (ehcidebug > 10) 723 ehci_dump_sqtds(ex->sqtdstart); 724 #endif 725 726 /* The transfer is done, compute actual length and status. */ 727 actlen = 0; 728 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 729 nstatus = le32toh(sqtd->qtd.qtd_status); 730 if (nstatus & EHCI_QTD_ACTIVE) 731 break; 732 733 status = nstatus; 734 /* halt is ok if descriptor is last, and complete */ 735 if (sqtd->qtd.qtd_next == EHCI_NULL && 736 EHCI_QTD_GET_BYTES(status) == 0) 737 status &= ~EHCI_QTD_HALTED; 738 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 739 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 740 } 741 742 /* If there are left over TDs we need to update the toggle. */ 743 if (sqtd != NULL) { 744 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 745 #if 0 746 ehci_dump_sqh(epipe->sqh); 747 ehci_dump_sqtds(ex->sqtdstart); 748 #endif 749 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 750 } 751 752 status &= EHCI_QTD_STATERRS; 753 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 754 xfer->length, actlen, status)); 755 xfer->actlen = actlen; 756 if (status != 0) { 757 #ifdef EHCI_DEBUG 758 char sbuf[128]; 759 760 bitmask_snprintf((u_int32_t)status, 761 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 762 "\3MISSED", sbuf, sizeof(sbuf)); 763 764 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 765 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 766 "status 0x%s\n", 767 xfer->pipe->device->address, 768 xfer->pipe->endpoint->edesc->bEndpointAddress, 769 sbuf)); 770 if (ehcidebug > 2) { 771 ehci_dump_sqh(epipe->sqh); 772 ehci_dump_sqtds(ex->sqtdstart); 773 } 774 #endif 775 if (status == EHCI_QTD_HALTED) 776 xfer->status = USBD_STALLED; 777 else 778 xfer->status = USBD_IOERROR; /* more info XXX */ 779 } else { 780 xfer->status = USBD_NORMAL_COMPLETION; 781 } 782 783 usb_transfer_complete(xfer); 784 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 785 } 786 787 /* 788 * Wait here until controller claims to have an interrupt. 789 * Then call ehci_intr and return. Use timeout to avoid waiting 790 * too long. 791 */ 792 void 793 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 794 { 795 int timo = xfer->timeout; 796 int usecs; 797 u_int32_t intrs; 798 799 xfer->status = USBD_IN_PROGRESS; 800 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 801 usb_delay_ms(&sc->sc_bus, 1); 802 if (sc->sc_dying) 803 break; 804 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 805 sc->sc_eintrs; 806 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 807 #ifdef OHCI_DEBUG 808 if (ehcidebug > 15) 809 ehci_dump_regs(sc); 810 #endif 811 if (intrs) { 812 ehci_intr1(sc); 813 if (xfer->status != USBD_IN_PROGRESS) 814 return; 815 } 816 } 817 818 /* Timeout */ 819 DPRINTF(("ehci_waitintr: timeout\n")); 820 xfer->status = USBD_TIMEOUT; 821 usb_transfer_complete(xfer); 822 /* XXX should free TD */ 823 } 824 825 void 826 ehci_poll(struct usbd_bus *bus) 827 { 828 ehci_softc_t *sc = (ehci_softc_t *)bus; 829 #ifdef EHCI_DEBUG 830 static int last; 831 int new; 832 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 833 if (new != last) { 834 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 835 last = new; 836 } 837 #endif 838 839 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 840 ehci_intr1(sc); 841 } 842 843 int 844 ehci_detach(struct ehci_softc *sc, int flags) 845 { 846 int rv = 0; 847 848 if (sc->sc_child != NULL) 849 rv = config_detach(sc->sc_child, flags); 850 851 if (rv != 0) 852 return (rv); 853 854 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 855 856 if (sc->sc_powerhook != NULL) 857 powerhook_disestablish(sc->sc_powerhook); 858 if (sc->sc_shutdownhook != NULL) 859 shutdownhook_disestablish(sc->sc_shutdownhook); 860 861 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 862 863 /* XXX free other data structures XXX */ 864 865 return (rv); 866 } 867 868 869 int 870 ehci_activate(device_ptr_t self, enum devact act) 871 { 872 struct ehci_softc *sc = (struct ehci_softc *)self; 873 int rv = 0; 874 875 switch (act) { 876 case DVACT_ACTIVATE: 877 return (EOPNOTSUPP); 878 879 case DVACT_DEACTIVATE: 880 if (sc->sc_child != NULL) 881 rv = config_deactivate(sc->sc_child); 882 sc->sc_dying = 1; 883 break; 884 } 885 return (rv); 886 } 887 888 /* 889 * Handle suspend/resume. 890 * 891 * We need to switch to polling mode here, because this routine is 892 * called from an intterupt context. This is all right since we 893 * are almost suspended anyway. 894 */ 895 void 896 ehci_power(int why, void *v) 897 { 898 ehci_softc_t *sc = v; 899 //u_int32_t ctl; 900 int s; 901 902 #ifdef EHCI_DEBUG 903 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 904 ehci_dump_regs(sc); 905 #endif 906 907 s = splhardusb(); 908 switch (why) { 909 case PWR_SUSPEND: 910 case PWR_STANDBY: 911 sc->sc_bus.use_polling++; 912 #if 0 913 OOO 914 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 915 if (sc->sc_control == 0) { 916 /* 917 * Preserve register values, in case that APM BIOS 918 * does not recover them. 919 */ 920 sc->sc_control = ctl; 921 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 922 } 923 ctl |= EHCI_HCFS_SUSPEND; 924 OWRITE4(sc, EHCI_CONTROL, ctl); 925 #endif 926 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 927 sc->sc_bus.use_polling--; 928 break; 929 case PWR_RESUME: 930 sc->sc_bus.use_polling++; 931 #if 0 932 OOO 933 /* Some broken BIOSes do not recover these values */ 934 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 935 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 936 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 937 if (sc->sc_intre) 938 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 939 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 940 if (sc->sc_control) 941 ctl = sc->sc_control; 942 else 943 ctl = OREAD4(sc, EHCI_CONTROL); 944 ctl |= EHCI_HCFS_RESUME; 945 OWRITE4(sc, EHCI_CONTROL, ctl); 946 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 947 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 948 OWRITE4(sc, EHCI_CONTROL, ctl); 949 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 950 sc->sc_control = sc->sc_intre = 0; 951 #endif 952 sc->sc_bus.use_polling--; 953 break; 954 case PWR_SOFTSUSPEND: 955 case PWR_SOFTSTANDBY: 956 case PWR_SOFTRESUME: 957 break; 958 } 959 splx(s); 960 } 961 962 /* 963 * Shut down the controller when the system is going down. 964 */ 965 void 966 ehci_shutdown(void *v) 967 { 968 ehci_softc_t *sc = v; 969 970 DPRINTF(("ehci_shutdown: stopping the HC\n")); 971 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 972 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 973 } 974 975 usbd_status 976 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 977 { 978 struct ehci_softc *sc = (struct ehci_softc *)bus; 979 usbd_status err; 980 981 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 982 #ifdef EHCI_DEBUG 983 if (err) 984 printf("ehci_allocm: usb_allocmem()=%d\n", err); 985 #endif 986 return (err); 987 } 988 989 void 990 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 991 { 992 struct ehci_softc *sc = (struct ehci_softc *)bus; 993 994 usb_freemem(&sc->sc_bus, dma); 995 } 996 997 usbd_xfer_handle 998 ehci_allocx(struct usbd_bus *bus) 999 { 1000 struct ehci_softc *sc = (struct ehci_softc *)bus; 1001 usbd_xfer_handle xfer; 1002 1003 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1004 if (xfer != NULL) { 1005 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1006 #ifdef DIAGNOSTIC 1007 if (xfer->busy_free != XFER_FREE) { 1008 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1009 xfer->busy_free); 1010 } 1011 #endif 1012 } else { 1013 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1014 } 1015 if (xfer != NULL) { 1016 memset(xfer, 0, sizeof (struct ehci_xfer)); 1017 #ifdef DIAGNOSTIC 1018 EXFER(xfer)->isdone = 1; 1019 xfer->busy_free = XFER_BUSY; 1020 #endif 1021 } 1022 return (xfer); 1023 } 1024 1025 void 1026 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1027 { 1028 struct ehci_softc *sc = (struct ehci_softc *)bus; 1029 1030 #ifdef DIAGNOSTIC 1031 if (xfer->busy_free != XFER_BUSY) { 1032 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1033 xfer->busy_free); 1034 return; 1035 } 1036 xfer->busy_free = XFER_FREE; 1037 if (!EXFER(xfer)->isdone) { 1038 printf("ehci_freex: !isdone\n"); 1039 return; 1040 } 1041 #endif 1042 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1043 } 1044 1045 Static void 1046 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1047 { 1048 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1049 1050 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1051 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1052 #ifdef USB_DEBUG 1053 if (ehcidebug) 1054 usbd_dump_pipe(pipe); 1055 #endif 1056 epipe->nexttoggle = 0; 1057 } 1058 1059 Static void 1060 ehci_noop(usbd_pipe_handle pipe) 1061 { 1062 } 1063 1064 #ifdef EHCI_DEBUG 1065 void 1066 ehci_dump_regs(ehci_softc_t *sc) 1067 { 1068 int i; 1069 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1070 EOREAD4(sc, EHCI_USBCMD), 1071 EOREAD4(sc, EHCI_USBSTS), 1072 EOREAD4(sc, EHCI_USBINTR)); 1073 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1074 EOREAD4(sc, EHCI_FRINDEX), 1075 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1076 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1077 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1078 for (i = 1; i <= sc->sc_noport; i++) 1079 printf("port %d status=0x%08x\n", i, 1080 EOREAD4(sc, EHCI_PORTSC(i))); 1081 } 1082 1083 /* 1084 * Unused function - this is meant to be called from a kernel 1085 * debugger. 1086 */ 1087 void 1088 ehci_dump() 1089 { 1090 ehci_dump_regs(theehci); 1091 } 1092 1093 void 1094 ehci_dump_link(ehci_link_t link, int type) 1095 { 1096 link = le32toh(link); 1097 printf("0x%08x", link); 1098 if (link & EHCI_LINK_TERMINATE) 1099 printf("<T>"); 1100 else { 1101 printf("<"); 1102 if (type) { 1103 switch (EHCI_LINK_TYPE(link)) { 1104 case EHCI_LINK_ITD: printf("ITD"); break; 1105 case EHCI_LINK_QH: printf("QH"); break; 1106 case EHCI_LINK_SITD: printf("SITD"); break; 1107 case EHCI_LINK_FSTN: printf("FSTN"); break; 1108 } 1109 } 1110 printf(">"); 1111 } 1112 } 1113 1114 void 1115 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1116 { 1117 int i; 1118 u_int32_t stop; 1119 1120 stop = 0; 1121 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1122 ehci_dump_sqtd(sqtd); 1123 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1124 } 1125 if (sqtd) 1126 printf("dump aborted, too many TDs\n"); 1127 } 1128 1129 void 1130 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1131 { 1132 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1133 ehci_dump_qtd(&sqtd->qtd); 1134 } 1135 1136 void 1137 ehci_dump_qtd(ehci_qtd_t *qtd) 1138 { 1139 u_int32_t s; 1140 char sbuf[128]; 1141 1142 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1143 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1144 printf("\n"); 1145 s = le32toh(qtd->qtd_status); 1146 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1147 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1148 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1149 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1150 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1151 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1152 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1153 EHCI_QTD_GET_PID(s), sbuf); 1154 for (s = 0; s < 5; s++) 1155 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1156 } 1157 1158 void 1159 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1160 { 1161 ehci_qh_t *qh = &sqh->qh; 1162 u_int32_t endp, endphub; 1163 1164 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1165 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1166 endp = le32toh(qh->qh_endp); 1167 printf(" endp=0x%08x\n", endp); 1168 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1169 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1170 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1171 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1172 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1173 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1174 EHCI_QH_GET_NRL(endp)); 1175 endphub = le32toh(qh->qh_endphub); 1176 printf(" endphub=0x%08x\n", endphub); 1177 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1178 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1179 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1180 EHCI_QH_GET_MULT(endphub)); 1181 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1182 printf("Overlay qTD:\n"); 1183 ehci_dump_qtd(&qh->qh_qtd); 1184 } 1185 1186 #ifdef DIAGNOSTIC 1187 Static void 1188 ehci_dump_exfer(struct ehci_xfer *ex) 1189 { 1190 printf("ehci_dump_exfer: ex=%p\n", ex); 1191 } 1192 #endif 1193 #endif 1194 1195 usbd_status 1196 ehci_open(usbd_pipe_handle pipe) 1197 { 1198 usbd_device_handle dev = pipe->device; 1199 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1200 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1201 u_int8_t addr = dev->address; 1202 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1203 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1204 ehci_soft_qh_t *sqh; 1205 usbd_status err; 1206 int s; 1207 int speed, naks; 1208 1209 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1210 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1211 1212 if (sc->sc_dying) 1213 return (USBD_IOERROR); 1214 1215 epipe->nexttoggle = 0; 1216 1217 if (addr == sc->sc_addr) { 1218 switch (ed->bEndpointAddress) { 1219 case USB_CONTROL_ENDPOINT: 1220 pipe->methods = &ehci_root_ctrl_methods; 1221 break; 1222 case UE_DIR_IN | EHCI_INTR_ENDPT: 1223 pipe->methods = &ehci_root_intr_methods; 1224 break; 1225 default: 1226 return (USBD_INVAL); 1227 } 1228 return (USBD_NORMAL_COMPLETION); 1229 } 1230 1231 /* XXX All this stuff is only valid for async. */ 1232 switch (dev->speed) { 1233 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1234 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1235 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1236 default: panic("ehci_open: bad device speed %d", dev->speed); 1237 } 1238 naks = 8; /* XXX */ 1239 sqh = ehci_alloc_sqh(sc); 1240 if (sqh == NULL) 1241 goto bad0; 1242 /* qh_link filled when the QH is added */ 1243 sqh->qh.qh_endp = htole32( 1244 EHCI_QH_SET_ADDR(addr) | 1245 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1246 EHCI_QH_SET_EPS(speed) | 1247 EHCI_QH_DTC | 1248 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1249 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1250 EHCI_QH_CTL : 0) | 1251 EHCI_QH_SET_NRL(naks) 1252 ); 1253 sqh->qh.qh_endphub = htole32( 1254 EHCI_QH_SET_MULT(1) 1255 /* XXX TT stuff */ 1256 /* XXX interrupt mask */ 1257 ); 1258 sqh->qh.qh_curqtd = EHCI_NULL; 1259 /* Fill the overlay qTD */ 1260 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1261 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1262 sqh->qh.qh_qtd.qtd_status = htole32(0); 1263 1264 epipe->sqh = sqh; 1265 1266 switch (xfertype) { 1267 case UE_CONTROL: 1268 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1269 0, &epipe->u.ctl.reqdma); 1270 #ifdef EHCI_DEBUG 1271 if (err) 1272 printf("ehci_open: usb_allocmem()=%d\n", err); 1273 #endif 1274 if (err) 1275 goto bad1; 1276 pipe->methods = &ehci_device_ctrl_methods; 1277 s = splusb(); 1278 ehci_add_qh(sqh, sc->sc_async_head); 1279 splx(s); 1280 break; 1281 case UE_BULK: 1282 pipe->methods = &ehci_device_bulk_methods; 1283 s = splusb(); 1284 ehci_add_qh(sqh, sc->sc_async_head); 1285 splx(s); 1286 break; 1287 case UE_INTERRUPT: 1288 pipe->methods = &ehci_device_intr_methods; 1289 return (USBD_INVAL); 1290 case UE_ISOCHRONOUS: 1291 pipe->methods = &ehci_device_isoc_methods; 1292 return (USBD_INVAL); 1293 default: 1294 return (USBD_INVAL); 1295 } 1296 return (USBD_NORMAL_COMPLETION); 1297 1298 bad1: 1299 ehci_free_sqh(sc, sqh); 1300 bad0: 1301 return (USBD_NOMEM); 1302 } 1303 1304 /* 1305 * Add an ED to the schedule. Called at splusb(). 1306 */ 1307 void 1308 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1309 { 1310 SPLUSBCHECK; 1311 1312 sqh->next = head->next; 1313 sqh->qh.qh_link = head->qh.qh_link; 1314 head->next = sqh; 1315 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1316 1317 #ifdef EHCI_DEBUG 1318 if (ehcidebug > 5) { 1319 printf("ehci_add_qh:\n"); 1320 ehci_dump_sqh(sqh); 1321 } 1322 #endif 1323 } 1324 1325 /* 1326 * Remove an ED from the schedule. Called at splusb(). 1327 */ 1328 void 1329 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1330 { 1331 ehci_soft_qh_t *p; 1332 1333 SPLUSBCHECK; 1334 /* XXX */ 1335 for (p = head; p != NULL && p->next != sqh; p = p->next) 1336 ; 1337 if (p == NULL) 1338 panic("ehci_rem_qh: ED not found"); 1339 p->next = sqh->next; 1340 p->qh.qh_link = sqh->qh.qh_link; 1341 1342 ehci_sync_hc(sc); 1343 } 1344 1345 void 1346 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1347 { 1348 /* Halt while we are messing. */ 1349 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1350 sqh->qh.qh_curqtd = 0; 1351 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1352 sqh->sqtd = sqtd; 1353 /* Clear halt */ 1354 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1355 } 1356 1357 /* 1358 * Ensure that the HC has released all references to the QH. We do this 1359 * by asking for a Async Advance Doorbell interrupt and then we wait for 1360 * the interrupt. 1361 * To make this easier we first obtain exclusive use of the doorbell. 1362 */ 1363 void 1364 ehci_sync_hc(ehci_softc_t *sc) 1365 { 1366 int s, error; 1367 1368 if (sc->sc_dying) { 1369 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1370 return; 1371 } 1372 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1373 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1374 s = splhardusb(); 1375 /* ask for doorbell */ 1376 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1377 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1378 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1379 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1380 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1381 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1382 splx(s); 1383 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1384 #ifdef DIAGNOSTIC 1385 if (error) 1386 printf("ehci_sync_hc: tsleep() = %d\n", error); 1387 #endif 1388 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1389 } 1390 1391 /***********/ 1392 1393 /* 1394 * Data structures and routines to emulate the root hub. 1395 */ 1396 Static usb_device_descriptor_t ehci_devd = { 1397 USB_DEVICE_DESCRIPTOR_SIZE, 1398 UDESC_DEVICE, /* type */ 1399 {0x00, 0x02}, /* USB version */ 1400 UDCLASS_HUB, /* class */ 1401 UDSUBCLASS_HUB, /* subclass */ 1402 UDPROTO_HSHUBSTT, /* protocol */ 1403 64, /* max packet */ 1404 {0},{0},{0x00,0x01}, /* device id */ 1405 1,2,0, /* string indicies */ 1406 1 /* # of configurations */ 1407 }; 1408 1409 Static usb_device_qualifier_t ehci_odevd = { 1410 USB_DEVICE_DESCRIPTOR_SIZE, 1411 UDESC_DEVICE_QUALIFIER, /* type */ 1412 {0x00, 0x02}, /* USB version */ 1413 UDCLASS_HUB, /* class */ 1414 UDSUBCLASS_HUB, /* subclass */ 1415 UDPROTO_FSHUB, /* protocol */ 1416 64, /* max packet */ 1417 1, /* # of configurations */ 1418 0 1419 }; 1420 1421 Static usb_config_descriptor_t ehci_confd = { 1422 USB_CONFIG_DESCRIPTOR_SIZE, 1423 UDESC_CONFIG, 1424 {USB_CONFIG_DESCRIPTOR_SIZE + 1425 USB_INTERFACE_DESCRIPTOR_SIZE + 1426 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1427 1, 1428 1, 1429 0, 1430 UC_SELF_POWERED, 1431 0 /* max power */ 1432 }; 1433 1434 Static usb_interface_descriptor_t ehci_ifcd = { 1435 USB_INTERFACE_DESCRIPTOR_SIZE, 1436 UDESC_INTERFACE, 1437 0, 1438 0, 1439 1, 1440 UICLASS_HUB, 1441 UISUBCLASS_HUB, 1442 UIPROTO_HSHUBSTT, 1443 0 1444 }; 1445 1446 Static usb_endpoint_descriptor_t ehci_endpd = { 1447 USB_ENDPOINT_DESCRIPTOR_SIZE, 1448 UDESC_ENDPOINT, 1449 UE_DIR_IN | EHCI_INTR_ENDPT, 1450 UE_INTERRUPT, 1451 {8, 0}, /* max packet */ 1452 255 1453 }; 1454 1455 Static usb_hub_descriptor_t ehci_hubd = { 1456 USB_HUB_DESCRIPTOR_SIZE, 1457 UDESC_HUB, 1458 0, 1459 {0,0}, 1460 0, 1461 0, 1462 {0}, 1463 }; 1464 1465 Static int 1466 ehci_str(p, l, s) 1467 usb_string_descriptor_t *p; 1468 int l; 1469 char *s; 1470 { 1471 int i; 1472 1473 if (l == 0) 1474 return (0); 1475 p->bLength = 2 * strlen(s) + 2; 1476 if (l == 1) 1477 return (1); 1478 p->bDescriptorType = UDESC_STRING; 1479 l -= 2; 1480 for (i = 0; s[i] && l > 1; i++, l -= 2) 1481 USETW2(p->bString[i], 0, s[i]); 1482 return (2*i+2); 1483 } 1484 1485 /* 1486 * Simulate a hardware hub by handling all the necessary requests. 1487 */ 1488 Static usbd_status 1489 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1490 { 1491 usbd_status err; 1492 1493 /* Insert last in queue. */ 1494 err = usb_insert_transfer(xfer); 1495 if (err) 1496 return (err); 1497 1498 /* Pipe isn't running, start first */ 1499 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1500 } 1501 1502 Static usbd_status 1503 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1504 { 1505 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1506 usb_device_request_t *req; 1507 void *buf = NULL; 1508 int port, i; 1509 int s, len, value, index, l, totlen = 0; 1510 usb_port_status_t ps; 1511 usb_hub_descriptor_t hubd; 1512 usbd_status err; 1513 u_int32_t v; 1514 1515 if (sc->sc_dying) 1516 return (USBD_IOERROR); 1517 1518 #ifdef DIAGNOSTIC 1519 if (!(xfer->rqflags & URQ_REQUEST)) 1520 /* XXX panic */ 1521 return (USBD_INVAL); 1522 #endif 1523 req = &xfer->request; 1524 1525 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1526 req->bmRequestType, req->bRequest)); 1527 1528 len = UGETW(req->wLength); 1529 value = UGETW(req->wValue); 1530 index = UGETW(req->wIndex); 1531 1532 if (len != 0) 1533 buf = KERNADDR(&xfer->dmabuf, 0); 1534 1535 #define C(x,y) ((x) | ((y) << 8)) 1536 switch(C(req->bRequest, req->bmRequestType)) { 1537 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1538 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1539 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1540 /* 1541 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1542 * for the integrated root hub. 1543 */ 1544 break; 1545 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1546 if (len > 0) { 1547 *(u_int8_t *)buf = sc->sc_conf; 1548 totlen = 1; 1549 } 1550 break; 1551 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1552 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1553 switch(value >> 8) { 1554 case UDESC_DEVICE: 1555 if ((value & 0xff) != 0) { 1556 err = USBD_IOERROR; 1557 goto ret; 1558 } 1559 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1560 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1561 memcpy(buf, &ehci_devd, l); 1562 break; 1563 /* 1564 * We can't really operate at another speed, but the spec says 1565 * we need this descriptor. 1566 */ 1567 case UDESC_DEVICE_QUALIFIER: 1568 if ((value & 0xff) != 0) { 1569 err = USBD_IOERROR; 1570 goto ret; 1571 } 1572 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1573 memcpy(buf, &ehci_odevd, l); 1574 break; 1575 /* 1576 * We can't really operate at another speed, but the spec says 1577 * we need this descriptor. 1578 */ 1579 case UDESC_OTHER_SPEED_CONFIGURATION: 1580 case UDESC_CONFIG: 1581 if ((value & 0xff) != 0) { 1582 err = USBD_IOERROR; 1583 goto ret; 1584 } 1585 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1586 memcpy(buf, &ehci_confd, l); 1587 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1588 value >> 8; 1589 buf = (char *)buf + l; 1590 len -= l; 1591 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1592 totlen += l; 1593 memcpy(buf, &ehci_ifcd, l); 1594 buf = (char *)buf + l; 1595 len -= l; 1596 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1597 totlen += l; 1598 memcpy(buf, &ehci_endpd, l); 1599 break; 1600 case UDESC_STRING: 1601 if (len == 0) 1602 break; 1603 *(u_int8_t *)buf = 0; 1604 totlen = 1; 1605 switch (value & 0xff) { 1606 case 1: /* Vendor */ 1607 totlen = ehci_str(buf, len, sc->sc_vendor); 1608 break; 1609 case 2: /* Product */ 1610 totlen = ehci_str(buf, len, "EHCI root hub"); 1611 break; 1612 } 1613 break; 1614 default: 1615 err = USBD_IOERROR; 1616 goto ret; 1617 } 1618 break; 1619 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1620 if (len > 0) { 1621 *(u_int8_t *)buf = 0; 1622 totlen = 1; 1623 } 1624 break; 1625 case C(UR_GET_STATUS, UT_READ_DEVICE): 1626 if (len > 1) { 1627 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1628 totlen = 2; 1629 } 1630 break; 1631 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1632 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1633 if (len > 1) { 1634 USETW(((usb_status_t *)buf)->wStatus, 0); 1635 totlen = 2; 1636 } 1637 break; 1638 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1639 if (value >= USB_MAX_DEVICES) { 1640 err = USBD_IOERROR; 1641 goto ret; 1642 } 1643 sc->sc_addr = value; 1644 break; 1645 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1646 if (value != 0 && value != 1) { 1647 err = USBD_IOERROR; 1648 goto ret; 1649 } 1650 sc->sc_conf = value; 1651 break; 1652 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1653 break; 1654 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1655 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1656 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1657 err = USBD_IOERROR; 1658 goto ret; 1659 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1660 break; 1661 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1662 break; 1663 /* Hub requests */ 1664 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1665 break; 1666 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1667 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1668 "port=%d feature=%d\n", 1669 index, value)); 1670 if (index < 1 || index > sc->sc_noport) { 1671 err = USBD_IOERROR; 1672 goto ret; 1673 } 1674 port = EHCI_PORTSC(index); 1675 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1676 switch(value) { 1677 case UHF_PORT_ENABLE: 1678 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1679 break; 1680 case UHF_PORT_SUSPEND: 1681 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1682 break; 1683 case UHF_PORT_POWER: 1684 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1685 break; 1686 case UHF_PORT_TEST: 1687 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1688 "%d\n", index)); 1689 break; 1690 case UHF_PORT_INDICATOR: 1691 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1692 "%d\n", index)); 1693 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1694 break; 1695 case UHF_C_PORT_CONNECTION: 1696 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1697 break; 1698 case UHF_C_PORT_ENABLE: 1699 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1700 break; 1701 case UHF_C_PORT_SUSPEND: 1702 /* how? */ 1703 break; 1704 case UHF_C_PORT_OVER_CURRENT: 1705 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1706 break; 1707 case UHF_C_PORT_RESET: 1708 sc->sc_isreset = 0; 1709 break; 1710 default: 1711 err = USBD_IOERROR; 1712 goto ret; 1713 } 1714 #if 0 1715 switch(value) { 1716 case UHF_C_PORT_CONNECTION: 1717 case UHF_C_PORT_ENABLE: 1718 case UHF_C_PORT_SUSPEND: 1719 case UHF_C_PORT_OVER_CURRENT: 1720 case UHF_C_PORT_RESET: 1721 /* Enable RHSC interrupt if condition is cleared. */ 1722 if ((OREAD4(sc, port) >> 16) == 0) 1723 ehci_pcd_able(sc, 1); 1724 break; 1725 default: 1726 break; 1727 } 1728 #endif 1729 break; 1730 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1731 if ((value & 0xff) != 0) { 1732 err = USBD_IOERROR; 1733 goto ret; 1734 } 1735 hubd = ehci_hubd; 1736 hubd.bNbrPorts = sc->sc_noport; 1737 v = EOREAD4(sc, EHCI_HCSPARAMS); 1738 USETW(hubd.wHubCharacteristics, 1739 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1740 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1741 ? UHD_PORT_IND : 0); 1742 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1743 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1744 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1745 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1746 l = min(len, hubd.bDescLength); 1747 totlen = l; 1748 memcpy(buf, &hubd, l); 1749 break; 1750 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1751 if (len != 4) { 1752 err = USBD_IOERROR; 1753 goto ret; 1754 } 1755 memset(buf, 0, len); /* ? XXX */ 1756 totlen = len; 1757 break; 1758 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1759 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1760 index)); 1761 if (index < 1 || index > sc->sc_noport) { 1762 err = USBD_IOERROR; 1763 goto ret; 1764 } 1765 if (len != 4) { 1766 err = USBD_IOERROR; 1767 goto ret; 1768 } 1769 v = EOREAD4(sc, EHCI_PORTSC(index)); 1770 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1771 v)); 1772 i = UPS_HIGH_SPEED; 1773 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1774 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1775 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1776 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1777 if (v & EHCI_PS_PR) i |= UPS_RESET; 1778 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1779 USETW(ps.wPortStatus, i); 1780 i = 0; 1781 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1782 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1783 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1784 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1785 USETW(ps.wPortChange, i); 1786 l = min(len, sizeof ps); 1787 memcpy(buf, &ps, l); 1788 totlen = l; 1789 break; 1790 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1791 err = USBD_IOERROR; 1792 goto ret; 1793 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1794 break; 1795 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1796 if (index < 1 || index > sc->sc_noport) { 1797 err = USBD_IOERROR; 1798 goto ret; 1799 } 1800 port = EHCI_PORTSC(index); 1801 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1802 switch(value) { 1803 case UHF_PORT_ENABLE: 1804 EOWRITE4(sc, port, v | EHCI_PS_PE); 1805 break; 1806 case UHF_PORT_SUSPEND: 1807 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1808 break; 1809 case UHF_PORT_RESET: 1810 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1811 index)); 1812 if (EHCI_PS_IS_LOWSPEED(v)) { 1813 /* Low speed device, give up ownership. */ 1814 ehci_disown(sc, index, 1); 1815 break; 1816 } 1817 /* Start reset sequence. */ 1818 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1819 EOWRITE4(sc, port, v | EHCI_PS_PR); 1820 /* Wait for reset to complete. */ 1821 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1822 if (sc->sc_dying) { 1823 err = USBD_IOERROR; 1824 goto ret; 1825 } 1826 /* Terminate reset sequence. */ 1827 EOWRITE4(sc, port, v); 1828 /* Wait for HC to complete reset. */ 1829 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1830 if (sc->sc_dying) { 1831 err = USBD_IOERROR; 1832 goto ret; 1833 } 1834 v = EOREAD4(sc, port); 1835 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1836 if (v & EHCI_PS_PR) { 1837 printf("%s: port reset timeout\n", 1838 USBDEVNAME(sc->sc_bus.bdev)); 1839 return (USBD_TIMEOUT); 1840 } 1841 if (!(v & EHCI_PS_PE)) { 1842 /* Not a high speed device, give up ownership.*/ 1843 ehci_disown(sc, index, 0); 1844 break; 1845 } 1846 sc->sc_isreset = 1; 1847 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1848 index, v)); 1849 break; 1850 case UHF_PORT_POWER: 1851 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1852 "%d\n", index)); 1853 EOWRITE4(sc, port, v | EHCI_PS_PP); 1854 break; 1855 case UHF_PORT_TEST: 1856 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1857 "%d\n", index)); 1858 break; 1859 case UHF_PORT_INDICATOR: 1860 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1861 "%d\n", index)); 1862 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1863 break; 1864 default: 1865 err = USBD_IOERROR; 1866 goto ret; 1867 } 1868 break; 1869 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1870 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1871 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1872 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1873 break; 1874 default: 1875 err = USBD_IOERROR; 1876 goto ret; 1877 } 1878 xfer->actlen = totlen; 1879 err = USBD_NORMAL_COMPLETION; 1880 ret: 1881 xfer->status = err; 1882 s = splusb(); 1883 usb_transfer_complete(xfer); 1884 splx(s); 1885 return (USBD_IN_PROGRESS); 1886 } 1887 1888 void 1889 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1890 { 1891 int port; 1892 u_int32_t v; 1893 1894 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1895 #ifdef DIAGNOSTIC 1896 if (sc->sc_npcomp != 0) { 1897 int i = (index-1) / sc->sc_npcomp; 1898 if (i >= sc->sc_ncomp) 1899 printf("%s: strange port\n", 1900 USBDEVNAME(sc->sc_bus.bdev)); 1901 else 1902 printf("%s: handing over %s speed device on " 1903 "port %d to %s\n", 1904 USBDEVNAME(sc->sc_bus.bdev), 1905 lowspeed ? "low" : "full", 1906 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1907 } else { 1908 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1909 } 1910 #endif 1911 port = EHCI_PORTSC(index); 1912 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1913 EOWRITE4(sc, port, v | EHCI_PS_PO); 1914 } 1915 1916 /* Abort a root control request. */ 1917 Static void 1918 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1919 { 1920 /* Nothing to do, all transfers are synchronous. */ 1921 } 1922 1923 /* Close the root pipe. */ 1924 Static void 1925 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1926 { 1927 DPRINTF(("ehci_root_ctrl_close\n")); 1928 /* Nothing to do. */ 1929 } 1930 1931 void 1932 ehci_root_intr_done(usbd_xfer_handle xfer) 1933 { 1934 xfer->hcpriv = NULL; 1935 } 1936 1937 Static usbd_status 1938 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1939 { 1940 usbd_status err; 1941 1942 /* Insert last in queue. */ 1943 err = usb_insert_transfer(xfer); 1944 if (err) 1945 return (err); 1946 1947 /* Pipe isn't running, start first */ 1948 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1949 } 1950 1951 Static usbd_status 1952 ehci_root_intr_start(usbd_xfer_handle xfer) 1953 { 1954 usbd_pipe_handle pipe = xfer->pipe; 1955 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1956 1957 if (sc->sc_dying) 1958 return (USBD_IOERROR); 1959 1960 sc->sc_intrxfer = xfer; 1961 1962 return (USBD_IN_PROGRESS); 1963 } 1964 1965 /* Abort a root interrupt request. */ 1966 Static void 1967 ehci_root_intr_abort(usbd_xfer_handle xfer) 1968 { 1969 int s; 1970 1971 if (xfer->pipe->intrxfer == xfer) { 1972 DPRINTF(("ehci_root_intr_abort: remove\n")); 1973 xfer->pipe->intrxfer = NULL; 1974 } 1975 xfer->status = USBD_CANCELLED; 1976 s = splusb(); 1977 usb_transfer_complete(xfer); 1978 splx(s); 1979 } 1980 1981 /* Close the root pipe. */ 1982 Static void 1983 ehci_root_intr_close(usbd_pipe_handle pipe) 1984 { 1985 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1986 1987 DPRINTF(("ehci_root_intr_close\n")); 1988 1989 sc->sc_intrxfer = NULL; 1990 } 1991 1992 void 1993 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1994 { 1995 xfer->hcpriv = NULL; 1996 } 1997 1998 /************************/ 1999 2000 ehci_soft_qh_t * 2001 ehci_alloc_sqh(ehci_softc_t *sc) 2002 { 2003 ehci_soft_qh_t *sqh; 2004 usbd_status err; 2005 int i, offs; 2006 usb_dma_t dma; 2007 2008 if (sc->sc_freeqhs == NULL) { 2009 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2010 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2011 EHCI_PAGE_SIZE, &dma); 2012 #ifdef EHCI_DEBUG 2013 if (err) 2014 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2015 #endif 2016 if (err) 2017 return (NULL); 2018 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2019 offs = i * EHCI_SQH_SIZE; 2020 sqh = KERNADDR(&dma, offs); 2021 sqh->physaddr = DMAADDR(&dma, offs); 2022 sqh->next = sc->sc_freeqhs; 2023 sc->sc_freeqhs = sqh; 2024 } 2025 } 2026 sqh = sc->sc_freeqhs; 2027 sc->sc_freeqhs = sqh->next; 2028 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2029 sqh->next = NULL; 2030 return (sqh); 2031 } 2032 2033 void 2034 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2035 { 2036 sqh->next = sc->sc_freeqhs; 2037 sc->sc_freeqhs = sqh; 2038 } 2039 2040 ehci_soft_qtd_t * 2041 ehci_alloc_sqtd(ehci_softc_t *sc) 2042 { 2043 ehci_soft_qtd_t *sqtd; 2044 usbd_status err; 2045 int i, offs; 2046 usb_dma_t dma; 2047 int s; 2048 2049 if (sc->sc_freeqtds == NULL) { 2050 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2051 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2052 EHCI_PAGE_SIZE, &dma); 2053 #ifdef EHCI_DEBUG 2054 if (err) 2055 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2056 #endif 2057 if (err) 2058 return (NULL); 2059 s = splusb(); 2060 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2061 offs = i * EHCI_SQTD_SIZE; 2062 sqtd = KERNADDR(&dma, offs); 2063 sqtd->physaddr = DMAADDR(&dma, offs); 2064 sqtd->nextqtd = sc->sc_freeqtds; 2065 sc->sc_freeqtds = sqtd; 2066 } 2067 splx(s); 2068 } 2069 2070 s = splusb(); 2071 sqtd = sc->sc_freeqtds; 2072 sc->sc_freeqtds = sqtd->nextqtd; 2073 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2074 sqtd->nextqtd = NULL; 2075 sqtd->xfer = NULL; 2076 splx(s); 2077 2078 return (sqtd); 2079 } 2080 2081 void 2082 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2083 { 2084 int s; 2085 2086 s = splusb(); 2087 sqtd->nextqtd = sc->sc_freeqtds; 2088 sc->sc_freeqtds = sqtd; 2089 splx(s); 2090 } 2091 2092 usbd_status 2093 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2094 int alen, int rd, usbd_xfer_handle xfer, 2095 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2096 { 2097 ehci_soft_qtd_t *next, *cur; 2098 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2099 u_int32_t qtdstatus; 2100 int len, curlen, mps; 2101 int i, tog; 2102 usb_dma_t *dma = &xfer->dmabuf; 2103 2104 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2105 2106 len = alen; 2107 dataphys = DMAADDR(dma, 0); 2108 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2109 #if 0 2110 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2111 epipe->nexttoggle); 2112 #endif 2113 qtdstatus = EHCI_QTD_ACTIVE | 2114 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2115 EHCI_QTD_SET_CERR(3) 2116 /* IOC set below */ 2117 /* BYTES set below */ 2118 ; 2119 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2120 tog = epipe->nexttoggle; 2121 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2122 2123 cur = ehci_alloc_sqtd(sc); 2124 *sp = cur; 2125 if (cur == NULL) 2126 goto nomem; 2127 for (;;) { 2128 dataphyspage = EHCI_PAGE(dataphys); 2129 /* The EHCI hardware can handle at most 5 pages. */ 2130 if (dataphyslastpage - dataphyspage < 2131 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2132 /* we can handle it in this QTD */ 2133 curlen = len; 2134 } else { 2135 /* must use multiple TDs, fill as much as possible. */ 2136 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2137 EHCI_PAGE_OFFSET(dataphys); 2138 #ifdef DIAGNOSTIC 2139 if (curlen > len) { 2140 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2141 "len=0x%x offs=0x%x\n", curlen, len, 2142 EHCI_PAGE_OFFSET(dataphys)); 2143 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2144 dataphyslastpage, dataphyspage, 2145 dataphys); 2146 curlen = len; 2147 } 2148 #endif 2149 /* the length must be a multiple of the max size */ 2150 curlen -= curlen % mps; 2151 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2152 "curlen=%d\n", curlen)); 2153 #ifdef DIAGNOSTIC 2154 if (curlen == 0) 2155 panic("ehci_alloc_std: curlen == 0"); 2156 #endif 2157 } 2158 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2159 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2160 dataphys, dataphyslastpage, 2161 len, curlen)); 2162 len -= curlen; 2163 2164 if (len != 0) { 2165 next = ehci_alloc_sqtd(sc); 2166 if (next == NULL) 2167 goto nomem; 2168 nextphys = htole32(next->physaddr); 2169 } else { 2170 next = NULL; 2171 nextphys = EHCI_NULL; 2172 } 2173 2174 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2175 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2176 if (i != 0) /* use offset only in first buffer */ 2177 a = EHCI_PAGE(a); 2178 cur->qtd.qtd_buffer[i] = htole32(a); 2179 cur->qtd.qtd_buffer_hi[i] = 0; 2180 #ifdef DIAGNOSTIC 2181 if (i >= EHCI_QTD_NBUFFERS) { 2182 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2183 goto nomem; 2184 } 2185 #endif 2186 } 2187 cur->nextqtd = next; 2188 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2189 cur->qtd.qtd_status = 2190 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2191 cur->xfer = xfer; 2192 cur->len = curlen; 2193 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2194 dataphys, dataphys + curlen)); 2195 /* adjust the toggle based on the number of packets in this 2196 qtd */ 2197 if (((curlen + mps - 1) / mps) & 1) { 2198 tog ^= 1; 2199 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2200 } 2201 if (len == 0) 2202 break; 2203 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2204 dataphys += curlen; 2205 cur = next; 2206 } 2207 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2208 *ep = cur; 2209 epipe->nexttoggle = tog; 2210 2211 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2212 *sp, *ep)); 2213 2214 return (USBD_NORMAL_COMPLETION); 2215 2216 nomem: 2217 /* XXX free chain */ 2218 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2219 return (USBD_NOMEM); 2220 } 2221 2222 Static void 2223 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2224 ehci_soft_qtd_t *sqtdend) 2225 { 2226 ehci_soft_qtd_t *p; 2227 int i; 2228 2229 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2230 sqtd, sqtdend)); 2231 2232 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2233 p = sqtd->nextqtd; 2234 ehci_free_sqtd(sc, sqtd); 2235 } 2236 } 2237 2238 /****************/ 2239 2240 /* 2241 * Close a reqular pipe. 2242 * Assumes that there are no pending transactions. 2243 */ 2244 void 2245 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2246 { 2247 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2248 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2249 ehci_soft_qh_t *sqh = epipe->sqh; 2250 int s; 2251 2252 s = splusb(); 2253 ehci_rem_qh(sc, sqh, head); 2254 splx(s); 2255 ehci_free_sqh(sc, epipe->sqh); 2256 } 2257 2258 /* 2259 * Abort a device request. 2260 * If this routine is called at splusb() it guarantees that the request 2261 * will be removed from the hardware scheduling and that the callback 2262 * for it will be called with USBD_CANCELLED status. 2263 * It's impossible to guarantee that the requested transfer will not 2264 * have happened since the hardware runs concurrently. 2265 * If the transaction has already happened we rely on the ordinary 2266 * interrupt processing to process it. 2267 * XXX This is most probably wrong. 2268 */ 2269 void 2270 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2271 { 2272 #define exfer EXFER(xfer) 2273 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2274 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2275 ehci_soft_qh_t *sqh = epipe->sqh; 2276 ehci_soft_qtd_t *sqtd; 2277 ehci_physaddr_t cur; 2278 u_int32_t qhstatus; 2279 int s; 2280 int hit; 2281 2282 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2283 2284 if (sc->sc_dying) { 2285 /* If we're dying, just do the software part. */ 2286 s = splusb(); 2287 xfer->status = status; /* make software ignore it */ 2288 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2289 usb_transfer_complete(xfer); 2290 splx(s); 2291 return; 2292 } 2293 2294 if (xfer->device->bus->intr_context || !curproc) 2295 panic("ehci_abort_xfer: not in process context"); 2296 2297 /* 2298 * Step 1: Make interrupt routine and hardware ignore xfer. 2299 */ 2300 s = splusb(); 2301 xfer->status = status; /* make software ignore it */ 2302 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2303 qhstatus = sqh->qh.qh_qtd.qtd_status; 2304 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2305 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2306 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2307 if (sqtd == exfer->sqtdend) 2308 break; 2309 } 2310 splx(s); 2311 2312 /* 2313 * Step 2: Wait until we know hardware has finished any possible 2314 * use of the xfer. Also make sure the soft interrupt routine 2315 * has run. 2316 */ 2317 ehci_sync_hc(sc); 2318 s = splusb(); 2319 sc->sc_softwake = 1; 2320 usb_schedsoftintr(&sc->sc_bus); 2321 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2322 splx(s); 2323 2324 /* 2325 * Step 3: Remove any vestiges of the xfer from the hardware. 2326 * The complication here is that the hardware may have executed 2327 * beyond the xfer we're trying to abort. So as we're scanning 2328 * the TDs of this xfer we check if the hardware points to 2329 * any of them. 2330 */ 2331 s = splusb(); /* XXX why? */ 2332 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2333 hit = 0; 2334 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2335 hit |= cur == sqtd->physaddr; 2336 if (sqtd == exfer->sqtdend) 2337 break; 2338 } 2339 sqtd = sqtd->nextqtd; 2340 /* Zap curqtd register if hardware pointed inside the xfer. */ 2341 if (hit && sqtd != NULL) { 2342 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2343 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2344 sqh->qh.qh_qtd.qtd_status = qhstatus; 2345 } else { 2346 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2347 } 2348 2349 /* 2350 * Step 4: Execute callback. 2351 */ 2352 #ifdef DIAGNOSTIC 2353 exfer->isdone = 1; 2354 #endif 2355 usb_transfer_complete(xfer); 2356 2357 splx(s); 2358 #undef exfer 2359 } 2360 2361 void 2362 ehci_timeout(void *addr) 2363 { 2364 struct ehci_xfer *exfer = addr; 2365 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2366 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2367 2368 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2369 #ifdef USB_DEBUG 2370 if (ehcidebug > 1) 2371 usbd_dump_pipe(exfer->xfer.pipe); 2372 #endif 2373 2374 if (sc->sc_dying) { 2375 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2376 return; 2377 } 2378 2379 /* Execute the abort in a process context. */ 2380 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2381 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2382 } 2383 2384 void 2385 ehci_timeout_task(void *addr) 2386 { 2387 usbd_xfer_handle xfer = addr; 2388 int s; 2389 2390 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2391 2392 s = splusb(); 2393 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2394 splx(s); 2395 } 2396 2397 /************************/ 2398 2399 Static usbd_status 2400 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2401 { 2402 usbd_status err; 2403 2404 /* Insert last in queue. */ 2405 err = usb_insert_transfer(xfer); 2406 if (err) 2407 return (err); 2408 2409 /* Pipe isn't running, start first */ 2410 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2411 } 2412 2413 Static usbd_status 2414 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2415 { 2416 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2417 usbd_status err; 2418 2419 if (sc->sc_dying) 2420 return (USBD_IOERROR); 2421 2422 #ifdef DIAGNOSTIC 2423 if (!(xfer->rqflags & URQ_REQUEST)) { 2424 /* XXX panic */ 2425 printf("ehci_device_ctrl_transfer: not a request\n"); 2426 return (USBD_INVAL); 2427 } 2428 #endif 2429 2430 err = ehci_device_request(xfer); 2431 if (err) 2432 return (err); 2433 2434 if (sc->sc_bus.use_polling) 2435 ehci_waitintr(sc, xfer); 2436 return (USBD_IN_PROGRESS); 2437 } 2438 2439 void 2440 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2441 { 2442 struct ehci_xfer *ex = EXFER(xfer); 2443 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2444 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2445 2446 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2447 2448 #ifdef DIAGNOSTIC 2449 if (!(xfer->rqflags & URQ_REQUEST)) { 2450 panic("ehci_ctrl_done: not a request"); 2451 } 2452 #endif 2453 2454 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2455 ehci_del_intr_list(ex); /* remove from active list */ 2456 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2457 } 2458 2459 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2460 } 2461 2462 /* Abort a device control request. */ 2463 Static void 2464 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2465 { 2466 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2467 ehci_abort_xfer(xfer, USBD_CANCELLED); 2468 } 2469 2470 /* Close a device control pipe. */ 2471 Static void 2472 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2473 { 2474 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2475 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2476 2477 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2478 ehci_close_pipe(pipe, sc->sc_async_head); 2479 } 2480 2481 usbd_status 2482 ehci_device_request(usbd_xfer_handle xfer) 2483 { 2484 #define exfer EXFER(xfer) 2485 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2486 usb_device_request_t *req = &xfer->request; 2487 usbd_device_handle dev = epipe->pipe.device; 2488 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2489 int addr = dev->address; 2490 ehci_soft_qtd_t *setup, *stat, *next; 2491 ehci_soft_qh_t *sqh; 2492 int isread; 2493 int len; 2494 usbd_status err; 2495 int s; 2496 2497 isread = req->bmRequestType & UT_READ; 2498 len = UGETW(req->wLength); 2499 2500 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2501 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2502 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2503 UGETW(req->wIndex), len, addr, 2504 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2505 2506 setup = ehci_alloc_sqtd(sc); 2507 if (setup == NULL) { 2508 err = USBD_NOMEM; 2509 goto bad1; 2510 } 2511 stat = ehci_alloc_sqtd(sc); 2512 if (stat == NULL) { 2513 err = USBD_NOMEM; 2514 goto bad2; 2515 } 2516 2517 sqh = epipe->sqh; 2518 epipe->u.ctl.length = len; 2519 2520 /* Update device address and length since they may have changed 2521 during the setup of the control pipe in usbd_new_device(). */ 2522 /* XXX This only needs to be done once, but it's too early in open. */ 2523 /* XXXX Should not touch ED here! */ 2524 sqh->qh.qh_endp = 2525 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2526 htole32( 2527 EHCI_QH_SET_ADDR(addr) | 2528 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2529 ); 2530 2531 /* Set up data transaction */ 2532 if (len != 0) { 2533 ehci_soft_qtd_t *end; 2534 2535 /* Start toggle at 1. */ 2536 epipe->nexttoggle = 1; 2537 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2538 &next, &end); 2539 if (err) 2540 goto bad3; 2541 end->nextqtd = stat; 2542 end->qtd.qtd_next = 2543 end->qtd.qtd_altnext = htole32(stat->physaddr); 2544 } else { 2545 next = stat; 2546 } 2547 2548 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2549 2550 /* Clear toggle */ 2551 setup->qtd.qtd_status = htole32( 2552 EHCI_QTD_ACTIVE | 2553 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2554 EHCI_QTD_SET_CERR(3) | 2555 EHCI_QTD_SET_TOGGLE(0) | 2556 EHCI_QTD_SET_BYTES(sizeof *req) 2557 ); 2558 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2559 setup->qtd.qtd_buffer_hi[0] = 0; 2560 setup->nextqtd = next; 2561 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2562 setup->xfer = xfer; 2563 setup->len = sizeof *req; 2564 2565 stat->qtd.qtd_status = htole32( 2566 EHCI_QTD_ACTIVE | 2567 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2568 EHCI_QTD_SET_CERR(3) | 2569 EHCI_QTD_SET_TOGGLE(1) | 2570 EHCI_QTD_IOC 2571 ); 2572 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2573 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2574 stat->nextqtd = NULL; 2575 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2576 stat->xfer = xfer; 2577 stat->len = 0; 2578 2579 #ifdef EHCI_DEBUG 2580 if (ehcidebug > 5) { 2581 DPRINTF(("ehci_device_request:\n")); 2582 ehci_dump_sqh(sqh); 2583 ehci_dump_sqtds(setup); 2584 } 2585 #endif 2586 2587 exfer->sqtdstart = setup; 2588 exfer->sqtdend = stat; 2589 #ifdef DIAGNOSTIC 2590 if (!exfer->isdone) { 2591 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2592 } 2593 exfer->isdone = 0; 2594 #endif 2595 2596 /* Insert qTD in QH list. */ 2597 s = splusb(); 2598 ehci_set_qh_qtd(sqh, setup); 2599 if (xfer->timeout && !sc->sc_bus.use_polling) { 2600 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2601 ehci_timeout, xfer); 2602 } 2603 ehci_add_intr_list(sc, exfer); 2604 xfer->status = USBD_IN_PROGRESS; 2605 splx(s); 2606 2607 #ifdef EHCI_DEBUG 2608 if (ehcidebug > 10) { 2609 DPRINTF(("ehci_device_request: status=%x\n", 2610 EOREAD4(sc, EHCI_USBSTS))); 2611 delay(10000); 2612 ehci_dump_regs(sc); 2613 ehci_dump_sqh(sc->sc_async_head); 2614 ehci_dump_sqh(sqh); 2615 ehci_dump_sqtds(setup); 2616 } 2617 #endif 2618 2619 return (USBD_NORMAL_COMPLETION); 2620 2621 bad3: 2622 ehci_free_sqtd(sc, stat); 2623 bad2: 2624 ehci_free_sqtd(sc, setup); 2625 bad1: 2626 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2627 xfer->status = err; 2628 usb_transfer_complete(xfer); 2629 return (err); 2630 #undef exfer 2631 } 2632 2633 /************************/ 2634 2635 Static usbd_status 2636 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2637 { 2638 usbd_status err; 2639 2640 /* Insert last in queue. */ 2641 err = usb_insert_transfer(xfer); 2642 if (err) 2643 return (err); 2644 2645 /* Pipe isn't running, start first */ 2646 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2647 } 2648 2649 usbd_status 2650 ehci_device_bulk_start(usbd_xfer_handle xfer) 2651 { 2652 #define exfer EXFER(xfer) 2653 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2654 usbd_device_handle dev = epipe->pipe.device; 2655 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2656 ehci_soft_qtd_t *data, *dataend; 2657 ehci_soft_qh_t *sqh; 2658 usbd_status err; 2659 int len, isread, endpt; 2660 int s; 2661 2662 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2663 xfer, xfer->length, xfer->flags)); 2664 2665 if (sc->sc_dying) 2666 return (USBD_IOERROR); 2667 2668 #ifdef DIAGNOSTIC 2669 if (xfer->rqflags & URQ_REQUEST) 2670 panic("ehci_device_bulk_transfer: a request"); 2671 #endif 2672 2673 len = xfer->length; 2674 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2675 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2676 sqh = epipe->sqh; 2677 2678 epipe->u.bulk.length = len; 2679 2680 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2681 &dataend); 2682 if (err) { 2683 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2684 xfer->status = err; 2685 usb_transfer_complete(xfer); 2686 return (err); 2687 } 2688 2689 #ifdef EHCI_DEBUG 2690 if (ehcidebug > 5) { 2691 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2692 ehci_dump_sqh(sqh); 2693 ehci_dump_sqtds(data); 2694 } 2695 #endif 2696 2697 /* Set up interrupt info. */ 2698 exfer->sqtdstart = data; 2699 exfer->sqtdend = dataend; 2700 #ifdef DIAGNOSTIC 2701 if (!exfer->isdone) { 2702 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2703 } 2704 exfer->isdone = 0; 2705 #endif 2706 2707 s = splusb(); 2708 ehci_set_qh_qtd(sqh, data); 2709 if (xfer->timeout && !sc->sc_bus.use_polling) { 2710 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2711 ehci_timeout, xfer); 2712 } 2713 ehci_add_intr_list(sc, exfer); 2714 xfer->status = USBD_IN_PROGRESS; 2715 splx(s); 2716 2717 #ifdef EHCI_DEBUG 2718 if (ehcidebug > 10) { 2719 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2720 delay(10000); 2721 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2722 ehci_dump_regs(sc); 2723 #if 0 2724 printf("async_head:\n"); 2725 ehci_dump_sqh(sc->sc_async_head); 2726 #endif 2727 printf("sqh:\n"); 2728 ehci_dump_sqh(sqh); 2729 ehci_dump_sqtds(data); 2730 } 2731 #endif 2732 2733 if (sc->sc_bus.use_polling) 2734 ehci_waitintr(sc, xfer); 2735 2736 return (USBD_IN_PROGRESS); 2737 #undef exfer 2738 } 2739 2740 Static void 2741 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2742 { 2743 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2744 ehci_abort_xfer(xfer, USBD_CANCELLED); 2745 } 2746 2747 /* 2748 * Close a device bulk pipe. 2749 */ 2750 Static void 2751 ehci_device_bulk_close(usbd_pipe_handle pipe) 2752 { 2753 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2754 2755 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2756 ehci_close_pipe(pipe, sc->sc_async_head); 2757 } 2758 2759 void 2760 ehci_device_bulk_done(usbd_xfer_handle xfer) 2761 { 2762 struct ehci_xfer *ex = EXFER(xfer); 2763 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2764 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2765 2766 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2767 xfer, xfer->actlen)); 2768 2769 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2770 ehci_del_intr_list(ex); /* remove from active list */ 2771 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2772 } 2773 2774 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2775 } 2776 2777 /************************/ 2778 2779 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2780 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2781 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2782 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2783 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2784 2785 /************************/ 2786 2787 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2788 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2789 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2790 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2791 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2792
Indexes created Fri Sep 26 20:09:58 GMT 2025