ehci.c revision 1.77
1 /* $NetBSD: ehci.c,v 1.77 2004/10/22 09:58:00 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.77 2004/10/22 09:58:00 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 /* XXX */ 124 /* Bulk pipe */ 125 struct { 126 u_int length; 127 } bulk; 128 /* Iso pipe */ 129 /* XXX */ 130 } u; 131 }; 132 133 Static void ehci_shutdown(void *); 134 Static void ehci_power(int, void *); 135 136 Static usbd_status ehci_open(usbd_pipe_handle); 137 Static void ehci_poll(struct usbd_bus *); 138 Static void ehci_softintr(void *); 139 Static int ehci_intr1(ehci_softc_t *); 140 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 141 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 142 Static void ehci_idone(struct ehci_xfer *); 143 Static void ehci_timeout(void *); 144 Static void ehci_timeout_task(void *); 145 146 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 148 149 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 150 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 154 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 155 Static void ehci_root_ctrl_close(usbd_pipe_handle); 156 Static void ehci_root_ctrl_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 160 Static void ehci_root_intr_abort(usbd_xfer_handle); 161 Static void ehci_root_intr_close(usbd_pipe_handle); 162 Static void ehci_root_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 166 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 167 Static void ehci_device_ctrl_close(usbd_pipe_handle); 168 Static void ehci_device_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 171 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 172 Static void ehci_device_bulk_abort(usbd_xfer_handle); 173 Static void ehci_device_bulk_close(usbd_pipe_handle); 174 Static void ehci_device_bulk_done(usbd_xfer_handle); 175 176 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 177 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 178 Static void ehci_device_intr_abort(usbd_xfer_handle); 179 Static void ehci_device_intr_close(usbd_pipe_handle); 180 Static void ehci_device_intr_done(usbd_xfer_handle); 181 182 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 183 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 184 Static void ehci_device_isoc_abort(usbd_xfer_handle); 185 Static void ehci_device_isoc_close(usbd_pipe_handle); 186 Static void ehci_device_isoc_done(usbd_xfer_handle); 187 188 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 189 Static void ehci_noop(usbd_pipe_handle pipe); 190 191 Static int ehci_str(usb_string_descriptor_t *, int, char *); 192 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 193 Static void ehci_pcd_able(ehci_softc_t *, int); 194 Static void ehci_pcd_enable(void *); 195 Static void ehci_disown(ehci_softc_t *, int, int); 196 197 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 198 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 199 200 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 201 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 202 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 203 ehci_softc_t *, int, int, usbd_xfer_handle, 204 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 205 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 206 ehci_soft_qtd_t *); 207 208 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 209 210 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 211 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 212 ehci_soft_qh_t *); 213 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 214 Static void ehci_sync_hc(ehci_softc_t *); 215 216 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 217 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 218 219 #ifdef EHCI_DEBUG 220 Static void ehci_dump_regs(ehci_softc_t *); 221 Static void ehci_dump(void); 222 Static ehci_softc_t *theehci; 223 Static void ehci_dump_link(ehci_link_t, int); 224 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 225 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 226 Static void ehci_dump_qtd(ehci_qtd_t *); 227 Static void ehci_dump_sqh(ehci_soft_qh_t *); 228 #ifdef DIAGNOSTIC 229 Static void ehci_dump_exfer(struct ehci_xfer *); 230 #endif 231 #endif 232 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 234 235 #define EHCI_INTR_ENDPT 1 236 237 #define ehci_add_intr_list(sc, ex) \ 238 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 239 #define ehci_del_intr_list(ex) \ 240 do { \ 241 LIST_REMOVE((ex), inext); \ 242 (ex)->inext.le_prev = NULL; \ 243 } while (0) 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 245 246 Static struct usbd_bus_methods ehci_bus_methods = { 247 ehci_open, 248 ehci_softintr, 249 ehci_poll, 250 ehci_allocm, 251 ehci_freem, 252 ehci_allocx, 253 ehci_freex, 254 }; 255 256 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 257 ehci_root_ctrl_transfer, 258 ehci_root_ctrl_start, 259 ehci_root_ctrl_abort, 260 ehci_root_ctrl_close, 261 ehci_noop, 262 ehci_root_ctrl_done, 263 }; 264 265 Static struct usbd_pipe_methods ehci_root_intr_methods = { 266 ehci_root_intr_transfer, 267 ehci_root_intr_start, 268 ehci_root_intr_abort, 269 ehci_root_intr_close, 270 ehci_noop, 271 ehci_root_intr_done, 272 }; 273 274 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 275 ehci_device_ctrl_transfer, 276 ehci_device_ctrl_start, 277 ehci_device_ctrl_abort, 278 ehci_device_ctrl_close, 279 ehci_noop, 280 ehci_device_ctrl_done, 281 }; 282 283 Static struct usbd_pipe_methods ehci_device_intr_methods = { 284 ehci_device_intr_transfer, 285 ehci_device_intr_start, 286 ehci_device_intr_abort, 287 ehci_device_intr_close, 288 ehci_device_clear_toggle, 289 ehci_device_intr_done, 290 }; 291 292 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 293 ehci_device_bulk_transfer, 294 ehci_device_bulk_start, 295 ehci_device_bulk_abort, 296 ehci_device_bulk_close, 297 ehci_device_clear_toggle, 298 ehci_device_bulk_done, 299 }; 300 301 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 302 ehci_device_isoc_transfer, 303 ehci_device_isoc_start, 304 ehci_device_isoc_abort, 305 ehci_device_isoc_close, 306 ehci_noop, 307 ehci_device_isoc_done, 308 }; 309 310 usbd_status 311 ehci_init(ehci_softc_t *sc) 312 { 313 u_int32_t version, sparams, cparams, hcr; 314 u_int i; 315 usbd_status err; 316 ehci_soft_qh_t *sqh; 317 318 DPRINTF(("ehci_init: start\n")); 319 #ifdef EHCI_DEBUG 320 theehci = sc; 321 #endif 322 323 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 324 325 version = EREAD2(sc, EHCI_HCIVERSION); 326 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 327 version >> 8, version & 0xff); 328 329 sparams = EREAD4(sc, EHCI_HCSPARAMS); 330 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 331 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 332 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 333 aprint_error("%s: wrong number of companions (%d != %d)\n", 334 USBDEVNAME(sc->sc_bus.bdev), 335 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 336 #if NOHCI == 0 || NUHCI == 0 337 aprint_error("%s: ohci or uhci probably not configured\n", 338 USBDEVNAME(sc->sc_bus.bdev)); 339 #endif 340 return (USBD_IOERROR); 341 } 342 if (sc->sc_ncomp > 0) { 343 aprint_normal("%s: companion controller%s, %d port%s each:", 344 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 345 EHCI_HCS_N_PCC(sparams), 346 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 347 for (i = 0; i < sc->sc_ncomp; i++) 348 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 349 aprint_normal("\n"); 350 } 351 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 352 cparams = EREAD4(sc, EHCI_HCCPARAMS); 353 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 354 355 if (EHCI_HCC_64BIT(cparams)) { 356 /* MUST clear segment register if 64 bit capable. */ 357 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 358 } 359 360 sc->sc_bus.usbrev = USBREV_2_0; 361 362 /* Reset the controller */ 363 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 364 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 365 usb_delay_ms(&sc->sc_bus, 1); 366 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 367 for (i = 0; i < 100; i++) { 368 usb_delay_ms(&sc->sc_bus, 1); 369 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 370 if (!hcr) 371 break; 372 } 373 if (hcr) { 374 aprint_error("%s: reset timeout\n", 375 USBDEVNAME(sc->sc_bus.bdev)); 376 return (USBD_IOERROR); 377 } 378 379 /* frame list size at default, read back what we got and use that */ 380 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 381 case 0: sc->sc_flsize = 1024*4; break; 382 case 1: sc->sc_flsize = 512*4; break; 383 case 2: sc->sc_flsize = 256*4; break; 384 case 3: return (USBD_IOERROR); 385 } 386 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 387 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 388 if (err) 389 return (err); 390 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 391 392 /* Set up the bus struct. */ 393 sc->sc_bus.methods = &ehci_bus_methods; 394 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 395 396 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 397 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 398 399 sc->sc_eintrs = EHCI_NORMAL_INTRS; 400 401 /* Allocate dummy QH that starts the async list. */ 402 sqh = ehci_alloc_sqh(sc); 403 if (sqh == NULL) { 404 err = USBD_NOMEM; 405 goto bad1; 406 } 407 /* Fill the QH */ 408 sqh->qh.qh_endp = 409 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 410 sqh->qh.qh_link = 411 htole32(sqh->physaddr | EHCI_LINK_QH); 412 sqh->qh.qh_curqtd = EHCI_NULL; 413 sqh->next = NULL; 414 /* Fill the overlay qTD */ 415 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 416 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 417 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 418 sqh->sqtd = NULL; 419 #ifdef EHCI_DEBUG 420 if (ehcidebug) { 421 ehci_dump_sqh(sqh); 422 } 423 #endif 424 425 /* Point to async list */ 426 sc->sc_async_head = sqh; 427 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 428 429 usb_callout_init(sc->sc_tmo_pcd); 430 431 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 432 433 /* Enable interrupts */ 434 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 435 436 /* Turn on controller */ 437 EOWRITE4(sc, EHCI_USBCMD, 438 EHCI_CMD_ITC_8 | /* 8 microframes */ 439 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 440 EHCI_CMD_ASE | 441 /* EHCI_CMD_PSE | */ 442 EHCI_CMD_RS); 443 444 /* Take over port ownership */ 445 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 446 447 for (i = 0; i < 100; i++) { 448 usb_delay_ms(&sc->sc_bus, 1); 449 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 450 if (!hcr) 451 break; 452 } 453 if (hcr) { 454 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 455 return (USBD_IOERROR); 456 } 457 458 return (USBD_NORMAL_COMPLETION); 459 460 #if 0 461 bad2: 462 ehci_free_sqh(sc, sc->sc_async_head); 463 #endif 464 bad1: 465 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 466 return (err); 467 } 468 469 int 470 ehci_intr(void *v) 471 { 472 ehci_softc_t *sc = v; 473 474 if (sc == NULL || sc->sc_dying) 475 return (0); 476 477 /* If we get an interrupt while polling, then just ignore it. */ 478 if (sc->sc_bus.use_polling) { 479 #ifdef DIAGNOSTIC 480 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 481 #endif 482 return (0); 483 } 484 485 return (ehci_intr1(sc)); 486 } 487 488 Static int 489 ehci_intr1(ehci_softc_t *sc) 490 { 491 u_int32_t intrs, eintrs; 492 493 DPRINTFN(20,("ehci_intr1: enter\n")); 494 495 /* In case the interrupt occurs before initialization has completed. */ 496 if (sc == NULL) { 497 #ifdef DIAGNOSTIC 498 printf("ehci_intr1: sc == NULL\n"); 499 #endif 500 return (0); 501 } 502 503 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 504 if (!intrs) 505 return (0); 506 507 eintrs = intrs & sc->sc_eintrs; 508 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 509 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 510 (u_int)eintrs)); 511 if (!eintrs) 512 return (0); 513 514 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 515 sc->sc_bus.intr_context++; 516 sc->sc_bus.no_intrs++; 517 if (eintrs & EHCI_STS_IAA) { 518 DPRINTF(("ehci_intr1: door bell\n")); 519 wakeup(&sc->sc_async_head); 520 eintrs &= ~EHCI_STS_IAA; 521 } 522 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 523 DPRINTFN(5,("ehci_intr1: %s %s\n", 524 eintrs & EHCI_STS_INT ? "INT" : "", 525 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 526 usb_schedsoftintr(&sc->sc_bus); 527 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 528 } 529 if (eintrs & EHCI_STS_HSE) { 530 printf("%s: unrecoverable error, controller halted\n", 531 USBDEVNAME(sc->sc_bus.bdev)); 532 /* XXX what else */ 533 } 534 if (eintrs & EHCI_STS_PCD) { 535 ehci_pcd(sc, sc->sc_intrxfer); 536 /* 537 * Disable PCD interrupt for now, because it will be 538 * on until the port has been reset. 539 */ 540 ehci_pcd_able(sc, 0); 541 /* Do not allow RHSC interrupts > 1 per second */ 542 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 543 eintrs &= ~EHCI_STS_PCD; 544 } 545 546 sc->sc_bus.intr_context--; 547 548 if (eintrs != 0) { 549 /* Block unprocessed interrupts. */ 550 sc->sc_eintrs &= ~eintrs; 551 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 552 printf("%s: blocking intrs 0x%x\n", 553 USBDEVNAME(sc->sc_bus.bdev), eintrs); 554 } 555 556 return (1); 557 } 558 559 void 560 ehci_pcd_able(ehci_softc_t *sc, int on) 561 { 562 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 563 if (on) 564 sc->sc_eintrs |= EHCI_STS_PCD; 565 else 566 sc->sc_eintrs &= ~EHCI_STS_PCD; 567 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 568 } 569 570 void 571 ehci_pcd_enable(void *v_sc) 572 { 573 ehci_softc_t *sc = v_sc; 574 575 ehci_pcd_able(sc, 1); 576 } 577 578 void 579 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 580 { 581 usbd_pipe_handle pipe; 582 u_char *p; 583 int i, m; 584 585 if (xfer == NULL) { 586 /* Just ignore the change. */ 587 return; 588 } 589 590 pipe = xfer->pipe; 591 592 p = KERNADDR(&xfer->dmabuf, 0); 593 m = min(sc->sc_noport, xfer->length * 8 - 1); 594 memset(p, 0, xfer->length); 595 for (i = 1; i <= m; i++) { 596 /* Pick out CHANGE bits from the status reg. */ 597 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 598 p[i/8] |= 1 << (i%8); 599 } 600 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 601 xfer->actlen = xfer->length; 602 xfer->status = USBD_NORMAL_COMPLETION; 603 604 usb_transfer_complete(xfer); 605 } 606 607 void 608 ehci_softintr(void *v) 609 { 610 ehci_softc_t *sc = v; 611 struct ehci_xfer *ex, *nextex; 612 613 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 614 sc->sc_bus.intr_context)); 615 616 sc->sc_bus.intr_context++; 617 618 /* 619 * The only explanation I can think of for why EHCI is as brain dead 620 * as UHCI interrupt-wise is that Intel was involved in both. 621 * An interrupt just tells us that something is done, we have no 622 * clue what, so we need to scan through all active transfers. :-( 623 */ 624 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 625 nextex = LIST_NEXT(ex, inext); 626 ehci_check_intr(sc, ex); 627 } 628 629 #ifdef USB_USE_SOFTINTR 630 if (sc->sc_softwake) { 631 sc->sc_softwake = 0; 632 wakeup(&sc->sc_softwake); 633 } 634 #endif /* USB_USE_SOFTINTR */ 635 636 sc->sc_bus.intr_context--; 637 } 638 639 /* Check for an interrupt. */ 640 void 641 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 642 { 643 ehci_soft_qtd_t *sqtd, *lsqtd; 644 u_int32_t status; 645 646 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 647 648 if (ex->sqtdstart == NULL) { 649 printf("ehci_check_intr: sqtdstart=NULL\n"); 650 return; 651 } 652 lsqtd = ex->sqtdend; 653 #ifdef DIAGNOSTIC 654 if (lsqtd == NULL) { 655 printf("ehci_check_intr: sqtd==0\n"); 656 return; 657 } 658 #endif 659 /* 660 * If the last TD is still active we need to check whether there 661 * is a an error somewhere in the middle, or whether there was a 662 * short packet (SPD and not ACTIVE). 663 */ 664 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 665 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 666 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 667 status = le32toh(sqtd->qtd.qtd_status); 668 /* If there's an active QTD the xfer isn't done. */ 669 if (status & EHCI_QTD_ACTIVE) 670 break; 671 /* Any kind of error makes the xfer done. */ 672 if (status & EHCI_QTD_HALTED) 673 goto done; 674 /* We want short packets, and it is short: it's done */ 675 if (EHCI_QTD_GET_BYTES(status) != 0) 676 goto done; 677 } 678 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 679 ex, ex->sqtdstart)); 680 return; 681 } 682 done: 683 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 684 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 685 ehci_idone(ex); 686 } 687 688 void 689 ehci_idone(struct ehci_xfer *ex) 690 { 691 usbd_xfer_handle xfer = &ex->xfer; 692 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 693 ehci_soft_qtd_t *sqtd; 694 u_int32_t status = 0, nstatus; 695 int actlen; 696 697 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 698 #ifdef DIAGNOSTIC 699 { 700 int s = splhigh(); 701 if (ex->isdone) { 702 splx(s); 703 #ifdef EHCI_DEBUG 704 printf("ehci_idone: ex is done!\n "); 705 ehci_dump_exfer(ex); 706 #else 707 printf("ehci_idone: ex=%p is done!\n", ex); 708 #endif 709 return; 710 } 711 ex->isdone = 1; 712 splx(s); 713 } 714 #endif 715 716 if (xfer->status == USBD_CANCELLED || 717 xfer->status == USBD_TIMEOUT) { 718 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 719 return; 720 } 721 722 #ifdef EHCI_DEBUG 723 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 724 if (ehcidebug > 10) 725 ehci_dump_sqtds(ex->sqtdstart); 726 #endif 727 728 /* The transfer is done, compute actual length and status. */ 729 actlen = 0; 730 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 731 nstatus = le32toh(sqtd->qtd.qtd_status); 732 if (nstatus & EHCI_QTD_ACTIVE) 733 break; 734 735 status = nstatus; 736 /* halt is ok if descriptor is last, and complete */ 737 if (sqtd->qtd.qtd_next == EHCI_NULL && 738 EHCI_QTD_GET_BYTES(status) == 0) 739 status &= ~EHCI_QTD_HALTED; 740 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 741 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 742 } 743 744 /* If there are left over TDs we need to update the toggle. */ 745 if (sqtd != NULL) { 746 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 747 #if 0 748 ehci_dump_sqh(epipe->sqh); 749 ehci_dump_sqtds(ex->sqtdstart); 750 #endif 751 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 752 } 753 754 status &= EHCI_QTD_STATERRS; 755 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 756 xfer->length, actlen, status)); 757 xfer->actlen = actlen; 758 if (status != 0) { 759 #ifdef EHCI_DEBUG 760 char sbuf[128]; 761 762 bitmask_snprintf((u_int32_t)status, 763 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 764 "\3MISSED", sbuf, sizeof(sbuf)); 765 766 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 767 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 768 "status 0x%s\n", 769 xfer->pipe->device->address, 770 xfer->pipe->endpoint->edesc->bEndpointAddress, 771 sbuf)); 772 if (ehcidebug > 2) { 773 ehci_dump_sqh(epipe->sqh); 774 ehci_dump_sqtds(ex->sqtdstart); 775 } 776 #endif 777 if (status == EHCI_QTD_HALTED) 778 xfer->status = USBD_STALLED; 779 else 780 xfer->status = USBD_IOERROR; /* more info XXX */ 781 } else { 782 xfer->status = USBD_NORMAL_COMPLETION; 783 } 784 785 usb_transfer_complete(xfer); 786 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 787 } 788 789 /* 790 * Wait here until controller claims to have an interrupt. 791 * Then call ehci_intr and return. Use timeout to avoid waiting 792 * too long. 793 */ 794 void 795 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 796 { 797 int timo = xfer->timeout; 798 int usecs; 799 u_int32_t intrs; 800 801 xfer->status = USBD_IN_PROGRESS; 802 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 803 usb_delay_ms(&sc->sc_bus, 1); 804 if (sc->sc_dying) 805 break; 806 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 807 sc->sc_eintrs; 808 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 809 #ifdef EHCI_DEBUG 810 if (ehcidebug > 15) 811 ehci_dump_regs(sc); 812 #endif 813 if (intrs) { 814 ehci_intr1(sc); 815 if (xfer->status != USBD_IN_PROGRESS) 816 return; 817 } 818 } 819 820 /* Timeout */ 821 DPRINTF(("ehci_waitintr: timeout\n")); 822 xfer->status = USBD_TIMEOUT; 823 usb_transfer_complete(xfer); 824 /* XXX should free TD */ 825 } 826 827 void 828 ehci_poll(struct usbd_bus *bus) 829 { 830 ehci_softc_t *sc = (ehci_softc_t *)bus; 831 #ifdef EHCI_DEBUG 832 static int last; 833 int new; 834 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 835 if (new != last) { 836 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 837 last = new; 838 } 839 #endif 840 841 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 842 ehci_intr1(sc); 843 } 844 845 int 846 ehci_detach(struct ehci_softc *sc, int flags) 847 { 848 int rv = 0; 849 850 if (sc->sc_child != NULL) 851 rv = config_detach(sc->sc_child, flags); 852 853 if (rv != 0) 854 return (rv); 855 856 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 857 858 if (sc->sc_powerhook != NULL) 859 powerhook_disestablish(sc->sc_powerhook); 860 if (sc->sc_shutdownhook != NULL) 861 shutdownhook_disestablish(sc->sc_shutdownhook); 862 863 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 864 865 /* XXX free other data structures XXX */ 866 867 return (rv); 868 } 869 870 871 int 872 ehci_activate(device_ptr_t self, enum devact act) 873 { 874 struct ehci_softc *sc = (struct ehci_softc *)self; 875 int rv = 0; 876 877 switch (act) { 878 case DVACT_ACTIVATE: 879 return (EOPNOTSUPP); 880 881 case DVACT_DEACTIVATE: 882 if (sc->sc_child != NULL) 883 rv = config_deactivate(sc->sc_child); 884 sc->sc_dying = 1; 885 break; 886 } 887 return (rv); 888 } 889 890 /* 891 * Handle suspend/resume. 892 * 893 * We need to switch to polling mode here, because this routine is 894 * called from an interrupt context. This is all right since we 895 * are almost suspended anyway. 896 */ 897 void 898 ehci_power(int why, void *v) 899 { 900 ehci_softc_t *sc = v; 901 u_int32_t cmd, hcr; 902 int s, i; 903 904 #ifdef EHCI_DEBUG 905 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 906 if (ehcidebug > 0) 907 ehci_dump_regs(sc); 908 #endif 909 910 s = splhardusb(); 911 switch (why) { 912 case PWR_SUSPEND: 913 case PWR_STANDBY: 914 sc->sc_bus.use_polling++; 915 916 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 917 918 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 919 EOWRITE4(sc, EHCI_USBCMD, cmd); 920 921 for (i = 0; i < 100; i++) { 922 hcr = EOREAD4(sc, EHCI_USBSTS) & 923 (EHCI_STS_ASS | EHCI_STS_PSS); 924 if (hcr == 0) 925 break; 926 927 usb_delay_ms(&sc->sc_bus, 1); 928 } 929 if (hcr != 0) { 930 printf("%s: reset timeout\n", 931 USBDEVNAME(sc->sc_bus.bdev)); 932 } 933 934 cmd &= ~EHCI_CMD_RS; 935 EOWRITE4(sc, EHCI_USBCMD, cmd); 936 937 for (i = 0; i < 100; i++) { 938 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 939 if (hcr == EHCI_STS_HCH) 940 break; 941 942 usb_delay_ms(&sc->sc_bus, 1); 943 } 944 if (hcr != EHCI_STS_HCH) { 945 printf("%s: config timeout\n", 946 USBDEVNAME(sc->sc_bus.bdev)); 947 } 948 949 sc->sc_bus.use_polling--; 950 break; 951 952 case PWR_RESUME: 953 sc->sc_bus.use_polling++; 954 955 /* restore things in case the bios sucks */ 956 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 957 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 958 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 959 sc->sc_async_head->physaddr | EHCI_LINK_QH); 960 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 961 962 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 963 964 for (i = 0; i < 100; i++) { 965 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 966 if (hcr != EHCI_STS_HCH) 967 break; 968 969 usb_delay_ms(&sc->sc_bus, 1); 970 } 971 if (hcr == EHCI_STS_HCH) { 972 printf("%s: config timeout\n", 973 USBDEVNAME(sc->sc_bus.bdev)); 974 } 975 976 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 977 978 sc->sc_bus.use_polling--; 979 break; 980 case PWR_SOFTSUSPEND: 981 case PWR_SOFTSTANDBY: 982 case PWR_SOFTRESUME: 983 break; 984 } 985 splx(s); 986 987 #ifdef EHCI_DEBUG 988 DPRINTF(("ehci_power: sc=%p\n", sc)); 989 if (ehcidebug > 0) 990 ehci_dump_regs(sc); 991 #endif 992 } 993 994 /* 995 * Shut down the controller when the system is going down. 996 */ 997 void 998 ehci_shutdown(void *v) 999 { 1000 ehci_softc_t *sc = v; 1001 1002 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1003 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1004 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1005 } 1006 1007 usbd_status 1008 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1009 { 1010 struct ehci_softc *sc = (struct ehci_softc *)bus; 1011 usbd_status err; 1012 1013 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1014 #ifdef EHCI_DEBUG 1015 if (err) 1016 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1017 #endif 1018 return (err); 1019 } 1020 1021 void 1022 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1023 { 1024 struct ehci_softc *sc = (struct ehci_softc *)bus; 1025 1026 usb_freemem(&sc->sc_bus, dma); 1027 } 1028 1029 usbd_xfer_handle 1030 ehci_allocx(struct usbd_bus *bus) 1031 { 1032 struct ehci_softc *sc = (struct ehci_softc *)bus; 1033 usbd_xfer_handle xfer; 1034 1035 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1036 if (xfer != NULL) { 1037 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1038 #ifdef DIAGNOSTIC 1039 if (xfer->busy_free != XFER_FREE) { 1040 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1041 xfer->busy_free); 1042 } 1043 #endif 1044 } else { 1045 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1046 } 1047 if (xfer != NULL) { 1048 memset(xfer, 0, sizeof(struct ehci_xfer)); 1049 #ifdef DIAGNOSTIC 1050 EXFER(xfer)->isdone = 1; 1051 xfer->busy_free = XFER_BUSY; 1052 #endif 1053 } 1054 return (xfer); 1055 } 1056 1057 void 1058 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1059 { 1060 struct ehci_softc *sc = (struct ehci_softc *)bus; 1061 1062 #ifdef DIAGNOSTIC 1063 if (xfer->busy_free != XFER_BUSY) { 1064 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1065 xfer->busy_free); 1066 return; 1067 } 1068 xfer->busy_free = XFER_FREE; 1069 if (!EXFER(xfer)->isdone) { 1070 printf("ehci_freex: !isdone\n"); 1071 return; 1072 } 1073 #endif 1074 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1075 } 1076 1077 Static void 1078 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1079 { 1080 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1081 1082 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1083 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1084 #ifdef USB_DEBUG 1085 if (ehcidebug) 1086 usbd_dump_pipe(pipe); 1087 #endif 1088 epipe->nexttoggle = 0; 1089 } 1090 1091 Static void 1092 ehci_noop(usbd_pipe_handle pipe) 1093 { 1094 } 1095 1096 #ifdef EHCI_DEBUG 1097 void 1098 ehci_dump_regs(ehci_softc_t *sc) 1099 { 1100 int i; 1101 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1102 EOREAD4(sc, EHCI_USBCMD), 1103 EOREAD4(sc, EHCI_USBSTS), 1104 EOREAD4(sc, EHCI_USBINTR)); 1105 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1106 EOREAD4(sc, EHCI_FRINDEX), 1107 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1108 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1109 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1110 for (i = 1; i <= sc->sc_noport; i++) 1111 printf("port %d status=0x%08x\n", i, 1112 EOREAD4(sc, EHCI_PORTSC(i))); 1113 } 1114 1115 /* 1116 * Unused function - this is meant to be called from a kernel 1117 * debugger. 1118 */ 1119 void 1120 ehci_dump() 1121 { 1122 ehci_dump_regs(theehci); 1123 } 1124 1125 void 1126 ehci_dump_link(ehci_link_t link, int type) 1127 { 1128 link = le32toh(link); 1129 printf("0x%08x", link); 1130 if (link & EHCI_LINK_TERMINATE) 1131 printf("<T>"); 1132 else { 1133 printf("<"); 1134 if (type) { 1135 switch (EHCI_LINK_TYPE(link)) { 1136 case EHCI_LINK_ITD: printf("ITD"); break; 1137 case EHCI_LINK_QH: printf("QH"); break; 1138 case EHCI_LINK_SITD: printf("SITD"); break; 1139 case EHCI_LINK_FSTN: printf("FSTN"); break; 1140 } 1141 } 1142 printf(">"); 1143 } 1144 } 1145 1146 void 1147 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1148 { 1149 int i; 1150 u_int32_t stop; 1151 1152 stop = 0; 1153 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1154 ehci_dump_sqtd(sqtd); 1155 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1156 } 1157 if (sqtd) 1158 printf("dump aborted, too many TDs\n"); 1159 } 1160 1161 void 1162 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1163 { 1164 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1165 ehci_dump_qtd(&sqtd->qtd); 1166 } 1167 1168 void 1169 ehci_dump_qtd(ehci_qtd_t *qtd) 1170 { 1171 u_int32_t s; 1172 char sbuf[128]; 1173 1174 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1175 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1176 printf("\n"); 1177 s = le32toh(qtd->qtd_status); 1178 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1179 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1180 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1181 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1182 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1183 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1184 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1185 EHCI_QTD_GET_PID(s), sbuf); 1186 for (s = 0; s < 5; s++) 1187 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1188 } 1189 1190 void 1191 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1192 { 1193 ehci_qh_t *qh = &sqh->qh; 1194 u_int32_t endp, endphub; 1195 1196 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1197 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1198 endp = le32toh(qh->qh_endp); 1199 printf(" endp=0x%08x\n", endp); 1200 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1201 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1202 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1203 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1204 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1205 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1206 EHCI_QH_GET_NRL(endp)); 1207 endphub = le32toh(qh->qh_endphub); 1208 printf(" endphub=0x%08x\n", endphub); 1209 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1210 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1211 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1212 EHCI_QH_GET_MULT(endphub)); 1213 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1214 printf("Overlay qTD:\n"); 1215 ehci_dump_qtd(&qh->qh_qtd); 1216 } 1217 1218 #ifdef DIAGNOSTIC 1219 Static void 1220 ehci_dump_exfer(struct ehci_xfer *ex) 1221 { 1222 printf("ehci_dump_exfer: ex=%p\n", ex); 1223 } 1224 #endif 1225 #endif 1226 1227 usbd_status 1228 ehci_open(usbd_pipe_handle pipe) 1229 { 1230 usbd_device_handle dev = pipe->device; 1231 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1232 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1233 u_int8_t addr = dev->address; 1234 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1235 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1236 ehci_soft_qh_t *sqh; 1237 usbd_status err; 1238 int s; 1239 int speed, naks; 1240 1241 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1242 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1243 1244 if (sc->sc_dying) 1245 return (USBD_IOERROR); 1246 1247 epipe->nexttoggle = 0; 1248 1249 if (addr == sc->sc_addr) { 1250 switch (ed->bEndpointAddress) { 1251 case USB_CONTROL_ENDPOINT: 1252 pipe->methods = &ehci_root_ctrl_methods; 1253 break; 1254 case UE_DIR_IN | EHCI_INTR_ENDPT: 1255 pipe->methods = &ehci_root_intr_methods; 1256 break; 1257 default: 1258 return (USBD_INVAL); 1259 } 1260 return (USBD_NORMAL_COMPLETION); 1261 } 1262 1263 /* XXX All this stuff is only valid for async. */ 1264 switch (dev->speed) { 1265 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1266 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1267 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1268 default: panic("ehci_open: bad device speed %d", dev->speed); 1269 } 1270 naks = 8; /* XXX */ 1271 sqh = ehci_alloc_sqh(sc); 1272 if (sqh == NULL) 1273 goto bad0; 1274 /* qh_link filled when the QH is added */ 1275 sqh->qh.qh_endp = htole32( 1276 EHCI_QH_SET_ADDR(addr) | 1277 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1278 EHCI_QH_SET_EPS(speed) | 1279 EHCI_QH_DTC | 1280 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1281 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1282 EHCI_QH_CTL : 0) | 1283 EHCI_QH_SET_NRL(naks) 1284 ); 1285 sqh->qh.qh_endphub = htole32( 1286 EHCI_QH_SET_MULT(1) 1287 /* XXX TT stuff */ 1288 /* XXX interrupt mask */ 1289 ); 1290 sqh->qh.qh_curqtd = EHCI_NULL; 1291 /* Fill the overlay qTD */ 1292 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1293 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1294 sqh->qh.qh_qtd.qtd_status = htole32(0); 1295 1296 epipe->sqh = sqh; 1297 1298 switch (xfertype) { 1299 case UE_CONTROL: 1300 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1301 0, &epipe->u.ctl.reqdma); 1302 #ifdef EHCI_DEBUG 1303 if (err) 1304 printf("ehci_open: usb_allocmem()=%d\n", err); 1305 #endif 1306 if (err) 1307 goto bad1; 1308 pipe->methods = &ehci_device_ctrl_methods; 1309 s = splusb(); 1310 ehci_add_qh(sqh, sc->sc_async_head); 1311 splx(s); 1312 break; 1313 case UE_BULK: 1314 pipe->methods = &ehci_device_bulk_methods; 1315 s = splusb(); 1316 ehci_add_qh(sqh, sc->sc_async_head); 1317 splx(s); 1318 break; 1319 case UE_INTERRUPT: 1320 pipe->methods = &ehci_device_intr_methods; 1321 return (USBD_INVAL); 1322 case UE_ISOCHRONOUS: 1323 pipe->methods = &ehci_device_isoc_methods; 1324 return (USBD_INVAL); 1325 default: 1326 return (USBD_INVAL); 1327 } 1328 return (USBD_NORMAL_COMPLETION); 1329 1330 bad1: 1331 ehci_free_sqh(sc, sqh); 1332 bad0: 1333 return (USBD_NOMEM); 1334 } 1335 1336 /* 1337 * Add an ED to the schedule. Called at splusb(). 1338 */ 1339 void 1340 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1341 { 1342 SPLUSBCHECK; 1343 1344 sqh->next = head->next; 1345 sqh->qh.qh_link = head->qh.qh_link; 1346 head->next = sqh; 1347 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1348 1349 #ifdef EHCI_DEBUG 1350 if (ehcidebug > 5) { 1351 printf("ehci_add_qh:\n"); 1352 ehci_dump_sqh(sqh); 1353 } 1354 #endif 1355 } 1356 1357 /* 1358 * Remove an ED from the schedule. Called at splusb(). 1359 */ 1360 void 1361 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1362 { 1363 ehci_soft_qh_t *p; 1364 1365 SPLUSBCHECK; 1366 /* XXX */ 1367 for (p = head; p != NULL && p->next != sqh; p = p->next) 1368 ; 1369 if (p == NULL) 1370 panic("ehci_rem_qh: ED not found"); 1371 p->next = sqh->next; 1372 p->qh.qh_link = sqh->qh.qh_link; 1373 1374 ehci_sync_hc(sc); 1375 } 1376 1377 void 1378 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1379 { 1380 /* Halt while we are messing. */ 1381 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1382 sqh->qh.qh_curqtd = 0; 1383 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1384 sqh->sqtd = sqtd; 1385 /* Clear halt */ 1386 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1387 } 1388 1389 /* 1390 * Ensure that the HC has released all references to the QH. We do this 1391 * by asking for a Async Advance Doorbell interrupt and then we wait for 1392 * the interrupt. 1393 * To make this easier we first obtain exclusive use of the doorbell. 1394 */ 1395 void 1396 ehci_sync_hc(ehci_softc_t *sc) 1397 { 1398 int s, error; 1399 1400 if (sc->sc_dying) { 1401 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1402 return; 1403 } 1404 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1405 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1406 s = splhardusb(); 1407 /* ask for doorbell */ 1408 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1409 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1410 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1411 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1412 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1413 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1414 splx(s); 1415 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1416 #ifdef DIAGNOSTIC 1417 if (error) 1418 printf("ehci_sync_hc: tsleep() = %d\n", error); 1419 #endif 1420 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1421 } 1422 1423 /***********/ 1424 1425 /* 1426 * Data structures and routines to emulate the root hub. 1427 */ 1428 Static usb_device_descriptor_t ehci_devd = { 1429 USB_DEVICE_DESCRIPTOR_SIZE, 1430 UDESC_DEVICE, /* type */ 1431 {0x00, 0x02}, /* USB version */ 1432 UDCLASS_HUB, /* class */ 1433 UDSUBCLASS_HUB, /* subclass */ 1434 UDPROTO_HSHUBSTT, /* protocol */ 1435 64, /* max packet */ 1436 {0},{0},{0x00,0x01}, /* device id */ 1437 1,2,0, /* string indicies */ 1438 1 /* # of configurations */ 1439 }; 1440 1441 Static usb_device_qualifier_t ehci_odevd = { 1442 USB_DEVICE_DESCRIPTOR_SIZE, 1443 UDESC_DEVICE_QUALIFIER, /* type */ 1444 {0x00, 0x02}, /* USB version */ 1445 UDCLASS_HUB, /* class */ 1446 UDSUBCLASS_HUB, /* subclass */ 1447 UDPROTO_FSHUB, /* protocol */ 1448 64, /* max packet */ 1449 1, /* # of configurations */ 1450 0 1451 }; 1452 1453 Static usb_config_descriptor_t ehci_confd = { 1454 USB_CONFIG_DESCRIPTOR_SIZE, 1455 UDESC_CONFIG, 1456 {USB_CONFIG_DESCRIPTOR_SIZE + 1457 USB_INTERFACE_DESCRIPTOR_SIZE + 1458 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1459 1, 1460 1, 1461 0, 1462 UC_SELF_POWERED, 1463 0 /* max power */ 1464 }; 1465 1466 Static usb_interface_descriptor_t ehci_ifcd = { 1467 USB_INTERFACE_DESCRIPTOR_SIZE, 1468 UDESC_INTERFACE, 1469 0, 1470 0, 1471 1, 1472 UICLASS_HUB, 1473 UISUBCLASS_HUB, 1474 UIPROTO_HSHUBSTT, 1475 0 1476 }; 1477 1478 Static usb_endpoint_descriptor_t ehci_endpd = { 1479 USB_ENDPOINT_DESCRIPTOR_SIZE, 1480 UDESC_ENDPOINT, 1481 UE_DIR_IN | EHCI_INTR_ENDPT, 1482 UE_INTERRUPT, 1483 {8, 0}, /* max packet */ 1484 255 1485 }; 1486 1487 Static usb_hub_descriptor_t ehci_hubd = { 1488 USB_HUB_DESCRIPTOR_SIZE, 1489 UDESC_HUB, 1490 0, 1491 {0,0}, 1492 0, 1493 0, 1494 {0}, 1495 }; 1496 1497 Static int 1498 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1499 { 1500 int i; 1501 1502 if (l == 0) 1503 return (0); 1504 p->bLength = 2 * strlen(s) + 2; 1505 if (l == 1) 1506 return (1); 1507 p->bDescriptorType = UDESC_STRING; 1508 l -= 2; 1509 for (i = 0; s[i] && l > 1; i++, l -= 2) 1510 USETW2(p->bString[i], 0, s[i]); 1511 return (2*i+2); 1512 } 1513 1514 /* 1515 * Simulate a hardware hub by handling all the necessary requests. 1516 */ 1517 Static usbd_status 1518 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1519 { 1520 usbd_status err; 1521 1522 /* Insert last in queue. */ 1523 err = usb_insert_transfer(xfer); 1524 if (err) 1525 return (err); 1526 1527 /* Pipe isn't running, start first */ 1528 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1529 } 1530 1531 Static usbd_status 1532 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1533 { 1534 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1535 usb_device_request_t *req; 1536 void *buf = NULL; 1537 int port, i; 1538 int s, len, value, index, l, totlen = 0; 1539 usb_port_status_t ps; 1540 usb_hub_descriptor_t hubd; 1541 usbd_status err; 1542 u_int32_t v; 1543 1544 if (sc->sc_dying) 1545 return (USBD_IOERROR); 1546 1547 #ifdef DIAGNOSTIC 1548 if (!(xfer->rqflags & URQ_REQUEST)) 1549 /* XXX panic */ 1550 return (USBD_INVAL); 1551 #endif 1552 req = &xfer->request; 1553 1554 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1555 req->bmRequestType, req->bRequest)); 1556 1557 len = UGETW(req->wLength); 1558 value = UGETW(req->wValue); 1559 index = UGETW(req->wIndex); 1560 1561 if (len != 0) 1562 buf = KERNADDR(&xfer->dmabuf, 0); 1563 1564 #define C(x,y) ((x) | ((y) << 8)) 1565 switch(C(req->bRequest, req->bmRequestType)) { 1566 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1567 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1568 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1569 /* 1570 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1571 * for the integrated root hub. 1572 */ 1573 break; 1574 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1575 if (len > 0) { 1576 *(u_int8_t *)buf = sc->sc_conf; 1577 totlen = 1; 1578 } 1579 break; 1580 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1581 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1582 switch(value >> 8) { 1583 case UDESC_DEVICE: 1584 if ((value & 0xff) != 0) { 1585 err = USBD_IOERROR; 1586 goto ret; 1587 } 1588 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1589 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1590 memcpy(buf, &ehci_devd, l); 1591 break; 1592 /* 1593 * We can't really operate at another speed, but the spec says 1594 * we need this descriptor. 1595 */ 1596 case UDESC_DEVICE_QUALIFIER: 1597 if ((value & 0xff) != 0) { 1598 err = USBD_IOERROR; 1599 goto ret; 1600 } 1601 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1602 memcpy(buf, &ehci_odevd, l); 1603 break; 1604 /* 1605 * We can't really operate at another speed, but the spec says 1606 * we need this descriptor. 1607 */ 1608 case UDESC_OTHER_SPEED_CONFIGURATION: 1609 case UDESC_CONFIG: 1610 if ((value & 0xff) != 0) { 1611 err = USBD_IOERROR; 1612 goto ret; 1613 } 1614 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1615 memcpy(buf, &ehci_confd, l); 1616 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1617 value >> 8; 1618 buf = (char *)buf + l; 1619 len -= l; 1620 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1621 totlen += l; 1622 memcpy(buf, &ehci_ifcd, l); 1623 buf = (char *)buf + l; 1624 len -= l; 1625 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1626 totlen += l; 1627 memcpy(buf, &ehci_endpd, l); 1628 break; 1629 case UDESC_STRING: 1630 if (len == 0) 1631 break; 1632 *(u_int8_t *)buf = 0; 1633 totlen = 1; 1634 switch (value & 0xff) { 1635 case 1: /* Vendor */ 1636 totlen = ehci_str(buf, len, sc->sc_vendor); 1637 break; 1638 case 2: /* Product */ 1639 totlen = ehci_str(buf, len, "EHCI root hub"); 1640 break; 1641 } 1642 break; 1643 default: 1644 err = USBD_IOERROR; 1645 goto ret; 1646 } 1647 break; 1648 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1649 if (len > 0) { 1650 *(u_int8_t *)buf = 0; 1651 totlen = 1; 1652 } 1653 break; 1654 case C(UR_GET_STATUS, UT_READ_DEVICE): 1655 if (len > 1) { 1656 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1657 totlen = 2; 1658 } 1659 break; 1660 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1661 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1662 if (len > 1) { 1663 USETW(((usb_status_t *)buf)->wStatus, 0); 1664 totlen = 2; 1665 } 1666 break; 1667 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1668 if (value >= USB_MAX_DEVICES) { 1669 err = USBD_IOERROR; 1670 goto ret; 1671 } 1672 sc->sc_addr = value; 1673 break; 1674 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1675 if (value != 0 && value != 1) { 1676 err = USBD_IOERROR; 1677 goto ret; 1678 } 1679 sc->sc_conf = value; 1680 break; 1681 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1682 break; 1683 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1684 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1685 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1686 err = USBD_IOERROR; 1687 goto ret; 1688 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1689 break; 1690 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1691 break; 1692 /* Hub requests */ 1693 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1694 break; 1695 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1696 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1697 "port=%d feature=%d\n", 1698 index, value)); 1699 if (index < 1 || index > sc->sc_noport) { 1700 err = USBD_IOERROR; 1701 goto ret; 1702 } 1703 port = EHCI_PORTSC(index); 1704 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1705 switch(value) { 1706 case UHF_PORT_ENABLE: 1707 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1708 break; 1709 case UHF_PORT_SUSPEND: 1710 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1711 break; 1712 case UHF_PORT_POWER: 1713 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1714 break; 1715 case UHF_PORT_TEST: 1716 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1717 "%d\n", index)); 1718 break; 1719 case UHF_PORT_INDICATOR: 1720 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1721 "%d\n", index)); 1722 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1723 break; 1724 case UHF_C_PORT_CONNECTION: 1725 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1726 break; 1727 case UHF_C_PORT_ENABLE: 1728 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1729 break; 1730 case UHF_C_PORT_SUSPEND: 1731 /* how? */ 1732 break; 1733 case UHF_C_PORT_OVER_CURRENT: 1734 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1735 break; 1736 case UHF_C_PORT_RESET: 1737 sc->sc_isreset = 0; 1738 break; 1739 default: 1740 err = USBD_IOERROR; 1741 goto ret; 1742 } 1743 #if 0 1744 switch(value) { 1745 case UHF_C_PORT_CONNECTION: 1746 case UHF_C_PORT_ENABLE: 1747 case UHF_C_PORT_SUSPEND: 1748 case UHF_C_PORT_OVER_CURRENT: 1749 case UHF_C_PORT_RESET: 1750 /* Enable RHSC interrupt if condition is cleared. */ 1751 if ((OREAD4(sc, port) >> 16) == 0) 1752 ehci_pcd_able(sc, 1); 1753 break; 1754 default: 1755 break; 1756 } 1757 #endif 1758 break; 1759 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1760 if ((value & 0xff) != 0) { 1761 err = USBD_IOERROR; 1762 goto ret; 1763 } 1764 hubd = ehci_hubd; 1765 hubd.bNbrPorts = sc->sc_noport; 1766 v = EOREAD4(sc, EHCI_HCSPARAMS); 1767 USETW(hubd.wHubCharacteristics, 1768 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1769 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1770 ? UHD_PORT_IND : 0); 1771 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1772 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1773 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1774 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1775 l = min(len, hubd.bDescLength); 1776 totlen = l; 1777 memcpy(buf, &hubd, l); 1778 break; 1779 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1780 if (len != 4) { 1781 err = USBD_IOERROR; 1782 goto ret; 1783 } 1784 memset(buf, 0, len); /* ? XXX */ 1785 totlen = len; 1786 break; 1787 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1788 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1789 index)); 1790 if (index < 1 || index > sc->sc_noport) { 1791 err = USBD_IOERROR; 1792 goto ret; 1793 } 1794 if (len != 4) { 1795 err = USBD_IOERROR; 1796 goto ret; 1797 } 1798 v = EOREAD4(sc, EHCI_PORTSC(index)); 1799 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1800 v)); 1801 i = UPS_HIGH_SPEED; 1802 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1803 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1804 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1805 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1806 if (v & EHCI_PS_PR) i |= UPS_RESET; 1807 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1808 USETW(ps.wPortStatus, i); 1809 i = 0; 1810 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1811 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1812 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1813 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1814 USETW(ps.wPortChange, i); 1815 l = min(len, sizeof ps); 1816 memcpy(buf, &ps, l); 1817 totlen = l; 1818 break; 1819 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1820 err = USBD_IOERROR; 1821 goto ret; 1822 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1823 break; 1824 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1825 if (index < 1 || index > sc->sc_noport) { 1826 err = USBD_IOERROR; 1827 goto ret; 1828 } 1829 port = EHCI_PORTSC(index); 1830 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1831 switch(value) { 1832 case UHF_PORT_ENABLE: 1833 EOWRITE4(sc, port, v | EHCI_PS_PE); 1834 break; 1835 case UHF_PORT_SUSPEND: 1836 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1837 break; 1838 case UHF_PORT_RESET: 1839 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1840 index)); 1841 if (EHCI_PS_IS_LOWSPEED(v)) { 1842 /* Low speed device, give up ownership. */ 1843 ehci_disown(sc, index, 1); 1844 break; 1845 } 1846 /* Start reset sequence. */ 1847 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1848 EOWRITE4(sc, port, v | EHCI_PS_PR); 1849 /* Wait for reset to complete. */ 1850 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1851 if (sc->sc_dying) { 1852 err = USBD_IOERROR; 1853 goto ret; 1854 } 1855 /* Terminate reset sequence. */ 1856 EOWRITE4(sc, port, v); 1857 /* Wait for HC to complete reset. */ 1858 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1859 if (sc->sc_dying) { 1860 err = USBD_IOERROR; 1861 goto ret; 1862 } 1863 v = EOREAD4(sc, port); 1864 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1865 if (v & EHCI_PS_PR) { 1866 printf("%s: port reset timeout\n", 1867 USBDEVNAME(sc->sc_bus.bdev)); 1868 return (USBD_TIMEOUT); 1869 } 1870 if (!(v & EHCI_PS_PE)) { 1871 /* Not a high speed device, give up ownership.*/ 1872 ehci_disown(sc, index, 0); 1873 break; 1874 } 1875 sc->sc_isreset = 1; 1876 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1877 index, v)); 1878 break; 1879 case UHF_PORT_POWER: 1880 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1881 "%d\n", index)); 1882 EOWRITE4(sc, port, v | EHCI_PS_PP); 1883 break; 1884 case UHF_PORT_TEST: 1885 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1886 "%d\n", index)); 1887 break; 1888 case UHF_PORT_INDICATOR: 1889 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 1890 "%d\n", index)); 1891 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1892 break; 1893 default: 1894 err = USBD_IOERROR; 1895 goto ret; 1896 } 1897 break; 1898 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1899 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1900 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1901 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1902 break; 1903 default: 1904 err = USBD_IOERROR; 1905 goto ret; 1906 } 1907 xfer->actlen = totlen; 1908 err = USBD_NORMAL_COMPLETION; 1909 ret: 1910 xfer->status = err; 1911 s = splusb(); 1912 usb_transfer_complete(xfer); 1913 splx(s); 1914 return (USBD_IN_PROGRESS); 1915 } 1916 1917 void 1918 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1919 { 1920 int port; 1921 u_int32_t v; 1922 1923 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1924 #ifdef DIAGNOSTIC 1925 if (sc->sc_npcomp != 0) { 1926 int i = (index-1) / sc->sc_npcomp; 1927 if (i >= sc->sc_ncomp) 1928 printf("%s: strange port\n", 1929 USBDEVNAME(sc->sc_bus.bdev)); 1930 else 1931 printf("%s: handing over %s speed device on " 1932 "port %d to %s\n", 1933 USBDEVNAME(sc->sc_bus.bdev), 1934 lowspeed ? "low" : "full", 1935 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1936 } else { 1937 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1938 } 1939 #endif 1940 port = EHCI_PORTSC(index); 1941 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1942 EOWRITE4(sc, port, v | EHCI_PS_PO); 1943 } 1944 1945 /* Abort a root control request. */ 1946 Static void 1947 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1948 { 1949 /* Nothing to do, all transfers are synchronous. */ 1950 } 1951 1952 /* Close the root pipe. */ 1953 Static void 1954 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1955 { 1956 DPRINTF(("ehci_root_ctrl_close\n")); 1957 /* Nothing to do. */ 1958 } 1959 1960 void 1961 ehci_root_intr_done(usbd_xfer_handle xfer) 1962 { 1963 } 1964 1965 Static usbd_status 1966 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1967 { 1968 usbd_status err; 1969 1970 /* Insert last in queue. */ 1971 err = usb_insert_transfer(xfer); 1972 if (err) 1973 return (err); 1974 1975 /* Pipe isn't running, start first */ 1976 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1977 } 1978 1979 Static usbd_status 1980 ehci_root_intr_start(usbd_xfer_handle xfer) 1981 { 1982 usbd_pipe_handle pipe = xfer->pipe; 1983 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1984 1985 if (sc->sc_dying) 1986 return (USBD_IOERROR); 1987 1988 sc->sc_intrxfer = xfer; 1989 1990 return (USBD_IN_PROGRESS); 1991 } 1992 1993 /* Abort a root interrupt request. */ 1994 Static void 1995 ehci_root_intr_abort(usbd_xfer_handle xfer) 1996 { 1997 int s; 1998 1999 if (xfer->pipe->intrxfer == xfer) { 2000 DPRINTF(("ehci_root_intr_abort: remove\n")); 2001 xfer->pipe->intrxfer = NULL; 2002 } 2003 xfer->status = USBD_CANCELLED; 2004 s = splusb(); 2005 usb_transfer_complete(xfer); 2006 splx(s); 2007 } 2008 2009 /* Close the root pipe. */ 2010 Static void 2011 ehci_root_intr_close(usbd_pipe_handle pipe) 2012 { 2013 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2014 2015 DPRINTF(("ehci_root_intr_close\n")); 2016 2017 sc->sc_intrxfer = NULL; 2018 } 2019 2020 void 2021 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2022 { 2023 } 2024 2025 /************************/ 2026 2027 ehci_soft_qh_t * 2028 ehci_alloc_sqh(ehci_softc_t *sc) 2029 { 2030 ehci_soft_qh_t *sqh; 2031 usbd_status err; 2032 int i, offs; 2033 usb_dma_t dma; 2034 2035 if (sc->sc_freeqhs == NULL) { 2036 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2037 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2038 EHCI_PAGE_SIZE, &dma); 2039 #ifdef EHCI_DEBUG 2040 if (err) 2041 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2042 #endif 2043 if (err) 2044 return (NULL); 2045 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2046 offs = i * EHCI_SQH_SIZE; 2047 sqh = KERNADDR(&dma, offs); 2048 sqh->physaddr = DMAADDR(&dma, offs); 2049 sqh->next = sc->sc_freeqhs; 2050 sc->sc_freeqhs = sqh; 2051 } 2052 } 2053 sqh = sc->sc_freeqhs; 2054 sc->sc_freeqhs = sqh->next; 2055 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2056 sqh->next = NULL; 2057 return (sqh); 2058 } 2059 2060 void 2061 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2062 { 2063 sqh->next = sc->sc_freeqhs; 2064 sc->sc_freeqhs = sqh; 2065 } 2066 2067 ehci_soft_qtd_t * 2068 ehci_alloc_sqtd(ehci_softc_t *sc) 2069 { 2070 ehci_soft_qtd_t *sqtd; 2071 usbd_status err; 2072 int i, offs; 2073 usb_dma_t dma; 2074 int s; 2075 2076 if (sc->sc_freeqtds == NULL) { 2077 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2078 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2079 EHCI_PAGE_SIZE, &dma); 2080 #ifdef EHCI_DEBUG 2081 if (err) 2082 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2083 #endif 2084 if (err) 2085 return (NULL); 2086 s = splusb(); 2087 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2088 offs = i * EHCI_SQTD_SIZE; 2089 sqtd = KERNADDR(&dma, offs); 2090 sqtd->physaddr = DMAADDR(&dma, offs); 2091 sqtd->nextqtd = sc->sc_freeqtds; 2092 sc->sc_freeqtds = sqtd; 2093 } 2094 splx(s); 2095 } 2096 2097 s = splusb(); 2098 sqtd = sc->sc_freeqtds; 2099 sc->sc_freeqtds = sqtd->nextqtd; 2100 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2101 sqtd->nextqtd = NULL; 2102 sqtd->xfer = NULL; 2103 splx(s); 2104 2105 return (sqtd); 2106 } 2107 2108 void 2109 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2110 { 2111 int s; 2112 2113 s = splusb(); 2114 sqtd->nextqtd = sc->sc_freeqtds; 2115 sc->sc_freeqtds = sqtd; 2116 splx(s); 2117 } 2118 2119 usbd_status 2120 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2121 int alen, int rd, usbd_xfer_handle xfer, 2122 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2123 { 2124 ehci_soft_qtd_t *next, *cur; 2125 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2126 u_int32_t qtdstatus; 2127 int len, curlen, mps; 2128 int i, tog; 2129 usb_dma_t *dma = &xfer->dmabuf; 2130 2131 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2132 2133 len = alen; 2134 dataphys = DMAADDR(dma, 0); 2135 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2136 #if 0 2137 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2138 epipe->nexttoggle); 2139 #endif 2140 qtdstatus = EHCI_QTD_ACTIVE | 2141 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2142 EHCI_QTD_SET_CERR(3) 2143 /* IOC set below */ 2144 /* BYTES set below */ 2145 ; 2146 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2147 tog = epipe->nexttoggle; 2148 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2149 2150 cur = ehci_alloc_sqtd(sc); 2151 *sp = cur; 2152 if (cur == NULL) 2153 goto nomem; 2154 for (;;) { 2155 dataphyspage = EHCI_PAGE(dataphys); 2156 /* The EHCI hardware can handle at most 5 pages. */ 2157 if (dataphyslastpage - dataphyspage < 2158 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2159 /* we can handle it in this QTD */ 2160 curlen = len; 2161 } else { 2162 /* must use multiple TDs, fill as much as possible. */ 2163 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2164 EHCI_PAGE_OFFSET(dataphys); 2165 #ifdef DIAGNOSTIC 2166 if (curlen > len) { 2167 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2168 "len=0x%x offs=0x%x\n", curlen, len, 2169 EHCI_PAGE_OFFSET(dataphys)); 2170 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2171 dataphyslastpage, dataphyspage, 2172 dataphys); 2173 curlen = len; 2174 } 2175 #endif 2176 /* the length must be a multiple of the max size */ 2177 curlen -= curlen % mps; 2178 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2179 "curlen=%d\n", curlen)); 2180 #ifdef DIAGNOSTIC 2181 if (curlen == 0) 2182 panic("ehci_alloc_std: curlen == 0"); 2183 #endif 2184 } 2185 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2186 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2187 dataphys, dataphyslastpage, 2188 len, curlen)); 2189 len -= curlen; 2190 2191 if (len != 0) { 2192 next = ehci_alloc_sqtd(sc); 2193 if (next == NULL) 2194 goto nomem; 2195 nextphys = htole32(next->physaddr); 2196 } else { 2197 next = NULL; 2198 nextphys = EHCI_NULL; 2199 } 2200 2201 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2202 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2203 if (i != 0) /* use offset only in first buffer */ 2204 a = EHCI_PAGE(a); 2205 cur->qtd.qtd_buffer[i] = htole32(a); 2206 cur->qtd.qtd_buffer_hi[i] = 0; 2207 #ifdef DIAGNOSTIC 2208 if (i >= EHCI_QTD_NBUFFERS) { 2209 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2210 goto nomem; 2211 } 2212 #endif 2213 } 2214 cur->nextqtd = next; 2215 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2216 cur->qtd.qtd_status = 2217 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2218 cur->xfer = xfer; 2219 cur->len = curlen; 2220 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2221 dataphys, dataphys + curlen)); 2222 /* adjust the toggle based on the number of packets in this 2223 qtd */ 2224 if (((curlen + mps - 1) / mps) & 1) { 2225 tog ^= 1; 2226 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2227 } 2228 if (len == 0) 2229 break; 2230 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2231 dataphys += curlen; 2232 cur = next; 2233 } 2234 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2235 *ep = cur; 2236 epipe->nexttoggle = tog; 2237 2238 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2239 *sp, *ep)); 2240 2241 return (USBD_NORMAL_COMPLETION); 2242 2243 nomem: 2244 /* XXX free chain */ 2245 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2246 return (USBD_NOMEM); 2247 } 2248 2249 Static void 2250 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2251 ehci_soft_qtd_t *sqtdend) 2252 { 2253 ehci_soft_qtd_t *p; 2254 int i; 2255 2256 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2257 sqtd, sqtdend)); 2258 2259 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2260 p = sqtd->nextqtd; 2261 ehci_free_sqtd(sc, sqtd); 2262 } 2263 } 2264 2265 /****************/ 2266 2267 /* 2268 * Close a reqular pipe. 2269 * Assumes that there are no pending transactions. 2270 */ 2271 void 2272 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2273 { 2274 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2275 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2276 ehci_soft_qh_t *sqh = epipe->sqh; 2277 int s; 2278 2279 s = splusb(); 2280 ehci_rem_qh(sc, sqh, head); 2281 splx(s); 2282 ehci_free_sqh(sc, epipe->sqh); 2283 } 2284 2285 /* 2286 * Abort a device request. 2287 * If this routine is called at splusb() it guarantees that the request 2288 * will be removed from the hardware scheduling and that the callback 2289 * for it will be called with USBD_CANCELLED status. 2290 * It's impossible to guarantee that the requested transfer will not 2291 * have happened since the hardware runs concurrently. 2292 * If the transaction has already happened we rely on the ordinary 2293 * interrupt processing to process it. 2294 * XXX This is most probably wrong. 2295 */ 2296 void 2297 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2298 { 2299 #define exfer EXFER(xfer) 2300 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2301 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2302 ehci_soft_qh_t *sqh = epipe->sqh; 2303 ehci_soft_qtd_t *sqtd; 2304 ehci_physaddr_t cur; 2305 u_int32_t qhstatus; 2306 int s; 2307 int hit; 2308 2309 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2310 2311 if (sc->sc_dying) { 2312 /* If we're dying, just do the software part. */ 2313 s = splusb(); 2314 xfer->status = status; /* make software ignore it */ 2315 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2316 usb_transfer_complete(xfer); 2317 splx(s); 2318 return; 2319 } 2320 2321 if (xfer->device->bus->intr_context || !curproc) 2322 panic("ehci_abort_xfer: not in process context"); 2323 2324 /* 2325 * Step 1: Make interrupt routine and hardware ignore xfer. 2326 */ 2327 s = splusb(); 2328 xfer->status = status; /* make software ignore it */ 2329 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2330 qhstatus = sqh->qh.qh_qtd.qtd_status; 2331 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2332 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2333 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2334 if (sqtd == exfer->sqtdend) 2335 break; 2336 } 2337 splx(s); 2338 2339 /* 2340 * Step 2: Wait until we know hardware has finished any possible 2341 * use of the xfer. Also make sure the soft interrupt routine 2342 * has run. 2343 */ 2344 ehci_sync_hc(sc); 2345 s = splusb(); 2346 #ifdef USB_USE_SOFTINTR 2347 sc->sc_softwake = 1; 2348 #endif /* USB_USE_SOFTINTR */ 2349 usb_schedsoftintr(&sc->sc_bus); 2350 #ifdef USB_USE_SOFTINTR 2351 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2352 #endif /* USB_USE_SOFTINTR */ 2353 splx(s); 2354 2355 /* 2356 * Step 3: Remove any vestiges of the xfer from the hardware. 2357 * The complication here is that the hardware may have executed 2358 * beyond the xfer we're trying to abort. So as we're scanning 2359 * the TDs of this xfer we check if the hardware points to 2360 * any of them. 2361 */ 2362 s = splusb(); /* XXX why? */ 2363 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2364 hit = 0; 2365 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2366 hit |= cur == sqtd->physaddr; 2367 if (sqtd == exfer->sqtdend) 2368 break; 2369 } 2370 sqtd = sqtd->nextqtd; 2371 /* Zap curqtd register if hardware pointed inside the xfer. */ 2372 if (hit && sqtd != NULL) { 2373 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2374 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2375 sqh->qh.qh_qtd.qtd_status = qhstatus; 2376 } else { 2377 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2378 } 2379 2380 /* 2381 * Step 4: Execute callback. 2382 */ 2383 #ifdef DIAGNOSTIC 2384 exfer->isdone = 1; 2385 #endif 2386 usb_transfer_complete(xfer); 2387 2388 splx(s); 2389 #undef exfer 2390 } 2391 2392 void 2393 ehci_timeout(void *addr) 2394 { 2395 struct ehci_xfer *exfer = addr; 2396 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2397 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2398 2399 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2400 #ifdef USB_DEBUG 2401 if (ehcidebug > 1) 2402 usbd_dump_pipe(exfer->xfer.pipe); 2403 #endif 2404 2405 if (sc->sc_dying) { 2406 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2407 return; 2408 } 2409 2410 /* Execute the abort in a process context. */ 2411 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2412 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2413 } 2414 2415 void 2416 ehci_timeout_task(void *addr) 2417 { 2418 usbd_xfer_handle xfer = addr; 2419 int s; 2420 2421 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2422 2423 s = splusb(); 2424 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2425 splx(s); 2426 } 2427 2428 /************************/ 2429 2430 Static usbd_status 2431 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2432 { 2433 usbd_status err; 2434 2435 /* Insert last in queue. */ 2436 err = usb_insert_transfer(xfer); 2437 if (err) 2438 return (err); 2439 2440 /* Pipe isn't running, start first */ 2441 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2442 } 2443 2444 Static usbd_status 2445 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2446 { 2447 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2448 usbd_status err; 2449 2450 if (sc->sc_dying) 2451 return (USBD_IOERROR); 2452 2453 #ifdef DIAGNOSTIC 2454 if (!(xfer->rqflags & URQ_REQUEST)) { 2455 /* XXX panic */ 2456 printf("ehci_device_ctrl_transfer: not a request\n"); 2457 return (USBD_INVAL); 2458 } 2459 #endif 2460 2461 err = ehci_device_request(xfer); 2462 if (err) 2463 return (err); 2464 2465 if (sc->sc_bus.use_polling) 2466 ehci_waitintr(sc, xfer); 2467 return (USBD_IN_PROGRESS); 2468 } 2469 2470 void 2471 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2472 { 2473 struct ehci_xfer *ex = EXFER(xfer); 2474 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2475 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2476 2477 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2478 2479 #ifdef DIAGNOSTIC 2480 if (!(xfer->rqflags & URQ_REQUEST)) { 2481 panic("ehci_ctrl_done: not a request"); 2482 } 2483 #endif 2484 2485 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2486 ehci_del_intr_list(ex); /* remove from active list */ 2487 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2488 } 2489 2490 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2491 } 2492 2493 /* Abort a device control request. */ 2494 Static void 2495 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2496 { 2497 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2498 ehci_abort_xfer(xfer, USBD_CANCELLED); 2499 } 2500 2501 /* Close a device control pipe. */ 2502 Static void 2503 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2504 { 2505 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2506 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2507 2508 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2509 ehci_close_pipe(pipe, sc->sc_async_head); 2510 } 2511 2512 usbd_status 2513 ehci_device_request(usbd_xfer_handle xfer) 2514 { 2515 #define exfer EXFER(xfer) 2516 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2517 usb_device_request_t *req = &xfer->request; 2518 usbd_device_handle dev = epipe->pipe.device; 2519 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2520 int addr = dev->address; 2521 ehci_soft_qtd_t *setup, *stat, *next; 2522 ehci_soft_qh_t *sqh; 2523 int isread; 2524 int len; 2525 usbd_status err; 2526 int s; 2527 2528 isread = req->bmRequestType & UT_READ; 2529 len = UGETW(req->wLength); 2530 2531 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2532 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2533 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2534 UGETW(req->wIndex), len, addr, 2535 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2536 2537 setup = ehci_alloc_sqtd(sc); 2538 if (setup == NULL) { 2539 err = USBD_NOMEM; 2540 goto bad1; 2541 } 2542 stat = ehci_alloc_sqtd(sc); 2543 if (stat == NULL) { 2544 err = USBD_NOMEM; 2545 goto bad2; 2546 } 2547 2548 sqh = epipe->sqh; 2549 epipe->u.ctl.length = len; 2550 2551 /* Update device address and length since they may have changed 2552 during the setup of the control pipe in usbd_new_device(). */ 2553 /* XXX This only needs to be done once, but it's too early in open. */ 2554 /* XXXX Should not touch ED here! */ 2555 sqh->qh.qh_endp = 2556 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2557 htole32( 2558 EHCI_QH_SET_ADDR(addr) | 2559 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2560 ); 2561 2562 /* Set up data transaction */ 2563 if (len != 0) { 2564 ehci_soft_qtd_t *end; 2565 2566 /* Start toggle at 1. */ 2567 epipe->nexttoggle = 1; 2568 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2569 &next, &end); 2570 if (err) 2571 goto bad3; 2572 end->nextqtd = stat; 2573 end->qtd.qtd_next = 2574 end->qtd.qtd_altnext = htole32(stat->physaddr); 2575 } else { 2576 next = stat; 2577 } 2578 2579 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2580 2581 /* Clear toggle */ 2582 setup->qtd.qtd_status = htole32( 2583 EHCI_QTD_ACTIVE | 2584 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2585 EHCI_QTD_SET_CERR(3) | 2586 EHCI_QTD_SET_TOGGLE(0) | 2587 EHCI_QTD_SET_BYTES(sizeof *req) 2588 ); 2589 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2590 setup->qtd.qtd_buffer_hi[0] = 0; 2591 setup->nextqtd = next; 2592 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2593 setup->xfer = xfer; 2594 setup->len = sizeof *req; 2595 2596 stat->qtd.qtd_status = htole32( 2597 EHCI_QTD_ACTIVE | 2598 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2599 EHCI_QTD_SET_CERR(3) | 2600 EHCI_QTD_SET_TOGGLE(1) | 2601 EHCI_QTD_IOC 2602 ); 2603 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2604 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2605 stat->nextqtd = NULL; 2606 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2607 stat->xfer = xfer; 2608 stat->len = 0; 2609 2610 #ifdef EHCI_DEBUG 2611 if (ehcidebug > 5) { 2612 DPRINTF(("ehci_device_request:\n")); 2613 ehci_dump_sqh(sqh); 2614 ehci_dump_sqtds(setup); 2615 } 2616 #endif 2617 2618 exfer->sqtdstart = setup; 2619 exfer->sqtdend = stat; 2620 #ifdef DIAGNOSTIC 2621 if (!exfer->isdone) { 2622 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2623 } 2624 exfer->isdone = 0; 2625 #endif 2626 2627 /* Insert qTD in QH list. */ 2628 s = splusb(); 2629 ehci_set_qh_qtd(sqh, setup); 2630 if (xfer->timeout && !sc->sc_bus.use_polling) { 2631 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2632 ehci_timeout, xfer); 2633 } 2634 ehci_add_intr_list(sc, exfer); 2635 xfer->status = USBD_IN_PROGRESS; 2636 splx(s); 2637 2638 #ifdef EHCI_DEBUG 2639 if (ehcidebug > 10) { 2640 DPRINTF(("ehci_device_request: status=%x\n", 2641 EOREAD4(sc, EHCI_USBSTS))); 2642 delay(10000); 2643 ehci_dump_regs(sc); 2644 ehci_dump_sqh(sc->sc_async_head); 2645 ehci_dump_sqh(sqh); 2646 ehci_dump_sqtds(setup); 2647 } 2648 #endif 2649 2650 return (USBD_NORMAL_COMPLETION); 2651 2652 bad3: 2653 ehci_free_sqtd(sc, stat); 2654 bad2: 2655 ehci_free_sqtd(sc, setup); 2656 bad1: 2657 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2658 xfer->status = err; 2659 usb_transfer_complete(xfer); 2660 return (err); 2661 #undef exfer 2662 } 2663 2664 /************************/ 2665 2666 Static usbd_status 2667 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2668 { 2669 usbd_status err; 2670 2671 /* Insert last in queue. */ 2672 err = usb_insert_transfer(xfer); 2673 if (err) 2674 return (err); 2675 2676 /* Pipe isn't running, start first */ 2677 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2678 } 2679 2680 usbd_status 2681 ehci_device_bulk_start(usbd_xfer_handle xfer) 2682 { 2683 #define exfer EXFER(xfer) 2684 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2685 usbd_device_handle dev = epipe->pipe.device; 2686 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2687 ehci_soft_qtd_t *data, *dataend; 2688 ehci_soft_qh_t *sqh; 2689 usbd_status err; 2690 int len, isread, endpt; 2691 int s; 2692 2693 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2694 xfer, xfer->length, xfer->flags)); 2695 2696 if (sc->sc_dying) 2697 return (USBD_IOERROR); 2698 2699 #ifdef DIAGNOSTIC 2700 if (xfer->rqflags & URQ_REQUEST) 2701 panic("ehci_device_bulk_start: a request"); 2702 #endif 2703 2704 len = xfer->length; 2705 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2706 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2707 sqh = epipe->sqh; 2708 2709 epipe->u.bulk.length = len; 2710 2711 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2712 &dataend); 2713 if (err) { 2714 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2715 xfer->status = err; 2716 usb_transfer_complete(xfer); 2717 return (err); 2718 } 2719 2720 #ifdef EHCI_DEBUG 2721 if (ehcidebug > 5) { 2722 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2723 ehci_dump_sqh(sqh); 2724 ehci_dump_sqtds(data); 2725 } 2726 #endif 2727 2728 /* Set up interrupt info. */ 2729 exfer->sqtdstart = data; 2730 exfer->sqtdend = dataend; 2731 #ifdef DIAGNOSTIC 2732 if (!exfer->isdone) { 2733 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2734 } 2735 exfer->isdone = 0; 2736 #endif 2737 2738 s = splusb(); 2739 ehci_set_qh_qtd(sqh, data); 2740 if (xfer->timeout && !sc->sc_bus.use_polling) { 2741 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2742 ehci_timeout, xfer); 2743 } 2744 ehci_add_intr_list(sc, exfer); 2745 xfer->status = USBD_IN_PROGRESS; 2746 splx(s); 2747 2748 #ifdef EHCI_DEBUG 2749 if (ehcidebug > 10) { 2750 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2751 delay(10000); 2752 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2753 ehci_dump_regs(sc); 2754 #if 0 2755 printf("async_head:\n"); 2756 ehci_dump_sqh(sc->sc_async_head); 2757 #endif 2758 printf("sqh:\n"); 2759 ehci_dump_sqh(sqh); 2760 ehci_dump_sqtds(data); 2761 } 2762 #endif 2763 2764 if (sc->sc_bus.use_polling) 2765 ehci_waitintr(sc, xfer); 2766 2767 return (USBD_IN_PROGRESS); 2768 #undef exfer 2769 } 2770 2771 Static void 2772 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2773 { 2774 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2775 ehci_abort_xfer(xfer, USBD_CANCELLED); 2776 } 2777 2778 /* 2779 * Close a device bulk pipe. 2780 */ 2781 Static void 2782 ehci_device_bulk_close(usbd_pipe_handle pipe) 2783 { 2784 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2785 2786 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2787 ehci_close_pipe(pipe, sc->sc_async_head); 2788 } 2789 2790 void 2791 ehci_device_bulk_done(usbd_xfer_handle xfer) 2792 { 2793 struct ehci_xfer *ex = EXFER(xfer); 2794 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2795 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2796 2797 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2798 xfer, xfer->actlen)); 2799 2800 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2801 ehci_del_intr_list(ex); /* remove from active list */ 2802 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2803 } 2804 2805 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2806 } 2807 2808 /************************/ 2809 2810 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2811 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2812 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2813 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2814 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2815 2816 /************************/ 2817 2818 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2819 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2820 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2821 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2822 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2823
Indexes created Tue Sep 23 22:09:46 GMT 2025