ehci.c revision 1.78
1 /* $NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 323 DPRINTF(("ehci_init: start\n")); 324 #ifdef EHCI_DEBUG 325 theehci = sc; 326 #endif 327 328 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 329 330 version = EREAD2(sc, EHCI_HCIVERSION); 331 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 332 version >> 8, version & 0xff); 333 334 sparams = EREAD4(sc, EHCI_HCSPARAMS); 335 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 336 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 337 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 338 aprint_error("%s: wrong number of companions (%d != %d)\n", 339 USBDEVNAME(sc->sc_bus.bdev), 340 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 341 #if NOHCI == 0 || NUHCI == 0 342 aprint_error("%s: ohci or uhci probably not configured\n", 343 USBDEVNAME(sc->sc_bus.bdev)); 344 #endif 345 return (USBD_IOERROR); 346 } 347 if (sc->sc_ncomp > 0) { 348 aprint_normal("%s: companion controller%s, %d port%s each:", 349 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 350 EHCI_HCS_N_PCC(sparams), 351 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 352 for (i = 0; i < sc->sc_ncomp; i++) 353 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 354 aprint_normal("\n"); 355 } 356 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 357 cparams = EREAD4(sc, EHCI_HCCPARAMS); 358 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 359 360 if (EHCI_HCC_64BIT(cparams)) { 361 /* MUST clear segment register if 64 bit capable. */ 362 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 363 } 364 365 sc->sc_bus.usbrev = USBREV_2_0; 366 367 /* Reset the controller */ 368 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 369 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 370 usb_delay_ms(&sc->sc_bus, 1); 371 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 372 for (i = 0; i < 100; i++) { 373 usb_delay_ms(&sc->sc_bus, 1); 374 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 375 if (!hcr) 376 break; 377 } 378 if (hcr) { 379 aprint_error("%s: reset timeout\n", 380 USBDEVNAME(sc->sc_bus.bdev)); 381 return (USBD_IOERROR); 382 } 383 384 /* XXX need proper intr scheduling */ 385 sc->sc_rand = 96; 386 387 /* frame list size at default, read back what we got and use that */ 388 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 389 case 0: sc->sc_flsize = 1024; break; 390 case 1: sc->sc_flsize = 512; break; 391 case 2: sc->sc_flsize = 256; break; 392 case 3: return (USBD_IOERROR); 393 } 394 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 395 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 396 if (err) 397 return (err); 398 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 399 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 400 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 401 402 /* Set up the bus struct. */ 403 sc->sc_bus.methods = &ehci_bus_methods; 404 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 405 406 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 407 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 408 409 sc->sc_eintrs = EHCI_NORMAL_INTRS; 410 411 /* 412 * Allocate the interrupt dummy QHs. These are arranged to give poll 413 * intervals that are powers of 2 times 1ms. 414 */ 415 for (i = 0; i < EHCI_INTRQHS; i++) { 416 sqh = ehci_alloc_sqh(sc); 417 if (sqh == NULL) { 418 err = USBD_NOMEM; 419 goto bad1; 420 } 421 sc->sc_islots[i].sqh = sqh; 422 } 423 for (i = 0; i < EHCI_INTRQHS; i++) { 424 sqh = sc->sc_islots[i].sqh; 425 if (i == 0) { 426 /* The last (1ms) QH terminates. */ 427 sqh->qh.qh_link = EHCI_NULL; 428 sqh->next = NULL; 429 } else { 430 /* Otherwise the next QH has half the poll interval */ 431 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 432 sqh->qh.qh_link = htole32(sqh->next->physaddr | 433 EHCI_LINK_QH); 434 } 435 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 436 sqh->qh.qh_link = EHCI_NULL; 437 sqh->qh.qh_curqtd = EHCI_NULL; 438 sqh->next = NULL; 439 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 440 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 441 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 442 sqh->sqtd = NULL; 443 } 444 /* Point the frame list at the last level (128ms). */ 445 for (i = 0; i < sc->sc_flsize; i++) { 446 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 447 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 448 i)].sqh->physaddr); 449 } 450 451 /* Allocate dummy QH that starts the async list. */ 452 sqh = ehci_alloc_sqh(sc); 453 if (sqh == NULL) { 454 err = USBD_NOMEM; 455 goto bad1; 456 } 457 /* Fill the QH */ 458 sqh->qh.qh_endp = 459 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 460 sqh->qh.qh_link = 461 htole32(sqh->physaddr | EHCI_LINK_QH); 462 sqh->qh.qh_curqtd = EHCI_NULL; 463 sqh->next = NULL; 464 /* Fill the overlay qTD */ 465 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 466 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 467 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 468 sqh->sqtd = NULL; 469 #ifdef EHCI_DEBUG 470 if (ehcidebug) { 471 ehci_dump_sqh(sqh); 472 } 473 #endif 474 475 /* Point to async list */ 476 sc->sc_async_head = sqh; 477 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 478 479 usb_callout_init(sc->sc_tmo_pcd); 480 481 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 482 483 /* Enable interrupts */ 484 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 485 486 /* Turn on controller */ 487 EOWRITE4(sc, EHCI_USBCMD, 488 EHCI_CMD_ITC_8 | /* 8 microframes */ 489 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 490 EHCI_CMD_ASE | 491 EHCI_CMD_PSE | 492 EHCI_CMD_RS); 493 494 /* Take over port ownership */ 495 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 496 497 for (i = 0; i < 100; i++) { 498 usb_delay_ms(&sc->sc_bus, 1); 499 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 500 if (!hcr) 501 break; 502 } 503 if (hcr) { 504 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 505 return (USBD_IOERROR); 506 } 507 508 return (USBD_NORMAL_COMPLETION); 509 510 #if 0 511 bad2: 512 ehci_free_sqh(sc, sc->sc_async_head); 513 #endif 514 bad1: 515 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 516 return (err); 517 } 518 519 int 520 ehci_intr(void *v) 521 { 522 ehci_softc_t *sc = v; 523 524 if (sc == NULL || sc->sc_dying) 525 return (0); 526 527 /* If we get an interrupt while polling, then just ignore it. */ 528 if (sc->sc_bus.use_polling) { 529 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 530 531 if (intrs) 532 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 533 #ifdef DIAGNOSTIC 534 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 535 #endif 536 return (0); 537 } 538 539 return (ehci_intr1(sc)); 540 } 541 542 Static int 543 ehci_intr1(ehci_softc_t *sc) 544 { 545 u_int32_t intrs, eintrs; 546 547 DPRINTFN(20,("ehci_intr1: enter\n")); 548 549 /* In case the interrupt occurs before initialization has completed. */ 550 if (sc == NULL) { 551 #ifdef DIAGNOSTIC 552 printf("ehci_intr1: sc == NULL\n"); 553 #endif 554 return (0); 555 } 556 557 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 558 if (!intrs) 559 return (0); 560 561 eintrs = intrs & sc->sc_eintrs; 562 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 563 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 564 (u_int)eintrs)); 565 if (!eintrs) 566 return (0); 567 568 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 569 sc->sc_bus.intr_context++; 570 sc->sc_bus.no_intrs++; 571 if (eintrs & EHCI_STS_IAA) { 572 DPRINTF(("ehci_intr1: door bell\n")); 573 wakeup(&sc->sc_async_head); 574 eintrs &= ~EHCI_STS_IAA; 575 } 576 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 577 DPRINTFN(5,("ehci_intr1: %s %s\n", 578 eintrs & EHCI_STS_INT ? "INT" : "", 579 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 580 usb_schedsoftintr(&sc->sc_bus); 581 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 582 } 583 if (eintrs & EHCI_STS_HSE) { 584 printf("%s: unrecoverable error, controller halted\n", 585 USBDEVNAME(sc->sc_bus.bdev)); 586 /* XXX what else */ 587 } 588 if (eintrs & EHCI_STS_PCD) { 589 ehci_pcd(sc, sc->sc_intrxfer); 590 /* 591 * Disable PCD interrupt for now, because it will be 592 * on until the port has been reset. 593 */ 594 ehci_pcd_able(sc, 0); 595 /* Do not allow RHSC interrupts > 1 per second */ 596 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 597 eintrs &= ~EHCI_STS_PCD; 598 } 599 600 sc->sc_bus.intr_context--; 601 602 if (eintrs != 0) { 603 /* Block unprocessed interrupts. */ 604 sc->sc_eintrs &= ~eintrs; 605 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 606 printf("%s: blocking intrs 0x%x\n", 607 USBDEVNAME(sc->sc_bus.bdev), eintrs); 608 } 609 610 return (1); 611 } 612 613 void 614 ehci_pcd_able(ehci_softc_t *sc, int on) 615 { 616 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 617 if (on) 618 sc->sc_eintrs |= EHCI_STS_PCD; 619 else 620 sc->sc_eintrs &= ~EHCI_STS_PCD; 621 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 622 } 623 624 void 625 ehci_pcd_enable(void *v_sc) 626 { 627 ehci_softc_t *sc = v_sc; 628 629 ehci_pcd_able(sc, 1); 630 } 631 632 void 633 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 634 { 635 usbd_pipe_handle pipe; 636 u_char *p; 637 int i, m; 638 639 if (xfer == NULL) { 640 /* Just ignore the change. */ 641 return; 642 } 643 644 pipe = xfer->pipe; 645 646 p = KERNADDR(&xfer->dmabuf, 0); 647 m = min(sc->sc_noport, xfer->length * 8 - 1); 648 memset(p, 0, xfer->length); 649 for (i = 1; i <= m; i++) { 650 /* Pick out CHANGE bits from the status reg. */ 651 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 652 p[i/8] |= 1 << (i%8); 653 } 654 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 655 xfer->actlen = xfer->length; 656 xfer->status = USBD_NORMAL_COMPLETION; 657 658 usb_transfer_complete(xfer); 659 } 660 661 void 662 ehci_softintr(void *v) 663 { 664 ehci_softc_t *sc = v; 665 struct ehci_xfer *ex, *nextex; 666 667 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 668 sc->sc_bus.intr_context)); 669 670 sc->sc_bus.intr_context++; 671 672 /* 673 * The only explanation I can think of for why EHCI is as brain dead 674 * as UHCI interrupt-wise is that Intel was involved in both. 675 * An interrupt just tells us that something is done, we have no 676 * clue what, so we need to scan through all active transfers. :-( 677 */ 678 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 679 nextex = LIST_NEXT(ex, inext); 680 ehci_check_intr(sc, ex); 681 } 682 683 #ifdef USB_USE_SOFTINTR 684 if (sc->sc_softwake) { 685 sc->sc_softwake = 0; 686 wakeup(&sc->sc_softwake); 687 } 688 #endif /* USB_USE_SOFTINTR */ 689 690 sc->sc_bus.intr_context--; 691 } 692 693 /* Check for an interrupt. */ 694 void 695 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 696 { 697 ehci_soft_qtd_t *sqtd, *lsqtd; 698 u_int32_t status; 699 700 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 701 702 if (ex->sqtdstart == NULL) { 703 printf("ehci_check_intr: sqtdstart=NULL\n"); 704 return; 705 } 706 lsqtd = ex->sqtdend; 707 #ifdef DIAGNOSTIC 708 if (lsqtd == NULL) { 709 printf("ehci_check_intr: sqtd==0\n"); 710 return; 711 } 712 #endif 713 /* 714 * If the last TD is still active we need to check whether there 715 * is a an error somewhere in the middle, or whether there was a 716 * short packet (SPD and not ACTIVE). 717 */ 718 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 719 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 720 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 721 status = le32toh(sqtd->qtd.qtd_status); 722 /* If there's an active QTD the xfer isn't done. */ 723 if (status & EHCI_QTD_ACTIVE) 724 break; 725 /* Any kind of error makes the xfer done. */ 726 if (status & EHCI_QTD_HALTED) 727 goto done; 728 /* We want short packets, and it is short: it's done */ 729 if (EHCI_QTD_GET_BYTES(status) != 0) 730 goto done; 731 } 732 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 733 ex, ex->sqtdstart)); 734 return; 735 } 736 done: 737 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 738 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 739 ehci_idone(ex); 740 } 741 742 void 743 ehci_idone(struct ehci_xfer *ex) 744 { 745 usbd_xfer_handle xfer = &ex->xfer; 746 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 747 ehci_soft_qtd_t *sqtd; 748 u_int32_t status = 0, nstatus; 749 int actlen; 750 751 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 752 #ifdef DIAGNOSTIC 753 { 754 int s = splhigh(); 755 if (ex->isdone) { 756 splx(s); 757 #ifdef EHCI_DEBUG 758 printf("ehci_idone: ex is done!\n "); 759 ehci_dump_exfer(ex); 760 #else 761 printf("ehci_idone: ex=%p is done!\n", ex); 762 #endif 763 return; 764 } 765 ex->isdone = 1; 766 splx(s); 767 } 768 #endif 769 770 if (xfer->status == USBD_CANCELLED || 771 xfer->status == USBD_TIMEOUT) { 772 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 773 return; 774 } 775 776 #ifdef EHCI_DEBUG 777 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 778 if (ehcidebug > 10) 779 ehci_dump_sqtds(ex->sqtdstart); 780 #endif 781 782 /* The transfer is done, compute actual length and status. */ 783 actlen = 0; 784 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 785 nstatus = le32toh(sqtd->qtd.qtd_status); 786 if (nstatus & EHCI_QTD_ACTIVE) 787 break; 788 789 status = nstatus; 790 /* halt is ok if descriptor is last, and complete */ 791 if (sqtd->qtd.qtd_next == EHCI_NULL && 792 EHCI_QTD_GET_BYTES(status) == 0) 793 status &= ~EHCI_QTD_HALTED; 794 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 795 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 796 } 797 798 /* If there are left over TDs we need to update the toggle. */ 799 if (sqtd != NULL) { 800 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 status &= EHCI_QTD_STATERRS; 809 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 810 xfer->length, actlen, status)); 811 xfer->actlen = actlen; 812 if (status != 0) { 813 #ifdef EHCI_DEBUG 814 char sbuf[128]; 815 816 bitmask_snprintf((u_int32_t)status, 817 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 818 "\3MISSED", sbuf, sizeof(sbuf)); 819 820 DPRINTFN((status & EHCI_QTD_HALTED) ? 2 : 0, 821 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 822 "status 0x%s\n", 823 xfer->pipe->device->address, 824 xfer->pipe->endpoint->edesc->bEndpointAddress, 825 sbuf)); 826 if (ehcidebug > 2) { 827 ehci_dump_sqh(epipe->sqh); 828 ehci_dump_sqtds(ex->sqtdstart); 829 } 830 #endif 831 if (status == EHCI_QTD_HALTED) 832 xfer->status = USBD_STALLED; 833 else 834 xfer->status = USBD_IOERROR; /* more info XXX */ 835 } else { 836 xfer->status = USBD_NORMAL_COMPLETION; 837 } 838 839 usb_transfer_complete(xfer); 840 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 841 } 842 843 /* 844 * Wait here until controller claims to have an interrupt. 845 * Then call ehci_intr and return. Use timeout to avoid waiting 846 * too long. 847 */ 848 void 849 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 850 { 851 int timo = xfer->timeout; 852 int usecs; 853 u_int32_t intrs; 854 855 xfer->status = USBD_IN_PROGRESS; 856 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 857 usb_delay_ms(&sc->sc_bus, 1); 858 if (sc->sc_dying) 859 break; 860 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 861 sc->sc_eintrs; 862 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 863 #ifdef EHCI_DEBUG 864 if (ehcidebug > 15) 865 ehci_dump_regs(sc); 866 #endif 867 if (intrs) { 868 ehci_intr1(sc); 869 if (xfer->status != USBD_IN_PROGRESS) 870 return; 871 } 872 } 873 874 /* Timeout */ 875 DPRINTF(("ehci_waitintr: timeout\n")); 876 xfer->status = USBD_TIMEOUT; 877 usb_transfer_complete(xfer); 878 /* XXX should free TD */ 879 } 880 881 void 882 ehci_poll(struct usbd_bus *bus) 883 { 884 ehci_softc_t *sc = (ehci_softc_t *)bus; 885 #ifdef EHCI_DEBUG 886 static int last; 887 int new; 888 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 889 if (new != last) { 890 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 891 last = new; 892 } 893 #endif 894 895 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 896 ehci_intr1(sc); 897 } 898 899 int 900 ehci_detach(struct ehci_softc *sc, int flags) 901 { 902 int rv = 0; 903 904 if (sc->sc_child != NULL) 905 rv = config_detach(sc->sc_child, flags); 906 907 if (rv != 0) 908 return (rv); 909 910 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 911 912 if (sc->sc_powerhook != NULL) 913 powerhook_disestablish(sc->sc_powerhook); 914 if (sc->sc_shutdownhook != NULL) 915 shutdownhook_disestablish(sc->sc_shutdownhook); 916 917 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 918 919 /* XXX free other data structures XXX */ 920 921 return (rv); 922 } 923 924 925 int 926 ehci_activate(device_ptr_t self, enum devact act) 927 { 928 struct ehci_softc *sc = (struct ehci_softc *)self; 929 int rv = 0; 930 931 switch (act) { 932 case DVACT_ACTIVATE: 933 return (EOPNOTSUPP); 934 935 case DVACT_DEACTIVATE: 936 if (sc->sc_child != NULL) 937 rv = config_deactivate(sc->sc_child); 938 sc->sc_dying = 1; 939 break; 940 } 941 return (rv); 942 } 943 944 /* 945 * Handle suspend/resume. 946 * 947 * We need to switch to polling mode here, because this routine is 948 * called from an interrupt context. This is all right since we 949 * are almost suspended anyway. 950 */ 951 void 952 ehci_power(int why, void *v) 953 { 954 ehci_softc_t *sc = v; 955 u_int32_t cmd, hcr; 956 int s, i; 957 958 #ifdef EHCI_DEBUG 959 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 960 if (ehcidebug > 0) 961 ehci_dump_regs(sc); 962 #endif 963 964 s = splhardusb(); 965 switch (why) { 966 case PWR_SUSPEND: 967 case PWR_STANDBY: 968 sc->sc_bus.use_polling++; 969 970 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 971 972 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 973 EOWRITE4(sc, EHCI_USBCMD, cmd); 974 975 for (i = 0; i < 100; i++) { 976 hcr = EOREAD4(sc, EHCI_USBSTS) & 977 (EHCI_STS_ASS | EHCI_STS_PSS); 978 if (hcr == 0) 979 break; 980 981 usb_delay_ms(&sc->sc_bus, 1); 982 } 983 if (hcr != 0) { 984 printf("%s: reset timeout\n", 985 USBDEVNAME(sc->sc_bus.bdev)); 986 } 987 988 cmd &= ~EHCI_CMD_RS; 989 EOWRITE4(sc, EHCI_USBCMD, cmd); 990 991 for (i = 0; i < 100; i++) { 992 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 993 if (hcr == EHCI_STS_HCH) 994 break; 995 996 usb_delay_ms(&sc->sc_bus, 1); 997 } 998 if (hcr != EHCI_STS_HCH) { 999 printf("%s: config timeout\n", 1000 USBDEVNAME(sc->sc_bus.bdev)); 1001 } 1002 1003 sc->sc_bus.use_polling--; 1004 break; 1005 1006 case PWR_RESUME: 1007 sc->sc_bus.use_polling++; 1008 1009 /* restore things in case the bios sucks */ 1010 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1011 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1012 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1013 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1014 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1015 1016 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1017 1018 for (i = 0; i < 100; i++) { 1019 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1020 if (hcr != EHCI_STS_HCH) 1021 break; 1022 1023 usb_delay_ms(&sc->sc_bus, 1); 1024 } 1025 if (hcr == EHCI_STS_HCH) { 1026 printf("%s: config timeout\n", 1027 USBDEVNAME(sc->sc_bus.bdev)); 1028 } 1029 1030 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1031 1032 sc->sc_bus.use_polling--; 1033 break; 1034 case PWR_SOFTSUSPEND: 1035 case PWR_SOFTSTANDBY: 1036 case PWR_SOFTRESUME: 1037 break; 1038 } 1039 splx(s); 1040 1041 #ifdef EHCI_DEBUG 1042 DPRINTF(("ehci_power: sc=%p\n", sc)); 1043 if (ehcidebug > 0) 1044 ehci_dump_regs(sc); 1045 #endif 1046 } 1047 1048 /* 1049 * Shut down the controller when the system is going down. 1050 */ 1051 void 1052 ehci_shutdown(void *v) 1053 { 1054 ehci_softc_t *sc = v; 1055 1056 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1057 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1058 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1059 } 1060 1061 usbd_status 1062 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1063 { 1064 struct ehci_softc *sc = (struct ehci_softc *)bus; 1065 usbd_status err; 1066 1067 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1068 #ifdef EHCI_DEBUG 1069 if (err) 1070 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1071 #endif 1072 return (err); 1073 } 1074 1075 void 1076 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1077 { 1078 struct ehci_softc *sc = (struct ehci_softc *)bus; 1079 1080 usb_freemem(&sc->sc_bus, dma); 1081 } 1082 1083 usbd_xfer_handle 1084 ehci_allocx(struct usbd_bus *bus) 1085 { 1086 struct ehci_softc *sc = (struct ehci_softc *)bus; 1087 usbd_xfer_handle xfer; 1088 1089 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1090 if (xfer != NULL) { 1091 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1092 #ifdef DIAGNOSTIC 1093 if (xfer->busy_free != XFER_FREE) { 1094 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1095 xfer->busy_free); 1096 } 1097 #endif 1098 } else { 1099 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1100 } 1101 if (xfer != NULL) { 1102 memset(xfer, 0, sizeof(struct ehci_xfer)); 1103 #ifdef DIAGNOSTIC 1104 EXFER(xfer)->isdone = 1; 1105 xfer->busy_free = XFER_BUSY; 1106 #endif 1107 } 1108 return (xfer); 1109 } 1110 1111 void 1112 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 1116 #ifdef DIAGNOSTIC 1117 if (xfer->busy_free != XFER_BUSY) { 1118 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1119 xfer->busy_free); 1120 return; 1121 } 1122 xfer->busy_free = XFER_FREE; 1123 if (!EXFER(xfer)->isdone) { 1124 printf("ehci_freex: !isdone\n"); 1125 return; 1126 } 1127 #endif 1128 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1129 } 1130 1131 Static void 1132 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1133 { 1134 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1135 1136 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1137 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1138 #ifdef USB_DEBUG 1139 if (ehcidebug) 1140 usbd_dump_pipe(pipe); 1141 #endif 1142 epipe->nexttoggle = 0; 1143 } 1144 1145 Static void 1146 ehci_noop(usbd_pipe_handle pipe) 1147 { 1148 } 1149 1150 #ifdef EHCI_DEBUG 1151 void 1152 ehci_dump_regs(ehci_softc_t *sc) 1153 { 1154 int i; 1155 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1156 EOREAD4(sc, EHCI_USBCMD), 1157 EOREAD4(sc, EHCI_USBSTS), 1158 EOREAD4(sc, EHCI_USBINTR)); 1159 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1160 EOREAD4(sc, EHCI_FRINDEX), 1161 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1162 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1163 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1164 for (i = 1; i <= sc->sc_noport; i++) 1165 printf("port %d status=0x%08x\n", i, 1166 EOREAD4(sc, EHCI_PORTSC(i))); 1167 } 1168 1169 /* 1170 * Unused function - this is meant to be called from a kernel 1171 * debugger. 1172 */ 1173 void 1174 ehci_dump() 1175 { 1176 ehci_dump_regs(theehci); 1177 } 1178 1179 void 1180 ehci_dump_link(ehci_link_t link, int type) 1181 { 1182 link = le32toh(link); 1183 printf("0x%08x", link); 1184 if (link & EHCI_LINK_TERMINATE) 1185 printf("<T>"); 1186 else { 1187 printf("<"); 1188 if (type) { 1189 switch (EHCI_LINK_TYPE(link)) { 1190 case EHCI_LINK_ITD: printf("ITD"); break; 1191 case EHCI_LINK_QH: printf("QH"); break; 1192 case EHCI_LINK_SITD: printf("SITD"); break; 1193 case EHCI_LINK_FSTN: printf("FSTN"); break; 1194 } 1195 } 1196 printf(">"); 1197 } 1198 } 1199 1200 void 1201 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1202 { 1203 int i; 1204 u_int32_t stop; 1205 1206 stop = 0; 1207 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1208 ehci_dump_sqtd(sqtd); 1209 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1210 } 1211 if (sqtd) 1212 printf("dump aborted, too many TDs\n"); 1213 } 1214 1215 void 1216 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1217 { 1218 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1219 ehci_dump_qtd(&sqtd->qtd); 1220 } 1221 1222 void 1223 ehci_dump_qtd(ehci_qtd_t *qtd) 1224 { 1225 u_int32_t s; 1226 char sbuf[128]; 1227 1228 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1229 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1230 printf("\n"); 1231 s = le32toh(qtd->qtd_status); 1232 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1233 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1234 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1235 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1236 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1237 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1238 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1239 EHCI_QTD_GET_PID(s), sbuf); 1240 for (s = 0; s < 5; s++) 1241 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1242 } 1243 1244 void 1245 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1246 { 1247 ehci_qh_t *qh = &sqh->qh; 1248 u_int32_t endp, endphub; 1249 1250 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1251 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1252 endp = le32toh(qh->qh_endp); 1253 printf(" endp=0x%08x\n", endp); 1254 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1255 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1256 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1257 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1258 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1259 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1260 EHCI_QH_GET_NRL(endp)); 1261 endphub = le32toh(qh->qh_endphub); 1262 printf(" endphub=0x%08x\n", endphub); 1263 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1264 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1265 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1266 EHCI_QH_GET_MULT(endphub)); 1267 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1268 printf("Overlay qTD:\n"); 1269 ehci_dump_qtd(&qh->qh_qtd); 1270 } 1271 1272 #ifdef DIAGNOSTIC 1273 Static void 1274 ehci_dump_exfer(struct ehci_xfer *ex) 1275 { 1276 printf("ehci_dump_exfer: ex=%p\n", ex); 1277 } 1278 #endif 1279 #endif 1280 1281 usbd_status 1282 ehci_open(usbd_pipe_handle pipe) 1283 { 1284 usbd_device_handle dev = pipe->device; 1285 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1286 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1287 u_int8_t addr = dev->address; 1288 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1289 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1290 ehci_soft_qh_t *sqh; 1291 usbd_status err; 1292 int s; 1293 int ival, speed, naks; 1294 1295 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1296 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1297 1298 if (sc->sc_dying) 1299 return (USBD_IOERROR); 1300 1301 epipe->nexttoggle = 0; 1302 1303 if (addr == sc->sc_addr) { 1304 switch (ed->bEndpointAddress) { 1305 case USB_CONTROL_ENDPOINT: 1306 pipe->methods = &ehci_root_ctrl_methods; 1307 break; 1308 case UE_DIR_IN | EHCI_INTR_ENDPT: 1309 pipe->methods = &ehci_root_intr_methods; 1310 break; 1311 default: 1312 return (USBD_INVAL); 1313 } 1314 return (USBD_NORMAL_COMPLETION); 1315 } 1316 1317 /* XXX All this stuff is only valid for async. */ 1318 switch (dev->speed) { 1319 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1320 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1321 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1322 default: panic("ehci_open: bad device speed %d", dev->speed); 1323 } 1324 naks = 8; /* XXX */ 1325 sqh = ehci_alloc_sqh(sc); 1326 if (sqh == NULL) 1327 goto bad0; 1328 /* qh_link filled when the QH is added */ 1329 sqh->qh.qh_endp = htole32( 1330 EHCI_QH_SET_ADDR(addr) | 1331 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1332 EHCI_QH_SET_EPS(speed) | 1333 EHCI_QH_DTC | 1334 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1335 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1336 EHCI_QH_CTL : 0) | 1337 EHCI_QH_SET_NRL(naks) 1338 ); 1339 sqh->qh.qh_endphub = htole32( 1340 EHCI_QH_SET_MULT(1) | 1341 /* XXX TT stuff */ 1342 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1343 ); 1344 sqh->qh.qh_curqtd = EHCI_NULL; 1345 /* Fill the overlay qTD */ 1346 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1347 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1348 sqh->qh.qh_qtd.qtd_status = htole32(0); 1349 1350 epipe->sqh = sqh; 1351 1352 switch (xfertype) { 1353 case UE_CONTROL: 1354 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1355 0, &epipe->u.ctl.reqdma); 1356 #ifdef EHCI_DEBUG 1357 if (err) 1358 printf("ehci_open: usb_allocmem()=%d\n", err); 1359 #endif 1360 if (err) 1361 goto bad1; 1362 pipe->methods = &ehci_device_ctrl_methods; 1363 s = splusb(); 1364 ehci_add_qh(sqh, sc->sc_async_head); 1365 splx(s); 1366 break; 1367 case UE_BULK: 1368 pipe->methods = &ehci_device_bulk_methods; 1369 s = splusb(); 1370 ehci_add_qh(sqh, sc->sc_async_head); 1371 splx(s); 1372 break; 1373 case UE_INTERRUPT: 1374 pipe->methods = &ehci_device_intr_methods; 1375 ival = pipe->interval; 1376 if (ival == USBD_DEFAULT_INTERVAL) 1377 ival = ed->bInterval; 1378 return (ehci_device_setintr(sc, sqh, ival)); 1379 case UE_ISOCHRONOUS: 1380 pipe->methods = &ehci_device_isoc_methods; 1381 return (USBD_INVAL); 1382 default: 1383 return (USBD_INVAL); 1384 } 1385 return (USBD_NORMAL_COMPLETION); 1386 1387 bad1: 1388 ehci_free_sqh(sc, sqh); 1389 bad0: 1390 return (USBD_NOMEM); 1391 } 1392 1393 /* 1394 * Add an ED to the schedule. Called at splusb(). 1395 */ 1396 void 1397 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1398 { 1399 SPLUSBCHECK; 1400 1401 sqh->next = head->next; 1402 sqh->qh.qh_link = head->qh.qh_link; 1403 head->next = sqh; 1404 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1405 1406 #ifdef EHCI_DEBUG 1407 if (ehcidebug > 5) { 1408 printf("ehci_add_qh:\n"); 1409 ehci_dump_sqh(sqh); 1410 } 1411 #endif 1412 } 1413 1414 /* 1415 * Remove an ED from the schedule. Called at splusb(). 1416 */ 1417 void 1418 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1419 { 1420 ehci_soft_qh_t *p; 1421 1422 SPLUSBCHECK; 1423 /* XXX */ 1424 for (p = head; p != NULL && p->next != sqh; p = p->next) 1425 ; 1426 if (p == NULL) 1427 panic("ehci_rem_qh: ED not found"); 1428 p->next = sqh->next; 1429 p->qh.qh_link = sqh->qh.qh_link; 1430 1431 ehci_sync_hc(sc); 1432 } 1433 1434 void 1435 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1436 { 1437 /* Halt while we are messing. */ 1438 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1439 sqh->qh.qh_curqtd = 0; 1440 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1441 sqh->sqtd = sqtd; 1442 /* Clear halt */ 1443 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1444 } 1445 1446 /* 1447 * Ensure that the HC has released all references to the QH. We do this 1448 * by asking for a Async Advance Doorbell interrupt and then we wait for 1449 * the interrupt. 1450 * To make this easier we first obtain exclusive use of the doorbell. 1451 */ 1452 void 1453 ehci_sync_hc(ehci_softc_t *sc) 1454 { 1455 int s, error; 1456 1457 if (sc->sc_dying) { 1458 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1459 return; 1460 } 1461 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1462 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1463 s = splhardusb(); 1464 /* ask for doorbell */ 1465 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1466 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1467 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1468 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1469 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1470 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1471 splx(s); 1472 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1473 #ifdef DIAGNOSTIC 1474 if (error) 1475 printf("ehci_sync_hc: tsleep() = %d\n", error); 1476 #endif 1477 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1478 } 1479 1480 /***********/ 1481 1482 /* 1483 * Data structures and routines to emulate the root hub. 1484 */ 1485 Static usb_device_descriptor_t ehci_devd = { 1486 USB_DEVICE_DESCRIPTOR_SIZE, 1487 UDESC_DEVICE, /* type */ 1488 {0x00, 0x02}, /* USB version */ 1489 UDCLASS_HUB, /* class */ 1490 UDSUBCLASS_HUB, /* subclass */ 1491 UDPROTO_HSHUBSTT, /* protocol */ 1492 64, /* max packet */ 1493 {0},{0},{0x00,0x01}, /* device id */ 1494 1,2,0, /* string indicies */ 1495 1 /* # of configurations */ 1496 }; 1497 1498 Static usb_device_qualifier_t ehci_odevd = { 1499 USB_DEVICE_DESCRIPTOR_SIZE, 1500 UDESC_DEVICE_QUALIFIER, /* type */ 1501 {0x00, 0x02}, /* USB version */ 1502 UDCLASS_HUB, /* class */ 1503 UDSUBCLASS_HUB, /* subclass */ 1504 UDPROTO_FSHUB, /* protocol */ 1505 64, /* max packet */ 1506 1, /* # of configurations */ 1507 0 1508 }; 1509 1510 Static usb_config_descriptor_t ehci_confd = { 1511 USB_CONFIG_DESCRIPTOR_SIZE, 1512 UDESC_CONFIG, 1513 {USB_CONFIG_DESCRIPTOR_SIZE + 1514 USB_INTERFACE_DESCRIPTOR_SIZE + 1515 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1516 1, 1517 1, 1518 0, 1519 UC_SELF_POWERED, 1520 0 /* max power */ 1521 }; 1522 1523 Static usb_interface_descriptor_t ehci_ifcd = { 1524 USB_INTERFACE_DESCRIPTOR_SIZE, 1525 UDESC_INTERFACE, 1526 0, 1527 0, 1528 1, 1529 UICLASS_HUB, 1530 UISUBCLASS_HUB, 1531 UIPROTO_HSHUBSTT, 1532 0 1533 }; 1534 1535 Static usb_endpoint_descriptor_t ehci_endpd = { 1536 USB_ENDPOINT_DESCRIPTOR_SIZE, 1537 UDESC_ENDPOINT, 1538 UE_DIR_IN | EHCI_INTR_ENDPT, 1539 UE_INTERRUPT, 1540 {8, 0}, /* max packet */ 1541 255 1542 }; 1543 1544 Static usb_hub_descriptor_t ehci_hubd = { 1545 USB_HUB_DESCRIPTOR_SIZE, 1546 UDESC_HUB, 1547 0, 1548 {0,0}, 1549 0, 1550 0, 1551 {0}, 1552 }; 1553 1554 Static int 1555 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1556 { 1557 int i; 1558 1559 if (l == 0) 1560 return (0); 1561 p->bLength = 2 * strlen(s) + 2; 1562 if (l == 1) 1563 return (1); 1564 p->bDescriptorType = UDESC_STRING; 1565 l -= 2; 1566 for (i = 0; s[i] && l > 1; i++, l -= 2) 1567 USETW2(p->bString[i], 0, s[i]); 1568 return (2*i+2); 1569 } 1570 1571 /* 1572 * Simulate a hardware hub by handling all the necessary requests. 1573 */ 1574 Static usbd_status 1575 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1576 { 1577 usbd_status err; 1578 1579 /* Insert last in queue. */ 1580 err = usb_insert_transfer(xfer); 1581 if (err) 1582 return (err); 1583 1584 /* Pipe isn't running, start first */ 1585 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1586 } 1587 1588 Static usbd_status 1589 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1590 { 1591 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1592 usb_device_request_t *req; 1593 void *buf = NULL; 1594 int port, i; 1595 int s, len, value, index, l, totlen = 0; 1596 usb_port_status_t ps; 1597 usb_hub_descriptor_t hubd; 1598 usbd_status err; 1599 u_int32_t v; 1600 1601 if (sc->sc_dying) 1602 return (USBD_IOERROR); 1603 1604 #ifdef DIAGNOSTIC 1605 if (!(xfer->rqflags & URQ_REQUEST)) 1606 /* XXX panic */ 1607 return (USBD_INVAL); 1608 #endif 1609 req = &xfer->request; 1610 1611 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1612 req->bmRequestType, req->bRequest)); 1613 1614 len = UGETW(req->wLength); 1615 value = UGETW(req->wValue); 1616 index = UGETW(req->wIndex); 1617 1618 if (len != 0) 1619 buf = KERNADDR(&xfer->dmabuf, 0); 1620 1621 #define C(x,y) ((x) | ((y) << 8)) 1622 switch(C(req->bRequest, req->bmRequestType)) { 1623 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1624 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1625 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1626 /* 1627 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1628 * for the integrated root hub. 1629 */ 1630 break; 1631 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1632 if (len > 0) { 1633 *(u_int8_t *)buf = sc->sc_conf; 1634 totlen = 1; 1635 } 1636 break; 1637 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1638 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1639 switch(value >> 8) { 1640 case UDESC_DEVICE: 1641 if ((value & 0xff) != 0) { 1642 err = USBD_IOERROR; 1643 goto ret; 1644 } 1645 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1646 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1647 memcpy(buf, &ehci_devd, l); 1648 break; 1649 /* 1650 * We can't really operate at another speed, but the spec says 1651 * we need this descriptor. 1652 */ 1653 case UDESC_DEVICE_QUALIFIER: 1654 if ((value & 0xff) != 0) { 1655 err = USBD_IOERROR; 1656 goto ret; 1657 } 1658 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1659 memcpy(buf, &ehci_odevd, l); 1660 break; 1661 /* 1662 * We can't really operate at another speed, but the spec says 1663 * we need this descriptor. 1664 */ 1665 case UDESC_OTHER_SPEED_CONFIGURATION: 1666 case UDESC_CONFIG: 1667 if ((value & 0xff) != 0) { 1668 err = USBD_IOERROR; 1669 goto ret; 1670 } 1671 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1672 memcpy(buf, &ehci_confd, l); 1673 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1674 value >> 8; 1675 buf = (char *)buf + l; 1676 len -= l; 1677 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1678 totlen += l; 1679 memcpy(buf, &ehci_ifcd, l); 1680 buf = (char *)buf + l; 1681 len -= l; 1682 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1683 totlen += l; 1684 memcpy(buf, &ehci_endpd, l); 1685 break; 1686 case UDESC_STRING: 1687 if (len == 0) 1688 break; 1689 *(u_int8_t *)buf = 0; 1690 totlen = 1; 1691 switch (value & 0xff) { 1692 case 1: /* Vendor */ 1693 totlen = ehci_str(buf, len, sc->sc_vendor); 1694 break; 1695 case 2: /* Product */ 1696 totlen = ehci_str(buf, len, "EHCI root hub"); 1697 break; 1698 } 1699 break; 1700 default: 1701 err = USBD_IOERROR; 1702 goto ret; 1703 } 1704 break; 1705 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1706 if (len > 0) { 1707 *(u_int8_t *)buf = 0; 1708 totlen = 1; 1709 } 1710 break; 1711 case C(UR_GET_STATUS, UT_READ_DEVICE): 1712 if (len > 1) { 1713 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1714 totlen = 2; 1715 } 1716 break; 1717 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1718 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1719 if (len > 1) { 1720 USETW(((usb_status_t *)buf)->wStatus, 0); 1721 totlen = 2; 1722 } 1723 break; 1724 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1725 if (value >= USB_MAX_DEVICES) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 sc->sc_addr = value; 1730 break; 1731 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1732 if (value != 0 && value != 1) { 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 sc->sc_conf = value; 1737 break; 1738 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1739 break; 1740 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1741 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1742 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1743 err = USBD_IOERROR; 1744 goto ret; 1745 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1746 break; 1747 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1748 break; 1749 /* Hub requests */ 1750 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1751 break; 1752 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1753 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1754 "port=%d feature=%d\n", 1755 index, value)); 1756 if (index < 1 || index > sc->sc_noport) { 1757 err = USBD_IOERROR; 1758 goto ret; 1759 } 1760 port = EHCI_PORTSC(index); 1761 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1762 switch(value) { 1763 case UHF_PORT_ENABLE: 1764 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1765 break; 1766 case UHF_PORT_SUSPEND: 1767 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1768 break; 1769 case UHF_PORT_POWER: 1770 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1771 break; 1772 case UHF_PORT_TEST: 1773 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1774 "%d\n", index)); 1775 break; 1776 case UHF_PORT_INDICATOR: 1777 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1778 "%d\n", index)); 1779 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1780 break; 1781 case UHF_C_PORT_CONNECTION: 1782 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1783 break; 1784 case UHF_C_PORT_ENABLE: 1785 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1786 break; 1787 case UHF_C_PORT_SUSPEND: 1788 /* how? */ 1789 break; 1790 case UHF_C_PORT_OVER_CURRENT: 1791 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1792 break; 1793 case UHF_C_PORT_RESET: 1794 sc->sc_isreset = 0; 1795 break; 1796 default: 1797 err = USBD_IOERROR; 1798 goto ret; 1799 } 1800 #if 0 1801 switch(value) { 1802 case UHF_C_PORT_CONNECTION: 1803 case UHF_C_PORT_ENABLE: 1804 case UHF_C_PORT_SUSPEND: 1805 case UHF_C_PORT_OVER_CURRENT: 1806 case UHF_C_PORT_RESET: 1807 /* Enable RHSC interrupt if condition is cleared. */ 1808 if ((OREAD4(sc, port) >> 16) == 0) 1809 ehci_pcd_able(sc, 1); 1810 break; 1811 default: 1812 break; 1813 } 1814 #endif 1815 break; 1816 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1817 if ((value & 0xff) != 0) { 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 hubd = ehci_hubd; 1822 hubd.bNbrPorts = sc->sc_noport; 1823 v = EOREAD4(sc, EHCI_HCSPARAMS); 1824 USETW(hubd.wHubCharacteristics, 1825 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1826 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1827 ? UHD_PORT_IND : 0); 1828 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1829 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1830 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1831 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1832 l = min(len, hubd.bDescLength); 1833 totlen = l; 1834 memcpy(buf, &hubd, l); 1835 break; 1836 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1837 if (len != 4) { 1838 err = USBD_IOERROR; 1839 goto ret; 1840 } 1841 memset(buf, 0, len); /* ? XXX */ 1842 totlen = len; 1843 break; 1844 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1845 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1846 index)); 1847 if (index < 1 || index > sc->sc_noport) { 1848 err = USBD_IOERROR; 1849 goto ret; 1850 } 1851 if (len != 4) { 1852 err = USBD_IOERROR; 1853 goto ret; 1854 } 1855 v = EOREAD4(sc, EHCI_PORTSC(index)); 1856 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1857 v)); 1858 i = UPS_HIGH_SPEED; 1859 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1860 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1861 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1862 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1863 if (v & EHCI_PS_PR) i |= UPS_RESET; 1864 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1865 USETW(ps.wPortStatus, i); 1866 i = 0; 1867 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1868 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1869 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1870 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1871 USETW(ps.wPortChange, i); 1872 l = min(len, sizeof ps); 1873 memcpy(buf, &ps, l); 1874 totlen = l; 1875 break; 1876 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1877 err = USBD_IOERROR; 1878 goto ret; 1879 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1880 break; 1881 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1882 if (index < 1 || index > sc->sc_noport) { 1883 err = USBD_IOERROR; 1884 goto ret; 1885 } 1886 port = EHCI_PORTSC(index); 1887 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1888 switch(value) { 1889 case UHF_PORT_ENABLE: 1890 EOWRITE4(sc, port, v | EHCI_PS_PE); 1891 break; 1892 case UHF_PORT_SUSPEND: 1893 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1894 break; 1895 case UHF_PORT_RESET: 1896 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1897 index)); 1898 if (EHCI_PS_IS_LOWSPEED(v)) { 1899 /* Low speed device, give up ownership. */ 1900 ehci_disown(sc, index, 1); 1901 break; 1902 } 1903 /* Start reset sequence. */ 1904 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1905 EOWRITE4(sc, port, v | EHCI_PS_PR); 1906 /* Wait for reset to complete. */ 1907 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1908 if (sc->sc_dying) { 1909 err = USBD_IOERROR; 1910 goto ret; 1911 } 1912 /* Terminate reset sequence. */ 1913 EOWRITE4(sc, port, v); 1914 /* Wait for HC to complete reset. */ 1915 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1916 if (sc->sc_dying) { 1917 err = USBD_IOERROR; 1918 goto ret; 1919 } 1920 v = EOREAD4(sc, port); 1921 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1922 if (v & EHCI_PS_PR) { 1923 printf("%s: port reset timeout\n", 1924 USBDEVNAME(sc->sc_bus.bdev)); 1925 return (USBD_TIMEOUT); 1926 } 1927 if (!(v & EHCI_PS_PE)) { 1928 /* Not a high speed device, give up ownership.*/ 1929 ehci_disown(sc, index, 0); 1930 break; 1931 } 1932 sc->sc_isreset = 1; 1933 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1934 index, v)); 1935 break; 1936 case UHF_PORT_POWER: 1937 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1938 "%d\n", index)); 1939 EOWRITE4(sc, port, v | EHCI_PS_PP); 1940 break; 1941 case UHF_PORT_TEST: 1942 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1943 "%d\n", index)); 1944 break; 1945 case UHF_PORT_INDICATOR: 1946 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 1947 "%d\n", index)); 1948 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1949 break; 1950 default: 1951 err = USBD_IOERROR; 1952 goto ret; 1953 } 1954 break; 1955 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1956 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1957 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1958 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1959 break; 1960 default: 1961 err = USBD_IOERROR; 1962 goto ret; 1963 } 1964 xfer->actlen = totlen; 1965 err = USBD_NORMAL_COMPLETION; 1966 ret: 1967 xfer->status = err; 1968 s = splusb(); 1969 usb_transfer_complete(xfer); 1970 splx(s); 1971 return (USBD_IN_PROGRESS); 1972 } 1973 1974 void 1975 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1976 { 1977 int port; 1978 u_int32_t v; 1979 1980 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1981 #ifdef DIAGNOSTIC 1982 if (sc->sc_npcomp != 0) { 1983 int i = (index-1) / sc->sc_npcomp; 1984 if (i >= sc->sc_ncomp) 1985 printf("%s: strange port\n", 1986 USBDEVNAME(sc->sc_bus.bdev)); 1987 else 1988 printf("%s: handing over %s speed device on " 1989 "port %d to %s\n", 1990 USBDEVNAME(sc->sc_bus.bdev), 1991 lowspeed ? "low" : "full", 1992 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1993 } else { 1994 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1995 } 1996 #endif 1997 port = EHCI_PORTSC(index); 1998 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1999 EOWRITE4(sc, port, v | EHCI_PS_PO); 2000 } 2001 2002 /* Abort a root control request. */ 2003 Static void 2004 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2005 { 2006 /* Nothing to do, all transfers are synchronous. */ 2007 } 2008 2009 /* Close the root pipe. */ 2010 Static void 2011 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2012 { 2013 DPRINTF(("ehci_root_ctrl_close\n")); 2014 /* Nothing to do. */ 2015 } 2016 2017 void 2018 ehci_root_intr_done(usbd_xfer_handle xfer) 2019 { 2020 xfer->hcpriv = NULL; 2021 } 2022 2023 Static usbd_status 2024 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2025 { 2026 usbd_status err; 2027 2028 /* Insert last in queue. */ 2029 err = usb_insert_transfer(xfer); 2030 if (err) 2031 return (err); 2032 2033 /* Pipe isn't running, start first */ 2034 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2035 } 2036 2037 Static usbd_status 2038 ehci_root_intr_start(usbd_xfer_handle xfer) 2039 { 2040 usbd_pipe_handle pipe = xfer->pipe; 2041 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2042 2043 if (sc->sc_dying) 2044 return (USBD_IOERROR); 2045 2046 sc->sc_intrxfer = xfer; 2047 2048 return (USBD_IN_PROGRESS); 2049 } 2050 2051 /* Abort a root interrupt request. */ 2052 Static void 2053 ehci_root_intr_abort(usbd_xfer_handle xfer) 2054 { 2055 int s; 2056 2057 if (xfer->pipe->intrxfer == xfer) { 2058 DPRINTF(("ehci_root_intr_abort: remove\n")); 2059 xfer->pipe->intrxfer = NULL; 2060 } 2061 xfer->status = USBD_CANCELLED; 2062 s = splusb(); 2063 usb_transfer_complete(xfer); 2064 splx(s); 2065 } 2066 2067 /* Close the root pipe. */ 2068 Static void 2069 ehci_root_intr_close(usbd_pipe_handle pipe) 2070 { 2071 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2072 2073 DPRINTF(("ehci_root_intr_close\n")); 2074 2075 sc->sc_intrxfer = NULL; 2076 } 2077 2078 void 2079 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2080 { 2081 xfer->hcpriv = NULL; 2082 } 2083 2084 /************************/ 2085 2086 ehci_soft_qh_t * 2087 ehci_alloc_sqh(ehci_softc_t *sc) 2088 { 2089 ehci_soft_qh_t *sqh; 2090 usbd_status err; 2091 int i, offs; 2092 usb_dma_t dma; 2093 2094 if (sc->sc_freeqhs == NULL) { 2095 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2096 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2097 EHCI_PAGE_SIZE, &dma); 2098 #ifdef EHCI_DEBUG 2099 if (err) 2100 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2101 #endif 2102 if (err) 2103 return (NULL); 2104 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2105 offs = i * EHCI_SQH_SIZE; 2106 sqh = KERNADDR(&dma, offs); 2107 sqh->physaddr = DMAADDR(&dma, offs); 2108 sqh->next = sc->sc_freeqhs; 2109 sc->sc_freeqhs = sqh; 2110 } 2111 } 2112 sqh = sc->sc_freeqhs; 2113 sc->sc_freeqhs = sqh->next; 2114 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2115 sqh->next = NULL; 2116 return (sqh); 2117 } 2118 2119 void 2120 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2121 { 2122 sqh->next = sc->sc_freeqhs; 2123 sc->sc_freeqhs = sqh; 2124 } 2125 2126 ehci_soft_qtd_t * 2127 ehci_alloc_sqtd(ehci_softc_t *sc) 2128 { 2129 ehci_soft_qtd_t *sqtd; 2130 usbd_status err; 2131 int i, offs; 2132 usb_dma_t dma; 2133 int s; 2134 2135 if (sc->sc_freeqtds == NULL) { 2136 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2137 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2138 EHCI_PAGE_SIZE, &dma); 2139 #ifdef EHCI_DEBUG 2140 if (err) 2141 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2142 #endif 2143 if (err) 2144 return (NULL); 2145 s = splusb(); 2146 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2147 offs = i * EHCI_SQTD_SIZE; 2148 sqtd = KERNADDR(&dma, offs); 2149 sqtd->physaddr = DMAADDR(&dma, offs); 2150 sqtd->nextqtd = sc->sc_freeqtds; 2151 sc->sc_freeqtds = sqtd; 2152 } 2153 splx(s); 2154 } 2155 2156 s = splusb(); 2157 sqtd = sc->sc_freeqtds; 2158 sc->sc_freeqtds = sqtd->nextqtd; 2159 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2160 sqtd->nextqtd = NULL; 2161 sqtd->xfer = NULL; 2162 splx(s); 2163 2164 return (sqtd); 2165 } 2166 2167 void 2168 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2169 { 2170 int s; 2171 2172 s = splusb(); 2173 sqtd->nextqtd = sc->sc_freeqtds; 2174 sc->sc_freeqtds = sqtd; 2175 splx(s); 2176 } 2177 2178 usbd_status 2179 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2180 int alen, int rd, usbd_xfer_handle xfer, 2181 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2182 { 2183 ehci_soft_qtd_t *next, *cur; 2184 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2185 u_int32_t qtdstatus; 2186 int len, curlen, mps; 2187 int i, tog; 2188 usb_dma_t *dma = &xfer->dmabuf; 2189 2190 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2191 2192 len = alen; 2193 dataphys = DMAADDR(dma, 0); 2194 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2195 #if 0 2196 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2197 epipe->nexttoggle); 2198 #endif 2199 qtdstatus = EHCI_QTD_ACTIVE | 2200 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2201 EHCI_QTD_SET_CERR(3) 2202 /* IOC set below */ 2203 /* BYTES set below */ 2204 ; 2205 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2206 tog = epipe->nexttoggle; 2207 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2208 2209 cur = ehci_alloc_sqtd(sc); 2210 *sp = cur; 2211 if (cur == NULL) 2212 goto nomem; 2213 for (;;) { 2214 dataphyspage = EHCI_PAGE(dataphys); 2215 /* The EHCI hardware can handle at most 5 pages. */ 2216 if (dataphyslastpage - dataphyspage < 2217 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2218 /* we can handle it in this QTD */ 2219 curlen = len; 2220 } else { 2221 /* must use multiple TDs, fill as much as possible. */ 2222 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2223 EHCI_PAGE_OFFSET(dataphys); 2224 #ifdef DIAGNOSTIC 2225 if (curlen > len) { 2226 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2227 "len=0x%x offs=0x%x\n", curlen, len, 2228 EHCI_PAGE_OFFSET(dataphys)); 2229 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2230 dataphyslastpage, dataphyspage, 2231 dataphys); 2232 curlen = len; 2233 } 2234 #endif 2235 /* the length must be a multiple of the max size */ 2236 curlen -= curlen % mps; 2237 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2238 "curlen=%d\n", curlen)); 2239 #ifdef DIAGNOSTIC 2240 if (curlen == 0) 2241 panic("ehci_alloc_std: curlen == 0"); 2242 #endif 2243 } 2244 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2245 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2246 dataphys, dataphyslastpage, 2247 len, curlen)); 2248 len -= curlen; 2249 2250 if (len != 0) { 2251 next = ehci_alloc_sqtd(sc); 2252 if (next == NULL) 2253 goto nomem; 2254 nextphys = htole32(next->physaddr); 2255 } else { 2256 next = NULL; 2257 nextphys = EHCI_NULL; 2258 } 2259 2260 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2261 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2262 if (i != 0) /* use offset only in first buffer */ 2263 a = EHCI_PAGE(a); 2264 cur->qtd.qtd_buffer[i] = htole32(a); 2265 cur->qtd.qtd_buffer_hi[i] = 0; 2266 #ifdef DIAGNOSTIC 2267 if (i >= EHCI_QTD_NBUFFERS) { 2268 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2269 goto nomem; 2270 } 2271 #endif 2272 } 2273 cur->nextqtd = next; 2274 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2275 cur->qtd.qtd_status = 2276 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2277 cur->xfer = xfer; 2278 cur->len = curlen; 2279 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2280 dataphys, dataphys + curlen)); 2281 /* adjust the toggle based on the number of packets in this 2282 qtd */ 2283 if (((curlen + mps - 1) / mps) & 1) { 2284 tog ^= 1; 2285 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2286 } 2287 if (len == 0) 2288 break; 2289 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2290 dataphys += curlen; 2291 cur = next; 2292 } 2293 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2294 *ep = cur; 2295 epipe->nexttoggle = tog; 2296 2297 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2298 *sp, *ep)); 2299 2300 return (USBD_NORMAL_COMPLETION); 2301 2302 nomem: 2303 /* XXX free chain */ 2304 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2305 return (USBD_NOMEM); 2306 } 2307 2308 Static void 2309 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2310 ehci_soft_qtd_t *sqtdend) 2311 { 2312 ehci_soft_qtd_t *p; 2313 int i; 2314 2315 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2316 sqtd, sqtdend)); 2317 2318 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2319 p = sqtd->nextqtd; 2320 ehci_free_sqtd(sc, sqtd); 2321 } 2322 } 2323 2324 /****************/ 2325 2326 /* 2327 * Close a reqular pipe. 2328 * Assumes that there are no pending transactions. 2329 */ 2330 void 2331 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2332 { 2333 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2334 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2335 ehci_soft_qh_t *sqh = epipe->sqh; 2336 int s; 2337 2338 s = splusb(); 2339 ehci_rem_qh(sc, sqh, head); 2340 splx(s); 2341 ehci_free_sqh(sc, epipe->sqh); 2342 } 2343 2344 /* 2345 * Abort a device request. 2346 * If this routine is called at splusb() it guarantees that the request 2347 * will be removed from the hardware scheduling and that the callback 2348 * for it will be called with USBD_CANCELLED status. 2349 * It's impossible to guarantee that the requested transfer will not 2350 * have happened since the hardware runs concurrently. 2351 * If the transaction has already happened we rely on the ordinary 2352 * interrupt processing to process it. 2353 * XXX This is most probably wrong. 2354 */ 2355 void 2356 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2357 { 2358 #define exfer EXFER(xfer) 2359 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2360 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2361 ehci_soft_qh_t *sqh = epipe->sqh; 2362 ehci_soft_qtd_t *sqtd; 2363 ehci_physaddr_t cur; 2364 u_int32_t qhstatus; 2365 int s; 2366 int hit; 2367 2368 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2369 2370 if (sc->sc_dying) { 2371 /* If we're dying, just do the software part. */ 2372 s = splusb(); 2373 xfer->status = status; /* make software ignore it */ 2374 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2375 usb_transfer_complete(xfer); 2376 splx(s); 2377 return; 2378 } 2379 2380 if (xfer->device->bus->intr_context || !curproc) 2381 panic("ehci_abort_xfer: not in process context"); 2382 2383 /* 2384 * Step 1: Make interrupt routine and hardware ignore xfer. 2385 */ 2386 s = splusb(); 2387 xfer->status = status; /* make software ignore it */ 2388 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2389 qhstatus = sqh->qh.qh_qtd.qtd_status; 2390 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2391 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2392 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2393 if (sqtd == exfer->sqtdend) 2394 break; 2395 } 2396 splx(s); 2397 2398 /* 2399 * Step 2: Wait until we know hardware has finished any possible 2400 * use of the xfer. Also make sure the soft interrupt routine 2401 * has run. 2402 */ 2403 ehci_sync_hc(sc); 2404 s = splusb(); 2405 #ifdef USB_USE_SOFTINTR 2406 sc->sc_softwake = 1; 2407 #endif /* USB_USE_SOFTINTR */ 2408 usb_schedsoftintr(&sc->sc_bus); 2409 #ifdef USB_USE_SOFTINTR 2410 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2411 #endif /* USB_USE_SOFTINTR */ 2412 splx(s); 2413 2414 /* 2415 * Step 3: Remove any vestiges of the xfer from the hardware. 2416 * The complication here is that the hardware may have executed 2417 * beyond the xfer we're trying to abort. So as we're scanning 2418 * the TDs of this xfer we check if the hardware points to 2419 * any of them. 2420 */ 2421 s = splusb(); /* XXX why? */ 2422 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2423 hit = 0; 2424 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2425 hit |= cur == sqtd->physaddr; 2426 if (sqtd == exfer->sqtdend) 2427 break; 2428 } 2429 sqtd = sqtd->nextqtd; 2430 /* Zap curqtd register if hardware pointed inside the xfer. */ 2431 if (hit && sqtd != NULL) { 2432 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2433 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2434 sqh->qh.qh_qtd.qtd_status = qhstatus; 2435 } else { 2436 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2437 } 2438 2439 /* 2440 * Step 4: Execute callback. 2441 */ 2442 #ifdef DIAGNOSTIC 2443 exfer->isdone = 1; 2444 #endif 2445 usb_transfer_complete(xfer); 2446 2447 splx(s); 2448 #undef exfer 2449 } 2450 2451 void 2452 ehci_timeout(void *addr) 2453 { 2454 struct ehci_xfer *exfer = addr; 2455 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2456 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2457 2458 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2459 #ifdef USB_DEBUG 2460 if (ehcidebug > 1) 2461 usbd_dump_pipe(exfer->xfer.pipe); 2462 #endif 2463 2464 if (sc->sc_dying) { 2465 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2466 return; 2467 } 2468 2469 /* Execute the abort in a process context. */ 2470 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2471 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2472 } 2473 2474 void 2475 ehci_timeout_task(void *addr) 2476 { 2477 usbd_xfer_handle xfer = addr; 2478 int s; 2479 2480 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2481 2482 s = splusb(); 2483 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2484 splx(s); 2485 } 2486 2487 /************************/ 2488 2489 Static usbd_status 2490 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2491 { 2492 usbd_status err; 2493 2494 /* Insert last in queue. */ 2495 err = usb_insert_transfer(xfer); 2496 if (err) 2497 return (err); 2498 2499 /* Pipe isn't running, start first */ 2500 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2501 } 2502 2503 Static usbd_status 2504 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2505 { 2506 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2507 usbd_status err; 2508 2509 if (sc->sc_dying) 2510 return (USBD_IOERROR); 2511 2512 #ifdef DIAGNOSTIC 2513 if (!(xfer->rqflags & URQ_REQUEST)) { 2514 /* XXX panic */ 2515 printf("ehci_device_ctrl_transfer: not a request\n"); 2516 return (USBD_INVAL); 2517 } 2518 #endif 2519 2520 err = ehci_device_request(xfer); 2521 if (err) 2522 return (err); 2523 2524 if (sc->sc_bus.use_polling) 2525 ehci_waitintr(sc, xfer); 2526 return (USBD_IN_PROGRESS); 2527 } 2528 2529 void 2530 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2531 { 2532 struct ehci_xfer *ex = EXFER(xfer); 2533 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2534 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2535 2536 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2537 2538 #ifdef DIAGNOSTIC 2539 if (!(xfer->rqflags & URQ_REQUEST)) { 2540 panic("ehci_ctrl_done: not a request"); 2541 } 2542 #endif 2543 2544 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2545 ehci_del_intr_list(ex); /* remove from active list */ 2546 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2547 } 2548 2549 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2550 } 2551 2552 /* Abort a device control request. */ 2553 Static void 2554 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2555 { 2556 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2557 ehci_abort_xfer(xfer, USBD_CANCELLED); 2558 } 2559 2560 /* Close a device control pipe. */ 2561 Static void 2562 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2563 { 2564 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2565 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2566 2567 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2568 ehci_close_pipe(pipe, sc->sc_async_head); 2569 } 2570 2571 usbd_status 2572 ehci_device_request(usbd_xfer_handle xfer) 2573 { 2574 #define exfer EXFER(xfer) 2575 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2576 usb_device_request_t *req = &xfer->request; 2577 usbd_device_handle dev = epipe->pipe.device; 2578 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2579 int addr = dev->address; 2580 ehci_soft_qtd_t *setup, *stat, *next; 2581 ehci_soft_qh_t *sqh; 2582 int isread; 2583 int len; 2584 usbd_status err; 2585 int s; 2586 2587 isread = req->bmRequestType & UT_READ; 2588 len = UGETW(req->wLength); 2589 2590 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2591 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2592 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2593 UGETW(req->wIndex), len, addr, 2594 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2595 2596 setup = ehci_alloc_sqtd(sc); 2597 if (setup == NULL) { 2598 err = USBD_NOMEM; 2599 goto bad1; 2600 } 2601 stat = ehci_alloc_sqtd(sc); 2602 if (stat == NULL) { 2603 err = USBD_NOMEM; 2604 goto bad2; 2605 } 2606 2607 sqh = epipe->sqh; 2608 epipe->u.ctl.length = len; 2609 2610 /* Update device address and length since they may have changed 2611 during the setup of the control pipe in usbd_new_device(). */ 2612 /* XXX This only needs to be done once, but it's too early in open. */ 2613 /* XXXX Should not touch ED here! */ 2614 sqh->qh.qh_endp = 2615 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2616 htole32( 2617 EHCI_QH_SET_ADDR(addr) | 2618 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2619 ); 2620 2621 /* Set up data transaction */ 2622 if (len != 0) { 2623 ehci_soft_qtd_t *end; 2624 2625 /* Start toggle at 1. */ 2626 epipe->nexttoggle = 1; 2627 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2628 &next, &end); 2629 if (err) 2630 goto bad3; 2631 end->nextqtd = stat; 2632 end->qtd.qtd_next = 2633 end->qtd.qtd_altnext = htole32(stat->physaddr); 2634 } else { 2635 next = stat; 2636 } 2637 2638 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2639 2640 /* Clear toggle */ 2641 setup->qtd.qtd_status = htole32( 2642 EHCI_QTD_ACTIVE | 2643 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2644 EHCI_QTD_SET_CERR(3) | 2645 EHCI_QTD_SET_TOGGLE(0) | 2646 EHCI_QTD_SET_BYTES(sizeof *req) 2647 ); 2648 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2649 setup->qtd.qtd_buffer_hi[0] = 0; 2650 setup->nextqtd = next; 2651 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2652 setup->xfer = xfer; 2653 setup->len = sizeof *req; 2654 2655 stat->qtd.qtd_status = htole32( 2656 EHCI_QTD_ACTIVE | 2657 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2658 EHCI_QTD_SET_CERR(3) | 2659 EHCI_QTD_SET_TOGGLE(1) | 2660 EHCI_QTD_IOC 2661 ); 2662 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2663 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2664 stat->nextqtd = NULL; 2665 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2666 stat->xfer = xfer; 2667 stat->len = 0; 2668 2669 #ifdef EHCI_DEBUG 2670 if (ehcidebug > 5) { 2671 DPRINTF(("ehci_device_request:\n")); 2672 ehci_dump_sqh(sqh); 2673 ehci_dump_sqtds(setup); 2674 } 2675 #endif 2676 2677 exfer->sqtdstart = setup; 2678 exfer->sqtdend = stat; 2679 #ifdef DIAGNOSTIC 2680 if (!exfer->isdone) { 2681 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2682 } 2683 exfer->isdone = 0; 2684 #endif 2685 2686 /* Insert qTD in QH list. */ 2687 s = splusb(); 2688 ehci_set_qh_qtd(sqh, setup); 2689 if (xfer->timeout && !sc->sc_bus.use_polling) { 2690 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2691 ehci_timeout, xfer); 2692 } 2693 ehci_add_intr_list(sc, exfer); 2694 xfer->status = USBD_IN_PROGRESS; 2695 splx(s); 2696 2697 #ifdef EHCI_DEBUG 2698 if (ehcidebug > 10) { 2699 DPRINTF(("ehci_device_request: status=%x\n", 2700 EOREAD4(sc, EHCI_USBSTS))); 2701 delay(10000); 2702 ehci_dump_regs(sc); 2703 ehci_dump_sqh(sc->sc_async_head); 2704 ehci_dump_sqh(sqh); 2705 ehci_dump_sqtds(setup); 2706 } 2707 #endif 2708 2709 return (USBD_NORMAL_COMPLETION); 2710 2711 bad3: 2712 ehci_free_sqtd(sc, stat); 2713 bad2: 2714 ehci_free_sqtd(sc, setup); 2715 bad1: 2716 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2717 xfer->status = err; 2718 usb_transfer_complete(xfer); 2719 return (err); 2720 #undef exfer 2721 } 2722 2723 /************************/ 2724 2725 Static usbd_status 2726 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2727 { 2728 usbd_status err; 2729 2730 /* Insert last in queue. */ 2731 err = usb_insert_transfer(xfer); 2732 if (err) 2733 return (err); 2734 2735 /* Pipe isn't running, start first */ 2736 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2737 } 2738 2739 usbd_status 2740 ehci_device_bulk_start(usbd_xfer_handle xfer) 2741 { 2742 #define exfer EXFER(xfer) 2743 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2744 usbd_device_handle dev = epipe->pipe.device; 2745 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2746 ehci_soft_qtd_t *data, *dataend; 2747 ehci_soft_qh_t *sqh; 2748 usbd_status err; 2749 int len, isread, endpt; 2750 int s; 2751 2752 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2753 xfer, xfer->length, xfer->flags)); 2754 2755 if (sc->sc_dying) 2756 return (USBD_IOERROR); 2757 2758 #ifdef DIAGNOSTIC 2759 if (xfer->rqflags & URQ_REQUEST) 2760 panic("ehci_device_bulk_start: a request"); 2761 #endif 2762 2763 len = xfer->length; 2764 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2765 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2766 sqh = epipe->sqh; 2767 2768 epipe->u.bulk.length = len; 2769 2770 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2771 &dataend); 2772 if (err) { 2773 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2774 xfer->status = err; 2775 usb_transfer_complete(xfer); 2776 return (err); 2777 } 2778 2779 #ifdef EHCI_DEBUG 2780 if (ehcidebug > 5) { 2781 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2782 ehci_dump_sqh(sqh); 2783 ehci_dump_sqtds(data); 2784 } 2785 #endif 2786 2787 /* Set up interrupt info. */ 2788 exfer->sqtdstart = data; 2789 exfer->sqtdend = dataend; 2790 #ifdef DIAGNOSTIC 2791 if (!exfer->isdone) { 2792 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2793 } 2794 exfer->isdone = 0; 2795 #endif 2796 2797 s = splusb(); 2798 ehci_set_qh_qtd(sqh, data); 2799 if (xfer->timeout && !sc->sc_bus.use_polling) { 2800 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2801 ehci_timeout, xfer); 2802 } 2803 ehci_add_intr_list(sc, exfer); 2804 xfer->status = USBD_IN_PROGRESS; 2805 splx(s); 2806 2807 #ifdef EHCI_DEBUG 2808 if (ehcidebug > 10) { 2809 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2810 delay(10000); 2811 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2812 ehci_dump_regs(sc); 2813 #if 0 2814 printf("async_head:\n"); 2815 ehci_dump_sqh(sc->sc_async_head); 2816 #endif 2817 printf("sqh:\n"); 2818 ehci_dump_sqh(sqh); 2819 ehci_dump_sqtds(data); 2820 } 2821 #endif 2822 2823 if (sc->sc_bus.use_polling) 2824 ehci_waitintr(sc, xfer); 2825 2826 return (USBD_IN_PROGRESS); 2827 #undef exfer 2828 } 2829 2830 Static void 2831 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2832 { 2833 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2834 ehci_abort_xfer(xfer, USBD_CANCELLED); 2835 } 2836 2837 /* 2838 * Close a device bulk pipe. 2839 */ 2840 Static void 2841 ehci_device_bulk_close(usbd_pipe_handle pipe) 2842 { 2843 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2844 2845 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2846 ehci_close_pipe(pipe, sc->sc_async_head); 2847 } 2848 2849 void 2850 ehci_device_bulk_done(usbd_xfer_handle xfer) 2851 { 2852 struct ehci_xfer *ex = EXFER(xfer); 2853 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2854 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2855 2856 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2857 xfer, xfer->actlen)); 2858 2859 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2860 ehci_del_intr_list(ex); /* remove from active list */ 2861 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2862 } 2863 2864 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2865 } 2866 2867 /************************/ 2868 2869 Static usbd_status 2870 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2871 { 2872 struct ehci_soft_islot *isp; 2873 int islot, lev; 2874 2875 /* Find a poll rate that is large enough. */ 2876 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2877 if (EHCI_ILEV_IVAL(lev) <= ival) 2878 break; 2879 2880 /* Pick an interrupt slot at the right level. */ 2881 /* XXX could do better than picking at random */ 2882 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2883 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2884 2885 sqh->islot = islot; 2886 isp = &sc->sc_islots[islot]; 2887 ehci_add_qh(sqh, isp->sqh); 2888 2889 return (USBD_NORMAL_COMPLETION); 2890 } 2891 2892 Static usbd_status 2893 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2894 { 2895 usbd_status err; 2896 2897 /* Insert last in queue. */ 2898 err = usb_insert_transfer(xfer); 2899 if (err) 2900 return (err); 2901 2902 /* 2903 * Pipe isn't running (otherwise err would be USBD_INPROG), 2904 * so start it first. 2905 */ 2906 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2907 } 2908 2909 Static usbd_status 2910 ehci_device_intr_start(usbd_xfer_handle xfer) 2911 { 2912 #define exfer EXFER(xfer) 2913 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2914 usbd_device_handle dev = xfer->pipe->device; 2915 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2916 ehci_soft_qtd_t *data, *dataend; 2917 ehci_soft_qh_t *sqh; 2918 usbd_status err; 2919 int len, isread, endpt; 2920 int s; 2921 2922 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2923 xfer, xfer->length, xfer->flags)); 2924 2925 if (sc->sc_dying) 2926 return (USBD_IOERROR); 2927 2928 #ifdef DIAGNOSTIC 2929 if (xfer->rqflags & URQ_REQUEST) 2930 panic("ehci_device_intr_start: a request"); 2931 #endif 2932 2933 len = xfer->length; 2934 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2935 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2936 sqh = epipe->sqh; 2937 2938 epipe->u.intr.length = len; 2939 2940 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2941 &dataend); 2942 if (err) { 2943 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 2944 xfer->status = err; 2945 usb_transfer_complete(xfer); 2946 return (err); 2947 } 2948 2949 #ifdef EHCI_DEBUG 2950 if (ehcidebug > 5) { 2951 DPRINTF(("ehci_device_intr_start: data(1)\n")); 2952 ehci_dump_sqh(sqh); 2953 ehci_dump_sqtds(data); 2954 } 2955 #endif 2956 2957 /* Set up interrupt info. */ 2958 exfer->sqtdstart = data; 2959 exfer->sqtdend = dataend; 2960 #ifdef DIAGNOSTIC 2961 if (!exfer->isdone) { 2962 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 2963 } 2964 exfer->isdone = 0; 2965 #endif 2966 2967 s = splusb(); 2968 ehci_set_qh_qtd(sqh, data); 2969 if (xfer->timeout && !sc->sc_bus.use_polling) { 2970 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2971 ehci_timeout, xfer); 2972 } 2973 ehci_add_intr_list(sc, exfer); 2974 xfer->status = USBD_IN_PROGRESS; 2975 splx(s); 2976 2977 #ifdef EHCI_DEBUG 2978 if (ehcidebug > 10) { 2979 DPRINTF(("ehci_device_intr_start: data(2)\n")); 2980 delay(10000); 2981 DPRINTF(("ehci_device_intr_start: data(3)\n")); 2982 ehci_dump_regs(sc); 2983 printf("sqh:\n"); 2984 ehci_dump_sqh(sqh); 2985 ehci_dump_sqtds(data); 2986 } 2987 #endif 2988 2989 if (sc->sc_bus.use_polling) 2990 ehci_waitintr(sc, xfer); 2991 2992 return (USBD_IN_PROGRESS); 2993 #undef exfer 2994 } 2995 2996 Static void 2997 ehci_device_intr_abort(usbd_xfer_handle xfer) 2998 { 2999 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3000 if (xfer->pipe->intrxfer == xfer) { 3001 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3002 xfer->pipe->intrxfer = NULL; 3003 } 3004 ehci_abort_xfer(xfer, USBD_CANCELLED); 3005 } 3006 3007 Static void 3008 ehci_device_intr_close(usbd_pipe_handle pipe) 3009 { 3010 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3011 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3012 struct ehci_soft_islot *isp; 3013 3014 isp = &sc->sc_islots[epipe->sqh->islot]; 3015 ehci_close_pipe(pipe, isp->sqh); 3016 } 3017 3018 Static void 3019 ehci_device_intr_done(usbd_xfer_handle xfer) 3020 { 3021 #define exfer EXFER(xfer) 3022 struct ehci_xfer *ex = EXFER(xfer); 3023 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3024 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3025 ehci_soft_qtd_t *data, *dataend; 3026 ehci_soft_qh_t *sqh; 3027 usbd_status err; 3028 int len, isread, endpt, s; 3029 3030 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3031 xfer, xfer->actlen)); 3032 3033 if (xfer->pipe->repeat) { 3034 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3035 3036 len = epipe->u.intr.length; 3037 xfer->length = len; 3038 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3039 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3040 sqh = epipe->sqh; 3041 3042 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3043 &data, &dataend); 3044 if (err) { 3045 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3046 xfer->status = err; 3047 return; 3048 } 3049 3050 /* Set up interrupt info. */ 3051 exfer->sqtdstart = data; 3052 exfer->sqtdend = dataend; 3053 #ifdef DIAGNOSTIC 3054 if (!exfer->isdone) { 3055 printf("ehci_device_intr_done: not done, ex=%p\n", 3056 exfer); 3057 } 3058 exfer->isdone = 0; 3059 #endif 3060 3061 s = splusb(); 3062 ehci_set_qh_qtd(sqh, data); 3063 if (xfer->timeout && !sc->sc_bus.use_polling) { 3064 usb_callout(xfer->timeout_handle, 3065 mstohz(xfer->timeout), ehci_timeout, xfer); 3066 } 3067 splx(s); 3068 3069 xfer->status = USBD_IN_PROGRESS; 3070 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3071 ehci_del_intr_list(ex); /* remove from active list */ 3072 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3073 } 3074 #undef exfer 3075 } 3076 3077 /************************/ 3078 3079 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3080 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3081 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3082 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3083 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3084
Indexes created Tue Sep 23 07:09:52 GMT 2025